LG 55ea9800

OLED TV
SERVICE MANUAL
CHASSIS : EA34D
MODEL : 55EA9800 55EA9800-UA

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67840104(1308-REV01) Printed in Korea

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CONTENTS
CONTENTS . ............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION........................................................................................ 4
ADJUSTMENT INSTRUCTION............................................................... 11
EXPLODED VIEW .................................................................................. 23
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder ES
on page 3 of this publication, always follow the safety precautions. devices.
Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board mod- 6. Do not remove a replacement ES device from its protective
ule or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads electri-
other electrical connection. cally shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material
installation of electrolytic capacitors may result in an explo- to the chassis or circuit assembly into which the device will be
sion hazard. installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or circuit,
high voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropriate
(by volume) isopropyl alcohol (90 % - 99 % strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand against
ily by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent poten-
tial shock reasons prior to applying power to the unit under test.
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed whenever
gently prying up on the lead with the soldering iron tip as the this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remaining good copper pattern. Solder the overlapped area and clip off
on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor

Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This spec sheet is applied LED TV with (LA34N) chassis
2. Test condition
Each part is tested as below without special notice.
1) Temperature : 25 ºC ± 5 ºC(77 ± 9 ºF) , CST : 40 ºC±5 ºC

2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
Market Input voltage Frequency Remark
USA 110~240V 50/60Hz Standard Voltage of each
product is marked by
models
4) Specification and performance of each parts are followed

each drawing and specification by part number in
accordance with BOM
5) The receiver must be operated for about 20 minutes prior to
the adjustment
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
Safety : UL, CSA, CE, IEC specification
EMC: FCC, ICES, CE, IEC specification
Wireless : Wireless HD Specification (Option)
4. General Specification
No Item Specification Remark
1 Market 1) North America
2 Broad casting System 1) ATSC / NTSC-M
3 Receiving System 1) ATSC / NTSC-M
4 Input Voltage AC 100 - 240V ~ 60Hz
5 Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
5) CADTV : 01~135
7 Aspect Ratio 16:9
8 Tuning System FS
9 LCD Module LC550LUD-MFP2 LGD 55EA9800-UA
10 Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
11 Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %
5. External input format
5.1. 2D mode
5.1.1. Component input (Y, CB/PB, CR/PR)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
1. 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I
2. 720*480 15.73 59.94 13.50 SDTV ,DVD 480I
3. 720*480 31.50 60.00 27.027 SDTV 480P
4. 720*480 31.47 59.94 27.00 SDTV 480P
5. 1280*720 45.00 60.00 74.25 HDTV 720P
6. 1280*720 44.96 59.94 74.176 HDTV 720P
7. 1920*1080 33.75 60.00 74.25 HDTV 1080I
8. 1920*1080 33.72 59.94 74.176 HDTV 1080I
9. 1920*1080 67.50 60.00 148.50 HDTV 1080P
10. 1920*1080 67.432 59.94 148.352 HDTV 1080P
11. 1920*1080 27.00 24.00 74.25 HDTV 1080P
12. 1920*1080 26.97 23.94 74.176 HDTV 1080P
13. 1920*1080 33.75 30.00 74.25 HDTV 1080P
14. 1920*1080 33.71 29.97 74.176 HDTV 1080P
5.1.2. HDMI Input 1 (PC/DTV)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed

HDMI-PC DDC
1 640*350 31.468 70.09 25.17 EGA Х
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
6 1152*864 54.348 60.053 80.00 VESA O
7 1280*1024 63.981 60.020 108.00 VESA (SXGA) O
8 1360*768 47.712 60.015 85.50 VESA (WXGA) O
9 1920*1080 67.5 60 148.5 WUXGA(Reduced Blanking) O
HDMI-DTV
1 720*480 31.47 60 27.027 SDTV 480P
2 720*480 31.47 59.94 27.00 SDTV 480P
3 1280*720 45.00 60.00 74.25 HDTV 720P
4 1280*720 44.96 59.94 74.176 HDTV 720P
5 1920*1080 33.75 60.00 74.25 HDTV 1080I
6 1920*1080 33.72 59.94 74.176 HDTV 1080I
7 1920*1080 67.500 60 148.50 HDTV 1080P
8 1920*1080 67.432 59.939 148.352 HDTV 1080P
9 1920*1080 27.000 24.000 74.25 HDTV 1080P
10 1920*1080 26.97 23.976 74.176 HDTV 1080P
11 1920*1080 33.75 30.000 74.25 HDTV 1080P
12 1920*1080 33.71 29.97 74.176 HDTV 1080P
5.2. 3D Mode
5.2.1. RF Input
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

1 1920*1080 45.00 60 74.25 HDTV 1080I Side by Side, Top & Bottom
2 1280*720 45.00 60 74.25 HDTV 720P Side by Side, Top & Bottom
5.2.2. HDMI Input

5.2.2.1. HDMI 1.3 - DTV (3D supported mode manually)

1 1280*720p 45.00 60.00 74.25 Side by Side , Top & Bottom,
Single Frame Sequential
2 1920*1080i 33.75 60.00 74.25 Side by Side, Top & Bottom
3 1920*1080p 67.50 60.00 148.50 Side by Side , Top & Bottom
Checkerboard, Single Frame Sequential
Row Interleaving, Column Interleaving
4 1920*1080p 27.00 24.000 74.25 Side by Side , Top & Bottom
Checkerboard
5 1920*1080p 33.75 30.000 74.25 Side by Side, Top & Bottom
Checkerboard
5.2.2.2. HDMI 1.3 - DTV (3D supported mode manually)

1 1280*720p 89.91 / 90.00 59.94 / 60.00 148.35 / 148.50 Mandatory Frame Packing,
2 1280*720p 44.96 / 45.00 59.94 / 60.00 74.18 / 74.25 Mandatory Top & Bottom
3 1920*1080i 33.72 / 33.75 59.94 / 60.00 74.18 / 74.25 Mandatory Side by Side (Half)
4 1920*1080p 43.94 / 54.00 23.97 / 24.00 148.35 / 148.50 Mandatory Frame Packing,
5 1920*1080p 26.97 / 27.00 23.97 / 24.00 74.18 / 74.25 Mandatory Top & Bottom
6 1280*720p 44.96 / 45.00 59.94 / 60.00 74.18 / 74.25 Primary Side by Side (Half)
7 1920*1080i 67.432 / 67.50 59.94 / 60.00 148.35 / 148.50 Primary Frame Packing
8 1920*1080p 67.43 / 67.50 59.94 / 60.00 148.35 / 148.50 Primary Top & Bottom
9 1920*1080p 26.97 / 27.00 23.97 / 24.00 74.18 / 74.25 Primary Side by Side (Half)
10 1920*1080p 67.432 / 67.50 29.976 / 30.00 148.35 / 148.50 Primary Frame Packing,
11 1920*1080p 33.716 / 33.75 29.976 / 30.00 74.18 / 74.25 Primary Top & Bottom
12 1920*1080i 33.72 / 33.75 59.94 / 60.00 74.18 / 74.25 Secondary Top & Bottom
13 1920*1080p 67.43 / 67.50 59.94 / 60.00 148.35 / 148.50 Secondary Side by Side (Half)
15 720*480p 62.938 / 63.00 59.94 / 60.00 54.00 / 54.054 Secondary (16:9) Frame Packing,
16 720*480p 31.469 / 31.50 59.94 / 60.00 27.00 / 27.027 Secondary (16:9) Top & Bottom
17 720*480p 31.469 / 31.50 59.94 / 60.00 27.00 / 27.027 Secondary (16:9) Side by Side (Half)
18 720*480p 62.938 / 63.00 59.94 / 60.00 54.00 / 54.054 Secondary (4:3) Frame Packing,
19 720*480p 31.469 / 31.50 59.94 / 60.00 27.00 / 27.027 Secondary (4:3) Top & Bottom
20 720*480p 31.469 / 31.50 59.94 / 60.00 27.00 / 27.027 Secondary (4:3) Side by Side (Half)
21 640*480p 62.938 / 63.00 59.94 / 60.00 50.35 / 50.40 Secondary Frame Packing,
22 640*480p 31.469 / 31.50 59.94 / 60.00 25.175 / 25.20 Secondary Top & Bottom
24 1280*720p 89.91 / 90.00 59.94 / 60.00 148.35 / 148.50 Line Alternative
25 1280*720p 44.96 / 45.00 59.94 / 60.00 148.35 / 148.50 Side by Side (Full)
26 1920*1080i 67.432 / 67.50 59.94 / 60.00 148.35 / 148.50 Field Alternative
27 1920*1080i 33.72 / 33.75 59.94 / 60.00 148.35 / 148.50 Side by Side (Full)
32 720*480p 62.938 / 63.00 59.94 / 60.00 54.00 / 54.054 16:9 Line Alternative
33 720*480p 31.469 / 31.50 59.94 / 60.00 54.00 / 54.054 16:9 Side by Side (Full)
34 720*480p 62.938 / 63.00 59.94 / 60.00 54.00 / 54.054 4:3 Line Alternative
35 720*480p 31.469 / 31.50 59.94 / 60.00 54.00 / 54.054 4:3 Side by Side (Full)
5.2.3. HDMI-PC Input (3D supported mode manually)

1 1024*768 48.363 60.004 65.000 Side by Side, Top & Bottom
Checkerboard, Single Frame Sequential
5.2.4. USB Input

5.2.4.1. USB Input (3D supported mode automatically)

1 1920*1080 33.75 30.000 74.25 HDTV 1080p Side by Side, Top & Bottom,
Checkerboard, MPO (Photo)
5.2.4.2. USB Input (3D supported mode manually)

1 1920*1080 33.75 30.000 74.25 HDTV 1080p Side by Side, Top & Bottom
Checkerboard, Single Frame Sequential,
(Photo : Side by Side, Top & Bottom)
5.2.5. DLNA Input
5.2.5.1. DLNA Input (3D supported mode automatically)

1 1920*1080 33.75 30.000 74.25 HDTV 1080p Side by Side, Top & Bottom,
Checkerboard, MPO (Photo)
5.2.5.2. DLNA Input (3D supported mode manually)

1 1920*1080 33.75 30.000 74.25 HDTV 1080p Side by Side, Top & Bottom
Checkerboard, Single Frame Sequential,
(Photo : Side by Side, Top & Bottom)
5.2.6. Component Input

1 1280*720 44.96 59.94 74.176 HDTV 720P Side by Side, Top & Bottom
2 1920*1080 33.75 60.00 74.25 HDTV 1080I Side by Side, Top & Bottom
3 1920*1080 33.72 59.94 74.176 HDTV 1080I Side by Side, Top & Bottom
4 1920*1080 67.500 60 148.50 HDTV 1080P Side by Side, Top & Bottom
● Remark: 3D Input mode
No Side by Side Top & Bottom Checkerboard Single Frame Frame Packing Line Interleaving Column Inter-
Sequential leaving
1 L R LLLLL R
L
R
L
Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
ADJUSTMENT INSTRUCTION
1. Application 4. MAIN PCBA Adjustments
This spec. sheet applies to EA34D Chassis applied LED TV all 4.1. ADC Calibration
models manufactured in TV factory - A n ADC calibration is not necessary because MAIN SoC
(LGExxxx) is already calibrated from IC Maker
- If it needs to adjust manually, refer to appendix.
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use 4.2. M AC Address, ESN Key and Widevine
an isolation transformer. However, the use of isolation
transformer will help protect test instrument. Key download
(2) Adjustment must be done in the correct order. 4.2.1. Equipment & Condition
(3) The adjustment must be performed in the circumstance of 1) Play file: keydownload.exe
25 ±5 ºC of temperature and 65±10% of relative humidity if
there is no specific designation 4.2.2. Communication Port connection
(4) The input voltage of the receiver must keep 100~240V, 1) Key Write: Com 1,2,3,4 and 115200 (Baudrate)
50/60Hz 2) Barcode: Com 1,2,3,4 and 9600 (Baudrate)
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over 4.2.3. Download process
15 ºC 1) Select the download items.
In case of keeping module is in the circumstance of 0°C, it 2) Mode check: Online Only
should be placed in the circumstance of above 15°C for 2 3) Check the test process
hours - U S, Canada models: DETECT -> MAC_WRITE ->
In case of keeping module is in the circumstance of below WIDEVINE_WRITE
-20°C, it should be placed in the circumstance of above - K orea, Mexico models: DETECT -> MAC_WRITE ->
15°C for 3 hours. WIDEVINE_WRITE
4) Play : START
※ Caution 5) Check of result: Ready, Test, OK or NG
When still image is displayed for a period of 20 minutes or 6) Printer out (MAC Address Label)
longer (especially where W/B scale is strong.
Digital pattern 13ch and/or Cross hatch pattern 09ch), there 4.2.4. Communication Port connection
can some afterimage in the black level area 1) Connect: PCBA Jig -> RS-232C Port == PC -> RS-232C
Port
3. Adjustment items
3.1. Main PCBA Adjustments
(1) ADC adjustment: Component 480i, 1080p
(2) EDID downloads for HDMI
※ Remark
- A bove adjustment items can be also performed in Final
Assembly if needed. Adjustment items in both PCBA and
final assembly tages can be checked by using the INSTART 4.2.5. Download
Menu -> 1.ADJUST CHECK 1) US, Canada models (13Y LCD TV + MAC + Widevine +
ESN Key + DTCP Key + HDCP1.4 and HDCP2.0)
3.2. Final assembly adjustment
(1) White Balance adjustment
(2) RS-232C functionality check
(3) Factory Option setting per destination
(4) Shipment mode setting (In-Stop)
(5) GND and HI-POT test
3.3. Appendix
(1)Tool option menu, USB Download (S/W Update, Option and
Service only)
(2) Manual adjustment for ADC calibration and White balance.
(3) Shipment conditions, Channel pre-set
4.2.6. Inspection
- In INSTART menu, check these keys.
4.3. LAN port Inspection (Ping Test) 4.4.4. EDID DATA(PCM)
4.3.1. Equipment setting (1)DTS
1) Play the LAN Port Test PROGRAM. # HDMI 1(C/S : E8 36)
2) Input IP set up for an inspection to Test Program. EDID Block 0, Bytes 0-127 [00H-7FH]
- IP number: 12.12.2.2
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
4.3.2. LAN PORT inspection (PING TEST)
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
1) Play the LAN Port Test Program.
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
2) Connect each other LAN Port Jack.
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
3) Play Test (F9) button and confirm OK Message.
4) Remove LAN CABLE
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------------
0 | 02 03 34 F1 48 90 22 20 05 04 03 02 01 29 3d 06
10 | C0 15 07 50 09 57 07 78 03 0C 00 10 00 B8 2D 20
20 | C0 0E 01 4F 00 FE 08 10 06 10 18 10 28 10 38 10
30 | E3 05 03 01 02 3A 80 18 71 38 2D 40 58 2C 45 00
40 | 40 84 63 00 00 1E 01 1D 80 18 71 1C 16 20 58 2C
50 | 25 00 40 84 63 00 00 9E 01 1D 00 72 51 D0 1E 20
60 | 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 36
# HDMI 2(C/S : E8 26)

EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
4.4. EDID Download 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
4.4.1 Overview 70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
▪ I t is a VESA regulation. A PC or a MNT will display an
optimal resolution through information sharing without any EDID Block 1, Bytes 128-255 [80H-FFH]
necessity of user input. It is a realization of “Plug and Play”.
0 1 2 3 4 5 6 7 8 9 A B C D E F
4.4.2 Equipment ---------------------------------------------------------------------------------
▪ Since embedded EDID data is used, EDID download JIG, 0 | 02 03 34 F1 48 90 22 20 05 04 03 02 01 29 3D 06
HDMI cable and D-sub cable are not need. 10 | C0 15 07 50 09 57 07 78 03 0C 00 20 00 B8 2D 20
▪ Adjust remocon 20 | C0 0E 01 4F 00 FE 08 10 06 10 18 10 28 10 38 10
30 | E3 05 03 01 02 3A 80 18 71 38 2D 40 58 2C 45 00
4.4.3 Download method 40 | 40 84 63 00 00 1E 01 1D 80 18 71 1C 16 20 58 2C
1) Press Adj. key on the Adj. R/C, 50 | 25 00 40 84 63 00 00 9E 01 1D 00 72 51 D0 1E 20
2) Select EDID D/L menu. 60 | 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00
3) By pressing Enter key, EDID download will begin 70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 26
4) If Download is successful, OK is display, but If Download is
failure, NG is displayed.
5) If Download is failure, Re-try downloads.
※ Caution) When EDID Download, must remove RGB/HDMI

Cable.
# HDMI 3(C/S : E8 16) (2)AC3
EDID Block 0, Bytes 0-127 [00H-7FH] # HDMI 1(C/S : E8 3F)
0 1 2 3 4 5 6 7 8 9 A B C D E F
--------------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 ---------------------------------------------------------------------------------
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
0 1 2 3 4 5 6 7 8 9 A B C D E F
--------------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 02 03 34 F1 48 90 22 20 05 04 03 02 01 29 3D 06 ---------------------------------------------------------------------------------
10 | C0 15 07 50 09 57 07 78 03 0C 00 30 00 B8 2D 20 0 | 02 03 31 f1 48 90 22 20 05 04 03 02 01 26 15 07
20 | C0 0E 01 4F 00 FE 08 10 06 10 18 10 28 10 38 10 10 | 50 09 57 07 78 03 0c 00 10 00 b8 2d 20 c0 0e 01
30 | E3 05 03 01 02 3A 80 18 71 38 2D 40 58 2C 45 00 20 | 4f 00 fe 08 10 06 10 18 10 28 10 38 10 e3 05 03
40 | 40 84 63 00 00 1E 01 1D 80 18 71 1C 16 20 58 2C 30 | 01 02 3a 80 18 71 38 2d 40 58 2c 45 00 40 84 63
50 | 25 00 40 84 63 00 00 9E 01 1D 00 72 51 D0 1E 20 40 | 00 00 1e 01 1d 80 18 71 1c 16 20 58 2c 25 00 40
60 | 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00 50 | 84 63 00 00 9e 01 1d 00 72 51 d0 1e 20 6e 28 55
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 16 60 | 00 40 84 63 00 00 1e 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 3f
# HDMI 4(C/S : E8 06)
EDID Block 0, Bytes 0-127 [00H-7FH] # HDMI 2(C/S : E8 2F)
0 1 2 3 4 5 6 7 8 9 A B C D E F
--------------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 ---------------------------------------------------------------------------------
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
0 1 2 3 4 5 6 7 8 9 A B C D E F
--------------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 02 03 34 F1 48 90 22 20 05 04 03 02 01 29 3D 06 ---------------------------------------------------------------------------------
10 | C0 15 07 50 09 57 07 78 03 0C 00 40 00 B8 2D 20 0 | 02 03 31 f1 48 90 22 20 05 04 03 02 01 26 15 07
20 | C0 0E 01 4F 00 FE 08 10 06 10 18 10 28 10 38 10 10 | 50 09 57 07 78 03 0c 00 20 00 b8 2d 20 c0 0e 01
30 | E3 05 03 01 02 3A 80 18 71 38 2D 40 58 2C 45 00 20 | 4f 00 fe 08 10 06 10 18 10 28 10 38 10 e3 05 03
40 | 40 84 63 00 00 1E 01 1D 80 18 71 1C 16 20 58 2C 30 | 01 02 3a 80 18 71 38 2d 40 58 2c 45 00 40 84 63
50 | 25 00 40 84 63 00 00 9E 01 1D 00 72 51 D0 1E 20 40 | 00 00 1e 01 1d 80 18 71 1c 16 20 58 2c 25 00 40
60 | 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00 50 | 84 63 00 00 9e 01 1d 00 72 51 d0 1e 20 6e 28 55
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 06 60 | 00 40 84 63 00 00 1e 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2f
# HDMI 3(C/S : E8 1F) (3)PCM
EDID Block 0, Bytes 0-127 [00H-7FH] # HDMI 1(C/S : E8 B1)
0 1 2 3 4 5 6 7 8 9 A B C D E F
--------------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 ---------------------------------------------------------------------------------
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
0 1 2 3 4 5 6 7 8 9 A B C D E F
--------------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 02 03 31 f1 48 90 22 20 05 04 03 02 01 26 15 07 ---------------------------------------------------------------------------------
10 | 50 09 57 07 78 03 0c 00 30 00 b8 2d 20 c0 0e 01 0 | 02 03 2e f1 48 90 22 20 05 04 03 02 01 23 09 57
20 | 4f 00 fe 08 10 06 10 18 10 28 10 38 10 e3 05 03 10 | 07 78 03 0c 00 10 00 b8 2d 20 c0 0e 01 4f 00 fe
30 | 01 02 3a 80 18 71 38 2d 40 58 2c 45 00 40 84 63 20 | 08 10 06 10 18 10 28 10 38 10 e3 05 03 01 02 3a
40 | 00 00 1e 01 1d 80 18 71 1c 16 20 58 2c 25 00 40 30 | 80 18 71 38 2d 40 58 2c 45 00 40 84 63 00 00 1e
50 | 84 63 00 00 9e 01 1d 00 72 51 d0 1e 20 6e 28 55 40 | 01 1d 80 18 71 1c 16 20 58 2c 25 00 40 84 63 00
60 | 00 40 84 63 00 00 1e 00 00 00 00 00 00 00 00 00 50 | 00 9e 01 1d 00 72 51 d0 1e 20 6e 28 55 00 40 84
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1f 60 | 63 00 00 1e 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b1
# HDMI 4(C/S : E8 0F)
EDID Block 0, Bytes 0-127 [00H-7FH] # HDMI 2(C/S : E8 A1)
0 1 2 3 4 5 6 7 8 9 A B C D E F
--------------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 ---------------------------------------------------------------------------------
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C 20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A 40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC 50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8 60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8
0 1 2 3 4 5 6 7 8 9 A B C D E F
--------------------------------------------------------------------------------- 0 1 2 3 4 5 6 7 8 9 A B C D E F
0 | 02 03 31 f1 48 90 22 20 05 04 03 02 01 26 15 07 ---------------------------------------------------------------------------------
10 | 50 09 57 07 78 03 0c 00 40 00 b8 2d 20 c0 0e 01 0 | 02 03 2e f1 48 90 22 20 05 04 03 02 01 23 09 57
20 | 4f 00 fe 08 10 06 10 18 10 28 10 38 10 e3 05 03 10 | 07 78 03 0c 00 20 00 b8 2d 20 c0 0e 01 4f 00 fe
30 | 01 02 3a 80 18 71 38 2d 40 58 2c 45 00 40 84 63 20 | 08 10 06 10 18 10 28 10 38 10 e3 05 03 01 02 3a
40 | 00 00 1e 01 1d 80 18 71 1c 16 20 58 2c 25 00 40 30 | 80 18 71 38 2d 40 58 2c 45 00 40 84 63 00 00 1e
50 | 84 63 00 00 9e 01 1d 00 72 51 d0 1e 20 6e 28 55 40 | 01 1d 80 18 71 1c 16 20 58 2c 25 00 40 84 63 00
60 | 00 40 84 63 00 00 1e 00 00 00 00 00 00 00 00 00 50 | 00 9e 01 1d 00 72 51 d0 1e 20 6e 28 55 00 40 84
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0f 60 | 63 00 00 1e 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 A1
# HDMI 3(C/S : E8 91)
5. Final Assembly Adjustment
5.1. White Balance Adjustment
0 1 2 3 4 5 6 7 8 9 A B C D E F 5.1.1. Overview
--------------------------------------------------------------------------------- 5.1.1.1. W/B adj. Objective & How-it-works
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 (1) Objective: To reduce each Panel’s W/B deviation
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 (2) How-it-works: When R/G/B gain in the OSD is at 192, it
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 means the panel is at its Full Dynamic Range. In order to
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C prevent saturation of Full Dynamic range and data, one of
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 R/G/B is fixed at 192, and the other two is lowered to find
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A the desired value.
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC (3) Adj. condition: normal temperature
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8 - Surrounding Temperature: 25±5 °C
- Warm-up time: About 5 Min
EDID Block 1, Bytes 128-255 [80H-FFH] - Surrounding Humidity: 20% ~ 80%
- Before White balance adjustment, Keep power on status,
0 1 2 3 4 5 6 7 8 9 A B C D E F don’t power off
---------------------------------------------------------------------------------
0 | 02 03 2e f1 48 90 22 20 05 04 03 02 01 23 09 57 5.1.1.2. Adj. condition and cautionary items
10 | 07 78 03 0c 00 30 00 b8 2d 20 c0 0e 01 4f 00 fe (1) Lighting condition in surrounding area surrounding lighting
20 | 08 10 06 10 18 10 28 10 38 10 e3 05 03 01 02 3a should be lower 10 lux. Try to isolate adj. area into dark
30 | 80 18 71 38 2d 40 58 2c 45 00 40 84 63 00 00 1e surrounding.
40 | 01 1d 80 18 71 1c 16 20 58 2c 25 00 40 84 63 00 (2) Probe location: Color Analyzer (CA-210) probe should be
50 | 00 9e 01 1d 00 72 51 d0 1e 20 6e 28 55 00 40 84 within 10cm and perpendicular of the module surface
60 | 63 00 00 1e 00 00 00 00 00 00 00 00 00 00 00 00 (80°~ 100°)
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 91 (3) Aging time
- A fter Aging Start, Keep the Power ON status during 5
# HDMI 4(C/S : E8 81) Minutes.
EDID Block 0, Bytes 0-127 [00H-7FH] - In case of LCD, Back-light on should be checked using no
signal or Full-white pattern.
0 1 2 3 4 5 6 7 8 9 A B C D E F
--------------------------------------------------------------------------------- 5.1.2. Equipment
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01 (1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
10 | 01 17 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 CH14 / OLED : CH : 17)
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 (2) A dj. Computer (During auto adj., RS-232C protocol is
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C needed)
40 | 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 (3) Adjust Remocon
50 | 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A (4) V ideo Signal Generator MSPG-925F 720p/204-Gray
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC (Model: 217, Pattern: 49)
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 E8 ※ Color Analyzer Matrix should be calibrated using CS-1000
0 1 2 3 4 5 6 7 8 9 A B C D E F
---------------------------------------------------------------------------------
0 | 02 03 2e f1 48 90 22 20 05 04 03 02 01 23 09 57
10 | 07 78 03 0c 00 40 00 b8 2d 20 c0 0e 01 4f 00 fe
20 | 08 10 06 10 18 10 28 10 38 10 e3 05 03 01 02 3a
30 | 80 18 71 38 2d 40 58 2c 45 00 40 84 63 00 00 1e
40 | 01 1d 80 18 71 1c 16 20 58 2c 25 00 40 84 63 00
50 | 00 9e 01 1d 00 72 51 d0 1e 20 6e 28 55 00 40 84
60 | 63 00 00 1e 00 00 00 00 00 00 00 00 00 00 00 00
70 | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 81
5.1.3. Equipment connection 5.1.5.2. OLED White balance table
(1) Cool Mode
-P urpose : Especially B-gain fix adjust leads to the
Color Analyzer luminance enhancement. Adjust the color temperature to
Probe RS-232C reduce the deviation of the module color temperature.
-P rinciple : To adjust the white balance without the
Computer
RS-232C
saturation, Adjust the B gain more than 192 ( If R gain or G
RS-232C gain is more than 255 , G gain can adjust less than 192 )
※
Pattern Generator
and change the others ( R/G Gain ).
Signal Source - Adjustment mode : mode – Cool
※If TV internal pattern is used, not needed
(2) Medium / Warm Mode
-P urpose : Adjust the color temperature to reduce the
5.1.4. Adjustment Command (Protocol) deviation of the module color temperature
(1) RS-232C Command used during auto-adj. -P rinciple : To adjust the white balance without the
saturation, Fix the B gain to 192 (default data) and
RS-232C COMMAND decrease the others
Explanation
CMD DATA ID - Adjustment mode : mode – Medium
Wb 00 00 Begin White Balance adj.
(3) Warm
Wb 00 ff End White Balance adj. -P urpose : Adjust the color temperature to reduce the
(internal pattern disappears ) deviation of the module color temperature.
(2) Adjustment Map saturation, Fix the W gain to 192 (default data) and
Adj. item Command Data Range decrease the others.
(lower caseASCII) (Hex.) - Adjustment mode : mode – Warm
CMD1 CMD2 MIN MAX
(4) THX(Warm)
Cool R Gain j g 00 C0 -P urpose : Adjust the color temperature to reduce the
G Gain j h 00 C0 deviation of the module color temperature.
B Gain j i 00 C0 saturation, Fix the W gain to 192 (default data) and
Medium R Gain j a 00 C0 decrease the others.
G Gain j b 00 C0 - Adjustment mode : mode – Warm
- Auto White balance 4 point
B Gain j c 00 C0 - Adjust 100 IRE White Balance
Warm R Gain j d 00 C0 - A djust Gamam 2.2 each IRE (60, 40, 20). Using max
G Gain j e 00 C0
luminance
- Complete 4 point gamma, W/B.
B Gain j f 00 C0
5.1.5. Adjustment method

5.1.5.1. Auto WB calibration
(1) Set TV in ADJ mode using P-ONLY key (or POWER ON
key)
(2) Place optical probe on the center of the display
- It need to check probe condition of zero calibration before
adjustment.
(3) Connect RS-232C Cable Picture is H 1/3, V 1/3
(4) Select mode in ADJ Program and begin a adjustment. fixed Center Window size
(5) When WB adjustment is completed with OK message, Outer Black Picture do not need change Contrast / Brightness
check adjustment status of pre-set mode (Cool, Medium, Center Level can change Contrast / Bright
Warm) Window pattern of Center 0~255 level
(6) Remove probe and RS-232C cable.
▪ W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need
5.1.6. Reference (White Balance Adj. coordinate and 5.3. Magic Motion remote controller Check
color temperature) 5.3.1. Test equipment
(1) Luminance: 204 Gray, 80IRE ▪ R F-remote controller for check, IR-KEY-CODE remote
(2) Standard color coordinate and temperature using CS-1000 controller.
(over 26 inch) ▪ Check AA battery before test. A recommendation is that a
tester change battery every lots.
5.1.7. Reference (White Balance Adj. coordinate and
color temperature) 5.3.2. Test
▪ Luminance: 204 Gray (1) Make pairing with TV set by pressing “Start key(Wheel
▪ Standard color coordinate and temperature using CS-1000 key)” on RCU.
(over 26 inch) (2) Check a cursor on screen by pressing ‘Wheel key” of RCU
(3) Stop paring with TV set by pressing “Back+ Home” key of
Coordinate
Mode Temp △uv RCU
X Y
Cool 0.271 0.270 13,000K 0.0000 5.3.3. Applied models
Medium 0.285 0.293 9,300K 0.0000 Chassis Model Name Magic RF receiver
Warm 0.313 0.329 6,500K 0.0000 EA34D 55EA8800-UA Built-in
55EA9800-UA
▪ S tandard color coordinate and temperature using
CA-210(CH-14)
5.4. Wi-Fi MAC Address Check
Coordinate
Mode Temp △uv 5.4.1. Using RS232 Command
X Y
Command Set ACK
Cool 0.271±0.002 0.270±0.002 13,000K 0.0000
Transmission [A][l][][Set ID][][20][Cr] [O][K][x] or [N][G]
Medium 0.285±0.002 0.293±0.002 9,300K 0.0000
Warm 0.313±0.002 0.329±0.002 6,500K 0.0000 5.4.2. Check the menu on in-start
▪ S tandard color coordinate and temperature using
CA-210(CH-14) – by aging time
5.2. Tool Option setting & Inspection per

countries
5.2.1. Overview
(1) Tool option selection is only done for models in Non-USA
North America due to rating
(2) Applied model: EA34D Chassis applied to CANADA and
MEXICO
5.2.2. Country Group selection

(1) Press ADJ key on the Adj. R/C, and then select Country
Group Menu
(2) Depending on destination, select US, then on the lower
Country option, select US, CA, MX.
Selection is done using +, - KEY
5.2.3. Tool Option inspection

▪ Press Adj. key on the Adj. R/C, then select Tool option
Model Tool 1 Tool 2 Tool 3 Tool 4 Tool 5 Tool 6 Tool 7
55EA9800-UA 32791 21777 5085 61837 55446 1432 47147
※ Tool option can be reconstructed by Software
5.5. 3D pattern test (Only for 3D models) 5.6. HDMI ARC Function Inspection
5.5.1. Test equipment 5.6.1. Test equipment
(1) Pattern Generator MSHG-600 or MSPG-6100 (HDMI 1.4 - Optic Receiver Speaker
support) - MSHG-600 (SW: 1220 ↑)
(2) Pattern: HDMI mode (model No. 872, pattern No. 83) - HDMI Cable (for 1.4 version)
5.5.2. Test method 5.6.2. Test method

(1) Input 3D test signal as Fig.1. (1) Insert the HDMI Cable to the HDMI ARC port from the
master equipment (HDMI1)
(2) Check the sound from the TV Set

(2) Press ‘OK” key as a 3D input OSD is shown.
(3) C heck pattern as Fig2 without 3D glasses. (3D mode
without 3D glasses)
(3) Check the Sound from the Speaker or using AV & Optic
TEST program (It’s connected to MSHG-600)
Fig.2
<OK in 3D mode without 3D glasses>
* Remark: Inspect in Power Only Mode and check SW version

in a master equipment
Fig.3
<NG in 3D mode without 3D glasses>
5.7. PIP/ W&R Function Inspection 6.3. Audio Output Inspection
(1) I N P U T C H E C K – S K E Y O F A D J U S T R E M O T E
CONTROLLER TO INSPECT SPEAKER
(2) When you click the first, the output volume of left & right
main speakers must be 50
(3) When you click the second, the output volume of left & right
main speakers must be 80.
(1) Objective : To check the connection between sub tuner and
PCBA, and their Function
(2) Test Method : This Inspection is available only Power-Only
Status. (4) When you click the third, the output volume of left & right
1) Press exit key of the Adj. R/C and Press PIP key. main speakers must be 100.
2) C
heck that the SUB TUNER pop up window on the TV
Set.
3) C
heck that the normal operation (picture, sound) of DTV
on the TV Set.
5.8. Ship-out mode check (In-stop) (5) When you click the fourth, the output volume of left main
▪ After final inspection, press In-Stop key of the Adj. R/C and
check that the unit goes to Stand-by mode speaker must be 50.
6. AUDIO output check

6.1. Audio input condition (6) When you click the fifth, the output volume of right main
(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation
speaker must be 50.
(2) CVBS, Component: 1KHz sine wave signal (0.4Vrms)
(3) RGB PC: 1KHz sine wave signal (0.7Vrms)
6.2. Specification
No Item Min Typ Max Unit Remark
(7) When you click the sixth, the output volume of left sub
1 Audio 9.0 10.0 12.0 W (1) Measurement speaker must be 100.
practical 8.5 8.9 9.9 Vrms condition
max Output, -E Q/AVL/Clear
L/R Voice: Off
(Distor- (2) Speaker (8Ω
tion=10% Impedance)
max Output) (8) When you click the seventh, the output volume of right sub
speaker must be 100.
(9) W hen you click the eighth, the output volume of all
speakers (left & right main speaker and left & right sub
speaker) must be 30.
7. Soft Touch Key Check 8. EYE Q Green Inspection
- Before you start a test, you must run a ‘Power Only Mode’. (1) Turn on TV
AFTER Touch SOFT TOUCH KEY OF SET, LOCAL KEY (2) Press EYE key of Adj. R/C
CHECK DISPLAY WILL START
(1) Tab Test : Touch SOFT TOUCH KEY OF SET quickly
(3) Cover the Eye Q sensor on the front of the using your hand
and wait for 6 seconds
(2) Left Test : Touch SOFT TOUCH KEY OF SET to the left
side.
(4) Confirm that value is lower than 100 of the “Raw Data
(Sensor data, Back light )” If after 6 seconds, value is not
lower than 100, replace Eye Q sensor
(3) Right Test : Touch SOFT TOUCH KEY OF SET to the right
side
(5) Remove your hand from the Eye Q sensor and wait for 6
seconds
(4) Long Tab Test : Touch SOFT TOUCH KEY OF SET long.
(6) Confirm that “ok” pop up. If change is not seen, replace
Eye Q sensor
- Don’t need to run a test with this sequence. For example, the
sequence such as ‘Right → Tab → Long Tab → Left’ is
allowed.
9. GND and HI-POT Test 10. USB S/W Download
9.1. GND & HI-POT auto-check preparation (optional, Service only)
(1) Check the POWER CABLE and SIGNAL CABE insertion (1) Put the USB Stick to the USB socket
condition (2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is lower
9.2. GND & HI-POT auto-check than that of TV set, it didn’t work. Otherwise USB data is
(1) Pallet moves in the station. (POWER CORD / AV CORD is automatically detected.
tightly inserted) (3) Show the message “Copying files from memory”
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) GND Test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, execute next process (Hi-pot test).
(Remove A/V CORD from A/V JACK BOX)
(5) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next process
automatically.
9.3. Checkpoint
(1) Test voltage (4) Updating is staring
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = POWER CORD GND and SIGNAL CABLE GND.
- Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms
(5) Updating Completed, The TV will restart automatically
(6) If your TV is turned on, check your updated version and
Tool option.
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. If all channel data is cleared, you didn’t have a DTV/
ATV test on production line.
* After downloading, TOOL OPTION setting is needed again.

(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each model has their number.)
11. Optional adjustments 11.2. Manual White balance Adjustment
11.1. Manual ADC Calibration 11.2.1. Adj. condition and cautionary items
(1) Lighting condition in surrounding area surrounding lighting
11.1.1. Equipment & Condition should be lower 10 lux. Try to isolate adj. area into dark
(1) Adjustment Remocon
surrounding.
(2) 8
01GF (802B, 802F, 802R) or MSPG925FA Pattern
(2) Probe location: Color Analyzer (CA-210) probe should be
Generator
within 10cm and perpendicular of the module surface
-R esolution: 480i Comp1 (MSPG-925FA: model-209,
(80°~ 100°)
pattern-65)
(3) Aging time
- R esolution: 1080p Comp1 (MSPG-925FA: model-225,
- A fter Aging Start, Keep the Power ON status during 5
pattern-65)
Minutes.
- R esolution : 1080p RGB (MSPG-925FA: model-225,
- In case of LCD, Back-light on should be checked using no
pattern-65)
signal or Full-white pattern
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level: 0.7±0.1 Vp-p
11.2.2. Equipment
(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
11.1.2. Equipment & Condition CH14/ OLED : CH17)
11.1.2.1. ADC 480i/1080p Comp
(2) A dj. Computer (During auto adj., RS-232C protocol is
(1) C heck connected condition of Comp cable to the
needed)
equipment
(3) Adjust Remocon
(2) G ive a 480i Mode, Horizontal 100% Color Bar Pattern to
(4) V ideo Signal Generator MSPG-925F 720p/216-Gray
Comp1. (MSPG-925FA → Model: 209, Pattern: 65)
(Model: 217, Pattern: 78)
(3) C hange input mode as Component1 and picture mode as
“Standard”
(4) P ress the In-start Key on the ADJ remote after at least 1 11.2.3. Adjustment
min of signal reception. Then, select 7.External ADC. And (1) Set TV in Adj. mode using POWER ON
Press OK or Right Button for going to sub menu. (2) Zero Calibrate the probe of Color Analyzer, then place it on
(5) Press OK in Comp 480i menu the center of LCD module within 10cm of the surface.
(6) G ive a 1080p Mode, Horizontal 100% Color Bar Pattern to (3) Press ADJ key → EZ adjust using adj. R/C → 6. White-
Comp1. (MSPG-925FA → Model: 225, Pattern: 65) Balance then press the cursor to the right (KEY►).
(7) Press OK in Comp 1080p menu W
hen KEY(►) is pressed 216 Gray internal pattern will be
(8) If ADC Comp is successful, “ADC Component Success” is displayed.
displayed. If ADC calibration is failure, “ADC Component (4) One of R Gain / G Gain / B Gain should be fixed at 192,
Fail” is displayed. and the rest will be lowered to meet the desired value.
(10) If ADC calibration is failure, after rechecking ADC pattern (5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of
or condition, retry calibration color temperature.
(11) If ADC calibration is failure, after recheck ADC pattern or
condition, retry calibration ▪ If internal pattern is not available, use RF input. In EZ Adj.
menu 6.White Balance, you can select one of 2 Test-pattern:
ON, OFF. Default is inner(ON). By selecting OFF, you can
adjust using RF signal in 216 Gray pattern.
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
700
900
710
914
400
913
912
521
522
570
121
911
571
540
LV1 LV2
610
120
530
600
580
CAM1
561 560
AT1
AV1
501 500
200
AG1
CA1
A22
310
A2
System Configuration
EEPROM_ST
IC102-*1
Clock for LG1154D NVRAM +3.3V_NORMAL
M24256-BRMN6TP
E0 VCC
1 8
MAIN Clock(24Mhz) E1
2 7
WC
EEPROM_RENESAS
X-TAL_1
IC102 C103
10pF E2 SCL
GND_1
3 6
XIN_MAIN R1EX24256BSAS0A 0.1uF Write Protection
C100 VSS
4 5
SDA
- Low : Normal Operation

A0 VCC
R108
2
1 8 - High : Write Protection

24MHz
X100
1M
A1 WP
2 7
3
4
X-TAL_2
GND_2
10pF A2
3 A0’h 6
SCL
R139 33
XO_MAIN I2C_SCL5
C101
VSS SDA
4 5 R140 33 I2C_SDA5
System Clock for Analog block(24Mhz)
EB_ADDR[0-14]
EMMC_DATA[0-7]
EB_DATA[0-7]
EPHY_REFCLK
EPHY_CRS_DV
EPHY_MDIO
EPHY_TXD0
EPHY_RXD1
EPHY_RXD0
EPHY_TXD1
EPHY_MDC
/USB_OCD3
EPHY_EN
/USB_OCD2
USB_CTL3
USB_CTL2
EMMC_CLK
EMMC_CMD
EMMC_RST
PLL SET[1:0] : internal pull up
EB_ADDR[14]
EB_ADDR[13]
EB_ADDR[12]
EB_ADDR[11]
EB_ADDR[10]
EB_ADDR[9]
EB_ADDR[8]
EB_ADDR[7]
EB_ADDR[6]
EB_ADDR[5]
EB_ADDR[4]
EB_ADDR[3]
EB_ADDR[2]
EB_ADDR[1]
EB_ADDR[0]
EB_DATA[7]
EB_DATA[6]
EB_DATA[5]
EB_DATA[4]
EB_DATA[3]
EB_DATA[2]
EB_DATA[1]
EB_DATA[0]
EMMC_DATA[7]
EMMC_DATA[6]
EMMC_DATA[5]
EMMC_DATA[4]
EMMC_DATA[3]
EMMC_DATA[2]
EMMC_DATA[1]
EMMC_DATA[0]
"00" : CPU(1200Mhz),M0 / M1 DDR(792,792 Mhz)
EB_BE_N1
EB_BE_N0
EB_WE_N
EB_OE_N
"01" : CPU(1056Mhz),M0 / M1 DDR(672,672 Mhz)
"10" : CPU(1056Mhz),M0 / M1 DDR(792,792 Mhz)
"11" : CPU( 960Mhz),M0 / M1 DDR(792,792 Mhz)
OPT
R100 33
PLLSET1
R101 33
PLLSET0
AU11
AR10
AT10
AU10
AT11
AR11
OPT OP MODE[1:0]
K35
K36
K37
L35
H35
H36
J35
J36
H37
G37
G36
G35
F36
F35
E36
E37
E35
D37
D36
D35
C36
C35
B37
B36
B35
C32
B33
A33
C33
A34
B34
C34
A36
Y37
Y36
W35
T36
W36
V35
V37
V36
U35
U36
U37
AU8
AT8
AR8
"00" : Normal Mode
"01/10/11" : Internal Test mode
EB_CS3/GPIO93
EB_CS2/GPIO92
EB_CS1/GPIO91
EB_CS0/GPIO90
EB_WE_N/GPIO95
EB_BE_N1/GPIO81
EB_WAIT/GPIO94
EB_OE_N/GPIO82
EB_BE_N0/GPIO80
EB_ADDR15/GPIO89
EB_ADDR14/GPIO88
EB_ADDR13/GPIO103
EB_ADDR12/GPIO102
EB_ADDR11/GPIO101
EB_ADDR10/GPIO100
EB_ADDR9/GPIO99
EB_ADDR8/GPIO98
EB_ADDR7/GPIO97
EB_ADDR6/GPIO96
EB_ADDR5/GPIO111
EB_ADDR4/GPIO110
EB_ADDR3/GPIO109
EB_ADDR2/GPIO108
EB_ADDR1/GPIO107
EB_ADDR0/GPIO106
EB_DATA7/GPIO105
EB_DATA6/GPIO104
EB_DATA5/GPIO119
EB_DATA4/GPIO118
EB_DATA3/GPIO117
EB_DATA2/GPIO116
EB_DATA1/GPIO115
EB_DATA0/GPIO114
EMMC_CLK
EMMC_CMD
EMMC_RESETN
EMMC_DATA7
EMMC_DATA6
EMMC_DATA5
EMMC_DATA4
EMMC_DATA3
EMMC_DATA2
EMMC_DATA1
EMMC_DATA0
RMII_REF_CLK
RMII_CRS_DV
RMII_MDIO
RMII_MDC
RMII_TXEN
RMII_TXD1
RMII_TXD0
RMII_RXD1
RMII_RXD0
+3.3V_NORMAL
OPT
R133 33
OPM1 A26 AL34
R134 33 XIN_MAIN XIN GPIO31 CAM_SLIDE_DET
OPM0 R152 560 B26 AM33
OPT XO_MAIN XOUT GPIO30
AM32
GPIO29
AF30
GPIO28
B27 AN34 +3.3V_NORMAL
XTAL_BYPASS GPIO27 /RST_PHY
AT37 AK34
H13DA_XTAL GPIO26 RF_SWITCH_CTL
+3.3V_NORMAL +3.3V_NORMAL
GPIO25
AL33 For ISP
3.3K
AL32 SW100
R103
GPIO24
DEBUG
INSTANT boot MODE AR9 JTP-1127WEM
BOOT MODE GPIO23/UART2_TX UART2_TX
"1 : Instant boot AU16 AM5 2 1
3.3K
3.3K
"0 : EMMC SOC_RESET UART2_RX

R117
PORES_N GPIO22/UART2_RX
R150
"0 : normal "1 : TEST MODE AM6

AMP_RESET_N
OPT
OPT
GPIO21
(internal pull down) AD34 AM7 4 3
OPM1 OPM1 GPIO20
AD33 AL6
INSTANT_BOOT BOOT_MODE OPM0 OPM0 GPIO19 INSTANT_BOOT
AK7
3.3K
GPIO18 DEBUG
R118
AT26 AK6
H13A_SCL H13DA_SCL GPIO17 SC_DET local dimming
AU26 AK5
H13A_SDA H13DA_SDA GPIO16 AV1_CVBS_DET I2C port
AJ5
GPIO15
AP9 AJ6
TRST_N0 TRST_N0 GPIO14 COMP1_DET
AN9 AJ7
TMS0 TMS0 GPIO13 M_RFModule_RESET
INSTANT_MODE0 BOOT_MODE0 AP11 AH6
TCK0 TCK0 GPIO12 HP_DET
AN11 AG7
TDI0 TDI0 GPIO11 FRC_RESET
AN10 AG6
TDO0 TDO0 GPIO10 /TU_RESET1
AM10 AG5
TRST_N1 GPIO9 /S2_RESET
AM9 AF5
Jtag I/F For Main AM11
TMS1 GPIO8
AH30
VCOM_DYN
PMIC_RESET
TCK1 GPIO7
AM12 AG30
TDI1 GPIO6 /RST_HUB
AL11 AN33
TDO1 GPIO5 FE_LNA_Ctrl2
AL9 AK33
PLLSET1 /TU_RESET2
IC100
PLLSET1 GPIO4
AL10 AE30
PLLSET0 PLLSET0 GPIO3 HDMI_S/W_RESET
AE34 AD30
BOOT_MODE BOOT_MODE GPIO2
AN32
GPIO1 FE_LNA_Ctrl1
R149 33 Y33 AK32
TP101 TRST_N0 EXT_INTR3/GPIO70 GPIO0 HDMI_INT
W32
EPHY_INT +3.3V_NORMAL
LG1154D_H13D
EXT_INTR2/GPIO69
TP102 TDI0 R151 33 W33 AC32 R169 3.3K
EXT_INTR1/GPIO68 DDCD0_CK
1/16W
W34 AC33
R164
TP103 TDO0 R174 33 R170 3.3K

EXT_INTR0/GPIO67 DDCD0_DA
AB33
33
5%
TP104 TMS0 HPD0

AU12
TP105 TCK0 SOC_RX UART0_RXD
AT12 AE37
SOC_TX UART0_TXD PHY0_ARC_OUT_0 SPDIF_OUT_ARC
TP106 SOC_RESET AU13 AC36
M_REMOTE_RX UART1_RXD PHY0_RX0N_0 HDMI_RX0-
C106 AT13 AC37
M_REMOTE_TX UART1_TXD PHY0_RX0P_0 HDMI_RX0+
+3.3V_NORMAL 33pF AP12 AB36
50V M_REMOTE_RTS UART1_RTS PHY0_RX1N_0 HDMI_RX1-
M_REMOTE_CTS AR12 AB37
TP108 UART1_CTS PHY0_RX1P_0 HDMI_RX1+
AA36
TP109
PHY0_RX2N_0 HDMI_RX2-
AE35 AA37
TP100 IRB_SPI_SS IRB_SPI_SS SPI_CS0/GPIO36 PHY0_RX2P_0 HDMI_RX2+
AE36 AD36
TP107 IRB_SPI_MOSI IRB_SPI_MOSI SPI_DO0/GPIO38 PHY0_RXCN_0 HDMI_CLK-
AF36 AD37
TP110 IRB_SPI_MISO IRB_SPI_MISO SPI_DI0/GPIO39 PHY0_RXCP_0 HDMI_CLK+
TP111 IRB_SPI_CK AF35
IRB_SPI_CK SPI_SCLK0/GPIO37
AG34 R32
SPI_CS1 HUB_PORT_OVER0 /USB_OCD1
AF33
SPI_DO1
HIGH LOW AG33 R33
SPI_DI1 HUB_VBUS_CTRL0 USB_CTL1
AG32
MODEL_OPT_0 Area1 Taiwan non Taiwan SPI_SCLK1
Model Option+3.3V_NORMAL MODEL_OPT_1 FRC FRC(120Hz) No FRC(60Hz) AR15
I2C_SCL1 SCL0/GPIO66
AP15
MODEL_OPT_2 Panel FHD UD I2C_SDA1 SDA0/GPIO65
AR16
I2C_SCL_MICOM_SOC SCL1/GPIO64
MODEL_OPT_3 OLED OLED NON OLED AP16
I2C_SDA_MICOM_SOC SDA1/GPIO79
INTERNAL_FRC
DVB_T2_TUNER
AP17
DVB_S_TUNER
10K
V13_MODULE
MODEL_OPT_4 Module V13 V12 I2C_SCL2_SOC SCL2/GPIO78

10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
AR17
TAIWAN
CP_BOX
EPI
AJ_JA
I2C_SDA2_SOC SDA2/GPIO77
OLED
FHD
OPT
MODEL_OPT_5 Reserved Default AP6

I2C_SCL4 SCL3
R131
AR6
R112
R114
R116
R120
R122
R124
R126
R128
R129
I2C_SDA4
R110
CP BOX Enable Disable SDA3

CAM_IOIS16_N/GPIO83
MODEL_OPT_6 AH32
CAM_VCCEN_N/GPIO87
SC_VCC_SEL/GPIO128
I2C_SCL5
CAM_IREQ_N/GPIO73
CAM_INPACK/GPIO74
CAM_WAIT_N/GPIO84
SC_DETECT/GPIO133
SCL4
AJ33
CAM_CD1_N/GPIO76
CAM_CD2_N/GPIO75
CAM_VS1_N/GPIO86
CAM_VS2_N/GPIO85
CAM_REG_N/GPIO72
SC_VCCEN/GPIO129
SD_DATA3/GPIO121
SD_DATA2/GPIO120
SD_DATA1/GPIO135
MODEL_OPT_7 SD_DATA0/GPIO134
T2 Tuner Support Not Support
SC_DATA/GPIO132
SD_CD_N/GPIO123
SD_WP_N/GPIO122
USB3_REFPADCLKM
USB3_REFPADCLKP
HW_OPT_0 I2C_SDA5 SDA4
SC_CLK/GPIO130
SC_RST/GPIO131
SD_CLK/GPIO125
SD_CMD/GPIO124
USB2_2_TXRTUNE
USB2_1_TXRTUNE
USB2_0_TXRTUNE
AREA option1 AH34
HW_OPT_1 MODEL_OPT_8 I2C_SCL6 SCL5
S Tuner Support Not Support AH33
USB3_RESREF
FRC option I2C_SDA6 SDA5
USB2_2_DP0
USB2_2_DM0
USB2_1_DP0
USB2_1_DM0
CAM_CE1_N
CAM_CE2_N
CAM_RESET
USB2_0_DP
USB2_0_DM
USB3_RX0P
USB3_RX0M
USB3_TX0P
USB3_TX0M
HW_OPT_2
USB3_DP0
USB3_DM0
MODEL_OPT_9 Area2 AJ_JA non AJ_JA
GPIO136
GPIO137
GPIO138
GPIO139
Pannel Resol
HW_OPT_3
MODEL_OPT_10
NC_1
NC_2
NC_3
NC_4
OLED option EPI Support Not Support
HW_OPT_4
EPI PANEL version
F33
F34
D32
E32
G32
G33
F32
G34
D33
H32
E33
D34
H33
T33
U33
T32
V32
V33
V34
A25
C25
B25
E25
D25
E24
D24
C24
L37
L36
K34
M37
M36
K33
AU7
AT7
AP7
P37
P36
N36
N37
R36
R37
N34
P33
P32
L32
L33
M31
AJ31
J32
J33
K32
J34
HW_OPT_5
reserved 33 R105
HW_OPT_6 I2C_SDA_MICOM I2C_SDA_MICOM_SOC
33 R106
CP BOX +3.3V_TU +3.3V_TU I2C_SCL_MICOM I2C_SCL_MICOM_SOC
HW_OPT_7 Debug
200 1%
+3.3V_NORMAL +3.3V_NORMAL
T2 support 33 R102
0.1uF
0.1uF
I2C_SDA2 I2C_SDA2_SOC
I2C PULL UP 33
TP112
HW_OPT_8 R104
200 1%
I2C_SCL2 I2C_SCL2_SOC
R159 200 1%
satellite support
R157 200 1%
KR_PIP_NOT
R162
+3.3V_NORMAL P101
KR_PIP_NOT
HW_OPT_9
C104
C105
AREA option2
R136
3.3K
R137
3.3K
R138
3.3K
R141
3.3K
R142
3.3K
R143
3.3K
R144
3.3K
R145
3.3K
R146
3.3K
R147
3.3K
R148
3.3K
R135
3.3K
12507WS-04L
USB2_HUB_IC_IN_DP
USB2_HUB_IC_IN_DM
USB_DP2
USB_DM2
WIFI_DP
WIFI_DM
/PCM_CE1
CAM_CD1_N
CAM_CD2_N
CAM_IREQ_N
CAM_INPACK_N
PCM_5V_CTL
CAM_WAIT_N
CAM_REG_N
/PCM_CE2
PCM_RESET
SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]
HW_OPT_10
R161
EPI selection
R165
3.3K
IR_B_RESET
I2C_SDA1
SMARTCARD_CLK/SD_EMMC_DATA[0]
SMARTCARD_DET/SD_EMMC_DATA[3]
SMARTCARD_RST/SD_EMMC_DATA[2]
1
NON_DVB_T2_TUNER
IR_B_RESET
I2C_SCL1
NON_DVB_S_TUNER
SMARTCARD_DATA/SD_EMMC_CLK
10K
DEBUG
SMARTCARD_VCC/SD_EMMC_CMD
I2C_SDA_MICOM_SOC
10K
R135-*1 1.5K
Only SMART CARD

10K
NON_EPI
10K
10K
10K
10K
10K
10K
NON_AJ_JA
R136-*1 1.5K
NON_TAIWAN
10K
10K
V12_MODULE
NON_CP_BOX
I2C_SCL_MICOM_SOC
NON_OLED
R111NO_FRC
+3.3V_NORMAL UART2_RX 2
interface
I2C_SDA2_SOC
UD
KR_PIP
KR_PIP
R154
USB3_DP
USB3_DM
USB3_RX0P
USB3_RX0M
USB3_TX0P
USB3_TX0M
I2C_SCL2_SOC
R132
R153
R155
10K
R115
CI
10K
10K
R130
R109
R119
R121
R123
R125
R127
R113
CI
I2C_SDA4 3
CI
I2C for tuner AC-coupling CAP

I2C_SCL4
Place near by LG1154D
I2C_SDA5 4
UART2_TX
I2C_SCL5
I2C_SDA6 5
I2C_SCL6 I2C for tuner
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES BSD-NC4_H001-HD

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 2012-11-14
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. H13 D CHIP
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.

Only for training and service purposes LGE Internal Use Only
LG1154A LG1154D
LG1154A
IC100
H13A_NON_BRAZIL LG1154D_H13D IC100
IC101
+3.3V_Bypass Cap +0.75V
VREF_M0_0
LG1154D_H13D
A27 Y5
LG1154AN_H13A VREF_M0_1 B5
GND_1
GND_2
GND_185
GND_186
Y8
AVDD33 A24 N21 C5 Y12

+3.3V_NORMAL
AVDD33 (2) +3.3V_NORMAL +3.3V_NORMAL +1.1V_Bypass Cap VREF_M1_0
A4
M0_DDR_VREF1
M0_DDR_VREF2
VDDC11_1
VDDC11_2
N22
+1.1V C26
C27
D5
GND_3
GND_4
GND_5
GND_187
GND_188
GND_189
Y13
Y14
Y15
GND_6 GND_190
AVDD33_XTAL(1) AVDD33_CVBS(2) VREF_M1_1 A2 N23 D26
GND_7 GND_191
Y16
Y17
E11 H14 M1_DDR_VREF1 VDDC11_3 E5
GND_8 GND_192
VDD33_1 +1.1V_VDD Y1 P15 E6 Y18

GND_30 L209 L216 M1_DDR_VREF2 VDDC11_4 E7
GND_9 GND_193
Y19
F5 J4 BLM18PG121SN1D L222 VDDC11_XTAL P16 E8
GND_10 GND_194
Y20
VDD33_2 GND_31 BLM18PG121SN1D BLM18PG121SN1D GND_11 GND_195
Y21
F6 J5 VDD25_XTAL VDDC11_5 E22
GND_12 GND_196
VDD33_3 P26 P17 E23 Y22

GND_32
0.1uF
0.1uF
GND_13 GND_197
Y23
XTAL_VDD
0.1uF
F11 J6 VDDC11_6 E26
GND_14 GND_198
C2414.7uF
N26 P18
C2554.7uF
F7 Y24
C2794.7uF
VDD33_4 GND_33 XTAL_VDDP VDDC11_7 F8
GND_15 GND_199
Y25
G5 J8 R15 F22
GND_16 GND_200
Y26
+3.3V
0.1uF
VDD33_5 GND_34 VDDC11_8 F23
GND_17 GND_201
Y31
H13 J9 +1.1V_VDD GND_18 GND_202
C2974.7uF
M21 T15
C3514.7uF
F24 Y35
VDD33_6 GND_35 VDD33_1 VDDC11_9 F25
GND_19 GND_203
AA8
J13 J10 VDD33
C218
C259
GND_20 GND_204
Y30 T22
C283
F26 AA12
VDD33_7 GND_36 VDD33_2 VDDC11_10 F27
GND_21 GND_205
AA13
P12 J11 AA30 T23 F31
GND_22 GND_206
AA14
VDD33_8 GND_37 VDD33_3 VDDC11_11 G7
GND_23 GND_207
AA16
C300
P13 J14 AE8 T24 G8
GND_24 GND_208
AA17
VDD33_9 GND_38 VDD33_4 VDDC11_12 G9
GND_25 GND_209
AA18
R5 K4 AF8 U15 G10
GND_26 GND_210
AA19
AVDD33_XTAL VDD33_10 GND_39 GND_27 GND_211
AA20
AVDD33_CVBS R6 K5 VDD33_5 VDDC11_13 G11
GND_28 GND_212
VDD33_11 AK13 U22 G12 AA21

GND_40 VDD33_6 VDDC11_14 G13
GND_29 GND_213
AA22
N16 K6 AK24 U23 G14
GND_30 GND_214
AA23
VDD33_XTAL GND_41 VDD33_7 VDDC11_15 G15
GND_31 GND_215
AA24
T13 K8 AK25 U24 G16
GND_32 GND_216
AA25
AVDD33_CVBS_1 GND_42 VDD33_8 VDDC11_16 G17
GND_33 GND_217
AA26
AVDD25 T14 K9 V15 G18
GND_34 GND_218
AA31
AVDD33_CVBS_2 GND_43 VDDC11_17 G19
GND_35 GND_219
AB6
K10 M22 V22 G20
GND_36 GND_220
AB8
GND_44 AVDD33_USB_1 VDDC11_18 G21
GND_37 GND_221
AB12
N10
N11
VDD25_CVBS_1 GND_45
K11
K13
+2.5V_Bypass Cap M23
AVDD33_USB_2 VDDC11_19
V23 G22
G23
GND_38
GND_39
GND_40
GND_222
GND_223
GND_224
AB13
AB16
VDD25_CVBS_2 +1.1V_VDD AK11 V24 G24 AB17

GND_46 AVDD33_BT_USB_1 VDDC11_20 G25
GND_41 GND_225
AB18
VDD25_REF N12 K14 AFE 3CH Power AK12 W22 G26
GND_42 GND_226
AB19
VDD25_VSB_1 GND_47 VDDC11_XTAL GND_43 GND_227
AB20
N13 L1 AVDD33_BT_USB_2 VDDC11_21 G27
GND_44 GND_228
AF25 W23 G28 AB21
VDD25_VSB_2 GND_48 L227 AVDD33_HDMI_1 VDDC11_22 G29
GND_45 GND_229
AB22
U5 L2 +2.5V_Normal AVDD25 VDD25_REF AF26 W24 G30
GND_46 GND_230
AB23
VDD25_REF GND_49 BLM18PG121SN1D GND_47 GND_231
AB25
N7 L3 AVDD33_HDMI_2 VDDC11_23 G31
GND_48 GND_232
VDD25_COMP_1 L225 AB15 H9 AB26
0.1uF
GND_50 GND_49 GND_233
C298 4.7uF
H26 AB30
N8 L4 L220 VDDC11_24 GND_50 GND_234
VDD25_LTX VDD25_COMP_2 GND_51 BLM18PG121SN1D
BLM15BD121SN1 +2.5V VDDC11_25
AB24 H27
H28
GND_51 GND_235
AB31
AC8
N9 L5 R31 AC15 H29
GND_52 GND_236
AC12
0.1uF
VDD25_AUD VDD25_COMP_3 GND_52 GND_53 GND_237
0.1uF
AC13
F14 L6 VDD25_LVDS SP_VQPS VDDC11_26 H30
GND_54 GND_238
AC24 H31 AC16
C2704.7uF
C2424.7uF
C2114.7uF
VDD25_APLL GND_53 VDDC11_27 J7

GND_55 GND_239
AC17
M6 L8
C301
GND_56 GND_240
AE23 AD15 J30 AC18
VDD25_AUD_1 GND_54 VDD25_LVRX_1 VDDC11_28 J31
GND_57 GND_241
AC19
N6 L9 AF23 AD16 K7
GND_58 GND_242
AC20
VDD25_LTX
C288
VDD25_AUD_2 GND_55 VDD25_LVRX_2 VDDC11_29 K30
GND_59 GND_243
AC21
M13 L10 GND_60 GND_244
C274
L226 AE14 AD17 K31 AC22

VDD25_AAD GND_56 VTXPHY_VDD25_1 VDDC11_30 L30
GND_61 GND_245
AC23
F15 L11 BLM15BD121SN1 VDD25_XTAL AF14 AD18 L31
GND_62 GND_246
AC25
LTX_LVDD_1 GND_57 VTXPHY_VDD25_2 VDDC11_31 M7
GND_63 GND_247
AC30
F16 L13 N25 AD21 M12
GND_64 GND_248
AC31
LTX_LVDD_2 GND_58 VDD25_DR3PLL VDDC11_32 M13
GND_65 GND_249
AD8
H15 L14 VSS25_REF AD26 AD22 M14
GND_66 GND_250
AD12
SDRAM_VDDQ_1 GND_59 GPLL_AVDD25 VDDC11_33 M15
GND_67 GND_251
AD13
J15 L15 AD23 M16
GND_68 GND_252
AD19
SDRAM_VDDQ_2 GND_60 1005 size bead VDDC11_34 M17
GND_69 GND_253
AD20
J16 L16 H10 AD24 M18
GND_70 GND_254
AD25
SDRAM_VDDQ_3 GND_61 Bottom side of chip +1.1V_VDD GND_71 GND_255
AD31
K15 L17 VDD15_M0_1 VDDC11_35 M19
GND_72 GND_256
VDD11_VTXPHY H11 M20 AE12
SDRAM_VDDQ_4 GND_62 VDD15_M0_2 M24
GND_73 GND_257
AE13
K16 L18 +1.5V H12 M25
GND_74 GND_258
AE15
VDD10_XTAL SDRAM_VDDQ_5 GND_63 L201 VDD15_M0_3 M26
GND_75 GND_259
AE16
M1 H13 M30
GND_76 GND_260
AE17
GND_64 BLM18PG121SN1D VDD11_VTXPHY GND_77 GND_261
AE18
R18 M2 VDD15_M0_4 M32
GND_78 GND_262
H14 M33 AE19
VDD10_XTAL
0.1uF
GND_65
0.1uF
GND_79 GND_263
0.1uF
C205 4.7uF
AE20
VDD15_M0_5 M34
C209 4.7uF
G7 M3 GND_80 GND_264
OPT
H15 AB14
OPT
N12 AE21
+2.5V_Normal +2.5V_Normal VDDC15_M0
OPT
VDDC10_1 GND_66 VDD25_LTX VDD25_AUD VDD15_M0_6 VTXPHY_VDD11_1 N13
GND_81 GND_265
AE22
G8 M4 H16 AC14 N14
GND_82 GND_266
AE24
VDDC10_2 GND_67 VDD15_M0_7 VTXPHY_VDD11_2 N15
GND_83 GND_267
AE25
VDDC10 G9 M5 H17 AD14 N16
GND_84 GND_268
AE26
VDDC10_3 GND_68 L207 L200 VDDC11_XTAL GND_85 GND_269
AE31
H7 M9 VDD15_M0_8 VTXPHY_VDD11_3 N17
C206
C207
BLM18PG121SN1D BLM18PG121SN1D GND_86 GND_270
C208
H18 N18 AF12
VDDC10_4 GND_69 VDD15_M0_9 N19
GND_87 GND_271
AF13
H12 M10 GND_88 GND_272
0.1uF
0.1uF
H19 P25 N20 AF15

VDDC10_5 GND_70 GND_89 GND_273
C2164.7uF
4.7uF
AF16
VDD15_M0_10 AVDD11_DR3PLL N24
C2754.7uF
C200 4.7uF
J7 M11 H20 AA15 N30

GND_90 GND_274
AF17
VDDC10_6 GND_71 VDD15_M0_11 AVDD11_DCO N31
GND_91 GND_275
AF18
J12 M14 H21 AC26 +1.1V_VDD N32
GND_92 GND_276
AF19
VDDC10_7 GND_72 VDD15_M0_12 GPLL_VDD11 N33
GND_93 GND_277
AF20
K7 M15 H22 P7
GND_94 GND_278
AF21
VDDC10_8 GND_73 GND_95 GND_279
C223
C202
C204
P12 AF22
K12 M16 VDD15_M0_13 GND_96 GND_280
H23 P13 AF24
VDDC10_9 GND_74 VDD15_M0_14 P14
GND_97 GND_281
AF31
L7 N4 H24 P19
GND_98 GND_282
AG8
VDDC10_10 GND_75 VDD15_M0_15 P20
GND_99 GND_283
AG31
L12 N5 H25 P21
GND_100 GND_284
AH8
VDDC10_11 GND_76 VDD15_M0_16 P22
GND_101 GND_285
AH31
VDD10_XTAL M7 N14 P23
GND_102 GND_286
AJ8
VDDC10_12 GND_77 P24
GND_103 GND_287
AJ30
M12 N15 H7 P30
GND_104 GND_288
AK8
VDDC10_13 GND_78 VDD15_M1_1 P31
GND_105 GND_289
AK9
T17 N17 H8 R12
GND_106 GND_290
AK10
AVDD10_CVBS GND_79 VDD15_M1_2 R13
GND_107 GND_291
AK14
T18 P4 J8 R14
GND_108 GND_292
AK15
AVDD10_VSB GND_80 VDD15_M1_3 R16
GND_109 GND_293
AK16
M8 P5 K8 R17
GND_110 GND_294
AK17
AVDD10_LLPLL GND_81 VDD15_M1_4 R18
GND_111 GND_295
AK18
G10 P6 L7 R19
GND_112 GND_296
AK19
DVDD10_APLL_1 GND_82 VDD15_M1_5 R20
GND_113 GND_297
AK20
G11 P7 L8 R21
GND_114 GND_298
AK21
DVDD10_APLL_2 GND_83 VDD15_M1_6 R22
GND_115 GND_299
AK22
G12 P8 M8 R23
GND_116 GND_300
AK23
LTX_VDD GND_84 VDDC15_M1 R24
GND_117 GND_301
AK26
P9 VDD15_M1_7 GND_118 GND_302
N7 R25 AK27
GND_85 VDD15_M1_8 R26
GND_119 GND_303
AK28
P10 N8 R30
GND_120 GND_304
AK29
GND_86 VDD15_M1_9 R34
GND_121 GND_305
AK30
V5 P11 P8 T7
GND_122 GND_306
AK31
VSS25_REF GND_87 VDD15_M1_10 T12
GND_123 GND_307
AL8
VSS25_REF C3
D3
GND_1 GND_88
P14
P15
+1.5V_Bypass Cap R7
VDD15_M1_11
T13
T14
GND_124
GND_125
GND_126
GND_308
GND_309
GND_310
AL12
AL13
R8 T16 AL14
GND_2 GND_89 VDD15_M1_12 T17
GND_127 GND_311
AL15
D4 P16 T8 T18
GND_128 GND_312
AL16
GND_3 GND_90 VDD15_M1_13 T19
GND_129 GND_313
AL17
D17 R4 U8 T20
GND_130 GND_314
AL18
GND_4 GND_91 VDD15_M1_14 T21
GND_131 GND_315
AL19
E4 R7 V8 T25
GND_132 GND_316
AL20
GND_5 GND_92 +1.5V_DDR VDDC15_M0 VDDC15_M0 VDDC15_M0
F4
GND_6 GND_93
R8 +1.0V_Bypass Cap W8
VDD15_M1_15
VDD15_M1_16
T26
T30
T31
GND_133
GND_134
GND_135
GND_317
GND_318
GND_319
AL21
AL22
AL23
F7 R9 T34
GND_136 GND_320
AL24
GND_7 GND_94 +1.0V_VDD VDD10_XTAL VREF_M0_0 VREF_M0_1 U7
GND_137 GND_321
AL25
F8 R10 GND_138 GND_322
R200
R202
1K 1%
1K 1%
U12 AL26
GND_8 GND_95 U13
GND_139 GND_323
AL27
F9 R11 U14
GND_140 GND_324
AL28
GND_9 GND_96 U16
GND_141 GND_325
AL29
F10 R12 L211 L230 U17
GND_142 GND_326
AL30
GND_10 GND_97 BLM18PG121SN1D U18
GND_143 GND_327
AL31
F12 R13 OPT OPT U19
GND_144 GND_328
AM8
C303 22uF
GND_11 GND_98 BLM18PG121SN1D U20

GND_145 GND_329
AM13
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
F13 R14 0.1uF U21

GND_146 GND_330
AM14
1%
1%
GND_12 GND_99 GND_147 GND_331
C2394.7uF
U25 AM15
F17 R15 GND_148 GND_332
R201
R203
U26 AM16
GND_13 GND_100 U30
GND_149 GND_333
AM17
F18 R16 U31
GND_150 GND_334
AM18
GND_14 GND_101 GND_151 GND_335
C306
C296
C308
C344
1K
1K
V7 AM19
C302
G4 R17 V12
GND_152 GND_336
AM20
C246
GND_15 GND_102 V13

GND_153 GND_337
AM21
G6 T4 V14
GND_154 GND_338
AM22
GND_16 GND_103 V16
GND_155 GND_339
AM23
G13 T7 V17
GND_156 GND_340
AM24
GND_17 GND_104 V18
GND_157 GND_341
AM25
G14 T8 V19
GND_158 GND_342
AM26
GND_18 GND_105 V20
GND_159 GND_343
AM27
G15 T9 V21
GND_160 GND_344
AM28
GND_19 GND_106 V25
GND_161 GND_345
AM29
G16 T10 V26
GND_162 GND_346
AM30
GND_20 GND_107 V30
GND_163 GND_347
AM31
G17 T11 V31
GND_164 GND_348
AN6
GND_21 GND_108 +1.0V_VDD W5
GND_165 GND_349
AN12
G18 T12 W6
GND_166 GND_350
AN13
GND_22 GND_109 VDDC10 +1.5V_DDR VDDC15_M1 VDDC15_M1 W7
GND_167 GND_351
AN15
H4 T15 VDDC15_M1 W12
GND_168 GND_352
AN16
GND_23 GND_110 W13
GND_169 GND_353
AN17
H5 T16 L206 W14
GND_170 GND_354
AN18
GND_24 GND_111 BLM18PG121SN1D W15
GND_171 GND_355
AN19
H6 U4 VREF_M1_0 W16
GND_172 GND_356
AN20
GND_25 GND_112 VREF_M1_1 GND_173 GND_357
R300
R302
1K 1%
1K 1%
W17 AN21
0.1uF
H8 U6 H13A_BRAZIL W18
GND_174 GND_358
AN22
C2144.7uF
GND_26 GND_113 IC101-*1 W19

GND_175 GND_359
AN23
H9 U18 LG1154AN_H13A_ISDB-T (LG1154AN-IT) W20
GND_176 GND_360
AN24
GND_27 GND_114 L228 W21
GND_177 GND_361
AN25
H10 V4 W25
GND_178 GND_362
AN26
GND_28 GND_115 OPT OPT P17 H18 W26
GND_179 GND_363
AN27
H11 V16 BLM18PG121SN1D XIN_SUB AAD_ADC_SIF GND_180 GND_364
0.1uF
C251
C299 22uF
P18 H17 W30 AN28
0.1uF
0.1uF
GND_29 GND_116 J17

XO_SUB AAD_ADC_SIFM
W31
GND_181 GND_365
AN29
1%
1%
VSB_AUX_XIN GND_182 GND_366
P2 Y3 AN30
AUDA_VBG_EXT GND_183 GND_367
R301
R303
N18 N1 Y4 AN31
XTAL_BYPASS AUDA_OUTL GND_184 GND_368
D18 N2
CLK_24M AUDA_OUTR
M18 N3
XTAL_SEL0 AUD_SCART_OUTL
C307
C310
C304
1K
1K
M17 P1
XTAL_SEL1 AUD_SCART_OUTR
P3
AUAD_L_CH4_IN
R1
AUAD_R_CH4_IN
E3 R2
PORES_N AUAD_L_CH3_IN
T1
AUAD_R_CH3_IN
K3 U2
OPM0 AUAD_L_CH2_IN
K2 U3
OPM1 AUAD_R_CH2_IN
V2
AUAD_L_CH1_IN
A8 V3
H13A_SCL AUAD_R_CH1_IN
B8 U1
H13A_SDA AUAD_R_REF
T3
AUAD_M_REF
T2
AUAD_L_REF
R3
AUAD_REF_PO
U13
CVBS_IN3
V14 K17
CVBS_IN2 ANTCON
V15 K18
CVBS_IN1 RFAGC
V13 J18
CVBS_VCM IFAGC
U15 U16
BUF_OUT1 ADC_I_INCOM
U14 U17
BUF_OUT2 ADC_I_INP
V17
ADC_I_INN
F3
GPIO0
U7 F2
REFT GPIO1
V6 F1
REFB GPIO2
V7 G3
ADC1_COM GPIO3
U10 G2
ADC2_COM GPIO4
V12 G1
ADC3_COM GPIO5
T5 H3
GND JIG POINT SMD TOP for EMI +3.3V_Bypass Cap +2.5V_Bypass Cap T6
U8
V8
SC1_SID
SC1_FB
PB1_IN
GPIO6
GPIO7
GPIO8
H2
H1
J3
Y1_IN GPIO9
V9 E18
+3.3V_NORMAL +2.5V_Normal U9
SOY1_IN GPIO10
E17
+2.5V_Normal PR1_IN GPIO11
VDD33 VDD25_XTAL (1) VDD25_LVDS(4)
V10
U11
PB2_IN GPIO12
H16
J2
Y2_IN GPIO13
V11 J1
SOY2_IN GPIO14
U12 K1
L234 L238 PR2_IN GPIO15
L203 BLM18PG121SN1D BLM18PG121SN1D
JP202
JP203
JP204
JP205
BLM18PG121SN1D
0.1uF
0.1uF
NON_LA8600
0.1uF
C3644.7uF
C3784.7uF
GASKET_8.0X6.0X8.5H
C2014.7uF
M200
MDS62110209
C368
C381
C203

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN POWER
11/05/31

IC101 IC100
LG1154AN_H13A H13A_NON_BRAZIL LG1154D_H13D
OP MODE Setting INTR_GBB

E1 AT16
INTR_GBB STPI0_CLK/GPIO47
AK35
FE_DEMOD2_TS_CLK
+3.3V_NORMAL CLK_54M_VTT
Clock for H13A & Select XTAL Input +3.3V_NORMAL INTR_AFE3CH
E2 AU17
INTR_AFE3CH STPI0_SOP/GPIO46
AK36
FE_DEMOD2_TS_SYNC
D1 AT17 AK37
INTR_AGPIO INTR_AGPIO STPI0_VAL/GPIO45 FE_DEMOD2_TS_VAL
AJ35
10K
10K
10K
10K
STPI0_ERR/GPIO44 FE_DEMOD2_TS_ERROR
1/16W
A6 AT24 AJ36
R464
AUD_FS20CLK AUD_FS20CLK STPI0_DATA/GPIO43 FE_DEMOD2_TS_DATA

B6 AU24 AH35
1K
1%
MAIN Clock(24Mhz)
X-TAL_1
OPT
AUD_FS21CLK AUD_FS21CLK STPI1_CLK/GPIO42 FE_DEMOD3_TS_CLK
A5 AT23 AH37
GND_1
R481 OPT
R482 OPT
R484 OPT
10pF AUD_FS23CLK AUD_FS23CLK STPI1_SOP/GPIO41 FE_DEMOD3_TS_SYNC
C404 XIN_SUB B5 AU23 AH36
1/16W
FE_DEMOD3_TS_VAL
R465
0.01uF C426 AUD_FS24CLK AUD_FS24CLK STPI1_VAL/GPIO40

390
OP MODE[0:1] : SW[2:1] A4 AT22 AG35
R483
50V
1%
00 => Normal Operaiton Mode AUD_FS25CLK AUD_FS25CLK STPI1_ERR/GPIO55 FE_DEMOD3_TS_ERROR
1
C4 AG36
24MHz
R441
FE_DEMOD3_TS_DATA
X400
/T32 Debug Mode AUDCLK_OUT_SUB STPI1_DATA/GPIO54
1M
01 => Internal Test Purpose
10 => Internal Test Purpose 100 C18 AU36 AM36
R459 FE_DEMOD1_TS_CLK
3
4
DAC_START_PULLDOWN 11 => Internal Test Purpose OPM[0] AUD_HDMI_MCLK AUD_HDMI_MCLK TP_DVB_CLK
100 AL36
X-TAL_2
GND_2 R460 OPM[1] A2 AT20

TP_DVB_SOP
AL35
FE_DEMOD1_TS_SYNC
10pF XTAL SEL[1:0] : SW[4:3]
1/16W
XOUT_SUB 100 AUD_DAC1_LRCK AUD_DAC1_LRCK TP_DVB_VAL FE_DEMOD1_TS_VAL

R466
00 => Xtal Input R461 XTAL_SEL[0] B2 AU20 AL37

C427 AUD_DAC1_SCK AUD_DAC1_SCK TP_DVB_ERR FE_DEMOD1_TS_ERROR
82
1%
01 => CLK 24M from H13D 100 B1 AT19 AM35

R462 FE_DEMOD1_TS_DATA[0]
10 => XTAL Bypass from H13D XTAL_SEL[1] AUD_DAC1_LRCH AUD_DAC1_LRCH TP_DVB_DATA0 FE_DEMOD1_TS_DATA[0-7]
C2 AU19 AN36 FE_DEMOD1_TS_DATA[1]
AUD_DAC0_LRCK AUD_DAC0_LRCK TP_DVB_DATA1
FOR EMI C1 AT18 AN37 FE_DEMOD1_TS_DATA[2]
AUD_DAC0_SCK AUD_DAC0_SCK TP_DVB_DATA2
D2 AU18 AN35 FE_DEMOD1_TS_DATA[3]
AUD_DAC0_LRCH AUD_DAC0_LRCH TP_DVB_DATA3
B4 AU22 AP37 FE_DEMOD1_TS_DATA[4]
AUD_ADC_LRCK AUD_ADC_LRCK TP_DVB_DATA4
A3 AT21 AP36
Place JACK Side Place SOC Side IC101 H13A_NON_BRAZIL AUD_ADC_SCK
B3 AU21
AUD_ADC_SCK TP_DVB_DATA5
AR37
FE_DEMOD1_TS_DATA[5]
L408 1uH R434
LG1154AN_H13A AUD_ADC_LRCH AUD_ADC_LRCH TP_DVB_DATA6
AR36 FE_DEMOD1_TS_DATA[7]
100 C424 0.047uF TP_DVB_DATA7
AV1_CVBS_IN AV1_CVBS_IN_SOC A7 AT25
5.5V C405 BB_SCL BB_SCL
C410 R410 B7 AU25 A28
D404 150pF 150pF 75 BB_SDA BB_SDA TPI_CLK TPI_CLK
P17 H18 C450 0.1uF E8 AP23 B29
50V 1% XIN_SUB XIN_SUB AAD_ADC_SIF TUNER_SIF BB_TP_CLK BB_TPI_CLK TPI_SOP TPI_SOP TP402 TPI_ERR
XOUT_SUB R453 330P18 XO_SUB
H17 C451 0.1uF
C457
D8 AR23 B28
TPI_VAL
AAD_ADC_SIFM BB_TP_ERR BB_TPI_ERR TPI_VAL
L409 1uH R433 J17 C452 10uF 1000pF C8 AP22 C28
100 C425 0.047uF VSB_AUX_XIN BB_TP_SOP BB_TPI_SOP TPI_ERR TPI_ERR
TPI_DATA[0] TPI_DATA[0-7]
SC_CVBS_IN SC_CVBS_IN_SOC P2 C453 2.2uF OPT E7 AR22 B32
C408 AUDA_VBG_EXT BB_TP_VAL BB_TPI_VAL TPI_DATA0 TPI_DATA[1]
EU C462 N18 N1 D7 AP21 C31
150pF 150pF R411 XTAL_BYPASS AUDA_OUTL AUDA_OUTL BB_TP_DATA7 BB_TPI_DATA7 TPI_DATA1
EU
D18 N2 C7 AR21 B31 TPI_DATA[2]

50V EU 75 SC_CVBS_IN_SOY AUDA_OUTR
1% CLK_24M AUDA_OUTR BB_TP_DATA6 BB_TPI_DATA6 TPI_DATA2 TPI_DATA[3]
EU M18 N3 E6 AP20 A31
XTAL_SEL[0] XTAL_SEL0 AUD_SCART_OUTL SCART_Lout_SOC BB_TP_DATA5 BB_TPI_DATA5 TPI_DATA3
R432 M17 P1 EU 100 R479 D6 AR20 C30 TPI_DATA[4]
100 C423 0.047uF XTAL_SEL[1] XTAL_SEL1 AUD_SCART_OUTR SCART_Rout_SOC BB_TP_DATA4 BB_TPI_DATA4 TPI_DATA4
TU_CVBS TU_CVBS_SOC EU 100 R480 C6 AP19 A30 TPI_DATA[5]
0.01uF
0.01uF
C402 BB_TP_DATA3 BB_TPI_DATA3 TPI_DATA5
P3 E5 AR19 B30 TPI_DATA[6]
150pF
AUAD_L_CH4_IN BB_TP_DATA2 BB_TPI_DATA2 TPI_DATA6
EU R426
EU R442
50V R1 D5 AP18 C29 TPI_DATA[7]
22K
22K
OPT AUAD_R_CH4_IN BB_TP_DATA1 BB_TPI_DATA1 TPI_DATA7
E3 R2 C5 CLK_54M_VTT AR18
SOC_RESET PORES_N AUAD_L_CH3_IN AUAD_L_CH3_IN BB_TP_DATA0 BB_TPI_DATA0
T1 R467 82 D30 TPO_CLK
C458
TPO_ERR
C460
EU
EU
SCART_FB_DIRECT AUAD_R_CH3_IN AUAD_R_CH3_IN TPIO_CLK/GPIO53 TP400
K3 U2 B10 1/16W 1% AU28 D31 TPO_SOP
R423 100 OPM[0] OPM0 AUAD_L_CH2_IN AUAD_L_CH2_IN CLK_F54M CLK_54M TPIO_SOP/GPIO52
SC_FB SC_FB_SOC K2 U3 C9 AR24 F30 TPO_VAL
OPM[1] OPM1 AUAD_R_CH2_IN AUAD_R_CH2_IN CVBS_GC2 CVBS_GC2 TPIO_VAL/GPIO51
10K EU V2 B9 AU27 E31 TPO_ERR
R435 AUAD_L_CH1_IN CVBS_GC1 CVBS_GC1 TPIO_ERR/GPIO50 TPO_DATA[0-7]
SC_ID SC_ID_SOC A8 V3 A9 AT27 E30 TPO_DATA[0]
H13A_SCL H13A_SCL AUAD_R_CH1_IN CVBS_GC0 CVBS_GC0 TPIO_DATA0/GPIO58
B8 U1 D9 AP24 F29 TPO_DATA[1]
SCART_FB_DIRECT
EU H13A_SDA H13A_SDA AUAD_R_REF AUAD_R_REF CVBS_UP CVBS_UP TPIO_DATA1/GPIO59

R422 NON_EU T3 E9 AR25 E29 TPO_DATA[2]
NON_EU R436 R436-*1 AUAD_M_REF AUAD_M_REF CVBS_DN CVBS_DN TPIO_DATA2/GPIO60
R422-*1 75 2.7K T2 Close to LG1154A F28 TPO_DATA[3]
0 0 AUAD_L_REF AUAD_L_REF Close to IC4300 TPIO_DATA3/GPIO61
R3 B11 R492 330 AU29 E28 TPO_DATA[4]
AUAD_REF_PO AUAD_REF_PO FS00CLK FS00CLK TPIO_DATA4/GPIO62
U13 A11 R407 330 AT29 D28 TPO_DATA[5]
AV1_CVBS_IN_SOC CVBS_IN3 AUDCLK_OUT H13A_AUDCLK_OUT TPIO_DATA5/GPIO63
V14 K17 DAC_START_PULLDOWN E27 TPO_DATA[6]
SC_CVBS_IN_SOC CVBS_IN2 ANTCON NON_TU_W_BR/TW/CO TPIO_DATA6/GPIO48
V15 K18 D11 AP27 D27 TPO_DATA[7]
TU_CVBS_SOC CVBS_IN1 RFAGC R487 DAC_START DAC_START TPIO_DATA7/GPIO49
C443 0.047uF V13 J18 C11 AR27
R424
33 C417 0.047uF CVBS_VCM IFAGC IF_AGC DAC_DATA4 DAC_DATA4
SC_B COMP1_PB_IN_SOC R450 68 0 E10 AP26 AD5 R495 100
R425
SC_G 33 C418 0.047uF
COMP1_Y_IN_SOC DTV/MNT_V_OUT_SOC U15 U16
C459 DAC_DATA3
D10 AR26
DAC_DATA3 AUDCLK_OUT
AD6 R496 100
AUD_MASTER_CLK
C454 0.1uF 0.1uF
I2S_I/F
C428 1000pF BUF_OUT1 ADC_I_INCOM DAC_DATA2 DAC_DATA2 DACLRCH AUD_LRCH
SC_CVBS_IN_SOY COMP1_Y_IN_SOC_SOY U14 U17 C10 AP25 Y6
R427 C439 TU_W_BR/TW/CO
SC_R 33 C419 0.047uF
COMP1_PR_IN_SOC OPT 100pF
BUF_OUT2 ADC_I_INP
V17
ADC_I_INP DAC_DATA1
A10 R451 AT28
DAC_DATA1 DACSLRCH/GPIO127
Y7
330
OPT 50V 10pF
OPT 50V 10pF

C472
C473
OPT 50V 10pF
R414 1% 75
R416 1% 75
EU
ADC_I_INN FRC_FLASH_WP
1% 75
C474
50V ADC_I_INN DAC_DATA0 DAC_DATA0 PCMI3SCK/GPIO112

AC6 R497 100
EU
DACSCK AUD_SCK
Placed as close as possible to SOC F3 D13 AR30 AC5 R498 100
EU
GPIO0 HW_OPT_0 AAD_GC4 AAD_GC4 DACLRCK AUD_LRCK

U7 F2 TU_W_BR/TW/CO C13 AP29 AA6 C411
R412
REFT REFT GPIO1 HW_OPT_1 AAD_GC3 AAD_GC3 PCMI3LRCK/GPIO113

V6 F1 E12 AR29 AB7 10pF
REFB HW_OPT_2 R487-*1
REFB GPIO2 AAD_GC2 AAD_GC2 PCMI3LRCH 50V
R447 68 C440 0.047uF V7 G3 D12 AP28 AB5
ADC1_COM GPIO3 HW_OPT_3 AAD_GC1 AAD_GC1 DACCLFCH/GPIO126 OPT
R448 68 C441 0.047uF U10 G2 10K C12 AR28 AU14
R428
COMP1_Pb 33 C420 0.047uF
COMP2_PB_IN_SOC R449 68 C442 0.047uF V12
ADC2_COM GPIO4
G1
HW_OPT_4 AAD_GC0 AAD_GC0 IEC958OUT
AA32
SPDIF_OUT
R429
COMP1_Y 33 C421 0.047uF
COMP2_Y_IN_SOC T5
ADC3_COM GPIO5
H3
HW_OPT_5
C17 AP35
DACSUBMCLK
AA34
C429 1000pF SC_ID_SOC SC1_SID GPIO6 HW_OPT_6 AAD_DATA9 AAD_DATA9 DACSUBLRCH
COMP2_Y_IN_SOC_SOY T6 H2 E16 AR35 AA33
COMP1_Pr 33 C422 0.047uF
COMP2_PR_IN_SOC
SC_FB_SOC
U8
SC1_FB GPIO7
H1
HW_OPT_7 AAD_DATA8
D16 AP34
AAD_DATA8 DACSUBSCK
AB34
D406
D403
D401
50V 10pF
50V 10pF
R415 1% 75
R417 1% 75
R431 COMP1_PB_IN_SOC HW_OPT_8

R413 1% 75
C430
C431
50V 10pF
PB1_IN GPIO8 AAD_DATA7 AAD_DATA7 DACSUBLRCK

C470
V8 J3 C16 AR34 AE32 +3.3V_NORMAL

COMP1_Y_IN_SOC HW_OPT_9 33 R493
Y1_IN GPIO9 AAD_DATA6 AAD_DATA6 TEST1
V9 E18 E15 AP33 AE33
5.5V
5.5V
5.5V
COMP1_Y_IN_SOC_SOY HW_OPT_10 33 R494

SOY1_IN GPIO10 AAD_DATA5 AAD_DATA5 TEST2
U9 E17 D15 AR33
COMP1_PR_IN_SOC PR1_IN GPIO11 MHL_ON_OFF AAD_DATA4 AAD_DATA4
V10 H16 C15 AP32 AT6
COMP2_PB_IN_SOC PB2_IN GPIO12 AAD_DATA3 AAD_DATA3 TX0N TXB4N/TX0N
U11 J2 E14 AR32 AU6
COMP2_Y_IN_SOC Y2_IN GPIO13 AAD_DATA2 AAD_DATA2 TX0P TXB4P/TX0P
V11 J1 D14 AP31 AT5
COMP2_Y_IN_SOC_SOY SOY2_IN GPIO14 AAD_DATA1 AAD_DATA1 TX1N TXB3N/TX1N
U12 K1 C14 AR31 AU5
Near Place Scart AMP COMP2_PR_IN_SOC PR2_IN GPIO15 SC_FB_BUF AAD_DATA0 AAD_DATA0 TX1P TXB3P/TX1P
E13 AP30 AT4
EU EU AAD_DATAEN AAD_DATAEN TX2N TXBCLKN/TX2N
AU4
SCART_AMP_R_FB TX2P TXBCLKP/TX2P
10K B18 AT36 AU3
25V 1uF ADCO_OUT_CLK ADCO_OUT_CLK TX3N TXB2N/TX3N
C6006 R6006 AU2
TX3P TXB2P/TX3P
A12 AT30 AT2
EU EU +2.5V_Normal HSR_AP0
B12 AU30
HSR_AP TX4N
AT1
TXB1N/TX4N
SCART_AMP_L_FB HSR_AM0 HSR_AM TX4P TXB1P/TX4P
Placed as close as possible to IC4300 A13 AT31 AR4
1uF 25V 10K HSR_BP0 HSR_BP TX5N TXB0N/TX5N
C6001 R6005 B13 AU31 AR3
+3.3V_NORMAL TXB0P/TX5P
HSR_BM0 HSR_BM TX5P
A14 AT32 AP1
AUDIO IN L407 HSR_CP0
HSR_CM0
B14 AU32
HSR_CP
HSR_CM
TX6N
TX6P
AP2
TXA4N/TX6N
TXA4P/TX6P
AUAD_REF_PO A15 AT33 AP4
OPT HSR_CLKP0 HSR_CLKP TX7N TXA3N/TX7N
1% C447 1% C455 B15 AU33 AP3
R418 27K C432 4.7uF 1uF R455 HSR_CLKM0 HSR_CLKM TX7P TXA3P/TX7P
EU 51K 10uF A16 AT34 AN4
SC_L_IN AUAD_L_CH3_IN IC400 25V TXACLKN/TX8N
C412 AUAD_L_REF HSR_DP0 HSR_DP TX8N
MM1756DURE 1% B16 AU34 AN3
0.1uF
R437 10K 1% 0.1uF HSR_DM0 HSR_DM TX8P TXACLKP/TX8P

C414
R457 A17 AT35 AM4

4.7uF C449
1% 51K HSR_EP0 HSR_EP TX9N TXA2N/TX9N

47K R456 1%
R419 27K C433 4.7uF B17 AU35 AM3

TXA2P/TX9P
EU
SC_R_IN AUAD_R_CH3_IN VCC IN EU HSR_EM0 HSR_EM TX9P

6 1 AL4
TX10N TXA1N/TX10N
R438 10K 1% DTV/MNT_V_OUT_SOC AT14 AL3
AUD_HPDRV_LRCH TX10P TXA1P/TX10P
PS GND AT15 AK1 H13 Ball Name
5 2 AUD_HPDRV_LRCK TX11N TXA0N/TX11N
NC AU15 AK2
AUD_HPDRV_SCK TX11P TXA0P/TX11P EPI Output
AK4
OUT BIAS TX12N TXB2N TXD4N/TX12N
4 3 AC7 AK3
AUAD_R_REF FRC_LR_O_SYNC_FLAG TX12P TXB2P TXD4P/TX12P
4.7uF
DTV/MNT_V_OUT R402 33 AN5

1% EU L/DIM0_VS L_VSOUT_LD
COMP1/AV1/DVI_L_IN AUAD_M_REF R405 33 AR14 AJ4
R420 27K C434 4.7uF L/DIM0_SCLK TXB1N TXD3N/TX13N
AUAD_L_CH2_IN DIM0_SCLK TX13N
R400 33 AP14 AJ3
C413
1/10W
L/DIM0_MOSI TXB1P TXD3P/TX13P

DIM0_MOSI TX13P
R454
OPT
R439 10K 1% 1% C456 AN14 AH4

1% R458 TXB0N
5%
COMP1/AV1/DVI_R_IN 4.7uF DIM1_SCLK TX14N TXDCLKN/TX14N

2
R421 27K C435 4.7uF 47K AP13 AH3

AUAD_R_CH2_IN 10V DIM1_MOSI TX14P TXB0P TXDCLKP/TX14P
C448 OPT AG4
TX15N TXA4N TXD2N/TX15N
R440 10K 1% 4.7uF AF6 AG3
10V PWM0 TX15P TXA4P TXD2P/TX15P
PWM1 AF7 AF1
TXACLKN
TU_W_BR/TW TU_W_BR/TW TU_W_BR/TW AD7
PWM1 TX16N
AF2
TXD1N/TX16N
R443-*1 R444-*1 PWM2 TXACLKP TXD1P/TX16P
C436-*1 PWM2 TX16P
AE6 AF4
100pF DPM BPL_IN PWM_IN TX17N TXA1N TXD0N/TX17N
220 220 AF3
TX17P TXA1P TXD0P/TX17P
+12V NON_TU_BR/TW AP5 AE4
R443 C437 EO_SOC EPI_EO TX18N TXC4N
AN8 AE3
ADC_I_INN IF_N GST_SOC EPI_VST TX18P TXC4P
51 0.01uF AP8 AD4
DPM EPI_DPM TX19N TXC3N
NON_TU_W_BR/TW AR7 AD3
AFE 3CH REF Setting
100K
R408
100K
R403
EU
EU
C436 L406 MCLK_SOC EPI_MCLK TX19P TXC3P

To ADC 22pF OPT
GCLK_SOC
AN7 AC4
TXCCLKN
EPI_GCLK TX20N
SCART_FB_BUFFER
EU NON_TU_BR/TW AC3
+3.3V_NORMAL R444 C438 TX20P TXCCLKP
SCART_Lout SCART_Lout_SOC AB1
C403
ADC_I_INP IF_P TX21N TXC2N
51 0.01uF Placed as close as possible to IC4300 AB2
2.2uF EU TX21P TXC2P
10V AB4
R446
4.7K
SCART_Rout C444 TX22N TXC1N

C406
SCART_Rout_SOC Tuner IF Filter Placed as close as possible to IC100 AB3
REFT TX22P TXC1P
100K
R404
AA4
100K
R409
EU
0.1uF
EU
2.2uF SC_FB_BUF TXC0N

10V TX23N
C446 AA3
SCART_FB_BUFFER Must be used TX23P TXC0P
C 0.1uF
SC_FB R401 HP_OUT HP_OUT
470 B L400 L401 C445 AR5
R6450 MMBT3904(NXP) TX_LOCKN EPI_LOCK6
100 Q400 BLM18PG121SN1D BLM18PG121SN1D REFB
1/16W
HP_ROUT 0.1uF
HP_LOUT_MAIN AUDA_OUTL 5% E SCART_FB_BUFFER HP_LOUT
1K R406
SCART_FB_BUFFER
HP_LOUT_AMP HP_OUT HP_ROUT_AMP HP_OUT

R430
1/16W
C400 C409
22K
C407
0.01uF 0.22uF 0.22uF
1%
10V 10V
R6451 DIMMING
100
AUDA_OUTR Place at JACK SIDE
HP_ROUT_MAIN
LG1154A LG1154D
R445
C401
22K
R490 100
0.01uF PWM_DIM2
PWM1
R489 100
PWM_DIM PWM2

MAIN AUDIO/VIDEO
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

IC100
LG1154D_H13D
F15
M0_DDR_A[0] M0_DDR_A0
F13
F17
F19
E10
E18
E11
F18
M0_DDR_A[7] M0_DDR_A7 DDR_SAMSUNG DDR_HYNIX
DDR_SAMSUNG
F11 IC500-*1
M0_DDR_A[8] M0_DDR_A8 IC500 H5TQ4G63AFR-PBC
F16 M0_DDR_VREFCA
M0_DDR_A[9] M0_DDR_A9 VDDC15_M0 K4B4G1646B-HCK0 N3
P7
A0 VREFCA
M8
IC502 M0_1_DDR_VREFCA DDR_HYNIX
E9 M0_DDR_CKE
P3
A1
IC502-*1
M0_DDR_A[10] M0_DDR_A10 N2
P8
A2
A3
A4
VREFDQ
H1
K4B4G1646B-HCK0 H5TQ4G63AFR-PBC
E12 P2
R8
A5
L8
M0_DDR_A[11]
E13
M0_DDR_A11 DDR3 R2
T8
A6
A7
A8
ZQ
M0_1_DDR_VREFDQ
N3
P7
P3
A0
A1
A2
VREFCA
M8
M0_DDR_A12 R541 M0_DDR_VREFDQ

R3
A9 VDD_1
B2 N2 H1
4Gbit
A3 VREFDQ
M0_DDR_A[12] R520 N3 M8
L7
R7
A10/AP VDD_2
D9
G7
DDR3 P8
P2
A4
E16 10K M0_DDR_A0 A0

N7
A11 VDD_3
K2 R8
A5
L8
M0_DDR_A[13] M0_DDR_A13 10K VREFCA T3

A12/BC VDD_4
K8
N3 M8 R2
A6 ZQ
F12
M0_DDR_A14 M0_DDR_A1
P7
A1
(x16) T7
M7
A13
A14
A15
VDD_5
VDD_6
VDD_7
N1
N9
R1
M0_DDR_A0 A0 4Gbit VREFCA
T8
R3
L7
A7
A8
A9 VDD_1
B2
D9
M0_DDR_A[14] P3
M2
VDD_8
R9
P7 A10/AP VDD_2
F14
M0_DDR_A15 M0_DDR_RESET_N M0_DDR_A2 A2
N8
M3
BA0
BA1
BA2
VDD_9
M0_DDR_A1 A1 (x16) R7
N7
T3
A11
A12/BC
VDD_3
VDD_4
G7
K2
K8
M0_DDR_A[15] N2 H1 J7
VDDQ_1
A1
A8
P3 T7
M7
A13
A14
VDD_5
VDD_6
N1
N9
M0_DDR_A3 A3
K7
CK VDDQ_2
C1
M0_DDR_A2 A2 A15 VDD_7
R1
VREFDQ K9
CK
CKE
VDDQ_3
VDDQ_4
C9
N2 H1 M2
BA0
VDD_8
VDD_9
R9
E19 P8 VDDQ_5
D2
M0_DDR_A3 A3
N8
BA1
M0_DDR_A4 A4
L2
K1
CS VDDQ_6
E9
F1 VREFDQ M3
BA2
A1
M0_DDR_BA[0] M0_DDR_BA0 P2 VDDC15_M0

J3
K3
ODT
RAS
VDDQ_7
VDDQ_8
H2
H9
P8 J7
CK
VDDQ_1
VDDQ_2
A8
F10 M0_DDR_A5 A5
L3
CAS VDDQ_9
M0_DDR_A4 A4 K7
K9
CK VDDQ_3
C1
C9
M0_DDR_BA[1] M0_DDR_BA1 R542 WE

J1
P2 VDDC15_M0 CKE VDDQ_4
D2
E15 R8 L8 T2
RESET
NC_1
NC_2
J9
M0_DDR_A5 A5
L2
VDDQ_5
E9
M0_D_CLK M0_U_CLK M0_DDR_A6 A6 ZQ NC_3

L1
L9 R544 K1
CS
ODT
VDDQ_6
VDDQ_7
F1
M0_DDR_BA[2] M0_DDR_BA2 R2 F3
NC_4
R8 L8 J3
RAS VDDQ_8
H2
240 G3
DQSL
M0_DDR_A6 A6 ZQ
K3
L3
CAS VDDQ_9
H9
M0_DDR_A7 A7 1%
DQSL
R2
WE
J1
T8
C7 A9
240 T2
NC_1
J9
100
100
DQSU VSS_1 RESET NC_2

B7 B3
B10 DQSU VSS_2
M0_DDR_A7 A7 L1
R519
R535
NC_3
M0_U_CLK M0_DDR_A8 A8 VSS_3

E1
T8 1% NC_4
L9
M0_DDR_U_CLK R3 B2
E7
D3
DML VSS_4
G8
J2
F3
G3
DQSL
A10 M0_DDR_A9 A9 VDD_1 E3

DMU VSS_5
VSS_6
J8
M1
M0_DDR_A8 A8 DQSL
M0_DDR_U_CLKN M0_U_CLKN L7 D9 F7
DQL0
DQL1
VSS_7
VSS_8
M9 R3 B2 C7
B7
DQSU VSS_1
A9
B3
A19 M0_DDR_A10 A10/AP VDD_2

F2
F8
DQL2 VSS_9
P1
P9
M0_DDR_A9 A9 VDD_1 E7
DQSU VSS_2
VSS_3
E1
G8
M0_DDR_D_CLK M0_D_CLK M0_D_CLKN M0_U_CLKN R7 G7

H3
H8
DQL3
DQL4
VSS_10
VSS_11
T1
T9
L7 D9 D3
DML
DMU
VSS_4
VSS_5
J2
B19 M0_DDR_A11 G2
DQL5 VSS_12
M0_DDR_A10 A10/AP VDD_2 VSS_6
J8
M0_DDR_D_CLKN M0_D_CLKN A11 VDD_3 H7

DQL6
R7 G7
E3
F7
DQL0 VSS_7
M1
M9
E14 N7 K2 DQL7
VSSQ_1
B1
M0_DDR_A11
F2
DQL1 VSS_8
P1
M0_DDR_A12 A12/BC VDD_4

D7
C3
DQU0 VSSQ_2
B9
D1
A11 VDD_3 F8
DQL2
DQL3
VSS_9
VSS_10
P9
M0_DDR_CKE M0_DDR_CKE T3 K8 C8
DQU1
DQU2
VSSQ_3
VSSQ_4
D8 N7 K2 H3
H8
DQL4 VSS_11
T1
T9
M0_DDR_A13
C2
DQU3 VSSQ_5
E2
M0_DDR_A12 A12/BC VDD_4 G2
DQL5 VSS_12
A13 VDD_5 A7
A2
DQU4 VSSQ_6
E8
F9
T3 K8
H7
DQL6
DQL7
F21 T7 N1 B8
DQU5
DQU6
VSSQ_7
VSSQ_8
G1
M0_DDR_A13 A13 VDD_5 D7
DQU0
VSSQ_1
VSSQ_2
B1
B9
M0_DDR_ODT M0_DDR_A14 A14 VDD_6

A3
DQU7 VSSQ_9
G9
T7 N1
C3
DQU1 VSSQ_3
D1
M0_DDR_ODT M7 N9
C8
C2
DQU2 VSSQ_4
D8
E2
E21 M0_DDR_A15 A15
M0_DDR_A14 A14 VDD_6 A7
DQU3 VSSQ_5
E8
M0_DDR_RASN M0_DDR_RASN VDD_7 M7 N9 A2

DQU4
DQU5
VSSQ_6
VSSQ_7
F9
E20 R1 M0_DDR_A15 A15 VDD_7

B8
A3
DQU6 VSSQ_8
G1
G9
M0_DDR_CASN M0_DDR_CASN VDD_8 R1

DQU7 VSSQ_9
F20 M2 R9
M0_DDR_BA0 BA0 VDD_9 VDD_8
M0_DDR_WEN M0_DDR_WEN N8 M2 R9
M0_DDR_BA1 BA1 M0_DDR_BA0 BA0 VDD_9
M3 N8
E17 VDDC15_M0 VDDC15_M0 M0_DDR_BA2 M0_DDR_BA1 BA1
M0_DDR_RESET_N M0_DDR_RESET_N BA2 M3
A1 M0_DDR_BA2 BA2
VDDQ_1 A1
F9 R500 M0_1_DDR_VREFCA J7 A8
240 M0_D_CLK CK VDDQ_2 VDDQ_1
M0_DDR_ZQCAL M0_DDR_VREFCA J7 A8
K7 C1 M0_U_CLK
1% M0_D_CLKN CK VDDQ_3 CK VDDQ_2
K9 C9 K7 C1
R514
1K 1%
B20 M0_U_CLKN
R536
CK VDDQ_3
1K 1%
M0_DDR_DQS0 M0_DDR_CKE CKE VDDQ_4 K9 C9

M0_DDR_DQS[0] D2
A20 M0_DDR_CKE CKE VDDQ_4
M0_DDR_DQS_N[0] M0_DDR_DQS_N0 VDDQ_5 D2
C19 L2 E9
CS VDDQ_6 VDDQ_5
M0_DDR_DQS[1] M0_DDR_DQS1 K1 F1 L2 E9
D19 M0_DDR_ODT ODT CS VDDQ_6
VDDQ_7
0.1uF
M0_DDR_DQS_N[1] M0_DDR_DQS_N1 K1 F1
0.1uF
A11 J3 H2 C534 0.1uF M0_DDR_ODT ODT VDDQ_7

1%
1%
M0_DDR_DQS2 M0_DDR_RASN RAS VDDQ_8 J3 H2 0.1uF

M0_DDR_DQS[2] K3 H9 C535 0.1uF C566
R515
B11 M0_DDR_RASN
R537
M0_DDR_CASN CAS VDDQ_9 RAS VDDQ_8

M0_DDR_DQS_N[2] M0_DDR_DQS_N2 L3 K3 H9 C567 0.1uF
C10 M0_DDR_WEN M0_DDR_CASN CAS VDDQ_9
WE
C504
1K
M0_DDR_DQS3 L3
C512
M0_DDR_DQS[3]
1K
D10 J1 M0_DDR_WEN WE
M0_DDR_DQS_N[3] M0_DDR_DQS_N3 NC_1 J1
T2 J9
M0_DDR_RESET_N RESET NC_2 NC_1
L1 T2 J9
D18 M0_DDR_RESET_N RESET NC_2
M0_DDR_DM[0] M0_DDR_DM0 NC_3 L1
C20 L9 NC_3
M0_DDR_DM[1] M0_DDR_DM1 NC_4 L9
D9 F3
M0_DDR_DQS0 DQSL NC_4
M0_DDR_DM[2] M0_DDR_DM2 G3 F3
C11 M0_DDR_DQS_N0 M0_DDR_DQS2 DQSL
M0_DDR_DM[3] M0_DDR_DM3 DQSL G3
M0_DDR_DQS_N2 DQSL
D22 C7 A9
M0_DDR_DQ0 M0_DDR_DQS1 DQSU VSS_1 C7 A9
M0_DDR_DQ[0] B7 B3
C15 M0_DDR_DQS_N1 M0_DDR_DQS3 DQSU VSS_1
M0_DDR_DQ[1] M0_DDR_DQ1 DQSU VSS_2 B7 B3
C23 E1 M0_DDR_DQS_N3 DQSU VSS_2
M0_DDR_DQ2 VDDC15_M0 VDDC15_M0 VSS_3
M0_DDR_DQ[2] E7 G8 E1
D16 M0_DDR_DM0 DML VSS_3
M0_DDR_DQ[3] M0_DDR_DQ3 VSS_4 E7 G8
B24 M0_1_DDR_VREFDQ D3 J2 M0_DDR_DM2
M0_DDR_DM1 DMU VSS_5 DML VSS_4
M0_DDR_DQ[4] M0_DDR_DQ4 M0_DDR_VREFDQ D3 J2
B15 J8 M0_DDR_DM3 DMU VSS_5
M0_DDR_DQ[5] M0_DDR_DQ5 VSS_6 J8
E3 M1
R516
1K 1%
D23
R538
VSS_6
1K 1%
M0_DDR_DQ6 M0_DDR_DQ0 DQL0 VSS_7 E3 M1

M0_DDR_DQ[6] F7 M9
A15 M0_DDR_DQ1 DQL1 M0_DDR_DQ16 DQL0 VSS_7
M0_DDR_DQ[7] M0_DDR_DQ7 VSS_8 F7 M9
C16 F2 P1 M0_DDR_DQ17
M0_DDR_DQ2 DQL2 VSS_9 DQL1 VSS_8
M0_DDR_DQ[8] M0_DDR_DQ8 F8 P9 F2 P1
D21 M0_DDR_DQ3 M0_DDR_DQ18 DQL2 VSS_9
M0_DDR_DQ9 DQL3 VSS_10
0.1uF
M0_DDR_DQ[9] F8 P9
0.1uF
D17 H3 T1 M0_DDR_DQ19 DQL3 VSS_10

1%
1%
M0_DDR_DQ10 M0_DDR_DQ4 DQL4 VSS_11 H3 T1

M0_DDR_DQ[10] H8 T9
R517
C22 M0_DDR_DQ20
R539
M0_DDR_DQ5 DQL5 VSS_12 DQL4 VSS_11

M0_DDR_DQ[11] M0_DDR_DQ11 G2 H8 T9
C18 M0_DDR_DQ6 M0_DDR_DQ21 DQL5 VSS_12
M0_DDR_DQ12 DQL6
C505
1K
G2
C513
M0_DDR_DQ[12]
1K
C21 H7 M0_DDR_DQ22 DQL6

M0_DDR_DQ13 M0_DDR_DQ7 DQL7 H7
M0_DDR_DQ[13] B1
C17 M0_DDR_DQ23 DQL7
M0_DDR_DQ[14] M0_DDR_DQ14 VSSQ_1 B1
D20 D7 B9
M0_DDR_DQ8 DQU0 VSSQ_2 VSSQ_1
M0_DDR_DQ[15] M0_DDR_DQ15 C3 D1 D7 B9
C13 M0_DDR_DQ9 M0_DDR_DQ24 DQU0 VSSQ_2
M0_DDR_DQ[16] M0_DDR_DQ16 DQU1 VSSQ_3 C3 D1
D7 C8 D8 M0_DDR_DQ25 DQU1
M0_DDR_DQ[17] M0_DDR_DQ17 C2 E2 C8 D8
D13 M0_DDR_DQ11 M0_DDR_DQ26 DQU2 VSSQ_4
M0_DDR_DQ[18] M0_DDR_DQ18 DQU3 VSSQ_5 C2 E2
C6 A7 E8 M0_DDR_DQ27 DQU3
M0_DDR_DQ[19] M0_DDR_DQ19 A2 F9 A7 E8
D14 M0_DDR_DQ13 M0_DDR_DQ28 DQU4 VSSQ_6
M0_DDR_DQ[20] M0_DDR_DQ20 DQU5 VSSQ_7 A2 F9
D6 B8 G1 M0_DDR_DQ29 DQU5
M0_DDR_DQ[21] M0_DDR_DQ21 A3 G9 B8 G1
C14 M0_DDR_DQ15 M0_DDR_DQ30 DQU6 VSSQ_8
M0_DDR_DQ[22] M0_DDR_DQ22 DQU7 VSSQ_9 A3 G9
A5 M0_DDR_DQ31 DQU7 VSSQ_9
M0_DDR_DQ[23] M0_DDR_DQ23
C7
D12
D8
B13
C9
C12
C8
D11
Real USE : 1Gbit
IC100 H5TQ1G63DFR-PBC(x16)
LG1154D_H13D
1Gbit : T7(NC_6)
DDR_SAMSUNG 4Gbit : T7(A14) DDR_SAMSUNG
N6
M1_DDR_A[0] M1_DDR_A0 IC501 DDR_HYNIX IC503 DDR_HYNIX
R6 M1_DDR_VREFCA M1_1_DDR_VREFCA
M1_DDR_A[1] M1_DDR_A1 K4B4G1646B-HCK0 IC501-*1 K4B4G1646B-HCK0 IC503-*1
L6 H5TQ4G63AFR-PBC H5TQ4G63AFR-PBC
J6 N3
P7
A0 VREFCA
M8 N3
P7
A0 VREFCA
M8
M1_DDR_A[3] M1_DDR_A3 P3
N2
A1
A2
H1
P3
N2
A1
A2
H1
U5 M1_DDR_VREFDQ P8
A3
A4
VREFDQ
P8
A3
A4
VREFDQ
M1_DDR_A[4] M1_DDR_A4 VDDC15_M1 M1_DDR_CKE N3 DDR3 M8 P2

M1_1_DDR_VREFDQ P2
J5 M1_DDR_A0 A0 VREFCA
R8
R2
T8
A5
A6
A7
ZQ
L8
M1_DDR_A0
N3
A0
DDR3 VREFCA
M8 R8
R2
T8
A5
A6
A7
ZQ
L8
M1_DDR_A[5] M1_DDR_A5 P7
4Gbit
A8 A8
T5 M1_DDR_A1
R3
A9 VDD_1
B2
P7 4Gbit
R3
A9 VDD_1
B2
A1 L7
R7
A10/AP VDD_2
D9
G7
M1_DDR_A1 A1
L7
R7
A10/AP VDD_2
D9
G7
M1_DDR_A[6] M1_DDR_A6 P3 N7
A11 VDD_3
K2
P3
N7
A11 VDD_3
K2
K6 R540 M1_DDR_A2 A2 (x16) T3

T7
A12/BC
A13
A14
VDD_4
VDD_5
VDD_6
K8
N1
M1_DDR_A2 A2 (x16) T3
T7
A12/BC
A13
A14
VDD_4
VDD_5
VDD_6
K8
N1
M1_DDR_A[7] M1_DDR_A7 N2 H1 M7
A15 VDD_7
N9
R1
N2 H1
M7
A15 VDD_7
N9
R1
U6 R521 10K M1_DDR_A3 A3 VREFDQ M2

VDD_8
R9
M1_DDR_A3 A3
M2
VDD_8
R9
M1_DDR_A[8] M1_DDR_A8 P8 N8
BA0
BA1
VDD_9
VREFDQ N8
BA0
BA1
VDD_9
M6 10K M1_DDR_A4
M3
BA2 P8 M3
BA2
A4 J7
VDDQ_1
A1
A8
M1_DDR_A4 A4 J7
VDDQ_1
A1
A8
M1_DDR_A[9] M1_DDR_A9 P2 K7
K9
CK
CK
VDDQ_2
VDDQ_3
C1
C9 P2
K7
K9
CK
CK
VDDQ_2
VDDQ_3
C1
C9
V5 M1_DDR_A5 A5 CKE VDDQ_4
VDDQ_5
D2
M1_DDR_A5 A5
CKE VDDQ_4
VDDQ_5
D2
M1_DDR_A[10] M1_DDR_A10 R8 L8 R543 240

L2
CS VDDQ_6
E9
R8 L8
L2
CS VDDQ_6
E9
R5 M1_DDR_RESET_N M1_DDR_A6 A6 ZQ
K1
J3
ODT VDDQ_7
F1
H2 R545 240
K1
J3
ODT VDDQ_7
F1
H2
M1_DDR_A11 R2 K3
RAS VDDQ_8
H9 M1_DDR_A6 A6 ZQ K3
RAS VDDQ_8
H9
M1_DDR_A[11] VDDC15_M1 L3
CAS
WE
VDDQ_9
R2 L3
CAS
WE
VDDQ_9
P5 M1_DDR_A7 A7 T2
NC_1
J1
J9
M1_DDR_A7 A7 T2
NC_1
J1
J9
M1_DDR_A[12] M1_DDR_A12 T8 RESET NC_2

NC_3
L1
L9 T8 VDDC15_M1 RESET NC_2
NC_3
L1
L9
L5 M1_DDR_A8 A8 F3
DQSL
NC_4
M1_DDR_A8 A8
F3
DQSL
NC_4
M1_DDR_A[13] M1_DDR_A13 R3 B2 G3
DQSL
R3 B2
G3
DQSL
T6 M1_U_CLK M1_DDR_A9 A9 VDD_1 C7 A9

M1_DDR_A9 A9
C7 A9
M1_DDR_A[14] M1_DDR_A14 M1_D_CLK L7 D9 B7

DQSU
DQSU
VSS_1
VSS_2
B3
VDD_1 B7
DQSU
DQSU
VSS_1
VSS_2
B3
P6 M1_DDR_A10
VSS_3
E1
L7 D9 VSS_3
E1
A10/AP VDD_2 E7
D3
DML VSS_4
G8
J2
M1_DDR_A10 A10/AP VDD_2
E7
D3
DML VSS_4
G8
J2
M1_DDR_A[15] M1_DDR_A15 R7 G7 DMU VSS_5

J8
DMU VSS_5
J8
DDR3 1.5V bypass Cap - Place these caps near Memory
R7 G7
100
VSS_6 VSS_6
DDR3 1.5V bypass Cap - Place these caps near Memory

E3 M1 E3 M1
M1_DDR_A11
100
A11 VDD_3 DQL0 VSS_7 DQL0 VSS_7

R530
F7
DQL1 VSS_8
M9
M1_DDR_A11 A11 VDD_3
F7
DQL1 VSS_8
M9
R518
N7 K2 F2
F8
DQL2 VSS_9
P1
P9
N7 K2
F2
F8
DQL2 VSS_9
P1
P9
H5 M1_DDR_A12 A12/BC VDD_4 H3

DQL3 VSS_10
T1
M1_DDR_A12 A12/BC
H3
DQL3 VSS_10
T1
M1_DDR_BA[0] M1_DDR_BA0 T3 K8 H8
DQL4
DQL5
VSS_11
VSS_12
T9
VDD_4 H8
DQL4
DQL5
VSS_11
VSS_12
T9
V6 M1_DDR_A13
G2
DQL6 T3 K8 G2
DQL6
A13 VDD_5 H7
DQL7
B1
M1_DDR_A13 A13 VDD_5
H7
DQL7
B1
M1_DDR_BA[1] M1_DDR_BA1 M1_U_CLKN T7 N1 D7

C3
DQU0
VSSQ_1
VSSQ_2
B9
D1 T7 N1
D7
C3
DQU0
VSSQ_1
VSSQ_2
B9
D1
M5 M1_D_CLKN M1_DDR_A14 A14 VDD_6 C8
DQU1 VSSQ_3
D8
M1_DDR_A14 C8
DQU1 VSSQ_3
D8
M1_DDR_BA[2] M1_DDR_BA2 M7 N9 C2
DQU2 VSSQ_4
E2 A14 VDD_6 C2
DQU2 VSSQ_4
E2
M1_DDR_A15 A15
A7
DQU3
DQU4
VSSQ_5
VSSQ_6
E8
M7 N9 A7
DQU3
DQU4
VSSQ_5
VSSQ_6
E8
VDD_7 A2
B8
DQU5 VSSQ_7
F9
G1 M1_DDR_A15 A15 VDD_7
A2
B8
DQU5 VSSQ_7
F9
G1
R1 A3
DQU6
DQU7
VSSQ_8
VSSQ_9
G9
R1 A3
DQU6
DQU7
VSSQ_8
VSSQ_9
G9
R2 VDD_8
M1_DDR_U_CLK M1_U_CLK M2 R9 VDD_8
R1 M1_DDR_BA0 BA0 M2 R9
VDD_9 M1_DDR_BA0 BA0 VDD_9
M1_DDR_U_CLKN M1_U_CLKN N8 N8
F1 M1_DDR_BA1 BA1 M1_DDR_BA1 BA1
M1_DDR_D_CLK M1_D_CLK M3 M3
F2 M1_DDR_BA2 BA2 M1_DDR_BA2 BA2
M1_DDR_D_CLKN M1_D_CLKN VDDC15_M1 VDDC15_M1 A1 A1
N5 VDDQ_1
M1_DDR_CKE M1_DDR_CKE J7 A8 VDDQ_1
M1_D_CLK CK J7 A8
M1_1_DDR_VREFCA VDDQ_2 M1_U_CLK CK VDDQ_2
M1_DDR_VREFCA K7 C1 K7 C1
G6 M1_D_CLKN CK VDDQ_3 M1_U_CLKN CK
M1_DDR_ODT M1_DDR_ODT K9 C9 VDDQ_3
F5 M1_DDR_CKE K9 C9
CKE VDDQ_4 M1_DDR_CKE
R510
1K 1%
CKE VDDQ_4
R531
1K 1%
M1_DDR_RASN M1_DDR_RASN D2 D2
G5 VDDQ_5
M1_DDR_CASN M1_DDR_CASN L2 E9 VDDQ_5
H6 L2 E9
CS VDDQ_6 CS VDDQ_6
M1_DDR_WEN M1_DDR_WEN K1 F1 K1 F1
M1_DDR_ODT ODT VDDQ_7 M1_DDR_ODT
J3 H2 ODT VDDQ_7
C529 0.1uF J3 H2
0.1uF
C561 0.1uF
0.1uF
K5 M1_DDR_RASN RAS VDDQ_8 M1_DDR_RASN RAS VDDQ_8

1%
M1_DDR_RESET_N K3 H9
1%
M1_DDR_RESET_N C530 0.1uF K3 H9

M1_DDR_CASN CAS VDDQ_9 C562 0.1uF
M1_DDR_CASN
R511
CAS VDDQ_9
R532
L3 L3
F6 240 R501 M1_DDR_WEN WE M1_DDR_WEN
M1_DDR_ZQCAL J1 WE
J1
C500
1K
C508
1K
1% NC_1 NC_1
T2 J9 T2 J9
E2 M1_DDR_RESET_N RESET NC_2 M1_DDR_RESET_N
M1_DDR_DQS[0] M1_DDR_DQS0 L1 RESET NC_2
E1 L1
NC_3 NC_3
M1_DDR_DQS_N[0] M1_DDR_DQS_N0 L9 L9
F3 NC_4
M1_DDR_DQS[1] M1_DDR_DQS1 F3 NC_4
F4 M1_DDR_DQS0 F3
DQSL M1_DDR_DQS2 DQSL
M1_DDR_DQS_N[1] M1_DDR_DQS_N1 G3 G3
P1 M1_DDR_DQS_N0 DQSL M1_DDR_DQS_N2
M1_DDR_DQS[2] M1_DDR_DQS2 DQSL
P2
M1_DDR_DQS_N[2] M1_DDR_DQS_N2 C7 A9 C7 A9
R3 M1_DDR_DQS1 DQSU VSS_1 M1_DDR_DQS3 DQSU
M1_DDR_DQS[3] M1_DDR_DQS3 B7 B3 VSS_1
R4 M1_DDR_DQS_N1 B7 B3
DQSU VSS_2 M1_DDR_DQS_N3 DQSU VSS_2
M1_DDR_DQS_N[3] M1_DDR_DQS_N3 E1 E1
VSS_3 VSS_3
VDDC15_M1 VDDC15_M1 E7 G8 E7 G8
G4 M1_DDR_DM0 DML VSS_4 M1_DDR_DM2 DML
M1_DDR_DM[0] M1_DDR_DM0 D3 J2 VSS_4
E3 M1_DDR_DM1 D3 J2
M1_1_DDR_VREFDQ DMU VSS_5 M1_DDR_DM3 DMU VSS_5
M1_DDR_DM[1] M1_DDR_DM1 M1_DDR_VREFDQ J8 J8
T4 VSS_6
M1_DDR_DM[2] M1_DDR_DM2 E3 M1 VSS_6
P3 M1_DDR_DQ0 E3 M1
DQL0 VSS_7 M1_DDR_DQ16
R512
1K 1%
DQL0 VSS_7
R533
1K 1%
M1_DDR_DM[3] M1_DDR_DM3 F7 M9 F7 M9
M1_DDR_DQ1 DQL1 VSS_8 M1_DDR_DQ17
F2 P1 DQL1 VSS_8
C4 M1_DDR_DQ2 F2 P1
DQL2 VSS_9 M1_DDR_DQ18 DQL2 VSS_9
M1_DDR_DQ[0] M1_DDR_DQ0 F8 P9 F8 P9
K3 M1_DDR_DQ3 DQL3 VSS_10 M1_DDR_DQ19
M1_DDR_DQ[1] M1_DDR_DQ1 H3 T1 DQL3 VSS_10
H3 T1
0.1uF
0.1uF
B3 M1_DDR_DQ4 DQL4 VSS_11 M1_DDR_DQ20 DQL4 VSS_11

1%
M1_DDR_DQ2 H8 T9
1%
M1_DDR_DQ[2] H8 T9
J4 M1_DDR_DQ5 DQL5 VSS_12 M1_DDR_DQ21
R513
DQL5 VSS_12
R534
M1_DDR_DQ[3] M1_DDR_DQ3 G2 G2
A3 M1_DDR_DQ6 DQL6 M1_DDR_DQ22
M1_DDR_DQ[4] M1_DDR_DQ4 H7 DQL6
H7
C501
1K
C509
1K
K2 M1_DDR_DQ7 DQL7 M1_DDR_DQ23

M1_DDR_DQ[5] M1_DDR_DQ5 B1 DQL7
B4 VSSQ_1 B1
M1_DDR_DQ[6] M1_DDR_DQ6 D7 B9 VSSQ_1
K1 M1_DDR_DQ8 D7 B9
DQU0 VSSQ_2 M1_DDR_DQ24 DQU0 VSSQ_2
M1_DDR_DQ[7] M1_DDR_DQ7 C3 D1 C3 D1
J3 M1_DDR_DQ9 DQU1 VSSQ_3 M1_DDR_DQ25
M1_DDR_DQ[8] M1_DDR_DQ8 C8 D8 DQU1 VSSQ_3
D4 M1_DDR_DQ10 C8 D8
M1_DDR_DQ[9] M1_DDR_DQ9 C2 E2 C2 E2
H4 M1_DDR_DQ11 DQU3 VSSQ_5 M1_DDR_DQ27
M1_DDR_DQ[10] M1_DDR_DQ10 A7 E8 DQU3 VSSQ_5
C3 M1_DDR_DQ12 A7 E8
M1_DDR_DQ[11] M1_DDR_DQ11 A2 F9 A2 F9
G3 M1_DDR_DQ13 DQU5 VSSQ_7 M1_DDR_DQ29
M1_DDR_DQ[12] M1_DDR_DQ12 B8 G1 DQU5 VSSQ_7
D3 M1_DDR_DQ14 B8 G1
M1_DDR_DQ[13] M1_DDR_DQ13 A3 G9 A3 G9
H3 M1_DDR_DQ15 DQU7 VSSQ_9 M1_DDR_DQ31
M1_DDR_DQ[14] M1_DDR_DQ14 DQU7 VSSQ_9
E4
M3
V4
M4
W3
L4
W4
L3
Y2
V3
N4
U4
M2
T3
N3
U3
P4

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN DDR

+5V_CI_ON
C702 C703 R711 R712 CI_DATA[0-7]

0.1uF 4.7uF
10V 10K 10K CI
CI JK700
CI OPT OPT
10120698-015LF R720
10K
/PCM_CE1
35 1 OPT
+5V_CI_ON R716 100 36 2 CI_DATA[3]
/CI_CD1
CI 37 3 CI_DATA[4]
CI_TS_DATA[3]
38 4 CI_DATA[5]
CI_TS_DATA[4] +5V_CI_ON
39 5 CI_DATA[6]
CI_DATA[0-7]
R706 R708 CI_TS_DATA[5] CI
10K 10K 40 6 CI_DATA[7]
CI_TS_DATA[6] AR712
OPT OPT CI R721 33 R724 CI_DATA[0] 33 EB_DATA[0]
CI_TS_DATA[7] 41 7
CI_ADDR[10] 10K CI_DATA[1] EB_DATA[1]
/PCM_CE2 42 8 CI_ADDR[10] OPT
/PCM_IORD CI_DATA[2] EB_DATA[2]
R710 0 43 9
/PCM_IOWR CI_VS1 /PCM_OE
OPT CI_ADDR[11] CI_DATA[3] EB_DATA[3]
44 10 CI_ADDR[11] +5V_CI_ON
CI_IN_TS_DATA[0-7] 45 11 CI_ADDR[9]
EB_DATA[0-7]
CI_ADDR[9]
46 12 CI_ADDR[8] CI
CI_ADDR[8]
CI_IN_TS_DATA[0] CI_ADDR[13] R723 R725 CI_DATA[4] AR713 EB_DATA[4]
47 13 CI_ADDR[13] 33
10K 10K
CI_IN_TS_DATA[1] 48 14 CI_ADDR[14] CI_DATA[5] EB_DATA[5]
CI_ADDR[14] CI OPT
CI_IN_TS_DATA[2] 49 15 CI_DATA[6] EB_DATA[6]
/PCM_WE
CI_IN_TS_DATA[3] 50 16 R722 33 CI_DATA[7] EB_DATA[7]
/PCM_IRQA
51 17 C706 0.1uF C707 OPT
CI EB_DATA[0-7]
0 R718 0 CI 0.1uF
+5V_CI_ON R715 52 18 16V
CI_IN_TS_DATA[4] OPT 53 19 OPT
CI_DATA[0-7]
CI_IN_TS_DATA[5] 54 20
CI_IN_TS_DATA[6] 55 21 CI_ADDR[12]
R704 R709 CI_ADDR[12]
10K 10K CI_IN_TS_DATA[7] 56 22 CI_ADDR[7]
OPT CI_ADDR[7]
CI 57 23 CI_ADDR[6]
CI_TS_CLK CI_ADDR[6]
R701 33 CI 58 24 CI_ADDR[5]
PCM_RESET CI_ADDR[5]
R702 33 CI 59 25 CI_ADDR[4]
/PCM_WAIT CI_ADDR[4]
R700 33 OPT 60 26 CI_ADDR[3]
PCM_INPACK CI_ADDR[3]
R707 R714 0 CI CI_ADDR[2]
10K /PCM_REG 61 27 CI_ADDR[2]
OPT CI_TS_VAL 62 28 CI_ADDR[1]
CI_ADDR[1]
CI_TS_SYNC 63 29 CI_ADDR[0]
CI_ADDR[0]
64 30 CI_DATA[0]
CI_TS_DATA[0]
65 31 CI_DATA[1] +5V_CI_ON
CI_TS_DATA[1]
CI_VS1 CI_DATA[2]
CI_TS_DATA[2] 66 32
PCM_INPACK /CI_CD2 R717 CI 100 67 33 R719 10K
68 34 OPT
/PCM_CE2
R713 0 G2 69 G1
OPT
CI_IN_TS_VAL
CI_IN_TS_CLK
CI_IN_TS_SYNC
C705
12pF
50V
OPT
TPO_DATA[0-7] CI
AR701
TPO_DATA[0] 33
CI_IN_TS_DATA[0]
TPO_DATA[1]
CI_IN_TS_DATA[1]
TPO_DATA[2]
CI_IN_TS_DATA[2]
TPO_DATA[3]
CI_IN_TS_DATA[3]
TPO_DATA[4]
CI_IN_TS_DATA[4]
TPO_DATA[5]
CI_IN_TS_DATA[5]
TPO_DATA[6]
CI_IN_TS_DATA[6]
TPO_DATA[7]
CI_IN_TS_DATA[7]
AR706 CI
33 CI CI
AR707 AR711
33 33
CI CI_ADDR[0] EB_ADDR[0] CI_ADDR[12] EB_ADDR[12]
AR705
33 CI_ADDR[1] EB_ADDR[1] CI_ADDR[13] EB_ADDR[13]
TPO_CLK CI_IN_TS_CLK
CI_ADDR[2] EB_ADDR[2] CI_ADDR[14] EB_ADDR[14]
TPO_SOP CI_IN_TS_SYNC
CI_ADDR[3] EB_ADDR[3] /PCM_REG CAM_REG_N
TPO_VAL CI_IN_TS_VAL
CI
AR708 CI
33
CI_ADDR[4] EB_ADDR[4] AR710
33
CI_ADDR[5] EB_ADDR[5] /PCM_OE EB_OE_N
CI_ADDR[6] EB_ADDR[6] /PCM_WE EB_WE_N
CI_ADDR[7] EB_ADDR[7] /PCM_IORD EB_BE_N1
/PCM_IOWR EB_BE_N0
+5V_NORMAL
CI
AR709
33
CI_ADDR[8] EB_ADDR[8]
R703
R705
AR702 CI_ADDR[11] EB_ADDR[11]

10K
10K
/PCM_WAIT CAM_WAIT_N
/PCM_IRQA CAM_IREQ_N
/CI_CD2 CAM_CD2_N
100
/CI_CD1
CAM_CD1_N
CI
CI
C700 C701
0.1uF 0.1uF
16V 16V AR703 CI
PCM_INPACK CAM_INPACK_N
CI_TS_CLK TPI_CLK
CI_TS_VAL TPI_VAL C704
100
CI_TS_SYNC TPI_SOP 12pF
50V
OPT
AR704 CI
CI_TS_DATA[7] TPI_DATA[7]
100
AR700 CI
100

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PCMCIA

PANEL_POWER Power_DET
MMBT3906(NXP)
+3.5V_ST +12V
+12V +3.5V_ST R2337
100K +3.5V_ST
L2313
10K
R2301
UBW2012-121F PD_+12V PD_+3.5V

1
R2325 R2330 R2338

R2300 IC2307
0 10K
Q2300
RL_ON 10K 2.7K

PANEL_VCC 1% 5% NCP803SN293 OPT
2
+3.3V_NORMAL C2331
POWER_DET
P2300 0.1uF VCC RESET
3
3 2
SMAW200-H18S1 50V Q2302
R2310
AO3407A C2355 1
1K PD_+12V
D
0.1uF GND
R2326
R2317
R2309 16V
L2304 1.2K
R2346
INV_CTL
LVDS_DISCHARGE
R2347
33K
+3.5V_ST PWR ON 1 INV ON 100 C2333
LVDS_DISCHARGE
UBW2012-121F 2 1% C2365
10uF
5.6K
5.6K
3.5V 3 4 PDIM#1 G 0.1uF
PANEL_20V 16V C2347 16V
C2307 3.5V 5 6 PDIM#2
PWM_DIM2 L2306 0.1uF
+24V
R2318
0.1uF GND 7 8 GND 50V
UBW2012-121F
5.6K
16V 24V 24V
9 10
+12V GND GND R2336
11 12 PANEL_20V
UBW2012-121F C2316 100K
12V 13 14 12V 0.1uF C not to RESET at 8kV ESD
12V 15 16 24V 50V
C2306 L2303 B Q2301
GND GND PANEL_CTL IC2308
0.1uF 17 18 MMBT3904(NXP)
50V R2314 R2327 NCP803SN293
10K E 5.6K OLED : 20V DET = POWER_ON/OFF2_4
19 1% R2348 POWER_ON/OFF2_4
VCC 3 2 RESET 0
1
C2356
R2328 0.1uF GND
1.3K 16V 24V-->3.48V
1%
PWM_DIM 20V-->3.51V
12V-->3.58V
L/DIM0_MOSI ST_3.5V-->3.5V
JP2308 L/DIM0_MOSI
JP2309 L/DIM0_VS
L/DIM0_VS
JP2310 L/DIM0_SCLK
L/DIM0_SCLK +2.5V +2.5V_Normal
DDR MAIN 1.5V
IC2302
AP7173-SPG-13 HF(DIODES)
[EP]
ZD2304
+3.3V_NORMAL LG1154D
5V
R2331
POWER_ON/OFF2_2
10K
eMMC POWER IN
1 8
OUT
C2354
THERMAL
PG FB
9
2 7 0.1uF
+3.5V_ST 16V C2358 +1.5V_DDR
+5V_NORMAL R2322
R1 OPT
+3.3V_NORMAL 3.3V_EMMC 4.3K C2346 0.1uF
VCC SS C2343 C2348
3 6 1%
EP[GND]
C2327 1.5A 22uF 10uF 0.1uF
16V 16V
VIN_3
PWRGD
10uF 10V 10V
R2312
BOOT
C2337
10K 10V EN GND R2321 L2318
EN
POWER_ON/OFF2_1 4 5 2200pF 2K
L2302 1% R2
BLM18PG121SN1D 50V
L2320
16
15
14
13
3.3uH
VIN_1 1 12 PH_3
C2305 THERMAL
C2300 VIN_2 2 11 PH_2 NR5040T3R3N
0.1uF C2350 17
ZD2303
22uF C2361 C2362
16V 10uF
2.5V
10V GND_1 3 IC2305 DCDC_TI10 PH_1
10V 22uF 22uF
TPS54319TRE C2359 10V 10V
OPT
GND_2 SS/TR
Vout=0.8*(1+R1/R2) 4
3A 9
0.01uF
DCDC_TI
47K 1%
R2339
C2364
8
50V
100pF
R1 50V
AGND
VSENSE
COMP
RT/CLK
R2335
1/16W 330K 5%
R2334 C2360
[EP]GND
15K 4700pF
VIN_3
PGOOD
BOOT
EN
+12V 1/16W 5% 50V
LG1154A R2 16 15 14 13
+1.0V_VDD
VIN_1 SW_3
1 12
THERMAL
17
VIN_2 SW_2
+1.23V_CORE
2 11
R2340 IC2305-*1
L2300 56K GND_1

3
RT8079AGQW
10
SW_1
DCDC_RT
1/16W
BLM18PG121SN1D +1.0V_VDD
3A $ 0.145 1% GND_2
4
5
9
SS/TR
6 7 8
Vout=0.827*(1+R1/R2)=1.521V
AGND
FB
COMP
RT/SYNC
C2301
10uF
16V IC2303
DCDC_TI IC2300 TPS54821RHL [EP]GND
+12V
TPS54327DDAR [EP]GND
ZD2300
2.5V
R2307
+5.0V normal & USB
OPT
R2304 120K RT/CLK PWRGD

POWER_ON/OFF2_3 10K EN VIN 1 14
1 8
THERMAL
1/16W +1.1V_VDD
16V
THERMAL
1% C2318
15
0.1uF L2301 GND_1 BOOT

1% VFB VBST C2314 2 13
9
2 7 L2308 +5V_NORMAL
NR5040T2R2N 0.1uF
R2302 L2307 16V 1uH
R1 2.2uH DCDC_RT
+1.1V_VDD GND_2
3 12
PH_2 IC2304
11K VREG5 SW
3 6 IC2300-*1
C2324 RT8289GSP [EP]GND
C2308 RT7266ZSP [EP]GND
C2341
100pF C2322 C2323 0.01uF
50V PVIN_1 PH_1 22uF 22uF 22uF L2312 L2310
EN VIN 50V
ZD2302
SS GND 1 8 4 11
C2317 10V 4.7uH 4.7uH
2.5V
10V 10V
3A BOOT SW
THERMAL
4 5 C2319
22uF FB BOOT 1 8
9
2 7
OPT
DCDC_TI 10V 22uF
THERMAL
R2306 C2303 PVIN_2 EN
10V PVCC SW
5 10
D2300
B540C
3 6
33K C2310 C2312 10uF C2330 C2334 C2338
C2302 NC_1 VIN C2336
R2303
1/16W
40V
1uF 3300pF SS
4 5
GND 16V 2 7 22uF 22uF 0.1uF
180pF 10uF 50V
16K
10V 50V VIN SS/TR 10V 10V

1%
1% 50V R1 6 9 10V
R2 NC_2 GND
Switching freq: 700K R2316 1K +12V +24V 3 6
Vout=0.765*(1+R1/R2)
VSENSE 8A COMP
POWER_ON/OFF2_2
50V
7 8
FB EN
5A
C2321
L2314 L2311 4 5
R2305
1/16W
R2313
1.3K
C2313
22000pF
15K
R2 BLM18PG121SN1D
1%
4.7uF
16V OLED NON_OLED
50V
50V
C2320
C2315
C2309 POWER_ON/OFF1
C2311
10uF
4700pF
47pF
+12V 0.1uF
1/16W
R2315 0
+3.3V_NORMAL 35V 50V R2345

10K
5%
1%
+3.3V_NORMAL C2335
51K 0.1uF
L2305 Vout(1.24V)=0.6*(1+16k/15k) R2344 R1 16V
R2343
BLM18PG121SN1D
16K
R2
1%
Vout=0.6*(1+R1/R2)
C2329
C2304 150pF
10uF 50V
16V IC2301
TPS54327DDAR [EP]GND
ZD2301
Vout=1.222*(1+R1/R2)
5V
R2311
10K EN VIN
1 8
16V
POWER UP SEQUENCE
THERMAL
POWER_ON/OFF1 0.1uF
1% VFB VBST C2332
9
2 7 5V/3.3V->2.5V->1.5V/1.1V->1.0V
R2308 L2309
R1 3.6uH
51K VREG5
3 6
SW
LG1154D : 3.3V->2.5V->1.5V->1.1V
C2325
100pF SM-8040
50V
SS GND LG1154AN : 3.3V->2.5V->1.0V
OPT R2319
4
3A 5 C2339
22uF
10V
C2340
22uF
10V
15K C2326 C2328
1uF 3300pF
10V 50V
1%
Switching freq: 700K R2
Vout=0.765*(1+R1/R2)

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC4_H13 2013.03.05
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER_BLOCK(OLED) 23

Renesas MICOM
For Debug For CEC

+3.5V_ST
+3.5V_ST
8pF
8pF
MICOM_DEBUG
R3016 1K
R3014 10K
R3034
C3003
C3002
R3033 LOGO_LIGHT
Don’t remove R3014,
MICOM_DEBUG
MICOM_DEBUG 27K 120K
LOGO_LIGHT
MICOM_RESET
not making float P40
G
P3000
12507WS-04L D3000
X3000
BAT54_SUZHO
1 CEC_REMOTE HDMI_CEC
S
32.768KHz
2
MICOM_DEBUG Q3001 HDMI_WAUP:HDMI_INIT +3.5V_ST
RUE003N02 R3028
3
HDMI_CEC_FET_ROHM 4.7M
G
4
MICOM_RESET OPT
Q3001-*1 MHL_DET
5
SI1012CR-T1-GE3 MHL_DET
10K
D
S
HDMI_CEC_FET_VISHAY
R3032
10K
R3030
GND MICOM_RESET_SW
MICOM_RESET_22OHM
SW3000
JTP-1127WEM
22
2 1
R3031
Ready For C3004
270K
OPT
P124/XT2/EXCLKS
0.1uF
0.47uF
Commercial
+3.5V_ST 16V 4 3
R3029
P122/X2/EXCLK
P41/TI07/TO07
C3001
P137/INTP0
P120/ANI19
P40/TOOL0
ST_BY_DET_CAM ST_BY_DET_CAM
P123/XT1
C3000
P121/X1
0.1uF
MICOM_RESET_33OHM
R3029-*1 33
RESET
+3.5V_ST
REGC
VDD
VSS
R3021
10K
GP4 High/MID Power SEQUENCE
48
47
46
45
44
43
42
41
40
39
38
37
P60/SCLA0 1 36 P140/PCLBUZ0/INTP6 RL_ON
I2C_SCL_MICOM
POWER_ON/OFF! P61/SDAA0 2 35 P00/TI00/TXD1
I2C_SDA_MICOM SCART_MUTE SCART_MUTE
EDID_WP EDID_WP
P62 3 34 P01/TO00/RXD1
POWER_ON/OFF2_4 POWER_ON/OFF2_4
P63 4 33 P130
POWER_ON/OFF2_1 PANEL_CTL
P31/TI03/TO03/INTP4 IC3000 P20/ANI0/AVREFP
POWER_ON/OFF2_1
WOL/WIFI_POWER_ON 5 32 KEY2
IR
P75/KR5/INTP9/SCK01/SCL01 6 R5F100GEAFB 31 P21/ANI1/AVREFM
POWER_ON/OFF2_2 KEY1
P74/KR4/INTP8/SI01/SDA01 7 30 P22/ANI2
HDMI_CEC MODEL1_OPT_1
P73/KR3/SO01 MICOM_LEAD_Au P23/ANI3
POWER_ON/OFF2_3 POWER_ON/OFF2_2 8 29 MODEL1_OPT_4
POWER_ON/OFF2_3
P72/KR2/SO21 9 28 P24/ANI4
MODEL1_OPT_0
P71/KR1/SI21/SDA21 10 27 P25/ANI5
EYE_SDA SIDE_HP_MUTE
POWER_ON/OFF2_4
P70/KR0/SCK21/SCL21 11 26 P26/ANI6
EYE_SCL MODEL1_OPT_3
P30/INTP3/RTC1HZ/SCK11/SCL11 12 25 P27/ANI7
CAM_PWR_ON_CMD CAM_PWR_ON_CMD MODEL1_OPT_2
SOC_RESET
13
14
15
16
17
18
19
20
21
22
23
24
EYE_Q
R3035
R3036
EYE_Q
3.3K
3.3K
+3.5V_ST
P50/INTP1/SI11/SDA11
P51/INTP2/SO11
P17/TI02/TO02
P16/TI01/TO01/INTP5
P15/PCLBUZ1/SCK20/SCL20
P14/RXD2/SI20/SDA20
P13/TXD2/SO20
P12/SO00/TXD0/TOOLTXD
P11/SI00/RXD0/TOOLRXD/SDA00
P10/SCK00/SCL00
P146
P147/ANI18
MICOM MODEL OPTION MICOM MODEL OPTION
+3.5V_ST
0 1
MICOM_OLED_MAIN
MICOM_OLED_FRC
R3007-*1
R3007-*2
MODEL_OPT_0 NON LOGO LOGO For LOGO LIGHT

MICOM_LOGO_LIGHT
MICOM_TOUCH_KEY
MICOM_NC4_8PIN
10K
10K
10K
10K
10K
10K
56K
22K
MICOM_GED
MICOM_H13
MICOM_PDP
MODEL_OPT_1 TACT_KEY TOUCH_KEY Ready for sample set

R3002
R3003
R3006
R3007
R3013
R3010
MODEL_OPT_2 LCD / OLED PDP Need to Assign ADC port
MODEL_OPT_3 IR_wafer(12/15) IR_wafer(10pin) Ready for sample set
P124/XT2/EXCLKS
P122/X2/EXCLK
P41/TI07/TO07
MODEL_OPT_4 M13 H13
P137/INTP0
P120/ANI19
P40/TOOL0
MODEL1_OPT_0
P123/XT1
P121/X1
MODEL1_OPT_1
RESET
MODEL_OPT_5 NON_GED GED
REGC
VDD
VSS
MODEL1_OPT_2
MODEL1_OPT_3
48
47
46
45
44
43
42
41
40
39
38
37
MODEL1_OPT_4 P60/SCLA0 1 36 P140/PCLBUZ0/INTP6
P61/SDAA0 P00/TI00/TXD1
POWER_DET
SOC_RX
AMP_MUTE
CAM_CTL
2 35
WOL/ETH_POWER_ON
SOC_RESET
INV_CTL
MODEL1_OPT_5
WOL_CTL
POWER_ON/OFF1
SOC_TX
MODEL1_OPT_5
LED_R
P62 3 34 P01/TO00/RXD1
P63 4 33 P130
P31/TI03/TO03/INTP4 IC3000-*1 P20/ANI0/AVREFP
MICOM_NON_LOGO_LIGHT
5 32
MICOM_GP3_12/15PIN
P75/KR5/INTP9/SCK01/SCL01 6 R5F100GEAFB#30 31 P21/ANI1/AVREFM

MICOM_LCD/OLED
MICOM_TACT_KEY
MICOM_NON_GED
P74/KR4/INTP8/SI01/SDA01 P22/ANI2
10K
10K
10K
10K
10K
10K
7 30
MICOM_M13
P73/KR3/SO01 MICOM_LEAD_Cu P23/ANI3

8 29
P72/KR2/SO21 9 28 P24/ANI4
P71/KR1/SI21/SDA21 P25/ANI5
R3000
R3001
R3004
R3005
R3008
R3012
10 27
P70/KR0/SCK21/SCL21 11 26 P26/ANI6
P30/INTP3/RTC1HZ/SCK11/SCL11 12 25 P27/ANI7
LED_R
CAM_CTL
13
14
15
16
17
18
19
20
21
22
23
24
P50/INTP1/SI11/SDA11
P51/INTP2/SO11
P17/TI02/TO02
P16/TI01/TO01/INTP5
P15/PCLBUZ1/SCK20/SCL20
P14/RXD2/SI20/SDA20
P13/TXD2/SO20
P12/SO00/TXD0/TOOLTXD
P11/SI00/RXD0/TOOLRXD/SDA00
P10/SCK00/SCL00
P146
P147/ANI18
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NetCast4.0 2013.02.05
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MICOM (RENESAS) 30

5V_HDMI_1
R3250 33
HDMI_HPD_1
AVDD12_3
[EP]GND
VDD33_2
TPVDD12
TCVDD12
VDD12_3
VA3215 +5V_NORMAL
R0X2P
R0X2N
R0X1P
R0X1N
R0X0P
R0X0N
R0XCP
R0XCN
TXCN
TXCP
TX0N
TX0P
TX1N
TX1P
TX2N
TX2P
VA3208 ESD_HDMI
ARC
BODY_SHIELD 5V_HDMI_4 IC3202
ESD_HDMI
TPS2051BDBVR
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
OPT UD
R1XCN 1 66 RSVDL
R1XCP 2 65 SPDIF_IN
THERMAL
R3207 22 GND 5V_HDMI_4 D3206 R3254 R1X0N 3 89 64 INT
BODY_SHIELD 100 R1X0P 4 63 CSCL
DDC_SDA_1 MBR230LSFT1G OUT IN MHL_ON_OFF R1X1N 5 62 CSDA
R3208 22 1 5 R1X1P 6 61 RESET_N
20 20 1/16W R1X2N 7 60 TPWR
DDC_SCL_1 R3253 30V R1X2P GPIO1

HDMI_FREEPORT HP_DET 33 C3208 5% AVDD12_1
8 IC3201-*1 59
GPIO0
R3215
HDMI_FREEPORT HP_DET 9 58
D3204
HDMI_HPD_4 SII9587CNUC-3
C3205 GND
100K
VDD12_1 CD-SENSE4
19 0.1uF 10 57
19 2 R3XCN CD_SENSE3
5V VA3206 VA3207 ARC 5V 10uF R3XCP
11
12
56
55 GPIO2
R3248
ESD_HDMI VA3212 10V R3X0N 13 54 CD_SENSE1
18 ESD_HDMI 18 ESD_HDMI 5% R3X0P CD_SENSE0

OPT
14 53
GND VA3216 OC EN R3X1N WKUP
1K
GND ESD_HDMI 1/16W A1

15 52
3 4 R3X1P 16 51 LPSBV
17 17 R3X2N 17 50 PWRMUX_OUT
DDC_DATA C3202 DDC_DATA R3222 22 10K C R3X2P SBVCC5
1uF SPDIF_OUT_ARC DDC_SDA_4 MHL_DET AVDD12_2
18 49
R5PWR5V[VGA]
R3245 19 48
5%
1/16W
220K
R3206
16 16 A2 VDD33_1 20 47 DSCL5[VGA]
DDC_CLK DDC_CLK R3223 22 R4XCN 21 46 DSDA5[VGA]
10V OPT DDC_SCL_4 R4XCP 22 45 R4PWR5V
R3249
15 C3226 15
3.9K
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
VA3213 NC VA3211
OPT
ARC ESD_HDMI 0.1uF VA3210
R4X0N
R4X0P
R4X1N
R4X1P
R4X2N
R4X2P
VDD12_2
DSDA0
DSCL0
CBUS_HPD0
R0PWR5V
DSDA1
DSCL1
CBUS_HPD1
R1PWR5V
DSDA3
DSCL3
CBUS_HPD3
R3PWR5V
DSDA4
DSCL4
CBUS_HPD4
14 ESD_HDMI
14 16V CE_REMOTE ESD_HDMI
CE_REMOTE
CEC_REMOTE CEC_REMOTE
13 13
CK- CK- D3215
12
RCLAMP0524PA
12 D3210 CK_GND 1 10 HDMI_ESD_NXP
D3215-*1
CK_GND CK-_HDMI4 IP4283CZ10-TBA
RCLAMP0524PA
EAG62611204
EAG62611204
11 1 10 11
CK+ 2 9 TMDS_CH1-
1 10
NC_4
CK+ CK-_HDMI1
HDMI_ESD_NXP
D3210-*1
10 CK+_HDMI4 TMDS_CH1+
2 9
NC_3
10 IP4283CZ10-TBA
3 8
2 9 TMDS_CH1- NC_4 D0-
GND_1
3 8
GND_2
D0- CK+_HDMI1 1 10
9
9 3 8 TMDS_CH1+
2 9
NC_3 4 7 TMDS_CH2-
4 7
NC_2
GND_1 GND_2 D0_GND D0-_HDMI4 TMDS_CH2+

5 6
NC_1
D0_GND 3 8
8 5 6
8 4 7 TMDS_CH2-
4 7
NC_2
D0+_HDMI4
D0-_HDMI1 TMDS_CH2+ NC_1 D0+
D0+ 5 6 5 6
7 HDMI_ESD_NXP
7 D0+_HDMI1 HDMI_ESD_SEMTEK D3214-*1

IP4283CZ10-TBA
D1- +3.5V_ST
D1- 6
TMDS_CH1-
1 10
NC_4
6 HDMI_ESD_SEMTEK D3214 TMDS_CH1+

2 9
NC_3
D1_GND D1_GND RCLAMP0524PA GND_1 GND_2
5 5 3 8
1 10
R3246
TMDS_CH2- NC_2
4 7
D1+ D1+ D1-_HDMI4
10K
TMDS_CH2+ NC_1
4 D3211 4 2 9 5 6
RCLAMP0524PA HDMI_ESD_NXP D1+_HDMI4

D2-
D3211-*1
D2-
3 1 10 IP4283CZ10-TBA
3 3 8 R3247 E MMBT3906(NXP)
D1-_HDMI1 TMDS_CH1-
1 10
NC_4
R3243 10K Q3201
D2_GND 2 9 D2_GND 4 7 1K HDMI1
2 D1+_HDMI1
TMDS_CH1+
2 9
NC_3
2 D2-_HDMI4 HDMI S/W OUTPUT
GND_1 GND_2
B
3 8 3 8
D2+ 5 6
CK+_HDMI1
D2-_HDMI1
D1+_HDMI1
D1-_HDMI1
D0+_HDMI1
D0-_HDMI1
CK-_HDMI1
1/16W
D2+_HDMI1
D2+
HDMI_CLK-
HDMI_RX0-
HDMI_RX0+
HDMI_RX1-
HDMI_RX1+
HDMI_RX2-
HDMI_RX2+
HDMI_CLK+
TMDS_CH2- NC_2
1
4 7
1 D2+_HDMI4 C C
4 7 TMDS_CH2+
5 6
NC_1 5% C3223
D2-_HDMI1 HDMI_ESD_SEMTEK 0.047uF B
5 6 25V MHL_DET
D2+_HDMI1 Q3200
D3207
5.6V
JK3202 HDMI_ESD_SEMTEK 51U019S-312HFN-E-R-B-LG MMBT3904(NXP) E
HDMI4 With MHL
51U019S-312HFN-E-R-B-LG JK3203
HDMI1 With ARC
+5V_NORMAL
R3251 5V_HDMI_1 +5V_NORMAL
33 5V_HDMI_2
HDMI_HPD_2
L3202
L3203
5V_HDMI_2
A1
A2
BODY_SHIELD
VA3205
A1
A2
20 ESD_HDMI D3200
HDMI_FREEPORT HP_DET D3202
C
16V
19
AVDD12_3
C
5V R3209 22 0.1uF
C3224
[EP]GND
VDD33_2
TPVDD12
TCVDD12
VDD12_3
DDC_SDA_2 C3225
18 R3219 0.1uF
GND VA3209 R3217
R0X2P
R0X2N
R0X1P
R0X1N
R0X0P
R0X0N
R0XCP
R0XCN
16V
ESD_HDMI 47K 47K R3228
TXCN
TXCP
TX0N
TX0P
TX1N
TX1P
TX2N
TX2P
17 R3210 22 R3225
DDC_DATA
ARC
DDC_SCL_2 DDC_SDA_1 47K
47K
16 VA3203
DDC_CLK VA3204 DDC_SDA_2 +3.3V_NORMAL
ESD_HDMI DDC_SCL_1
15 ESD_HDMI
NC DDC_SCL_2
10K
R3202
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
14
CE_REMOTE
D3212 +5V_NORMAL HDMI2 R1XCN RSVDL
13
CEC_REMOTE RCLAMP0524PA 5V_HDMI_3 CK-_HDMI2
1 66
CK- 1 10 HDMI_ESD_NXP +5V_NORMAL +3.5V_ST
CK-_HDMI2
D3212-*1
IP4283CZ10-TBA
5V_HDMI_4 R1XCP 2 65 SPDIF_IN
12 2 9 CK+_HDMI2 THERMAL
CK_GND TMDS_CH1-
1 10
NC_4
R1X0N INT R3211 33

A1
A2
CK+_HDMI2
3 64
EAG62611204
11 3 8
TMDS_CH1+
2 9
NC_3
D0-_HDMI2
89 HDMI_INT
A1
A2
A1
A2
CK+ GND_1
3 8
GND_2
10
4 7 TMDS_CH2-
4 7
NC_2
D3201 R1X0P 4 63 CSCL R3236 33
I2C_SCL5
D0- D0-_HDMI2 TMDS_CH2+
5 6
NC_1
D3203 D3205 D0+_HDMI2
C
9 5 6 R1X1N 5 62 CSDA R3237 33

D0+_HDMI2 I2C_SDA5
C
D0_GND D1-_HDMI2
8 R1X1P 6 61 RESET_N R3214 33
HDMI_ESD_SEMTEK D1+_HDMI2
HDMI_S/W_RESET
D0+ R3218 R3220
7 R1X2N 7 60 TPWR
47K 47K R3226 R3229
D1- D2-_HDMI2
6 47K 47K R1X2P 8 59 GPIO1
D1_GND D3213 DDC_SDA_3 DDC_SDA_4
D2+_HDMI2 IC3201
5 RCLAMP0524PA HDMI_ESD_NXP
D3213-*1
AVDD12_1 9 58 GPIO0
1 10
SII9587CNUC
IP4283CZ10-TBA
D1+ D1-_HDMI2 DDC_SCL_4

4
2 9
TMDS_CH1-
1 10
NC_4
DDC_SCL_3 VDD12_1 10 57 CD-SENSE4
TMDS_CH1+
2 9
NC_3 MHL_DET
D2- D1+_HDMI2
3 3 8
GND_1
3 8
GND_2
HDMI3 R3XCN 11 56 CD_SENSE3

2
D2_GND
D2+
4 7
D2-_HDMI2
TMDS_CH2-
TMDS_CH2+
4
5
7
6
NC_2
NC_1
CK-_HDMI3
CK+_HDMI3
R3XCP 12 FHD 55 GPIO2 +3.5V_ST
+5V_NORMAL
1 5 6 R3X0N CD_SENSE1
D2+_HDMI2
D0-_HDMI3
13 54
1/16W
10K
R3244
HDMI_ESD_SEMTEK R3X0P 14 53 CD_SENSE0 R3213
D0+_HDMI3 5.1K
JK3200
+3.3V_NORMAL
+5V_NORMAL D1-_HDMI3
R3X1N 15 Device Address : 0XB0 52 WKUP 5%
51U019S-312HFN-E-R-B-LG
R3X1P 16 51 LPSBV
HDMI2 D1+_HDMI3
R3204
R3X2N 17 50 PWRMUX_OUT
10K
D2-_HDMI3 R3216
R3X2P 18 49 SBVCC5 10
D2+_HDMI3
AVDD12_2 R5PWR5V[VGA]
G
19 48
R3252 HDMI_FOOSUNG HDMI_FOOSUNG VDD33_1 20 47 DSCL5[VGA]
JK3200-*1 JK3201-*1
33
S
DAADR019A DAADR019A
HDMI_HPD_3
AO3438
R4XCN 21 46 DSDA5[VGA]
TMDS_DATA2+ TMDS_DATA2+
Q3202 C3211
TMDS_DATA2_SHIELD
1
2
TMDS_DATA2_SHIELD
1
2
C3200 C3210 0.1uF
R4XCP 22 45 R4PWR5V
VA3202 10uF 0.1uF
TMDS_DATA2-
3
TMDS_DATA2-
3 16V C3209 C3215
5V_HDMI_3 ESD_HDMI 10V 16V C3222
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
4 4 0.1uF 0.1uF
BODY_SHIELD TMDS_DATA1_SHIELD
5
TMDS_DATA1_SHIELD
5 16V 16V 10uF
TMDS_DATA1-
6
TMDS_DATA1-
6 C3212 10V
20 7 7 C3218
R4X0N
R4X0P
R4X1N
R4X1P
R4X2N
R4X2P
VDD12_2
DSDA0
DSCL0
CBUS_HPD0
R0PWR5V
DSDA1
DSCL1
CBUS_HPD1
R1PWR5V
DSDA3
DSCL3
CBUS_HPD3
R3PWR5V
DSDA4
DSCL4
CBUS_HPD4
TMDS_DATA0_SHIELD TMDS_DATA0_SHIELD
HDMI_FREEPORT HP_DET
8 8 1uF 10uF
R3203 22 TMDS_DATA0-
9
TMDS_DATA0-
9
IC3200 10V 10V
19 DDC_SDA_3 TMDS_CLK+ TMDS_CLK+
5V
TMDS_CLK_SHIELD
10
TMDS_CLK_SHIELD
10
AZ1117BH-1.2TRE1
11 11
18 R3205 22 TMDS_CLK- TMDS_CLK-
GND VA3214 DDC_SCL_3
12 12
CEC CEC
ESD_HDMI 13 13
17 RESERVED RESERVED
DDC_DATA 14 14
SCL SCL
15 15
16 SDA SDA
IN OUT
DDC_CLK 16 16 3 2
DDC/CEC_GND DDC/CEC_GND
17 17
15 VA3200 VA3201 VDD[+5V] VDD[+5V] 1
NC 18 18
HOT_PLUG_DETECT HOT_PLUG_DETECT
ESD_HDMI ESD_HDMI 19 19 GND/ADJ
14
R3212
1/16W
CE_REMOTE 20 20
CEC_REMOTE D3209
13 RCLAMP0524PA BODY_SHIELD BODY_SHIELD
5%
CK-
1
1 10 HDMI_ESD_NXP C3204 C3206 C3207

12 CK-_HDMI3 D3209-*1
IP4283CZ10-TBA
0.1uF 0.1uF 0.1uF
CK_GND 2 9 HDMI_FOOSUNG HDMI_FOOSUNG
JK3202-*1
16V 16V 16V
EAG62611204
TMDS_CH1- NC_4
1 10 JK3203-*1
11 CK+_HDMI3 DAADR019A DAADR019A
CK+ 3 8 TMDS_CH1+
2 9
NC_3
C3203
10 GND_1
3 8
GND_2
TMDS_DATA2+
1 TMDS_DATA2+ 10uF
D0- 4 7 TMDS_CH2-
4 7
NC_2
1 C3201
10V C3217
9 D0-_HDMI3 TMDS_CH2+
5 6
NC_1
2 2 10uF
5 6 TMDS_DATA2-
3 TMDS_DATA2- 0.1uF
D0_GND D0+_HDMI3
3 10V
TMDS_DATA1+
4 TMDS_DATA1+ 16V
8 TMDS_DATA1_SHIELD
4
5 TMDS_DATA1_SHIELD
D0+ HDMI_ESD_SEMTEK TMDS_DATA1-
6 TMDS_DATA1-
5
7 TMDS_DATA0+
6
TMDS_DATA0+
DDC_SDA_1
DDC_SCL_1
DDC_SDA_2
DDC_SCL_2
7 7
CK-_HDMI4
CK+_HDMI4
D0-_HDMI4
D0+_HDMI4
D1-_HDMI4
D1+_HDMI4
D2-_HDMI4
D2+_HDMI4
D1-
DDC_SDA_3
DDC_SCL_3
DDC_SDA_4
DDC_SCL_4
HDMI_HPD_1
HDMI_HPD_2
HDMI_HPD_3
HDMI_HPD_4
8
6 TMDS_DATA0-
8
9 TMDS_DATA0-
9
D1_GND D3208 TMDS_CLK+
10 TMDS_CLK+
5 RCLAMP0524PA TMDS_CLK_SHIELD
10
11 TMDS_CLK_SHIELD
D1+ 1 10 11
4
2 9
D1-_HDMI3
HDMI_ESD_NXP
D3208-*1
IP4283CZ10-TBA
TMDS_CLK-
CEC
12
13
TMDS_CLK-
CEC
12
13
Vout=0.8*(1+R1/R2)
D2- D1+_HDMI3 TMDS_CH1-
1 10
NC_4
RESERVED
14 RESERVED HDMI4
3 3 8 TMDS_CH1+
2 9
NC_3
SCL
14
15 SCL
15
D2_GND GND_1
3 8
GND_2
SDA
16 SDA
2 4 7 TMDS_CH2-
4 7
NC_2
DDC/CEC_GND DDC/CEC_GND
16
D2-_HDMI3 17 17
D2+ 5 6
TMDS_CH2+
5 6
NC_1
VDD[+5V]
18 VDD[+5V]
1 18
D2+_HDMI3 HOT_PLUG_DETECT
19 HOT_PLUG_DETECT
19 5V_HDMI_1 5V_HDMI_2 5V_HDMI_3 5V_HDMI_4
HDMI_ESD_SEMTEK 20 20
R3240 R3238
BODY_SHIELD BODY_SHIELD R3231 R3232 10 10
10 10
JK3201
51U019S-312HFN-E-R-B-LG 1/16W 1/16W
1/16W 1/16W C3220 R3241 C3219 R3239
HDMI3 C3213 R3233
5.1K
C3214 R3234
5.1K
1uF 5.1K
1uF
5.1K
1uF 1uF 5% 5%
5% 5%

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 32

JK3401
+3.3V_NORMAL JSTIB15 R3404
150 JACK_PARK JACK_KSD
VIN HP_LOUT
SPDIF OUT A 1/10W JK3403 JK3403-*1
Fiber Optic
5% +3.3V_NORMAL PEJ038-3B6 KJA-PH-0-0177
VCC GND 5 GND 5

B
R3406
R3400 HP_OUT 10K L 4 L 4
33 GND C HP_OUT
SPDIF_OUT R3409
VA3400 C3400 100 DETECT 3 DETECT 3
4 HP_DET
C3402 5.5V 0.1uF
1/16W
47pF 16V
SHIELD
5% R 1 R 1
50V OPT R3405
150
ADUC 5S 02 0R5L HP_ROUT EAG61030009 EAG61030001
1/10W
5%
VA3405
5.6V
COMPONENT 1 PHONE JACK +3.3V_NORMAL CVBS 1 PHONE JACK

OPT
+3.3V_NORMAL
C3401
18pF
R3402
10K R3403
R3407 330K
100 R3408
COMP1_DET 100
1/16W AV1_CVBS_DET
5% 1/16W
VA3401 C3403 5%
VA3402
5.6V 5.6V 0.1uF
JACK_PARK JACK_PARK 16V
JK3400 JK3402 for audio Hum noise (L)
PEJ038-4G6 PEJ038-4Y6
5 M5_GND 5 M5_GND
4 M4 COMP1_Y 4 M4
COMP1/AV1/DVI_L_IN
3 M3_DETECT 3 M3_DETECT
VA3403
5.6V
1 M1 1 M1
6 M6 6 M6
EAG61030012 EAG61030011
COMP1_Pb
JACK_KSD COMP1/AV1/DVI_R_IN
JACK_KSD
JK3400-*1
KJA-PH-1-0177-2 JK3402-*1 VA3404
KJA-PH-1-0177-1 5.6V
5 M5_GND
5 M5_GND
4 M4
4 M4
3 M3_DETECT
3 M3_DETECT
COMP1_Pr
1 M1
1 M1
AV1_CVBS_IN
6 M6
6 M6
EAG61030007
EAG61030006
SOC_RX
SOC_TX
+3.5V_ST P3400
12507WS-04L
1
R3401
10K

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS JACK HIGH/MID 2012.10.09

EPI_LOCK6
VCOM_DYN
PMIC_RESET
I2C_SDA2
I2C_SCL2
GST_SOC
GCLK_SOC
EO_SOC
MCLK_SOC
SMD TOP for EMI
GASKET_8.0X6.0X8.5H
M201
MDS62110209
EA98
GASKET_8.0X6.0X8.5H
M202
MDS62110209
GASKET_8.0X6.0X8.5H
M203
MDS62110209

NON_EPI(OLED) 36

+3.5V_ST
Place Near Micom

R4008 R4009
+3.5V_ST 10K 10K
LOGO_LIGHT 5% 5%
R4003 33
R4006
LOGO_LIGHT 100
10K
R4004 33 KEY1
LOGO_LIGHT_WAFER
R4000
OPT
R4007 VA4001
100 5.6V
C KEY2 AMOTECH CO., LTD.
LOGO_LIGHT
B C4001 C4002
LOGO_LIGHT 0.1uF 0.1uF IR_WAFER_8P
LOGO_LIGHT
1K Q4000 VA4000 P4002

LOGO_LIGHT
R4002 5.6V 12507WR-08L

R4001
C4000 MMBT3904(NXP) E
LOGO_LIGHT AMOTECH CO., LTD.
10K
0.1uF
16V
+3.5V_ST KEY2
1
L4001
BLM18PG121SN1D
+3.5V_ST
2
+3.5V_ST
C4005
1000pF GND
50V 3
R4005
10K LOGO
LOGO_LIGHT_WAFER 4
5%
NON_OLED NON_OLED IR
IR 5
C4006 VA4002
100pF 5.6V GND
50V AMOTECH CO., LTD. 6
R4011
100 EYE_SCL
EYE_SCL 7
VA4004 EYE_SDA
ADMC 5M 02 200L 8
OPT
R4010
100 9
EYE_SDA
VA4003 GND
ADMC 5M 02 200L
OPT
OLED_EYE_SCL
OLED_EYE_SDA
+3.3V_NORMAL
+3.5V_WOL
L4000
120-ohm
MAX 0.4A L4002
120-ohm
BLM18PG121SN1D
P4003
C4004
22uF
10V
SMAW200-H18S1 C4007
0.1uF
R4012
100
+3.5V_WOL 1 2 3.3V C4012
M_REMOTE_RTS
1000pF
50V
USB_DM RST AR4000 +3.3V_NORMAL
WIFI_DM 3 4 For EMI

100
R4014
USB_DP RX 1/16W
5 6
10K
WIFI_DP
C4016 C4015
5pF
50V
5pF
50V
GND 7 8 TX M_REMOTE_RX
M_REMOTE_TX
WOL/WIFI_POWER_ON
WOL 9 10 RESET
M_RFModule_RESET
GND 11 12 CTS
M_REMOTE_CTS
L4003 +3.5V_ST
NC 13 14 +3.5V_ST BLM18PG121SN1D
OPT OPT
C4011 C4008 C4009 C4013 C4014
R4013
22
IR 15 16 GND 1000pF
50V 47pF 47pF 47pF
50V 50V 50V
47pF
50V
IR
C4010
100pF
VA4005
5.6V
EYE_SCL 17 18 EYE_SDA For EMI
AMOTECH CO., LTD. OLED_EYE_SDA
50V
OPT OLED_EYE_SCL
OPT
19 GND

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR/KEY_OLED 40

+3.3V_NORMAL
CAMERA CAMERA
C4202 C4203
4.7uF
PSELF R4215100K CAMERA

100K CAMERA
0.1uF
10K R4218
OPT10K R4219
R4216
[EP]GND
OVCUR1
OVCUR2
PGANG
V33
SDA
V5
+3.3V_NORMAL
28
27
26
25
24
23
22
CAMERA
0 R4204 DM0 DVDD
USB2_HUB_IC_IN_DM 1 21 CAMERA
0 R4205 CAMERA THERMAL C4208
CAMERA
R4217
1/16W
DP0 2 20 OVCUR3
USB2_HUB_IC_IN_DP 29
0.1uF
10K
5%
0 R4206 CAMERA DM1 OVCUR4
USB_DM3 3 CAMERA 19
+3.3V_NORMAL
CAMERA 0 R4210 CAMERA DP1 IC4200 TEST/SCL
USB_DP3 4 18
L4200
120-ohm
GL852G-31
AVDD_1 5 17 RESET
/RST_HUB
BLM18PG121SN1D C4200 DM2 DP4
CAMERA USB_CAMERA_DM 6 16
C4201 C4209
1uF DP2 DM4
0.1uF 7 15 0.1uF
25V USB_CAMERA_DP
CAMERA CAMERA
10
11
12
13
14
8
9
RREF
AVDD_2
X1
X2
DM3
DP3
AVDD_3
CAMERA
R4214
1% 680
From HUB CAMERA
C4205 C4206 USB_Camera P4200

12507WR-12L
0.1uF 0.1uF
CAMERA CAMERA
CAM_SLIDE_DET
OPT 1
X4200
12MHZ 33pF
+3.5V_CAM
X-TAL_1 GND_2 50V C4215
1 4 2
GND_1 X-TAL_2
ZD4200
CAMERA
C4207
2 3 C4213
R4211
22pF
CAMERA
5V
4.7uF
C4204
22pF
CAMERA 10V 33 CAMERA CAMERA 3
OPT
CAMERA
AUD_LRCH 33pF
R4212 50V C4214
33 CAMERA CAMERA
4
AUD_LRCK 33pF
R4213 50V C4212
33 CAMERA
+5V_NORMAL +3.5V_CAM 5
CAMERA POWER ENABLE CONTROL AUD_SCK CAMERA 33pF
50V C4211
CAMERA_NON_OLED L4201 6
+3.5V_ST
Q4201 UBW2012-121F
PMV48XP OLED
D
CAM_PWR_ON_CMD 7
G
CAMERA_NON_OLED
ST_BY_DET_CAM 8
CAMERAVA4201
VA4200
R4208 C4210
22K 4.7uF
NON_CAMERA 10V R4220
NON_CAMERA 9
CAMERA
0 R4200 0 R4202 CAMERA_NON_OLED 10K
USB2_HUB_IC_IN_DM USB_DM3 CAMERA
0 R4201 0 R4203
USB2_HUB_IC_IN_DP USB_DP3 USB_CAMERA_DP 10
R4209
NON_CAMERA NON_CAMERA 2.2K
CAMERA_NON_OLED
USB_CAMERA_DM 11
C
R4207
CAM_CTL
RCLAMP0502BA
3.3K B Q4200
OPT D4200
MMBT3904(NXP) 12
CAMERA_NON_OLED CAMERA_NON_OLED
E
13

USB_HUB 42

+5V_USB_1
USB1 (3.0)
C4400
MAX 1.2A
10uF
10V JK4400
SJ113262
+3.3V_NORMAL
VBUS
1
OCP USB1 D-
R4500 USB3_DM 2
10K R4501
OPT 10K
D+
USB3_DP 3
IC4500
BD82020FVJ +5V_USB_1 GND
4
+5V_NORMAL
GND OUT_3 STDA_SSRX-
1 8 USB3_RX0M 5
IN_1 OUT_2 STDA_SSRX+

2 7 USB3_RX0P 6
C4500 C4501
0.1uF IN_2 OUT_1 GND_DRAIN
3 6 10uF 7
16V
10V
EN OC STDA_SSTX-
4 5 USB3_TX0M 8
/USB_OCD1
STDA_SSTX+
USB_CTL1 USB3_TX0P 9
RCLAMP0502BA
RCLAMP0502BA
RCLAMP0502BA
10
D4400
D4402
D4401
SHIELD
OCP USB2/3 USB2 (2.0)

+3.3V_NORMAL
+5V_USB_2 +5V_USB_3
USB3 (2.0)
MAX 1.0A MAX 1.0A
10K
10K
3AU04S-305-ZC-(LG) 3AU04S-305-ZC-(LG)
JK4302 JK4300
IC4306
R4301
TPS2066CDGNR [EP]GND
R4302
1
+5V_NORMAL
USB DOWN STREAM
USB DOWN STREAM

GND FLT1
1 8
2
C4302 USB_DM2 USB_DM3
/USB_OCD3
THERMAL
0.1uF
+5V_USB_3
RCLAMP0502BA
RCLAMP0502BA
16V IN OUT1
9
2 7
3
3
USB_DP2 USB_DP3
+5V_USB_2
EN1 OUT2 C4322
D4302
D4300
3 6 C4310
4
4
USB_CTL3
10uF
10uF
10V
5
5
EN2 FLT2 10V
USB_CTL2 4 5 /USB_OCD2
C4337 C4301
10uF 10uF
10V 10V

USB JACK

+3.3V_NORMAL
EU
R4801
Full Scart(18 Pin Gender) 10K CLOSE TO JUNCTION
EU
R4802
100
SC_DET
1/16W
EU
C4804 5%
VA4801
5.6V 0.1uF
EU
SC_CVBS_IN
VA4807
SHIELD 5.5V
EU
19
AV_DET 75 R4800
18
COM_GND EU
VA4808 DTV/MNT_V_OUT
17 5.5V
SYNC_IN OPT
16
SYNC_OUT
15
SYNC_GND
14
RGB_IO
13 SC_FB
R_OUT VA4802
12 5.6V
R_GND EU
11
G_OUT
10
G_GND
9 SC_R
ID
8 VA4803
B_OUT
5.5V
7
AUDIO_L_IN EU
6
B_GND
5 SC_G
AUDIO_GND
4 VA4804
AUDIO_L_OUT
5.5V
3
AUDIO_R_IN EU
2
AUDIO_R_OUT
1
SC_B
VA4805
5.5V
DA1R018H91E
EU
JK4800
EU
SC_ID
SC_L_IN
VA4800 VA4809
5.6V
20V EU
EU
SC_R_IN
VA4806
5.6V
EU
BLM18PG121SN1D
L4800
DTV/MNT_L_OUT
EU EU EU
C4800 C4802
1000pF 4700pF
50V
BLM18PG121SN1D
L4801
DTV/MNT_R_OUT
EU
EU EU C4803
C4801 4700pF
1000pF
50V

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 2012.10.31
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SCART GENDER

Ethernet Block
LAN_JACK_POWER
C5100 C5101 C5102 C5103

0.1uF 0.01uF 0.1uF 0.01uF
16V 50V 16V 50V
JK5100
XRJH-01A-4-DA7-180-LG(B)
LAN_XML
P1[CT]
1
P2[TD+]
2
EPHY_TDP
P3[TD-]
3
EPHY_TDN
P4[RD+]
4
EPHY_RDP
P5[RD-]
5
EPHY_RDN
P6[CT] VA5100 VA5101 VA5102 VA5103

6
5.5V 5.5V 5.5V 5.5V
P7
7
P8
8
P9
9
P10[GND]
10
P11
11
YL_C
D1
YL_A
D2
GN_C
D3
GN_A
D4
12
SHIELD
JK5100-*1
TLA-6T764
LAN_TDK
R1
1
R2
2
R3
3
R4
4
R5
5
R6
6
R7
7
R8
8
R9
9
R10[GND]
10
R11
11
YL_C
D1
YL_A
D2
GN_C
D3
GN_A
D4
12
SHIELD

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS LAN_VERTICAL 2011.12.09
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 50

Ethernet Block
+3.3V_WOL
3.3K
R5215
EPHY_ACTIVITY
ET_RXER
R5217 3.3K
LAN_JACK_POWER
+3.3V_WOL Place this cap. near IC

+3.5V_WOL
C5208
ET_COL/SNI 0.1uF
L5200 120-ohm C5200 C5201 C5203 16V
BLM18PG121SN1D 4.7uF 0.1uF 0.1uF
10V 16V 16V
EPHY_ACTIVITY
EPHY_CRS_DV
Place 0.1uF close to each power pins
ET_COL/SNI
ET_RXER
X-TAL_1
GND_1
C5206
20pF +3.3V_WOL
50V
1M R5202
R5218
2
1
25MHz
X5200
R5210
0
OPT
3
4
X-TAL_2
GND_2
33
+3.3V_WOL
LED1/PHYAD[1]
Place this cap. near IC C5207
CRS/CRS_DV
DVDD10OUT
RXER/FXEN
20pF
AVDD33_2
CKXTAL2
CKXTAL1
50V
R5212
1/16W
R5219
1/16W
R5205
[EP]
3.3K
1.5K
C5205
COL
10K
Place this Res. near IC
1%
5%
0.1uF
16V
32
31
30
29
28
27
26
25
R5204
2.49K 1% WOL/ETH_POWER_ON
RSET 1 24 LED0/PHYAD[0]/PMEB
THERMAL
AVDD10OUT 2 33 23 MDIO EPHY_MDIO
Route Single 50 Ohm, Differential 100 Ohm MDI+[0] MDC
3 22 EPHY_MDC
EPHY_TDP
MDI-[0] IC5200 PHYRSTB 33 R5220
4 21 /RST_PHY (from SOC)
EPHY_TDN RTL8201F-VB-CG
MDI+[1] 5 20 TXEN
EPHY_RDP EPHY_EN
MDI-[1] TXD[3] OPT
+3.3V_WOL 6 19 C5212 33 R5221
EPHY_RDN EDID_WP (PHY reset from MICOM)
AVDD33_1 TXD[2] 0.1uF
7 18
OPT
R5203 RXDV TXD[1]
8 17 EPHY_TXD1
3.3K
10
11
12
13
14
15
16
9
RXD[0]
RXD[1]
33 RXD[2]/INTB
RXD[3]/CLK_CTL
RXC
DVDD33
TXC
TXD[0]
+3.3V_WOL
+3.3V_WOL
33
33
R5200
3.3K
C5211
OPT
R5207
R5206
0.1uF
C5209
R5201
16V
R5209
33pF
51
EPHY_TXD0
C5202
3.3K
EPHY_RXD0
EPHY_RXD1
EPHY_INT
Place near IC
5pF
R5208
WOL POWER ENABLE CONTROL EPHY_REFCLK

+3.5V_WOL
+3.5V_ST
Q4301
PMV48XP
S
D
G
R4317 C4325
22K 4.7uF
10V
R4318
2.2K
C
R4316
WOL_CTL 3.3K B Q4300
MMBT3904(NXP)

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. ETHERNET

R5602
0
Separate DGND AND AVSS
This parts are Located

+24V +24V_AMP
on AVSS area.
R5610
L5600
470
UBW2012-121F
C5611 4700pF
Close to Speaker
0.047uF
C5612
NRS6045T100MMGK
L5605
C5601 10.0uH
0.1uF
C5613 2200pF
SPK_L+
50V
C5616
0.033uF
50V
R5611
C5609 4700pF +24V_AMP 18
50V
C5608 R5609 C5626
330pF C5632 C5636
+3.3V_NORMAL 470 50V 2200pF
0.047uF C5620 C5622 0.1uF
C5618
PVDD_AB_2
PVDD_AB_1
0.1uF 10uF 10uF 50V 50V
PLL_FLTP
PLL_FLTM
50V 35V 35V
SSTIMER
VR_ANA
C5630
BST_A
OUT_A
ZD5601
0.47uF
AVSS
PBTL
NC_2
NC_1
50V SPEAKER_L
OPT
5V
C5627 C5637
L5601 C5633 2200pF
330pF 50V
BLM18PG121SN1D 0.1uF
[EP] 50V
12
11
10
9
8
7
6
5
4
3
2
1
50V
AVDD 13 48 PGND_AB_2 R5612
+3.3V_NORMAL 18
C5603 C5604 R5608 15K A_SEL_FAULT PGND_AB_1
THERMAL
14 47
10uF 0.1uF MCLK OUT_B
46
49
10V 16V 15 SPK_L-
18K OSC_RES NC_6
16 45 50V L5606
TAS5733
IC5600
R5601 R5607 1% DVSSO 17 44 NC_5 0.033uF
10K C5624 10.0uH
AUD_MASTER_CLK VR_DIG 18 43 BST_B
NRS6045T100MMGK
R5603 PDN BST_C
19 42
LRCLK NC_4 NRS6045T100MMGK
C 100 C5602 20 41
50V L5604
C5605 SCLK 40 NC_3
R5600 1000pF 21 0.033uF
B Q5600 4.7uF C5607 10.0uH
AMP_MUTE 50V 0.1uF SDIN 22 39 OUT_C C5625
MMBT3904(NXP) 10V SPK_R+
10K SDA PGND_CD_2
23 38
E
SCL PGND_CD_1 SPEAKER_R
R5613
1/16W
24 37
C5634 C5638
C5631
25
26
27
28
29
30
31
32
33
34
35
36
0.1uF 2200pF
18
AUD_LRCK
0.47uF 50V
AUD_SCK 50V 50V
RESET
STEST
DVDD
DVSS
GND
AGND
VREG
GVDD_OUT
BST_D
PVDD_CD_1
PVDD_CD_2
OUT_D
AUD_LRCH C5628
33 R5605 330pF
I2C_SDA1 C5639
33 R5606 +24V_AMP 50V 2200pF
I2C_SCL1 C5635
0.1uF 50V
WOOFER_MUTE
C5629 50V
C5614
C56151uF 25V
0.1uF 330pF
33 R5604
AMP_RESET_N 50V
C5619 C5621 C5623
0.1uF 10uF 10uF
R5614
1/16W
+3.3V_NORMAL 50V 35V 35V
18
C5606 L5602 SPK_R-
0.1uF BLM18PG121SN1D C5617 0.033uF L5603
16V 50V
WOOFER_MUTE 10.0uH
C5610 NRS6045T100MMGK
0.1uF
16V
WAFER-ANGLE
SPK_L+
4
SPK_L-
3
SPK_R+
2
SPK_R-
1
P5600

GP4_MT5369 2011.11.21
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR AUDIO[ST] 58

WAFER-ANGLE
FILM_SPK
R5700
0 SPK_WOOFER_L+
4
SPK_WOOFER_L-
GND-4 3
SPK_WOOFER_R+
2
Separate DGND AND AVSS
SPK_WOOFER_R-
1
P5700
+24V +24V_AMP_WOOFER +12V FILM_SPK

OPT FILM_SPK
L5700 L5707
UBW2012-121F UBW2012-121F
FILM_SPK
C5701 This parts are Located
0.1uF on AVSS area.
50V
0.047uFFILM_SPK
R5708
470
FILM_SPK4700pF
FILM_SPK
GND-4 NRS6045T100MMGK Close to Speaker
C5712
L5704
10.0uH
C5711
FILM_SPK
C5713 2200pF
SPK_WOOFER_L+
FILM_SPK
FILM_SPK
C5716
0.033uF
50V
FILM_SPK +24V_AMP_WOOFER FILM_SPK
C5709 4700pF R5713
50V
18
FILM_SPK FILM_SPK FILM_SPK
+3.3V_NORMAL C5708 R5707 FILM_SPK
C5728 FILM_SPK C5736
FILM_SPK 330pF C5732
0.047uF 470 FILM_SPK C5720 C5722 0.1uF 2200pF
C5718 50V FILM_SPK
PVDD_AB_2
PVDD_AB_1
0.1uF 10uF 10uF C5730 50V 50V
PLL_FLTP
PLL_FLTM
50V 35V 35V
WOOFER_L
SSTIMER
FILM_SPK 0.47uF
VR_ANA
ZD5701
50V
FILM_SPK
FILM_SPK
BST_A
OUT_A
OPT
AVSS
PBTL
NC_2
NC_1
5V
C5729 FILM_SPK
330pF FILM_SPK C5737
L5701 C5733
50V 0.1uF 2200pF
BLM18PG121SN1D 50V
[EP] 50V
12
11
10
9
8
7
6
5
4
3
2
1
R5714
AVDD 13 48 PGND_AB_2 18
FILM_SPK
C5703 C5704 R5706 15K A_SEL_FAULT PGND_AB_1
THERMAL
14 47
FILM_SPK 10uF 0.1uF FILM_SPK MCLK OUT_B FILM_SPK
46
49
10V 16V 15 SPK_WOOFER_L-
FILM_SPK 18K OSC_RES NC_6
16 45 FILM_SPK L5706
TAS5733
50V
IC5700
R5705 1% DVSSO 44 NC_5 10.0uH

17 0.033uF NRS6045T100MMGK
FILM_SPK FILM_SPK VR_DIG BST_B
WOOFER
18 43 C5724
R5701 AUD_MASTER_CLK
PDN 19 42 BST_C
WOOFER_MUTE
FILM_SPK
100FILM_SPK
C5702 C5705
LRCLK 20 41 NC_4
50V
NRS6045T100MMGK
SCLK NC_3 L5703
1000pF FILM_SPK 21 40 0.033uF 10.0uH
50V 4.7uF SDIN 22 39 OUT_C C5725
10V C5707 SPK_WOOFER_R+
SDA 23 38 PGND_CD_2 FILM_SPK
0.1uF
SCL PGND_CD_1
R5711
1/16W
FILM_SPK
24 37
FILM_SPK
R5710
OPT
25
26
27
28
29
30
31
32
33
34
35
36
18
AUD_LRCK
10K
FILM_SPK FILM_SPK
AUD_SCK C5734 C5738
FILM_SPK 2200pF
RESET
STEST
DVDD
DVSS
GND
AGND
VREG
GVDD_OUT
BST_D
PVDD_CD_1
PVDD_CD_2
OUT_D
AUD_LRCH C5726 0.1uF

50V 50V
I2C_SDA1
33 R5703FILM_SPK
+24V_AMP_WOOFER
330pF
50V FILM_SPK WOOFER_R
C5731
33 R5704FILM_SPK
I2C_SCL1 0.47uF
FILM_SPK 50V
FILM_SPK C5714 FILM_SPK FILM_SPK
C57151uF 25V
FILM_SPK C5727 C5739

33 R5702 0.1uF 330pF C5735
FILM_SPK
AMP_RESET_N 0.1uF 2200pF

FILM_SPK C5719 C5721 FILM_SPK 50V 50V
+3.3V_NORMAL 0.1uF 10uF C5723 R5712 50V
1/16W
50V 35V 10uF
FILM_SPK FILM_SPK 35V 18
C5706
0.1uF FILM_SPK FILM_SPK
16V L5702
SPK_WOOFER_R-
BLM18PG121SN1D C5717 0.033uF L5705
50V
FILM_SPK 10.0uH
R5709
OPT
NRS6045T100MMGK
10K
C5710
0.1uF FILM_SPK
16V
WOOFER

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR TI_AMP_FILM_SPK 57

+12V
EU
AUD_OUT >> EU/CHINA_HOTEL_OPT
IC6000 L6000
AZ4580MTR-E1
EU
EU
2.2K R6000 OUT1 8 VCC C6004
DTV/MNT_L_OUT 1
EU
C6000 OPT
0.1uF
50V R6011
EU
C6008
[SCART AUDIO MUTE]
OPT R6002 EU IN1- OUT2 SIGN600002 2.2K
1uF 33K R6004 2 7
25V C6002 470K DTV/MNT_R_OUT
EU 6800pF
33pF C6003
IN1+ EU 6 IN2- R6008
EU
33K
OPT
R6010
OPT 1uF DTV/MNT_L_OUT
EU 3 C6007 25V
470K
6800pF
EU
VEE 5 IN2+ C
4 C6005 EU R6013
33pF Q6000 B 1K
SCART_AMP_L_FB MMBT3904(NXP)
EU_SCART_MUTE_ISAHAYA
SCART_AMP_R_FB E EU Q6002
RT1P141C-T112
SCART_MUTE
E
B
SCART_Lout
SCART_Rout
DTV/MNT_R_OUT
PDTA114ET
Q6002-*1
EU
E
C
R6014
Q6001 B 1K
MMBT3904(NXP)
B
E EU EU_SCART_MUTE_NXP

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SCART AUDIO AMP 2011.11.21

HP_OUT_H13 HP_OUT_H13
C6104-*1 C6109-*1
EARPHONE AMP 18pF

18pF
IC6100
TPA6138A2
HP_OUT_MTK +INR +INL HP_OUT_MTK

C6104 1 14 C6109
HP_OUT
C6100 180pF HP_OUT HP_OUT 180pF HP_OUT C6101
1uF R6100 R6106 R6104 R6101 1uF
-INR -INL HP_OUT
HP_OUT 10K
10V 43K HP_OUT 2 13
43K 10K 10V
HP_OUT
HP_ROUT_MAIN HP_LOUT_MAIN
R6103 1% C6108 C6106 1% R6102
33K 10pF OUTR OUTL 10pF 33K
HP_OUT_MTK 50V 3 12 50V HP_OUT_MTK HP_OUT_H13
HP_OUT_H13 HP_LOUT_AMP R6102-*1
R6103-*1 HP_ROUT_AMP 43K
+3.3V_NORMAL GND_1 UVP
43K 4 11 +3.3V_NORMAL
1%
1%
HP_OUT
MUTE GND_2
4.7K
HP_OUT
5 10 L6100
R6105
120-ohm
SIDE_HP_MUTE VSS VDD BLM18PG121SN1D
6 9
HP_OUT HP_OUT
HP_OUT
C6105 C6107
C6102 CN CP 1uF 0.1uF
1uF 7 8
10V 16V
10V
C6103
1uF
10V
HP_OUT

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. 2011.09.29
HEADPHONE AMP
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR 61

CI POWER ENABLE CONTROL
IC6200
+5V_NORMAL
AP2151WG-7 +5V_CI_ON
IN OUT
5 1
CI
GND C6210
2 1uF
CI R6219
25V
CI 10K
R6217
100 EN FLG CI
PCM_5V_CTL 4 3
R6218
10K
CI

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS CI SLOT 2011.10.31

B-CAS (SMART CARD) INTERFACE
+3.3V_NORMAL INT CMDVCC : STATUS

+3.3V_NORMAL ---------------------------------
HIGH HIGH CARD PRESENT
LOW HIGH CARD not PRESENT
SIGN630028
IC6300
TDA8024TT
2.7K
2.7K
R6301
R6303
R6305
JAPAN
JAPAN
CLKDIV1 CLKDIV2 : F_CRD_CLK
OPT
-----------------------------
1 0 CLKIN CLKDIV1 AUX2UC
1 28
JAPAN
JAPAN
JAPAN
R6317
R6318
R6315
R6319
R6316
OPT
OPT
1.2K
1.2K
1.2K
1.2K
1.2K
CLKDIV2 AUX1UC
2 27
JAPAN
5V/3V I/OUC JAPAN

SMARTCARD_PWR_SEL/SD_EMMC_DATA[1] R6300 22 3 26 R6307 22 SMARTCARD_DATA/SD_EMMC_CLK
2.7K
R6302
R6304
R6306
JAPAN
OPT
OPT
PGND XTAL2 JAPAN

+5V_NORMAL 4 25 R6308 22 SMARTCARD_CLK/SD_EMMC_DATA[0]
S2 XTAL1 JAPAN
JAPAN 5 24 R6309 22 SMARTCARD_DET/SD_EMMC_DATA[3]
L6300
BLM18PG121SN1D VDDP OFF JAPAN
JAPAN 6 23 R6310 22 SMARTCARD_RST/SD_EMMC_DATA[2]
JAPAN
JAPAN C6301 C6303
C6300 0.1uF S1 GND JAPAN
10uF
0.1uF 10V 16V 7 22 R6311 22 SMARTCARD_VCC/SD_EMMC_CMD
16V L6301 JAPAN
+3.3V_NORMAL
JAPAN
VUP VDD BLM18PG121SN1D
8 21
JAPAN
JAPAN JAPAN
C6302 PRES RSTIN C6305 C6306
0.1uF 9 20 0.1uF 0.1uF
16V 16V 16V
B-CAS SLOT
PRES CMDVCC
10 19
P6300
I/O PORADJ 10057542-1311FLF(B CAS Slot)
11 18
AUX2 VCC JAPAN VCC

12 17 C1
C6307
0.33uF
AUX1 RST 16V RST
13 16 C2
CGND CLK Place CLK C3 far from C2,C7,C4 and C8 CLK

14 15 C3
JAPAN
C6304 RESERVED_1
0.1uF C4
16V
GND
C5
VPP JAPAN
C6
JAPAN
R6313
75 I/O
C7
75 ohm in I/O is for short circuit Protection
RESERVED
C8
SW1
S1
+3.3V_NORMAL
JAPAN
JAPAN
10K
R6312
R6314
1K SW2
S2
ZD6300 ZD6301
JAPAN
JAPAN
5V 5V

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS CI SLOT 2011.04.17

RF_SWITCH_CTL_50 /TU_RESET2
FE_DEMOD1_TS_ERROR
TU_W_BR/TW/CO
L6508-*1
+3.3V_TU
TU_Q/W_KR/JP/AU
L6508 TU_S/N/Q/W
close to TUNER BLM18PG121SN1D /TU_RESET1
TU_N/M/W_CN/TW/BR/CO C6520
R6508-*1 0.1uF
16V
TU_W_BR/TW/CO
C6501-*1 R6500 1K 1K 5%
1000pF TU_N_TW/BR TU_N/M_TW/BR TU_N/M_TW/BR TU_W_BR/TW/CO TU_W_BR/TW/CO TU_W_BR/TW/COTU_W_BR/TW/CO/JP TU_W_BR/TW/CO/JP
RF_SWITCH_CTL R6534-*1 R6509-*1 R6510-*1 C6508-*1 C6506-*1
C6501 R6505
RF_SWITCH_CTL_50 18pF 18pF
0.1uF 10K 150 mA(MAX)
1 RF_SWITCH_CTL_TU TU_S/N/Q/W C6502 R6501 1K 300 220
0.1uF TU_M/W_BR/TW/CO/CN
R6508
100 TU_M/W_BR/TW/CO/CN
2 /TU_RESET1_TU TU_A_GLOBAL_6/7
NON_TU_W_BR/TW/CO R6534 0 +3.3V_NORMAL +3.3V_TU
TU_N/Q_KR/TW/BR/CO/AU R6509 +3.3V_TU
3 I2C_SCL6_TU I2C_SCL6 +3.3V_TU 1608 perallel
C6508 33 because of derating
47pF NON_TU_W_BR/TW/CO OPT L6503
TU_N/Q_KR/TW/BR/CO/AU R6510 R6516 OPT
4 I2C_SDA6_TU 50V I2C_SDA6 TU_A_GLOBAL_6/7 TU_A_GLOBAL_6/7 BLM18PG121SN1D
C6506 33 470 R6518
+3.3V_TU close to TUNER 82 R6520 R6521
47pF TUNER_SIF 200 200
TU_W_BR/TW/CO/JP/_Q_AU
5 +3.3V_TU 50V OPT E C6526 C6529
C6514 C6530
C6522 0.1uF 22uF 0.1uF
0.1uF TU_CVBS 16V 10V 16V
6 16V 0.1uF 16V B OPT E 85C
TUNER_SIF_TU
L6500
OPT
C
Q6500 T2 : Max 1.0A
R6515 MMBT3906(NXP) TU_A_GLOBAL_6/7 else : Max 0.7A
TU_W_BR/TW/CO/JP/_Q_AU BLM18PG121SN1D 4.7K B
7 TU_+1.8V_TU Q6501
C6554 +1.8V_TU MMBT3906(NXP)
100pF
C6550
0.1uF
C output : 1.1V_D_Demod
8 TU_CVBS_TU 50V 16V for DVB-T2(V1.3.1) Sony Demod
TU_S/N/Q_T/US/KR/TW/AU
close to Tuner TU_W_CO_T2
R6506 100 TU_W_BR/TW
9 IF_AGC_TU IF_AGC R6528-*1
C6503 TU_S/N/Q_T/US/KR/TW/AU 6.8K
0.1uF
close to Tuner C6503-*1
0.1uF
10 IF_P 16V IF_P 16V TU_Q/N/M/W
1. should be guarded by ground +1.23V_D_Demod
+3.3V_TU IC6501 1%
should be guarded by ground +3.3V_TU
2. No via on both of them AP2132MP-2.5TRG1 [EP]
11 IF_N IF_N 3. Signal Width >= 12mils TU_Q/N/M/W
Signal to Signal Width = 12mils TU_Q/N/M/W R6527
20K R2
12 +3.3V_TU Ground Width >= 24mils C6540 1 8
1%
0.1uF
THERMAL
TU_N/M_CN/BR PG GND TU_Q/N/M/W
R6506-*1
L6502 R6528
13 Power_D_Demod_TU TU_W_BR/TW BLM18PG121SN1D +1.23V_D_Demod
9
2 7 11K
1%
R6529 R1
TU_N/M TU_Q/N/M/W
ADJ
TU_N_BR 100 TU_Q/W_KR/BR/TW/CO/JP/AU EN
R6502 R6523
14 CN_RESET_TU R6502-*1 L6507 +1.8V_TU 10K 10K
10 3 6 1%
/S2_RESET C6516
1K 5% BLM18PG121SN1D VOUT TU_Q/N/M/W
0.1uF C6516-*1 VIN
16V
TU_N/M/Q/W_KR/CN/BR/JP/AU
0.1uF
16V
C6533
10uF +5V_NORMAL 4 2A 5
TU_W_BR/TW/CO/JP 16V VCTRL NC
16 FE_DEMOD1_TS_ERROR FE_DEMOD1_TS_ERROR
EAN61387601
C6549
17 10uF
FE_DEMOD1_TS_SYNC FE_DEMOD1_TS_SYNC
16V
TU_Q/N/M/W
18 FE_DEMOD1_TS_VAL FE_DEMOD1_TS_VAL C6535
1uF
19 FE_DEMOD1_TS_CLK FE_DEMOD1_TS_CLK
Global F/E Option Name

1. TU 20 FE_DEMOD1_TS_DATA[0] Vout=0.6*(1+R1/R2)
2. Tuner Name = TDS’S’,TDS’Q’... FE_DEMOD1_TS_DATA[0-7]
3. Country Name = T,T2,S2,KR,US,BR ... 21 FE_DEMOD1_TS_DATA[1]
Example of Option name 22 FE_DEMOD1_TS_DATA[2] FE_DEMOD1_TS_DATA[2] CHB : Max mA
TU_Q_T2 = apply TDSQ type tuner and T2 country FE_DEMOD1_TS_DATA[3] else : Max mA
TU_M/W = apply TDSM&TDSW Type Tuner 23 FE_DEMOD1_TS_DATA[3]
FE_DEMOD1_TS_DATA[4] +3.3V_TU
+1.8V_TU
13’ Tuner Type for Global 24 FE_DEMOD1_TS_DATA[4] FE_DEMOD1_TS_DATA[5]
IC6503
TDS’S’-G501D : T/C Half NIM Horizontal Type FE_DEMOD1_TS_DATA[6]
AZ1117BH-1.8TRE1
TDS’Q’-G501D : T/C/S2 Combo Horizontal type 25 FE_DEMOD1_TS_DATA[5] FE_DEMOD1_TS_DATA[7]
TDS’Q’-G601D : T2/C/S2 Combo Horizontal Type IN 3 2 OUT

TDS’Q’-G651D : T2/C/S2 Combo Vertical Type 26 FE_DEMOD1_TS_DATA[6]
1 R6531
TDS’M’-C601D : China NIM with Isolater Type ADJ/GND 1
TDS’W’-J551F : Japan Dual NIM 27 FE_DEMOD1_TS_DATA[7]
TDS’W’-B651F : Brazil 2Tuner
TDS’W’-A651F : Taiwan 2Tuner C6546 C6548
10uF 10uF
TDS’W’-K651F : Colombia DVB-T2 2Tuner 10V 10V
TU_Q/W
L6501 +1.23V_D_Demod
BLM18PG121SN1D TU_W
R6513-*1
30 +1.23V_D_Demod_TU
C6515
0.1uF
1K 5%
31 /S2_RESET_TU TU_Q/W
TU_Q
R6513
32 +3.3V_TU 10
/S2_RESET
+3.3V_TU
33 LNB_TX
+3.3V_TU
34 I2C_SCL4_TU C6521
0.1uF
LNB_TX OPT
35 I2C_SDA4_TU
TU_Q/W_KR/BR/CO/TW/JP/AU R6503 22 C6538 C6542
I2C_SCL4 C6531 10uF 0.1uF
TU_Q/W 0.1uF 10V
36 LNB_OUT C6504
18pF
50V
TU_Q/W_KR/BR/CO/TW/JP/AU R6504 22
I2C_SDA4
TU_Q/W
C6500
LNB_OUT 18pF Close to the tuner
50V

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS TUNER 2012.07.10

TU6700 TU6705 TU6702 TU6703 TU6704
TDSS-H651F(B) TDSN-G351D TDSQ-H651F(B) TDSQ-G651D(B) TDSW-J551F(B)
RF_SWITCH_CTL_TU
TU_S_US TU_T2/C TU_Korea_PIP TU_Q_T2/S2 TU_W_JP C6705
NC NC_1 +B1[+3.3V_S/P] N.C_1 +5V_OR_+3.3V_SPLITTER 10uF
1 1 1 1 1 10V
1
RESET RESET RESET RESET RESET_T1
2 2 2 2 2 /TU_RESET1_TU 2
SCL SCL TU_SCL SCL SCL_T
3 3 3 3 3 I2C_SCL6_TU 3
SDA I2C_SCL6_TU SDA TU_SDA SDA SDA_T
4 4 4 4 4 I2C_SDA6_TU 4
+B1[3.3V] I2C_SDA6_TU +B1[3.3V] +B2[3.3V_M] +B1[3.3V] +3.3V_T1
5 TU6701 5 5 5 5 +3.3V_TU 5
SIF +3.3V_TU SIF S_SIF SIF NC_1
6 TDSM-C651D(B) 6 6 6 6 TUNER_SIF_TU 6
+B2[1.8V] TUNER_SIF_TU +B2[1.8V] +B3[1.8V_M] +B2[1.8V] +1.8V_T1
7 7 7 7 7 TU_+1.8V_TU 7
CVBS TU_+1.8V_TU TU_M_CN CVBS CVBS S_CVBS CVBS NC_2
8 8 8 8 8 8 TU_CVBS_TU 8
IF_AGC NC_1 NC_2 M_IF_AGC NC_2 NC_3
9 9 9 9 9 9 IF_AGC_TU 9
DIF[P] NC_2 NC_3 M_DIF[P] NC_3 NC_4
10 10 10 10 10 10 IF_P 10
DIF[N] NC_3 NC_4 M_DIF[N] NC_4 NC_5
11 11 11 11 11 11 IF_N 11
+B3[3.3V] +B3[3.3V] +B4[3.3V_S] NC_5 +3.3V_T2
B1 A1 12 12 12 12 12 +3.3V_D_Demod 12
B1 A1
+B4[1.23V] +B4[1.23V] +B5[1.8V_S] NC_6 +1.8V_T2
TU_GND_B
13 13 13 13 13 Power_D_Demod_TU 13
12 DEMOD_RESET NC_5 NC_1 NC_7
14 14 14 14 CN_RESET_TU 14
SHIELD GND GND GND GND
15 15 15 15
NC_4 ERROR SD_ERROR ERROR
16 16 16 16 FE_DEMOD1_TS_ERROR 16
SYNC SYNC SD_SYNC SYNC
17 17 17 17 FE_DEMOD1_TS_SYNC 17
VALID VALID SD_VALID VALID
18 18 18 18 FE_DEMOD1_TS_VAL 18
RF_S/W_CTL MCLK MCLK SD_MCLK MCLK
RF_SWITCH_CTL_50 50 19 19 19 19 FE_DEMOD1_TS_CLK 19
RESET D0 D0 SD_SERIAL_D0 D0
TU_PIN2 51 20 20 20 20 FE_DEMOD1_TS_DATA[0] 20
SCL D1 D1 NC_2 D1
I2C_SCL6_TU 52 21 21 21 21 FE_DEMOD1_TS_DATA[1] 21
SDA D2 D2 NC_3 D2
I2C_SDA6_TU 53 22 22 22 22 FE_DEMOD1_TS_DATA[2] 22
+B1[3.3V] D3 D3 NC_4 D3
+3.3V_TU 54 23 23 23 23 FE_DEMOD1_TS_DATA[3] 23
SIF D4 D4 NC_5 D4
TUNER_SIF_TU 55 24 24 24 24 FE_DEMOD1_TS_DATA[4] 24
+B2[1.8V] D5 D5 NC_6 D5
TU_+1.8V_TU 56 25 25 25 25 FE_DEMOD1_TS_DATA[5] 25
D6 D6 NC_7 D6
26 26 26 26 FE_DEMOD1_TS_DATA[6] 26
D7 D7 NC_8 D7
27 27 27 27 FE_DEMOD1_TS_DATA[7] 27
GND_1 GND_2 GND_2
B1 A1 28 28 28
B1 A1
B1 A1 GND_2 GND_3 GND_3
B1 A1 28 29 29 29
B2 59 A2 +B6[1.23V_SD] +B3[1.23V] +B5[1.23V]
30 30 30 +1.23V_D_Demod_TU 30
SHIELD
B2
SHIELD
A2
SD_RESET DEMOD_RESET D_RESET

31 31 31 /S2_RESET_TU 31
+B7[3.3V_SD] F22_OUTPUT +B6[3.3V]
32 32 32 +3.3V_D_Demod2 32
TU_GND_B
NC_9 DEMOD_SCL NC_6

TU_GND_A
TU_GND_B
33 33 33 LNB_TX 33
SD_SCL DEMOD_SDA D_SCL
34 34 34 I2C_SCL4_TU 34
SD_SDA LNB D_SDA
35 35 35 I2C_SDA4_TU 35
GND_4 TU_Q_T2/S2
LNB
B1 A1 36 36 LNB_OUT 36
B1 A1
TU_W_JP
R6707 0
R6708 0
SHIELD GND_4
36 37 37
GND_5
B1 A1 38
TU_GND_B
GND seperation for CHINA tuner

SHIELD B1 A1
EOS for Tuner 1.8V LDO 38 GND_6
39
TU_GND_B
+1.8V_TU TS1_ERROR
TU_GND_B
TU_GND_A
40 FE_DEMOD2_TS_ERROR 40
+B4[3.3V]
NC_7 TS1_SYNC
50 41 FE_DEMOD2_TS_SYNC 41
RESET_T2 TS1_VALID
ZD6501
NON_CHINA
NON_CHINA
2.5V
OPT
NON_CHINA
51 42
NON_CHINA
TU_M_CN 50 RF_SWITCH_CTL_50 FE_DEMOD2_TS_VAL 42

0 R6700
0 R6701
0 R6702
0 R6703
TU_M_CN
1000pF C6706 51 TU_PIN2 SCL_S TS1_MCLK
C6707 1000pF
52 I2C_SCL6_TU 52 43 FE_DEMOD2_TS_CLK 43
630V 630V
SDA_S TS1_DATA
53 I2C_SDA6_TU 53 44 FE_DEMOD2_TS_DATA 44
TU6704-*4
TDSN-T751F
TU6702-*1
TDSQ-A651D(B)
TU6704-*1
TDSW-B652F(B)
TU6704-*2
TDSW-A652F(B)
TU6704-*3
TDSW-K651F(B) +3.3V_S_TUNER TS2_ERROR
TU_TW_SINGLE
1
RF_S/W_CTL
TU_AJJA
1
+B1[+3.3V_S/P]
TU_BR
1
+B1(3.3V)_S/P
TU_TW
1
+B1(3.3V)_S/P
TU_CO
1
+B1(3.3V)_S/P
T_RESET
54 +3.3V_TU 54 45 FE_DEMOD3_TS_ERROR 45
RESET RESET T_RESET T_RESET 2
2 2 2 2
TU_SCL
SCL TU_SCL TU_SCL TU_SCL
3
4
SDA
3
4
TU_SDA
3
4
TU_SDA
3
4
TU_SDA
3
4
TU_SDA
NC_8 TS2_SYNC
5
6
+B1[3.3V]
SIF
5
6
+B2[3.3V_M]
S_SIF
5
6
+B2[3.3V_M]
S_SIF
5
6
+B2[3.3V_M]
S_SIF
5
6
+B2[3.3V_M]
S_SIF
+B3[1.8V_M]
55 TUNER_SIF_TU 55 46 FE_DEMOD3_TS_SYNC 46
+B2[1.8V] +B3[1.8V_M] +B3[1.8V_M] +B3[1.8V_M] 7
7 7 7 7
S_CVBS
CVBS S_CVBS S_CVBS S_CVBS
8
9
IF_AGC
8
9
M_IF_AGC
8
9
M_IF_AGC
8
9
M_IF_AGC
8
9
M_IF_AGC
NC_9 TS2_VALID
10
11
DIF[P]
DIF[N]
10
11
M_DIF[P]
M_DIF[N]
10
11
M_DIF[P]
M_DIF[N]
10
11
M_DIF[P]
M_DIF[N]
10
11
M_DIF[P]
M_DIF[N]
+B4[3.3V_S]
56 TU_+1.8V_TU 56 47 FE_DEMOD3_TS_VAL 47
NC_1 +B4[3.3V_S] +B4[3.3V_S] +B4[3.3V_S] 12
12 12 12 12
+B5[1.8V_S]
NC_2 +B5[1.8V_S] +B5[1.8V_S] +B5[1.8V_S]
13
14
NC_3
13
14
NC_1
13 13
13
TU_W_JP
10K TU_W_JP LNA_CTR1 TS2_MCLK
15
16
GND
NC_4
15
16
GND
SD_ERROR
57 FE_LNA_Ctrl1 57 48 FE_DEMOD3_TS_CLK 48
17
NC_5
NC_6
17
SD_SYNC
SD_VALID
R6705 C6701
18
19
NC_7
18
19
SD_MCLK
0.1uF LNA_CTR2 TS2_DATA
20
21
NC_8
NC_9
20
21
SD_SERIAL_D0
NC_2
16V 58 49 FE_DEMOD3_TS_DATA 49
22
NC_10
22
NC_3 TU_W_JP
23
NC_11
23
NC_4
10K TU_W_JP TU_QW
24
25
NC_12
NC_13
24
25
NC_5
NC_6 58 FE_LNA_Ctrl2
R6706 B1 A1
L6701
LNA_CTRL1
57 26
NC_14
26
NC_7
C6702 BLM18PG121SN1D
R6704
LNA_CTRL2
58 27
NC_15
27
NC_8
GND_1 0.1uF B1 A1
100
TU_PIN2 B1
B1
59
A1
A1 28
29
GND_1
GND_2
28
29
GND_1
GND_2
28
29
GND_1
GND_2
28
29
GND_2
16V +3.3V_D_Demod2 +3.3V_TU
/TU_RESET2
TU_M/W
SHIELD
30
31
+B6[1.23V_SD]
SD_RESET
30
31
+B6[1.23V_D]
D_RESET
30
31
+B6[1.23V_D]
D_RESET
30
31
+B6[1.1V_D]
D_RESET 59 TU_QW TU_QW

TU_M/W 32
+B7[3.3V_SD]
32
+B7[3.3V_D]
32
+B7[3.3V_D] 32
+B7[3.3V_D]
C6708 C6709
C6700 33
NC_9
33
NC_1
33
NC_1 33
NC_1
D_SCL
0.1uF 10uF
SD_SCL D_SCL SD_SCL 34
34 34 34
0.1uF 35
SD_SDA
35
D_SDA
35
SD_SDA 35
D_SDA
10V
TU_GND_B
TU_GND_A
B1 A1
B1
36
A1
38
GND_3
38
GND_3 38
GND_3
SHIELD
SHIELD GND_4
GND_4 GND_4 39
39 39
MD_ERROR
MD_ERROR NC_2 40
40 40
RF_S/W_CTRL MD_SYNC
RF_S/W_CTRL MD_SYNC RF_S/W_CTRL NC_3 50 41
NC_2
50
51
41
42
MD_VALID NC_7
50
51
41
42
NC_4
NC_2
51 42
MD_VALID TU_MNQW
43
MD_MCLK
43
NC_5 43
MD_MCLK
MD_DATA
L6700
MD_DATA NC_6 44
44
45
SD_ERROR
44
45
SD_ERROR 45
SD_ERROR BLM18PG121SN1D
SD_SYNC
SD_SYNC SD_SYNC 46
46 46
SD_VALID
47
SD_VALID
SD_MCLK
47
SD_VALID
SD_MCLK
47
48
SD_MCLK
+3.3V_D_Demod +3.3V_TU
48 48
49
SD_DATA
49
SD_DATA 49
SD_DATA
TU_MNQW TU_MNQW
B1
B1 A1
A1 B1
B1 A1
A1
B1
B1
59
A1
A1
C6703 C6704
59 59
SHIELD SHIELD
SHIELD 0.1uF 10uF
10V

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS TU_SYMBOL 2012.09.14

DVB-S2 LNB Part Allegro
(Option:LNB) Input trace widths should be sized to conduct at least 3A
Ouput trace widths should be sized to conduct at least 2A
3A
+12V
2A
D6904-*1
Max 1.3A
40V
LNB_SX34
D6902 3.5A
LNB D6904
30V 40V
LNB
15uH
SP-7850_15
L6900
LNB_SMAB34
C6909
10uF
C6903 C6905 C6906 C6907 25V
0.01uF 10uF 10uF 10uF LNB
50V 25V 25V 25V
LNB LNB LNB LNB
C6908 0.1uF
close to Boost pin(#1) A_GND
A_GND
LNB
[EP]GND
close to VIN pin(#15) Caution!! need isolated GND
BOOST
GNDLX
R6904
NC_3
NC_2
C6910 0
A_GND
LX
0.1uF
50V
20
19
18
17
16
LNB
D6901 VCP 1 15 VIN
MBR230LSFT1G THERMAL A_GND
LNB 2 14 GND
LNB_OUT 21
30V LNB
D6903 NC_1 3 13 VREG
LNB C6904
0.1uF LNB_SMAB34 IC6900 R6903
C6900 C6901 R6900 TDI ISET 39K
2.2K LNB 50V 40V A8303SESTR-T
4 12
18pF 33pF
D6900 1W LNB 1/16W
LNB LNB C6902 TDO 5 11 TCAP C6912
LNB LNB 0.22uF 1%
LNB 25V D6903-*1
10
LNB
LNB_SX34
6
9 0.1uF
40V
IRQ
SCL
SDA
ADD
TONECTRL
0.22uF
Close to Tuner A_GND
A_GND
Surge protectioin
LNB
C6911
R6901 33
R6902 33
LNB
LNB
I2C_SCL4
I2C_SDA4
LNB_TX

LNB 2012.03.08
69

LVDS
[51Pin LVDS OUTPUT Connector] [41Pin LVDS OUTPUT Connector]
P7202
FI-RE41S-HF-J-R1500
LVDS
P7201
FI-RE51S-HF-J-R1500
LVDS 1
NC UD_OLED 2
1 R7210 33 FRC_RESET OLED : FRC_RESET = LVDS_VAL
NC INV_CTL = ELVDD_ON 3
2 OLED R7209 0 I2C_SCL1
NC 4
3 OLED R7208 0 I2C_SDA1
NC 5
4 UD_CPBOX R7200 0 I2C_SDA1
NC 6
5 UD_CPBOX R7201 0 I2C_SCL1
NC R7204 UD 7
6 0 INV_CTL
OLED R7217
LVDS_SEL 0 8
7 FRC_FLASH_WP
NC R7213 9
OLED
8 0 BPL_IN 10K
NC ALEF R7215 10
9 TXC0N
L/DIM_ENABLE 11 TXC0P
10
GND 12 TXC1N
11
RA0N 13 TXC1P
12 TXA0N/TX11N
RA0P 14 TXC2N
13 TXA0P/TX11P
RA1N 15 TXC2P
14 TXA1N/TX10N
RA1P 16
15 TXA1P/TX10P
RA2N 17 TXCCLKN
16 TXA2N/TX9N
RA2P 18 TXCCLKP
17 TXA2P/TX9P
GND 19
18
RACLKN 20 TXC3N
19 TXACLKN/TX8N
RACLKP 21 TXC3P
20 TXACLKP/TX8P
GND 22 TXC4N
21
RA3N 23 TXC4P
22 TXA3N/TX7N
RA3P 24
23 TXA3P/TX7P
RA4N 25
24 TXA4N/TX6N
RA4P 26 TXA1N TXD0N/TX17N
25 TXA4P/TX6P
GND 27 TXA1P TXD0P/TX17P
26
BIT_SEL BIT_SEL 28 TXACLKN
27 TXD1N/TX16N
RB0N 29 TXACLKP TXD1P/TX16P
28 TXB0N/TX5N R7214
RB0P 10K 30 TXA4N
H13 BALL NAME

29 TXB0P/TX5P TXD2N/TX15N
LVDS_BIT_SEL_LOW
RB1N 31 TXA4P
30 TXB1N/TX4N TXD2P/TX15P
RB1P 32
31 TXB1P/TX4P
RB2N 33 TXB0N
32 TXB2N/TX3N TXDCLKN/TX14N
RB2P 34 TXB0P
33 TXB2P/TX3P TXDCLKP/TX14P
GND 35
34
RBCLKN 36 TXB1N
35 TXBCLKN/TX2N TXD3N/TX13N
RBCLKP 37 TXB1P
36 TXBCLKP/TX2P TXD3P/TX13P
GND 38 TXB2N TXD4N/TX12N
37
RB3N 39 TXB2P TXD4P/TX12P
38 TXB3N/TX1N
RB3P 40
39 TXB3P/TX1P
RB4N 41
40 TXB4N/TX0N
RB4P
41 TXB4P/TX0P 42
GND PANEL_VCC
42
GND
43
GND L7201
44 120-ohm
GND LVDS
45 T_CON_SYS_POWER_OFF
GND
46
NC C7201 C7203
47 10uF 0.1uF
VLCD 16V 16V
48 OPT LVDS
VLCD
49
VLCD
50
VLCD
51
52
GND R7216
T_CON_SYS_POWER_OFF 100
LED_R
OLED
VA7201
ADMC 5M 02 200L C7204
OPT 0.1uF
OPT

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS INTERFACE

IC8100-*4
IC8100-*1 IC8100-*2 IC8100-*3
THGBM5G7A2JBAIR
THGBM5G5A1JBAIR H26M21001ECR KLM2G1HE3F-B001
A3 C8
A3 C8 A3 C8 A3 C8 DAT0 NC_23
DAT0 NC_23 DAT0 NC_25 DAT0 NC_25 A4 C9
A4 C9 A4 C9 A4 C9 DAT1 NC_24
eMMC I/F A5
B2
DAT1
DAT2
DAT3
NC_24
NC_25
NC_26
C10
C11
A5
B2
DAT1
DAT2
DAT3
NC_26
NC_27
NC_28
C10
C11
A5
B2
DAT1
DAT2
DAT3
NC_26
NC_27
NC_28
C10
C11
A5
B2
B3
DAT2
DAT3
NC_25
NC_26
C10
C11
C12
B3 C12 B3 C12 B3 C12 DAT4 NC_27
DAT4 NC_27 DAT4 NC_29 DAT4 NC_29 B4 C13
EMMC DATA LINE 47K PULL/UP 3.3V_EMMC B4 C13 B4 C13 B4 C13 DAT5 NC_28
B5 C14 B5 C14 B5 C14 DAT6 NC_29
47K
47K
47K
47K
47K
47K
47K
47K
DAT6 NC_29 DAT6 NC_31 DAT6 NC_31 B6 D1

B6 D1 B6 D1 B6 D1 DAT7 NC_30
DAT7 NC_30 DAT7 NC_32 DAT7 NC_32 D2
D2 D2 D2 NC_31
NC_31 NC_33 NC_33 D3
D3 D3 D3 NC_32
R8104-*1
R8100-*1
R8101-*1
R8102-*1
R8103-*1
R8105-*1
R8106-*1
R8107-*1
NC_32 NC_34 NC_34 M6 D4
R8117
R8116
10K
10K
10K
10K
10K
10K
10K
10K
EMMC DATA LINE M6 D4 M6 D4 M6 D4 CLK NC_33

CLK NC_33 CLK NC_35 CLK NC_35 M5 D12
10K
10K
10K PULL/UP M5 D12 M5 D12 M5 D12 CMD NC_34
FOR M13 CMD NC_34 CMD NC_36 CMD NC_36 D13
R8100
R8101
R8102
R8103
R8104
R8105
R8106
R8107
D13 D13 D13 NC_35

NC_35 NC_37 NC_37 D14
IC8100 D14 D14 D14 NC_36
NC_36 NC_38 NC_38 A6 E1
EMMC_SERIAL_22 H26M31002GPR A6 E1 A6 E1 A6 E1 RFU_1 NC_37
EMMC_DATA[0-7] RFU_1 NC_37 NC_3 NC_39 NC_3 NC_39 A7 E2
AR8100 A7 E2 A7 E2 A7 E2 RFU_2 NC_38
22 RFU_2 NC_38 NC_4 NC_40 NC_4 NC_40 C5 E3
1/16W C5 E3 C5 E3 C5 E3 NC_21 NC_39
NC_21 NC_39 NC_23 NC_41 NC_23 NC_41 E5 E12
EMMC_DATA[0] A3 C8 E5 E12 E5 E12 E5 E12 RFU_3 NC_40
DAT0 NC_25 RFU_3 NC_40 NC_42 NC_46 NC_42 NC_46 E8 E13
DAT1 NC_26 RFU_4 NC_41 NC_43 NC_47 NC_43 NC_47 E9 E14
DAT2 NC_27 RFU_5 NC_42 NC_44 NC_48 NC_44 NC_48 E10 F1
EMMC_DATA[3] B2 C11 E10 F1 E10 F1 E10 F1 RFU_6 NC_43
EMMC_DATA[4] DAT3 NC_28 RFU_6 NC_43 NC_45 NC_49 NC_45 NC_49 F10 F2
B3 C12 F10 F2 F10 F2 F10 F2 RFU_7 NC_44
EMMC_DATA[5] DAT4 NC_29 RFU_7 NC_44 NC_52 NC_50 NC_52 NC_50 G3 F3
B4 C13 G3 F3 G3 F3 G3 F3 RFU_8 NC_45
EMMC_DATA[6] DAT5 NC_30 RFU_8 NC_45 NC_58 NC_51 NC_58 NC_51 G10 F12
EMMC_SERIAL_22 B5 C14 G10 F12 G10 F12 G10 F12 RFU_9 NC_46
EMMC_DATA[7] AR8101 DAT6 NC_31 RFU_9 NC_46 NC_59 NC_53 NC_59 NC_53 H5 F13
22 B6 D1 H5 F13 H5 F13 H5 F13 RFU_10 NC_47
1/16W DAT7 NC_32 DAT5 RFU_10 NC_47 NC_66 NC_54 NC_66 NC_54 J5 F14
D2 J5 F14 J5 F14 J5 F14 RFU_11 NC_48
NC_33 RFU_11 NC_48 NC_73 NC_55 NC_73 NC_55 K6 G1
D3 K6 G1 K6 G1 K6 G1 RFU_12 NC_49
NC_34 RFU_12 NC_49 NC_80 NC_56 NC_80 NC_56 K7 G2
M6 D4 K7 G2 K7 G2 K7 G2 RFU_13 NC_50
CLK NC_35 RFU_13 NC_50 NC_81 NC_57 NC_81 NC_57 K10 G12
M5 D12 K10 G12 K10 G12 K10 G12 RFU_14 NC_51
CMD NC_36 RFU_14 NC_51 NC_82 NC_60 NC_82 NC_60 P7 G13
D13 P7 G13 P7 G13 P7 G13 RFU_15 NC_52
NC_37 RFU_15 NC_52 NC_116 NC_61 NC_116 NC_61 P10 G14
D14 P10 G14 P10 G14 P10 G14 RFU_16 NC_53
NC_38 RFU_16 NC_53 NC_119 NC_62 NC_119 NC_62 H1
HYNIX_EMMC_2GB
A6 E1 H1 H1 H1 NC_54
TOSHIBA_EMMC_4GB
NC_3 NC_39 NC_54 NC_63 NC_63 H2
A7 E2 H2 H2 H2 NC_55
NC_4 NC_40 NC_55 NC_64 NC_64 K5 H3
TOSHIBA_EMMC_16GB
C5 E3 K5 H3 K5 H3 K5 H3 RSTN NC_56
NC_23 NC_41 RST_N NC_56 RESET NC_65 RSTN NC_65 H12
SAMSUNG_EMMC_2GB
E5 E12 H12 H12 H12 NC_57
NC_42 NC_46 NC_57 NC_67 NC_67 H13
EMMC_SERIAL_22 E8 E13 H13 H13 H13 NC_58
NC_43 NC_47 NC_58 NC_68 NC_68 C6 H14
AR8102 22 E9 E14 C6 H14 C6 H14 C6 H14 VCCQ_1 NC_59
EMMC_CLK NC_44 NC_48 VCCQ_1 NC_59 VCCQ_1 NC_69 VDD_1 NC_69 M4 J1
E10 F1 M4 J1 M4 J1 M4 J1 VCCQ_2 NC_60
EMMC_CMD NC_45 NC_49 DAT6 VCCQ_2 NC_60 VCCQ_2 NC_70 VDD_2 NC_70 N4 J2
F10 F2 N4 J2 N4 J2 N4 J2 VCCQ_3 NC_61
EMMC_RST NC_52 NC_50 VCCQ_3 NC_61 VCCQ_3 NC_71 VDD_3 NC_71 P3 J3
G3 F3 P3 J3 P3 J3 P3 J3 VCCQ_4 NC_62
NC_58 NC_51 VCCQ_4 NC_62 VCCQ_4 NC_72 VDD_4 NC_72 P5 J12
G10 F12 P5 J12 P5 J12 P5 J12 VCCQ_5 NC_63
NC_59 NC_53 VCCQ_5 NC_63 VCCQ_5 NC_74 VDD_5 NC_74 J13
H5 F13 J13 J13 J13 NC_64
NC_66 NC_54 NC_64 NC_75 NC_75 J14
J5 F14 J14 J14 J14 NC_65
C8107 NC_73 NC_55 NC_65 NC_76 NC_76 E6 K1
eMMC serial 100 ohm option OPT 10pF K6 G1 E6 K1 E6 K1 E6 K1 VCC_1 NC_66
NC_80 NC_56 VCC_1 NC_66 VCC_1 NC_77 VDDF_1 NC_77 F5 K2
50V K7 G2 F5 K2 F5 K2 F5 K2 VCC_2 NC_67
NC_81 NC_57 VCC_2 NC_67 VCC_2 NC_78 VDDF_2 NC_78 J10 K3
K10 G12 J10 K3 J10 K3 J10 K3 VCC_3 NC_68
AR8100-*1 AR8101-*1 AR8102-*1 NC_82 NC_60 VCC_3 NC_68 VCC_3 NC_79 VDDF_3 NC_79 K9 K12
100 100 100 P7 G13 K9 K12 K9 K12 K9 K12 VCC_4 NC_69
1/16W 1/16W 1/16W NC_116 NC_61 VCC_4 NC_69 VCC_4 NC_83 VDDF_4 NC_83 K13
EMMC_SERIAL_100
EMMC_SERIAL_100
EMMC_SERIAL_100
P10 G14 K13 K13 K13 NC_70

NC_119 NC_62 NC_70 NC_84 NC_84 K14
H1 K14 K14 K14 NC_71
NC_63 NC_71 NC_85 NC_85 C2 L1
H2 C2 L1 C2 L1 C2 L1 VDDI NC_72
NC_64 VDDI NC_72 VDDI NC_86 VDDI NC_86 L2
K5 H3 L2 L2 L2 NC_73
RESET NC_65 NC_73 NC_87 NC_87 L3
H12 L3 L3 L3 NC_74
C8100 NC_67 NC_74 NC_88 NC_88 E7 L12
OPT 0.1uF H13 E7 L12 E7 L12 C4 L12 VSS_1 NC_75
NC_68 VSS_1 NC_75 VSS_1 NC_89 VSS_1 NC_89 G5 L13
16V C6 H14 G5 L13 G5 L13 E7 L13 VSS_2 NC_76
VCCQ_1 NC_69 VSS_2 NC_76 VSS_2 NC_90 VSS_2 NC_90 H10 L14
3.3V_EMMC 3.3V_EMMC M4 J1 H10 L14 H10 L14 G5 L14 VSS_3 NC_77
N4
VCCQ_2 HYNIX_EMMC_4GB NC_70
J2 K8
VSS_3 NC_77
M1 K8
VSS_3 NC_91
M1 H10
VSS_3 NC_91
M1
K8
VSS_4 NC_78
M1
VCCQ_3 NC_71 VSS_4 NC_78 VSS_4 NC_92 VSS_4 NC_92 C4 M2
P3 J3 C4 M2 C4 M2 K8 M2 VSSQ_1 NC_79
VCCQ_4 NC_72 VSSQ_1 NC_79 VSSQ_1 NC_93 VSS_5 NC_93 N2 M3
P5 J12 N2 M3 N2 M3 N2 M3 VSSQ_2 NC_80
VCCQ_5 NC_74 VSSQ_2 NC_80 VSSQ_2 NC_94 VSS_6 NC_94 N5 M7
EMMC_CLK_BALL
EMMC_CMD_BALL
EMMC_RESET_BALL
DAT3
DAT4
DAT5
DAT6
J13 N5 M7 N5 M7 N5 M7 VSSQ_3 NC_81

C8105 C8106 NC_75 VSSQ_3 NC_81 VSSQ_3 NC_95 VSS_7 NC_95 P4 M8
0.1uF 2.2uF J14 EMMC_RESET_BALL P4 M8 P4 M8 P4 M8 VSSQ_4 NC_82
NC_76 VSSQ_4 NC_82 VSSQ_4 NC_96 VSS_8 NC_96 P6 M9
16V 10V E6 K1 P6 M9 P6 M9 P6 M9 VSSQ_5 NC_83
VCC_1 NC_77 VSSQ_5 NC_83 VSSQ_5 NC_97 VSS_9 NC_97 M10
F5 K2 M10 M10 M10 NC_84
VCC_2 NC_78 NC_84 NC_98 NC_98 M11
J10 K3 M11 M11 M11 NC_85
VCC_3 NC_79 NC_85 NC_99 NC_99 M12
K9 K12 M12 M12 M12 NC_86
VCC_4 NC_83 NC_86 NC_100 NC_100 A1 M13
K13 A1 M13 A1 M13 A1 M13 NC_1 NC_87
NC_84 NC_1 NC_87 NC_1 NC_101 NC_1 NC_101 A2 M14
EMMC_VDDI K14 A2 M14 A2 M14 A2 M14 NC_2 NC_88
NC_85 NC_2 NC_88 NC_2 NC_102 NC_2 NC_102 A8 N1
C2 L1 A8 N1 A8 N1 A8 N1 NC_3 NC_89
VDDI NC_86 NC_3 NC_89 NC_5 NC_103 NC_5 NC_103 A9 N3
L2 A9 N3 A9 N3 A9 N3 NC_4 NC_90
C8104 NC_87 NC_4 NC_90 NC_6 NC_104 NC_6 NC_104 A10 N6
1uF L3 A10 N6 A10 N6 A10 N6 NC_5 NC_91
NC_88 NC_5 NC_91 NC_7 NC_105 NC_7 NC_105 A11 N7
10V E7 L12 A11 N7 A11 N7 A11 N7 NC_6 NC_92
VSS_1 NC_89 NC_6 NC_92 NC_8 NC_106 NC_8 NC_106 A12 N8
G5 L13 A12 N8 A12 N8 A12 N8 NC_7 NC_93
H10 L14 A13 N9 A13 N9 A13 N9 NC_8 NC_94
K8 M1 A14 N10 A14 N10 A14 N10 NC_9 NC_95
VSS_4 NC_92 NC_9 NC_95 NC_11 NC_109 NC_11 NC_109 B1 N11
C8102 C8103 C4 M2 B1 N11 B1 N11 B1 N11 NC_10 NC_96
0.1uF 2.2uF VSSQ_1 NC_93 NC_10 NC_96 NC_12 NC_110 NC_12 NC_110 B7 N12
N2 M3 B7 N12 B7 N12 B7 N12 NC_11 NC_97
16V 10V VSSQ_2 NC_94 NC_11 NC_97 NC_13 NC_111 NC_13 NC_111 B8 N13
N5 M7 B8 N13 B8 N13 B8 N13 NC_12 NC_98
VSSQ_3 NC_95 NC_12 NC_98 NC_14 NC_112 NC_14 NC_112 B9 N14
P4 M8 B9 N14 B9 N14 B9 N14 NC_13 NC_99
VSSQ_4 NC_96 NC_13 NC_99 NC_15 NC_113 NC_15 NC_113 B10 P1
P6 M9 B10 P1 B10 P1 B10 P1 NC_14 NC_100
VSSQ_5 NC_97 NC_14 NC_100 NC_16 NC_114 NC_16 NC_114 B11 P2
M10 B11 P2 B11 P2 B11 P2 NC_15 NC_101
NC_98 NC_15 NC_101 NC_17 NC_115 NC_17 NC_115 B12 P8
M11 B12 P8 B12 P8 B12 P8 NC_16 NC_102
M12 B13 P9 B13 P9 B13 P9 NC_17 NC_103
A1 M13 B14 P11 B14 P11 B14 P11 NC_18 NC_104
DAT3 NC_1 NC_101 NC_18 NC_104 NC_20 NC_120 NC_20 NC_120 C1 P12
A2 M14 C1 P12 C1 P12 C1 P12 NC_19 NC_105
DAT4 NC_2 NC_102 NC_19 NC_105 NC_21 NC_121 NC_21 NC_121 C3 P13
A8 N1 C3 P13 C3 P13 C3 P13 NC_20 NC_106
NC_5 NC_103 NC_20 NC_106 NC_22 NC_122 NC_22 NC_122 C7 P14
A9 N3 EMMC_CMD_BALL C7 P14 C7 P14 C7 P14 NC_22 NC_107
NC_6 NC_104 NC_22 NC_107 NC_24 NC_123 NC_24 NC_123
A10 N6
NC_7 NC_105
A11 N7
NC_8 NC_106
A12 N8
NC_9 NC_107
A13 N9
NC_10 NC_108
A14 N10
NC_11 NC_109
B1 N11
NC_12 NC_110
B7 N12
NC_13 NC_111
B8 N13
NC_14 NC_112
B9 N14
NC_15 NC_113
B10 P1 IC8100-*8
NC_16 NC_114 H26M42002GMR
B11 P2 EMMC_CLK_BALL IC8100-*5
KLM4G1FE3B-B001
IC8100-*6
THGBM5G6A2JBAIR
IC8100-*7
KLMAG2GE4A-A001
NC_17 NC_115 A3 C8
B12 P8 A3 C8 A3 C8 A3 C8
A4
DAT0
DAT1
NC_25
NC_26
C9
NC_18 NC_117 A4
DAT0 NC_25
C9 A4
DAT0 NC_23
C9 A4
DAT0 NC_22
C9
A5
DAT2
C10
SAMSUNG_EMMC_16G
NC_27
Don’t Connect Power At VDDI

EMMC_VDDI B13 P9 A5
DAT2 NC_27
C10 A5
DAT2 NC_25
C10 A5
DAT2 NC_24
C10
B3
DAT3 NC_28
C12
HYNIX_EMMC_8GB
B2 C11 B2 C11 B2 C11
DAT3 NC_28 DAT3 NC_26 DAT3 NC_25 DAT4 NC_29
NC_19 NC_118 B3
DAT4
C12 B3 C12 B3 C12 B4 C13
SAMSUNG_EMMC_4GB
TOSHIBA_EMMC_8GB
NC_29 DAT4 NC_27 DAT4 NC_26 DAT5 NC_30
B4 C13 B4 C13 B4 C13
B14 P11 B5
B6
DAT5
DAT6
NC_30
NC_31
C14
D1
B5
B6
DAT5
DAT6
NC_28
NC_29
C14
D1
B5
B6
DAT5
DAT6
NC_27
NC_28
C14
D1
B5
B6
DAT6 NC_31
C14
D1
NC_20 NC_120 DAT7 NC_32

D2
DAT7 NC_30
D2
DAT7 NC_29
D2
DAT7 NC_32
NC_33
D2
C1 P12 M6
NC_33
NC_34
D3
D4 M6
NC_31
NC_32
D3
D4 M6
NC_30
NC_31
D3
D4 M6
NC_34
D3
D4
NC_21 NC_121 M5
CLK
CMD
NC_35
NC_36
D12 M5
CLK
CMD
NC_33
NC_34
D12 M5
CLK
CMD
NC_32
NC_33
D12 M5
CLK NC_35
D12
(Just Interal LDO Capacitor)

CMD NC_36
C3 P13 NC_37
D13
D14
NC_35
D13
D14
NC_34
D13
D14 NC_37
D13
D14
DAT5 NC_22 NC_122 A6
A7
NC_3
NC_38
NC_39
E1
E2
A6
A7
RFU_1
NC_36
NC_37
E1
E2
A6
A7
RFU_1
NC_35
NC_36
E1
E2
A6
NC_38
E1
C7 P14 C5
E5
NC_4
NC_23
NC_40
NC_41
E3
E12
C5
E5
RFU_2
NC_21
NC_38
NC_39
E3
E12
C5
E5
RFU_2
RFU_3
NC_37
NC_38
E3
E12
A7
C5
NC_3
NC_4
NC_39
NC_40
E2
E3
NC_24 NC_123 E8
E9
NC_42
NC_43
NC_46
NC_47
E13
E14
E8
E9
RFU_3
RFU_4
NC_40
NC_41
E13
E14
E8
E9
RFU_4
RFU_5
NC_40
NC_41
E13
E14
E5
NC_23
NC_42
NC_41
NC_46
E12
NC_44 NC_48 RFU_5 NC_42 RFU_6 NC_42 E8 E13
E10 F1 E10 F1 E10 F1 NC_43 NC_47
NC_45 NC_49 RFU_6 NC_43 NC_39 NC_43 E9 E14
F10 F2 F10 F2 F10 F2 NC_44 NC_48
G3
NC_52 NC_50 RFU_7 NC_44 RFU_7 NC_44 E10 F1
F3 G3 F3 G3 F3 NC_45 NC_49
NC_58 NC_51 RFU_8 NC_45 RFU_8 NC_45 F10 F2
G10 F12 G10 F12 G10 F12
NC_59 NC_53 RFU_9 NC_46 RFU_9 NC_46 NC_52 NC_50
H5 F13 H5 F13 H5 F13 G3 F3
J5
NC_66 NC_54
F14 J5
RFU_10 NC_47
F14 J5
RFU_10 NC_47
F14
NC_58 NC_51
G10 F12
NC_73 NC_55 RFU_11 NC_48 RFU_11 NC_48 NC_59 NC_53
K6 G1 K6 G1 K6 G1 H5 F13
NC_80 NC_56 RFU_12 NC_49 RFU_12 NC_49
K7 G2 K7 G2 K7 G2 NC_66 NC_54
NC_81 NC_57 RFU_13 NC_50 RFU_13 NC_50 J5 F14
K10 G12 K10 G12 K10 G12 NC_73 NC_55
P7
NC_82 NC_60 RFU_14 NC_51 RFU_14 NC_51 K6 G1
G13 P7 G13 P7 G13 NC_80 NC_56
NC_116 NC_61 RFU_15 NC_52 RFU_15 NC_52 K7 G2
P10 G14 P10 G14 P10 G14
NC_119 NC_62 RFU_16 NC_53 NC_104 NC_53 NC_81 NC_57
H1 H1 H1 K10 G12
NC_63 NC_54 NC_54 NC_82 NC_60
DU1 DU9 K5
RSTN
NC_64
NC_65
H2
H3 K5
RSTN
NC_55
NC_56
H2
H3 K5
RESET
NC_55
NC_56
H2
H3
P7
P10
NC_116 NC_61
G13
G14
DUMMY_1 DUMMY_9 NC_67
H12
H13
NC_57
H12
H13
NC_57
H12
H13
NC_119 NC_62
NC_63
H1
DU2 DU10 C6
M4
VDD_1
NC_68
NC_69
H14
J1
C6
M4
VCCQ_1
NC_58
NC_59
H14
J1
C6
M4
VDD_1
NC_58
NC_59
H14
J1 K5
NC_64
H2
H3
DUMMY_2 DUMMY_10 N4
VDD_2 NC_70
J2 N4
VCCQ_2 NC_60
J2 N4
VDD_2 NC_60
J2
RESET NC_65
H12
DU3 DU11 P3
P5
VDD_3
VDD_4
NC_71
NC_72
J3
J12
P3
P5
VCCQ_3
VCCQ_4
NC_61
NC_62
J3
J12
P3
P5
VDD_3
VDD_4
NC_61
NC_62
J3
J12 C6
NC_67
NC_68
H13
H14
DUMMY_3 DUMMY_11 VDD_5 NC_74
NC_75
J13
VCCQ_5 NC_63
NC_64
J13
VDD_5 NC_63
NC_64
J13
M4
VCCQ_1 NC_69
J1
DU4 DU12 E6
VDDF_1
NC_76
NC_77
J14
K1 E6
VCC_1
NC_65
NC_66
J14
K1 E6
VDDF_1
NC_65
NC_66
J14
K1
N4
P3
VCCQ_2
VCCQ_3
NC_70
NC_71
J2
J3
DUMMY_4 DUMMY_12 F5
J10
VDDF_2 NC_78
K2
K3
F5
J10
VCC_2 NC_67
K2
K3 J10
F5
VDDF_2 NC_67
K2
K3 P5
VCCQ_4 NC_72
J12
DU5 DU13 K9
VDDF_3
VDDF_4
NC_79
NC_83
K12
K13
K9
VCC_3
VCC_4
NC_68
NC_69
K12
K13
K9
VDDF_3
VDDF_4
NC_68
NC_69
K12
K13
VCCQ_5 NC_74
NC_75
J13

K14
NC_70
K14
NC_70
K14
E6
NC_76
J14
K1
DU6 DU14 C2
VDDI
NC_85
NC_86
L1
L2
C2
VDDI
NC_71
NC_72
L1
L2
C2
VDDI
NC_71
NC_72
L1
L2
F5
VCC_1
VCC_2
NC_77
NC_78
K2

NC_88
L3
NC_73
NC_74
L3
NC_73
NC_74
L3 J10
VCC_3 NC_79
K3
DU7 DU15 E7
G5
VSS_2
VSS_3
NC_89
NC_90
L12
L13
E7
G5
VSS_1
VSS_2
NC_75
NC_76
L12
L13
E7
G5
VSS_2
VSS_3
NC_75
NC_76
L12
L13
K9
VCC_4 NC_83
NC_84
K12
K13
DUMMY_7 DUMMY_15 H10

K8
VSS_4 NC_91
L14
M1
H10
K8
VSS_3 NC_77
L14
M1
H10
K8
VSS_4 NC_77
L14
M1 NC_85
K14
DU8 DU16 C4
N2
VSS_5
VSS_1
NC_92
NC_93
M2
M3
C4
N2
VSS_4
VSSQ_1
NC_78
NC_79
M2
M3
C4
N2
VSS_9
VSS_1
NC_78
NC_79
M2
M3
C2
VDDI NC_86
L1
L2
DUMMY_8 DUMMY_16 N5
P4
VSS_6
VSS_7
NC_94
NC_95
M7
M8
N5
P4
VSSQ_2
VSSQ_3
NC_80
NC_81
M7
M8
N5
P4
VSS_5
VSS_6
NC_80
NC_81
M7
M8 E7
NC_87
NC_88
L3
L12
P6
VSS_8 NC_96
P6
VSSQ_4 NC_82
P6
VSS_7 NC_82 VSS_1 NC_89
M9 M9 M9 G5 L13
VSS_9 NC_97 VSSQ_5 NC_83 VSS_8 NC_83 VSS_2 NC_90
M10 M10 M10 H10 L14
NC_98 NC_84 NC_84
M11 M11 M11 VSS_3 NC_91
NC_99 NC_85 NC_85 K8 M1
M12 M12 M12 VSS_4 NC_92
A1
NC_100
A1
NC_86
A1
NC_86 C4 M2
M13 M13 M13 VSSQ_1 NC_93
NC_1 NC_101 NC_1 NC_87 NC_1 NC_87 N2 M3
A2 M14 A2 M14 A2 M14
NC_2 NC_102 NC_2 NC_88 NC_2 NC_88 VSSQ_2 NC_94
A8 N1 A8 N1 A8 N1 N5 M7
A9
NC_5 NC_103
A9
NC_3 NC_89
A9
NC_3 NC_89 VSSQ_3 NC_95
N3 N3 N3 P4 M8
NC_6 NC_104 NC_4 NC_90 NC_4 NC_90 VSSQ_4 NC_96
A10 N6 A10 N6 A10 N6 P6 M9
NC_7 NC_105 NC_5 NC_91 NC_5 NC_91
A11 N7 A11 N7 A11 N7 VSSQ_5 NC_97
NC_8 NC_106 NC_6 NC_92 NC_6 NC_92 M10
A12 N8 A12 N8 A12 N8 NC_98
A13
NC_9 NC_107
A13
NC_7 NC_93
A13
NC_7 NC_93 M11
N9 N9 N9 NC_99
NC_10 NC_108 NC_8 NC_94 NC_8 NC_94 M12
A14 N10 A14 N10 A14 N10
NC_11 NC_109 NC_9 NC_95 NC_9 NC_95 NC_100
B1 N11 B1 N11 B1 N11 A1 M13
B7
NC_12 NC_110
B7
NC_10 NC_96
B7
NC_10 NC_96 NC_1 NC_101
N12 N12 N12 A2 M14
B8 N13 B8 N13 B8 N13 A8 N1
NC_14 NC_112 NC_12 NC_98 NC_12 NC_98
B9 N14 B9 N14 B9 N14 NC_5 NC_103
NC_15 NC_113 NC_13 NC_99 NC_13 NC_99 A9 N3
B10 P1 B10 P1 B10 P1 NC_6 NC_104
B11
NC_16 NC_114
B11
NC_14 NC_100
B11
NC_14 NC_100 A10 N6
P2 P2 P2 NC_7 NC_105
NC_17 NC_115 NC_15 NC_101 NC_15 NC_101 A11 N7
B12 P8 B12 P8 B12 P8
B13 P9 B13 P9 B13 P9 A12 N8
B14
NC_19 NC_118
B14
NC_17 NC_103
B14
NC_17 NC_103 NC_9 NC_107
P11 P11 P11 A13 N9
NC_20 NC_120 NC_18 NC_104 NC_18 RFU_16 NC_10 NC_108
C1 P12 C1 P12 C1 P12 A14 N10
NC_21 NC_121 NC_19 NC_105 NC_19 NC_105
C3 P13 C3 P13 C3 P13 NC_11 NC_109
NC_22 NC_122 NC_20 NC_106 NC_20 NC_106 B1 N11
C7 P14 C7 P14 C7 P14 NC_12 NC_110
NC_24 NC_123 NC_22 NC_107 NC_21 NC_107 B7 N12
NC_13 NC_111
B8 N13
NC_14 NC_112
B9 N14
NC_15 NC_113
B10 P1
DU1 DU9 NC_16 NC_114
DUMMY_1 DUMMY_9 B11 P2
DU2 DU10 NC_17 NC_115
DU3 DU11 NC_18 NC_117
DU4 DU12 NC_19 NC_118
DU5 DU13
DUMMY_5 DUMMY_13 NC_20 NC_120
DU6 DU14 C1 P12
DU7 DU15 C3 P13
DU8 DU16 C7 P14
DUMMY_8 DUMMY_16
NC_24 NC_123

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS eMMC 11.09.29
81

Recommended Troubleshooting & Repairing Guide:
V3.0 –LED & LCD TV V2.0- LCD TV Repair
Repair Tips ebook Tips & Case Histories
“More information on
T-con Board & Mainboard
Secret Repair Tips!”
Vol-3 LCD/LED
V1.0- Collection of LCD Monitor Repair Case
TV Repair Tips Histories by Jestine
Yong
LCD/LED & 3D TV Plasma & 3D TV

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Case Histories of LCD
Monitor
SMPS-Switch Mode Testing Electronic

Power Supply Repair Components like a Pro-
Guide For Beginner
Please visit: http://lcd-television-repair.com/newsletter/Recommend.html

OLED vs. LED
OLED is next generation display which is simple, thin and light. OLED can achieve natural and vivid colors due to self-emitting
characteristics
LCD OLED
Polarizing plate
BLU TFT Cell CF Polarizing plate TFT&OLED Polarizing plate
+Prism
+Diffuser
Simple structure with not many

Indirect light source display, which is components (without BLU)  Paper
complex and consists of many slim & light
components. Self-emitting display
Light is supplied from BLU and goes  Better response time / contrast
through many layers ratio compared to LCD
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Main PCB for Broadband
55EA9800 Cl
Clear S
Speaker
k CAM USB
Local Dim.
To PSU
Module 1 Main processor_Digital(LG1152D),

1
DDR Memory
Flash Memory
2 Main processor_analog(LG1152A)
wifi 2
Micom for Key/IR sensing
3 3
Motion assy
IR + Digital Eye 4 Audio AMP (Max 12W)
5
Front Spk 4 5 HDMI switch (4:1)
Local Key

H13 Block diagram
DIF(P/N)
CVBS
Tuner M-Remote_Rx/Tx
SIF AUD Motion-R
BB_TP_DATA SPDIF
OPTIC
LNB
CVBS IRB_SPI IR_B

SC_CVBS, RGB, Audio L/R IR_Blaster
Micom
SCART H13 H13
DTV/MNT_LR/V_OUT
LG1154A DAC_DATA LG1154D H/P Audio L/R
H/P AMP H/P
PC_Audio_L/R AAD_DATA
PC_AUDIO I2S Audio
A di SPK/
AV1_CVBS AMP Clear Speaker
HSR_P/M
AV1 AV1_Audio L/R
Comp1 Y,Pb,Pr
COMP1
CI
HDMI CI
HDMI1~4 Switch
HDMI CEC
HDMI_CEC
OLED Module
Logo Light
WOL / WOW
RMII FRC LVDS : Quad
LAN PHY TCON
USB 2.0
USB_W-iFi
USB 3.0
USB1(USB3.0)
USB 2.0
USB2(USB2.0)
USB3(USB2.0) USB USB 2.0
USB_CAM HUB
16 16 16 16 8
DDR3 DDR3 DDR3 DDR3 eMMC
4Gb×4 (1600)

H13 Block diagram
DVB-CI/CI+
H13A SDRAM TS(P) TS(P) TS(S) TS(S) H13D

(MCP)
DIF GBB AFE System Video Decoder USB2.0x3
TS (P) GPU Rogue Han
1ch@30MHz Global Baseband D
Demux Multi-STD
Multi STD
UART 3
UARTx3
w/ PLL V/Q, DVB-T/C ISDB-T HD Decoder 2D GFX
Tuner GPIOx136
(Boda950)
SIF BTSC AFE AAD JPG/PNG Decoder
EMAC
PHY
(THAT)
10b@18.432MHz Audio DSP JPG Encoder
w/ PLL I2S(External) Audio Multi-STD SCI
Mux
Audio Decoder Video Encoder SPIx2
LX4 HiFi EP
1080p@30fps
I2Cx10
1ch L/R USB3.0 x1
Audio L/R(4-ch) I2S
SW
Audio-ADC TrustZone
Sound DSP eMMC
24b@48KHz CPU
SCART out Secure Engine
Audio DAC I2S Clear Voice II DMAC(8ch)
SW
(48KHz )
CPU 48KB ROM
ARMCA9 Core Timer
Perceptual 64KB SRAM
Line Out Audio DAC (48KHz) I2S Dual 1.2GHz
Volume Control WDT
I2S(HPD) OTP
Slim SPK 32KBI$ 32KBD$ SRAM 16KB
UART
Digital AMP Digital DivX
Audio 1MB L2 $ Timer
SPDIF Bluetooth
Output
5x1ch (1ch)
CVBS(3ch) CVBS
CVBS DAC
Encoder
SW
Vx1//EPI/LVDS Combo
CVBS-Out CVBS AFE(2-ch) CVD DE BE
12b@54MHz Y/C MCU MCU
CVBS
(120Hz)
Mux
3ch Video 10x3ch

Mux
b Scaler
ormatter
AFE Capture
erlacer
e Mux
LVDS LVDS
SW
Component(2ch)
10b@148.5MHz Block
ON
Tx Rx
SD
CR
TNR
RC
RE
H3D
LED
E1
TCO
Main/Sub
Source
(3CH)
Output fo
w/ LLPLL
PE
De-inte
SR
OS
VC
FR
Audio PLL HDMI
I2Cx1 DCO
w/ DCO (1-Link) CPLL
x2
HDMI I2Cx1 GPIOIx16
HDMI-Rx 1.4 SPLL DPLL
(1-port PHY) DDR3 Controller DDR3 Controller
3D, ARC, 4kx2k DDR DDR
PLL PLL
DDR3 PHY DDR3 PHY
16 16 16 16

H13 Block diagram

H13 Block diagram
+3.3V_D_Demod
+3.3V_TU
+1.8_TU
+1.23V_D_Demod
[+3.3V_S2_DEMOD] 32
+3.3V_NORMAL
[+3.3V_TUNER] 5
[+.1.8V_TUNER] 7
3 3K Ω
3.3K
[+1.23V_S2_DEMOD] 30
LNB_TX
[S2_F22_OUTPUT] 33 10 [TONECTRL]
LNB_OUT LNB
[LNB] 36 2 [LNB]
IC6900
[S2_SCL] 34 7 [SCL]
22 Ω A8303SESTR-TB
[S2_SDA] 35 I2C_SCL4 8 [SDA]
I2C_SDA4
AP6 [SCL3]
33 Ω
AR6 [SDA3]
/TU_RESET1
[RESET] 2 AG6 [GPIO10]
[T/C_DIF[N]] 11 IC2_SCL6
TU6503 [SLC] 3
[SDA] 4
IC2 SDA6
IC2_SDA6
AH34 [SCL5]
AH33 [SDA5]
H13
TDSQ-H651F LG1154D
[ERROR] 16 FE_DEMOD1_TS_ERROR AL37 [TP_DVB_ERR]
[SYNC] 17 FE_DEMOD1_TS_SYNC AL36 [TP_DVB_SOP]
[VALID] 18 AL35 [TP_DVB_VAL]
FE_DEMOD1_TS_VAL
[MCLK] 19 AM36 [TP_DVB_CLK]
FE_DEMOD1_TS_CLK
[D0] 20 AM35 [TP_DVB_DATA0]

[D1] 21 AN36 [TP_DVB_DATA1]
[D2] 22 FE_DEMOD1_TS_DATA [0-7] AN37 [TP_DVB_DATA2]
[D3] 23 AN35 [TP_DVB_DATA3]
[D4] 24 AP37 [TP_DVB_DATA4]
[D5] 25 AP36 [TP_DVB_DATA5]
[D6] 26 AR37 [TP_DVB_DATA6]
[D7] 27 AR37 [TP_DVB_DATA7]
[TP DVB DATA7]
/S2_RESET
[S2_RESET] 31 AG5 [GPIO9]
IF_P ADC_I_INP
[T/C_DIF[P]] 10 IF_N FILTER ADC_I_INN U17 [ADC_I_INP]
[T/C_DIF[N]] 11
TUNER_SIF
V17 [ADC_I_INN] H13
TU_CVBS LG1154A
IF_AGC

H13 Block diagram
Jack Side SOC Side
AV1
Phone JACK
AV1_CVBS_IN AV1_CVBS_IN_SOC
[CVBS IN3]
[CVBS_IN3]
AV_L/R_IN AUAD_L/R_CH2_IN
FULL [AUAD_L/R_CH2_IN]
SCART
(18P)
SC_CVBS_IN SC_CVBS_IN_SOC
[CVBS IN2]
[CVBS_IN2]
SC_R/G/B
/CVBS_IN_SOY
[PR1/Y1/PB1/SOY1_IN]
COMP1_PR_IN_SOC
COMP1_Y_IN_SOC
COMP1 PB IN SOC
COMP1_PB_IN_SOC H13
COMP1_Y_IN_SOC_SOY
(LG1154A)
SC_L/R_IN AUAD_L/R_CH3_IN
[AUAD_L/R_CH3_IN]
Component 1
Phone JACK
COMP1_Y/Pb/Pr
[PB2/Y2/SOY2/PR2_IN]
COMP2_PB_IN_SOC
COMP2_Y_IN_SOC
COMP2_Y_IN_SOC_SOY
COMP2_PR_IN_SOC
Tuner
TU_CVBS_IN TU_CVBS_IN_SOC
[CVBS_IN1]
SIF TUNER_SIF
DIF[P/N] ADC_I_INP/INN [AAD_ADC_SIF]
[[ADC_I_INP/INN]]

H13 Block diagram
MICOM
SCART
CART_MUTE
Mute
CTRL
[[AUAD_L_CH1_IN]]
[TR]
SC
SC_L/R_IN
[AUAD_L_CH3_IN]
SCART_Lout/Rout AZ4580MTR DTV/MNT_L/R_OUT AUDIO L/R OUT
[AUD_SCART_OUTL/OUTR]
AV_L/R_IN OP AMP
pi filter
[AUAD_L_CH2_IN]
[[DACSCK]]
[DACLRCK]
MAIN 4P wafer
[DACLRCH]
AUD_SCK/LRCK/LRCH
[SCL0/SDA0]
LPF
I2C_SCL1/SDA1 TAS5733
LPF
[GPIO21]
AMP_RESET_N
H13
LG1154
WOOFER 2P wafer
LPF
TAS5733
LPF
AMP_MUTE
Tuner
MICOM
SIDE_HP_MUTE
_ _
TUNER SIF
TUNER_SIF
[AAD_ADC_SIF]
TPA6138A2
HP_L/ROUT_MAIN
[AUDA_OUTL] Headphone LPF
[PHY0_ARC_OUT_0] [IEC958OUT] AMP HEAD PHONE
& line out
SPDIF_OUT
SPDIF_OUT_ARC

H13 Block diagram
HDMI1
SPDIF_OUT_ARC
TMDS Link 8bits
CEC_REMOTE
HDMI_S/W_RESET
HDMI S/W RESET
DDC_I2C 2bits
HDMI_INT
SPDIF_OUT_ARC
HDMI HDMI2
Switch
TMDS Link 8bits
(IC3201 / SII9587CNUC)
H13 CEC_REMOTE
LG1154D HDMI Out put 8bits
DDC I2C 2bits

DDC_I2C 2bit
I2C_SCL/SDA 5 2bits
HDMI3
TMDS Link 8bits
CEC_REMOTE
CEC_REMOTE
DDC_I2C 2bits
MICOM
(IC3000 / HDMI4
R5F100GEAFB)
TMDS Link 8bits
CEC_REMOTE
DDC_I2C 2bits
OCP MHL_DET
(IC3202 /
TPS2051)

H13 Block diagram
USB CAMERA DP / DM
USB_CAMERA_DP CAM DET
CAM_DET MICOM
USB_Camera (R5F100GEAFB)
USB2_HUB_IC_IN_DP / DM USB HUB (구주7600 - Ready)
[USB2_2_DP0 / DM0]
USB2512B-AEZG
USB_DP3 / DM3
USB3
USB_CTL3 +5V_USB3
USB_CTL2
_
OCP USB2/3
+5V USB2
+5V_USB2
[EB_CS2/GPIO92] TPS2062C
USB2_ DP2 / DM2
[USB2_1_DP0 / DM0] USB2
WIFI_DP / DM WOL/WOW_POWER_ON
[USB2_0_DP / DM] USB_WIFI
[USB3_DP0/DM0] USB3_DP / DM
USB1
[USB3_RX0P / M] USB3_RX0P/RX0M (USB3.0, PVR Ready)
[USB3_TX0P / M] USB3_TX0P/TX0M
USB_CTL2
[HUB_VBUS_CTRL0] OCP USB1 +5V_USB1
[HUB_PORT_OVER0/1]
/USB OCD1
/USB_OCD1 TPS2554
[UART1_RXD / TXD]
M_REMOTE_RX / TX
[GPIO15 / GPIO18]
M_REMOTE_CTS / RTS Motion Remote
M_REMOTE_RESET Receiver
[GPIO13]
H13
LG1154D
[UART0_RXD]
[UART0_TXD]
SOC_TX SOC_RX SOC_TX SOC_RX
MICOM 4Pin debugging

(R5F100GEAFB) Wafer
P3800

Interconnection - 1
55EA9800
[PCBs]
2 1 Main PCB
1 2 PSU
3 WIFI ASSY
4 BT MOTION ASSY
5 IR PCB
4 3
6 Touch Key / Logo
5
6

Contents of LCD TV Standard Repair Process
No. Error symptom (High category) Error symptom (Mid category) Page Remarks
1 No video/Normal audio 1
2 No video/No audio 2
3 A. Video error Picture broken/ Freezing 3
4 Color error 4
Vertical/Horizontal bar
bar, residual image
image,
5 5
light spot, external device color error
6 No power 6
B Power error
B. Off when
h on, off
ff while
hil viewing,
i i power
7 7
auto on/off
8 No audio/Normal video 8
C. Audio error
9 Wrecked audio/discontinuation/noise 9
10 Remote control & Local switch checking 10
11 MR13 operating
i checking
h ki 11
12 D. Function error Wifi operating checking 12

13 Camera operating checking 13
14 External device recognition error 14
15 E. Noise Circuit noise, mechanical noise 15
16 F. Exterior error Exterior defect 16
First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Standard Repair Process
Established
Error A. Video error date 2013.01.31
LCD TV symptom
No video/ Normal audio Revised date 1/16
First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D↔ Power B/D, EPI Cable,Speaker Cable,IR B/D Cable,,,)
☞A1 ☞A18
No video Normal Y Check OLED Light Y Check Power Normal Y Replace T-con
Normal audio On Board or module
audio On with naked eye Board voltage
24V, 12V,3.5V etc. And Adjust VCOM
N N N
Move to No Check Power Board 24V output Repair Power
☞A18
video/No audio Board or parts
Replace Inverter
Normal Y
or module
voltage
End
N
Repair Power
Board or parts
※Precaution ☞A4 & A2

Always check & record S/W Version and White
Replace Main Board Re-enter White Balance value
Balance value before replacing the Main Board

Established
LCD TV symptom
No video/ No audio Revised date 2/16
☞A18
Check various Check and
Normal Y
No Video/ voltages of Power replace
No audio Board ( 3.5V,12V,20V voltage?
MAIN B/D
or 24V…)
N End
Replace Power
Board and repair
parts

Established
LCD TV symptom
Picture broken/ Freezing Revised date 3/16
. By using Digital signal level meter

☞ A3
. By using Diagnostics menu on OSD
Check RF Signal level ( Setting→ Set up→ Manual Tuning → Check the Signal )
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)
Y Check whether other equipments have problem or not.

Normal
(By connecting RF Cable at other equipment)
Signal?
→ DVD Player ,Set-Top-Box,
,Set Top Box, Different maker TV etc`
etc
N
☞ A4
Check RF Cable
Normal Y Check SVC N Check Y
Connection Close
1. Reconnection Picture? S/W Version Bulletin? Tuner soldering
T ld i
2. Install Booster N
Y
N
S/W Upgrade
Normal N Contact with signal distributor
Picture? or broadcaster (Cable or Air)
Normal N
Y Picture? Replace
Main B/D
Y
Close
Close

Established
LCD TV symptom
Color error Revised date 4/16
☞A6 ☞ A7
※ Check Y
Check color by input
and replace
-External Input Y Y
Color Link Cable Color Color
-COMPONENT
COMPONENT Replace Main B/D Replace module
error? (EPI) and error? error?
-AV
contact
-HDMI N N N
condition
Check error End

color input
mode
☞A8 Check
External Input/ External device Y
external
Ch k T
Check Testt pattern
tt C
Component t /C bl
/Cable R l
Replace M
Main
i B/D
device and
error normal
cable
N
Request repair
for external
device/cable
Check external External device Y

HDMI device and /Cable Replace Main B/D
error cable normal

Error
A. Video error Established
2013.01.31
date
LCD TV symptom Vertical / Horizontal bar, residual image,
light spot, external device color error Revised date 5/16
Vertical/Horizontal bar, residual image, light spot Replace

Module
☞A6
☞ A7 N
Check color condition by input Check external
Check and
-External Input Screen Y device Y Screen N Screen
-Component Normal? replace Link Replace Main B/D
normal? connection normal? normal?
-HDMI
HDMI Cable (adjust VCOM)
condition
N N For LGD panel Y
Y
Replace Main B/D
Replace Request repair End End
for external
A8
☞A8 module
device
Check Test pattern
For other panel
External device screen error-Color error

Check screen
condition by input
-External Input External
Check S/W Version Check N
-Component Input Connect other external N
version
-HDMI/DVI error device and cable Screen Replace
(Check normal operation of normal? Main B/D
Y External Input, Component,
Component RGB and HDMI/DVI by
error Y
S/W Upgrade connecting Jig, pattern
Generator ,Set-top Box etc.
Request repair for
external device
Y
Connect other external
Normal N HDMI/
device and cable N
screen? DVI Screen Replace
(Check normal operation of
E t
External
l Input,
I t Component,
C t normal? Main B/D
Y RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.
End
5

Established
Error B. Power error date 2013.01.31
LCD TV symptom
No power Revised date 6/16
☞A17 ☞A18
DC Power on R l
Replace
Check Power LED Y Normal N Check Power Y
by pressing Power Key OK? Power
Logo LED On? operation? On ‘”High”
On Remote control B/D
. Stand-By: Red or Turn Off
N Y
. Operating: Turn Off
Check Power cord Replace Main B/D
was inserted properly
☞A18
N Measure voltage of each output of Power B/D
Normal?
Y
Y Y
Normal
※ voltage?
g
Replace Main B/D
Close Normal
Check ST-BY 3.5V
Y
voltage? N
☞A18 Replace Power B/D
N
Replace Power
B/D

Established
Error B. Power error date 2013.01.31
LCD TV symptom
Off when on
on, off while viewing,
viewing power auto on/off Revised date 7/16
Check outlet
☞A19
N Y
Check A/C cord Error? Check Power Off CPU Normal? End
Replace Main B/D
Mode Abnormal
N
Check for all 3- phase
power out Y Abnormal Replace Power B/D
1
Fix A/C cord & Outlet ☞A18

and check each 3
(If Power Off mode
phase out
is not displayed) Normal Y
Replace Main B/D
Check Power B/D voltage?
voltage
N
※ Caution
Ch k and
Check d fix
fi exterior
i Replace Power B/D
of Power B/D Part
* Please refer to the all cases which Status Power off List Explanation
"POWEROFF REMOTEKEY"
"POWEROFF_REMOTEKEY" P
Power off
ff b
by REMOTE CONTROL
can be displayed on power off mode.
"POWEROFF_OFFTIMER" Power off by OFF TIMER
"POWEROFF_SLEEPTIMER" Power off by SLEEP TIMER
"POWEROFF_INSTOP" Power off by INSTOP KEY
"POWEROFF_AUTOOFF" Power off by AUTO OFF
N
Normal
l "POWEROFF_ONTIMER"
"POWEROFF ONTIMER" P
Power off
ff b
by ON TIMER
"POWEROFF_20V_DET" Power off by AC OFF
"POWEROFF_RESREC" Power off by Reservated Record
"POWEROFF_RECEND" Power off by End of Recording
"POWEROFF_SWDOWN" Power off by S/W Download
"POWEROFF UNKNOWN"
"POWEROFF_UNKNOWN" P
Power off
ff b
by unknown
k status
t t exceptt lilisted
t d case
"POWEROFF_ABNORMAL1" Power off by abnormal status except CPU trouble
Abnormal
"POWEROFF_CPUABNORMAL" Power off by CPU Abnormal

Established
Error C. Audio error date 2013.01.31
LCD TV symptom
No audio/ Normal video Revised date 8/16
☞A20 ☞A21+A18
Check user N Check audio B+ 24 Y
No audio Normal
menu > Off of Power Board
Screen normal voltage
Speaker off
Y N
Cancel OFF Replace Power Board and repair parts
Check N
Disconnection Replace MAIN Board End
Speaker
disconnection
Y
Replace Speaker

Established
Error C. Audio error date 2013.01.31
LCD TV symptom
Wrecked audio/ discontinuation/noise Revised date 9/16
→ abnormal audio/discontinuation/noise is same after “Check input signal” compared to No audio
Wrecked audio/
☞A21+A18
Check and replace
Discontinuation/ Check audio
speaker and
Noise for B+ Voltage (24V)
connector
Check input all audio
signal Y Y
Signal
-RF
normal? Wrecked audio/
-External Input Normal
signal Discontinuation/
N Replace Main B/D voltage?
Noise only
for D-TV
N
Wrecked audio/
Discontinuation/
Replace Power B/D
Noise only
for Analog
(When RF signal is not
received)
Request repair to external Wrecked audio/ Replace Main B/D End
cable/ANT provider Discontinuation/
Noise only
for External Input
(In case of N
External Input Connect and check Normal
signal error) other external audio?
Check and fix device
external device Y
Check and fix external device

Error
D. Function error Established
2013.01.31
date
LCD TV symptom
Remote control & Local switch checking Revised date 10/16
1. Remote control(R/C) operating error Replace

Main B/D
☞A22 ☞A22 A22
☞A22
Check & Repair N Check B+ Y Y
Check R/C itself Normal Y Normal Normal Check IR Normal
operating? Cable connection operating? 3.5V Voltage? Signal?
Operation Output signal
Connector solder On Main B/D
N
Y N N
☞A18
Check R/C Operating Check & Replace Close Check 3.5v on Power B/D Repair/Replace
When turn off light Baterry of R/C Replace Power B/D or IR B/D
in room Replace Main B/D
(Power B/D don’t have problem)
If R/C operate, Normal Y
operating? Close
Explain the customer
cause is interference
from light in room. N
Replace R/C
10

Error
2013.01.31
date
LCD TV symptom
MR13/P operating checking Revised date 11/16
2. MR13/P (Magic Remocon) operating error

☞A4
Check the N Check MR13/P
RF Receiver ver Normal Y Press the Is show ok N Turn off/on the
INSTART menu is “00.00”? itself Operation operating? set and press
wheel message?
the wheel
N
Y
Y
☞A23
Check & Replace Close
Check & Repair Battery of MR13/P
RF assy
connection
Normal Y
☞A4 operating? Close
Is show ok N Press the back
RF Receiver ver N message? y about 5sec
key
Cl
Close N
is “00.00”?
Y
Replace
MR13
Y Close
Down load the Firmware

•If you conduct the loop at 3times, change the
* INSTART MENUÆ02.11 MR13/P.
Remocon TestÆ3. Firmware
download
11

Error
2013.01.31
date
LCD TV symptom
Wifi operating checking Revised date 12/16
3.Wifi operating error
☞A4 ☞A24
Check the Wi-Fi Mac value N Check the Wifi wafer Normal N Replace
INSTART menu is “NG”? Voltage?
1pin Main B/D
Y
☞A24 Y
Check & Repair Close

Wifi cable
connection
☞A4
Wi-Fi Mac value N
is “NG”? Close
Change the Wifi

assy
12

Error
2013.01.31
date
LCD TV symptom
Camera operating checking Revised date 13/16
4.Camera operating error
☞A4 ☞A25
Check the Camera Ver. N Check the Camera wafer Normal N Replace
INSTART menu is “NG”? Voltage?
P4200 2pin Camera B/D
Y
☞A25 Y
Check & Repair Close

Camera cable
connection
☞A4
Camera Ver. N
is “NG”? Close
Change the
Camera assy
13

Established
Error D. Function error date 2013.01.31
LCD TV symptom
External device recognition error Revised date 14/16
Y Check technical
Check External Input and
Signal information Technical N
input Component Replace Main B/D
input? - Fix information information?
Recognition error
signal
- S/W Version
N Y
HDMI/
Check and fix DVI, Optical
Fix in Replace Main B/D
external device/cable Recognition error
accordance
with technical
information
14

Established
Error E. Noise date 2013.01.31
LCD TV symptom
Circuit noise
noise, mechanical noise Revised date 15/16
Identify Check
Circuit
nose location of Replace PSU
noise
type noise
Mechanical Check location of

noise noise
※ When the nose is severe, replace the module

(For models with fix information, upgrade the
S/W or p
provide the description)
p )
※ Mechanical
M h i l noise i iis a natural
t l OR
phenomenon, and apply the 1st level ※ If there is a “Tak Tak” noise from the
description. When the customer does not cabinet, refer to the KMS fix information and
agree, apply the process by stage. then proceed as shown in the solution manual
※ Describe the basis of the description OR
((For models without anyy fix information,,
i “P
in “Partt related
l t d tto nose”” in
i th
the O
Owner’s
’ provide the description)
Manual.
15

Established
Error F. Exterior defect date 2013.01.31
LCD TV symptom
Exterior defect Revised date 16/16
Zoom part with

Z ih Module
Replace module
exterior damage damage
Cabinet
damage Replace cabinet
Remote
controller Replace remote controller
damage
Stand
Replace
ep ace sta
stand
d
dent
16

Contents of LCD TV Standard Repair Process Detail Technical Manual
No. Error symptom Content Page Remarks

1 A. Video error
A error_ No video/Normal Check LCD back light with naked eye A1
2 audio Check White Balance value A2
TUNER input signal strength checking

4 A3
method
A. Video error
A error_ video error /Video
5 lag/stop LCD-TV Version checking method A4
6 Tuner Checking Part A5
A. Video error _Vertical/Horizontal
Vertical/Horizontal bar,
7 LCD TV connection
ti di
diagram A6
residual image, light spot
Check Link Cable (EPI) reconnection
8 A7
A. Video error_ Color error condition
9 Adj
Adjustment Test pattern - ADJ
A J Key
K A8
10 Exchange Main Board (1) A-1/5
11 Exchange Main Board (2) A-2/5
<Appendix>
Appendix
12 Defected Type caused by T-Con/ Exchange Power Board (PSU) A-3/5
Inverter/ Module
13 Exchange Module (1) A-4/5
14 Exchange Module (2) A-5/5
A 5/5
Continue to the next page

Contents of LCD TV Standard Repair Process Detail Technical Manual
Continued from previous page
No. Error symptom Content Page Remarks
16 Check front display LED A17

B. Power error_ No power
17 Check power input Voltage & ST-BY 3.5V A18
B. Power error_Off when on, off
18 POWER
POW R OFF MO
MODE checking method A19
while
hil viewing
i i
Checking method in menu when there is
19 A20
C. Audio error_ No audio/Normal no audio
video Voltage and speaker checking method
20 A21
when there is no audio
Remote controller operation checking
21 A22
method
Motion Remote operation checking
22 D. Function error A23
method
23 Wifi operation checking method A24
24 Camera operation checking method A25
25 E. Etc Tool option changing method A26

Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/Normal audio date
2013.01.31
LCD TV Revised
Content Check LCD back light with naked eye A1
date
After Remove the Rear Cover, turning on the power and disassembling the case,
check with the naked eye.
A1

Error Established
symptom A. Video error_No video/Normal audio date
2013.01.31
LCD TV Revised
Content Check White Balance value A2
date
Entry
Entrymethod
method
1.1.Press
Pressthe
theADJ
ADJbutton
buttonononthe
theremote
remotecontroller
controllerforforadjustment.
adjustment.
2.2.Enter
Enterinto
intoWhite
WhiteBalance
Balanceofofitem
item6.9.
3.3.Aft
3 After
Afterrecording
di the
ththeR,
recording RR,G
G,G,B B(GAIN,
(GAIN
(GAIN,C
Cut)
t) value
Cut) l offofC
value Color
l TTemp
Color Temp
(Cool/Medium/Warm),
(Cool/Medium/Warm), re-enter the value after replacingthe
re-enter the value after replacing theMAIN
MAINBOARD.
BOARD.
A2

Error Established
A. Video error_Video error, video lag/stop 2013.01.31
symptom date
LCD TV Revised
Content TUNER input signal strength checking method A3
date
Settings Æ Channel Æ Manual Tuning

Æ select channel
When the signal is strong, use the

attenuator ((-10dB
10dB, -15dB
15dB, -20dB
20dB etc.)
etc )
A3

Error Established
symptom A. Video error_Video error, video lag/stop date
2013.01.31
LCD TV Revised
Content LCD TV Version checking method
LCD-TV A4
date
1. Checking method for remote controller for adjustment
Version
Press the IN-START with the remote

controller
t ll forf adjustment
dj t t
A4

Error Established
symptom
A. Video error_Video error, video lag/stop 2013.01.31
LCD TV date
Revised
Content TUNER checking part A5
date
Checking method:
1. Check the signal strength or check whether the screen is normal when the external device is connected.
g each voltage
2. After measuring g from ppower supply,
pp y, finally
y replace
p the MAIN BOARD.
A5

Error A. Video error _Vertical/Horizontal bar, Established 2013.01.31
symptom residual image, light spot date
LCD TV Revised
Content LCD TV connection
ti didiagram (1) date A6
As the part connecting to the external input, check

the screen condition by signal
A6

Error Established
symptom A. Video error_Color error date
2013.01.31
LCD TV Revised
Content Ch k Li
Check Link
kCCable
bl (EPI) reconnection
ti condition
diti date A7
Check the contact condition of the Link Cable, especially dust or mis insertion.
A7

Error Established
symptom
A. Video error_Color error 2013.01.31
LCD TV date
Adjustment Test pattern - ADJ Key Revised
Content date A8
You can view 6 types of patterns using the ADJ Key
Checking item : 1. Defective pixel 2. Residual image 3. MODULE error (ADD-BAR,SCAN BAR..)
4.Video error (Classification of MODULE or Main-B/D!)
A8

Appendix : Exchange the Module (1)
수직 비내림 Brightness difference Line Dim
Crosstalk Press damage Crosstalk
Un-repairable Cases
In this case p
please exchange
g the module.
Burnt
A – 1/2

Appendix : Exchange the Module (2)
Angle view Color difference Brightness dot noise Half dead
Brightness difference
Green Noise on power on/off time Line Defect
Un-repairable Cases
In this case p
please exchange
g the module.
Mura
A – 2/2

Error Established
symptom B. Power error _No power date
2013.01.31
LCD TV Revised
Content Ch k ffrontt di
Check display
l Logo
L date A17
Front LED control :

ST-BY condition: On or Off
Menu Æ Option Æ
Power ON condition: Turn Off
Standby Light
Æ ON/ Off
A17

Error Established
symptom
B. Power error _No power 2013.01.31
LCD TV date
Revised
Content Check power input voltage and ST-BY
ST BY 3
3.5V
5V A18
date
Check the DC 24V

24V, 12V
12V, 3
3.5V.
5V
18 Pin (Power Board ↔ Main Board)
1 Power on 2 DRV ON
3 3.5V 4 20V
5 3 5V
3.5V 6 NC
N.C
7 GND 8 GND
9 24V 10 24V
11 GND 12 GND
13 12V 14 12V
15 12V 16 24V
17 GND 18 GND
A18

Error
symptom B. Power error _Off when on, off whiling viewing Established
date
2013.01.31
LCD TV Revised
Content POWER OFF MODE checking
h ki method
th d date A19
Entry method
1. Press the IN-START button of the remote

controller for adjustment
2. Check the entry into adjustment item 3
A19

Error Established
symptom
C. Audio error_No audio/Normal video 2013.01.31
LCD TV date
Revised
Content Ch ki method
Checking th d in
i menu when
h there
th is
i no audio
di date A20
Checking method
1. Press the Setting
g button on the remote controller
2. Select the Sound function of the Menu
3. Select the Sound Setting
p
4. Select TV Speaker
A20

Error Established
symptom C. Audio error_No audio/Normal video date
2013.01.31
LCD TV Revised
Content Voltage and speaker checking method A21
when there is no audio date
24 Pin (Power Board ↔ Main Board)

1 Power on 2 INV ON
3 3.5V 4 PDIM#1
5 3.5V 6 PDIM#2 ③
7 GND 8 GND
9 24V 10 24V
11 GND 12 GND
13 12V 14 12V
15 12V 16 24V
17 GND 18 GND
19 GND 20 GND
21 GND 22 L/DIM0_V8
23 L/DIM0_MOSI 24 L/DIM0_SCLK
Checking order when there is no audio
① Check the contact condition of or 24V connector of Main Board
② Measure the 24V input voltage supplied from Power Board

(If there is no input voltage, remove and check the connector)
③ Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the
GND and output terminal, the speaker is normal.
A21

Error Established
D. Function error 2013.01.31
symptom date
LCD TV Revised
Content Remote controller operation checking method date A22
P4002
③
1 KEY2
2 +3.5V_ST
3 GND
4 LOGO Light Wafer
5 IR
6 GND
7 EYE SCL
8 EYE SDA
① ②
Checking
g order
1, 2. Check Touch cable condition between Touch & Main board.
3. Check the st-by 3.5V on the terminal 4,7.
4. When checking the Pre-Amp when the power is in ON condition, it is normal when the
Analog Tester needle moves slowly
slowly, and defective when it does not move at all
all.
A22

Error Established
symptom date
LCD TV Revised
Content M ti
Motion R
Remote
t operation
ti checking
h ki method
th d date A23
P4003
③ 1 +3.5V_WOL
3 5V WOL
2 +3.3V
3 USB_DM
4 RTS
5 USB DP
USB_DP
6 RX
7 GND
8 TX
9 WOL
10 RESET
② 11 GND
12 CTS
13 NC
①
14 +3.5V_ST(OLED)
15 IR(OLED)
16 GND
17 EYE_SCL
18 EYE_SDA
Checking order
1, 2. Check Motion cable condition between Motion assy & Main board.
3. Check the 3.3V on the terminal 2.
A23

Error Established
symptom date
LCD TV Revised
Content Wifi operation checking method date A24
P4003
③ 1 +3.5V_WOL
3 5V WOL
2 +3.3V
3 USB_DM
4 RTS
5 USB DP
USB_DP
6 RX
7 GND
8 TX
9 WOL
10 RESET
② 11 GND
12 CTS
13 NC
① 14 +3.5V_ST(OLED)
15 IR(OLED)
16 GND
17 EYE_SCL
18 EYE_SDA
Checking order
1, 2. Check Wifi cable condition between Wifi assy & Main board.
A24

Error Established
symptom date
LCD TV Revised
Content Camera operation checking method date A25
P4200
1 CAM SLIDE DET
CAM_SLIDE_DET
① 2 +3.5V_CAM
3 AUD_LRCH
4 AUD_LRCK
5 AUD SCK
AUD_SCK
6 GND
7 CAM_PWR_ON_CMD
8 ST_BY_DET_CAM
9 GND
10 USB_CAMERA_DP
② 11 USB_CAMERA_DM
12 GND
Checking order
1, 2. Check Camera cable condition between Camera assy & Main board.
A25


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OLED TV

MODEL : 55EA9800 55EA9800-UA

P/NO : MFL67840104(1308-REV01) Printed in Korea

LCD/LED & 3D TV Plasma & 3D TV

Projection TV & Troubleshooting &

Plasma TV Repair Guide- LCD TV Repair

LCD Monitor Repair Guide Vol .1- 10 Trus Repair

SMPS-Switch Mode Testing Electronic

Please visit: http://lcd-television-repair.com/newsletter/Recommend.html

PRODUCT SAFETY ................................................................................. 3

EXPLODED VIEW .................................................................................. 23

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

Leakage Current Cold Check(Antenna Cold Check)

Fuse and Conventional Resistor

1) Temperature : 25 ºC ± 5 ºC(77 ± 9 ºF) , CST : 40 ºC±5 ºC

4) Specification and performance of each parts are followed

5.1.2. HDMI Input 1 (PC/DTV)

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

5.2.2. HDMI Input

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

5.2.2.2. HDMI 1.3 - DTV (3D supported mode manually)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

5.2.3. HDMI-PC Input (3D supported mode manually)

5.2.4. USB Input

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

5.2.4.2. USB Input (3D supported mode manually)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

5.2.5.2. DLNA Input (3D supported mode manually)

No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark

5.2.6. Component Input

● Remark: 3D Input mode

# HDMI 2(C/S : E8 26)

※ Caution) When EDID Download, must remove RGB/HDMI

EDID Block 1, Bytes 128-255 [80H-FFH]

5.1.5. Adjustment method

5.2. Tool Option setting & Inspection per

5.2.2. Country Group selection

5.2.3. Tool Option inspection

※ Tool option can be reconstructed by Software

5.5.2. Test method 5.6.2. Test method

(2) Check the sound from the TV Set

* Remark: Inspect in Power Only Mode and check SW version

6. AUDIO output check

(1) Tab Test : Touch SOFT TOUCH KEY OF SET quickly

(5) Updating Completed, The TV will restart automatically

* After downloading, TOOL OPTION setting is needed again.

- Low : Normal Operation

1 8 - High : Write Protection

"0 : EMMC SOC_RESET UART2_RX

"0 : normal "1 : TEST MODE AM6

TP103 TDO0 R174 33 R170 3.3K

TP104 TMS0 HPD0

MODEL_OPT_4 Module V13 V12 I2C_SCL2_SOC SCL2/GPIO78

MODEL_OPT_5 Reserved Default AP6

CP BOX Enable Disable SDA3

Only SMART CARD

I2C for tuner AC-coupling CAP

4) Specification and performance of each parts are followed

※ Caution) When EDID Download, must remove RGB/HDMI

5.2. Tool Option setting & Inspection per

* Remark: Inspect in Power Only Mode and check SW version