Waing, Alexander Kim R.

BS CpE 5

1. Difference between Computer Organization and Computer Architecture

Computer Organization Computer Architecture

Often called microarchitecture (low level) Computer architecture (a bit higher

level)

Transparent from programmer (ex. a programmer Programmer view (i.e. Programmer

does not worry much how addition is implemented has to be aware of which instruction
in hardware) set used)

Physical components (Circuit design, Adders, Signals, Logic (Instruction set, Addressing
Peripherals) modes, Data types, Cache
optimization)

How to do ? (implementation of the architecture) What to do ? (Instruction set)

Computer Architecture and Computer Organization Examples

Intel and AMD make X86 CPUs where X86 refers to the computer architecture used. X86 is an
example on a CISC architecture (CISC stands for Complex Instruction Set Computer). CISC
instructions are complex and may take multiple CPU cycles to execute. As you can see, one
architecture (X86) but two different computer organizations (Intel and AMD flavors).
nVidia and Qualcomm on the other hand make GPUs (graphics processing unit as opposed to a
CPU central processing unit). These GPUs are based on the ARM (Advanced RISC Machines)
architecture. ARM is an example on a RISC architecture (RISC stands for Reduced Instruction
Set Computer). Instructions in an ARM architecture are relatively simple and typically execute
in one clock cycle. Similarly, ARM here is the computer architecture while both nVidia and
Qualcomm develop their own flavor of computer organization (i.e architecture
implementation)

Computer architecture roughly refers to instruction set design while computer organization
refers to the corresponding circuit design.

Source: http://www.8bitavenue.com/2016/11/difference-between-computer-architecture-and-
computer-organization/
Waing, Alexander Kim R.
BS CpE 5

2. Instruction Set Architecture (ISA)

The instruction set, also called instruction set architecture (ISA), is part of a computer that
pertains to programming, which is basically machine language. The instruction set provides
commands to the processor, to tell it what it needs to do. The instruction set consists of
addressing modes, instructions, native data types, registers, memory architecture, interrupt, and
exception handling, and external I/O. An instruction set can be built into the hardware of the
processor, or it can be emulated in software, using an interpreter. The hardware design is more
efficient and faster for running programs than the emulated software version. [1]

ISA (instruction set architecture)

A well-define hardware/software interface

The contract between software and hardware
Functional definition of operations, modes, and storage locations supported by
hardware
Precise description of how to invoke, and access them
No guarantees regarding
How operations are implemented
Which operations are fast and which are slow and when
Which operations take more power and which take less

Sources:
1. https://www.computerhope.com/jargon/i/instset.htm
2. https://www.cis.upenn.edu/~milom/cis501-Fall05/lectures/02_isa.pdf

3. Differences between SSI, MSI, LSI and VSLI

SSI MSI LSI VLSI

Independent gates Has 10 to 200 It contains between Contains thousands
in single package gates in single 200 and few of gates in single
has less than 10 package. thousand gates in package.
gates and it is single package.
limited. Performs digital Include digital Include large
functions like systems such as memory arrays and
Input and output decoders, adders, processors, memory complex
gates are connected registers. chips and microcomputer
directly to the pins programmable chips.
in package. modules. Low cost and small
in size.

Source: https://www.slideshare.net/laksrags/integrated-circuits-and-digital-functions
Waing, Alexander Kim R.
BS CpE 5

4. Von Neumann Architecture VS Harvard Architecture

Von Neumann Architecture:

It is named after the mathematician and early computer scientist John Von Neumann.
The computer has single storage system (memory) for storing data as well as program to
be executed.
Processor needs two clock cycles to complete an instruction. Pipelining the instructions
is not possible with this architecture.
In the first clock cycle the processor gets the instruction from memory and decodes it. In
the next clock cycle the required data is taken from memory. For each instruction this
cycle repeats and hence needs two cycles to complete an instruction.
This is a relatively older architecture and was replaced by Harvard architecture.

Harvard Architecture:

The name is originated from "Harvard Mark I" a relay based old computer.
The computer has two separate memories for storing data and program.
Processor can complete an instruction in one cycle if appropriate pipelining strategies
are implemented.
In the first stage of pipeline the instruction to be executed can be taken from program
memory. In the second stage of pipeline data is taken from the data memory using the
decoded instruction or address.
Most of the modern computing architectures are based on Harvard architecture. But the
number of stages in the pipeline varies from system to system.

Harvard Architecture Von Neumann Architecture

Harvard architecture has physically separate Von Neumann architecture uses same physical
pathways for instructions and data. pathways for instructions and data.

It has one dedicated set of address and data bus

for reading data from and writing data to It has same set of data and address buses for
memory, and another set of address and data memory read/write and fetching instructions.
buses for fetching instructions.
Waing, Alexander Kim R.
BS CpE 5

Under pure von Neumann architecture the CPU

Under Harvard architecture the CPU can both can be either reading an instruction or
read an instruction and perform a data memory reading/writing data from/to the memory. Both
access at the same time. cannot occur at the same time since the
instructions and data use the same bus system.

Harvard architecture machine has distinct code

Von Neumann architecture has same data
and data address spaces: instruction address
address and instruction address.
zero is not the same as data address zero.

Sources:
1. http://v-codes.blogspot.com/2010/09/difference-between-harward-and-von.html
2. http://wikidifferences.com/Difference_Between_Harvard_Architecture_And_Von_Neum
ann_Architecture

5. Seven commonly accepted Computer Level Hierarchy

Level 6, the User Level, is composed of applications and is the level with which everyone is
most familiar. At this level, we run programs such as word processors, graphics packages, or
games.
Level 5, the High-Level Language Level, consists of languages such as C, C++, FORTRAN,
Lisp, Pascal, and Prolog. These languages must be translated (using either a compiler or an
interpreter) to a language the machine can under- stand. Compiled languages are translated
into assembly language and then assembled into machine code.
Level 4, the Assembly Language Level, encompasses some type of assembly language.
Level 3, the System Software Level, deals with operating system instructions. This level is
responsible for multiprogramming, protecting memory, synchronizing processes, and
various other important functions.
Level 2, the Instruction Set Architecture (ISA), or Machine Level, consists of the machine
language recognized by the particular architecture of the computer system.
Level 1, the Control Level, is where a control unit makes sure that instructions are decoded
and executed properly and that data is moved where and when it should be.
Level 0, the Digital Logic Level, is where we find the physical components of the computer
system: the gates and wires. These are the fundamental building blocks, the implementations
of the mathematical logic that are common to all computer systems.

Source: http://csg.uobabylon.edu.iq/lecture.aspx?fid=6&lcid=41888