Middle Technical University Digital Electronic Lab.

Electrical Engineering Technical College First Stage

Electrical Power Technical Engineering Dept. Mohammed D. Altamemi

Experiment-6
Design of Binary Adder Circuits
Half and Full Adder

6-1 Object:
The purpose of this experiment is to design and implement of some arithmetic
circuits such as half adder and full adder. The student should also be able to design an
n-bit adder circuit.

6-2 Theory:
One of the things that ied to the digital revolution was the ability to perform
complex mathematical operations using a computer. During this lab. we will see how
it is possible to design a circuit to perform one such operation(adding two numbers
together).

The basic arithmetic operations in binary are (adding, subtract, multiply, and
division). Each computer has a CPU (center process unit) to archive the above
arithmetic operation, and inside this CPU there is an arithmetic and logic unit. The
adding is the most important operation because we can do other arithmetic operations
by adding, so we can do the subtraction by 1'st and 2's complement, and multiply by
successive adding, and division by successive subtraction. So the adding is the basic
of all other arithmetic operations, because that there is an adder circuit inside each
arithmetic and logic unit.

We will using two types of adders for this lab. a half adder which add two bits
together, and full adder which adds a two bits and carry-in together see figure (6-1).

Figure (6-1) a- half adder b- full adder

6-2-1 Half Adder:

The half adder is a circuit can add two bits only in each time, so it has two
inputs (A+B).also half adder has two outputs, the result of sum and the carry out of
this operation. (S, and C) as in figure (6-1a). the truth table of half adder is as in table
(6-1).

MD
Middle Technical University Digital Electronic Lab.
Electrical Engineering Technical College First Stage
Electrical Power Technical Engineering Dept. Mohammed D. Altamemi

Table (6-1) truth table for half adder

no. A B S C
1. 0 0 0 0
2. 0 1 1 0
3. 1 0 1 0
4. 1 1 0 1

To find the logic expression of half adder outputs S and C as follow:

From the equations (6.1) and (6.2) we can design a half adder circuit, and we
can see it is consist of two logic gates EX-OR, and AND gates as in figure (6-2).

Figure (6-2) design of half adder circuit

4-2-2 Full Adder:

If we want to add binary numbers with more than 1-bit the adding operation
may results an carry out, so this carry must be added with the next two bits. Now we
need to circuit with three inputs (A +B +Ci), and two outputs the sum result, and carry
out (S, and Co). see figure (6-1b). The truth table of full adder circuit is as follow:

Table (6-2) truth table for full adder circuit

no. A B Ci S Co
1. 0 0 0 0 0
2. 0 0 1 1 0
3. 0 1 0 1 0
4. 0 1 1 0 1
5. 1 0 0 1 0
6. 1 0 1 0 1
7. 1 1 0 0 1
8. 1 1 1 1 1
From truth table we can find the logic expression of the two outputs of full
adder circuit.

MD
Middle Technical University Digital Electronic Lab.
Electrical Engineering Technical College First Stage
Electrical Power Technical Engineering Dept. Mohammed D. Altamemi

From equations (6.3) and (6.4) we can design a full adder circuit by using the
following logic gates (EX-OR with three inputs, OR, and three AND) as its shown in
figure (6-3).

Figure (6-3) design of full adder circuit

To create an adder circuit to add binary numbers with n-bits, we should connect
n full adder together in the fashion as in figure (6-4). The carry out from a full adder
becomes the carry in for next significant bit in the next full adder. Note that we can
use a half adder for the first block of this circuit or full adder with connecting one of
its inputs to ground, because at the binging io each adding operation there is only two
bits to be added.

Figure (6-4) design an adder circuit to add binary numbers with n-bits

MD
Middle Technical University Digital Electronic Lab.
Electrical Engineering Technical College First Stage
Electrical Power Technical Engineering Dept. Mohammed D. Altamemi

6-3 Procedures:
Using TTL logic gates to design and implement the adder circuits

1. Connect the circuit shown in figure (6-5) below, use EX-OR 7486, and AND
7408 gates.

Table (6-3)
no. A B S C
1. 0 0
2. 0 1
3. 1 0
4. 1 1

Figure (6-5) binary logic half adder

2. Use the logic sources from sources part. And then Fill in table (6-3).
3. Connect two half adder circuits to design full adder circuit as shown in figure
(6-5), and then fill in table (6-4).

Figure (6-5) design a full adder by two half adder

Table (6-4)
no. A B Ci S Co
1. 0 0 0
2. 0 0 1
3. 0 1 0
4. 0 1 1
5. 1 0 0
6. 1 0 1
7. 1 1 0
8. 1 1 1

4. Connect the circuit of parallel digital adder shown in figure (6-6) using TTL
series No. 74LS183D full adder.

MD
Middle Technical University Digital Electronic Lab.
Electrical Engineering Technical College First Stage
Electrical Power Technical Engineering Dept. Mohammed D. Altamemi

5. Note that you should connect one of the input of first stage of parallel adder to
ground to convert it into half adder.

Figure (6-6) 4-bit parallel logic adder

6. Add the following number and fill in table (6-5).

Table (6-5)
X4 X3 X2 X1 Y4 Y3 Y2 Y1 Co4 S4 S3 S2 S1
0 1 1 1 1 0 0 0
1 1 0 0 0 1 1 1
1 0 1 1 1 0 0 1
1 1 1 0 1 0 1 0
1 0 0 0 1 1 1 1
1 1 0 1 0 1 0 1
0 1 0 0 0 1 0 0
0 1 0 1 1 1 1 1

6-4 Discussion:
1. Design a parallel adder circuit to add two numbers (A2A1A0)2 and (B2B1B0)2
by using full adder only.
2. Determine the sum generated by the 8-bit parallel adder and show the
intermediate carriers when the binary numbers are (11001101)2 and
(01010111)2.
3. Design a circuit that use to subtract two 2-bit number. Draw the logic diagram
using the truth table and K-map.
4. Design a full subtractor by using two half subtractors.

MD