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ECE419:DIGITAL VLSI DESIGN

L:3 T:1 P:0 Credits:4

Course Outcomes: Through this course students should be able to

• Design simple digital systems based on digital logics.

• Interpret the register transfer level (RTL) models of digital circuits.

• Design to write test-benches and perform verification of the digital system.

• Utilize the VLSI design methodologies to understand and design complex digital systems.

• Design circuits that realize specified digital functions.

• Design, simulate and synthesize the digital circuits with Verilog.

Unit I
Review of digital design : MUX based digital design, Sequential circuit design -
design of Moore and Mealy circuits, Sequential circuit design (Moore and Mealy
circuits), Logic Gates, Circuit Design using Multiplexer and Decoder, Flip Flops,
Counter, combitational and sequential circuit, Decoder based digital design, LFSR,
counter and register, fast and advanced adders, Multiplier
Unit II
Introduction to Hardware Description Languages : Importance of HDLs,
Popularity of verilog HDL, Comparison between VHDL and Verilog, Typical Design
flow, RTL coding guidelines, Lexical conventions, Levels of abstraction, Hierarchical
modelling concepts, Coding organization and testbench building, syntax and
semantics of verilog, variable types, arrays and tables, operators, expressions and
signal, assignments, modules nets and registers
Unit III
Programming techniques in Verilog I : Dataflow Modelling, Gate Level Modelling,
Delay modelling concepts, instantiation
Unit IV
Programming techniques in Verilog II : Behavioral modelling Branching
statement, Loops, Block Statement, Conditional Structured and Procedure
Assignment, Timing Control, Multiway Branching, Sequential and parallel block,
examples of design using verilog
Unit V
Advanced verilog topics : Switch level modelling, User defined primitives, Timing
and delay, Logic synthesis, static timing analysis, task and function
Unit VI
Digital Design with programmable devices : Configurable logic block (CLB),
Introduction to Xilinx series, introduction FPGA, FPGA based design using Verilog,
logic synthesis, look up table, Implementation of shanon's algorithm, introduction to
ASIC and its industrial applications

Text Books:

1. VERILOG HDL by SAMIR PALNITKAR, PEARSON

References:

1. DIGITAL DESIGN by MORRIS MANO, PRENTICE HALL

Page:1/1 Print Date : 10/5/2017 12:58:16 PM

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