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3/4, 2013
Reference to this paper should be made as follows: Verma, A.K., Singh, B. and
Shahani, D.T. (2013) ‘New topology for management of bi-directional power
flow between vehicle and grid with reduced ripple current at unity power
factor’, Int. J. Power Electronics, Vol. 5, Nos. 3/4, pp.216–235.
1 Introduction
Electric vehicles (EVs) and plug-in hybrid electric vehicles (PHEVs) rely on AC power
grid as they have to plug-in to the grid in order to charge their batteries. With energy
crises and increased demand for energy in whole world, the energy requirements of
grid-connected EVs may make the energy crisis worst (Brooks and Gage, 2001).
However, with a bi-directional grid power interface, these EVs or PHEVs, can plug into
the grid and they can potentially feedback energy to the grid. EVs can support the grid
exceptionally well in terms of peak demand and off peak power demand. These demand
managements are vital to the smooth and efficient operation of the power grid. Sharing
power assets between transportation and power generation can create a compelling new
economics for electrically-propelled vehicles. A statewide fleet of order of 100,000 EVs
connected to grid can provide 1,000 MW of geographically-dispersed power with each
EV having an average capacity of 10 kW, with the potential for synchronised fast
response. This vehicle-based capability would represent a massive new force to deal with
grid instability (Saber and Venayagamoorthy, 2009; Chan and Chau, 1997; Kempton and
Tomic, 2005). Various configurations of voltage source converters (VSCs) and DC-DC
converters are available in the literature for bi-directional power flow (Singh et al., 2003;
Bai and Mi, 2012). The technical challenges are to develop suitable control algorithms,
and to communicate the power of all such vehicles.
In earlier single phase bi directional power flow converters, a bulky DC link capacitor
is used to compensate second order harmonic ripple current, which results in low power
density and requires large space (Verma et al., 2011). The other approach is to add an
active energy storage (a passive L-C resonant) circuit in parallel with the DC-bus
capacitor to bypass the ripple energy that flows into the DC-bus capacitor (Verma et al.,
2012a, 2012b). In this proposed configuration, the converter requires neither a large
bulky DC capacitor nor a passive L-C resonant circuit.
218 A.K. Verma et al.
In this research work, a new configuration of a single phase full bridge bidirectional
power flow VSC with a ripple reduction circuit is used which consists of an additional
switching leg and an inductor. This inductor is connected between the midpoints of the
second and third legs of VSC thus enabling the AC mode, with a bidirectional DC-DC
converter for the bidirectional power transfer of a PHEV or EV battery (Shimizu et al.,
2000, 1997a, 1997b). EVs need a high voltage DC bus to supply power to charge a
battery in charging mode and to feedback energy to a 230 V; 50 Hz AC mains in
discharging mode. The bidirectional power flow between EVs and grid usually includes a
DC-DC bi-directional converter between DC voltage bus and the storage battery.
Bi-directional DC-DC converters are widely used in charging/discharging topologies in
the EVs (Zhou et al., 2009; Shi et al., 2008; Erb et al., 2010; Lee et al., 2009; Zhang,
2008; Waffler and Kolar, 2009).
The proposed converter configuration is designed to charge a vehicle storage battery
up to 15 A current at 120 V. It is also capable to transfer energy back to a 230 V, 50 Hz
single-phase power at 15 A rate. The proposed single-phase bidirectional full bridge
boost AC-DC converter is used with a third leg and an inductor connected between
second and third legs to convert AC to DC voltage with power factor correction (PFC)
(Aguilar et al., 1997). Proposed converter reduces the ripple voltage at the DC bus.
Furthermore, this novel control method eliminates the ripple current. The bi-directional
power flow buck-boost DC-DC converter is used in buck mode for charging storage
battery and a boost mode when discharging the storage battery (Zhang and Jiang, 2012;
Onori et al., 2012; Ceraola, 2000). The charging and discharging from/to grid, of the
storage battery demonstrate the capability of the system. Further with slight modification
in control algorithm, the proposed converter is used to regulate the point of common
coupling (PCC) voltage or PFC with reactive power compensation and harmonics
elimination for other connected linear/non-linear loads at PCC, thus improving the power
quality of the grid system.
PCC and the control algorithm is modified to achieve zero voltage regulation (ZVR) or
PFC with reactive power compensation and harmonics elimination as shown in
Figure 4(a).
ib
S7 Lo
buck
ib
S8 Vb
boost
buck boost
ib
PWM
Control i* b
220 A.K. Verma et al.
Rb Cbb
Vb
Rs
Voc
The analysis and design of different components of the proposed converter configuration
are given in this section.
where θ is the phase angle (wt), and φ is the input power factor angle of the supply.
Let the duty ratio of S1 and S3 are DA and DB respectively. The sum of DA + DB = 1.
The actual AC PWM voltage (VAB) over one switching cycle is given as,
VAB = ( DA − DB ) Vdc = mVdc (3)
Figure 4 (a) Proposed modified controller configuration to demonstrate the effect of bidirectional
power flow on grid and distribution system (b) Switching stages in the ripple
compensation circuit (Iw > 0) charging mode (c) Switching stages in the ripple
compensation circuit (Iw > 0) discharging mode
(a)
(b) (c)
The average DC output current iD over one switching cycle is given as,
iD = ( DA − DB ) I sm (7)
By substituting the value from equations (4), (5), (6) and (2) in to equation (7), the
average DC current is given as (Verma et al., 2012b),
222 A.K. Verma et al.
This DC current (iD) is a combination of pure DC current (idc) as well as ripple current,
the ripple current (irip) these are given as,
where iC is the current flow from the DC output to Lw as shown in Figure 4(b) and
Figure 4(c).
Total output current on PWM VSC is expressed as,
iTotal = iD + iw = idc + irip + iw (12)
where iw after passing through LPF is pure DC current component (Iwa) and irip is AC
current component that has twice the frequency of the input AC current. By controlling
the amplitude of iw to cancel the ripple current (irip), the DC ripple current reduction is
achieved.
VA P0
I rms = = (13)
Vrms ( p.f .)Vrms
where
The rms value of load current from equation (13) is estimated as 21.70 A for a 5 kW
power flow. Since the crest factor (CF) of the current of the parallel connected non-linear
load to be compensated by this VSC is the order of 2, therefore the peak load current (Ip)
is expressed as,
I P = (CF ) I rms (15)
So the value of peak current from equation (15) is estimated as 43.4 A. By considering a
safety factor of 1.5, the standard rating of the device is selected 75 A.
For the load voltage of 230 V rms, peak voltage of this single phase VSC is expressed
as,
The value of peak voltage from equation (16) is estimated as 325.22 V. By considering a
safety factor of 1.5, the device rating is estimated 487.83 V. So the IGBTs of 600 V and
75 A are selected to form the VSC.
Design of the interfacing inductor Lw is carried out as per Shimizu et al. (2000) and its
estimated value of Lw is 3.86 mH and it is selected as 4 mH for this configuration.
Detailed design parameters are given in Appendix A.
With the inclusion of ripple compensation circuit in the proposed system, the ripple
current flowing through DC link is sinusoidal of twice of supply frequency and its replica
is shown in Figure 5. The calculation of the DC link capacitor is based on the ripple
current flowing through it during charging and discharging. The current Iw is controlled in
224 A.K. Verma et al.
such a manner so that irip can be nullified, thus a capacitor is used only to filter the high
frequency switching ripples. Thus, the design of the DC link capacitor is based on the
charging and discharging of the DC link capacitor. At a particular instant the relation
between charge on DC link capacitor is given as,
ΔQ = Cdc *ΔV (18)
where ΔQ is charge on capacitor Cdc is the DC link capacitor and ΔV is the ripple voltage
and it is considered as 1% of Vdc.
As Vdc is 400 V, so the estimated value of ΔV is 4 V, as the ripple current flowing
through the DC link is sinusoidal the ΔQ can be given as,
t/2
⎛ 2imrip ⎞ ⎛ t ⎞ ⎛ 2imrip ⎞ ⎛ 1 ⎞
ΔQ = ∫ i(t )dt = ⎜⎝
0
⎟ * ⎜ ⎟ or ⎜ ⎟*
π ⎠ ⎝ 2 ⎠ ⎝ π ⎠ ⎜⎝ 2* f s ⎟⎠
(19)
where imrip = (√2 * irip) is the maximum value of the ripple current (irip).
From simulation results the value of irip is 0.8 A thus imrip is estimated as 1.131 A, fs is
the switching frequency for VSC and is considered as 10 kHz, the estimated value of the
ΔQ from equation (19) is 360.1 µC. From equation (18), the calculated value of Cdc is
90 µF and it is selected as 100 µF here.
where P, Vi = Vdc, V0 and fsb are conversion power, input voltage, output voltage and
switching frequency respectively, and their values are 5 kW, 400 V, 120 V and 50 kHz
respectively. From equation (20), the value of Lo is estimated as 2.09 mH. These design
parameters are given in Appendix B.
Cbb = ⎡⎣ kWh *3, 600 *1, 000 {0.5 (Voc2 max − Voc2 min )}⎤⎦ (21)
where Vocmax and Vocmin are the terminal voltage of the storage battery when it is fully
charged and discharge respectively (Zhang and Jiang, 2012; Onori et al., 2012; Ceraola,
2000).
New topology for management of bi-directional power flow 225
4 Control algorithm
where Kpv and Kiv are the proportional and integral gains of the voltage controller.
The reference grid current is* (k ) is calculated as,
*
isp (k ) = I sm
*
(k ) * u p (24)
where up = (vs / Vsm) and vs is instantaneous PCC voltage and Vsm is its amplitude.
The current error Ie(k) is calculated from this reference grid current is* (k ) and sensed
grid current is(k) as,
I e (k ) = is* (k ) − is (k ) (25)
This current error is amplified using the PI current controller which is given as,
Vc (k ) = Vc (k − 1) + K p1 { I e (k ) – I e (k − 1)} + K i1 I e (k ) (26)
226 A.K. Verma et al.
I e1 (k ) = irip
*
(k ) − irip (k ) (27)
This current error is amplified using the PI current controller which output is given as,
Vc1 (k ) = Vc1 (k − 1) + K p 2 { I e1 (k ) – I e1 (k − 1)} + K i 2 I e1 (k ) (28)
Interleaved inductor current (iw) is sensed and pass through LPF so that the current flow
trough it is mainly DC component (Iwa). The reference value of interleaved inductor
current (iw* ) is kept zero. The current error Ie2(k) is calculated from reference inductor
current iw* (k ) and DC link current iw(k) as,
ie 2 (k ) = iw* (k ) − iw (k ) (29)
This current error is amplified using another PI current controller which output is given
as,
Vc 2 (k ) = Vc 2 (k − 1) + K p 3 { I e 2 (k ) – I e 2 (k − 1)} + K i 3 I e 2 (k ) (30)
Thus, these obtained signals Vc, Vc1, Vc2 are added to get a control signal as,
This signal Vp is compared with the triangular waveform of 10 kHz and thus generated
signal is inverted and these two signals are used to control the third leg solid state
switches S5 and S6.
I es (k ) = ib* (k ) − ib (k ) (32)
The output of the PI current controller with this error Ies(k) is Vcb(k) at ksh instant it is
generated as,
Vcb (k ) = Vcb (k − 1) + K p 4 { I es (k ) – I es (k − 1)} + K i 4 I es (k ) (33)
where Kp4 and Ki4 are the proportional and integral gains of the voltage controller.
New topology for management of bi-directional power flow 227
The output of the controller Vcb(k) at ksh instant is compared with fixed frequency (fsb)
saw-tooth carrier waveform and inverted saw-tooth carrier wave to get the control signals
for S7 and S8 switches. When reference battery current ib* is more than zero then gating
signal is given to switch S7 and if ib* is less than zero then gating signal is given to S8.
5 MATLAB-based modelling
The proposed system is modified to demonstrate control of PCC voltage or PFC and load
compensation by the VSC as shown in Figure 4(a). The linear and non-linear loads are
considered at the PCC. As there are several linear/non-linear loads which are connected
in the distribution system such as computers, modern electrical products, small rating
variable speed drives and fluorescent lamps. These result in poor power quality
228 A.K. Verma et al.
Figure 7 Control algorithm for ZVR or PFC using reactive power compensation
Vsamp = ( v 2p + vq2 )
12
(35)
The PCC voltage is regulated by using a PI voltage controller and the quadrature axis
reactive current component current is expressed as,
I qr (k ) = I qr (k − 1) + K pq {vte( k ) − vte( k −1) } + K iq ( vte( k ) ) (36)
The current error Ie(k) is calculated from this reference grid current is*1 (k ) and sensed
grid current is(k) as,
I e (k ) = is*1 (k ) − is (k ) (39)
By using equation (26), a control signal Vc(k) is estimated and is inverted by 1,800 which
gives {–Vc(k)}. By comparing both these signals with triangular carrier wave, four PWM
gating signals are generated for VSC using unipolar switching of VSC (Mohan et al.,
2009). These four signals are used to control four solid state switches, S1 – S4.
configuration is operating in boost mode thus discharging of the battery takes place and
the grid current is 180° out of phase with PCC voltage, which indicates that the power is
flowing back to the grid. irip is the ripple current in DC link and the value of this ripple
current is very less.
Figure 8 Charging and discharging of the proposed configuration (see online version for colours)
Figure 9 PFC using load reactive power compensation (see online version for colours)
observed less then 5% which are well within the limit of IEEE-519 standard (Moses
et al., 2010; IEEE Std. 519).
Figure 10 Control of PCC voltage using reactive power compensation (see online version
for colours)
Figure 11 (a) Waveform and harmonic spectrum of grid current during discharging of the
proposed configuration (b) Waveform and harmonic spectrum of grid current during
charging of the proposed configuration (c) Waveform and harmonic spectrum of load
current (see online version for colours)
(a)
New topology for management of bi-directional power flow 233
Figure 11 (a) Waveform and harmonic spectrum of grid current during discharging of the
proposed configuration (b) Waveform and harmonic spectrum of grid current during
charging of the proposed configuration (c) Waveform and harmonic spectrum of load
current (continued) (see online version for colours)
(b)
(c)
8 Conclusions
The proposed converter configuration has delivered the grid current to and from the
grid at unity power factor and at very low current harmonics. By using the ripple
compensation circuit in the single phase VSC, the size of the DC link capacitor has been
reduced to one tenth (1 mF to 100 µF). The proposed configuration with modified control
has improved power quality of the system and it has demonstrated load compensation and
control PCC voltage. It has further compensated the load and maintained unity power
factor at grid, thus improving the power quality of the system. The THD of grid current in
the charging and discharging modes are well within the limit of an IEEE-519 standard.
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Appendix