UNIVERSITI MALAYSIA PERLIS

FACULTY OF ENGINEERING TECHNOLOGY

ELECTRONICS (RY 44)

COURSE CODE: INTEGRATED ELECTRONICS (RY44)

GROUP NO: GROUP 1
SUBJECT: PGT 420: INSTRUMENTATION
LAB REPORT: DATA CONVERSION
SUBMISSION DATE: 17TH NOVEMBER 2017
LECTURER NAME: SIR HAFIZI BIN OMAR

STUDENT NAME MATRIC NO.

NUR RAZANAH BINTI MOHAMED YASIN 141383563

COMMENTS MARKS

DECLARATION

I, the undersigned, declare that this submission is my own work entirely, except where assistance and
sources of information have been suitably acknowledged. I also declare that none of the work in this laboratory
report has been previously or concurrently submitted for any other laboratory report at UniMAP or any other
institutions.

(NUR RAZANAH)
OBJECTIVES

a) To familiarize with data conversions, i.e., from digital to analogue and analogue to
digital.

b) To design and simulate 4-bit binary weighted ladder network circuit using Multisim.

c) To design and simulate simple 4-bit analogue to digital converter using Multisim.

d) To design and simulate 4-bit binary weighted ladder network using LabView.

e) To design and simulate simple 4-bit analogue to digital converter using LabView.

INTRODUCTION

In electronic, an analog-to-digital converter is a system that converts an analog signal,

such as sound picked up by a microphone or light entering a digital camera, into a digital
signal. Analogue to digital conversion (AD/C) is important. It allows real world data such as
temperature, pressure, humidity, etc., to be converted, acquired and further processed. A block
diagram of a data converter is shown below. It consists of a resistor ladder network, a current to
voltage converter, an inverter and a comparator. The resistor ladder network forms the basis for
performing digital to analog conversion (DAC). The most popular are the binary weighted
ladder and the R/2R ladder. Even though, the R/2R ladder has become the most popular for
many reasons, the binary weighted ladder is simpler and easier to understand.

In theory, the binary weighted ladder shown in Figure 1 requires double multiples of R
as the number of bits increases. However, in practice, the required resistor values are hard to
find. Using non-ideal resistor values create inaccuracies.
RESULT AND DISCUSSIONS

A circuit diagram as shown below is designed using NI MultiSim software.

Figure 1: Circuit diagram of a 4-bit ADC circuit

Based on the diagram above, the D0-D3 are the 4-bit binary weighted ladder network. It
relates to four series of resistor with the amount of 25k Ohm, 50k Ohm, 100k Ohm, and 200k
Ohm.
Using Kirchhoff’s Current Law and assuming the input impedance of the OPAMP is
infinite, current at the inverting input which is the sum of currents through the binary weighted
resistors flows through the feedback resistor (Rf).

Equation 1: Derivation of mathematical equation of Vo

 Equation 2: Final equation to get Vo

To find the theoretical value of each bit probability, we must divide the maximum
output value with the number of probability, 2ⁿ (where n= number of bits).

For example, in this experiment, the maximum value is 5V and there are 4 bits (D0, D1,
D2, D3). Since, 2⁴ = 16; 5V/16 = 0.3125. This means, each and every stage of the digital
probability representation difference is 0.3125. Basically, it means the step size is 0.3125

Table 1: Theoretical value

D3 D2 D1 D0 THEORETICAL VALUE (V)

0 0 0 0 0

0 0 0 1 0.3125

0 0 1 0 0.625

0 0 1 1 0.9375

0 1 0 0 1.25

0 1 0 1 1.5625

0 1 1 0 1.875

0 1 1 1 2.1875

1 0 0 0 2.5

1 0 0 1 2.8125

1 0 1 0 3.125

1 0 1 1 3.4375

1 1 0 0 3.75

1 1 0 1 4.0625

1 1 1 0 4.375

1 1 1 1 4.6875

Next, the voltage simulation at point A and B are observed through the NI MultiSim. Below is
the result:
 Table 2: V simulation at Point A and B

D3 D2 D1 D0 V SIMULATION VSIMULATION
(PT A) [V] (PT B) [V]

0 0 0 0 0.106 -0.214

0 0 0 1 -0.332 0.332

0 0 1 0 -0.665 0.665

0 0 1 1 -0.997 0.997

0 1 0 0 -1.33 1.33

0 1 0 1 -1.66 1.66

0 1 1 0 -1.99 1.99

0 1 1 1 -2.33 2.33

1 0 0 0 -2.66 2.66

1 0 0 1 -2.99 2.99

1 0 1 0 -3.32 3.32

1 0 1 1 -3.66 3.36

1 1 0 0 -3.99 3.99

1 1 0 1 -4.32 4.32

1 1 1 0 -4.65 4.65

1 1 1 1 -4.99 4.99

From the table above, it can clearly be seen that the function of the second OP-AMP in
the circuit is to invert the negative values to a positive value.

Next, the laboratory session is continued with LabVIEW simulation for the above data
conversion. Figure shown below is the front panel and the block diagram. The LabVIEW has
been developed based on the equation above. Mathematical operations (division, multiplication
and addition) is used in the block diagram. In the front panel, the high bit value is inserted with
5 indicating 5V for high bit 1, whereas 0 for 0V (low bit). The Vo value in front panel is
observed and tabulated in Table 3.

Figure 2: Front panel view of LabVIEW

Figure 3: Block diagram view of LabVIEW

The calculated value from the collaboration of NI MyRIO and LabVIEW is shown below.

Table 3: Measured value on LabVIEW

D3 D2 D1 D0 LABVIEW VALUE (V)

 0 0 0 0 0

0 0 0 1 0.3325

0 0 1 0 0.665

0 0 1 1 0.997

0 1 0 0 1.33

0 1 0 1 1.66

0 1 1 0 1.99

0 1 1 1 2.33

1 0 0 0 2.66

1 0 0 1 2.99

1 0 1 0 3.32

1 0 1 1 3.66

1 1 0 0 3.99

1 1 0 1 4.32

1 1 1 0 4.65

1 1 1 1 4.99

Hence, at the end of the session, all the values are tabulated in a table and observed.

Table 4: Tabulated data of measured and calculated Vo value

D3 D2 D1 D0 THEORITICAL V AT V AT V FROM
VALUE POINT A POINT B LABVIEW
 0 0 0 0 0 0.106 -0.214 0

0 0 0 1 0.3125 -0.332 0.332 0.3325

0 0 1 0 0.625 -0.665 0.665 0.665

0 0 1 1 0.9375 -0.997 0.997 0.997

0 1 0 0 1.25 -1.33 1.33 1.33

0 1 0 1 1.5625 -1.66 1.66 1.66

0 1 1 0 1.875 -1.99 1.99 1.99

0 1 1 1 2.1875 -2.33 2.33 2.33

1 0 0 0 2.5 -2.66 2.66 2.66

1 0 0 1 2.8125 -2.99 2.99 2.99

1 0 1 0 3.125 -3.32 3.32 3.32

1 0 1 1 3.4375 -3.66 3.36 3.66

1 1 0 0 3.75 -3.99 3.99 3.99

1 1 0 1 4.0625 -4.32 4.32 4.32

1 1 1 0 4.375 -4.65 4.65 4.65

1 1 1 1 4.6875 -4.99 4.99 4.99

Based on the above data conversion table, it can be clearly seen that the calculated
value and the measured value is similarly the same.

CONCLUSION

In conclusion, we can familiarize with data conversions, i.e., from digital to analogue
and vice versa. Besides, we are also able to design and simulate 4-bit binary weighted ladder
network circuit and analogue to digital converter using Multisim. Furthermore, we are also able
to design and simulate 4-bit binary weighted ladder network and analogue to digital converter
using LabView.
 Based on the calculation method learnt, we could also apply this reverse engineering
technique to find the corresponding digital representation.