Professional Documents
Culture Documents
Generator Relay
Instruction Manual
Preface
Introduction
This guide and the relevant operating or service manual documentation for the equipment provide
full information on safe handling, commissioning and testing of this equipment.
Documentation for equipment ordered from NR is dispatched separately from manufactured goods
and may not be received at the same time. Therefore, this guide is provided to ensure that printed
information normally present on equipment is fully understood by the recipient.
Before carrying out any work on the equipment, the user should be familiar with the contents of
this manual, and read relevant chapter carefully.
This chapter describes the safety precautions recommended when using the equipment. Before
installing and using the equipment, this chapter must be thoroughly read and understood.
When electrical equipment is in operation, dangerous voltages will be present in certain parts of
the equipment. Failure to observe warning notices, incorrect use, or improper use may endanger
personnel and equipment and cause personal injury or physical damage.
Before working in the terminal strip area, the equipment must be isolated.
Proper and safe operation of the equipment depends on appropriate shipping and handling,
proper storage, installation and commissioning, and on careful operation, maintenance and
servicing. For this reason, only qualified personnel may work on or operate the equipment.
Are familiar with the installation, commissioning, and operation of the equipment and of the
system to which it is being connected;
Are able to safely perform switching operations in accordance with accepted safety
engineering practices and are authorized to energize and de-energize equipment and to
isolate, ground, and label it;
Are trained in the care and use of safety apparatus in accordance with safety engineering
practices;
DANGER!
It means that death, severe personal injury, or considerable equipment damage will occur if safety
precautions are disregarded.
WARNING!
It means that death, severe personal, or considerable equipment damage could occur if safety
precautions are disregarded.
CAUTION!
It means that light personal injury or equipment damage may occur if safety precautions are
disregarded. This particularly applies to damage to the device and to resulting damage of the
protected equipment.
WARNING!
The firmware may be upgraded to add new features or enhance/modify existing features, please
make sure that the version of this manual is compatible with the product in your hand.
WARNING!
During operation of electrical equipment, certain parts of these devices are under high voltage.
Severe personal injury or significant equipment damage could result from improper behavior.
Only qualified personnel should work on this equipment or in the vicinity of this equipment. These
personnel must be familiar with all warnings and service procedures described in this manual, as
well as safety regulations.
In particular, the general facility and safety regulations for work with high-voltage equipment must
be observed. Noncompliance may result in death, injury, or significant equipment damage.
DANGER!
Never allow the current transformer (CT) secondary circuit connected to this equipment to be
opened while the primary system is live. Opening the CT circuit will produce a dangerously high
voltage.
WARNING!
Exposed terminals
Do not touch the exposed terminals of this equipment while the power is on, as the high voltage
generated is dangerous
Residual voltage
Hazardous voltage can be present in the DC circuit just after switching off the DC power supply. It
takes a few seconds for the voltage to discharge.
CAUTION!
Earth
Operating environment
The equipment must only be used within the range of ambient environment detailed in the
specification and in an environment free of abnormal vibration.
Ratings
Before applying AC voltage and current or the DC power supply to the equipment, check that they
conform to the equipment ratings.
Do not attach and remove printed circuit boards when DC power to the equipment is on, as this
may cause the equipment to malfunction.
External circuit
When connecting the output contacts of the equipment to an external circuit, carefully check the
supply voltage used in order to prevent the connected circuit from overheating.
Connection cable
Copyright
We reserve all rights to this document and to the information contained herein. Improper use in particular reproduction and dissemination
to third parties is strictly forbidden except where expressly authorized.
The information in this manual is carefully checked periodically, and necessary corrections will be included in future editions. If
nevertheless any errors are detected, suggestions for correction or improvement are greatly appreciated.
Table of Contents
Preface ..................................................................................................... i
Introduction ................................................................................................................i
Health and Safety .......................................................................................................i
Instructions and Warnings ........................................................................................i
3.3.6 Differential Current Abnormality Alarm and CT Circuit Failure Blocking .............................. 37
3.4.5 Differential Current Abnormality Alarm and CT Circuit Failure Blocking .............................. 41
3.5.2 Differential Current Abnormality Alarm and CT Circuit Failure Blocking .............................. 44
7.6.30 Settings of Pole Disagreement Protection of HVS of Main Transformer ......................... 259
9.4.2 Fetch Real-time Binary Status (Function Code: 02H) ....................................................... 309
9.4.3 Fetch Settings Value of Device (Function Code: 03H) ...................................................... 311
9.4.4 Fetch Relay Measurement Values of Device (Function Code: 04H) ................................. 311
1 Introduction
1.1 Application
RCS-985 series generator-transformer unit protection have accumulated large field operation
experience, on this basis, combined with the latest computer technology and users′ requirement
and complex applications, and NR developed a new generation of PCS-985 series
generator-transformer unit protection. PCS-985 series inherits the benefits of RCS-985 series,
improves protection criterion, and provides more friendly human-machine interfaces.
PCS-985 supports conventional CT/VT and ECT/EVT. PCS-985 can be applied for large-scale
turbo-dynamo, gas-turbine generator and nuclear power generator with different connection
modes. It meets the requirements of power plant automation.
For a large-scale generator-transformer unit, two sets of PCS-985B can be used and then main
protection, abnormal operation condition protection and backup protection can be duplicated.
Control circuit and mechanical protection are installed on a separate panel. Two PCS-985B use
different CT groups and main and backup protection in one PCS-985B share one CT group. The
outputs correspond to various trip coils.
1.2 Function
Taking fully into account maximum configuration of large-scale generator-transformer unit,
PCS-985B suits the connection mode of two-windings main transformer (220kV, 500kV or above),
generator with capacity of 100MW or above, one or two step-down transformers (three windings or
split winding),excitation transformer or exciter.
Note!
Roter earth-fault protection can select voltage switchover pricinple or external voltage
injection principle.
Note!
500kV
Mechanical
PCS-985B PCS-985B
Protection
Main Transformer
Generator Step-down
Transformer
Excitor
220kV
Busbar VT
Generator Step-down
Transformer
Excitation
Transformer
500kV
Mechanical
PCS-985B PCS-985B
Protection
Main Transformer
Generator
Excitation Step-down
Transformer Transformer B
Step-down
Transformer A
220kV
Busbar VT
Generator
Step-down Step-down
Transformer A Transformer B
Excitor
1. For generator-transformer unit with the capacity of 300MW or above, panel A and B are both
equipped with generator-transformer unit differential protection, main transformer differential
protection, generator differential protection and step-down transformer differential protection.
2. The scope of generator-transformer unit differential protection may cover generally LV side of
step-down transformer or its HV side if necessary.
3. For generator-transformer unit with capacity of 100MW~300MW, panel A and B are equipped
with main transformer differential protection, generator differential protection and step-down
transformer differential protection.
5. For generator differential protection and main transformer differential protection, there are
also two kinds of percentage differential protection: variable Slope percentage differential
protection and DPFC percentage differential protection.
1. Panel A and B are equipped with complete set of backup protection of generator-transformer
unit. Different CTs are used for them.
2. As to rotor earth-fault protection, two sets of such protection cannot work simultaneously
otherwise influence between them will appear. Only one set of rotor earth-fault protection can
be enabled during operation. If other set will be put into operation sometimes, this set shall be
quitted firstly.
3. The current of generator terminal is used by generator differential protection and main
transformer differential protection. These two kinds of differential protection can share one
group of CT without any influence. In fact two groups of CT input channel are provided in
PCS-985B. One of them is reserved for special case.
5. At 220kV side, there shall be one group of CT to be adopted dedicatedly for breaker failure
protection.
6. Generator reverse power protection can share one group of generator terminal CT with
generator differential protection, or adopt independent measurement CT.
2. For generator inter-turnn protection, in order to prevent undesired operation due to VT circuit
failure at HV side used dedicatedly for this protection, one set of protection shall adopt two
groups of VT. However, if it is considered to adopt only independent VT windings, too much
VT will be installed at generator terminal and it is not reasonable. So it is recommended to
equip three windings of VT there, namely VT1, VT2 and VT3. Panel A adopts voltage from
VT1 and VT3 while panel B VT2 and VT3. During normal operation, panel A adopts VT1 and
panel B adopts VT2 while VT3 is backup to both of them. If circuit of VT1 or VT2 fails, VT3 will
be switched on automatically by software.
3. For zero-sequence voltage, there are two windings adopted by two sets of protection
equipments simultaneously in general.
1.3 Features
High-performance general-purpose hardware and realtime calculations
The output mode of fault detector+protection operation eliminates the possibility of malfunction
and misjudgment caused by hardware fault of the device.
Strong EM compatibility
Integral panel and fully enclosed chassis are adopted. Strong electricity and weak electricity are
strictly separated. Traditional rear board wiring mode is not used. At the same time, measures
against interference are taken in software design, greatly improving the immunity to disturbances.
EM radiation to outside satisfies relevant standards.
Modular programs
Modular programs allow flexible protection configuration and easy functional adjustment.
Variable slope percentage characteristic is adopted for differential protection. Pickup slope and
maximum slope should be reasonably set, so that high sensitivity can be gained during internal
fault and transient unbalance current can be avoided during external fault. In order to prevent
undesired operation of differential protection due to CT saturation, measures to discriminate CT
saturation are provided for phase current at each side.
DPFC percentage differential protection reflects only deviation components of differential current
and restraint current and is not effected by load current. It can detect light fault within transformer
and generator. Besides, it is insensitive to CT saturation since its restraint coefficient is set
comparatively high.
According to relation between DPFC restraint current and DPFC differential current of differential
protection, external or internal fault can be discriminated correctly. For external fault, waveform
discrimination of phase current and differential current is adopted. Undesired operation will not
occur if CT correct transfer time from primary to secondary side is not less than 5ms. As to internal
fault, the device will operate quickly.
By adopting frequency tracking, digital filter and Fourier transformation, the filtration ratio of third
harmonic component can reach more than 100. All these countermeasure guarantees the
reliability of the protection in all occasions as mentioned as below:
The transverse differential protection can get reliable restraint effect because the faulty phase
current increases greatly while transverse differential current increases less in external fault
situation
The protection has very high operation sensitivity because transverse differential current
increases comparatively large whereas phase current change not too observably in slightly
inter-turn fault situation.
The high-setting stage of transverse differential protection will operate quickly and reliably when
severe inter-turn fault occurs in stator winding.
In case of phase-to-phase fault of stator winding, not only transverse differential current but also
phase current increase greatly, therefore just low percentage restraint by phase current
guarantees the reliable operation of transverse differential protection against the fault.
As for unbalanced transverse differential current increasing during normal operation condition,
transverse differential protection uses float threshold to avoid undesired operation.
By adopting frequency tracking, digital filter and Fourier transformation, the filtration ratio of third
harmonic component can reach more than 100. New criteria of generator current percentage
restraint technique:
Fault current increase greatly while longitudinal residual voltage increase less in external
three-phase fault, therefore the protection tends to be reliably restrained thanks to current
increment as restraint quantity.
If external asymmetric fault occurs, phase current increases greatly with negative-sequence
current, but the longitudinal residual voltage has a little bit increment, therefore the protection
tends to be reliably restrained by the mixing quantity of current increment and negative-sequence
component.
The protection has very high operation sensitivity because longitudinal residual voltage increases
comparatively large whereas phase current hardly changes in slightly inter-turn faulty situation.
The high-setting stage of longitudinal residual voltage protection will operate quickly and reliably
when severe inter-turn fault occurs in stator winding.
As for unbalanced longitudinal residual voltage increasing during normal operation condition, the
protection uses floating threshold to avoid undesired operation.
By adopting frequency tracking, digital filter and Fourier transformation, the filtration ratio of third
harmonic component can reach more than 100.
The sensitive stage of fundamental residual voltage protection operates and issues trip command
only if the dual criterias of residual voltages of generator terminal and neutral point are met at the
same time.
The ratio settings of third harmonic of generator terminal to that of neutral point used in third
harmonic ratio criteria will automatically suit to the change of ratio fore-and-aft incorporating in
power network third harmonic voltage of the plant unit. This automation adjustment function
ensures the correctness of signals generated and issued by the third harmonic voltage criteria
even during incorporation or isolation course of generator.
The ratio and phase-angle difference of third harmonic voltage of generator terminal to that of
neutral point keeps almost stable when the generator is in normal operation condition; also it is a
slow developing course. Through real time adjustment of coefficient of amplitude value and phase,
PCS-985 makes differential voltage between generator terminal and neutral point as 0 in normal
operation condition. When stator earth fault occurs, the criteria tend to operate reliably and
sensitively.
The protection adopts digital technology to calculate earth fault resistance accurately.
Settings configured two stage are provided. One stage operates to alarm, and the other stage
operates to trip.
The residual current protection is free from impact of 20Hz power, which provides mainly
protection for comparatively severe stator earth fault.
The protection is adaptive for various operation conditions, such as stillness, no-load, shutdown,
startup and connected to power grid.
DC current is input by high-performance isolated amplifier. Via switching two different electronic
switch, PCS-985 solves four different ground-loop equations to compute rotor winding voltage,
rotor ground resistance and earthing position on real time and display these information on LCD.
Injecting a low-frequency square wave between positive terminal and negative terminal of rotor
windings or between one terminal of rotor windings and axis, the device acquires leakage current
of rotor, and calculates insulation resistance between rotor windings and ground in real-time. The
injected square wave voltage is generated by the device. The protection reflect the insulation
reduction between rotor windings and axis.
The calculation to rotor earth resistance is unrelated to fault location, and no dead zone.
The calculation accuracy of rotor earth resistance is high and is not affected by the capacitance
between rotor windings and ground.
The calculation to rotor earth resistance is unrelated to excitation voltage. It can still supervise
insulation situation of rotor windings when no excitation voltage is supplied.
It can be adaptive to various lead-out mode of rotor windings, and both single-end injection and
double-ends injection can be selected. The fault location can be measured if selecting
double-ends injection.
Loss-of-excitation protection
Out-of-step protection
Two groups of VT inputs are equipped at generator terminal. If one group fails, the device will
issue alarm and switch over to the healthy one automatically. It doesn‘t need to block protection
element relevant to voltage. For main transformer and step-down transformer, the protection
elements relevant to voltage are optional to blocked or not blocked according to the corresponding
logic setting. Based on percentage restraint characteristic, it can discriminate that neutral point of
VT circuit fails.
Reliable blocking function when CT circuit failure can prevent the device from undesired operation
due to CT circuit failure or AC sampled circuit failure.
64 faults and operation sequence, 64 fault waveforms, results of 256 self-supervision reports, and
1024 binary signal change reports can be recorded.
Auxiliary PC software
2 Technical Data
Insulation resistance
Isolation resistance >100MΩ@500VDC
measurements
IEC 61000-4-9:2001
Pulse Magnetic Field Immunity
class V, 6.4/16μs, 1000A/m for 3s
Damped oscillatory magnetic field IEC 61000-4-10:2001
immunity class V, 100kHz & 1MHz–100A/m
2.6 Certifications
ISO9001:2000
ISO14001:2004
OHSAS18001:1999
ISO10012:2003
CMMI L3
Note !
3 Operation Theory
3.1 Overview
The device has 2 plug-in modules (i.e. protection DSP module and fault detector DSP module),
and the logic relation between them is ―AND‖. They have independent sample circuit and output
circuit. AC current and voltage is converted into small voltage signal and sent to protection
calculation module (also called DSP module 1) and fault detector calculation module (also called
DSP module 2) respectively. Protection DSP module is responsible for protection calculation and
fault detector DSP module is responsible for fault detector. Fault detectors on fault detector DSP
module picks up to connect positive pole of power supply of output relays. Real-time data
exchange between protection DSP module and fault detector DSP module is performed. Based on
strict mutual check and self-check, any of them fails will lead to block the device and issue alarm
signal. The device will not mal-operate due to hardware error.
AC Opto-
Signal LPF A/D DSP coupler
External BI
QDJ
+E
LPF A/D DSP
issue alarm signal. The principle of each fault detector element is given below:
When the differential current of main transformer is greater than the setting [I_Pkp_PcntDiff_Tr],
the fault detector element of main transformer differential protection will operate.
When DPFC differential protection of main transformer meet the operation criteria, the fault
detector element of main transformer differential protection will operate.
When zero-sequence differential current of main transformer is greater than the setting
[I_Pkp_PcntREF_Tr], the fault detector element of restricted earth-fault protection (REF) of main
transformer will operate.
When the maximum value of three phase currents is greater than the setting [I_OCn_Tr ], the fault
detector element of impedance protection of main transformer will operate.
When gap zero-sequence current of main transformer is greater than the setting
[I_ROC_Gap_HVS], the fault detector element of gap zero-sequence overcurrent protection of
main transformer will operate.
When gap zero-sequence voltage of main transformer is greater than the setting
[V_ROV_Gap_Tr], the fault detector element of gap zero-sequence voltage protection of main
transformer will operate.
When the maximum value of three phase currents at LV side of step-dwown transformer is greater
than the setting [I_OCn_Br1_STx] or [I_OCn_Br2_STx], the fault detector element of overcurrent
protection of step-down transformer will operate. (Branch 1 and branch 2 at LV side)
When zero-sequence current at LV side of step-dwown transformer is greater than the setting
[I_ROCn_Br1_STx] or [I_ROCn_Br2_STx], the fault detector element of zero-sequence
overcurrent protection of step-down transformer will operate. (Branch 1 and branch 2 at LV side)
When the fundamental variation of differential current is greater than the threshold value, the fault
detector element of generator differential protection will operate.
When the fundamental variation of negative-sequence voltage, current and power are greater than
their threshold values, the fault detector element of DPFC inter-turn protection will operate.
When third harmonic voltage ratio is greater than the setting [k_V3rdHRatio_PreSync_Sta] or
[k_V3rdHRatio_PostSync_Sta], the fault detector element of third harmonic voltage ratio
protection will operate.
When differential third harmonic voltage is greater than the setting [k_V3rdHDiff_Sta], the fault
detector element of third harmonic voltage differential protection will operate.
When the change of rotor grounding location is greater than its internally fixed setting, the fault
detector element of rotor two-points earth-fault protection will operate.
When the inverse time accumulated value is greater than the setting [I_InvOvLd_Sta], the fault
detector element of inverse-time overload protection will operate.
When the inverse time accumulated value is greater than the setting [I_InvNegOC_Gen], the fault
detector element of inverse-time negative-sequence overload protection will operate.
When the accumulated value is greater than the setting [k0_InvOvExc_Gen], the fault detector
element of inverse-time over-excitation protection will operate.
When the frequency is greater than the setting value for a specified time interval, the fault detector
element of over-frequency protection will operate.
When the low-frequency current of generator neutral point is greater than the setting
[I_StShut_Gen], the fault detector element of generator startup/shutdown protection will operate.
When the accumulated value is greater than the setting [I_InvOvLd_RotWdg], the fault detector
element of inverse-time overload protection will operate.
Note!
These setting values of above fault detector elements are formed automatically by the
device, it need not to set manually.
I d K bl I r I cdqd ( I r nI e )
K bl K bl1 K blr ( I r / I e )
I d K bl 2 ( I r nI e ) b I cdqd ( I r nI e )
K blr ( K bl 2 K bl1 ) /(2 n)
b ( K bl1 K blr n) nI e
Equation 3.3-1
I1 I 2 I 3 I 4 I 5
I r
2
I I 1 I 2 I 3 I 4 I 5
d
Id
differential protection
l p er a
n
te nt
ia p re
.0
nt te a
Kbl2
=1
re ta ion
K
ffe y s at
di d er
ea p
st O
1.2Ie
Kbl1
Icdqd
Ir
0 Ie nIe
Where:
Id is differential current.
Ir is restraint current.
Ie is rated current.
Kbl1 is the first slope of percentage differential with setting range 0.05~0.15. 0.10 is applicable
usually.
Kbl2 is the second slope of percentage differential with setting range 0.50~0.80. 0.70 is applicable
usually.
Steady-state percentage differential protection element will not send tripping signal in case of CT
saturation, CT circuit failure (optional), inrush current and overexcitation condition. It can ensure
sensitivity of protection and avoid unwanted operation when CT is saturated during external fault.
Its operation area is tint shadow area.
High-setting percentage differential protection element (described in section 3.3.4) will not send
tripping signal only due to CT circuit failure (optional) and inrush current. It eliminates influence of
transient and steady saturation of CT during external fault and ensures reliable operation even if
CT is in saturation condition during internal fault by means of its percentage restraint characteristic.
Its operation area is deep shadow area.
Unrestrained instantaneous differential protection element (described in section 3.3.5) will send
tripping signal without any blocking if differential current of any phase reaches its setting. Its
operation area is over the above two areas with no shadow.
Note!
For differential current of generator-transformer unit and main transformer, the current
redefinition of each side in Equation 3.3-1 is different for different program versions and
can be found on individual project-specific document.
In the device, the second harmonic of differential current can be used to distinguish inrush current.
Its operation criterion is:
I 2 nd K 2 xb I1st
Where:
During internal fault, differential currents of various sides transferred by CT are basically
fundamental sinusoidal wave. But when the transformer is energized, lots of harmonics occur. The
waveform is intermittent and unsymmetrical. A special algorithm can be used for discrimination of
the inrush current.
S kb*S
S St
Where:
S+ is full cycle integral of the sum of instantaneous value of differential current and that of half
cycle before.
Kb is a fixed constant.
St * I d 0.1* I e
Where:
α is a proportional constant.
If any of three phases can not meet above equation, the differential current can be considered as
inrush current and percentage differential protection will be blocked.
In this device, logic setting is provided for user to select the restraint blocking principle. If the logic
setting is set as ―0‖, discrimination by harmonics is enabled. Otherwise, discrimination by
waveform distortion is enabled.
I cop K nxb I1
Where:
For an internal fault, DPFC restraint current and DPFC differential current appear simultaneously.
If DPFC restraint current appears before DPFC differential current, it maybe an external fault. CT
saturation detection element shall be adopted in this case. It can prevent percentage differential
protection from undesired operation due to CT saturation.
I d 1.2 I e
I d 1.0 I r
Where:
Id
Operation area
K=1.0
1.2Ie
Ir
0
When fault occurs, the operation criterion will be discriminated phase by phase and percentage
differential protection will operate if the criterion is met.
Note!
Parameters of this protection have been fixed in program and do not need to be configured
by user.
I 5th k5 xb * I1st
Where:
Note!
Note!
All the settings mentioned below are from main transformer for example.
Flg_UIDP
&
[EBI_Diff_Tr] &
Op_InstDiff_Tr
[En_InstDiff_Tr]
FD_Diff_Tr
Flg_Inrush_Tr
Flg_HSDP_Tr
& &
[EBI_Diff_Tr]
[En_PcntDiff_Tr]
Flg_CTS
&
FD_Diff_Tr
Flg_CTsat &
Flg_Inrush
≥1
Flg_SPDP_Tr Op_PcntDiff_Tr
&
[EBI_Diff_Tr]
[En_PcntDiff_Tr]
Flg_OvExc_Tr
FD_Diff_Tr
The above logic diagram is also suit for differential protection of generator-transformer unit,
step-down transformer and excitation transformer.
Where:
Flg_UIDP _Tr is the flag indicating whether or not the criterion of UIDP element is met.
Flg_HSDP _Tr is the flag indicating whether or not the criterion of HSDP element is met.
Flg_SPDP _Tr is the flag indicating whether or not the criterion of SPDP element is met.
Flg_Inrush is the flag indicating whether or not the criterion of inrush current detection is met.
Flg_OvExc_Tr is the flag indicating whether or not the transformer is in overexcitation state.
Exc: Exciter
Id
Icdsd
Kbl2
Operation area
Restraint area
Kbl1
Icdqd
Ir
0
Ie nIe
I d K bl I r I cdqd ( I r nI e )
K bl K bl1 K blr ( I r / I e )
I d K bl 2 ( I r nI e ) b I cdqd ( I r nI e )
K blr ( K bl 2 K bl1 ) /(2 n)
b ( K bl1 K blr n) nI e
Equation 3.4-1
I 1 I2
Ir
2
I d I 1 I 2
Where:
I d is differential current
I r is restraint current
K bl1 is the first slope of percentage differential with setting range 0.05~0.15. 0.05 is
recommended usually
K bl 2 is the second slope of percentage differential with setting range 0.30~0.70. 0.50 is
recommended usually
n is the multiple of restraint current at second percentage restraint coefficient and is fixed at 4.
For differential protection of generator and exciter, I1 and I 2 are currents of terminal and neutral
point respectively.
When fault occurs, the equipment decides firstly whether it is internal or external fault. If it is
external fault, criterion of CT saturation is enabled. If any phase differential current of differential
protection meets the criterion, it is decided that this differential current comes from CT saturation
and the percentage differential protection will be blocked.
I d 1.2 I e
I d 1.0 I r
Where:
Differential current I d and restraint current I r are the same as mentioned above.
When fault occurs, the operation criterion will be discriminated phase by phase and percentage
differential protection will operate if the criterion is met.
Parameters of this protection are configured during manufacturing and not need to be configured
in site.
Note!
All the settings mentioned below are from generator for example.
Flg_UIDP_Gen
&
[EBI_Diff_Gen]
&
[En_InstDiff_Gen] Op_InstDiff_Gen
FD_Diff_Gen
Flg_HSDP_Gen
&
[EBI_Diff_Gen]
&
[En_PcntDiff_Gen]
Flg_CTS
&
FD_Diff_Gen
Flg_CTsat
≥1
Flag_SPDP_Gen
& & Op_PcntDiff_Gen
[EBI_Diff_Gen]
[En_PcntDiff_Gen]
Flg_CTS
&
FD_Diff_Gen
The above logic diagram is also suit for exciter differential protection.
Where:
Flg_UIDP _Gen is the flag indicating whether or not the criterion of UIDP element is met.
Flg_HSDP _Gen is the flag indicating whether or not the criterion of HSDP element is met.
Flg_SPDP _Gen is the flag indicating whether or not the criterion of SPDP element is met.
I d 1.25I dt I dth
I d 0.6I r I r 2 I e
I d 0.75I r 0.3I e I r 2 I e Equation 3.5-1
I I 1 I 2 I 3 I 4
r
I I1 I2 I3 I4
d
Where:
I dt is floating threshold which increases progressively along with DPFC increasing. Take its
multiple as 1.25 can ensure threshold voltage always a bit higher than imbalance current. So that
unwanted operation of the equipment can be avoided during power swing and frequency deviation
conditions.
Generally, for differential protection of main transformer, I1 , I 2 , I 3 and I 4 are DPFC
currents of branch 1 and 2 at HV side of main transformer, generator terminal and HV side of
step-down transformer respectively. But for some specific design, I1 can represents the current
For differential protection of generator, I1 and I 2 are currents at the generator terminal of
and the neutral point of generator respectively. I 3 and I 4 have not specified.
I r is DPFC restraint current whose maximum value is taken for actual restraint.
Note!
DPFC differential protection is equipped to each phase of generator, but the user should
know that DPFC restraint quantity for each phase is the same maximum value among the
three phases.
The following figure shows operating characteristic of DPFC percentage differential protection.
ΔId
Differential current
0.75
0.6
Icdqd
ΔIr
2Ie Restraint current
When fault occurs, the operation criterion will be discriminated phase by phase and percentage
differential protection will operate if the criterion is met. For DPFC percentage differential
protection of main transformer, second harmonic or waveform inrush current blocking and fifth
harmonic over excitation blocking are adopted. It can prevent influence of steady-state and
transient CT saturation during external fault due to its percentage restraint characteristic.
This protection element has high ability to eliminate the effect of transient and steady-state CT
saturation during the external fault because the restraint coefficient is set at a higher value.
Note!
All the settings mentioned below are from generator for example.
Flg_CTsat
Flg_DPFC_Diff_Gen
& &
[EBI_Diff_Gen] 0ms 20ms
[En_DPFC_Diff_Gen]
&
Op_DPFC_Diff_Gen
Flg_InstanCTS
The above logic diagram is also suit for main transformer differential protection.
Where:
Flg_DPFC_Diff_Gen is the flag indicating whether or not the criterion of DPFC differential element
is met.
Flg_IntanCTS is the internally generated flag indicating that CT supervision program detects
failure of CT circuit with no delay considered into account.
The corresponding parameters of DPFC differential protection is are fixed and need not to be set
on site.
The voltage controlled element is an element which will operate if phase-to-phase voltage is lower
than the setting [Vpp_VCE_Tr] or negative-sequence voltage is greater than its setting
[V_NegOV_VCE_ Tr].
Criteria:
Where:
All two stages of definite time overcurrent protection can be controlled by voltage element by
configuring related logic settings [En_VCE_Ctrl_OC1_Tr] and [En_VCE_Ctrl_OC2_Tr].
Meanwhile, User can decide by which side voltage overcurrent protection is controlled by
configuring related settings. For example, if the setting [En_LVS.VCE_Ctrl_OC_Tr] is set as ―1‖,
then the overcurrent protection is controlled not only by HV side voltage element but also by LV
side voltage element.
For self and parallel-excited generator, current will decrease so quick during fault that it may be
lower than overcurrent setting before tripping. So memorizing function for fault current is equipped
with this protection. Logic setting [En_Mem_Curr_Tr] is used for configure of this function.
Note!
When VT on one side is under maintenance or bus-tie breaker is used for the transformer but its
VT has not been switched over to the device, VT circuit failure is detected. Logic setting
[Opt_VTS_Ctrl_OC_Tr] is used to configure performance of voltage controlled element during VT
circuit failure. When this logic setting is set as ―1‖, if VT circuit failure is detected, the voltage
controlled element cannot pick up and the protection will not operate. When this logic setting is set
as ―0‖, if VT circuit failure is detected on this side, voltage controlled element is forced to be
satisfied, then the voltage controlled directional overcurrent protection controlled by voltage will
becomes a pure overcurrent protection.
Upp< [Vpp_VCE_Tr] ≥1
&
U2>[V_NegOV_VCE_ Tr] ≥1
Flg_VCE_Tr
Flg_VTS
&
[Opt_VTS_Ctrl_OC_Tr]
&
≥1
[En_Mem_Curr_Tr] &
Flg_OCn_Tr
Flg_VCE_Tr ≥1
[En_VCE_Ctrl_OCn_Tr]
FD_OCn_Tr
Where:
(n can be 1 or 2)
Figure 3.6-2 shows operation characteristic of impedance protection. In this figure, I is phase
jX
I Zp
U I Zp
m
U
R
U I Zn
I Zn
Operation criterion:
90 Arg
U IZ 270
U IZ
P
The fault detector of impedance protection adopts DPFC phase current and negative-sequence
current. Pickup signal will be lasted for 500 ms and will be kept if impedance protection operates
during this time interval. Operation criterion of the fault detector is
I 1.25I t I th
Where:
Take its multiple as 1.25 can ensure threshold current always a bit higher than imbalance current.
So that unwanted operation of the equipment can be avoided during system swing and frequency
deviation conditions.
I th is the fixed threshold. When DPFC phase-to-phase current is higher than 0.3 Ie, the fault
detector operates.
Flg_VTS
Flg_Zn_Tr
&
& &
[En_PPF_Tr] [t_Zn_Tr ] Op_Zn_Tr
[EBI_PPF_Gen]
FD_PPF_Tr
Where:
(n can be 1 or 2)
By setting logic settings, following functions of any stages of this protection can be selected:
The direction element uses calculated zero-sequence current and calculated zero-sequence
voltage. The direction of zero-sequence overcurrent protection points to system definitely with the
reach angle 75º. If VT circuit failure at HV side occurs, the direction element will be out of service.
Figure 3.7-1 shows operation characteristic of zero-sequence overcurrent protection in which the
hatched area is operation region.
3U0
Φlm= 75°
I0
Point to system
Note!
The voltage used by direction element is definitely the calculated voltage. The direction
mentioned above is based on CT polarity for calculated zero-sequence current being at
busbar side. Zero-sequence voltage element uses definitely broken-delta voltage of VT.
Figure 3.7-2 shows logic diagram of zero-sequence overcurrent protection of main transformer.
3U0>[V_ROV_VCE_Tr] ≥1
[En_VCE.ROV_Ctrl_ROC1/2_Tr]
Flg_Harm_Block_ROC1/2_Tr ≥1
En_Harm_Ctrl_ROC1/2_Tr
Flg_Dir_ROC_Tr ≥1 &
[En_Dir_Ctrl_ROC1/2_Tr]
Flg_ROCn_Tr
&
[En_EF_Tr]
[EBI_EF_Tr]
&
[t_ROCn_Tr] Op_ROCn_Tr
FD_EF_Tr
Figure 3.7-2 Logic diagram of zero sequence overcurrent protection of main transformer
Where:
Flg_Dir_ROC_Tr is flag indicating that whether or not the criterion of directional element is met.
Flg_ROCn_Tr is flag indicating that the zero sequence current is above the setting.
k Tp
t
I Equation 3.7-1
1
IP
Where:
K is a constant.
is a constant.
The user can select the operating characteristic from various inverse-time characteristic curves by
setting [Opt_InvROC_Tr], and parameters of available characteristics for selection are shown in
the following table.
[En_EF_Tr] [tmin_InvROC_Tr]
FD_InvROCProt_Tr
Where:
PCS-985B provides one stage gap zero-sequence overvoltage protection and gap zero-sequence
overcurent protection with two time delays for each stage.
[EBI_Gap_HVS_Tr]
&
[En_EF_Tr] FD_ROVProt_Tr
[U0_DeltVT_HVS_Tr]>[V_ROV1_Gap_Tr]
[EBI_Gap_HVS_Tr]
&
[En_EF_Tr] FD_ROC_Gap_Tr
[I0_Gap_HVS_Tr]>[I_ROC1_Gap_Tr]
FD_ROVProt_Tr ≥1
FD_ROC_Gap_Tr
&
FD_ROVProt_Tr ≥1
t Op_ROVn_Tr
FD_ROVProt_Tr ≥1
FD_ROC_Gap_Tr
&
FD_ROC_Gap_Tr ≥1
t Op_ROCn_Gap_Tr
Where:
n can be 11 or 12
Since this protection adopts frequency tracing, digital filtering and full cycle Fourier algorithm, the
third harmonic can be reduced to 1/100 within the frequency tracing range and the protection can
response the fundamental component only.
This protection comprises two stages: high-setting stage (insensitive stage) and sensitive stage.
This stage is equivalent to traditional transverse differential protection. When the transverse
differential current is in excess of the setting [I_InsensTrvDiff_Gen], high-setting stage of
yransverse differential protection operates.
Phase current percentage restraint principle is used for this stage. The operation criterion is
Where:
Phase current percentage restraint transverse differential principle can ensure no unwanted
operation during external fault and sensitive operation during internal fault. As this principle is
adopted, current setting of the transverse differential protection shall be only higher than
unbalance current during normal operation and much less than that of traditional transverse
differential current protection. Sensitivity for interturn fault of generator can be enhanced then.
This protection has also a floating threshold for high transverse differential unbalance current
during other normal operation conditions.
Operation of the high sensitive transverse differential protection will lead a tripping immediately.
When rotor of generator is grounded at one point, a configurable time delay [t_TrvDiff_Gen] will be
inserted in the tripping course. Figure 3.8-1 shows logic diagram of this protection.
Flg_1PEF_RotWdg &
&
[En_Alm_1PEF_RotWdg] [t_TrvDiff_Gen] ≥1
Flg_TransDiff_Gen
&
[En_SensTrvDiff_Gen]
&
&
Op_SensTrvDiff_Gen
[EBI_IntTurn_Gen]
FD_TransDiff_Gen
Where:
Flg_1PEF_RotWdg is flag indicating the one-point earth fault protection of rotor operates.
Since this protection adopts frequency tracing, digital filtering and full cycle Fourier algorithm, the
third harmonic can be reduced to 1/100 within the frequency tracing range and the protection can
response the basic wave component only.
This protection comprises two stages: high-setting stage (insensitive stage) and sensitive stage.
Setting of this stage shall be higher than maximum unbalance voltage during external fault, whilst
directional flag indicating internal fault must be satisfied. When measured longitudinal zero
sequence voltage is in excess of the setting [V_InsensROV_Longl_Gen] and lasts for longer than
the delay setting [t_ROV_Longl_Gen], this protective element will trip breakers according to the
configuration of [TrpLog_IntTurn_Gen].
Phase current percentage restraint principle is used for this stage. The operation criterion is
I
U z 0 1 K z 0 m U z 0 zd
Ie
3 I2 I max I e
Im
I max I e 3 I 2 I max I e
Where:
Likely to transverse differential principle, this protective element can ensure no unwanted
operation during external fault and sensitive operation during internal fault. As for the percentage
restraint characteristic, zero sequence voltage setting of the zero sequence voltage protection
shall be only higher unbalance voltage during normal operation. Sensitivity for interturn fault of
generator can be enhanced then.
This protective element has also a floating threshold for high unbalance longitudinal zero
sequence voltage during other operation conditions.
Flg_Dir_NegP
&
Flg_LongiROV_Gen
Flag_VTS
&
[En_InsensROV_Longl_Gen]
[EBI_IntTurn_Gen]
&
[t_ROV_Longl_Gen] Op_InsensROV_Longl_Gen
FD_IntTurn_Gen
Flg_LongiROV_Gen &
Flag_VTS
&
[En_SensROV_Longl_Gen]
[EBI_IntTurn_Gen]
&
[t_ROV_Longl_Gen] Op_SensROV_Longl_Gen
FD_IntTurn_Gen
Where:
Flg_Dir_NegP is internally generated flag indicating whether or not the direction element
calculated from negative-sequence voltage and current is meet the faulty condition.
Criterion 1:
Criterion 2:
U AB U ab 5V
U BC U bc 5V
U CA U ca 5V
Where:
That any one of these three sub-criteria is met means criterion 2 picks up.
When any of criterion 1 and criterion 2 operates, alarm of VT2 circuit failure will be issued with a
time delay of 40ms and longitudinal zero-sequence voltage protection will be blocked.
After VT circuit failure reverting to normal condition, blocking can be released by pressing the reset
button.
ΔF=Re ΔU 2 Δ I 2 e jΦ ε 1.25 dF
U 2 0.5V 1.25du
I 2 0.02In 1.25di
If the three criterions are met simultaneity, the directional flag of protection is set. Under
negative-sequence voltage and negative-sequence current controlling, the protection operates
after 0.2~0.5s time delay.
AC current and voltage input of DPFC inter-turn protection are from the generator terminal directly.
When the VT1 at the generator terminal fails, DPFC inter-turn protection is blocked. The setting is
default setting. The sensitivity is about 3V of longitudinal zero-sequence voltage.
DPFC inter-turn protection can not response to inter-turn fault before the generator is connected
into the power system.
For generators with self shunt excitation, current will decrease so quickly during fault that it may be
lower than overcurrent setting before tripping. So memorized function for remember fault current is
equipped with this protection. Logic setting [En_Mem_Curr_Gen] is used for configuration of this
function.
Note!
Overcurrent protection can be blocked not only by composite voltage at generator terminal but
also by composite voltage at HV side of main transformer. This function can be configured by
setting logic setting [En_HVS.VCE_Ctrl_OC_Gen] as ―1‖.
circuit failure. When this logic setting is set as ―1‖, if VT circuit failure at this side is detected, the
composite voltage element will not meet conditions to operate. When this logic setting is set as ―0‖,
if VT circuit failure at this side is detected, composite voltage element is disabled, overcurrent
protection will not be blocked and becomes a pure overcurrent protection.
Upp< [Vpp_UV_VCE_Gen] ≥1
&
U2>[V_NegOV_VCE_ Gen] ≥1
Flg_VCE_Gen
Flg_VTS
&
[Opt_VTS_Ctrl_OC_Gen]
&
≥1
[En_Mem_Curr_Gen] &
Flg_OCn_Gen
Flg_VCE_Gen ≥1
[En_VCE_Ctrl_OCn_Gen]
FD_OCn_Gen
Where:
Flg_OCn_Gen is internally generated flag indicating stage n of overcurrent operates, which means
the measured current is in excess of its setting [I_OCn_Gen]. (n can be 1 or 2).
characteristic suits for case that forward setting of a zone is higher than its reverse setting. Reach
angle of impedance protection is 78°. Forward of the impedance protection is configurable and
generally points to generator.
jX
I Zp
U I Zp
m
U
R
U I Zn
I Zn
Figure 3.9-2 shows operation characteristic of impedance protection. In this figure, I is phase
current, U is corresponding phase-to-phase voltage, Zn is reverse impedance setting, Zp is
forward impedance setting.
Operation criterion:
(U I Z P )
90 Arg
270
(U I Z n )
DPFC phase-to-phase current and negative-current current are adopted as fault detector of
impedance protection. Pickup signal will be maintain 500ms and will be kept if impedance
protection operates during this time interval. Operation criterion of the fault detector is:
I 1.25I t I th
Where:
I t is floating threshold which increases gradually along with DPFC increasing. Take its multiple
as 1.25 can ensure threshold voltage always a bit higher than imbalance voltage.
Unwanted operation of the device can be avoided during conditions of power swing and frequency
deviation from nominal valuess.
I th is the fixed threshold. When DPFC phase-to-phase current is higher than 0.2Ie, the fault
detector operates.
Flg_VTS &
Flg_Zn_Gen
&
& [t_Zn_Gen] Op_Zn_Gen
[En_PPF_Gen]
[EBI_PPF_Gen]
FD_PPF_Gen
Where:
Note!
Note!
This protection comprises two stages: sensitive stage and insensitive stage (high setting stage).
Operation criterion:
U n0 U 0zd
Where:
When the sensitive stage operates to trip, in order to prevent sensitive stage of fundamental
zero-sequence overvoltage protection from undesired trip due to external fault, it can be blocked
by zero-sequence voltage at HV side of main transformer, and the blocking setting of
zero-sequence voltage can settable.
When the sensitive stage operates to trip, it will be blocked by broken-delta zero-sequence voltage
of generator terminal, and the blocking setting need not be set. The device switched automatically
according to VT ratio of generator terminal and neutrol point of generator.
Operation criterion:
U n0 U 0hzd
Where:
generally.
Operation criterion:
U 3T / U 3N K 3wzd
Where:
U 3T and U 3N are third harmonic voltage of generator terminal and neutral point respectively.
During incorporation of generator to power system, the ratio U3T/U3N changes considerably owing
to variation of equivalent capacitive reactance at generator terminal. So two different settings are
designed for protection before and after connection of generator with system, and these two
settings can be switched over with alternation of contacts‘ position of the terminal breaker.
In addition, settings are provided for deciding whether the ratio protection of third harmonics
voltage is used for alarm or tripping or both.
Third harmonic voltage ratio protection can operates for alarm purpose or trip purpose.
U 3T K t U 3 N Kre U 3 N
Where:
U 3T and U 3 N are third harmonic vector voltage of generator terminal and neutral point
This protection is enabled automatically when the generator has been connected with the system
and load current is higher than 0.2 Ie (generator rated current) and only issues alarms if operates.
Third harmonic voltage differential protection operates only for alarm purpose.
Since broken-delta voltages of VT at neutral point and generator terminal are taken for
zero-sequence voltage protection of stator, failure of these VT circuits will make this protection fail
to operation. So alarm shall be issued during this case. Third harmonic voltage ratio criterion and
third harmonic voltage differential criterion shall be disabled during VT circuit failure at neutral
point of generator.
Positive-sequence voltage of secondary winding of generator terminal is higher than 0.9Un and
third harmonic of zero-sequence voltage is lower than 0.1V.
VT circuit failure alarm will be issued by delay 10s and reverted automatically by delay 10s when
the failure vanishes.
The alarm function of broken-delta VT circuit failure of generator terminal and neutral point of
generator can be enabled or disabled by logic setting [En_Alm_DeltVTS1_Gen].
Secondary circuit failure of VT1 of generator terminal will not influence ground protection of stator.
Primary circuit failure of VT1 of generator terminal will cause basic wave component of zero
sequence voltage of generator terminal increasing and third harmonic component decreasing, and
will not cause unwanted operation of basic wave zero sequence voltage protection and third
harmonic voltage ratio protection. However, it will cause unwanted operation of third harmonic
voltage differential protection, so this protection shall be blocked during this failure. The operation
criterion is:
When these criterions are met, VT1 primary circuit failure alarm will be sent by short delay and
third harmonic voltage differential protection and third harmonic voltage ratio protection will be
blocked.
[En_Alm_ROV_Sta] &
t Alm_ROV_Sta
Flg_SensROV_Sta
Flg_SensROV_Sta
&
Flg_VTS
[En_Trp_ROV_Sta]
&
[En_EF_Sta] &
[t_ROV_Sta] Op_Trp_ROV_Sta
[EBI_ROV_Sta]
FD_EF_Sta
Flg_InsensROV_Sta &
[En_Trp_InsensRov_Sta]
&
[En_EF_Sta] &
[t_InsensROV_Sta] Op_InsensROV_Sta
[EBI_ROV_Sta]
FD_EF_Sta
En_Alm_V3rdHRatio_Sta &
Flg_VTS
& t Alm_V3rdHRatio_Sta
Flg_V3rdHRatio_Sta
[En_EF_Sta]
&
[En_Trp_V3rdHRatio_Sta] &
t_V3rdH_Sta Op_V3rdHRatio_Sta
[EBI_V3rdH_Sta]
FD_EF_Sta
Where:
Flg_V3rdHRatio_Sta is internally generated flag indicating third harmonic voltage ratio protection
operates.
Band-Pass Filter
B10
Load
Resistor
Voltage
Rn Divider Square-wave
power supply
A2
Inter-CT
Figure 3.11-1 Circuit design of stator earth-fault protection with voltage injection
An external low-frequency alternating voltage source injects into neutral point of the generator via
secondary side of earthing transformer, or injects into secondary side of broken-delta VT at the
generator terminal.
According to the erthing resistance of stator windings, PCS-985B provides two stages for alarm
purpose with high setting and for trip purpose with low setting respectively. The operation
criterions are:
RE REsetL
(for trip purpose)
RE REsetH
(for alarm purpose)
Where:
I G 0 I Eset
Where:
When U LF 0 ( U G 0 is low-frequency voltage after Un0 is digital filtered) is smaller than the setting
value or I LF 0 ( I G 0 is low-frequency current after In0 is digital filtered) is smaller than the setting
value, it means that external injection circuit for stator earth-fault protection is abnormal. The
device will be blocked and issue an alarm signal.
U LF 0 U LF 0 set
I LF 0 I LF 0 set
Where:
When the frequency of generator voltage deviate rated frequency seriously, the earthing
resistance criterion should be blocked, but the earthing current criterion is not affected.
ULF0<ULF0.SET ≥1
0s 0.1s Alm_Pwr_Inj_EF_Sta
ILF0<ILF0.SET
&
Frequency blocking & &
t Alm_SensInjEF_Sta
[En_Freq_Blk_Inj_EF_Sta]
RE<RE.SET.H &
≥1
RE<RE.SET.L t Op_Inj_EF_Sta
IG0>IE.SET &
[EBI_Inj_EF_Sta]
Figure 3.11-2 Logic diagram of stator earth-fault protection with voltage injection
There are two stages equipped for one-point earth protection: sensitive stage and regular stage.
Sensitive stage is used for alarm and regular stage for tripping or alarm.
U
+ aU -
rotor
R Rg R
R S1 S2 R
Rg<[R_Sens1PEF_RotWdg] &
Alm_Sens_1PEF_RotWdg
[En_Alm_Sens_1PEF_RotWdg]
[En_Alm_1PEF_RotWdg] &
t Alm_1PEF_RotWdg
Rg<[R_1PEF_RotWdg] &
[En_EF_RotWdg]
&
[En_Trp_1PEF_RotWdg] &
[t_1PEF_RotWdg] Op_Trp_1PEF_RotWdg
[EBI_EF_RotWdg]
FD_EF_RotWdg
Alm_1PEF_RotWdg t
&
Flg_2PEF_RotWdg &
[En_EF_RotWdg]
Flg_V2ndH_VCE_2PEF_RotWdg ≥1
[t_2PEF_RotWdg] Op_2PEF_RotWdg
[En_VCE_2PEF_RotWdg]
[En_2PEF_RotWdg]
&
[EBI_EF_RotWdg]
FD_EF_RotWdg
Where:
Flag_2PEF_RotWdg is the flag indicating whether or not two-points earth-fault protection meet its
criteiron.
The work circuit of voltage injection into the rotor winding at double-ends and single-end is shown
in Figure 3.13-1 and Figure 3.13-2 respectively.
Ur+
Usq
Rg
Rotor Axis
Ig Rx
Uα
Ur-
Ry
Figure 3.13-1 Measuring scheme of voltage injection into the rotor winding at single-end
Ry
Ur+
Usq
Rg
Rotor Axis
Rx Ig
Uα
Ur-
Ry
Figure 3.13-2 Measuring scheme of voltage injection into the rotor winding at double-ends
Where:
Rotor one-point earth fault protection provides two stages: one stage is sensitive stage used to
issue alarm signal, and the other stage, regular stage, can operate to issue alarm signal or trip.
Rg<[R_Sens1PEF] &
Alm_Sens1PEF
[En_Alm_Sens1PEF]
[En_Alm_1PEF] &
[t_Alm_1PEF] Alm_1PEF
Rg<[R_1PEF]
&
[En_Trp_1PEF]
[EBI_1PEF_RotWdg]
&
[t_Trp_1PEF] Op_1PEF_RotWdg
FD_1PEF_RotWdg
If rotor one-point earth fault protection is used to issue alarm signal only, it is optional whether rotor
two-points earth fault protection is put into service or not. If it is selected to be in service, rotor
two-point earth fault protection will be enabled automatically with a time delay after regular stage
of rotor one-point earth fault protection operating to issue alarm signal. After that, if the location of
earthing point varies and the variation reaches its internal threshold value, the protective device
thinks it as two-point earth fault and rotor two-points earth fault protection will operate to trip.
[Alm_1PEF] t &
&
[En_2PEF] [t_Trp_2PEF] Op_2PEF_RotWdg
[EBI_2PEF_RotWdg] &
FD_2PEF_RotWdg
Note!
The device only can enable any of rotor earth-fault protection with ping-pang type and rotor
earth-fault protection with voltage injection, the other is reserved.
I>[I_Alm_OvLd_Sta] &
t [Alm_OvLd_Sta]
[En_OvLd_Sta]
I>[I_OvLd_Sta] &
[En_OvLd_Sta]
FD_Ovld_Sta
The upper-limit definite-time part has minimum operating time. When stator current reaches its low
setting (Iszd), inverse-time part initiates and the heat is accumulated. When the accumulated
value is greater than the setting, inverse-time stator overload protection operates to trip.
Inverse-time part can simulates generator-heating process including heat accumulation and
dissipation. When the stator current is lower than rated value, the heat accumulation will decrease
accordingly.
I
Ih
Iszd
t min t max
Where:
[( I I ezd) K srzd ] t KS zd
2 2
Where:
[En_OvLd_Sta] t
FD_InvOvLd_Sta
Note !
In order to prevent heat accumulation from not being dissipated, the dissipation coefficient
(the setting [K_Disppt_Sta])should be set as 1.02~1.05.
[En_NegOC_Gen] &
[t_Alm_NegOC_Gen] Alm_NegOC_Gen
I2>[I_Alm_NegOC_Gen]
I2>[I_NegOC_Gen] &
[En_NegOC_Gen]
FD_NegOC_Gen
The upper-limit definite-time part has minimum operating time. When negative-sequence current
reaches its low setting [I_InvNegOC_Gen], inverse-time part initiates and the heat is accumulated.
When the accumulated value is greater than the setting, inverse-time negative-sequence overload
protection operates to trip.
Inverse-time part can simulate generator-heating process including heat accumulation and
dissipation. When the stator current is lower than permissive continuous negative-sequence
current [I_Neg_Perm_Gen], the heat accumulation will decrease accordingly.
I2zd
t min t max
[( I 2 I ezd) I 21 ] t A
2 2
Equation 3.15-1
Where:
Inverse-time negative-sequence overload protection can be set to trip to separation and field
suppression or alarm. Figure 3.15-3 shows its logic diagram.
t>tmax
I2>[I_InvNegOC_Gen] & ≥1
IDMT &
[En_NegOC_Gen]
t>tmin
FD_InvNegOC_Gen
Note!
The long time delay of lower limit should be smaller than the calculated operating time
using lower-limit pickup current according to Equation 3.15-1.
U pp U lezd
Where:
When bus voltage is taken as the criterion, if bus VT circuit fails, the protection will be blocked.
When generator terminal voltage is taken as the criterion, if one group of VT circuit fails, the other
group of VT will be switched over automatically.
Z jX B
270 Arg 90
Z jX A
Where:
XA: can be set as the system impedance Xs for steady-state stabilization limit circle and XA= 0.5
X'd for asynchronous impedance circle
XB: is taken as Xd+0.5 X'd for non-salient pole generator and 0.5(Xd+Xq)+0.5 X'd for salient pole
generator
The impedance criterion can be combined with reverse reactive power criterion, i.e.,
Q<[Q_RevQ_LossExc_Gen].
Using the same current and voltage to calculate inactive power and reverse power.
Figure 3.16-1 and Figure 3.16-2 show operation characteristics of steady-state stabilization
impedance circle and asynchronous impedance circle.
jx
Z1
R
-Qzd
Z2
The hatched area is operating area, and the dotted line is operation limit of reverse reactive power.
jx
Z1
R
-Qzd
Z2
Besides operation criterion mentioned above, there are also auxiliary operation criterion, namely:
Where:
Ur is rotor voltage
Where:
Xs is equivalent reactance on system side connected with the generator (per unit value)
If Ur drops to zero or minus value suddenly during loss of excitation, the rotor under voltage
criterion will be met quickly before steady-state stability limit of the generator reaches. If Ur drops
to zero or reduces to a value gradually during loss of excitation, the variable excitation voltage
criterion will be reached. Excitation undervoltage or loss of excitation will cause out-of-step, and
then excitation voltage and output power of the generator will swing seriously. In this case, the
rotor under voltage criterion and the variable excitation voltage criterion will be met and withdrawn
periodically in general. So the excitation voltage element will revert with delay during out-of-step
condition while the impedance entering the steady state stability limit circle.
Ur<[V_BusUV_LossExc_Gen] &
≥1
[En_RotUV_LossExc1_Gen] &
Ur<[V_RotUV_LossExc_Gen] ≥1
&
Ur<Krel×Xdz×P×Uf0 ≥1
[En_RotUV_LossExc1_Gen]
&
Flg_Z_LossExc1_Gen & & t Op_LossExc1_Gen
[En_Z_LossExc1_Gen]
& ≥1
Q>[Q_RevQ_LossExc_Gen] &
[En_RevQ_LossExc_Gen]
[En_LossExc_Gen]
&
[EBI_LossEXC_Gen]
FD_LossExc_Gen
Figure 3.16-4 shows logic diagram of stage 2 of loss-of-excitation protection. If excitation is lost
and voltage at HVside of main transformer is lower than its setting, this stage will trip with a time
delay. In configuring this stage, considering of security, it is strongly recommended that impedance
criterion should be used as well as undervoltage criterion rather than that only undervoltage
(busbar or generator terminal) criterion and rotor undervoltage criterion are used.
Upp<[V_BusUV_LossExc_Gen &
≥1
[En_BusUV_LossExc2_Gen]
Ur<[V_RotUV_LossExc_Gen] ≥1
&
Ur<Krel×Xdz×P×Uf0 ≥1 &
t Op_LossExc2_Gen
[En_RotUV_LossExc2_Gen]
Flg_Z_LossExc2_Gen
&
&
[En_Z_LossExc2_Gen]
& ≥1
Q>[Q_RevQ_LossExc_Gen]
[En_RevQ_LossExc_Gen]
[En_LossExc_Gen]
&
[EBI_LossEXC_Gen]
FD_LossExc_Gen
Figure 3.16-5 shows logic diagram of stage 3 of loss-of-excitation protection. It is also used to trip
with a long time delay.
[En_Alm_LossExc3_Gen]
Ur<[V_RotUV_LossExc_Gen] ≥1
&
Ur<Krel×Xdz×P×Uf0 ≥1
&
t Alm_LossExc_Gen
[En_RotUV_LossExc1_Gen]
Flg_Z_LossExc1_Gen
&
&
[En_Z_LossExc1_Gen]
Q>[Q_RevQ_LossExc_Gen] & ≥1
[En_RevQ_LossExc_Gen]
En_LossExc_Gen
&
& t Op_LossExc3_Gen
EBI_LossExc_Gen
FD_LossExc_Gen
Figure 3.17-1 shows operation characteristic of out-of-step protection that comprises three parts:
lens part, boundary part and reactance line part.
jx
Za
U
D
Zc
OL
IL 3
2
1 IR 1
OR
0 R
L R
Zb
1. Lens divides impedance plane into inside part I and outside part O
2. Boundary divides the impedance plane into left part L and right part R
3. Reactance line divides the impedance plane into upper part U and lower part D
Considering lens and boundary comprehensively, the impedance plane is divided into four areas:
OL, IL, IR and OR. If the locus of impedance is passing through these four areas in sequence from
right to left or vice versa, and staying in each area for a moment longer than the setting, this case
is considered as power swing. The times of passing through are accumulated and the grand total
is considered as the times of pole sliding. When the grand total reaches its setting value,
out-of-step protection operates.
As to reactance line, if the impedance locus passes through the upper part U, the swing center is
considered outside the generator. If the locus passes through the lower part D, the swing center is
considered within the generator. Settings of times of pole sliding can be configured separately for
these two cases.
Out-of-step protection can be used either for alarm only or tripping. Minimum swing period which
can be identified by this protection is 120 ms.
[En_Alm_Int_OOS_Gen] &
Accumulated Times Alm_Int_OOS_Gen
[En_Alm_Ext_OOS_Gen]
Flg_Blk_OOS
&
& Accumulated Times Alm_Ext_OOS_Gen
Flg_OOS_Gen
[En_OOS_Gen]
&
[TrpLog_OOS_Gen].Bit0
[EBI_OOS_Gen]
&
Accumulated Times Op_Ext_OOS_Gen
FD_OOS_Gen
Op_Int_OOS_Gen
Upp>[V_OVn_Gen] &
[En_VoltProt_Gen]
&
[TrpLog_OVn_Gen].Bit0 &
[t_OVn_Gen] Op_OVn_Gen
[EBI_VoltProt_Gen]
FD_OV_Gen
For generator, over-excitation protection calculates the voltage from generator terminal to
discriminate whether it is over excitation. For main transformer, over-excitation protection
calculates the voltage from HV side of main transformer to discriminate whether it is over
excitation. If no circuit breaker is equipped with generator terminal, only one set of over-excitation
protection needs be enabled. If there is a circuit breaker equipped with generator terminal, both
over-excitation protection of generator and over-excitation protection of main transformer should
be eneabled.
Two stages are equipped for definite-time over-excitation protection, and one stage for alarm
purpose and one stage for trip purpose. Their time delays can be configured.
n Upu / Fpu
Where:
Figure 3.19-1 shows logic diagram of definite time over excitation protection.
[En_OvExc_Gen] &
[t_Alm_OvExc_Gen] Alm_OvExc_Gen
U/F>[k_Alm_OvExc_Gen]
[En_OvExc_Gen]
FD_OvExc_Gen
U/F
n0
n1
n2
n3
n4
n5
n6
n7
t0 t1 t2 t3 t4 t5 t6 t(s) t7
The over excitation multiple settings n (= U/F) are within range of 1.0~1.5 in general. Maximum
time delay t is considered as long as 3000s. Relation between various settings of n and t are:
n0 ≥ n1 ≥ n2 ≥ n3 ≥ n4 ≥ n5 ≥ n6 ≥ n7
t0 ≤ t1 ≤ t2 ≤ t3 ≤ t4 ≤ t5 ≤ t6 ≤ t7
FD_OvExc_Gen
P<-[P_RevP_Gen]
Where:
P is the power calculated from three phase voltages and currents at generator terminal.
One stage for tripping and another stage for alarm with independent delay setting respectively are
equipped with this protection.
The setting range of reverse power setting is 0.5%~10%Pn. (Pn is rated active power of the
generator)
P≤-[P_RevP_Gen] &
[En_PwrProt_Gen]
&
[TrpLog_RevP_Gen].Bit0 &
[t_Trp_RevP_Gen] Op_RevP_Gen
[EBI_PwrProt_Gen]
FD_PwrProt_Gen
Figure 3.20-2 shows logic diagram of sequence tripping reverse power protection.
[BI_52b_GCB] &
[BI_Valve_Turbine]
P≤-[P_SeqTrp_RevP_Gen]
[En_PwrProt_Gen]
&
[TrpLog_SeqTrp_RevP_Gen].Bit0 &
[t_SeqTrpRevP_Gen] Op_SeqTrpRevP_Gen
[EBI_PwrProt_Gen]
FD_PwrProt_Gen
The setting range of low power protection is 0.5%~10% Pn. (Pn is rated active power of the
generator)
Figure 3.20-3 shows logic diagram of sequence tripping reverse power protection.
[BI_52b_GCB] &
[BI_NotUrgBrake]
P<[P_UP_Gen]
[En_PwrProt_Gen] &
&
t_UP_Gen Op_UP_Gen
[EBI_PwrProt_Gen]
FD_PwrProt_Gen
Where:
Three stages of underfrequency protection are equipped for PCS-985B. Stage 1 is usually
configured as accumulating frequency protection, and can be reset to zero only after erasing
reports. Stage 2 and stage 3 can be configured as continuous frequency protection.
[En_Alm_UFn_Gen]
[BI_52b_CB_HVS1(2)_Tr]
&
& t Alm_UF_Gen
f<[f_UFn_Gen]
[En_FreqProt_Gen]
&
[TrpLog_UF_Gen].Bit0 &
[t_UFn_Gen] Op_UFn_Gen
[EBI_FreqProt_Gen]
FD_FreqProt_Gen
[En_Alm_OFn_Gen]
&
f<[f_OFn_Gen] & t Alm_OF_Gen
[En_FreqProt_Gen]
&
[TrpLog_OF_Gen].Bit0
&
[EBI_FreqProt_Gen] [t_OFn_Gen] Op_OFn_Gen
FD_FreqProt_Gen
cases:
1. In the course of generator’s hand turning (low frequency condition), if it has not been excited,
breaker closure by accident may lead to asynchronous starting of the generator. The
protection is put into use automatically with time delay t1 when two groups of voltage derived
from two independent VTs are all less than undervoltage setting and exit with time delay t2
(designed to cooperate with low-frequency blocking criterion) when the two groups of voltage
revert to normal level.
2. In the case that generator breaker is closed by accident in excited condition but frequency is
under normal level which may occur in startup-and-shutdown process. The protection is put
into use automatically with time delay t3 while low-frequency criterion is met and returns with
time delay t4 after the frequency criteria releases. Here, t4 should be set as long as to ensure
the completion of tripping course.
3. In the case that generator breaker is closed by accident in excited condition but frequency is
greater than the setting which may occur in startup-and-shutdown process. The protection is
put into use with time delay t3 and returns with time delay t4, which can be enabled or
disabled by logic setting, and is also controlled by position contact of circuit breaker. Here, t3
should coordinate with open time of circuit breaker, and t4 should be set as long as to ensure
the completion of tripping course.
Considering security of the protection, both currents from generator terminal and neutral point are
used in the logic as criteria. In addition, the current at HV side of main transformer should be
greater 0.2Ie is also used as an auxiliary criterion.
Flg_UF_Gen &
t3 t4 ≥1
Flg_UV_Gen ≥1
t1 t2
[BI_52b_CB]
&
Flg_NoCurr_CB_Gen t3 t4
[En_CB_Ctrl_AccEnerg_Gen]
Flg_OC_Term_Gen
& &
Flg_OC_NeuP_Gen & t3 t4 Op_AccEnerg_Gen
Flg_NoCurr_CB_Tr
[En_AccEnerg_Gen] &
[EBI_AccEnerg_Gen]
FD_AccEnerg_Gen
Where:
Flg_UF_Gen is the flag indicating whether or not low frequency element of generator operates.
Flg_UV_Gen is the flag indicating whether or not under voltage element of generator operates.
Flg_OC_Term_Gen is the flag indicating whether or not overcurrent current element of generator
terminal operates.
Flg_OC_NeuP_Gen is the flag indicating whether or not overcurrent current element of generator
neutral point operates.
3. Excitation has been applied to generator, and the voltage at generator terminal is greater than
a fixed setting.
Phase current criterion and zero-sequence current criterion can be enabled or disabled. The first
time delay of breaker flashover protection is used to filed suppression, and the second time delay
of breaker flashover protection is used to initiate breaker failure protection.
Due to that the voltage at generator terminal is lower than the voltage at HV side of main
transformer, if there is a circuit breaker equipped with generator terminal, maximum withstanding
voltage between two sides of the circuit breaker is small. Hence, breaker flashover protection for
the circuit breaker at generator terminal is not considered.
I0>[I_ROC_Flash_CB_HVS_Tr] &
[En_ROC_Flash_CB_HVS_Tr]
Ip>[I_OC_Flash_CB_HVS_Tr] & ≥1
[En_OC_Flash_CB_HVS_Tr]
I2>[I_NegOC_Flash_CB_HVS_Tr]
&
Flag_On_CB=0
U>Uset.fix
&
[En_AccEnerg_Gen] & t_Flash1_CB_HVS_Tr Op_Flash1_CB_HVS_Tr
[EBI_Flash_CB]
&
t_Flash2_CB_HVS_Tr Op_Flash2_CB_HVS_Tr
FD_FlashCBProt_Tr
Where:
Since frequency during startup and shutdown process is usually very low, algorithm independent
of frequency is used for this protection.
Whether the protection should be blocked or not by frequency element or auxiliary contact of
circuit breaker can be determined by logic setting.
F<[f_UF_StShut_Gen] t0
&
[Op_X_StShut_Gen]
[En_StShut_Gen]
&
[TrpLog_X_StShut_Gen].Bit0 &
[t_xx_StShut_Gen] Op_X_StShut_Gen
[EBI_StShut_Gen]
FD_StShut_Gen
Where:
―X‖ represent one of the three protective elements, ―TrDiff‖, ―GenDiff‖ and ―StaROV‖. Three
protection elements′ diagrams are so likely that they can be expressed in a figure instead of three
for them respectively.
Figure 3.25-1 shows logic diagram of definite-time excitation winding overload protection.
I>[I_Alm_OvLd_RotWdg] &
[t_Alm_OvLd_RotWdg] Alm_OvLd_RotWdg
[En_OvLd_Exc]
Figure 3.25-1 Logic diagram of definite time excitation winding overload protection
When current in excitation circuit reaches the low setting [Ib_InvOvLd_RotWdg], the heating
accumulation starts. When the heating accumulation reaches its setting, alarm will be issued. The
inverse time protection can simulate heating accumulation and radiation process.
Il
Ilh
Ilszd
t min tmax t
Figure 3.25-2 Operation characteristic of inverse-time excitation winding overload protection
Where:
[( I l I jzzd) 1] t KLzd
2
Where:
Figure 3.25-3 shows logic diagram of inverse time excitation winding overload protection.
I>[I_InvOvLd_RotWdg] &
IDMT &
[En_OvLd_Exc ]
tmin
[TrpLog_InvOvLd_RotWdg].Bit0 & &
Op_InvOvLd_RotWdg
[EBI_Bak_Exc]
FD_OvLd_RotWdg
I d K bl I r I cdqd ( I r nI e )
K bl K bl1 K blr ( I r / I e )
I d K bl 2 ( I r nI e ) b I cdqd ( I r nI e )
K ( K K ) /(2 n )
blr bl 2 bl 1
I1 I 2
I r
2
I I 1 I 2
d
For excitation transformer: I1 and I 2 are currents of HV side and LV side respectively.
The differential protection of exciter can adopt the two kinds of frequency: 50Hz and 100Hz
according the setting [fn_Exciter].
I>[I_OCn_Exc]
FD_Bak_Exc
Upp<[Vpp_UV_VCE_HVS_ST1] ≥1
&
U2>[V_NegOV_VCE_HVS_ST1] ≥1
Flg_VCE_HVS_ST1
Flg_VTS
&
[Opt_VTS_Ctrl_OC_HVS_ST1]
&
≥1
[En_Mem_Curr_HVS_ST1] &
Flg_OCn_HVS_ST1
Flg_VCE_HVS_ST1 ≥1
[En_VCE_Ctrl_OCn_HVS_ST1]
FD_Bak_HVS_ST1
Figure 3.27-1 Logic diagram of overcurrent protection of step-down transformer (HV side)
Where:
(n can be 1 or 2)
Only take step-down transformer 1 as an example, and logic scheme of step-down transformer 2
is the same.
Upp<[Vpp_UV_VCE_Br1_ST1] ≥1
&
U2>[V_NegOV_VCE_Br1_ST1] ≥1
Flg_VCE_Br1_ST1
Flg_VTS
&
[Opt_VTS_Ctrl_OC_Br1_ST1]
Flg_OCn_Br1_ST1 &
Flg_VCE_Br1_ST1 ≥1
[En_VCE_Ctrl_OC1_Br1_ST1]
FD_Bak_Br1_ST2
Figure 3.27-2 Logic diagram of overcurrent protection of step-down transformer (LV side)
Where:
(n can be 1 or 2)
Only take branch 1 at LV side of step-down transformer 1 as an example, and other logic schemes
are the same.
Blocking OLTC (on-load tap change) is also equipped with PCS-985B for step-down transformer.
[En_ROC_PD_HVS_Tr] ≥1 ≥1
&
[t_PD11_HVS_Tr] OP_PD11
[En_NegOC_PD_HVS_Tr]
&
I2>[I_NegOC_PD1_HVS_Tr]
[BI_PD_CB] &
[EBI_PD_CB]
&
[En_PD_CB] &
FD_PD_CB
[En_ExTrp_Ctrl_PD12_HVS_Tr] ≥1
[BI_ExtTrpCtrl]
≥1
Ip>[I_OC_PD1_HVS_Tr] &
[En_OC_PD12_HVS_Tr] ≥1 &
[t_PD12_HVS_Tr] OP_PD12
3I0>[I_ROC_PD1_HVS_Tr] &
[En_ROC_PD_HVS_Tr]
≥1
I2>[I_NegOC_PD1_HVS_Tr] &
[En_NegOC_PD_HVS_Tr]
[BI_PD_CB] &
&
[EBI_PD_CB]
[En_PD_CB] &
FD_PD_CB
The current auxiliary criterion can be phase overcurrent element or negative-sequence current
element.
[BI_52b_GCB]
[BI_ExtTrpCtrl]
I>[I_OC_BFP_GCB] &
≥1 &
[En_OC_BFP_GCB] & [t_BFP11_GCB] OP_BFP11_GCB
[En_NegOC_BFP_GCB]
[En_BFP_GCB]
&
[EBI_BFP_GCB]
FD_BFP_GCB
K TA
K ph Kb
K TA_max
K TA max
K b min( ,4)
K TA b
Where:
This method take the neutral point rated secondary current as the base of calculation and all other
sides will be considered as its multiples. The ratio of the maximum CT ratio to base CT ratio must
be less than 4. If ratio of the maximum CT ratio to base CT ratio is less than 4, the multiple of the
base rated current will be taken as 1, and other side will be calculated proportionally. Thus the
maximum setting range of current ration correction coefficient Kph of each side can be up to 4.
The currents used in the following analyze are based on the assumption that they have been
adjusted, that means the currents are the products of original current of each side and its own
adjustment coefficient (Kph).
I0d I0cdqd
I K I
0d 0bl 0r
Where:
For HV side of main transformer, there is only one branch I01 which is the sum of three-phase
currents derived from backup CT at HV side of main transformer, and other branches have no
definition.
When equation above is satisfied, the percentage REF will operate. Zero-sequence differential
currents on various sides except neutral point are gained from internal calculation, and the polarity
check of zero-sequence CT on various sides is not needed.
Warning!
Before restricted earth fault protection is put into operation on site, polarity of
zero-sequence current transformers (CT) on neutral point of the side must have been
checked right by an energizing test of the side of a transformer or a test of simulating an
external fault of the side in primary system.
This protection operates to trip all breakers at all sides of main transformer when any unrestrained
zero-sequence differential current is higher than its setting [I_InstREF_Tr]. Its operation criterion
is:
Where:
I0d
K0bl
I0cdqd
I0r
Ith
Where:
Ith will be automatically changed according to the pickup current [I_Pkp_PcntREF_Tr] and restrict
coefficient [Slope_PcntREF_Tr].
I0 β0 I1
Where:
I0 is the calculated zero-sequence current from the three-phase current of CT at HV side of main
transformer
β 0 is a proportional coefficient
Flg_REF_Tr
&
[EBI_REF_Tr] &
OP_REF_Tr
[En_EF_Tr]
Flg_CTsat
FD_REF_Tr
Where:
Flag_REF_Tr is the flag indicating whether or not the criterion of REF element is met.
Flag_CTsat is the internally generated flag indicating that CT is not in saturation condition.
Caution!
Before REF is put into service, CT polarity used for this element must be carefully checked
to ensure it is suited for the requirement of REF to avoid undesired tripping.
Where:
If this criterion is met, CT circuit failure alarm will be issued with a time delay of 10s. Once the
condition reverts normal condition, the alarm will be reset with a time delay of 10s.
In order to increase sensitivity of this alarm, percentage restraint differential current alarm criterion
is adopted as shown as below.
dI > di_bjzd
If the differential current reaches its threshold and reaches differential alarm level of percentage
restraint factor multiplied by restraint current, the differential current alarm will be issued.
Where:
dI is differential current
If an internal fault occurs, at least one of following four conditions will be present:
2. Any phase current of a certain side increases after fault detector operating
3. Maximum phase current is greater than 1.2Ie after fault detector operating
If none of above four conditions occurs within 40ms after differential protection′s fault detectors
picks up, the protection treats it as CT circuit failure. If the logic setting [Opt_CTS_Blk_PcntDiff_xx]
is set as ―1‖, the differential protection will be blocked and alarm will be issued. If this logic setting
is set as ―0‖, the differential protection will trip and alarm will be issued simultaneously.
If the alarm is issued, the signal can be removed only when the failure is removed and the device
is reset by manual.
Before the generator is connected to power grid, the blocking and alarm to CT circuit failure will be
disabled automatically.
1. Positive-sequence voltage is smaller than 18V and any phase current is greater than 0.04In
If any one condition occurs, VT circuit failure alarm will be issued with a time delay of 10s, and the
alarm will be removed automatically by delay 10s when the failure is removed.
|UAB-Uab| >5V
|UBC-Ubc| >5V
|UCA-Uca| >5V
Where:
UAB, UBC, UCA and U1 are phase-to-phase voltage and positive sequence voltage of VT group 1.
Uab, Ubc, Uca and U1′ are phase-to-phase voltage and positive sequence voltage of VT group 2.
If any condition mentioned above occurs, VT circuit failure alarm will be issued with delay 0.2s and
the VT group used will be switched.
When only a VT fails, it will not influence the function of related protection such as
loss-of-excitation, out-of-step, overvoltage, over-excitation, reverse power, frequency, impedance
protection and overcurrent protection.
If only one group of VT is provided at generator′s terminal, user can disable this function.
When the above criterions are met, corresponding alarm signal of VT circuit failure will be issued
with a time delay of 20s. The alarm signal will be removed automatically with a time delay of 20s
after the abnormality disappears.
For VT2 and other VTs, their percentage coefficient can be settable respectively and their failure
criterions are also enabled or disabled respectively.
Note!
4 Supervision
4.1 Overview
If hardware failure of the equipment itself is detected, protection functions of the equipment will be
blocked and equipment blocking alarm will be issued. Hardware failure includes those on RAM,
EPROM, settings, power supply, DSP and tripping coil.
When following abnormal status is detected, abnormal warning will be issued: AC voltage or
current circuit failure, persist pickup, mismatch state of pickup between CPU and DSP and alarm
of protection element.
The relay includes a number of self-monitoring functions to check the operation of its hardware
and software when it is in service. These are included so that if an error or fault occurs within the
relay‘s hardware or software, the relay is able to detect and report the problem and attempt to
resolve it by performing a re-boot. This involves the relay being out of service for a short period of
time that is indicated by the ―HEALTHY‖ LED on the faceplate of the relay being extinguished and
the watchdog contact at the rear operating. If the restart fails to resolve the problem, then the relay
will take itself permanently out of service. Again this will be indicated by the ―ALARM‖ LED and
watchdog contact. If a problem is detected by the self-monitoring functions, the relay attempts to
store a maintenance record in battery backed-up SRAM to allow the nature of the problem to be
notified to the user.
The self-monitoring is implemented in two stages: firstly a thorough diagnostic check which is
performed when the relay is booted-up, e.g. at power-on, and secondly a continuous self-checking
operation which checks the operation of the relay‘s critical functions whilst it is in service.
The self-testing which is carried out when the relay is started takes a few seconds to complete,
during which time the relay‘s protection is unavailable. This is signaled by the ―HEALTHY‖ LED on
the front of the relay which will illuminate when the relay has passed all of the tests and entered
operation. If the testing detects a problem, the relay will remain out of service until it is manually
restored to working order.
1. The integrity of the battery backed-up SRAM that is used to store event, fault and disturbance
records.
3. The correctness of the settings that ensures relay‘s proper response to fault.
5. The voltage level of the field voltage supply which is used to drive the opto-isolated inputs.
At the conclusion of the initialization software the supervisor task begins the process of starting the
platform software.
At the successful conclusion of all of these tests the relay is entered into service and the protection
started-up.
When the relay is in service, it continually checks the operation of the critical parts of its hardware
and software. The checking is carried out by the system services software and the results reported
to the platform software. The functions that are checked are as follows:
1. The flash containing all program code, setting values and language text is verified by a
checksum
2. The code and constant data held in SRAM is checked against the corresponding data in flash
to check for data corruption
3. The SRAM containing all data other than the code and constant data is verified with a
checksum
5. The integrity of the digital signal I/O data from the opto-isolated inputs and the relay contacts
is checked by the data acquisition function every time it is executed. The operation of the
analog data acquisition system is continuously checked by the acquisition function every time
it is executed, by means of sampling the reference voltages.
In the unlikely event that one of the checks detects an error within the relay‘s subsystems, the
platform software is notified and it will attempt to log a maintenance record in battery backed-up
SRAM. If the problem is of no importance (no possibility of leading to maloperation), the relay will
continue in operation. However, for problems detected in any important area the relay will initiate a
shutdown and re-boot. This will result in a period of up to 5s when the protection is unavailable, but
the complete restart of the relay including all initializations should clear most problems that could
occur. As described above, an integral part of the start-up procedure is a thorough diagnostic
self-check. If this detects the same problem that caused the relay to restart, i.e. the restart has not
cleared the problem, and then the relay will take itself permanently out of service. This is indicated
by the ―HEALTHY‖ LED on the front of the relay, which will extinguish, and the watchdog contact
that will operate.
If the alarm is issued, the alarm signal can be reset only when the failure is removed and the
equipment is reset by pressing ―RESET‖ button on panel or re-power it up.
3. Overload Alarm
On condition that the relay does not picks up, adding current in excess of the setting of
overload protection, alarm messages are displayed and ―ALARM‖ LED is lit after the timer
stage duration has elapsed.
Tripping output relay driving transistor is always monitored in normal program, and blocking
message will be issued when the equipment finds abnormality of the tripping output circuit.
All the alarm messages and relevant LED affections are listed in following table.
2 Alm_Settings_FDBrd ●
3 Alm_DSP_FDBrd ●
4 Alm_DSP_ProtBrd ●
5 Alm_InnerComm ●
6 Alm_PersistFD_ProtBrd ● ●
7 Alm_PersistFD_FDBrd ● ●
8 Alm_InconsistFD ● ●
9 Alm_Sample_DSP ●
10 Alm_BI ● ●
11 Alm_ROV_LVS_Tr ● ●
12 Alm_SwOv_VTS1_Gen ● ● ●
13 Alm_SwOv_VTS2_Gen ● ● ●
14 Alm_BlkV3rdHDiff_VTS1 ● ● ●
15 Alm_BlkIntTurn_VTS2 ● ● ●
16 Alm_VTS_HVS_Tr ● ● ●
17 Alm_VTS_Term_Gen ● ● ●
18 Alm_VTS_NP_Gen ● ● ●
19 Alm_DeltVTS1_Term_Gen ● ● ●
20 Alm_DeltVTS2_Term_Gen ● ● ●
21 Alm_Pos_GCB ● ●
22 Alm_Pos_CB_HVS1 ● ●
23 Alm_Pos_CB_HVS2 ● ●
24 Alm_VTS_LossExc_RotWdg ● ● ●
25 Alm_DPFC_IntTurn_Gen ● ●
26 Alm_Diff_GTU ● ●
27 Alm_Diff_Tr ● ●
28 Alm_REF_Tr ● ●
29 Alm_Diff_Gen ● ●
30 Alm_Diff_Exc ● ●
31 Alm_Diff_ST1 ● ●
32 Alm_Diff_ST2 ● ●
33 Alm_MR1 ● ●
34 Alm_MR2 ● ●
35 Alm_MR3 ● ●
36 Alm_MR4 ● ●
37 Alm_PwrLoss_MR ● ●
38 Alm_Inconsist_MR ● ●
39 Alm_BO_OC_Term_Gen ● ●
40 Alm_On_2PEF_RotWdg ● ●
41 Alm_Sens1PEF_RotWdg ● ●
42 Alm_1PEF_RotWdg ● ●
43 Alm_LossExc_Gen ● ●
44 Alm_OvExc_Gen ● ●
45 Alm_OvLd_Sta ● ●
46 Alm_NegOC_Gen ● ●
47 Alm_OvLd_RotWdg ● ●
48 Alm_ROV_Sta ● ●
49 Alm_V3rdHRatio_Sta ● ●
50 Alm_V3rdHDiff_Sta ● ●
51 Alm_UF1_Gen ● ●
52 Alm_UF2_Gen ● ●
53 Alm_UF3_Gen ● ●
54 Alm_OF1_Gen ● ●
55 Alm_OF2_Gen ● ●
56 Alm_RevP_Gen ● ●
57 Alm_OvLd_Tr ● ●
58 Alm_InitCool1_Tr ● ●
59 Alm_InitCool2_Tr ● ●
60 Alm_OvExc_Tr ● ●
61 Alm_Ext_OOS_Gen ● ●
62 Alm_Int_OOS_Gen ● ●
63 Alm_Accel_OOS_Gen ● ●
64 Alm_Decel_OOS_Gen ● ●
65 Alm_OvLd_ST1 ● ●
66 Alm_InitCool_ST1 ● ●
67 Alm_BO_OC_HVS_ST1 ● ●
68 Alm_OvLd_ST2 ● ●
69 Alm_InitCool_ST2 ● ●
70 Alm_BO_OC_HVS_ST2 ● ●
71 Alm_VTS_Br1_ST1 ● ● ●
72 Alm_VTS_Br2_ST1 ● ● ●
73 Alm_VTS_Br1_ST2 ● ● ●
74 Alm_VTS_Br2_ST2 ● ● ●
75 Alm_NeuVTS_TermVT1 ● ● ●
76 Alm_NeuVTS_TermVT2 ● ● ●
77 Alm_NeuVTS_HVS_Tr ● ● ●
78 Alm_CTS_Diff_GTU ● ● ●
79 Alm_CTS_Diff_Tr ● ● ●
80 Alm_CTS_Diff_Gen ● ● ●
81 Alm_CTS_Diff_Exc ● ● ●
82 Alm_CTS_Diff_ST1 ● ● ●
83 Alm_CTS_Diff_ST2 ● ● ●
84 Alm_CTS_HVS1_Tr ● ● ●
85 Alm_CTS_HVS2_Tr ● ● ●
86 Alm_CTS_LVS_Tr ● ● ●
87 Alm_CTS_HVS_Tr ● ● ●
88 Alm_CTS_HVS_ST1 ● ● ●
89 Alm_CTS_Br1_ST1 ● ● ●
90 Alm_CTS_Br2_ST1 ● ● ●
91 Alm_CTS_HVS_ST2 ● ● ●
92 Alm_CTS_Br1_ST2 ● ● ●
93 Alm_CTS_Br2_ST2 ● ● ●
94 Alm_CTS_Term_Gen ● ● ●
95 Alm_CTS_NP_Gen ● ● ●
96 Alm_CTS_Bak_Gen ● ● ●
97 Alm_TestMode ● ●
98 Alm_dU_Inject ● ●
99 Alm_VTS_RotWdg ● ● ●
100 Alm_PoleDisagr_CB ● ●
101 Alm_PwrLoss_Opto1 ● ●
102 Alm_PwrLoss_Opto2 ● ●
103 Alm_TrpOut_B11 ● ●
104 Alm_TrpOut_B12 ● ●
105 Alm_TrpOut_B13 ● ●
106 Alm_TrpOut_B14 ● ●
107 Alm_BoardConfig ●
108 Alm_Version ●
109 Settings_Chgd ●
110 Alm_Setting_OvRange ●
111 Alm_TimeSync ● ●
The meaning and handing suggestions of these alarm messages are listed as below.
108 Alm_Version Device version abnormality alarm. Check the software version.
No special treatment is
The relay is in the proceeding of
109 Settings_Chgd needed. Just wait the
setting parameters.
completion of the process.
Please re-configure setting
values according to the
range described in the
instruction manual, then
110 Alm_Setting_OvRange Setting values are out of range. reboot the equipment and
the alarm message will
disappear and the
equipment will restore to
normal operation state.
5.1 Metering
The relay produces a variety of both directly and calculated power system quantities. These
measurement values are updated on a per half second basis and can be viewed in the menu
―VALUES‖ of the relay or via relay communication.
This relay is able to measure and display the following quantities as summarized:
Here are ―VALUES‖ available in the relay for viewing of measurement quantities. All the
measurement quantities can be divided into CPU quantities or DSP quantities by their origin where
they are derived. These can also be viewed with PCSPC (see PCSPC User Manual).
Differential currents and related values in transformer metering in CPU and MON
U_VT1_Term Phase A, B and C of voltage derived from VT1 at the generator‘s terminal.
U1_VT1_Term Calculated positive sequence voltage of VT1.
U2_VT1_Term Calculated negative sequence voltage of VT1.
U0_VT1_Term Calculated zero sequence voltage of VT1.
U_VT2_Term Phase A, B and C of voltage derived from VT2 at the generator‘s terminal.
U1_VT2_Term Calculated positive sequence voltage of VT2.
U2_VT2_Term Calculated negative sequence voltage of VT2.
U0_VT2_Term Calculated zero sequence voltage of VT2.
Upp_VT1_Term Phase-to-phase voltage of VT1—Uab, Ubc, Uca.
Upp_VT2_Term Phase-to-phase voltage of VT2—Uab, Ubc, Uca.
Zero sequence voltage derived from open-delta side of VT1 at the generator‘s
U0_DeltVT1_Term
terminal.
U0_NP_Gen Zero sequence voltage derived from VT at the neutral point of generator.
U0_3rdH_VT1_Term Calculated 3rd harmonics of VT1 at the generator‘s terminal.
U0_3rdH_NP_Gen Calculated 3rd harmonics of VT at the neutral point of generator.
3rd harmonics differential voltage between the terminal and the neutral point of
Ud_3rdH_Sta
generator.
U0_Longl_Gen Longitude zero sequence voltage of generator.
U0_3rdH_Longl_Gen 3rd harmonics voltage in longitude zero voltage.
Phase angle between phase A and B, B and C, C and A of current derived from
φipp_CT_HVS_ST1
CT at HV side of step-down transformer1.
Phase angle between phase A and B, B and C, C and A of currents of Br1 side of
φipp_Br1_ST1
step-down transformer1.
Phase angle between phase A and B, B and C, C and A of currents of Br2 side of
φipp_Br2_ST1
step-down transformer1.
Phase angle between phase A and B, B and C, C and A of voltages of Br1 side of
φvpp_Br1_ST1
step-down transformer1.
Phase angle between phase A and B, B and C, C and A of voltages of Br2 side of
φvpp_Br2_ST1
step-down transformer1.
Phase angle between phase A and B, B and C, C and A of current derived from
φipp_CT_HVS_ST2
CT at HV side of step-down transformer2.
φipp_Br1_ST2 Phase angle between phase A and B, B and C, C and A of currents of Br1 side of
step-down transformer2.
Phase angle between phase A and B, B and C, C and A of currents of Br2 side of
φipp_Br2_ST2
step-down transformer2.
Phase angle between phase A and B, B and C, C and A of voltages of Br1 side of
φvpp_Br1_ST2
step-down transformer2.
Phase angle between phase A and B, B and C, C and A of voltages of Br2 side of
φvpp_Br2_ST2
step-down transformer2.
Phase angle between same-phase currents derived from CT at side 1 and side 2
φi_S1&S2_Exc
of excitation transformer or exciter.
Phase angle between phase A and B, B and C, C and A of currents derived from
φipp_S1_Exc
CT at side 1 of excitation transformer or exciter.
Phase angle between phase A and B, B and C, C and A of currents derived from
φipp_S2_Exc
CT at side 2 of excitation transformer or exciter.
5.2 Signaling
Signals here mean changes of binary inputs. All these signals can be displayed on LCD, locally
printed or sent to automation system of substation via communication channel.
BI_Pwr_MechRly Binary input indicating the status of power supply for mechanical protection
BI_Pwr_Opto Binary input indicating the status of power supply for optical isolators
BI_Print Binary input used to initiate printer
BI_Pulse_GPS Binary input of GPS clock synchronous pulse
BI_RstTarg Binary input of signal reset
5.3.1 Introduction
The PCS-985B is equipped with integral measurements, event, fault and disturbance recording
facilities suitable for analysis of complex system disturbances. The relay is flexible enough to allow
for the programming of these facilities to specific user application requirements and is discussed
below.
The real time clock within the relay provides the time tag to each event, to a resolution of 1ms. The
event records are available for viewing either via the front plate LCD or remotely, via the
communications ports (courier and MODBUS versions only).
Local viewing on the LCD is achieved in the menu column entitled ―REPORT‖. This column allows
viewing of event and fault records and is shown by setting sequence No. of the event or fault
report by user. Refer to section 8 for details of operation method.
Please see Section 5.2 for details about the binary input signals.
Please see Section 4.4 for details about the alarm signals.
All the protection element operation reports are listed as below. Please see Chapter 3 for details
about these operation reports.
The integral disturbance recorder has an area of memory specifically set aside for record storage.
The number of records that may be stored by the relay is dependent upon the selected recording
duration. The recorder of CPU board can typically store a minimum of 32 records, among them 8
records with instantaneous waveform. The record is composed of tripping element, faulty phase,
operation time and the waveform content is composed of differential currents, corrected current of
each side of generator or transformer, three-phase current of each side, zero sequence current of
each side (if available), three-phase voltages, zero sequence voltage of each side, negative
sequence voltage and tripping pulse.
The MON board can store up to 4 seconds (24 sampling points per cycle) or 8 seconds (12
sampling points per cycle) continual waveform, which including all channels analog quantities
(sampled data, differential currents and so on), all the binary input changing state, binary output,
pick up flags of fault detectors, alarm signals, operation signals and tripping signals. Disturbance
records continue to be recorded until the available memory is exhausted, at which time the oldest
It is not possible to view the disturbance records locally via the LCD; they must be extracted using
suitable software such as PCSPC.
The CPU board can also record latest 8 cycles of waveform in normal operation condition, which is
composed of three phases current, corrected current of each side for differential protection, three
phases voltage and zero sequence voltage of each side. This function can help user to check the
pole‘s correctness of secondary circuit by comparing the phase of related quantities shown in
wave figure.
6 Hardware
6.1 Overview
Output Relay
Binary Input
External
Protection
Conventional CT/VT A/D Calculation
DSP
ECVT
Fault
A/D Detector Pickup
DSP Relay
ECVT
ETHERNET
LCD +E
GPS
Power
Uaux LED CPU
Supply
RJ45
Keypad
PRINT
PCS-985 adopts 64-bit microchip processor CPU produced by FREESCALE as control core for
logic calculation and management function, meanwhile, adopts high-speed digital signal processor
DSP to be in charge of all the protection calculation. 24 points are sampled in every cycle and
parallel processing of sampled data can be realized in each sampling interval to ensure ultra-high
reliability and safety of protection equipment.
The working process of the device is as follows: firstly, the current and voltage is converted into
small voltage signal and sent to DSP module after being filtered and converted by AD for
protection calculation and fault detector respectively. When DSP module completes all the
protection calculation, the result will be sent to 64-bit CPU on MON module to be recorded.
Protection calculation DSP module carries out protection logic calculation, tripping output, and
MON module completes SOE (sequence of event) record, waveform recording, printing,
communication between protection and SAS and communication between HMI and CPU. The
work process of fault detector DSP module is similar to that of protection DSP module, and the
only difference is, when fault detector DSP module decides a fault detector picks up, only positive
power supply of output relay is switched on.
PCS-985 is comprised of intelligent modules, except that few particular modules‘ position cannot
be changed in the whole device (PWR module and DSP module), the others like AI (analog input)
module such as AC current, AC voltage and etc., and BI/BO module such as binary input, tripping
output, signal output, and etc can be flexibly configured according to the remained slot positions.
MON module provides functions like management function, completed event record, setting
management, and etc.
DSP modules are totally the same, to carry out filtering, sampling and protection calculation
and fault detector calculation respectively.
AI module converts AC current and voltage to low voltage signals with current transformers
and voltage transformers respectively.
BI module provides binary input, and the binary is inputted via 24V, 48V, 110V/125V, or
220V/250V opto-coupler (configurable).
BO signal module provides all kinds of signal output contact, including annunciation signal,
remote signal, fault and disturbance signal, operation abnormal signal and etc.
PWR module converts DC 250/220/125/110V into different DC voltage levels for various
modules of the equipment
HMI module is comprised of LCD, keypad, LED indicator and test serial ports, and it is
convenient for user to perform human-machine interaction with equipment.
Following figures show front and rear views of PCS-985 respectively. Programmable LED
indicators (No.8-No.20) can be defined by users trough PCS-PC software.
1
HEALTHY
11 PCS-985
2 12
ALARM
GENERATOR RELAY
3 13
TRIP
4 14
P
VT ALARM
GR
5 15
CT ALARM
6 16 ENT
STA EF ALARM
C
ES
7 17
ROT EF ALARM
8 18
9 19
10 20
Slot No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 00
NR1101E NR1151D NR1151D NR1502D NR1505A NR1533A NR1526A NR1526A NR1526A NR1526A NR1541C NR1541C NR1541C NR1541C NR1541D NR1301A
1 2 3 1 2 3
5V BJ
ETHER
NET
4 5 6 4 5 6
BJJ BSJ
ON
OFF
1 BO_COM1
2 BO_FAIL
3 BO_ALM
4 BO_COM2
5 BO_FAIL
6 BO_ALM
7 OPTO+
8 OPTO-
9
10 PWR+
11 PWR-
12 GND
Slot No. 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
The device consists of power supply module, MON module, DSP module, AI module, BI module,
tripping output module, signal output module, input and output signal for mechanical relay. The
definition and application of each module and its terminal is introduced as follows:
The +3.3V DC output provides power supply for the microchip processors, and the +5V DC output
provides power supply for all the electrical elements that need +5V DC power supply in this device.
The ±12V DC output provides power supply for A/D conversion circuits in this device, and the
+24V DC output provides power supply for the static relays of this device.
The use of an external miniature circuit breaker is recommended. The miniature circuit breaker
must be in the on position when the device is in operation and in the off position when the device is
in cold reserve.
A 12-pin connector is fixed on PWR module. The terminal definition of the connector is described
as below.
NR1301A
5V OK ALM
BO_ALM BO_FAIL
1 BO_COM1
2 BO_FAIL
3 BO_ALM
4 BO_COM2
5 BO_FAIL
6 BO_ALM
7 OPTO+
8 OPTO-
9
10 PWR+
11 PWR-
12 GND
01
BO_FAIL
02
BO_ALM
03
04
BO_FAIL
05
BO_ALM
06
Note!
The standard rated voltage of PWR module is self-adaptive to 88~300 Vdc. For
non-standard rated voltage power supply module please specify when place order, and
check if the rated voltage of power supply module is the same as the voltage of power
source before the device being put into service.
PWR module provides terminal 12 and grounding screw for device grounding. Terminal 12
shall be connected to grounding screw and then connected to the earth copper bar of
panel via dedicated grounding wire.
Effective grounding is the most important measure for a device to prevent EMI, so effective
grounding must be ensured before the device is put into service.
PCS-985, like almost all electronic relays, contains electrolytic capacitors. These
capacitors are well known to be subject to deterioration over time if voltage is not applied
periodically. Deterioration can be avoided by powering the relays up once a year.
MON module uses the internal bus to receive the data from other modules of the device. It
communicates with the LCD module by RS-485 bus. This module comprises 100BaseT Ethernet
interfaces, RS-485 communication interfaces, PPS/IRIG-B differential time synchronization
interface and RS-232 printing interface.
Modules with various combinations of memory and interface are available as shown in the table
below.
TX TX
ETHERNET ETHERNET ETHERNET
RX RX
TX TX
RX RX
ETHERNET ETHERNET
07 SGND
4 RJ45 Ethernet To SCADA
01 SYN+
02 SYN-
RS-485 To clock synchronization
03 SGND
NR1102D Twisted pair wire
04
05 RXD
RS-232 06 TXD To printer
07 SGND
2 RJ45 Ethernet To SCADA Twisted pair wire
2 FO Ethernet To SCADA Optical fibre SC
01 SYN+
02 SYN-
RS-485 To clock synchronization
NR1102H 03 SGND
04 Twisted pair wire
05 RXD
RS-232 06 TXD To printer
07 SGND
2 RJ45 Ethernet To SCADA Twisted pair wire
2 FO Ethernet To SCADA Optical fibre ST
01 SYN+
02 SYN-
RS-485 To clock synchronization
NR1102I 03 SGND
04 Twisted pair wire
05 RXD
RS-232 06 TXD To printer
07 SGND
2 RJ45 Ethernet To SCADA
01 485-1A
02 485-1B
RS-485 To SCADA
03 SGND
04
05 485-1A
06 485-1B
RS-485 To SCADA
07 SGND
NR1101E Twisted pair wire
08
09 SYN+
10 SYN-
RS-485 To clock synchronization
11 SGND
12
13 RXD
RS-232 14 TXD To printer
15 SGND
16 FGND To earth
The correct connection is shown in Figure 6.2-4. Generally, the shielded cable with two pairs of
twisted pairs inside shall be applied. One pair of the twisted pairs are respectively used to connect
the ―+‖ and ―–‖ terminals of difference signal. The other pair of twisted pairs are used to connect
the signal ground of the communication interface. The module reserves a free terminal for all the
communication ports. The free terminal has no connection with any signal of the device, and it is
used to connect the external shields of the cable when connecting multiple devices in series. The
external shield of the cable shall be grounded at one of the ends only.
485-1B 02
COM
cable with single point earthing
To the screen of other coaxial
SGND 03
04
Clock SYN
SYN- 02
SGND 03
04
PRINT
TXD 06
SGND 07
NR1151D
1 2 3
4 5 6
Four binary signals [BI_TimeSyn], [BI_Print], [BI_Pwr_Opto] and [BI_RstTarg] are fixed, they are
used to time synchronization, print, device maintenance and reset signal respectively. The power
supply for the device is independent with that of mechanical protection, and they are equipped
with the monitoring circuit of power supply.
Up to 3 BI modules can be equipped with the device. They are respectively NR1502D for LV
binary signal, NR1505A for HV and LV binary signal and NR1533A for binary signal of mechanical
protection. The terminal definition of BI module is described as below.
BI_Pwr_Opto BI13 14 13
OPT-
16 15
(24V)
EBI_AccEnerg_Gen BI15 18 17 BI14 EBI_FreqProt_Gen
30 29 BI26 EBI_PPF_Tr
Note!
Local Signal
Binary Input
Op_MR3 06 05 BI02 BI_MechRly2
Op_MR1 12 11 Op_MR1
Remote Signal
Op_MR2 14 13 Op_MR2
Trip
Op_MR3 16 15 Op_MR3
Op_MR4 18 17 Op_MR4
Com 20 19 Com
Op_MR1 22 21
Event Recorder
Op_MR2 24 23
Supply
Power
Op_MR4 28 27
Five BO modules are used to output alarm signals, trip signals and other abnormality signals. The
terminal definition of BO module is described as below.
NR1526A B07
02 01 BO_Alm_CTS
04 03 BO_Alm_VTS
06 05 BO_Alm_RevP
08 07 BO_Alm_OvExc
10 09 Com
12 11 BO_Alm_OvLd
Alarm Signal
14 13 BO_Alm_NegOC
16 15 BO_Alm_OvLd_RotWdg
18 17 BO_Alm_EF_Sta
20 19 Com
22 21 BO_EF_RotWdg
24 23 BO_Alm_LossExc
26 25 BO_Alm_OOS
28 27 BO_Alm_Freq
30 29 Com
NR1526A B08
02 01 Spare
04 03 BO_Diff_Exc
06 05 BO_Bak_Exc
08 07 BO_MechRly
Trip Signal
10 09 Com
12 11 BO_AccEnerg_Gen
14 13 BO_RevP_Gen
16 15 BO_SeqTrpRevP_Gen
18 17 BO_StShut_Gen
20 19 Com
22 21 BO_Diff_Tr
Trip Signal
24 23 BO_PPF_Tr
26 25 BO_EF_Tr
28 27 BO_EF_Gap_Tr
30 29 Com
NR1526A B09
02 01 BO_Diff_Gen
04 03 BO_EF_Sta
06 05 BO_IntTurn_Gen
08 07 BO_OvLd_Sta
10 09 Com
12 11 BO_VoltProt_Gen
14 13 BO_LossExc
Trip Signal
16 15 BO_OSS_Gen
18 17 BO_NegOC_Gen
20 19 Com
22 21 BO_EF_RotWdg
24 23 BO_OvExc_Gen
26 25 BO_FreqProt_Gen
28 27 BO_PPF_Gen
30 29 Com
NR1526A B10
02 01 BO_Flash_CB
04 03 BO_PD_CB
06 05 BO_BFP_GCB
08 07 BO_Diff_GTU
10 09 com
12 11 BO_Diff_ST1
14 13 BO_Bak_HVS_ST1
Trip Signal
16 15 BO_Bak_Br1_ST1
18 17 BO_Bak_Br1_ST2
20 19 com
22 21 BO_Diff_ST2
24 23 BO_Bak_HVS_ST2
26 25 BO_Bak_Br1_ST2
28 27 BO_Bak_Br2_ST2
30 29 com
NR1541D B15
02 01
RLY01 BO_OC_Term_Gen
04 03
06 05
RLY02 BO_BlkOLTC_ST1
08 07
10 09
RLY03 BO_BlkOLTC_ST2
12 11
RLY04 14 13
RLY05 16 15 BO_InitCool1_Tr
RLY06 18 17
RLY07 20 19
RLY08 22 21 BO_InitCool2_Tr
RLY09 24 23
RLY10 26 25 BO_InitCool_ST1
RLY11 28 27 BO_InitCool_ST2
RLY12 30 29 BO_1PEF_Gen
Note!
Above output signals can be extended via a 4U device consisted of extend module, and 4
signal contacts and trip contacts can be available at most.
The type of extend module is NR1535A, the number of extend module is determined by
the number of signal contact.
04 03 # BO_MechRly1-1
MR1
06 05 BO_MechRly1-2
08 07 BO_MechRly1-3
12 11 # BO_MechRly2-1
MR2
14 13 BO_MechRly2-2
16 15 BO_MechRly2-3
18 17 # BO_MechRly3-1
20 19 BO_MechRly3-2
MR3
22 21 BO_MechRly3-3
26 25 # BO_MechRly4-1
MR4
28 27 BO_MechRly4-2
30 29 BO_MechRly4-3
PCS-985B provides four trip binary output module. An the definition of all trip output signal can be
user-defined by auxiliary software. The trip output signal can be set to be broadened, and the time
is settable, default value is 140ms. The instantaneous drop-off contacts can be used to initiate
breaker failure protection. The terminal definition of BO module is described as below.
02 01 02 01
RLY01 RLY01
04 03 04 03
BO_TrpOutp1 BO_TrpOutp5
06 05 06 05
RLY02 RLY02
08 07 TJ1 08 07 TJ5
10 09 10 09
RLY03 RLY03
12 11 12 11
BO_TrpOutp2 BO_TrpOutp6
RLY04 14 13 RLY04 14 13
RLY07 20 19 RLY07 20 19
BO_TrpOutp3 BO_TrpOutp7
RLY08 22 21 RLY08 22 21
TJ3 TJ7
RLY09 24 23 RLY09 24 23
RLY10 26 25 RLY10 26 25
02 01 02 01
RLY01 BO_TrpOutp9 RLY01 BO_TrpOutp18
04 03 TJ9 04 03
TJ18
06 05 06 05
RLY02 BO_TrpOutp10 RLY02 BO_TrpOutp19
08 07 TJ10 08 07 TJ19
10 09 10 09
RLY03 BO_TrpOutp11 RLY03 BO_TrpOutp20
12 11 TJ11 12 11 TJ20
RLY04 14 13
BO_TrpOutp12
RLY04 14 13 BO_TrpOutp21
TJ21
RLY05 16 15 TJ12 RLY05 16 15 BO_TrpOutp22 TJ22
RLY06 18 17 BO_TrpOutp13 RLY06 18 17 BO_TrpOutp23
TJ13 TJ23
RLY07 20 19 BO_TrpOutp14 RLY07 20 19 BO_TrpOutp24
TJ14 TJ24
RLY08 22 21 BO_TrpOutp15
TJ15
RLY08 22 21 BO_TrpOutp25
TJ25
RLY09 24 23 BO_TrpOutp16 RLY09 24 23 BO_TrpOutp26
TJ16 TJ26
RLY10 26 25 RLY10 26 25 BO_TrpOutp27
TJ27
RLY11 28 27 BO_TrpOutp17 RLY11 28 27 BO_TrpOutp28 TJ28
Note!
The trip output contact can be latching shown as below. # means that this contact is a
magnetic-latching contact
# 02 01 # 02 01
RLY01 RLY01
# 04 03 # 04 03
BO_TrpOutp1 BO_TrpOutp5
# 06 05 # 06 05
RLY02 RLY02
# 08 07 # 08 07
# 10 09 # 10 09
RLY03 RLY03
# 12 11 # 12 11
BO_TrpOutp2 BO_TrpOutp6
# RLY04 14 13 # RLY04 14 13
# RLY05 16 15 # RLY05 16 15
# RLY06 18 17 # RLY06 18 17
# RLY07 20 19 # RLY07 20 19
BO_TrpOutp3 BO_TrpOutp7
# RLY08 22 21 # RLY08 22 21
# RLY09 24 23 # RLY09 24 23
# RLY10 26 25 # RLY10 26 25
# RLY12 30 29 # RLY12 30 29
# 02 01 02 01
RLY01 BO_TrpOutp9 RLY01 BO_TrpOutp18
# 04 03 04 03
# 06 05 06 05
RLY02 BO_TrpOutp10 RLY02 BO_TrpOutp19
# 08 07 08 07
# 10 09 10 09
RLY03 BO_TrpOutp11 RLY03 BO_TrpOutp20
# 12 11 12 11
A 13 14 A' A 13 14 B
Branch 2 VT of step-
Current
down transformer 1
channel B 15 16 B' B 15 16 C
15
C 17 18 C' A 17 18 B
Branch 1 VT of step-
down transformer 2
A 19 20 A' B 19 20 C
Current
channel B 21 22 B' A 21 22 B
Branch 2 VT of step-
16
down transformer 2
C 23 24 C' B 23 24 C
12I 4I8U
A 01 02 N Zero-sequence current 5 L 01 02 N
B 03 04 N Zero-sequence current 6 L 03 04 N
VT1 of generator terminal
C 05 06 N Zero-sequence current 7 L 05 06 N
A 09 10 N 09 10
B 11 12 N 11 12
VT2 of generator terminal
C 13 14 N 13 14
L 15 16 N 15 16
IR+ 01 IR+ 01
02 02
Spare input Spare input
IR- 03 IR- 03
04 04
UR2+ 05 UR2+ 05
Rotor voltage used Rotor voltage used
by loss-of-excitation 06 by loss-of-excitation 06
protection protection
UR2- 07 UR2- 07
08 08
09 09
UR1+ 10 UOUT 10
11 11
12 12
13 13
TEST 17 TEST 17
18 18
19 UIN+ 19
UR1- 20 20
21 UIN- 21
22 22
Note!
1. Terminal 01~06 on NR1401 in slot 28 can be applied for either of the following two
functions:
The 17th group three-phase current inputs. The 17th group three-phase current inputs
can be applied as the measurement CT inputs of reverse power protection.
2. Terminal 07~08 and 17~20 on NR1401 in slot 28 can be applied for either of the
following two functions:
Note!
For rotor earth-fault protection with voltage injection, NR1417 should be selected.
For rotor earth-fault protection with ping-pang type, NR1418 should be selected.
In NR1417, UR2+ should be connected to positive pole of rotor winding, and UR2- should
be connected to negative pole of rotor winding. UR2+ and UR2- are applied to acquire the
rotor voltage for loss-of-excitation protection.
TEST is applied for test (18kΩ is recommended for the resistance in the test).
UIN+ and UIN- are applied to connect to the external power supply (110VDC or 220VDC,
predetermined when ordering).
In NR1418, UR2+ should be connected to positive pole of rotor winding, and UR2- should
be connected to negative pole of rotor winding. UR2+ and UR2- are applied to acquire the
rotor voltage for loss-of-excitation protection.
UR1+ and UR1- are applied as the inputs of injected external resistor (13.6kΩ is
recommended). UR1+ and UR1- should be connected to the positive/negative pole of rotor
winding via the injected external resistor.
TEST is applied for test (18kΩ is recommended for the resistance in the test).
7 Settings
The device has some setting groups for protection to coordinate with the mode of power system
operation, one of which is assigned to be active.
000.000.000.000~
1 IP_LAN1 IP address of Ethernet port 1.
255.255.255.255
000.000.000.000~
2 Mask_LAN1 Subnet mask of Ethernet port1.
255.255.255.255
000.000.000.000~
3 IP_LAN2 IP address of Ethernet port 2.
255.255.255.255
000.000.000.000~
4 Mask_LAN2 Subnet mask of Ethernet port 2.
255.255.255.255
000.000.000.000~
7 Mask_LAN3 Subnet mask of Ethernet port 3.
255.255.255.255
000.000.000.000~
10 Mask_LAN4 Subnet mask of Ethernet port 4.
255.255.255.255
000.000.000.000~
12 Gateway Gateway of router
255.255.255.255
4800,9600,19200,
15 Baud_RS485A Baud rate of rear RS-485 serial port 1.
38400,57600,115200 bps
4800,9600,19200,
18 Baud_RS485B Baud rate of rear RS-485 serial port 2.
38400,57600,115200 bps
4800,9600,
23 Baud_Printer 19200,38400, 51600, Baud rate of printer port
115200 bps
0: disable
24 En_AutoPrint Enable/disable automatic printing function
1: enable
Conventional
SAS Select the mode of time synchronization of
25 Opt_TimeSyn
Advanced equipment.
NoTImeSyn
They are used for Ethernet communication based on the 103 protocol. When the IEC 61850
protocol is applied, the IP address of Ethernet A will be GOOSE source MAC address.
2. [En_Broadcast]
This setting is only used only for IEC 103 protocol. If NR network IEC103 protocol is used, the
setting must be set as ―1‖.
3. Addr_RS485A, Addr_RS485B
They are the device′s communication address used to communicate with the SCADA or RTU via
serial ports (port A and port B).
4. Baud_RS485A, Baud_RS485B
5. Protocol_RS485A, Protocol_RS485B
2: Modbus Protocol
Note!
Above table listed all the communication settings, the device delivered to the user maybe
only show some settings of them according to the communication interface configuration.
If only the Ethernet ports are applied, the settings about the serial ports (port A and port B)
are not listed in this submenu. And the settings about the Ethernet ports only listed in this
submenu according to the actual number of Ethernet ports.
The standard arrangement of the Ethernet port is two, at most four (predetermined when
ordering). Set the IP address according to actual arrangement of Ethernet numbers and
the un-useful port/ports need not be configured. If the PCS-PC configuration tool auxiliary
software is connected with this device through the Ethernet, the IP address of the PCS-PC
must be set as one of the available IP address of this device.
6. Format_Measmt
The setting is used to select the format of measurement data sent to SCADA through IEC103
protocol.
1: GDD data type through IEC103 protocol is 7, i.e. 754 shorth real number of IEEE standard.
7. Baud_Printer
8. En_AutoPrint
If automatic print is required for fault report after protection operating, it is set as ―1‖. Otherwise, it
9. En_FastPrint
It is set as ―0‖ for common printing with high definition, while it is set as ―1‖ for high-speed printing.
10. Opt_TimeSyn
There are four selectons for clock synchronization of device, each selection includs different time
clock synchronization signals shown in following table.
Item Description
PPS(RS-485): Pulse per second (PPS) via RS-485 differential level.
IRIG-B(RS-485): IRIG-B via RS-485 differential level.
Conventional
PPM(DIN): Pulse per minute (PPM) via the binary input [BI_TimeSyn].
PPS(DIN): Pulse per second (PPS) via the binary input [BI_TimeSyn].
SNTP(PTP): Unicast (point to point) SNTP mode via Ethernet network.
SAS SNTP(BC): Broadcast SNTP mode via Ethernet network.
Message (IEC103): Clock messages through IEC103 protocol.
IEEE1588: Clock message via IEEE1588.
Advanced IRIG-B(Fiber): IRIG-B via optical-fibre interface.
PPS(Fiber) PPS: Pulse per second (PPS) via optical-fibre interface.
When no time synchronization signal is connected to the equipment, please select
NoTimeSync
this option and the alarm message [Alm_TimeSync] will not be issued anymore.
―Conventional‖ mode and ―SAS‖ mode are always be supported by device, but ―Advanced‖ mdoe
is only supported when NET-DSP module is equipped. The alarm signal [Alm_TimeSyn] may be
issued to remind user loss of time synchronization signals.
1) When ―SAS‖ is selected, if there is no conventional clock synchronization signal, the device
will not send the alarm signal [Alm_TimeSyn]. When ―Conventional‖mode is slected, if there is
no conventional clock synchronization signal, ―SAS‖mode will be enabled automatically with
the alarm signal [Alm_TimeSyn] being issued simultaneously.
3) When ―NoTimeSyn‖ mode is selected, the device will not send alarm signals without
NOTE! The clock message via IEC103 protocol is invalid when the device receives the
If the IEC61850 protocol is adopted in substations, the time tags of communication messages are
required according to UTC (Universal Time Coordinated) time.
The setting [OffsetHour_UTC] is used to set the hour offset of the current time zone to the GMT
(Greenwich Mean Time) zone; for example, if a relay is applied in China, the time zone of China is
east 8th time zone, so this setting is set as ―8‖. The setting [OffsetMinute_UTC] is used to set the
minute offset of the current time zone to the GMT zone.
Time zone GMT zone East 1st East 2nd East 3rd East 4th East 5th
Setting 0 1 2 3 4 5
th th th th th
Time zone East 6 East 7 East 8 East 9 East 10 East 11th
Setting 6 7 8 9 10 11
th st nd rd th
Time zone East/West 12 West 1 West 2 West 3 West 4 West 5th
Setting -12/12 -1 -2 -3 -4 -5
th th th th th
Time zone West 6 West 7 West 8 West 9 West 10 West 11th
Setting -6 -7 -8 -9 -10 -11
1. [HDR_EncodeMode], [Opt_Caption_103]
Two logic settings to select encoding format of header file and caption language of IEC103
protocol.
Default value of [HDR_EncodeMode] is 1((i.e. UTF-8 code) and please set it to 0(i.e. GB18030)
according to the special requirement.
Default value of [Opt_Caption_103] is 1(i.e. Chinese), and please set it to 0(i.e. local language) if
the SAS is supplied by China Manufacturer.
2. Un_BinaryInput
This setting is used to set voltage level of binary input module. If low-voltage BI module is
equipped, 24V or 48V can be set according to the actual requirement, and if high-voltage BI
module is equipped, 110V or 220V can be set according to the actual requirement.
1. [Active_Grp]
The current protection setting group number, and total 30 group settings are provided. The device
settings, communication settings and system settings, are common for all protection groups.
Main Menu -> Settings -> System Settings -> Equip Settings
12 En_OvLd_Sta 0/1 1
13 En_NegOC_Gen 0/1 1
14 En_LossExc_Gen 0/1 1
15 En_OOS_Gen 0/1 1
16 En_VoltProt_Gen 0/1 1
17 En_OvExc_Gen 0/1 1
18 En_PwrProt_Gen 0/1 1
19 En_FreqProt_Gen 0/1 1
20 En_StShut_Gen 0/1 1
21 En_AccEnerg_Gen 0/1 1
22 En_BFP_GCB 0/1 1
23 En_Diff_ST1 0/1 1
24 En_Bak_HVS_ST1 0/1 1
25 En_Bak_Br1_ST1 0/1 1
26 En_Bak_Br2_ST1 0/1 1
27 En_Diff_ST2 0/1 1
28 En_Bak_HVS_ST2 0/1 1
29 En_Bak_Br1_ST2 0/1 1
30 En_Bak_Br2_ST2 0/1 1
31 En_Diff_Exc 0/1 0
32 En_Bak_Exc 0/1 1
33 En_OvLd_Exc 0/1 1
34 En_MechRly 0/1 1
35 En_PD_CB 0/1 0
36 En_VTComp_Term_Gen 0/1 0
37 En_NeuVTS_VT2 0/1 0
38 En_NeuVTS_OtherVT 0/1 0
39 En_TestMode 0/1 0
2. En_Diff_GTU
3. En_Diff_Tr
4. En_REF_Tr
This logic setting is used to enable/disable restricted earth-fault protection of main transformer.
5. En_PPF_Tr
This logic setting is used to enable/disable phase to phase fault protection of main transformer.
6. En_EF_Tr
This logic setting is used to enable/disable earth fault protection of main transformer.
7. En_OvExc_Tr
This logic setting is used to enable/disable over excitation protection of main transformer.
8. En_Diff_Gen
9. En_IntTurn_Gen
10. En_PPF_Gen
This logic setting is used to enable/disable phase to phase fault protection of generator
11. En_EF_Sta
This logic setting is used to enable/disable earth fault protection of stator of generator.
12. En_EF_RotWdg
This logic setting is used to enable/disable earth fault protection of rotor winding.
13. En_OvLd_Sta
14. En_NegOC_Gen
This logic setting is used to enable/disable negative sequence overcurrent protection of generator.
15. En_LossExc_Gen
16. En_OOS_Gen
17. En_VoltProt_Gen
This logic setting is used to enable/disable overvoltage and undervoltage protection of generator.
18. En_OvExc_Gen
19. En_PwrProt_Gen
This logic setting is used to enable/disable overpower and underpower protection of generator.
20. En_FreqProt_Gen
21. En_StShut_Gen
This logic setting is used to enable/disable all relative protections in Startup/shutdown conditions
of generator.
22. En_AccEnerg_Gen
This logic setting is used to enable/disable relevant protection in case of accident energization of
generator.
23. En_BFP_GCB
This logic setting is used to enable/disable generator terminal circuit breaker failure protection.
24. En_Diff_ST1
25. En_Bak_HVS_ST1
26. En_Bak_Br1_ST1
This logic setting is used to enable/disable backup protection at branch 1 of LV side of step-down
transformer1.
27. En_Bak_Br2_ST1
This logic setting is used to enable/disable backup protection at branch 2 of LV side of step-down
transformer1.
28. En_Diff_ST2
29. En_Bak_HVS_ST2
30. En_Bak_Br1_ST2
This logic setting is used to enable/disable backup protection at branch 1 of LV side of step-down
transformer2.
31. En_Bak_Br2_ST2
This logic setting is used to enable/disable backup protection at branch 2 of LV side of step-down
transformer2.
32. En_Diff_Exc
This logic setting is used to enable/disable differential protection of exciting transformer or exciter.
33. En_Bak_Exc
This logic setting is used to enable/disable backup protection of exciting transformer or exciter.
34. En_OvLd_Exc
This logic setting is used to enable/disable overload protection of exciting transformer or exciter.
35. En_MechRly
36. En_VTComp_Term_Gen
This logic setting is used to enable/disable voltage balance function of VTs at the generator
terminal.
37. En_NeuVTS_VT2
This logic setting is used to enable/disable neutral line failure supervision of VT2 (i.e. interturn fault
protection used VT).
38. En_NeuVTS_OtherVT
This logic setting is used to enable/disable neutral line failure supervision of other VT (except for
VT2).
39. En_TestMode
This logic setting is configured for equipment debugging status. If it is set as ―1‖, debugging
window can be open by PCS-PC software. Under debugging window, corresponding protection
tripping signals and alarm signals can be issued, corresponding tripping contacts can be
energized without actual happening of corresponding fault. If it is set as ―0‖, debugging window
can not be open.
1. Sn_Tr
2. U1n_HVS_Tr
System rated voltage at HV side of main transformer. This setting is used for calculating the rated
current of main transformer. It should be set according to the real operating voltage of the power
system.
3. U1n_LVS_Tr
4. U1n_VT_HVS_Tr
5. U2n_VT_HVS_Tr
6. U2n_DeltVT_HVS_Tr
7. I1n_CT_HVS_Tr
8. I2n_CT_HVS_Tr
9. I1n_CT_Bak_HVS_Tr
10. I2n_CT_Bak_HVS_Tr
11. I1n_CT_LVS_Tr
12. I2n_CT_LVS_Tr
13. I1n_CT#_HVS_ST1
14. I2n_CT#_HVS_ST1
15. I1n_CT#_HVS_ST2
16. I2n_CT#_HVS_ST2
17. I1n_CT_NP_Tr
18. I2n_CT_NP_Tr
19. I1n_CT_Gap_Tr
20. I2n_CT_Gap_Tr
21. Yd11_Conn_Tr
The connection mode of main transformer is Yd-11 mode. The current input for HV side is only
one.
22. Yyd11_Conn_Tr
The connection mode of main transformer is Yd-11 mode. The currents input for HV side are two
CTs, such as 3/2 breakers of HV bus.
23. Yd1_Conn_Tr
The connection mode of main transformer is Yd-1 mode. The current input for HV side is only one.
24. Yyd1_Conn_Tr
The connection mode of main transformer is Yd-1 mode. The currents input for HV side are two
CTs, such as 3/2 breakers of HV bus.
25. Opt_GCB
Logic setting of circuit breaker at terminal of generator. ―1‖ means there is a circuit breaker at
terminal of generator. ―0‖ means there isn‘t a circuit breaker at terminal of generator.
1. Pn_Gen
Capacity of active power of the generator shall be configured as its name plate stated.
2. PF_Gen
3. U1n_Gen
System rated voltage at the terminal of generator. This setting is used for calculating the rated
current of generator. It should be set according to the real operating voltage of the power system.
4. U1n_VT_Term_Gen
Rated primary voltage of VT at the terminal of generator. This parameter can be configured as
either phase voltage or phase-to-phase voltage value. For example, if the terminal VT ratio is
5. U2n_VT_Term_Gen
6. U2n_DeltVT_Term_Gen
7. U1n_VT_NP_Gen
8. U2n_VT_NP_Gen
9. I1n_CT_Term_Gen
10. I2n_CT_Term_Gen
11. I1n_CT_NP_Gen
12. I2n_CT_NP_Gen
13. I1n_CT_TrvDiff_Gen
14. I2n_CT_TrvDiff_Gen
15. U1n_Exc
16. k_U_RotWdg
Correction coefficient of voltage of rotor. For the occasion that partial rotor voltage is connected to
the device, rotor voltage need to be corrected by the setting. For example, if only one quarter of
rotor voltage is connected to the device, this setting should be set as ―4‖, if total rotor voltage is
connected to the device, this setting should be set as ―1‖.
17 Yyy12_Conn_ST1(2) 0/1 0
18 Ddd12_Conn_ST1(2) 0/1 0
19 Dyy11_Conn_ST1(2) 0/1 1
20 Ydd11_Conn_ST1(2) 0/1 0
21 Dyy1_Conn_ST1(2) 0/1 0
1. Sn_ST1(2)
2. U1n_HVS_ST1(2)
3. U1n_Br1_ST1(2) or U1n_Br2_ST1(2)
4. U1n_VT_Br1_ST1(2) or U1n_VT_Br2_ST1(2)
5. U2n_VT_Br1_ST1(2) or U2n_VT_Br2_ST1(2)
6. 1n_CT_HVS_ST1(2)
Rated primary current of CT1 with small ratio at HV side of step-down transformer.
7. I2n_CT_HVS_ST1(2)
Rated secondary current of CT1 with small ratio at HV side of step-down transformer.
8. I1n_CT_Br1_ST1(2) or I1n_CT_Br2_ST1(2)
9. I2n_CT_Br1_ST1(2) or I2n_CT_Br2_ST1(2)
10. I1n_CT_NP_Br_ST1(2)
11. I2n_CT_NP_Br_ST1(2)
12. Yyy12_Conn_ST
13. Ddd12_Conn_ST
14. Dyy11_Conn_ST
15. Ydd11_Conn_ST
16. Dyy1_Conn_ST
1. Sn_Exc
Capacity of the exciter or excitation transformer, it shall be configured as its name plate stated.
2. U1n_S1_Exc
System rated voltage on HV side of the excitation transformer. This setting is used to calculate the
correction coefficient of differential protection of excitation transformer.
If exciter is used, it shall be set as the rated voltage of exciter.
3. U1n_S2_Exc
System rated voltage on LV side of the excitation transformer. This setting is used to calculate the
correction coefficient of differential protection of excitation transformer.
If exciter is used, it shall be set as the rated voltage of exciter.
4. I1n_CT_S1_Exc
Primary rated current of the CT on HV side of the excitation transformer or CT at the terminal of
the exciter.
5. I2n_CT_S1_Exc
Secondary rated current of the CT on HV side of the excitation transformer or CT at the terminal of
the exciter.
6. I1n_CT_S2_Exc
Primary rated current of the CT on LV side of the excitation transformer or CT at the neutral point
of the exciter.
7. I2n_CT_S2_Exc
Secondary rated current of the CT on LV side of the excitation transformer or CT at the neutral
point of the exciter.
8. Opt_Exc
Exciter is used in the system. If this setting is set as ―1‖, that means exciter is used in the generator
system instead of excitation transformer. Otherwise means the contrary.
9. Yy12_Conn_ET
Note:
In the symbol of ―Yy-12‖, the first letter ―Y‖ represents the connection mode of windings on HV side,
and the other ―y‖ represents the connection mode of windings on LV side, ―12‖ represents
connection group between HV and LV windings. The following four settings are similar to this one.
10. Dd12_Conn_ET
11. Dy11_Conn_ET
12. Yd11_Conn_ET
13. Dy1_Conn_ET
1. Cfg_Polar_CT
Generally, CT polarity definition is shown as the below table. However if some CT polarity direction
is reversed by incorrect wiring connecting, there is still chance to correct it by configuring this logic
setting easily. Please set the corresponding digit of the logic setting. Bit.1-18 are corresponding to
18 three-phase current channels one by one. If any bit is set as ―0‖, the program will reverse the
current polarity of this channel before calculation.
18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Three-phase channel 18
Three-phase channel 17
Three-phase channel 16
Three-phase channel 15
Three-phase channel 14
Three-phase channel 13
Three-phase channel 12
Three-phase channel 10
Three-phase channel 11
Three-phase channel 9
Three-phase channel 8
Three-phase channel 7
Three-phase channel 6
Three-phase channel 5
Three-phase channel 4
Three-phase channel 3
Three-phase channel 2
Three-phase channel 1
No definition
2. Cfg_CT_HVS1_Tr
Configurable setting for deciding which channel is chosen to input three-phase current of HVS1
side of main transformer.
Following table gives all the choices that user can decide. Only one bit at most can be set as ―1‖
simultaneously.
18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Three-phase channel 18
Three-phase channel 17
Three-phase channel 16
Three-phase channel 15
Three-phase channel 14
Three-phase channel 13
Three-phase channel 12
Three-phase channel 10
Three-phase channel 11
Three-phase channel 9
Three-phase channel 8
Three-phase channel 7
Three-phase channel 6
Three-phase channel 5
Three-phase channel 4
Three-phase channel 3
Three-phase channel 2
Three-phase channel 1
No definition
3. Cfg_CT_HVS2_Tr
Configurable setting for deciding which channel is chosen to input three-phase current of HVS2
side of main transformer. The definition is the same to the above table.
4. Cfg_CT_HVS_Tr
Configurable setting for deciding which channel is chosen to input three-phase current of HVS
side of main transformer. This current is specially used for backup protection of main transformer.
The definition is the same to the above table except for the bit0. In this setting, if the bit0 is set as
―1‖, the protection will recognize this directly input current as the whole current of HVS side of main
transformer, otherwise, the protection will automatically add HVS1 and HVS2 side currents
mentioned aboved to be the whole current of HVS side and ignoring the current input from this
channel.
5. Cfg_CT_LVS_Tr ~ Cfg_CT_NP_Br2_ST2
Configurable setting for deciding which channel is chosen to input each current. The definition of
each bit is the same to that of [Cfg_CT_HVS1_Tr]. The actual meaning of each setting is given in
the following table.
6. Cfg_CT_Diff_GTU
Logic setting of selecting three-phase current channels for differential protection of generator
transformer unit. If any bit is set as ‖1‖, it means corresponding group is used in differential
protection of generator transformer unit.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CT#_HVS_ST
CT_HVS2_Tr
CT_HVS1_Tr
CT_HVS_ST
CT_NP_Gen
CT_LVS_ST
7. Cfg_CT_Diff_Tr
Logic setting of selecting three-phase current channels for differential protection of main
transformer. If the bit is set as ‖1‖, it means this group is used in the differential protection.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CT#_HVS_ST
CT_HVS2_Tr
CT_HVS1_Tr
CT_HVS_ST
CT_LVS_ST
CT_LVS_Tr
8. Cfg_CT_PwrProt_Gen
Logic setting of selecting three-phase current CT for reverse power protection of generator.
―0‖: CT of P level.
―1‖: CT of S level.
9. Opt_InputMode_VT_ST
0: phase-to-ground voltage
1: phase-to-phase voltage
10. Opt_3U0_Gen
Whether generator terminal zero sequence voltage is calculated zero sequence voltage.
11. Cfg_Ext_TrpOutp
Logic setting to configure which output relays will delay dropoff since corresponding tripping signal
dropoff. If any bit is set as ‖1‖, the corresponding output relay will delay dropoff since
corresponding tripping signal dropoff. DDO (delay dropoff) time is decided by [t_Ext_TrpOutp].
12. t_Ext_TrpOutp
DDO (delay dropoff) time of tripping output relays, its default value is 140ms.
13. kmax_V3rdHDiff_Sta
Differential current adjust coefficient for third harmonic differential current protection, 3.0 generally.
14. t_CurrMemory
15. K_NeuVTS_VT2
Ratio coefficient to judge whether neutral line failure of VT2 (interturn fault protection used VT)
happens, 0.4 generally.
16. K_NeuVTS_OtherVT
Ratio coefficient to judge whether neutral line failure of other VT (except for VT2) happens, 0.2
generally.
1. I_Pkp_PcntDiff_GTU
This is pickup setting of percentage current differential protection, which is also the setting of fault
detector of percentage differential protection. It shall be higher than maximum unbalance
differential current when the generator-transformer unit operate on normal rated load.
2. I_InstDiff_GTU
3. I_AlmDiff_GTU
Differential current alarm setting of generator-transformer unit. It shall be higher than normal
unbalance differential current and lower than [I_Pkp_PcntDiff_GTU].
4. Slope1_PcntDiff_GTU
5. Slope2_PcntDiff_GTU
6. k_Harm_PcntDiff_GTU
The ratio setting of 2nd harmonic component in differential current. 0.15 is recommended.
7. TrpLog_Diff_GTU
Tripping output logic setting of differential protection is used to specify which breaker or breakers
will be tripped by this protection. This word comprises 30 binary bits as follows and is displayed as
a hexadecimal number from 00000000H to 3FFFFFFFH on LCD of equipment. The tripping output
logic settings is specified as follows:
bit 29 … 12 11 10 9 8 7 6 5 4 3 2 1 0
rpOutput29
TrpOutp12
TrpOutp10
TrpOutp11
TrpOutp9
TrpOutp8
TrpOutp6
TrpOutp5
TrpOutp4
TrpOutp3
TrpOutp2
TrpOutp1
TrpOutp7
Function
En_Trp
……
Note:
―TrpOutp 1‖ just means to drive tripping output channel 1. Set bit0 as ―1‖ means this protection
element will trip breaker or breakers. The bit corresponding to the breaker to be tripped shall be
set as―1‖ and other bits shall be ―0‖. For example, if differential protection is defined to trip breaker
5 (tripping output channel 5), the bit0 and bit5 bit shall be set as ―1‖ and other bits ―0‖. Then a
hexadecimal number 00000021H is formed as the tripping output logic setting.
Please note that tripping output logic settings of the equipment have to be set on basis of
application-specific drawings.
All the tripping logic settings mentioned below is defined as same as this one.
8. En_InstDiff_GTU
Unrestrained instantaneous differential protection enabled. If this setting is set as ―1‖, it means this
protection is enabled. Otherwise it means the protection is disabled.
9. En_PcntDiff_GTU
10. Opt_Inrush_Ident_GTU
The logic setting to select the method to identify inrush current of transformer.
―1‖ means to use the second harmonic restraint principle. ―0‖ means to use waveform distortion
discrimination principle.
11. Opt_CTS_Blk_PcntDiff_GTU
If this logic setting is set as ―1‖, it means percentage differential protection will be blocked when CT
circuit failure happens. Otherwise it means the function is disabled.
Sn
I b1n Equation 7.6-1
3U b1n
Where:
U b1n is the rated phase-to-phase voltage at the calculated side of the transformer (i.e.
[U1n_HVS_Tr] or [U1n_LVS_Tr].)
I b1n
Ib2n Equation 7.6-2
nbLH
Where:
I b 2 nb
K ph Equation 7.6-3
I b2n
Where:
The currents used in the following analysis have been corrected, that means the currents are the
products of the original secondary current of each side multiplying its own correction coefficient
( K ph ).
By defining which particular connection group the protected transformer belongs to, the proper
calculation routine will be applied.
• The positive polarity of CT at HV and MV side is at busbar side and that at LV side is at branch
side or generator side.
•The secondary current phase shift compensation for all CTs are achieved by software, Y→Δ
transform method is used for this purpose. For connection Y/Δ-11, the correction equations are as
follows:
At side Y:
'
I A ( I A I B)/ 3
'
I B (I B I C ) / 3 Equation 7.6-4
'
I C ( I C I A) / 3
At side Δ:
'
I a I a
'
I b I b Equation 7.6-5
'
I c Ic
Where:
I A , I B , I C are the secondary currents of CT at side Y.
I ' A , I ' B , I ' C are the corrected current of each phase at side Y.
I a , I b , I c are the secondary currents of CT at side Δ.
I ' a , I ' b , I ' c are the corrected currents of each phase at side Δ;
For other connection type,the current can be calculated according to the equations listed above.
The connection type can be selected by some logic settings (refer to power system settings of
main transformer in Section 7.5.3).
Note:
If your actual transformer connection group is not included in above two groups, please let us
know before you make the order.
1. I_Pkp_PcntDiff_Tr
This is pickup setting of percentage current differential protection, which is also the setting of fault
detector of percentage differential protection. It shall be higher than maximum unbalanced current
of the transformer during normal rated load, i.e.
Where:
K er is the ratio error of CT (=0.032, for class 10P; =0.012, for class 5P and class TP);
U is the maximum deviation (in percentage of rated voltage) due to tap changing.
m is the error caused by the difference between ratios of CT at all side, 0.05 is recommended.
For practical engineering application, I cdqd =(0.2 - 0.5) I e is reasonable and unbalanced current
2. I_InstDiff_Tr
Setting of unrestrained instantaneous differential protection, which is used to clear serious internal
fault quickly and prevent operation delay caused by CT saturation. The setting I cdsd (i.e.
[I_InstDiff]) shall be greater than inrush current and maximum unbalanced current due to external
fault or asynchronous closing, generally
Where:
K is a multiple depending on capacity of transformer and the system reactance, 6 – 8 is
recommended.
according to the phase-to-phase solid short circuit fault in normal operation condition at installed
3. I_AlmDiff_Tr
Differential current alarm setting of main transformer. It shall be higher than normal unbalance
differential current and lower than [I_Pkp_PcntDiff_Tr].
4. Slope1_PcntDiff_Tr
Where:
The sensitivity coefficient K sen shall be calculated according to phase-to-phase short circuit on
outlet of transformer protected by the differential relay in minimum operation mode. From the
calculated minimum short circuit current I k . min and relevant restraint current I res , corresponding
pickup current I op will be found in the operation characteristic curve of percentage differential
5. Slope2_PcntDiff_Tr
Where:
I k . max is the maximum value of fundamental component of external short circuit fault current
(secondary).
K ap is the coefficient of DC component. K ap = 1.0 if CT at both sides are class TP, or K ap = 1.5 -
I unb. max K ap K cc K er I k . max U h I k .h. max U m. I k .m. max mI I k .I . max mII I k .II . max Equation 7.6-11
Where:
U h : maximum deviations (in percentage of rated voltage) on HV side due to tap changing.
U m : maximum deviations (in percentage of rated voltage) on MV side due to tap changing.
I k . max : is the maximum value of fundamental component of short circuit secondary current flowing
I k .h. max , I k .m. max : the maximum value of periodic component of short circuit secondary current
mI and mII are errors caused by difference between ratios of CT (auxiliary CT included if
any) at relevant sides.
Second slope of percentage differential protection is:
Where:
Definition of I unb. max* , I cdqd * and I k . max* are almost same to I unb. max , I cdqd and
I k . max mentioned above, and the only difference is they are per unit values. I e (secondary
k bl 2 =0.70 is recommended.
6. k_Harm_PcntDiff_Tr
Restraint coefficient of second harmonic. This parameter is the blocking threshold of second
harmonics involving in differential current to against inrush current when the transformer is
energized. The differential protection will be blocked when the percentage of second harmonics
reaches the threshold because the percentage of second harmonics is high in inrush current but
low in fault current. It is recommended that the parameter is set to be 15% -20%, 15% is
recommended.
7. TrpLog_DIff_Tr
Tripping output logic setting of differential protection is used to specify which breaker or breakers
will be tripped by this protection.
8. En_InstDiff_Tr
Unrestrained instantaneous differential protection is enabled or not. If this setting is set as ―1‖, it
means this protection is enabled. Otherwise, it means the protection is disabled.
9. En_PcntDiff_Tr
Percentage differential protection is enabled or not. If this setting is set as ―1‖, it means this
protection is enabled. Otherwise, it means the protection is disabled.
10. En_DPFC_Diff_Tr
DPFC percentage differential protection is enabled or not. If this setting is set as ―1‖, it means this
protection is enabled. Otherwise, it means the protection is disabled.
11. Opt_Inrush_Ident_Tr
12. Opt_CTS_Blk_PcntDiff_Tr
If this logic setting is set as ―1‖, it means percentage differential protection will be blocked when CT
circuit failure happens. Otherwise, it means the function is disabled.
Main Menu -> Settings -> TrProt Settings -> TrDiffProt Settings
7.6.3.2 Calculate the correction coefficient of each side of restricted earth-fault protection
K TA
K lph K lb
K TA _ max
Equation 7.6-13
K TA max
K lb
K TA min
Where:
KTA_ max is the maximum value of ratio of CT at each side of restricted earth-fault protection.
K TA _ min is the minimum value of ratio of CT at each side of restricted earth-fault protection.
The currents used in the following section have been corrected, that means the currents are the
products of the original zero sequence current of each side multiplying its own correction
coefficient ( K ph ). If K lb is bigger than 16, CT ratio will be judged unreasonable by the device.
1. I_Pkp_PcntREF_Tr
This is pickup setting of percentage restricted earth-fault protection of main transformer, which is
also the setting of fault detector of percentage restricted earth-fault protection. It shall be higher
than maximum unbalanced zero sequence current of the transformer during normal rated load, i.e.
Where:
K er is the ratio error of CT (=0.032, for class 10P; =0.012, for class 5P and class TP);
m is the error caused by the difference between ratios of CT at all side, 0.05 is recommended.
For practical engineering application, I cdqd =(0.3 - 0.5)I n is reasonable and unbalanced current
in zero sequence differential circuit during maximum load of transformer shall be measured. 0.3 I n
is recommended.
2. I_InstREF_Tr
3. I_Alm_REF_Tr
Zero sequence differential current alarm setting of main transformer. It shall be higher than normal
unbalance differential zero sequence current and lower than [I_Pkp_PcntREF_Tr].
4. Slope_REF_Tr
5. TrpLog_REF_Tr
Tripping output logic setting of restricted earth-fault protection of main transformer. It is used to
specify which breaker or breakers will be tripped by this protection.
6. En_InstREF_Tr
7. En_PcntREF_Tr
Percentage restricted earth-fault protection of main transformer is enabled or not. If this setting is
set as ―1‖, it means this protection is enabled. Otherwise, it means the protection is disabled.
Main Menu -> Settings -> TrProt Settings -> TrREFProt Settings
1. V_NegOV_VCE_Tr
This is setting of negative sequence voltage control element of main transformer. Setting and
displayed value of negative sequence voltage are U2.
Setting of this relay shall be higher than measured imbalance voltage during normal operation
condition, generally
Where:
U k .2. min
K sen Equation 7.6-16
U op.2
Where U k .2. min is minimum secondary negative sequence voltage at location of the relay during
phase-to-phase metallic short circuit fault at end of backup protected zone. K sen ≥2.0 is required
for near backup protection and K sen ≥1.5 for remote backup protection.
Note:
When sensitivity factor is checked for current relay and voltage relay, unfavorable normal system
operation condition and unfavorable type of short circuit fault shall be adopted. If sensitivity factor
of under voltage relay is not high enough, function of composite voltage on LV side initiation can
be enabled. Voltage is taken from LV side by configure logic setting [En_LVS.VCE_Ctrl_OC_Tr].
2. Vpp_UV_VCE_Tr
Voltage of voltage control element is taken from LV side usually (logic setting
[En_LVS.VCE_Ctrl_OC_Tr] is set as 1.). Undervoltage setting shall be higher than the lowest
voltage during starting process of the largest motor connected with the LV busbar.
Setting of phase-to-phase under voltage of composite voltage control element. It shall coordinate
with generator starting condition.
Setting shall be higher than possible minimum voltage during normal operation, namely
U min
U op Equation 7.6-17
K rel K r
Where K rel is reliability factor, 1.10 – 1.20; K r is release factor, 1.05 – 1.25; U min is possible
minimum voltage during normal operation, 0.9 times of secondary rated line voltage generally.
When VT on HV side of the transformer is used for the under voltage relay
When step-up transformer is used in a power plant and VT on generator side is used for under
voltage relay, its setting shall be higher than under voltage during operation of generator without
excitation,
U op
K sen Equation 7.6-20
U c. max
Where U c. max is maximum secondary residual voltage at location of the relay when
phase-to-phase metallic short circuit fault occurs at the check point during operation condition for
calculation. K sen ≥1.5 is required for near backup protection and K sen ≥1.2 for remote backup
protection.
3. I_OC1_Tr
K rel
I op Ie Equation 7.6-21
Kr
where K rel is reliability factor, 1.2 generally; K r is release factor, 0.85 – 0.95; I e is secondary
rated current.
Sensitivity factor of overcurrent relay shall be checked by following:
I k( .2min
)
K sen Equation 7.6-22
I op
( 2)
where I k . min is minimum fault current through location of the relay during phase-to-phase metallic
short circuit at end of backup protected section. K sen ≥ 1.3 is required for near backup protection
4. t_OC1_Tr
The time delay of stage 1 of overcurrent protection. It shall coordinate with main protection only
and oscillation period is not needed to be considered. It is set as 0.5 s generally.
5. TrpLog_OC1_Tr
Tripping output logic setting of the time delay of over current protection stage 1, please refer to
section 7.3.1.
6. I_OC2_Tr
7. t_OC2_Tr
8. TrpLog_OC2_Tr
Tripping output logic setting of the first time delay of over current protection stage 2, please refer to
section 7.3.1
9. Z1_Fwd_Tr
Where K rel is reliability factor, 0.8 generally; K inf is enhanced factor, taking minimum value of
Z op
K sen Equation 7.6-24
Z
Where Z is equivalent secondary impedance value of designated protected section. K sen ≥1.3
is required.
When this direction of impedance relay points to transformer.
The forward setting can be based on enough sensitivity for fault on terminal of generator and
referred to equation herein above. Reverse impedance equals to 5% - 10% of forward impedance.
Reverse setting shall be lower than setting of the shortest zone 1 of impedance protection of outlet
from this side busbar.
10. Z1_Rev_Tr
Stage 1 of negative direction impedance setting of distance protection. In general, this setting is
set as 5-10% of the positive direction impedance setting. Negative direction impedance setting
should be smaller than the impedance setting of stage 1 of impedance protection of the shortest
outline of local busbar.
11. t_Z1_Tr
12. TrpLog_Z1_Tr
13. Z2_Fwd_Tr
14. Z2_Rev_Tr
15. t_Z2_Tr
16. TrpLog_Z2_Tr
17. I_Alm_OvLd_Tr
18. t_Alm_OvLd_Tr
19. I_InitCool1_OvLd_Tr
20. t_InitCool1_OvLd_Tr
21. I_InitCool2_OvLd_Tr
22. t_InitCool2_OvLd_Tr
23. En_VCE_Ctrl_OC1_Tr
24. En_VCE_Ctrl_OC2_Tr
25. En_LVS.VCE_Ctrl_OC_Tr
26. En_Mem_Curr_Tr
Note:
For generator with self parallel excitation system, the memory function of transformer is usually
disabled for phase to phase backup protection. But if it is enabled, the overcurrent protection must
be configured as voltage controlled overcurrent protection.
27. Opt_VTS_Ctrl_OC_Tr
28. En_OvLd_Tr
29. En_InitCool1_OvLd_Tr
30. En_InitCool1_OvLd_Tr
Main Menu -> Settings -> TrProt Settings -> TrPPFBakProt Settings
1. V_ROV_VCE_Tr
Setting (3U0) of zero-sequence voltage control element for zero-sequence overcurrent protection.
2. I_ROC1_Tr
Where:
K brI is branch factor of zero sequence current which is ratio of zero sequence current passing
through the relay and passing through the faulty line during ground fault at end of protected zone
of stage 1 of power line zero sequence overcurrent protection, maximum value for various
operation conditions is taken;
3I k .o. min
K sen Equation 7.6-26
I op.o
Where:
3I k .o. min is minimum secondary zero sequence current passing through location of the relay
during ground fault at end of protected zone; I op.o is this setting. K sen ≥1.5 Is required.
3. t_ROC11_Tr
t t II t Equation 7.6-27
Where:
t is time delay [t_ROC11_Tr].
t II is time delay of zero-sequence overcurrent protection stage2 on remote end.
t is the step difference of delay.
4. TrpLog_ROC11_Tr
Tripping output logic setting of zero-sequence overcurrent protection stage 1 with time delay 1
5. t_ROC12_Tr
6. TrpLog_ROC12_Tr
Tripping output logic setting of zero-sequence overcurrent protection stage 1 with time delay 2
7. I_ROC2_Tr
Where:
K brII is branch factor of zero sequence current which is ratio of zero sequence current passing
through the relay and passing through the faulty line during ground fault at end of protected zone
of backup stage of power line zero sequence overcurrent protection, maximum value for various
operation conditions is taken;
I op.o.1II is current setting of backup stage of zero sequence overcurrent protection of coordinating
line.
8. t_ROC21_Tr
9. TrpLog_ROC21_Tr
Tripping output logic setting of zero-sequence overcurrent protection stage 2 with time delay 1.
10. t_ROC22_Tr
11. TrpLog_ROC22_Tr
Tripping output logic setting of zero-sequence overcurrent protection stage 2 with time delay 2
12. Ip_InvROC_Tr
13. Tp_InvROC_Tr
14. tmin_InvROC_Tr
15. Opt_InvROC_Tr
Logic setting for selecting operating characteristic curve of inverse-time overcurrent protection of
main transformer.
0: normal inverse-time characteristic
16. TrpLog_InvOC_Tr
17. V_ROV1_Gap_Tr
18. t_ROV11_Gap_Tr
19. TrpLog_ROV11_Gap_Tr
Tripping output logic setting of gap zero-sequence overvoltage protection with time delay 1
20. t_ROV12_Gap_Tr
21. TrpLog_ROV12_Gap_Tr
Tripping output logic setting of gap zero-sequence overvoltage protection with time delay 2
22. I_ROC1_Gap_Tr
23. t_ROC11_Gap_Tr
24. TrpLog_ROC11_Gap_Tr
Tripping output logic setting of gap zero-sequence overcurrent protection with time delay 1
25. t_ROC12_Gap_Tr
26. TrpLog_ROC12_Gap_Tr
Tripping output logic setting of gap zero-sequence overcurrent protection with time delay 2
27. V_Alm_ROV_LVS_Tr
28. t_Alm_ROV_LVS_Tr
29. En_VCE.ROV_Ctrl_ROC1_Tr
30. En_VCE.ROV_Ctrl_ROC2_Tr
31. En_Dir_Ctrl_ROC1_Tr
32. En_Dir_Ctrl_ROC2_Tr
33. En_Harm_Ctrl_ROC1_Tr
34. En_Harm_Ctrl_ROC2_Tr
35. En_Alm_ROV_LVS_Tr
Main Menu -> Settings -> TrProt Settings -> TrEFBakProt Settings
1. k_OvExc1_Tr
2. t_OvExc1_Tr
3. TrpLog_OvExc1_Tr
Tripping output logic setting of stage 1 of definite time over excitation protection of main
transformer. The function of this protection is used for islanding, excitation shutting or
programming, excitation reducing etc.
4. k_Alm_OvExc_Tr
Setting of over excitation alarm of main transformer. Setting of alarm shall be lower than that of
over excitation protection. 1.1 is recommended.
5. t_Alm_OvExc_Tr
6. k0_InvOvExc_Tr
7. t0_InvOvExc_Tr
Delay of upper limit of inverse time over excitation protection of main transformer.
8. k1_InvOvExc_Tr
Inverse time over excitation factor1—n1. Setting range of various inverse time over excitation
coefficient s is 1.1 – 2.0. However setting of upper limit of over excitation factor n0 shall be higher
than that of over excitation factor1 n1, which of factor1 n1 shall be higher than that of factor2 n2,
etc.. Finally, setting of over excitation factor6 n6 shall be higher than that of lower limit.
9. t1_InvOvExc_Tr
10. k2_InvOvExc_Tr
11. t2_InvOvExc_Tr
12. k3_InvOvExc_Tr
13. t3_InvOvExc_Tr
14. k4_InvOvExc_Tr
15. t4_InvOvExc_Tr
16. k5_InvOvExc_Tr
17. t5_InvOvExc_Tr
18. k6_InvOvExc_Tr
19. t6_InvOvExc_Tr
20. k7_InvOvExc_Tr
21. t7_InvOvExc_Tr
22. TrpLog_InvOvExc_Tr
Tripping output logic setting of inverse time over excitation protection of main transformer.
Main Menu -> Settings -> TrProt Settings -> TrOvExcProt Settings
Note:
The over excitation protection of generator-transformer unit comprises two over excitation
protection: generator over excitation protection and transformer over excitation protection.
Configuration of the generator over excitation protection shall be higher than over excitation
capability of generator, while that of transformer shall be higher than over excitation capability of
transformer. If only one set of over excitation protection is used, configuration of the lower one
shall be adopted.
1. I_Pkp_PcntDiff_Gen
This is pickup setting of percentage current differential protection, which is also the setting of fault
detector of percentage differential protection. It shall be higher than maximum unbalance current
when the generator operates on normal rated load, i.e.
I f 1n
I f 2n
n fLH
Where:
Pn / cos
I f 1n
3U f 1n
Where:
I unb.0 is the measured actual unbalance current during rated load of generator, 0.2 I f 2 n -0.3
Where:
2. I_InstDiff_Gen
3. I_AlmDiff_Gen
Differential current alarm setting of generator. It shall be higher than normal unbalance differential
current and lower than [I_Pkp_PcntDiff_Gen].
4. Slope1_PcntDiff_Gen
Where:
K cc
is the type factor of CT, takes 0.5;
K er
is error factor of CT ratio, takes 0.1.
K bl1
represents [Slope1_PcntDiff_Gen] which is set as 0.05~0.1 in general.
5. Slope2_PcntDiff_Gen
Where:
K ap
is non periodic component factor, usually no less than 2.0;
K er
is error factor of CT ratio, no more than 0.1;
I k . max
is periodic component of secondary value of external three phase short circuit current and it
can be taken as 4 times of rated current if it is less than 4 times of rated current.
Maximum slope of percentage differential protection is:
where:
If the percentage differential protection is configured based on rules mentioned above, when
phase-to-phase metallic short circuit fault occurs at the terminal of generator, sensitivity factor will
K sen
meet requirement ≥ 2 surely.
6. TrpLog_Diff_Gen
7. En_InstDiff_Gen
Unrestrained instantaneous differential protection enabled. If this setting is set as ―1‖, it means this
protection is enabled. Otherwise it means the protection is disabled.
8. En_PcntDiff_Gen
9. En_DPFC_Diff_Gen
10. Opt_CTS_Blk_PcntDiff_Gen
If this logic setting is set as ―1‖, it means percentage differential protection will be blocked when CT
circuit failure take place. Otherwise it means the blocking function is disabled.
Main Menu -> Settings -> GenProt Settings -> GenDiffProt Settings
1. I_SensTrvDiff_Gen
Where:
I f ln
is primary rated current of generator and
na
is ratio of zero sequence CT of transverse differential protection.
Phase current restraint factor is a fixed coefficient in the program.
2. I_InsensTrvDiff_Gen
Where:
I f ln
is primary rated current of generator and
na
is ratio of zero sequence CT of transverse differential protection.
3. t_TrvDiff_Gen
Delay of transverse differential protection (act on only after the occurrence of one-point ground of
rotor).
When one point earth fault occurs within rotor of generator and one point earth fault protection
operates, in order to prevent unwanted operation of transverse protection due to instantaneous
two points earth fault within the rotor, operation of this protection shall be delayed for 0.5 s – 1 s.
Note:
When a turn-to-turn fault occurs, the equipment will trip relevant breakers without delay according
to the tripping output logic setting, but a time delay decided by user will act on after occurrence of
one-point ground of rotor.
4. V_SensROV_Longl_Gen
At beginning of configuration, 2 – 3 V is preferred. After fault waveform analysis, the setting can be
reduced properly and sensitivity of the protection can be improved than.
Phase current restraint factor is a fixed coefficient in the program.
5. V_InsensROV_Longl_Gen
Setting of this protection shall be higher than maximum unbalance voltage during external fault,
usually:
U op 8 - 12 V Equation 7.6-36
6. t_ROV_Longl_Gen
Delay of longitudinal zero sequence overvoltage. Short delay 0.10 s – 0.20 s is recommended for
operation and output of this protection.
7. TrpLog_IntTurn_Gen
8. En_SensTrvDiff_Gen
9. En_InsensTrvDiff_Gen
10. En_SensROV_Longl_Gen
11. En_InsensROV_Longl_Gen
12. En_DPFC_IntTurn_Gen
Main Menu -> Settings -> GenProt Settings -> GenIntTurnProt Settings
1. V_NegOV_VCE_Gen
Negative sequence voltage setting of composite voltage control element. Setting and displayed
value of negative sequence voltage are U2.
Setting of negative sequence voltage relay shall be higher than unbalance voltage during normal
operation, generally
Sensitivity factor shall be checked by phase-to-phase short circuit fault on HV side bus of main
transformer:
U 2. min
K sen Equation 7.6-38
U op 2
Where:
U 2. min is minimum negative sequence voltage at location of the equipment during phase-to-phase
short circuit fault on HV side bus of main transformer. K sen ≥ 1.5 is required.
2. Vpp_UV_VCE_Gen
U gn
Where is rated phase-to-phase voltage of generator.
Sensitivity factor shall be checked by three-phase short circuit fault on HV side bus of main
transformer:
U op
K sen Equation 7.6-39
X t I k(3. max
)
Where
I k( 3. max
)
is maximum secondary fault current during three-phase short circuit on HV side bus
Xt X t Zt K sen
of main transformer; is reactance of main transformer, . ≥ 1.2 is required.
3. I_OC1_Gen
K rel
I op I gn Equation 7.6-40
Kr
Where:
K rel
is reliability factor, 1.3 – 1.5;
I gn
is secondary rated current of generator.
Sensitivity factor of overcurrent relay shall be checked by following:
I k( 2. min
)
K sen Equation 7.6-41
I op
Where
I k( 2. min
)
is minimum fault current through location of the relay during phase-to-phase
K sen
metallic short circuit on HV side of main transformer. ≥ 1.2 is required.
4. t_OC1_Gen
Time delay of overcurrent protection stage 1. Delay of this protection shall be higher than that of
operation of backup protection of step-up transformer. This protection is used for islanding and
generator shutting off.
5. TrpLog_OC1_Gen
6. I_OC2_Gen
Setting of overcurrent protection stage 2. Setting of overcurrent relay shall be higher than rated
current of transformer.
7. t_OC2_Gen
8. TrpLog_OC2_Gen
9. Z1_Fwd_Gen
Positive direction impedance setting of distance protection stage1. Here positive direction means
the direction is pointing to the transformer instead of generator itself.
If the value of this setting is greater than the next one, then the characteristic of distance protection
is set as excursive impedance circle; if it is equal to the next one, the characteristic is whole
impedance circle; if the next one is set as ―0‖, the characteristic becomes directional impedance.
Generally, low impedance protection is considered as the backup protection of generator in case
that voltage-controlled overcurrent protection can‘t satisfy the sensitivity requirement of generator.
10. Z1_Rev_Gen
Negative direction impedance setting of distance protection stage1. In general, this setting is set
as 5-10% of the positive direction impedance setting.
11. t_Z1_Gen
12. TrpLog_Z1_Gen
13. Z2_Fwd_Gen
14. Z2_Rev_Gen
15. t_Z2_Gen
16. TrpLog_Z2_Gen
Tripping output logic setting of distance protection stage1. Please refer to the tripping output logic
setting of differential protection of main transformer for details.
17. I_BO_OC_Term_Gen
18. t_BO_OC_Term_Gen
Time delay setting of overcurrent element for controlling function of a set of contact.
19. En_VCE_Ctrl_OC1_Gen
20. En_VCE_Ctrl_OC2_Gen
21. En_HVS.VCE_Ctrl_OC_Gen
Enable controlling function to overcurrent protection by Composite Voltage Element from HVS of
transformer.
22. Opt_VTS_Ctrl_OC_Gen
23. En_Mem_Curr_Gen
That the setting is set as ―1‖ indicates the excitation mode of generator is self shunt excitation
mode. In that case, the protection will remember the current value at the initiation of fault, and
operates based on it, no matter whether the current will decrease due to the descending excitation
voltage result from terminal voltage‘s getting down when external fault occurs. Once this setting is
set as ―1‖, the backup overcurrent protection of generator is always controlled by composite
voltage element.
24. En_BO_OC_Term_Gen
25. En_HVSCurr_Ctrl_OC1_Gen
Note:
In the above Table,current used in backup protection of generator comes from the backup current
input channel.
Main Menu -> Settings -> GenProt Settings -> GenPPFBakProt Settings
1. V_ROV_VCE_Tr
2. V_SensROV_Sta
U op U unb. max
Setting of this protection shall be higher than maximum unbalance voltage of single
phase VT at neutral point during normal operation.
capacitance between HV side and LV side of transformer when external earth fault occurs on the
HV side of the transformer. Meanwhile, settings, including time delay and operation setting, should
be considered to cooperate with that of earth fault protection of the system.
Note:
The zero sequence voltage used in this protection comes from VT at the neutral point of generator.
3. V_InsensROV_Sta
U gn
sequence voltage protection. If ratio of VT on neutral point is nTVN / 100V , this setting is
3
usually 20 V – 25 V.
Zero sequence voltage transferred by coupling capacitance per phase between HV and LV side
windings of step-up transformer shall be checked when external fault occurs at HV side of the
transformer. Coordination both on setting and delay between this protection and system earth fault
protection could be achieved then.
4. t_ROV_Sta
5. t_InsensROV_Sta
6. k_V3rdHRatio_PreSync_Sta
3 nTVN
and K rel during pre-configuration,
nTV 0
Where:
K rel
is reliability factor, 1.3 – 1.5 in general;
nTV 0
is ratio of open-delta zero sequence voltage at the terminal of generator;
n TVN
is ratio of zero sequence VT on neutral point.
U 3T / U 3N
During incorporation of generator to power system, the ratio changes considerably
owing to variation of equivalent capacitive reactance at generator terminal. So two different
settings are designed for protection before and after connection of generator with system, and
these two settings can be switched over with alternation of contacts‘ position of the terminal
breaker.
The setting shall be (1.3 – 1.5)× 1 before incorporation and (1.3 – 1.5)× 2 after that.
Where 1 and 2 are the maximum real-measured third harmonic voltage ratio before and
after incorporation respectively.
7. k_V3rdHRatio_PostSync_Sta
8. k_V3rdHDiff_Sta
Where:
kp
is vectorial automatic tracing regulation factor;
k zd
is restraint factor [3rdHarm Diff. Ratio], 0.3~0.5 is recommended.
9. t_V3rdH_Sta
Delay of percentage third harmonic voltage earth fault protection. It shall be longer than that of
backup protection against external fault .
10. TrpLog_EF_Sta
11. En_Alm_ROV_Sta
12. En_Trp_ROV_Sta
13. En_Alm_V3rdHRatio_Sta
14. En_Alm_V3rdHDiff_Sta
15. En_Trp_V3rdHRatio_Sta
16. En_Trp_InsensROV_Sta
17. En_Alm_DeltVTS1_Gen
18. En_Alm_VTS_NP_Gen
Main Menu -> Settings -> GenProt Settings -> StaEFProt Settings
1. R_Sens1PEF_RotWdg
General specification of generator specifies that insulation resistance of its excitation winding shall
be higher than 1 MΩ for air cooled and hydrogen-cooled turbine generator during cooling state,
and 2 kΩ for water cooled excitation winding. General specification of hydro-generator specifies
that insulation resistance of its excitation winding shall be higher than 0.5 MΩ in any case.
Sensitive stage of this protection is used for alarm. Its setting could be 20 kΩ – 80 kΩ generally.
2. R_1PEF_RotWdg
3. t_Alm_1PEF_RotWdg
4. t_Trp_1PEF_RotWdg
5. t_2PEF_RotWdg
6. t_Switch
For rotor earth fault protection with injection principle, it is switching cycle of square wave power.
For rotor earth fault protection with ping-pang principle, it is switching cycle of electronic switch.
7. R_Injected
8. Opt_EF_RotWdg
9. TrpLog_EF_RotWdg
10. En_Alm_Sens1PEF_RotWdg
Enable alarm function of sensitive stage of one-point earth fault protection of rotor.
11. En_Alm_1PEF_RotWdg
12. En_Trp_1PEF_RotWdg
13. En_2PEF_RotWdg
Main Menu -> Settings -> GenProt Settings -> RotWdgEFProt Settings
1. I_OvLd_Sta
I gn
I OP K rel Equation 7.6-45
Kr
Where:
K rel
is reliability factor, 1.05 generally;
I gn
is secondary rated current of generator.
Delay of this protection shall be longer than maximum delay of backup protection. Alarm will be
issued or load will be reduced when it operates.
2. t_OvLd_Sta
3. TrpLog_OvLd_Sta
4. I_Alm_OvLd_Sta
5. t_Alm_OvLd_Sta
6. I_InvOvLd_Sta
K tc
t Equation 7.6-46
I *2 K sr2
Where:
K tc
is heat capacity factor of stator winding;
K sr
is heat dissipation factor, 1.02 – 1.05 generally.
Minimum delay for upper limit of this protection shall coordinate with unrestraint protection.
Current setting of lower limit of this protection shall coordinate with definite time overload
protection mentioned above, namely
I gn
I OP. min K c 0 K rel Equation 7.6-47
Kr
KC 0
Where: is coordination factor, 1.05 in general.
7. tmin_InvOvLd_Sta
8. A_Therm_Sta
9. K_Disspt_Sta
10. TrpLog_InvOvLd_Sta
Main Menu -> Settings -> GenProt Settings -> StaOvLdProt Settings
1. I_NegOC_Gen
reliably, that threshold value is continuously permissive negative sequence current I 2 . So,
I 2 I gn
I OP K rel Equation 7.6-48
Kr
Where:
K rel
is reliability factor, 1.05;
I gn
is secondary rated current of generator.
2. t_NegOC_Gen
3. TrpLog_NegOC_Gen
4. I_Alm_NegOC_Gen
5. t_Alm_NegOC_Gen
6. I_InvNegOC_Gen
A
t Equation 7.6-49
I 22* I 22
Where:
A is permissive negative sequence current factor of rotor surface;
I 2* is per unit value of negative sequence current of generator;
Minimum delay for upper limit of this protection shall coordinate with unrestraint protection.
7. I_Neg_Perm_Gen
Permitted continuous currents of inverse time negative sequence overcurrent protection for lasting
operation.
Current setting of lower limit of this protection shall be the operating current corresponding to
delay 1000 s, namely
A
I OP. min I 22 Equation 7.6-50
1000
8. tmin_InvNegOC_Gen
Delay of upper limit of inverse negative sequence overcurrent protection. Minimum delay for upper
limit of this protection shall coordinate with unrestraint protection.
9. tmax_InvNegOC_Gen
10. A_Therm_Rotbody
11. TrpLog_InvNegOC_Gen
Tripping output logic setting of inverse time negative sequence overcurrent protection.
Main Menu -> Settings -> GenProt Settings -> GenNegOCProt Settings
1. X1_LossExc_Gen
R
Xa
Xb
Xa
For asynchronous impedance cycle, this setting represents for , and the next setting (NO.2) is
Xb
. Here
X d' U gn n a
2
Xa Equation 7.6-51
2 S gn nv
X d'
2
U gn na
X b ( X d ) Equation 7.6-52
2 S gn nv
Where:
'
Xd Xd
and are unsaturated per unit value of transient reactance and synchronous reactance of
generator,
U gn S gn
and are rated voltage and rated apparent power of generator;
na nv
and are CT ratio and VT ratio.
XC Xb
For steady state stability limit circle, this setting represents for , and the next setting is ,
here
2
U gn na
Xc Xs Equation 7.6-53
S gn nv
X d'
2
U gn na
X b ( X d ) Equation 7.6-54
2 S gn nv
Where:
Xs
is equivalent reactance on system side (including step-up transformer) connected with the
generator (per unit value, reference capacity is apparent power of the generator).
Asynchronous impedance circle and steady state stability limit circle can be selected by logic
setting [Opt_Z_LossExc_Gen].
For practical project, impedance between asynchronous impedance circle and steady state
stability limit circle can be selected for optimal combination of reliability and speed.
2. X2_LossExc_Gen
3. Q_RevQ_LossExc_Gen
Where:
K rel
is reliability factor, 1 - 1.3;
Q jx
is permissive incoming reactive power to the generator;
Pgn
is rated active power of the generator.
Reverse reactive power criterion can be selected by logic setting [En_RevQ_LossExc_Gen] .
4. V_RotUV_LossExc_Gen
Low voltage setting of rotor. There are two low voltages setting of rotor, they are
a) Excitation undervoltage criterion
Where:
U fd .op
is this setting.
K rel
is reliability factor, 0.60 – 0.80;
U fd 0
is rated excitation voltage of the generator without load.
b) Variable excitation voltage criterion
U fd 0
For a generator connecting with power system, there is a necessary excitation voltage for
keeping steady state stability.
Variable excitation voltage criterion is
P
U fd .op K xs U fd 0 Equation 7.6-57
Sn
Where:
K xs
is rotor voltage criterion coefficient.
Xd Xs
and are per unit value of synchronous reactance of generator and equivalent reactance of
system connecting with the generator (referred to rated capacity of the generator);
P is current active power of the generator;
U fd 0
is rated excitation voltage of generator without load;
5. Un_RotNoLoad_LossExc_Gen
6. k_RotUV_LossExc_Gen
7. V_TermUV_LossExc_Gen
Where:
K rel
is reliability factor, 0.85 – 0.90;
8. V_BusUV_LossExc_Gen
system without enough spare reactive power. Voltage on bus of system side is adopted for this
criterion.
Under voltage criterion for three phase simultaneously:
Where:
K rel
is reliability factor, 0.90 – 0.95;
U h. min
is minimum normal operation voltage of HV side of the system.
This criterion can also be configured as 0.90 – 0.95 times of terminal voltage of generator.
9. t_LossExc1_Gen
10. t_LossExc2_Gen
11. t_LossExc3_Gen
12. TrpLog_LossExc1_Gen
13. TrpLog_LossExc2_Gen
14. TrpLog_LossExc3_Gen
15. En_Z_LossExc1_Gen
16. En_RotUV_LossExc1_Gen
17. En_BusUV_LossExc1_Gen
18. En_TermUV_LossExc2_Gen
19. En_Z_LossExc2_Gen
20. En_RotUV_LossExc2_Gen
21. En_Z_LossExc3_Gen
22. En_RotUV_LossExc3_Gen
23. En_Alm_LossExc3_Gen
24. Opt_Z_LossExc_Gen
25. En_RevQ_LossExc_Gen
Note:
There must be one stage of loss-of-excitation protection, the criterion of busbar voltage is not
enabled and it will operate to reduce power output.
Main Menu -> Settings -> GenProt Settings -> LossExcProt Settings
Za
U
D
Zc 3
OL
IL
1 IR
OR
0
R
1
Zb
2
L R
1. Za_OOS_Gen
U gn S gn
and are rated voltage and rated apparent power of generator;
na nv
and are CT ratio and VT ratio.
2. Zb_OOS_Gen
3. Zc_OOS_Gen
Impedance setting C of out-of-step protection. Reactance line is the dividing line of oscillation
center. Refer to Figure 7.6-2, this setting can be set by means of the following formula. In practice,
0.9 times of transformer impedance is recommended.
2
U gn na
Z c 0.9 X c Equation 7.6-63
S gn nv
4. φ_Reach_OOS_Gen
5. φ_Inner_OOS_Gen
Internal angle of lens characteristic , 120° is recommended. The following formula is for
reference,
2Z r
180 2 arctan
Z a Zb
1
Zr RL. min Equation 7.6-64
1.3
RL. min
Where is minimum load impedance of generator.
6. n_Slip_Ext_OOS_Gen
Pole sliding number setting for external fault of generator. When the oscillation center situates
outside the protected section, times of pole sliding shall be set as 2 – 15 for alarm and more than
15 for tripping.
7. n_Slip_Int_OOS_Gen
Pole sliding number setting for internal fault of generator. When the oscillation center situates
within the protected section, time of pole sliding shall be set as 1-2 in general.
8. Ibrk_CB_HVS_Tr
9. TrpLog_OOS_Gen
10. En_Alm_Ext_OOS_Gen
11. En_Trp_Ext_OOS_Gen
12. En_Alm_Int_OOS_Gen
13. En_Trp_Int_OOS_Gen
Main Menu -> Settings -> GenProt Settings -> GenOOSProt Settings
1. V_OV1_Gen
Where:
U gn
is the secondary rated phase-to-phase voltage.
This is used for islanding and excitation shutting with delay 0.5 s.
For hydro-generator,
This is used for islanding and excitation shutting with delay 0.5 s.
For hydro-generator with SCR excitation,
This is used for islanding and excitation shutting with delay 0.3 s.
2. t_OV1_Gen
3. TrpLog_OV1_Gen
4. V_OV2_Gen
5. t_OV2_Gen
6. TrpLog_OV2_Gen
Main Menu -> Settings -> GenProt Settings -> GenVoltProt Settings
1. k_OvExc1_Gen
2. t_OvExc1_Gen
3. TrpLog_OvExc1_Gen
Tripping output logic setting of stage 1 of definite time over excitation protection. The function of
this protection is used for islanding, excitation shutting or programming, excitation reducing etc.
4. k_Alm_OvExc_Gen
Setting of over excitation alarm. Setting of alarm shall be lower than that of over excitation
protection. 1.1 is recommended.
5. t_Alm_OvExc_Gen
6. k0_InvOvExc_Gen
7. t0_InvOvExc_Gen
8. k1_InvOvExc_Gen
Inverse time over excitation factor1—n1. Setting range of various inverse time over excitation
coefficient s is 1.0 – 2.0. However setting of upper limit of over excitation factor n0 shall be higher
than that of over excitation factor1 n1, that of factor1 n1 shall be higher than that of factor2 n2, etc.
Finally, setting of over excitation factor6 n6 shall be higher than that of lower limit.
9. t1_InvOvExc_Gen
10. k2_InvOvExc_Gen
11. t2_InvOvExc_Gen
12. k3_InvOvExc_Gen
13. t3_InvOvExc_Gen
14. k4_InvOvExc_Gen
15. t4_InvOvExc_Gen
16. k5_InvOvExc_Gen
17. t5_InvOvExc_Gen
18. k6_InvOvExc_Gen
19. t6_InvOvExc_Gen
20. k7_InvOvExc_Gen
21. t7_InvOvExc_Gen
22. TrpLog_InvOvExc_Gen
Main Menu -> Settings -> GenProt Settings -> GenOvExcProt Settings
1. P_RevP_Gen
Where:
K rel
is reliability coefficient, 0.5 – 0.8 generally;
P1 is minimum loss of turbine during reverse power operation, 2% - 4% of rated power generally;
Pgn
is rated power of generator.
Pop
is set as 1% - 2% of rated active power generally, and 1% is recommended.
2. t_Alm_RevP_Gen
Delay of reverse power alarm. For reverse power protection without steam valve contact blocking,
delay 15 s for alarm.
3. t_Trp_RevP_Gen
Delay of reverse power protection. For reverse power protection without steam valve contact
blocking, according to permissive operation time of reverse power, delay 1 min – 3 min is set for
islanding in general.
For program reverse power protection with steam valve contact blocking, delay 0.5 s – 1.5 s is set
for islanding.
4. TrpLog_RevP_Gen
5. P_SeqTrpRevP_Gen
6. t_SeqTrpRevP_Gen
7. TrpLog_SeqTrpRevP_Gen
8. P_UP_Gen
Power setting of low power protection. 1%~2% of rated active power is recommended.
9. t_UP_Gen
10. TrpLog_UP_Gen
Main Menu -> Settings -> GenProt Settings -> GenPwrProt Settings
1. f_UF1_Gen
2. t_UF1_Gen
3. f_UF2_Gen
4. t_UF2_Gen
5. f_UF3_Gen
6. t_UF3_Gen
7. TrpLog_UF_Gen
8. f_OF1_Gen
9. t_OF1_Gen
10. f_OF2_Gen
11. t_OF2_Gen
12. TrpLog_OF_Gen
13. En_Alm_UF1_Gen
14. En_Trp_UF1_Gen
15. En_Alm_UF2_Gen
16. En_Trp_UF2_Gen
17. En_Alm_UF3_Gen
18. En_Trp_UF3_Gen
19. En_Alm_OF1_Gen
20. En_Trp_OF1_Gen
21. En_Alm_OF2_Gen
22. En_Trp_OF2_Gen
Main Menu -> Settings -> GenProt Settings -> GenFreqProt Settings
1. f_UF_StShut_Gen
Startup and shutdown protection is used for earth fault and phase-to-phase fault of stator during
low speed operation of the generator. Its algorithm is insensitive to variation of frequency.
This protection is auxiliary protection of generator during low frequency operation. Blocking setting
of this protection is 0.8 – 0.9 times of rated frequency.
2. I_GenDiff_StShut_Gen
Differential current setting for the differential protection of generator in startup and shutdown
condition. Setting of this protection shall be higher than unbalance differential current in full load
and rated frequency condition,
Where:
K rel
is reliability factor, 1.30 – 1.50 generally;
I unb
is the unbalance differential current in full load and rated frequency condition.
3. TrpLog_Diff_StShut_Gen
Tripping output logic setting of low frequency differential protection of generator in startup and
shutdown condition.
4. V_StaROV_StShut_Gen
Zero sequence voltage setting of stator earth fault protection in startup and shutdown condition.
For earth fault, zero sequence voltage derived from neutral point is adopted as criterion with
setting 10 V in general.
5. t_StaROV_StShut_Gen
Delay of stator earth fault protection in startup and shutdown condition. It should be not shorter
than delay of fundamental zero sequence voltage earth fault protection for stator.
6. TrpLog_StaROV_StShut_Gen
Tripping output logic setting of stator earth fault protection in startup and shutdown condition.
7. I_OC_StShut_Gen
Current setting of overcurrent protection in startup and shutdown condition. 1.1~1.3 times of rated
current is recommended.
8. t_OC_StShut_Gen
9. TrpLog_OC_StShut_Gen
Tripping output logic setting of overcurrent protection in startup and shutdown condition.
10. En_GenDiff_StShut_Gen
Enable differential current protective element of generator in startup and shutdown condition.
11. En_StaROV_StShut_Gen
Enable low frequency zero sequence voltage protective element of stator in startup and shutdown
condition.
12. En_GenCur_StShut_Gen
Main Menu -> Settings -> GenProt Settings -> StShutProt Settings
1. f_UF_AccEnerg_Gen
2. I_OC_AccEnerg_Gen
on minimum accidental closing current during this condition. The current used for this setting is
derived from the CT at the terminal of generator.
In general, this setting shall be in excess of 1.3 times of rated current of generator.
3. V_UV_AccEnerg_Gen
4. t_AccEnerg_Gen
5. TrpLog_AccEnerg_Gen
6. I_NegOC_Flash_CB_HVS_Tr
7. I_ROC_Flash_CB_HVS_Tr
8. I_OC_Flash_CB_HVS_Tr
9. t_Flash1_CB_HVS_Tr
10. TrpLog_Flash1_CB_HVS_Tr
Tripping output logic setting of breaker flashover protection with time delay 1.
If impulse current may be higher than capacity of circuit breaker during asynchronous closing, the
protection shall shut off the excitation firstly. If current passing through circuit breaker is lower than
permissive value, the protection can trip the circuit breaker on outlet.
Permissive tripping current of circuit breaker shall be configured as that provided by factory.
11. t_Flash2_CB_HVS_Tr
12. TrpLog_Flash2_CB_HVS_Tr
Tripping output logic setting of breaker flashover protection with time delay 2.
13. En_CB_Ctrl_AccEnerg_Gen
selected.
Main Menu -> Settings -> GenProt Settings -> AccEnergProt Settings
1. I_OC_BFP_GCB
Phase current setting of generator breaker failure protection. It should be larger than rated current
of generator.
K rel
I op I gn Equation 7.6-70
K r na
Where:
K rel
is reliability factor, takes 1.1~1.3;
I gn
is secondary rated current of generator.
na
is CT ratio
2. I_NegOC_BFP_GCB
Negative-sequence current setting of generator breaker failure protection. It should be larger than
maximum unbalance negative sequence current under normal operating condition.
I gn
I 2 op (0.1 ~ 0.2) Equation 7.6-71
na
3. t_BFP11_GCB
Time delay 1 of generator breaker failure protection. It should be long than tripping time of the
breaker, takes 0.3~0.5s.
4. TrpLog_BFP11_GCB
Tripping output logic setting of generator breaker failure protection with time delay 1.
5. t_BFP12_GCB
6. TrpLog_BFP12_GCB
Tripping output logic setting of generator breaker failure protection with time delay 2.
7. En_NegOC_BFP_GCB
Enable generator breaker failure protection being blocked by negative-sequence current element.
8. En_OC_BFP_GCB
Enable generator breaker failure protection being blocked by phase current element.
Main Menu -> Settings -> GenProt Settings -> AccEnergProt Settings
1. I_Pkp_PcntDiff_ST1(2)
2. I_InstDiff_ST1(2)
3. I_AlmDiff_ST1(2)
Differential current alarm setting of step-down transformer. It shall be higher than normal
unbalance differential current and lower than [I_Pkp_PcntDiff_ST1(2)].
4. Slope1_PcntDiff_ST1(2)
5. Slope2_PcntDiff_ST1(2)
6. k_Harm_PcntDiff_ST1(2)
7. TrpLog_Diff_ST1(2)
8. En_InstDiff_ST1(2)
9. En_PcntDiff_ST1(2)
10. Opt_Inrush_Ident_ST1(2)
11. Opt_CTS_Blk_PcntDiff_ST1(2)
Main Menu -> Settings -> ST1Prot Settings -> ST1DiffProt Settings
Main Menu -> Settings -> ST2Prot Settings -> ST2DiffProt Settings
1. V_NegOV_VCE_HVS_ST1(2)
Negative sequence voltage setting of composite voltage control element at HVS of step-down
transformer. It should be larger than the unbalance negative sequence voltage under normal
condition. Unbalance negative sequence voltage can be get by actual measurement. Generally,
Where:
U k .2. min
K sen Equation 7.6-73
U op.2
Where:
U k .2. min is minimum negative sequence voltage at location of the equipment during
phase-to-phase metallic short circuit fault at end of backup protected zone. K sen ≥2.0 is required
for near backup protection and K sen ≥1.5 for remote backup protection.
2. Vpp_UV_VCE_HVS_ST1(2)
0.65 U n
U op Equation 7.6-74
K rel K r
Where:
K rel
is reliability factor, takes 1.1~1.2;
Where U c . max is maximum phase-to-phase voltage at location of the equipment during three
phases metallic short circuit fault at end of backup protected zone. K sen ≥1.5 is required for near
3. I_OC1_HVS_ST1(2)
K rel
I op Ie Equation 7.6-76
Kr
Where:
K rel
is reliability factor, takes 1.3;
I k( .2min
)
K sen Equation 7.6-77
I op
( 2)
where I k . min is minimum fault current through location of the relay during phase-to-phase metallic
4. t_OC1_HVS_ST1(2)
5. TrpLog_OC1_HVS_ST1(2)
6. I_OC2_HVS_ST1(2)
7. t_OC2_HVS_ST1(2)
8. TrpLog_OC2_HVS_ST1(2)
9. I_Alm_OvLd_HVS_ST1(2)
10. t_Alm_OvLd_HVS_ST1(2)
11. I_InitCool_OvLd_HVS_ST1(2)
12. t_InitCool_OvLd_HVS_ST1(2)
13. I_BlkOLTC_OvLd_ST1(2)
Current setting of overload element of HV side of stepdown transformer for blocking OLTC
(on-load tap changing).
14. t_BlkOLTC_OvLd_ST1(2)
Time delay of overload element of HV side of stepdown transformer for blocking OLTC (on-load
tap changing).
15. En_VCE_Ctrl_OC1_HVS_ST1(2)
16. En_VCE_Ctrl_OC2_HVS_ST1(2)
17. En_Mem_Curr_HVS_ST1(2)
18. Opt_VTS_Ctrl_OC_HVS_ST1(2)
19. En_Alm_OvLd_HVS_ST1(2)
20. En_InitCool_OvLd_HVS_ST1(2)
21. En_BlkOLTC_OvLd_ST1(2)
Enable overload element of HV side of stepdown transformer to block OLTC (on-load tap
changing). If it is set as ―1‖, RCS-985A will output contact to block regulating voltage of stepdown
transformer with load with the time delay of [t_BlkOLTC_Ovld_ST1(2)] when the current is greater
than the setting [I_BlkOLTC_Ovld_ST1(2)].
22. Opt_Cur_OC1_HVS_ST1(2)
Main Menu -> Settings -> ST1Prot Settings -> ST1HVSBakProt Settings
Main Menu -> Settings -> ST2Prot Settings -> ST2HVSBakProt Settings
1. V_NegOV_VCE_Br1(2)_ST1(2)
Negative sequence voltage setting of composite voltage control element of branch 1 or branch 2 of
step-down transformer.
2. Vpp_UV_VCE_Br1(2)_ST1(2)
3. I_OC1_Br1(2)_ST1(2)
4. t_OC1_Br1(2)_ST1(2)
5. TrpLog_OC1_Br1(2)_ST1(2)
6. I_OC2_Br1(2)_ST1(2)
7. t_OC2_Br1(2)_ST1(2)
8. TrpLog_OC2_Br1(2)_ST1(2)
9. I_ROC1_Br1(2)_ST1(2)
10. t_ROC1_Br1(2)_ST1(2)
11. TrpLog_ROC1_Br1(2)_ST1(2)
Tripping output logic setting of definite time zero sequence overcurrent protection stage1.
12. I_ROC2_Br1(2)_ST1(2)
13. t_ROC2_Br1(2)_ST1(2)
14. TrpLog_ROC2_Br1(2)_ST1(2)
Tripping output logic setting of definite time zero sequence overcurrent protection stage2.
15. En_VCE_Ctrl_OC1_Br1(2)_ST1(2)
16. En_VCE_Ctrl_OC2_Br1(2)_ST1(2)
17. Opt_VTS_Ctrl_OC_Br1(2)_ST1(2)
Main Menu -> Settings -> ST1Prot Settings -> ST1Br1Prot Settings
Main Menu -> Settings -> ST2Prot Settings -> ST2Br1Prot Settings
Main Menu -> Settings -> ST1Prot Settings -> ST1Br2Prot Settings
Main Menu -> Settings -> ST2Prot Settings -> ST2Br2Prot Settings
1. I_Pkp_PcntDiff_Exc
2. I_InstDiff_Exc
3. I_AlmDiff_Exc
Differential current alarm setting of excitation transformer or exciter. It shall be higher than normal
unbalance differential current and lower than [I_Pkp_PcntDiff_Exc].
4. Slope1_PcntDiff_Exc
5. Slope2_PcntDiff_Exc
6. k_Harm_PcntDiff_Exc
7. TrpLog_Diff_Exc
8. En_InstDiff_Exc
9. En_PcntDiff_Exc
10. Opt_Inrush_Ident_Exc
11. Opt_CTS_Blk_PcntDiff_Exc
Main Menu -> Settings -> ExcProt Settings -> ExcDiffProt Settings
1. I_OC1_Exc
2. t_OC1_Exc
3. TrpLog_OC1_Exc
4. I_OC2_Exc
5. t_OC2_Exc
6. TrpLog_OC2_Exc
7. Opt_CT_OC_Exc
Main Menu -> Settings -> ExcProt Settings -> ExcBakProt Settings
Note:
The current used in the overcurrent protection is derived from the CT at the HV side of excitation
transformer or the CT at the neutral point of exciter.
1. I_Alm_OvLd_RotWdg
It should make inverse time overload protection dropoff reliably under normal rated excitation
current. If the protection is configured at AC side, the current setting will be (rated excitation
current I fd should be converted into RMS value of AC side, if bridge-type uncontrollable rectifier
I grn
I op K rel Equation 7.6-78
Kr
Where:
K rel
is reliability factor, takes 1.05;
2. t_Alm_OvLd_RotWdg
Delay of overload alarm. It should be larger than the maximum delay of backup protection.
3. I_InvOvLd_RotWdg
Pickup current of inverse time overload protection. It should coordinate with definite time overload
protection.
I grn
I OP. min K c 0 K rel
Kr
Where:
4. tmin_InvOvLd_RotWdg
Delay of upper limit of inverse time overload protection. It is convenient for coordinating with fast
protection.
5. A_Therm_RotWdg
6. Ib_InvOvLd_RotWdg
7. TrpLog_InvOvLd_RotWdg
8. Opt_CT_OvLd_RotWdg
Main Menu -> Settings -> ExcProt Settings -> RotWdgOvLdProt Settings
1. t_MR1
2. TrpLog_MR1
3. t_MR2
4. TrpLog_MR2
5. t_MR3
6. TrpLog_MR3
7. t_MR4
8. TrpLog_MR4
Main Menu -> Settings -> MiscProt Settings -> MechRlyProt Settings
Table 7.6-29 List of pole disagreement protection settings of HVS of main transformer
1. I_OC_PD1_HVS_Tr
I K . min 1
I op Equation 7.6-79
K sen nTA
Where:
I op is the setting [I_OC_PD1_HVS_Tr], set it larger than transformer rated secondary current as
I K . min the minimum fault current flow through the protection for following three occasions (for
step-up transformer)
Phase-to-phase fault at LVS of transformer;
A fault at the end of line for generator-transformer-line unit (including expansion unit);
A fault at the end of line for one and a half breakers connection.
2. I_NegOC_PD1_HVS_Tr
Negative sequence current setting should be larger than the maximum unbalance negative
sequence current under normal condition.
K rel 8% I N
I 2.op Equation 7.6-80
Kr nTA
Where:
K rel
is reliability factor, takes 1.2;
I 2.op 0.1~0.15
IN
nTA
3. I_ROC_PD1_HVS_Tr
Zero sequence current setting should be larger than the maximum unbalance zero sequence
current under normal condition, generally,
3I 0.op 0.1~0.15
IN
Equation 7.6-81
nTA
4. t_PD11_HVS_Tr
Time delay 1 of pole disagreement protection of HVS of main transformer. It should be larger than
maximum inconsistent time of three phase interrupters when breaker is in the process of being
closed, 0.3s generally.
5. TrpLog_PD11_HVS_Tr
Tripping output logic setting of pole disagreement protection of HVS of main transformer with time
delay 1.
6. t_PD12_HVS_Tr
7. TrpLog_PD12_HVS_Tr
Tripping output logic setting of pole disagreement protection of HVS of main transformer with time
delay 2.
8. En_NegOC_PD_HVS_Tr
Enable pole disagreement protection of HVS of main transformer being controlled by negative
9. En_ROC_PD_HVS_Tr
Enable pole disagreement protection of HVS of main transformer being controlled by zero
sequence current element.
10. En_ExTrp_Ctrl_PD12_HVS_Tr
Enable pole disagreement protection of HVS of main transformer with time delay 2 being blocked
by tripping contact of other protection device.
11. En_OC_PD12_HVS_Tr
Enable pole disagreement protection of HVS of main transformer with time delay 2 being
controlled by phase current element.
Main Menu -> Settings -> MiscProt Settings -> PDCBProt Settings
15 I2b_SnST_CT_Br1_ST2 0-600 A
16 I2b_SnST_CT_Br2_ST2 0-600 A
17 I2b_SnExc_CT_S1_Exc 0-600 A
18 I2b_SnExc_CT_S2_Exc 0-600 A
1. I2b_SnTr_CT_HVS_Tr
I b1n
Secondary rated current at HVS of main transformer. The equation is I b 2 n .
nbLH
2. I2b_SnTr_CT_LVS_Tr
3. I2b_SnTr_CT_ST1
4. I2b_SnTr_CT_ST2
5. I2b_SnTr_CT_Bak_HVS_Tr
6. I2b_SnTr_CT_Gen_GTU
7. I2b_SnTr_CT_ST1_GTU
Secondary rated current at HVS of step-down transformer1. It is used for differential protection of
generator-transformer unit.
8. I2b_SnTr_CT_ST2_GTU
Secondary rated current at HVS of step-down transformer2. It is used for differential protection of
generator-transformer unit.
9. I2b_SnGen_CT_Term_Gen
10. I2b_SnGen_CT_NP_Gen
11. I2b_SnST_CT_HVS_ST1
12. I2b_SnST_CT_Br1_ST1
13. I2b_SnST_CT_Br2_ST1
14. I2b_SnST_CT_HVS_ST2
15. I2b_SnST_CT_Br1_ST2
16. I2b_SnST_CT_Br2_ST2
17. I2b_SnExc_CT_S1_Exc
18. I2b_SnExc_CT_S2_Exc
Secondary rated current at LV side of excitation transformer or neutral point side of exciter.
Main Menu -> Measurement -> Measurement2 -> Cal Settings -> Sec Rated Curr Values
1. V2b_VT_HVS_Tr
2. U2b_DeltVT_HVS_Tr
3. U2b_VT_Term_Gen
4. U2b_DeltVT_Term_Gen
5. U2b_NP_Gen
6. k_DeltVT_Gen
The ratio of zero sequence voltage between terminal and neutral point of generator. That is the
ratio between [U2b_DeltVT_Term_Gen] to [U2b_NP_Gen].
7. U2b_VT_Br1_ST1(2)
8. U2b_VT_Br2_ST1(2)
Main Menu -> Measurement -> Measurement2 -> Cal Settings -> Sec Rated Volt Values
12 k_Br1_Diff_ST1 0-60
13 k_Br2_Diff_ST1 0-60
14 k_HVS_Diff_ST2 0-60
15 k_Br1_Diff_ST2 0-60
16 k_Br2_Diff_ST2 0-60
17 k_S1_Diff_Exc 0-60
18 k_S2_Diff_Exc 0-60
19 k_Ref_Tr 0-60
20 k_NP_Ref_Tr 0-60
1. k_TrHVS_Diff_Tr
2. k_TrLVS_Diff_Tr
Differential coefficient of LVS of main transformer. For differential protection of main transformer,
the base side is LV side.
3. k_ST1_Diff_Tr
4. k_ST2_Diff_Tr
5. k_TrHVS_Diff_GTU
Differential coefficient of HVS of main transformer for differential protection of generator and
transformer unit.
6. k_Gen_Diff_GTU
7. k_ST1_Diff_GTU
8. k_ST2_Diff_GTU
9. k_Term_Diff_Gen
10. k_NP_Diff_Gen
Differential coefficient of neutral point side of generator for differential protection of generator.
11. k_HVS_Diff_ST1
12. k_Br1_Diff_ST1
13. k_Br2_Diff_ST1
14. k_HVS_Diff_ST2
15. k_Br1_Diff_ST2
16. k_Br2_Diff_ST2
17. k_S1_Diff_Exc
18. k_S2_Diff_Exc
19. k_Ref_Tr
Differential coefficient of HVS of main transformer for restricted earth-fault protection of main
transformer.
20. k_NP_Ref_Tr
Differential coefficient of neutral point side of main transformer for restricted earth-fault protection
of main transformer.
Main Menu -> Measurement -> Measurement2 -> Cal Settings -> Diff Corr Coef
8.1 Overview
The human-machine interface consists of a human-machine interface (HMI) module which allows
a communication to be as simple as possible for the user. The HMI module helps to draw your
attention to something that has occurred which may activate a LED or a report displayed on the
LCD. Operator can locate the data of interest by navigating the keypad.
5
1 11 PCS-985
2 12
GENERATOR RELAY
3 13
4 14
P
GR
5 15
6 16 ENT
C
7 17
ES
8 18
9 19
1 3
10 20
4
GR
P
ENT
ESC
Figure 8.1-2 Keypad buttons
1. ―ESC‖:
2. ―ENT‖:
3. ―GRP‖
Page up/down
HEALTHY
ALARM
TRIP
VT ALARM
CT ALARM
STA EF ALARM
ROT EF ALARM
Steady Green Lit when the equipment is in service and ready for operation.
Note!
―HEALTHY‖ LED can only be turned on by energizing the device and no abnormality
detected.
Figure 8.1-4 Corresponding cable of the RJ45 port in the front panel
P1: To connect the multiplex RJ45 port. An 8-core cable is applied here.
The definition of the 8-core cable in the above figure is introduced in the following table.
The Ethernet port can be used to communication with PC via auxiliary software (PCS-PC) after
connecting the protection device with PC, so as to fulfill on-line function (please refer to the
instruction manual of PCS-PC). At first, the connection between the protection device and PC
must be established. Through setting the IP address and subnet mask of corresponding Ethernet
interface in the menu ―Settings→Device Setup→Comm Settings‖, it should be ensured that the
protection device and PC are in the same network segment. For example, setting the IP address
and subnet mask of network A. (using network A to connect with PC)
The IP address and subnet mask of protection device should be [IP_LAN1]= 198.87.96.XXX,
[Mask_LAN1]=255.255.255.0, [En_LAN1]=1. (XXX can be any value from 0 to 255 except 102)
If the logic setting [En_LAN1] is non-available, it means that network A is always enabled.
NR1102C
ETHERNET
Network A
Network B
SYN+
SYN-
SGND
GND
RXD
TXD
SGND
GND
Note!
If using other Ethernet port, for example, Ethernet B, the logic setting [En_LAN2] must be
set as ―1‖.
from top to bottom and in accordance with the execution order of command menus.
Press ―▲‖ to enter the main menu with the interface as shown in the following diagram:
MainMenu
Language
Clock
Quick Menu
For the first powered protective device, there is no record in quick menu. Press ―▲‖ to enter the
main menu with the interface as shown in the following diagram:
Measurements
Status
Records
Print
Settings
Local Cmd
Information
Test
Clock
Language
The descriptions about menu is based on the maximized configuration, for a specific project, if
some function is not available, the corresponding submenu will hidden.
Main Menu
Measurements
Status
Records
Settings
Local Cmd
Information
Test
Clock
Language
Under the main interface, press ―▲‖ to enter the main menu, and select submenu by pressing ―▲‖,
―▼‖ and ―ENT‖. The command menu adopts a tree shaped content structure. The above diagram
provides the integral structure and all main menus under menu tree of the protection device.
8.2.3.1 Measurements
Main Menu
Measurements
Measurements1
Tr Values
ST Values
Gen Values
Exc Values
Measurements2
Tr Values
ST Values
Gen Values
Exc Values
Phase Angle
Prot Status
Cal Settings
This menu is used to display real-time measured values, including AC voltage, AC current, phase
angle and calculated quantities. These data can help users to acquaint the device′s status. This
menu comprises following submenus. Please refer to Chapter 5 about the detailed measured
values.
1 ST1 Diff Values Display measured differential current values of stepdown transformer 1
3 ST2 Diff Values Display measured differential current values of stepdown transformer 2
1 ST1 Diff Values Display measured differential current values of stepdown transformer 1
3 ST2 Diff Values Display measured differential current values of stepdown transformer 2
2 ST1 PhaseAngle Values Display measured phase angle related to stepdown transformer 1
3 ST2 PhaseAngle Values Display measured phase angle related to stepdown transformer 2
5 Exc Prot CalValues Display calculated values related to excitation transformer or exciter
1 Sec Rated Curr Values Display calculated settings of secondary rated current
2 Sec Rated Volt Values Display calculated settings of secondary rated voltage
8.2.3.2 Status
Main Menu
Status
Prot BI
Tr Prot BI
Gen Prot BI
ST Prot BI
Exc Prot BI
MR Prot BI
Misc Prot BI
Pwr Superv BI
Outputs
Contact Outputs
Prot FD
This menu is used to display real time input signals and output signals of the device. These data
can help users to acquaint the device′s status. This menu comprises following submenus. Please
refer to ―section 5.3” about the detailed input and output signals.
4 Exc Prot BI Display states of binary inputs related to excitation transformer or exciter
8.2.3.3 Records
Main Menu
Records
Disturb Records
Superv Events
IO Events
Device Logs
Clear Records
This menu is used to display all kinds of records, including the disturbance records, supervision
events, binary events and device logs, so that the operator can load to view and use as the
reference of analyzing accidents and repairing the device. All records are stored in non-volatile
memory, it can still record them even if it loses its power.
8.2.3.4 Print
Main Menu
Device Info
Settings
System Settings
GTUDiffProt Settings
TrProt Settings
GenProt Settings
ST1Prot Settings
ST2Prot Settings
ExcProt Settings
MiscProt Settings
Device Setup
All Settings
Latest Modified
Disturb Records
Superv Events
IO Events
Device Status
Waveforms
IEC103 Info
Cancel Print
This menu is used to print device description, settings, all kinds of records, waveform, information
related to IEC60870-5-103 protocol.
2 Settings Print device setup, system settings and protection settings. It can print
Print the current state of the device, including the sampled value of
6 Device Status
voltage and current, the state of binary inputs, setting and so on
Print all settings including device setup, system settings and protection
10 All Settings
settings
3 TrPPFBakProt Settings Print settings of phase to phase fault protection of main transformer
2 PDCBProt Settings Print pole disagreement protection settings of HVS of main transformer
6 ST1 Curr/Volt Wave Print current and voltage waveforms of stepdown transformer 1
8 ST2 Curr/Volt Wave Print current and voltage waveforms of stepdown transformer 2
8.2.3.5 Settings
Main Menu
Settings
System Settings
GTUDiffProt Settings
TrProt Settings
GenProt Settings
ST1Prot Settings
ST2Prot Settings
ExcProt Settings
MiscProt Settings
Device Setup
Copy Settings
This menu is used to check the device setup, system settings and protection settings, as well as
modifying any of the above setting items. Moreover, it can also execute the setting copy between
different setting groups.
4 TrEFBakProt Settings Check or modify settings of earth fault protection of main transformer
4 StaEFProt Settings Check or modify settings of earth fault protection of stator windings
14 StShutProt Settings Check or modify settings of startup and shutdown protection of generator
Main Menu
Local Cmd
Reset Target
Trig Oscillograph
Download
Clear Counter
This menu is used to reset the tripping relay with latch, indicator LED, LCD display, and as same
as the resetting function of binary inputs. This menu provides a method of manually recording the
current waveform data of the device under normal condition for printing and uploading SAS.
Besides, it can send out the request of program download, clear statistic information.
1 Reset Target Reset the local signal, indicator LED, LCD display and so on
8.2.3.7 Information
Main Menu
Information
Version Info
Board Info
In this menu, the LCD displays software information of all kinds of intelligent plug-in modules,
which consists of version, creating time of software, CRC codes and management sequence
Display software information of DSP module, MON module and HMI module,
1 Version Info which consists of version, creating time of software, CRC codes and
management sequence number.
2 Board Info Monitor the current working state of each intelligent module.
8.2.3.8 Test
Main Menu
Test
Disturb Record
1 Check the fault report one by one.
Items
View the relevant information about disturbance records (only used for
1 Protection Elements
debugging persons)
View the relevant information about supervision events (only used for
2 Superv Events
debugging persons)
View the relevant information about binary events (only used for debugging
3 IO Events
persons)
Users can respectively execut the test automatically or manually by selecting commands ―All Test‖
or ―Select Test‖.
8.2.3.9 Clock
The current time of internal clock can be viewed here. The time is displayed in the form
YY-MM-DD and hh:mm:ss. All values are presented with digits and can be modified.
8.2.3.10 Language
Under normal condition, the LCD will display the following. The LCD adopts white color as its
backlight that is activated if once there is any keyboard operation, and is extinguished
automatically after 60 seconds of no operation.
The content displayed on the screen contains: the current date and time of the protection device
(with a format of yyyy-mm-dd hh:mm:ss:), the active setting group number, the three-phase
current sampling value, the neutral current sampling value, the three-phase voltage sampling
value, the neutral voltage sampling value, the synchronism voltage sampling value, line frequency
and the address relevant to IP address of Ethernet A. If all the sampling values of the voltage and
the current can‘t be fully displayed within one screen, they will be scrolling-displayed automatically
from the top to the bottom.
If the device has detected any abnormal state, it′ll display the self-check alarm information.
For the situation that the disturbance records and the supervision events coexist, the upper half
part is the disturbance record, and the lower half part is the supervision event. As to the upper half
part, it displays separately the record number of the disturbance record, fault name, generating
time of the disturbance record (with a format of yyyy-mm-dd hh:mm:ss), protection element and
tripping element. If there is protection element operation, faulty phase and relative operation time
with reference to fault detector element are displayed. At the same time, if displayed rows of
protection element and tripping element are more than 3, a scroll bar will appear at the right. The
height of the black part of the scroll bar basically indicates the total lines of protection element and
tripping element, and its position suggests the position of the currently displayed line of the total
lines. The scroll bar of protection element and tripping element will roll up at the speed of one line
per time. When it rolls to the last three lines, it will roll from the earliest protection element and
tripping element again. The displayed content of the lower half part is similar to that of the upper
half part.
If the device has no the supervision event, the display interface will only show the disturbance
record.
If the device has the supervision event, the display interface will show the disturbance record and
the supervision event at the same time.
Disturb Records NO.2 shows the title and SOE number of the disturbance record.
2011-06-25 07:10:00:200 shows the time when fault detector picks up, the format is
year–month-date and hour:minute:second:millisecond.
0ms FD_BFPGCBProt shows fault detector element and its operating time (set as 0ms
fixedly).
24ms Op_BFP_GCB shows operation element and its relative operation time
Alm_BI 0 1
Superv Events NO.4 shows the SOE number and title of the supervision event
2011-06-25 09:18:47:500 shows the real time of the report: year–month-date and
hour:minute:second:millisecond
IO Events NO.4
2011-06-25 09:18:47:500ms
BI_Pwr_Superv 0 1
IO Events NO.4 shows the number and title of the binary event
2011-06-25 09:18:47:500 shows date and time when the report occurred, the format is
year–month-date and hour:minute:second:millisecond
BI_Pwr_Superv 0→1 shows the state change of binary input, including binary input
name, original state and final state
Device Logs NO. 4 shows the title and the number of the device log
2011-06-25 10:18:47:569 shows date and time when the report occurred, the format is
year–month-date and hour:minute:second:millisecond
It will be displayed on the LCD before the fault report and self-check report are confirmed. Only
pressing the restore button on the protection screen or pressing both ―ENT‖ and ―ESC‖ at the
same time can switch among the fault report, the self-check report and the normal running state of
protection device to display it. The binary input change report will be displayed for 5s and then it
will return to the previous display interface automatically.
2. Press the ―▲‖ or ―▼‖ to move the cursor to the ―Measurements‖ menu, and then press
the ―ENT‖ or ―►‖ to enter the menu;
3. Press the ―▲‖ or ―▼‖ to move the cursor to any command menu, and then press the
―ENT‖ to enter the menu;
4. Press the ―▲‖ or ―▼‖ to page up/down (if all information cannot be displayed in one
display screen, one screen can display 14 lines of information at most);
6. Press the ―ENT‖ or ―ESC‖ to exit this menu (returning to the ―Measurements‖ menu);
2. Press the key ―▲‖ or ―▼‖ to move the cursor to the ―Status‖ menu, and then press the
―ENT‖ or ―►‖ to enter the menu.
3. Press the key ―▲‖ or ―▼‖ to move the cursor to any command menu item, and then press
the key ―ENT‖ to enter the submenu.
4. Press the ―▲‖ or ―▼‖ to page up/down (if all information cannot be displayed in one
display screen, one screen can display 14 lines of information at most).
5. Press the key ―◄‖ or ―►‖ to select pervious or next command menu.
6. Press the key ―ENT‖ or ―ESC‖ to exit this menu (returning to the ―Status‖ menu).
2. Press the ―▲‖ or ―▼‖ to move the cursor to the ―Records‖ menu, and then press the
―ENT‖ or ―►‖ to enter the menu;
3. Press the ―▲‖ or ―▼‖ to move the cursor to any command menu, and then press the
7. Press the ―ENT‖ or ―ESC‖ to exit this menu (returning to the ―Records‖ menu);
2. Press the ―▲‖ or ―▼‖ to move the cursor to the ―Print‖ menu, and then press the ―ENT‖ or
―►‖ to enter the menu;
3. Press the ―▲‖ or ―▼‖ to move the cursor to any command menu, and then press the
―ENT‖ to enter the menu;
Selecting the ―Disturb Records‖, and then press the ―+‖ or ―-‖ to select pervious
or next record. After pressing the key ―ENT‖, the LCD will display ―Start Printing... ‖,
and then automatically exit this menu (returning to the menu ―Print‖). If the printer
doesn‘t complete its current print task and re-start it for printing, and the LCD will
display ―Printer Busy…‖. Press the key ―ESC‖ to exit this menu (returning to the
menu ―Print‖).
Selecting the command menu ―Superv Events‖ or ―IO Events‖, and then press the
key ―▲‖ or ―▼‖ to move the cursor. Press the ―+‖ or ―-‖ to select the starting and
ending numbers of printing message. After pressing the key ―ENT‖, the LCD will
display ―Start Printing…‖, and then automatically exit this menu (returning to the
menu ―Print‖). Press the key ―ESC‖ to exit this menu (returning to the menu ―Print‖).
4. If selecting the command menu ―Device Info‖, ―Device Status― or ―IEC103 Info‖, press
the key ―ENT‖, the LCD will display ―Start printing..‖, and then automatically exit this menu
(returning to the menu ―Print‖).
5. If selecting the ―Settings‖, press the key ―ENT‖ or ―►‖ to enter the next level of menu.
6. After entering the submenu ―Settings‖, press the key ―▲‖ or ―▼‖ to move the cursor, and
then press the key ―ENT‖ to print the corresponding default value. If selecting any item to
printing:
Press the key ―+‖ or ―-‖ to select the setting group to be printed. After pressing the key
―ENT‖, the LCD will display ―Start Printing…‖, and then automatically exit this menu
(returning to the menu ―Settings‖). Press the key ―ESC‖ to exit this menu (returning to the
menu ―Settings‖).
7. After entering the submenu ―Waveforms‖, press the ―+‖ or ―-‖ to select the waveform
item to be printed and press ‖ENT‖ to enter. If there is no any waveform data, the LCD will
display ―No Waveform Data!‖ (Before executing the command menu “Waveforms‖, it is
necessary to execute the command menu ―Trig Oscillograph‖ in the menu ―Local Cmd‖,
otherwise the LCD will display ―No Waveform Data!‖). With waveform data existing:
Press the key ―+‖ or ―-‖ to select pervious or next record. After pressing the key ―ENT‖, the LCD
will display ―Start Printing…‖, and then automatically exit this menu (returning to the menu
―Waveforms”). If the printer does not complete its current print task and re-start it for printing, and
the LCD will display ―Printer Busy…‖. Press the key ―ESC‖ to exit this menu (returning to the menu
―Waveforms‖).
2. Press the ―▲‖ or ―▼‖ to move the cursor to the ―Settings‖ menu, and then press the
―ENT‖ or ―►‖ to enter the menu;
3. Press the ―▲‖ or ―▼‖ to move the cursor to any command menu, and then press the
―ENT‖ to enter the menu;
7. Press the ―ESC‖ to exit this menu (returning to the menu ―Settings‖).
Note!
If the displayed information exceeds 14 lines, the scroll bar will appear on the right side of
the LCD to indicate the quantity of all displayed information of the command menu and the
relative location of information where the current cursor points at.
2. Press the ―▲‖ or ―▼‖ to move the cursor to the ―Settings‖ menu, and then press the
―ENT‖ or ―►‖ to enter the menu;
3. Press the ―▲‖ or ―▼‖ to move the cursor to any command menu, and then press the
―ENT‖ to enter the menu;
6. Press the ―ESC‖ to exit this menu (returning to the menu ―Settings‖ );
7. If selecting the submenu ―TrProt Settings‖, and press ―ENT‖ to enter. After selecting
different command menu, the LCD will display the following interface: (take
―TrDiffProt Settings‖ as an example)
TrDiffProt Settings
Active Group: 01
Selected Group: 02
Press the ―+‖ or ―-‖ to modify the value, and then press the ―ENT‖ to enter it. Move the cursor to
the setting item to be modified, press the ―ENT‖ to enter.
Take the setting [I_Pkp_PcntDiff_Tr] as an example is selected to modify, then press the ―ENT‖ to
enter and the LCD will display the following interface. is shown the ―+‖ or ―-‖ to modify the value
and then press the ―ENT‖ to confirm.
I_Pkp_PcntDiff_Tr
Press the ―+‖ or ―-‖ to modify the value (if the modified value is of multi-bit, press the ―◄‖ or ―►‖
to move the cursor to the digit bit, and then press the ―+‖ or ―-‖ to modify the value), press the
―ESC‖ to cancel the modification and return to the displayed interface of the command menu
―TrDiffProt Settings‖. Press the ―ENT‖ to automatically exit this menu (returning to the displayed
interface of the command menu ―TrDiffProt Settings‖).
Move the cursor to continue modifying other setting items. After all setting values are modified,
press the ―◄‖, ―►‖ or ―ESC‖, and the LCD will display ―Save or Not?‖. Directly press the ―ESC‖ or
press the ―◄‖ or ―►‖ to move the cursor. Select the ―Cancle‖, and then press the ―ENT‖ to
automatically exit this menu (returning to the displayed interface of the command menu
―TrDiffProt Settings‖).
Press the ―◄‖ or ―►‖ to move the cursor. Select ―No‖ and press the ―ENT‖, all modified setting item
will restore to its original value, exit this menu (returning to the menu ―TrProt Settings‖).
Press the ―◄‖ or ―►‖ to move the cursor to select ―Yes‖, and then press the ―ENT‖, the LCD will
display password input interface.
Password:
____
Input a 4-bit password (―+‖, ―◄‖, ―▲‖ or ―-‖). If the password is incorrect, continue inputting it,
and then press the ―ESC‖ to exit the password input interface and return to the displayed interface
of the command menu ―TrDiffProt Settings‖. If the password is correct, LCD will display ―Save
Setting Now…‖, and then exit this menu (returning to the displayed interface of the command
menu ―TrDiffProt Settings‖), with all modified setting items as modified values.
Note!
For different setting items, their displayed interfaces are different but their modification
methods are the same.
Note!
After modifying protection settings in current active setting group or system settings of the
device, the ―HEALTHY‖ indicator lamp of the device will go out, and the device will
automatically restart and re-check them. If the check doesn‘t pass, the device will be
blocked.
2. Press the ―▲‖ or ―▼‖ to move the cursor to the ―Settings‖ menu, and then press the
―ENT‖ or ―►‖ to enter the menu;
3. Press the ―▲‖ or ―▼‖ to move the cursor to the command menu ―Copy Settings‖, and
then press the ―ENT‖ to enter the menu.
Copy Settings
Active Group: 01
Copy To Group: 02
Press the ―+‖ or ―-‖ to modify the value. Press the ―ESC‖, and return to the menu ―Settings‖.
Press the ―ENT‖, the LCD will display the interface for password input, if the password is incorrect,
continue inputting it, press the ―ESC‖ to exit the password input interface and return to the menu
―Settings‖. If the password is correct, the LCD will display ―copy setting OK!‖, and exit this menu
(returning to the menu ―Settings‖).
Active Group: 01
Change To Group: 02
Press the ―+‖ or ―-‖ to modify the value, and then press the ―ESC‖ to exit this menu (returning to
the main menu). After pressing the ―ENT‖, the LCD will display the password input interface. If the
password is incorrect, continue inputting it, and then press the ―ESC‖ to exit the password input
interface and return to its original state. If the password is correct, the ―HEALTHY‖ indicator lamp
of the protection device will go out, and the protection device will re-check the protection setting. If
the check doesn‘t pass, the protection device will be blocked. If the check is successful, the LCD
will return to its original state.
2. Press the ―+‖, ―-‖, ―+‖, ―-‖ and ―ENT‖; Press the ―ESC‖ to exit this menu (returning to
the original state). Press the ―ENT‖ to carry out the deletion.
Note!
The operation of deleting device message will delete all messages saved by the protection
device, including disturbance records, supervision events, binary events, but not including
device logs. Furthermore, the message is irrecoverable after deletion, so the application of
the function shall be cautious.
2. Press the ―▲‖ or ―▼‖ to move the cursor to the ―Clock‖ menu, and then press the ―ENT‖
to enter clock display
3. Press the ―▲‖ or ―▼‖ to move the cursor to the date or time to be modified;
4. Press the ―+‖ or ―-‖ to modify value, and then press the ―ENT‖ to save the modification
and return to the main menu;
5. Press the ―ESC‖ to cancel the modification and return to the main menu.
Clock
Year 2008
Month 11
Day 28
Hour 20
Minute 59
Second 14
2. Press the ―▲‖ or ―▼‖ to move the cursor to the ―Information‖ menu, and then press the
―ENT‖ or ―►‖ to enter the menu;
3. Press the ―▲‖ or ―▼‖ to move the cursor to the command menu ―Board Info‖, and then
press the ―ENT‖ to enter the menu;
5. Press the ―ENT‖ or ―ESC‖ to exit this menu (returning to the ―Information‖ menu).
2. Press the ―▲‖ or ―▼‖ to move the cursor to the ―Information‖ menu, and then press the
―ENT‖ to enter the submenu.
3. Press the key ―▲‖ or ―▼‖ to move the cursor to the command menu ―Version Info‖, and
then press the key ―ENT‖ to display the software version.
2. Press the key ―▲‖ or ―▼‖ to move the cursor to the command menu ―Language‖, and
then press the key ―ENT‖ to enter the menu and the following display will be shown on
LCD.
1 中文
2 English
3. Press the key ―▲‖ or ―▼‖ to move the cursor to the language user preferred and press
the key “ENT‖ to execute language switching. After language switching is finished, LCD
will return to the menu ―Language‖, and the display language is changed. Otherwise,
press the key ―ESC‖ to cancel language switching and return to the menu ―Language‖.
Note!
LCD interface provided in this chapter is only a reference and available for explaining
specific definition of LCD. The displayed interface of the actual device may be some
different from it, so you shall be subject to the actual protection device.
9 Communication
9.1 Overview
This section outlines the remote communications interfaces of NR Relays. The protective device
supports a choice of three protocols via the rear communication interface (RS-485 or Ethernet),
selected via the model number by setting. The protocol provided by the protective device is
indicated in the menu ―Settings→Device Setup→Comm Settings‖.
The rear EIA RS-485 interface is isolated and is suitable for permanent connection of whichever
protocol is selected. The advantage of this type of connection is that up to 32 protective devices
can be ―daisy chained‖ together using a simple twisted pair electrical connection.
It should be noted that the descriptions contained within this section do not aim to fully detail the
protocol itself. The relevant documentation for the protocol should be referred to for this
information. This section serves to describe the specific implementation of the protocol in the relay.
The EIA RS-485 two-wire connection provides a half-duplex fully isolated serial connection to the
product. The connection is polarized and whilst the product‘s connection diagrams indicate the
polarization of the connection terminals it should be borne in mind that there is no agreed
definition of which terminal is which. If the master is unable to communicate with the product, and
the communication parameters match, then it is possible that the two-wire connection is reversed.
The EIA RS-485 bus must have 120Ω (Ohm) ½ Watt terminating resistors fitted at either end
across the signal wires (refer to Figure 9.2-1). Some devices may be able to provide the bus
terminating resistors by different connection or configuration arrangements, in which case
separate external components will not be required. However, this product does not provide such a
facility, so if it is located at the bus terminus then an external termination resistor will be required.
EIA RS-485
Master 120 Ohm
120 Ohm
The EIA RS-485 standard requires that each device is directly connected to the physical cable that
is the communications bus. Stubs and tees are expressly forbidden, such as star topologies. Loop
bus topologies are not part of the EIA RS-485 standard and are forbidden by it also.
Two-core screened cable is recommended. The specification of the cable will be dependent on the
application, although a multi-strand 0.5mm2 per core is normally adequate. Total cable length must
not exceed 500m. The screen must be continuous and connected to ground at one end, normally
at the master connection point; it is important to avoid circulating currents, especially when the
cable runs between buildings, for both safety and noise reasons.
This product does not provide a signal ground connection. If a signal ground connection is present
in the bus cable then it must be ignored, although it must have continuity for the benefit of other
devices connected to the bus. At no stage must the signal ground be connected to the cables
screen or to the product‘s chassis. This is for both safety and noise reasons.
9.2.1.4 Biasing
It may also be necessary to bias the signal wires to prevent jabber. Jabber occurs when the signal
level has an indeterminate state because the bus is not being actively driven. This can occur when
all the slaves are in receive mode and the master is slow to turn from receive mode to transmit
mode. This may be because the master purposefully waits in receive mode, or even in a high
impedance state, until it has something to transmit. Jabber causes the receiving device(s) to miss
the first bits of the first character in the packet, which results in the slave rejecting the message
and consequentially not responding. Symptoms of these are poor response times (due to retries),
increasing message error counters, erratic communications, and even a complete failure to
communicate.
Biasing requires that the signal lines be weakly pulled to a defined voltage level of about 1V. There
should only be one bias point on the bus, which is best situated at the master connection point.
The DC source used for the bias must be clean; otherwise noise will be injected. Note that some
devices may (optionally) be able to provide the bus bias, in which case external components will
not be required.
Note!
It is extremely important that the 120Ω termination resistors are fitted. Failure to do so will
result in an excessive bias voltage that may damage the devices connected to the bus.
As the field voltage is much higher than that required, NR cannot assume responsibility for
any damage that may occur to a device connected to the network as a result of incorrect
application of this voltage.
Ensure that the field voltage is not being used for other purposes (i.e. powering logic inputs)
as this may cause noise to be passed to the communication network.
It is recommended to use twisted screened eight-core cable as the communication cable. A picture
is shown bellow.
Each equipment is connected with an exchanger via communication cable, and thereby it forms a
star structure network. Dual-network is recommended in order to increase reliability. SCADA is
also connected to the exchanger and will play a role of master station, so the every equipment
which has been connected to the exchanger will play a role of slave unit.
SCADA
Exchanger A
Exchanger B
To use the rear port with IEC60870-5-103 communication, the relevant settings to the protective
device must be configured.
The IEC60870-5-103 interface over serial port (RS-485) is a master/slave interface with the
protective device as the slave device. It is properly developed by NR.
Initialization (reset)
Time synchronization
General interrogation
General commands
Disturbance records
The link layer strictly abides by the rules defined in the IEC60870-5-103.
9.3.2 Initialization
Whenever the protective device has been powered up, or if the communication parameters have
been changed, a reset command is required to initialize the communications. The protective
device will respond to either of the two reset commands (Reset CU or Reset FCB), the difference
is that the Reset CU will clear any unsent messages in the transmit buffer.
The protective device will respond to the reset command with an identification message ASDU 5,
the COT (Cause Of Transmission) of this response will be either Reset CU or Reset FCB
depending on the nature of the reset command.
If the protective device clock is synchronized using the IRIG-B input then it will not be possible to
set the protective device time using the IEC60870-5-103 interface. An attempt to set the time via
the interface will cause the protective device to create an event with the current date and time
taken from the IRIG-B synchronized internal clock.
All spontaneous events can be gained by printing, implementing submenu ―IEC103 Info‖ in the
menu ―Print‖.
Refer the IEC60870-5-103 standard can get the enough details about general interrogation.
All general classification service group numbers can be gained by printing, implementing submenu
―IEC103 Info‖ in the menu ―Print‖.
The disturbance records are stored in uncompressed format and can be extracted using the
standard mechanisms described in IEC60870-5-103.
All channel numbers (ACC) of disturbance data can be gained by printing, implementing submenu
―IEC103 Info‖ in the menu ―Print‖.
Physical Layer Setup: RS485, 1 start bit,8 data bits, no bit for parity,1 stop bit
Parity: no
The following modbus function codes are supported but re-defined by the device:
08: Provides a series of tests for checking the communication system between the master
and slave, or for checking various internal error conditions within the slave.
Example 1: If the master want to fetch Trip Information (0000H~0003H),the query frame would be
as follows(Suppose the slave address was 1):
01 02 00 00 00 04 79 C9
CRC Hi
CRC Lo
Num of Status Lo
Num of Status Hi
Function Code
Slave Addr
The response fame would be as follows (Suppose the value of 0000H~0003H equal to 1,1,0,1
respectively):
01 02 01 0B E0 4F
CRC Hi
CRC Lo
Status
Length
Function Code
Slave Addr
Example 2: If the master want to fetch Trip Information(0002H~000DH),the query frame would be
as follows(Suppose the slave address was 1):
01 02 00 02 00 0C D9 CF
CRC Hi
CRC Lo
Num of Status Lo
Num of Status Hi
Function Code
Slave Addr
The response fame would be as follows (Suppose the value of 0002H~000DH equal to
1,1,0,1,0,0,1,0,1,1,1,0 respectively):
01 02 02 07 4B FB BF
CRC Hi
CRC Lo
Status Lo
Status Hi
Length
Function Code
Slave Addr
The function uses a two-byte subfunction code field in the query to define the type of test to be
performed. The slave echoes both the function code and subfunction code in a normal response.
The listing below shows the subfunction codes supported by the device.
Code Name
00H Return Query Data
01H Restart Comm Option
04H Force Listen Only Mode
0BH Return Bus Message Count
0CH Return Bus Comm. Error Count
0DH Return Bus Exception Error Cnt
0EH Return Slave Message Count
0FH Return Slave No Response Cnt
The listing below shows the exception codes supported by the device.
Code Description
01H Illegal Function
02H Illegal Data Address
03H Illegal Data Value
07H Negative Acknowledge
9.5.1 Overview
The IEC 61850 standard is the result of years of work by electric utilities and vendors of electronic
equipment to produce standardized communications systems. IEC 61850 is a series of standards
IEC 61850-5: Communications and requirements for functions and device models
IEC 61850-7-1: Basic communication structure for substation and feeder equipment–
Principles and models
IEC 61850-7-2: Basic communication structure for substation and feeder equipment - Abstract
communication service interface (ACSI)
IEC 61850-7-3: Basic communication structure for substation and feeder equipment–
Common data classes
IEC 61850-7-4: Basic communication structure for substation and feeder equipment–
Compatible logical node classes and data classes
IEC 61850-8-1: Specific Communication Service Mapping (SCSM) – Mappings to MMS (ISO
9506-1 and ISO 9506-2) and to ISO/IEC 8802-3
IEC 61850-9-1: Specific Communication Service Mapping (SCSM) – Sampled values over
serial unidirectional multidrop point to point link
IEC 61850-9-2: Specific Communication Service Mapping (SCSM) – Sampled values over
ISO/IEC 8802-3
These documents can be obtained from the IEC (http://www.iec.ch). It is strongly recommended
that all those involved with any IEC 61850 implementation obtain this document set.
1. MMS protocol
IEC 61850 specifies the use of the Manufacturing Message Specification (MMS) at the upper
(application) layer for transfer of real-time data. This protocol has been in existence for a number
of years and provides a set of services suitable for the transfer of data within a substation LAN
environment. Actual IEC 61850-7-2 abstract services and objects are mapped to MMS protocol
services in IEC61850-8-1.
2. Client/server
This is a connection-oriented type of communication. The connection is initiated by the client, and
communication activity is controlled by the client. IEC61850 clients are often substation computers
running HMI programs or SOE logging software. Servers are usually substation equipment such
as protection relays, meters, RTUs, transformer, tap changers, or bay controllers.
3. Peer-to-peer
A substation configuration language is a number of files used to describe IED and communication
system realized according to IEC 61850-5 and IEC 61850-7. Each configured device has an IED
Capability Description (ICD) file and a Configured IED Description (CID) file. The substation single
line information is stored in a System Specification Description (SSD) file. The entire substation
configuration is stored in a Substation Configuration Description (SCD) file. The SCD file is the
combination of the individual ICD files and the SSD file, moreover, add communication system
parameters (MMS, GOOSE, control block, SV control block) and the connection relationship of
GOOSE and SV to SCD file.
Each IED represents one IEC61850 physical device. The physical device contains one or more
logical device(s), and the logical device contains many logical nodes. The logical node LPHD
contains information about the IED physical device. The logical node LLN0 contains information
about the IED logical device.
The GGIO logical node is available in the PCS-900 series relays to provide access to digital status
points (including general I/O inputs and warnings) and associated timestamps and quality flags.
The data content must be configured before the data can be used. GGIO provides digital status
points for access by clients. It is intended that clients use GGIO in order to access digital status
values from the PCS-900 series relays. Clients can utilize the IEC61850 buffered reporting
features available from GGIO in order to build sequence of events (SOE) logs and HMI display
screens. Buffered reporting should generally be used for SOE logs since the buffering capability
reduces the chances of missing data state changes. All needed status data objects are transmitted
to HMI clients via buffered reporting, and the corresponding buffered reporting control block
(BRCB) is defined in LLN0.
Most of analog measured values are available through the MMXU logical nodes, and metering
values in MMTR, the else in MMXN, MSQI and so on. Each MMXU logical node provides data
from a IED current/voltage ―source‖. There is one MMXU available for each configurable source.
MMXU1 provides data from CT/VT source 1(usually for protection purpose), and MMXU2 provides
data from CT/VT source 2 (usually for monitor and display purpose). All these analog data objects
are transmitted to HMI clients via unbuffered reporting periodically, and the corresponding
unbuffered reporting control block (URCB) is defined in LLN0. MMXUx logical nodes provide the
following data for each source:
MMXU.MX.Hz: frequency
The following list describes the protection elements for PCS-985B. The specified relay will contain
a subset of protection elements from this list.
PTUC: Undercurrent
PTOC: Phase overcurrent, zero-sequence overcurrent and overcurrent when VT circuit failure
PTUV: Undervoltage
PTOF: Overfrequency
PTUF: Underfrequency
RBRF:Breaker failure
RSYN: Synchronism-check
The protection elements listed above contain start (pickup) and operate flags, instead of any
element has its own start (pickup) flag separately, all the elements share a common start (pickup)
flags ―PTRC.ST.Str.general‖. The operate flag for PTOC1 is ―PTOC1.ST.Op.general‖. For
PCS-985B protection elements, these flags take their values from related module for the
corresponding element. Similar to digital status values, the protection trip information is reported
via BRCB, and BRCB also locates in LLN0.
Logical node LLN0 is essential for an IEC61850 based IED. This LN shall be used to address
common issues for Logical Devices. Most of the public services, the common settings, control
values and some device oriented data objects are available here. The public services may be
BRCB, URCB and GSE control blocks and similar global defines for the whole device; the
common settings include all the setting items of communication settings. System settings and
some of the protection setting items, which can be configured to two or more protection elements
(logical nodes). In LLN0, the item Loc is a device control object, this Do item indicates the local
operation for complete logical device, when it is true, all the remote control commands to the IED
will be blocked and those commands make effective until the item Loc is changed to false. In
PCS-900 series relays, besides the logical nodes we describe above, there are some other logical
nodes below in the IEDs:
MMXU: This LN shall be used to acquire values from CTs and VTs and calculate measurands
such as r.m.s. values for current and voltage or power flows out of the acquired voltage and
current samples. These values are normally used for operational purposes such as power
flow supervision and management, screen displays, state estimation, etc. The requested
accuracy for these functions has to be provided.
LPHD: Physical device information, the logical node to model common issues for physical
device.
PTRC: Protection trip conditioning, it shall be used to connect the ―operate‖ outputs of one or
more protection functions to a common ―trip‖ to be transmitted to XCBR. In addition or
alternatively, any combination of ―operate‖ outputs of protection functions may be combined to
a new ―operate‖ of PTRC.
RDRE: Disturbance recorder function. It triggers the fault wave recorder and its output refers
to the ―IEEE Standard Format for Transient Data Exchange (COMTRADE) for Power System‖
(IEC 60255-24). All enabled channels are included in the recording, independently of the
trigger mode.
IEC61850 buffered and unbuffered reporting control blocks locate in LLN0, they can be configured
to transmit information of protection trip information (in the Protection logical nodes), binary status
values (in GGIO) and analog measured/calculated values (in MMXU, MMTR and MSQI). The
reporting control blocks can be configured in CID files, and then be sent to the IED via an
IEC61850 client. The following items can be configured.
- Bit 1: Data-change
- Bit 4: Integrity
- Bit 1: Sequence-number
- Bit 2: Report-time-stamp
- Bit 3: Reason-for-inclusion
- Bit 4: Data-set-name
- Bit 5: Data-reference
- Bit 8: Conf-revision
- Bit 9: Segmentation
MMS file services are supported to allow transfer of oscillography, event record or other files from
a PCS-900 series relay.
9.5.4.3 Timestamps
The Universal Time Coordinated(UTC for short) timestamp associated with all IEC61850 data
items represents the lastest change time of either the value or quality flags of the data item.
IEC61850 specifies that each logical node can have a name with a total length of 11 characters.
The name is composed of:
Complete names are of the form xxxxxxPTOC1, where the xxxxxx character string is configurable.
Details regarding the logical node naming rules are given in IEC61850 parts 6 and 7-2. It is
recommended that a consistent naming convention be used for an entire substation project.
IEC61850 specifies the type of broadcast data transfer services: Generic Object Oriented
Substation Events (GOOSE). IEC61850 GOOSE services provide virtual LAN (VLAN) support,
Ethernet priority tagging, and Ether-type Application ID configuration. The support for VLANs and
priority tagging allows for the optimization of Ethernet network traffic. GOOSE messages can be
given a higher priority than standard Ethernet traffic, and they can be separated onto specific
VLANs. Devices that transmit GOOSE messages also function as servers. Each GOOSE
publisher contains a ―GOOSE control block‖ to configure and control the transmission.
The GOOSE transmission (including subscribing and publishing) is controlled by GOOSE link
settings in device.
The PCS-900 series relays support IEC61850 Generic Object Oriented Substation Event (GOOSE)
communication. All GOOSE messages contain IEC61850 data collected into a dataset. It is this
dataset that is transferred using GOOSE message services. The GOOSE related dataset is
configured in the CID file and it is recommended that the fixed GOOSE be used for
implementations that require GOOSE data transfer between PCS-900 series relays.
IEC61850 GOOSE messaging contains a number of configurable parameters, all of which must be
correct to achieve the successful transfer of data. It is critical that the configured datasets at the
transmission and reception devices are an exact match in terms of data structure, and that the
GOOSE addresses and name strings match exactly.
Where:
C1: Shall be "M" if support for LOGICAL-DEVICE model has been declared
O: Optional
M: Mandatory
M7-4 data-set-name Y Y Y
M7-5 data-reference Y Y Y
M7-6 buffer-overflow Y Y N
M7-7 entryID Y Y Y
M7-8 BufTm N N N
M7-9 IntgPd Y Y Y
M7-10 GI Y Y Y
M8 Unbuffered report control M M Y
M8-1 sequence-number Y Y Y
M8-2 report-time-stamp Y Y Y
M8-3 reason-for-inclusion Y Y Y
M8-4 data-set-name Y Y Y
M8-5 data-reference Y Y Y
M8-6 BufTm N N N
M8-7 IntgPd N Y Y
Logging
M9 Log control O O N
M9-1 IntgPd N N N
M10 Log O O N
GSE
M12 GOOSE O O Y
M13 GSSE O O N
M14 Multicast SVC O O N
M15 Unicast SVC O O N
M16 Time M M Y
M17 File transfer O O Y
Where:
C2: Shall be "M" if support for LOGICAL-NODE model has been declared
C3: Shall be "M" if support for DATA model has been declared
C4: Shall be "M" if support for DATA-SET, Substitution, Report, Log Control, or Time models has
been declared
C5: Shall be "M" if support for Report, GSE, or SMV models has been declared
M: Mandatory
Server
S1 ServerDirectory M Y
Application association
S2 Associate M Y
S3 Abort M Y
S4 Release M Y
Logical device
S5 LogicalDeviceDirectory M Y
Logical node
S6 LogicalNodeDirectory M Y
S7 GetAllDataValues M Y
Data
S8 GetDataValues M Y
S9 SetDataValues M Y
S10 GetDataDirectory M Y
S11 GetDataDefinition M Y
Data set
S12 GetDataSetValues M Y
S13 SetDataSetValues O Y
S14 CreateDataSet O N
S15 DeleteDataSet O N
S16 GetDataSetDirectory M Y
Substitution
S17 SetDataValues M Y
Setting group control
S18 SelectActiveSG M/O Y
S19 SelectEditSG M/O Y
S20 SetSGValuess M/O Y
S21 ConfirmEditSGValues M/O Y
S22 GetSGValues M/O Y
S23 GetSGCBValues M/O Y
Reporting
Buffered report control block
S24 Report M Y
S24-1 data-change M Y
S24-2 qchg-change M N
S24-3 data-update M N
S25 GetBRCBValues M Y
S26 SetBRCBValues M Y
Unbuffered report control block
S27 Report M Y
S27-1 data-change M Y
S27-2 qchg-change M N
S27-3 data-update M N
S28 GetURCBValues M Y
S29 SetURCBValues M Y
Logging
Log control block
S30 GetLCBValues O N
S31 SetLCBValues O N
Log
S32 QueryLogByTime O N
S33 QueryLogAfter O N
S34 GetLogStatusValues O N
Generic substation event model (GSE)
GOOSE control block
S35 SendGOOSEMessage M Y
S36 GetGoReference O Y
S37 GetGOOSEElementNumber O N
S38 GetGoCBValues M Y
S39 SetGoCBValuess M N
Control
S51 Select O N
S52 SelectWithValue M Y
S53 Cancel M Y
S54 Operate M Y
S55 Command-Termination O Y
S56 TimeActivated-Operate O N
File transfer
S57 GetFile M/O Y
S58 SetFile O N
S59 DeleteFile O N
S60 GetFileAttributeValues M/O Y
Time
SNTP M Y
The PCS-985B support IEC61850 logical nodes as indicated in the following table. Note that the
actual instantiation of each logical node is determined by the product order code.
Nodes PCS-985B
L: System Logical Nodes
LPHD: Physical device information YES
9.6.1 Overview
The descriptions given here are intended to accompany this relay. The DNP3.0 protocol is not
described here; please refer to the DNP3.0 protocol standard for the details about the DNP3.0
implementation. This manual only specifies which objects, variations and qualifiers are supported
in this relay, and also specifies what data is available from this relay via DNP3.0.
The relay operates as a DNP3.0 slave and supports subset level 2 of the protocol, plus some of
the features from level 3. The DNP3.0 communication uses the Ethernet ports at the rear side of
this relay. The Ethernet ports are optional: electrical or optical.
1. Supported qualifiers
The protection operation signals, alarm signals and binary input state change signals are
transported respectively according to the variation sequence in above table.
Object 2, SOE
If the master qualifier is ―0x07‖, the slave responsive qualifier is ―0x27‖; and if the master
qualifier is ―0x01‖, ―0x06‖ or ―0x08‖, the slave responsive qualifier is ―0x28‖.
The measurement values are transported firstly, and then the measurement values are
transported.
The master adopts the ―Object 60‖ for the Class 0 data request and the variation is ―0x01‖.
The slave responds with the above mentioned ―Object 1‖, ―Object 30‖ and ―Object 40‖ (see
―Supported objects and variations‖ in Section 9.6.4.3).
The master adopts the ―Object 60‖ for the Class 1 data request and the variation is ―0x02‖.
The slave responds with the above mentioned ―Object 2‖ (see ―Supported objects and
variations‖ in Section 9.6.4.3).
The master adopts the ―Object 60‖ for the multiple object request and the variation is ―0x01‖,
―0x02‖, ―0x03‖ and ―0x04‖.
The slave responds with the above mentioned ―Object 1‖, ―Object 2‖, ―Object 30‖ and ―Object
40‖ (see ―Supported objects and variations‖ in Section 9.6.4.3).
The function code 0x03 and 0x04 are supported in this relay. The function code 0x03 is for the
remote control with selection; and the function code 0x04 is for the remote control with execution.
The selection operation must be executed before the execution operation, and the single point
control object can be supported to this relay.
10 Installation
10.1 Overview
The device must be shipped, stored and installed with the greatest care.
Choose the place of installation such that the communication interface and the controls on the
front of the device are easily accessible.
Air must circulate freely around the equipment. Observe all the requirements regarding place of
installation and ambient conditions given in this instruction manual.
Take care that the external wiring is properly brought into the equipment and terminated correctly
and pay special attention to grounding. Strictly observe the corresponding guidelines contained in
this section.
In certain cases, the settings have to be configured according to the demands of the engineering
configuration after replacement. It is therefore assumed that the personnel who replace modules
and units are familiar with the use of the operator program on the service PC.
DANGER! Only insert or withdraw the PWR module while the power supply is switched
off. To this end, disconnect the power supply cable that connects with the PWR module.
WARNING! Only insert or withdraw other modules while the power supply is switched off.
WARNING! The modules may only be inserted in the slots designated in Section 6.2.
WARNING! Industry packs and ribbon cables may only be replaced or the positions of
Should boards have to be removed from this relay installed in a grounded cubicle in an HV
switchgear installation, please discharge yourself by touching station ground (the cubicle)
beforehand.
Only hold electronic boards at the edges, taking care not to touch the components.
Only works on boards that have been removed from the cubicle on a workbench designed for
electronic equipment and wear a grounded wristband. Do not wear a grounded wristband,
however, while inserting or withdrawing units.
Always store and ship the electronic boards in their original packing. Place electronic parts in
electrostatic screened packing materials.
Visually inspect all the material when unpacking it. When there is evidence of transport damage,
lodge a claim immediately in writing with the last carrier and notify the nearest NR Company or
agent.
If the equipment is not going to be installed immediately, store all the parts in their original packing
in a clean dry place at a moderate temperature. The humidity at a maximum temperature and the
permissible storage temperature range in dry air are listed in Chapter “Technical Data”.
A suitable drill and spanners are required to secure the cubicles to the floor using the plugs
provided (if this relay is mounted in cubicles).
There should also be free access at the rear of the equipment for additions and replacement of
electronic boards.
Since every piece of technical equipment can be damaged or destroyed by inadmissible ambient
conditions, such as:
1. The location should not be exposed to excessive air pollution (dust, aggressive substances).
2. Severe vibration, extreme changes of temperature, high levels of humidity, surge voltages of
high amplitude and short rise time and strong induced magnetic fields should be avoided as
far as possible.
The equipment can in principle be mounted in any attitude, but it is normally mounted vertically
(visibility of markings).
WARNING! Excessively high temperature can appreciably reduce the operating life of
this relay.
291 465.0
101.6
354.8
76.2
101.6
465.0
450.0
101.6
356.8
76.2
101.6
8-Ф6.8
NOTE! It is necessary to leave enough space top and bottom of the cut-out in the cubicle
The safety instructions must be abided by when installing the boards, please see Section 10.2 for
the details.
Following figure shows the installation way of a module being plugged into a corresponding slot.
In the case of equipment supplied in cubicles, place the cubicles on the foundations that have
been prepared. Take care while doing so not to jam or otherwise damage any of the cables that
have already been installed. Secure the cubicles to the foundations.
On the other hand, electronic apparatus can transmit interference that can disrupt the operation of
other apparatus.
In order to minimize these influences as far as possible, certain standards have to be observed
with respect to grounding, wiring and screening.
NOTE! All these precautions can only be effective if the station ground is of good quality.
Metal accessories such as side plates, blanking plates etc., must be effectively connected
surface-to-surface to the grounded frame to ensure a low-impedance path to ground for RF
interference. The contact surfaces must not only conduct well, they must also be non-corroding.
NOTE! If the above conditions are not fulfilled, there is a possibility of the cubicle or parts
of it forming a resonant circuit at certain frequencies that would amplify the transmission
of interference by the devices installed and also reduce their immunity to induced
interference.
Movable parts of the cubicle such as doors (front and back) or hinged equipment frames must be
effectively grounded to the frame by three braided copper strips (see Figure 10.7-1).
The metal parts of the cubicle housing and the ground rail are interconnected electrically
conducting and corrosion proof. The contact surfaces shall be as large as possible.
NOTE! For metallic connections please observe the voltage difference of both materials
The cubicle ground rail must be effectively connected to the station ground rail by a grounding strip
(braided copper).
Door or hinged
equipment frame
Cubicle ground
rail close to floor
Braided
copper strip
Station
ground
Conducting
connection
There are some ground terminals on some connectors of this relay, and the sign is ―GND‖. All the
ground terminals are connected in the cabinet of this relay. So, the ground terminal on the rear
panel (see Figure 10.7-2) is the only ground terminal of this device.
The grounding strips must therefore be of (preferably tinned) braided copper and not round copper
conductors, as the cross-section of round copper would have to be too large.
Proper terminations must be fitted to both ends (press/pinch fit and tinned) with a hole for bolting
them firmly to the items to be connected.
The surfaces to which the grounding strips are bolted must be electrically conducting and
non-corroding.
Press/pinch fit
cable terminal
Braided
copper strip Terminal bolt
Contact surface
Power supply, binary inputs & outputs: brained copper cable, 1.0mm2 ~ 2.5mm2
The following figure shows the glancing demo about the wiring for the electrical cables.
01 02
03 04
Tighten 05 06
07 08
09 10
11 12
01
13 14
15 16
17 18
19 20
21 22
23 24
Figure 10.7-4 Glancing demo about the wiring for electrical cables
DANGER! Never allow the current transformer (CT) secondary circuit connected to this
equipment to be opened while the primary system is live. Opening the CT circuit will
produce a dangerously high voltage.
11 Commissioning
11.1 Overview
This relay is fully numerical in their design, implementing all protection and non-protection
functions in software. The relay employs a high degree of self-checking and in the unlikely event of
a failure, will give an alarm. As a result of this, the commissioning test does not need to be as
extensive as with non-numeric electronic or electro-mechanical relays.
To commission numerical relays, it is only necessary to verify that the hardware is functioning
correctly and the application-specific software settings have been applied to the relay.
Blank commissioning test and setting records are provided at the end of this manual for
completion as required.
Before carrying out any work on the equipment, the user should be familiar with the contents of the
safety and technical data sections and the ratings on the equipment‘s rating label.
WARNING! Hazardous voltages are present in this electrical equipment during operation.
Non-observance of the safety rules can result in severe personal injury or property
damage.
WARNING! Only the qualified personnel shall work on and around this equipment after
becoming thoroughly familiar with all warnings and safety notices of this manual as well
as with the applicable safety regulations.
The earthing screw of the device must be connected solidly to the protective earth conductor
before any other electrical connection is made.
Hazardous voltages can be present on all circuits and components connected to the supply
voltage or to the measuring and test quantities.
Hazardous voltages can be present in the device even after disconnection of the supply
voltage (storage capacitors!)
The limit values stated in the Chapter “Technical Data” must not be exceeded at all, not even
during testing and commissioning.
When testing the device with secondary test equipment, make sure that no other
measurement quantities are connected. Take also into consideration that the trip circuits and
maybe also close commands to the circuit breakers and other primary switches are
disconnected from the device unless expressly stated.
DANGER! Current transformer secondary circuits must have been short-circuited before
WARNING! Primary test may only be carried out by qualified personnel, who are familiar
with the commissioning of protection system, the operation of the plant and safety rules
and regulations (switching, earthing, etc.).
Multifunctional dynamic current and voltage injection test set with interval timer.
Multimeter with suitable AC current range and AC/DC voltage ranges of 0~440V and 0~250V
respectively.
NOTE! Modern test set may contain many of the above features in one unit.
Optional equipment:
An electronic or brushless insulation tester with a DC output not exceeding 500V (for
insulation resistance test when required).
A portable PC, with appropriate software (this enables the rear communications port to be
tested, if this is to be used, and will also save considerable time during commissioning).
EIA RS-485 to EIA RS-232 converter (if EIA RS-485 IEC60870-5-103 port is being tested).
With the front cover in place all keys are accessible. All menu cells can be read. The LED
indicators and alarms can be reset. Protection or configuration settings can be changed, or fault
and event records cleared. However, menu cells will require the appropriate password to be
entered before changes can be made.
data and text. This PC software also allows settings to be entered more easily, saved to a file on
disk for future reference or printed to produce a setting record. Refer to the PC software user
manual for details. If the software is being used for the first time, allow sufficient time to become
familiar with its operation.
These product checks cover all aspects of the relay which should be checked to ensure that it has
not been physically damaged prior to commissioning, is functioning correctly and all input quantity
measurements are within the stated tolerances.
If the application-specific settings have been applied to the relay prior to commissioning, it is
advisable to make a copy of the settings so as to allow them restoration later. This could be done
by extracting the settings from the relay itself via printer or manually creating a setting record.
The following tests are necessary to ensure the normal operation of the equipment before it is first
put into service.
Hardware tests
These tests are performed for the following hardware to ensure that there is no hardware
defect. Defects of hardware circuits other than the following can be detected by
self-monitoring when the DC power is supplied.
Function tests
These tests are performed for the following functions that are fully software-based. Tests of
the protection schemes and fault locator require a dynamic test set.
Timers test
Conjunctive tests
The tests are performed after the relay is connected with the primary equipment and other
external equipment.
On load test.
After unpacking the product, check for any damage to the relay case. If there is any damage, the
internal module might also have been affected, contact the vendor. The following items listed is
necessary.
Protection panel
Carefully examine the protection panel, protection equipment inside and other parts inside to
see that no physical damage has occurred since installation.
The rated information of other auxiliary protections should be checked to ensure it is correct
for the particular installation.
Panel wiring
Check the conducting wire which is used in the panel to assure that their cross section
meeting the requirement.
Carefully examine the wiring to see that they are no connection failure exists.
Label
Check all the isolator binary inputs, terminal blocks, indicators, switches and push buttons to
make sure that their labels meet the requirements of this project.
Check each plug-in module of the equipments on the panel to make sure that they are well
installed into the equipment without any screw loosened.
Earthing cable
Check whether the earthing cable from the panel terminal block is safely screwed to the panel
steel sheet.
Check whether all the switches, equipment keypad, isolator binary inputs and push buttons
work normally and smoothly.
Insulation resistance tests are only necessary during commissioning if it is required for them to be
done and they have not been performed during installation.
Isolate all wiring from the earth and test the isolation with an electronic or brushless insulation
tester at a DC voltage not exceeding 500V, The circuits need to be tested should include:
DC power supply
Output contacts
Communication ports
Test method:
To unplug all the terminals sockets of this relay, and do the Insulation resistance test for each
circuit above with an electronic or brushless insulation tester.
On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected
to the protection.
Check that the external wiring is correct to the relevant relay diagram and scheme diagram.
Ensure as far as practical that phasing/phase rotation appears to be as expected.
Check the wiring against the schematic diagram for the installation to ensure compliance with the
customer‘s normal practice.
The relay only can be operated under the auxiliary power supply depending on the relay‘s nominal
power supply rating.
The incoming voltage must be within the operating range specified in Chapter “Technical Data”,
before energizing the relay, measure the auxiliary supply to ensure it within the operating range.
Other requirements to the auxiliary power supply are specified in Chapter “Technical Data”. See
this section for further details about the parameters of the power supply.
WARNING! Energize this relay only if the power supply is within the specified operating
The current and voltage transformer connections must remain isolated from the relay for these
checks. The trip circuit should also remain isolated to prevent accidental operation of the
associated circuit breaker.
Connect the relay to DC power supply correctly and turn the relay on. Check program version and
forming time displayed in command menu to ensure that are corresponding to what ordered.
If the time and date is not being maintained by substation automation system, the date and time
should be set manually.
Set the date and time to the correct local time and date using menu item ―Clock‖.
In the event of the auxiliary supply failing, with a battery fitted on CPU board, the time and date will
be maintained. Therefore when the auxiliary supply is restored the time and date will be correct
and not need to set again.
To test this, remove the auxiliary supply from the relay for approximately 30s. After being
re-energized, the time and date should be correct.
On power up, the green LED ―HEALTHY‖ should have illuminated and stayed on indicating that
the relay is healthy.
The relay has latched signal relays which remember the state of the trip, auto-reclose when the
relay was last energized from an auxiliary supply. Therefore these indicators may also illuminate
when the auxiliary supply is applied. If any of these LEDs are on then they should be reset before
proceeding with further testing. If the LED successfully reset, the LED goes out. There is no testing
required for that that LED because it is known to be operational.
It is likely that alarms related to voltage transformer supervision will not reset at this stage.
Apply the rated DC power supply and check that the ―HEALTHY‖ LED is lighting in green. We
need to emphasize that the ―HEALTHY‖ LED is always lighting in operation course except that the
equipment find serious errors in it.
Produce one of the abnormal conditions listed in Chapter “Supervision”, the ―ALARM‖ LED will
light in yellow. When abnormal condition reset, the ―ALARM‖ LED extinguishes.
This test verified that the accuracy of current measurement is within the acceptable tolerances.
Apply rated current to each current transformer input in turn; checking its magnitude using a
multimeter/test set readout. The corresponding reading can then be checked in the relays menu.
The measurement accuracy of the protection is 2.5% or 0.02In. However, an additional allowance
must be made for the accuracy of the test equipment being used.
NOTE! The closing circuit should remain isolated during these checks to prevent
Group No. Item Input Value Input Angle Display Value Display Angle
Ia
Three-phase current 1 Ib
Ic
Ia
Three-phase current 2 Ib
Ic
Ia
Three-phase current 3 Ib
Ic
Ia
Three-phase current …… Ib
Ic
This test verified that the accuracy of voltage measurement is within the acceptable tolerances.
Apply rated voltage to each voltage transformer input in turn; checking its magnitude using a
multimeter/test set readout. The corresponding reading can then be checked in the relays menu.
The measurement accuracy of the relay is 2.5% or 0.1V. However an additional allowance must be
made for the accuracy of the test equipment being used.
NOTE! The closing circuit should remain isolated during these checks to prevent
Group No. Item Input Value Input Angle Display Value Display Angle
Ua
Three-phase voltage 1 Ub
Uc
Ua
Three-phase voltage 2 Ub
Uc
Ua
Three-phase voltage 3 Ub
Uc
Ua
Three-phase voltage…… Ub
Uc
This test checks that all the binary inputs on the equipment are functioning correctly.
The binary inputs should be energized one at a time, see external connection diagrams for
terminal numbers.
Ensure that the voltage applied on the binary input must be within the operating range.
The status of each binary input can be viewed using relay menu. Sign ―1‖ denotes an energized
input and sign ―0‖ denotes a de-energized input.
Test method:
To unplug all the terminals sockets of this protective device, and do the Insulation resistance test
for each circuit above with an electronic or brushless insulation tester.
On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected
to the protection.
3) Self-check and the transition of binary input in the process of devices start
Confirm the external wiring to the current and voltage inputs is correct.
However, these checks can only be carried out if there are no restrictions preventing the
tenderization of the plant being protected.
Remove all test leads, temporary shorting leads, etc. and replace any external wiring that has
been removed to allow testing.
If it has been necessary to disconnect any of the external wiring from the protection in order to
perform any of the foregoing tests, it should be ensured that all connections are replaced in
accordance with the relevant external connection or scheme diagram. Confirm current and voltage
transformer wiring.
After the above tests are completed, remove all test or temporary shorting leads, etc. If it has been
necessary to disconnect any of the external wiring from the protection in order to perform the
wiring verification tests, it should be ensured that all connections are replaced in accordance with
the relevant external connection or scheme diagram.
If the protection is in a new installation or the circuit breaker has just been maintained, the circuit
breaker maintenance and current counters should be zero. If a test block is installed, remove the
test plug and replace the cover so that the protection is put into service.
Ensure that all event records, fault records, disturbance records and alarms have been cleared
and LED‘s has been reset before leaving the protection.
12 Maintenance
2. It is only allowed to plug or withdraw relay board when the supply is reliably switched off.
Never allow the CT secondary circuit connected to this equipment to be opened while the primary
system is live when withdrawing an AC module. Never try to insert or withdraw the relay board
when it is unnecessary.
3. Check weld spots on PCB whether they are well soldered without any rosin joint. All dual
inline components must be well plugged.
When a failure is detected by supervision, a remote alarm is issued and the failure is indicated on
the front panel with LED indicators and LCD display. It is also recorded in the event record.
Failures detected by supervision are traced by checking the ―Superv Events‖ screen on the LCD.
Repair at the site should be limited to module replacement. Maintenance at the component level is
not recommended.
Check that the replacement module has an identical module name (AI, PWR, CPU, SIG, BI, BO,
etc.) and hardware type-form as the removed module. Furthermore, the CPU module replaced
should have the same software version. In addition, the AI and PWR module replaced should have
the same ratings.
The module name is indicated on the top front of the module. The software version is indicated in
LCD menu ―Version Info‖.
Caution!
When handling a module, take anti-static measures such as wearing an earthed wrist band
and placing modules on an earthed conductive mat. Otherwise, many of the electronic
components could suffer damage. After replacing the CPU module, check the settings.
1) Replacing a module
Short circuit all AC current inputs and disconnect all AC voltage inputs
Warning!
Hazardous voltage can be present in the DC circuit just after switching off the DC power
supply. It takes approximately 30 seconds for the voltage to discharge.
Unplug the ribbon cable on the front panel by pushing the catch outside.
After replacing the CPU module, input the application-specific setting values again.
Warning!
Units and modules may only be replaced while the supply is switched off and only by
appropriately trained and qualified personnel. Strictly observe the basic precautions to
guard against electrostatic discharge.
Warning!
When handling a module, take anti-static measures such as wearing an earthed wrist band
and placing modules on an earthed conductive mat. Otherwise, many of the electronic
components could suffer damage. After replacing the CPU module, check the settings.
Danger!
After replacing modules, be sure to check that the same configuration is set as before the
replacement. If this is not the case, there is a danger of the unintended operation of
switchgear taking place or of protections not functioning correctly. Persons may also be
put in danger.
12.4 Cleaning
Before cleaning the relay, ensure that all AC/DC supplies, current transformer connections are
isolated to prevent any chance of an electric shock whilst cleaning. Use a smooth cloth to clean
the front panel. Do not use abrasive material or detergent chemicals.
12.5 Storage
The spare relay or module should be stored in a dry and clean room. Based on IEC standard
60255-1 the storage temperature should be from -40oC to +70oC, but the temperature of from 0oC
to +40oC is recommended for long-term storage.
13.1 Decommissioning
1. Switching off
To switch off the PCS-985B, switch off the external miniature circuit breaker of the power supply.
2. Disconnecting Cables
Disconnect the cables in accordance with the rules and recommendations made by relational
department.
Danger!
Before disconnecting the power supply cables that connected with the PWR module of the
PCS-985B, make sure that the external miniature circuit breaker of the power supply is
switched off.
Danger!
Before disconnecting the cables that are used to connect analog input module with the
primary CTs and VTs, make sure that the circuit breaker for the primary CTs and VTs is
switched off.
3. Dismantling
The PCS-985B rack may now be removed from the system cubicle, after which the cubicles may
also be removed.
Danger!
When the station is in operation, make sure that there is an adequate safety distance to
live parts, especially as dismantling is often performed by unskilled personnel.
13.2 Disposal
In every country there are companies specialized in the proper disposal of electronic waste.
Note!
Strictly observe all local and national regulations when disposing of the device.