EE231: Electronics-1

Lecture 16-18
Chapter 4
DC Biasing – BJTs
 Introduction
• It is wrong to assume that transistor can raise the level of
any AC input without the assistance of an external (DC)
energy source
– The amplified output AC power level is the result of energy from
the applied DC sources
• Hence the design of any electronic amplifier has two
components
– The DC portion & the AC portion
• Using the superposition theorem, the analysis for DC
conditions can be made separately from the AC response
– Though components/parameters (resistors, capacitors etc)
chosen for the required DC levels will affect the AC response
• During the design process, a number of
mathematical relations will be used but the most
frequent ones are

• In most instances, IB is the first quantity to be

determined
– Once IB is known, the remaining quantities can be
found using the relations stated above
 Operating Point
• For any transistor the resulting DC current and
voltage establish an operating point on the
characteristic curves
• A region around this point will be used for
amplification purpose
• Since this point is fixed on the characteristic
curves for any given DC values, hence it is
known as quiescent point or Q-point
• For every transistor a biasing circuit is designed
• This biasing circuit is designed in such a way as to make the device
operational on a particular Q-point with in the active or linear
region
• For amplification purposes, it is necessary that while biasing the
device, the operational point is chosen in such a way that the
following regions are avoided
– Saturation region
– Cut-off region
– Maximum power constraint
• Another important biasing factor is
the temperature
• Increase in temperature increases
transistor’s current gain (β) and
leakage current ICEO
• This can change the operating
condition set previously by the
biasing network
• Hence the network design must
provide high degree of temperature
stability
Best possible point
of operation. A
proper input signal if
amplified in this Point of operation
region will not drive too close to
the device into non- maximum power
linear regions. and voltage level
Largest possible
current and voltage
swing.

No bias → Device
is completely OFF

Q-point too close to non-linear

regions. An excessively large signal
might drive transistor in to cut-off or
saturation
Operation in Linear, Cut-off and
Saturation Regions
 Types of Transistor Bias Configuration
• Fixed Bias Configuration
– Also called base bias
• Emitter Bias Configuration
• Voltage Divider Bias Configuration
• Collector Feedback Configuration
• Emitter-follower Configuration
• Common-base Configuration
• Also some other miscellaneous configurations
 Fixed Bias Configuration
• Also known as base bias
• For DC analyses, network can be isolated from AC by
replacing capacitors with an open circuit
• Calculations will show that RB will affect both IB and IC
 Example 4.1
• Find IBQ, ICQ, VCEQ, VB, VC & VBC
 Fixed Bias & Transistor Saturation
• For a given design, saturation gives •
you the maximum value of the
current
• A change in design may drop or raise
the saturation level
Once ICSat is known, we have an idea
of maximum possible value of
collector current for the chosen
design and the level to stay below if
we expect linear amplification

Approximation

Actual Approximate
 Load Line Analysis - Fixed Bias
• Plot the network output characteristics
• Write the KVL equation for output
– Superimpose the curve defined by the equation on output
characteristics of the network
• Intersection of the two curves define actual operating
conditions or operating point for the network
• Load line basically represents response of a linear circuit to
which a non linear device in question is connected
• The operating point or the Q-point is the point where the
parameters of linear circuit match with parameters of the
non-linear device depending upon how they are connected
• In a fixed bias network, RC will define the slope of network
equation
– Smaller RC (i.e; load resistance in this case) → Steeper curve
 slope Y-intercept

Fixed VCC and fixed RC

IB changes so IC changes

Fixed VCC and fixed IB Fixed RC and fixed IB

RC changes so IC changes VCC changes so IC changes
 Example 4.3
• Given the load line, determine the required
values of VCC, RC and RB
 Emitter-Bias Configuration
• Emitter is not grounded directly but
through a resistor
• The inclusion of emitter resistor provides
greater stability to the DC bias against
temperature changes
• Even if there is a change in temperature or
transistor’s β , DC voltages and DC currents
remain close to where they were set
originally
• Procedure for analysis is the same as that
for fixed-bias configuration
– VCC can be separated for input and output
loops
– Calculations can be performed separately
for input and output loops
• The resistor RE always appears (β + 1) times
greater than RE to the input (to be proved
during analysis)
 Example 4.4, Pg: 172
• Find IB, IC, VCE, VC, VE, VB, VBC
 Stability of Emitter-Bias: Example 4.5, pg: 173

• IC increases by 100% due to 100% • IC increases by 81% due to 100%

increase in β change in β
• IB remains the same • Unlike fixed-bias, in emitter-bias IB
• VCE decreases by 76% also decreases to reduce the
overall effect of β on IC
• VCE decreases by 35%
• Hence for the same change in β, Emitter-bias is more stable than Fixed-bias
 Emitter-bias & Transistor Saturation
• Analysis are performed in the same
manner as were performed for
Fixed-bias
• At saturation, VCE is approximated
to zero and a short is inserted
between collector and emitter
• The addition of emitter resistance
reduces the level of collector current
below the one obtained with fixed-
bias configuration using the same
collector resistor
 Load Line Analysis: Emitter-Bias
• The load line analysis are almost the same as that of
fixed-bias
• Different levels of IBQ will obviously move the Q-point
up and down the load line

RE and RB can be adjusted to fix IBQ at

any point of interest on characteristic
curves
 Voltage-Divider Bias Configuration
• The most popular bias configuration for a BJT
• ICQ and VCEQ were dependant on β in previous
configurations
– β is temperature dependant so change in β would change
the Q-point
• Voltage-divider bias is a configuration that is less
dependant on β or in fact independent of β
– Lesser sensitivity to changes in β
• Once the circuit bias is designed and operational then
for any change in β, level of IBQ will change but the
operating point (i.e; Q-point) defined by ICQ and VCEQ
will remain fixed
 Methods for Analysis
• There are two methods for analyzing a voltage-
divider bias circuit
• Exact Method
– Can be applied to any voltage-divider bias
configuration
• Approximate Method
– Can be applied only if specific conditions are satisfied
– More direct analysis
– Lesser time and energy required for calculations
– Can be applied to majority but not all situations
 Exact Analysis
• Thevenin equivalent
for the input circuit
is drawn
 Example 4.8, Pg: 178
• Find ICQ and VCEQ
 Approximate Analysis
• Applicable under certain conditions
 We know that Ri = (1 + β)RE
 Ri >> R2
 IB ≈ 0
 Hence, I1 = I2 >> IB
• Thus R1 and R2 are series elements
• Ri is equivalent resistance between base and
ground for a transistor with emitter
resistance
• But the most important condition required
for applying the approximate model is
 βRE ≥ 10R2
• Calculations for voltages and currents using
approximate analysis will indicate that β will
not appear during calculations
 Hence, Q-point will be independent of β
 Example 4.9, Pg: 179
• Repeat example 4.8 using approximate
analysis
 Example 4.10, pg: 180
• Repeat the exact analysis of example 4.8 for a
β value reduced to 50 and compare the results
for ICQ and VCEQ

β = 50
 Example 4.11, Pg: 181
• Determine ICQ and VCEQ using exact and
approximate techniques
 Transistor Saturation & Load Line
Analysis
• The output circuits of voltage-divider and
emitter-bias are identical
– So, the technique and formulas for finding the
saturation current ICsat and the load line analysis
will also be same
 Collector Feedback Configuration
• Stability of the Q-point against
changes in β can also be achieved
by introducing a feedback path
from collector to base

• The sensitivity to changes in β

would be less as compared to
fixed bias and emitter bias

• Due to the feedback path, the

collector resistor RC in also
reflected back in to input loop
• Having seen different circuits for BJT biasing
networks, a general format for IB and ICQ is

• Where
− V’ = VCC – VBE for
• Fixed-bias, emitter-bias and collector feedback bias
− R’ = 0 for fixed bias
− R’ = (β + 1)RE or βRE in emitter bias
− R’ = RE + RC in collector feedback bias
• As a general rule, if βR’ >>RB ;Q-point will be less
sensitive to changes in β
• R’ is typically larger for a collector feedback
configuration than for an emitter-bias configuration
 Example 4.12, Pg: 184
• Find ICQ and VCEQ
 Example 4.13, Pg: 185
• Repeat example 4.12 for a β = 135 (50% increase
in β). Also find VC
– Greater β means greater magnitude of βR’ as
compared to RB and thus greater stability or lesser
sensitivity of Q-point against the changes in β
Saturation Conditions & Load Line
• Once the approximation IC’ = IC is made then
– Equation for saturation current is the same as
obtained for voltage-divider bias and emitter-bias

– Using the same approximation for IC , the load line

obtained will be similar to the one obtained for
voltage-divider bias and emitter-bias
 Additional Configurations
• Emitter Follower Configuration
– Output across emitter leg as long as their a
resistor connected to emitter leg
– Collector is at AC ground
• Common Base Configuration
– Two power supplies are used
• One for driving input of BJT
• One for driving output of BJT