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IRFP250N
HEXFET® Power MOSFET
l Advanced Process Technology D
l Dynamic dv/dt Rating VDSS = 200V
l 175°C Operating Temperature
l Fast Switching RDS(on) = 0.075Ω
l Fully Avalanche Rated G
l Ease of Paralleling ID = 30A
l Simple Drive Requirements S
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized device design that
HEXFET Power MOSFETs are well known for, provides the designer with an
extremely efficient and reliable device for use in a wide variety of applications.
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.7
RθCS Case-to-Sink, Flat, Greased Surface 0.24 ––– °C/W
RθJA Junction-to-Ambient ––– 40
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10/7/04
IRFP250N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 200 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.26 ––– V/°C Reference to 25°C, I D = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.075 Ω VGS = 10V, ID = 18A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 17 ––– ––– S VDS = 50V, ID = 18A
––– ––– 25 VDS = 200V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 160V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Qg Total Gate Charge ––– ––– 123 ID = 18A
Qgs Gate-to-Source Charge ––– ––– 21 nC VDS = 160V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 57 VGS = 10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 14 ––– VDD = 100V
tr Rise Time ––– 43 ––– ID = 18A
ns
td(off) Turn-Off Delay Time ––– 41 ––– RG = 3.9Ω
tf Fall Time ––– 33 ––– RD = 5.5Ω, See Fig. 10
Between lead, D
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact S
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, I S = 18A, VGS = 0V
trr Reverse Recovery Time ––– 186 279 ns TJ = 25°C, I F = 18A
Qrr Reverse Recovery Charge ––– 1.3 2.0 µC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by ISD ≤ 18A, di/dt ≤ 374A/µs, VDD ≤ V(BR)DSS,
max. junction temperature. (See Fig. 11) TJ ≤ 175°C
Starting TJ = 25°C, L = 1.9mH Pulse width ≤ 300µs; duty cycle ≤ 2%.
RG = 25Ω, IAS = 18A. (See Figure 12)
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IRFP250N
1000 1000 VGS
VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V
7.0V 7.0V
6.0V 6.0V
100 5.5V 5.5V
5.0V 100 5.0V
BOTTOM 4.5V BOTTOM 4.5V
10
10
4.5V
1 4.5V
1
0.1
1000 3.5
RDS(on) , Drain-to-Source On Resistance
ID = 30A
I D , Drain-to-Source Current (A)
3.0
100
2.5
TJ = 175° C
(Normalized)
2.0
10
1.5
TJ = 25 ° C
1.0
1
0.5
V DS = 50V
20µs PULSE WIDTH VGS = 10V
0.1 0.0
4.0 5.0 6.0 7.0 8.0 9.0 10.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( ° C)
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IRFP250N
5000 16
VGS = 0V, f = 1 MHZ ID = 18A
V DS= 160V
Ciss = Cgs + Cgd, Cds SHORTED
3000
Ciss
8
2000
Coss
4
1000
Crss
0 0
0 20 40 60 80 100
1 10 100 1000
QG , Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
1000 1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
ISD , Reverse Drain Current (A)
100
TJ = 175 ° C 100
10us
10
100us
TJ = 25 ° C 10
1
1ms
TC = 25 °C
TJ = 175 °C 10ms
V GS = 0 V Single Pulse
0.1 1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1 10 100 1000
VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V)
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IRFP250N
RD
35 VDS
35
VGS
30 D.U.T.
30 RG
+
V
ID , Drain Current (A)
- DD
ID , Drain Current (A)
25
25
10V
20 Pulse Width ≤ 1 µs
20 Duty Factor ≤ 0.1 %
15
15 Fig 10a. Switching Time Test Circuit
10
10 VDS
90%
5
5
0
0 25 50 75 100 125 150 175
25 50 T 75
, Case100 125
Temperature (150
° C) 175 10%
TC C
, Case Temperature ( ° C) VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms
Case Temperature
1
Thermal Response(Z thJC )
D = 0.50
0.20
0.1
0.10
PDM
0.05
t1
0.02 SINGLE PULSE
(THERMAL RESPONSE) t2
0.01
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)
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IRFP250N
RG D.U.T +
- VDD 400
IAS A
20V
tp 0.01Ω
V(BR)DSS
tp 0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( ° C)
I AS
50KΩ
12V .2µF
QG .3µF
10 V +
V
D.U.T. - DS
QGS QGD
VGS
VG 3mA
IG ID
Charge Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
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IRFP250N
Peak Diode Recovery dv/dt Test Circuit
+
- +
-
RG • dv/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS=10V *
Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD
Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5% ISD
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TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 10/04
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/