ME561 Lecture 1 Introduction

ME/EE 561 Design of Digital Control Systems
Winter 2012
Professor Huei Peng
G036 Auto Lab

hpeng@umich.edu
734-936-0352
Office hours: Monday 3:35-4:30, Wednesday4:30-5:35

or by appt.
Copyright © G.Chiu and H.Peng ME561 Lecture1- 1
Lecture 1-- Introduction and Motivation
• Why Digital Control (Computer Controlled)
Systems
• About this course
– Objectives
– Course content
– Grading policy
– HW, Exams, Final project
• Basics of Digital Control Systems

ME461
EE460
ME561
EE561

Motivation for “Controls”
• Feedback control has a long history which began with the
early desire of humans to harness the forces of nature,
improve productivity, and to avoid
hazardous/laborious/repetitive work.
• Watt’s Fly Ball Governor had a major impact on the
industrial revolution (mechanical control).
• Most modern systems (aircrafts, automobiles, production
lines, CD players, etc.) could not operate without the aid of
control systems.
Photos from G. Goodwin’s lecture slides

Evolution of Control Systems
• Mechanical control systems
– e.g., Watt’s Fly Ball Governor
• Analog (electrical/electronics) control systems

– e.g., Op-amp plus RC circuits based controllers.
• Digital (computer) control systems

– Apparently a lot more flexible than the two types above
– computer, DSP, microprocessor

Computer Controlled Systems
• Direct Digital Control (1960s)—implementation
of PID control algorithms on large systems
(chemical, power plants, space, military).
• Now, complex and intelligent algorithms.
From: W. Powers, AVEC 2000

Microprocessor Based Control Systems
--example on motor control
Source: http://www.ti.com/sc/docs/psheets/diagrams/dmc.htm

AD and DA
“Digital” control system deals with digitized
(discretized) signals.
AD/DA devices translate continuous signals to/from

digital signals.
Output
y u e + r
Plant D/A Computer A/D
Reference
–
Clock

Two Forms of Discretizations
Sampling (discretize in time)
Quantization (discretize in magnitude)
u(t) Discrete
u(kT)
Signal
u
Continuous
Average u(t) Signal
kT
1 2 3 4 5 6 7 8 9 10

Inherently Discrete-Time (Sampled)
Systems
• Economic Systems
• Radar, GPS
• Accurate emission measurement of internal
combustion engines, or some medical sensors
• Internal combustion engines control in general
• Signals transmitted in nervous systems
• Systems with embedded computers,
microprocessors or clocks

Objective of This Course
• To introduce the concepts of sampling, discrete-
time signals/systems, and the analysis and
synthesis of digital control systems
– Upon completion of this course, you should be able to
construct discrete-time models, design digital control
algorithms and analyze the openloop and closed-loop
behavior.

This Course is NOT
• EECS 461 Embedded Control Systems

• ME 552 Mechatronics System Design
• MIT 6.111 Introductory Digital Systems

Laboratory
http://ocw.mit.edu/OcwWeb/Electrical-Engineering-and-Computer-Science/index.htm

Course Material
• There is no textbook—course pack provided
• Reference books
– Computer Controlled Systems-Theory and Design, Prentice-Hall, 1997
(3rd edition), Astrom, K. J. and Wittenmark, B.
http://www.amazon.com/exec/obidos/tg/detail/-/0133148998/103-5327290-9742228?v=glance
– Discrete-Time Control Systems, Prentice-Hall, 1995 (2nd edition), K.

Ogata.
http://www.amazon.com/exec/obidos/tg/detail/-/0130342815/103-5327290-9742228?v=glance

Major course content
Chapter 1 Introduction to Computer Controlled Systems
Chapter 2 Sampled Data Analysis
Chapter 3 The Z-Transform and the Difference Equations
Chapter 4 Discrete-Time System Representation
Chapter 5 Analysis of Discrete-Time Systems
Chapter 6 Design of Discrete Time Controller—
Input/Output Approaches
Polynomial Approaches
State Space Approaches
Chapter 9 Linear Quadratic Optimal Control
Chapter 10 Optimal Linear Feedback of Stochastic Systems
Chapter 11 Optimal Design Methods: Input/Output Approach

CTool Course Web Site
• https://ctools.umich.edu/portal

Grading Policy
• Grading: Homeworks 45%
Midterm 20%
Final 35%

Grading Policy (cont.)
• Homework: 7-8 HW assignments. Due at the end
of class on the due date. Homework will be accepted
up to 48 hours late with a 25% penalty for each 24
hours. Standard Michigan Honor Code applies.
tentative
• Exams: Midterm: Mar. 5 (Tue.) in class
Final: April. 25 (Wed.) 1:30-3:30pm
No make-up exam.
Regrade request within 3 days in writing
(no exceptions!!)

Competing Resources
• Better Sensors
Provide better Vision
 Better Actuators
Provide more Muscle
 Better Control
Provides more finesse by combining sensors and
actuators in more intelligent ways

MATLAB/SIMULINK
http://www.engin.umich.edu/group/ctm/ or http://www.engin.umich.edu/class/ctms/

Ex1_0 A Useful MATLAB Command Force ->Volt
Kfd
4
feed->ft
Feed per tooth
Vf
Kfs 1
1 Ka -K- 2
tau_fs.s+1 1 f(u) 1
Vcf
Saturation Zero-Order Feed sl ide Sam pl ing Feed Force
Volt am p
Feed force
Hol d
F stiffness
Sf
Vz 2
Kzs 1 1 f(u) 2
2 Ka
Z Force
Vcz tau_zs.s+1 s 1 Z force
Saturation1 Zero-Order Integrator Sam p
Volt am p1 Z sl ide
Hold1 3
Z sti ffness delta_Z
d_nom
nom ianl depth Sz
3
Disturbance depth Example from 2001 machining project
[A_c, B_c, C_c, D_c] = linmod(‘Ex1_0’)

[A_d, B_d, C_d, D_d] = dlinmod(‘Ex1_0’, Ts)
3x3 (why?) 4x3 (why?)

Note the possibility to linearize at non-zero x and u
([A,B,C,D]=LINMOD('SYS',X,U), see ‘help linmod’)
Discrete-Time Design by Emulation
• A simple way to design a discrete-time control
system is to start with classical techniques to
design a continuous-time compensator for a
plant.
• The continuous-time compensator can then be

approximated by a discrete-time, sampled-data
system. This process is known as emulation.

Emulation (cont.)
y Plant u Controller e + r
G(s) C(s)
–
Emulation (indirect design)

Sample and hold
 C(s)
y u(t) u(kT) Digitized e(kT) e(t) + r

G(s) D/A Control A/D
T
Algorithm –
Clock

Sample and Hold
Discrete-Time Control Systems, Ogata

A/D
• Several circuit design types
– Successive-approximation—n clock cycles for n-bit accuracy
– (Single-slope) Integration
– Counter (voltage to frequency)
– Parallel (Flash) encoding
Figure 1-9 from Discrete-Time Control Systems, Ogata
The Art of Electronics, Horowitz and Hill, pp.415

D/A
• Weighted resistors
• R-2R ladder circuit
The Art of Electronics, Horowitz and Hill, pp.410-411

Emulation Methods
• Approximate continuous-time operations
(e.g., differentiation) with discrete-time
operations (e.g., difference).
– (Forward) Euler
– Trapezoidal with Pre-warp
– Matched pole/zero
– Zero-Order Hold (ZOH)

Euler Approximation
x x ( k  1)  x ( k )
x  lim x ( k ) 
t  0  t T
where
T  tk 1  tk (the sampling period in seconds),

tk  kT ( for a constant sampling period ),
k is an integer,
x ( k ) is the value of x at time tk , and
x ( k  1) is the value of x at time tk 1.

Ex1_1 Emulation Using Euler Approximation
U ( s) sa
G(s) C(s) C( s )  K
– E( s) sb
( s  b )U ( s )  K ( s  a ) E ( s ) u  b u  K ( e  a e )
Euler approximation:
x ( k  1)  x ( k )
x ( k ) 
T
u( k  1)  u( k )
 b  u( k )  K
LM
e( k  1)  e( k )
 a  e( k )
OP
T NT Q
u( k  1)  (1  bT )  u( k )  K ( aT  1)  e( k )  K  e( k  1)
or u ( k )  (1  b T )  u ( k  1)  K ( a T  1)  e ( k  1)  K  e ( k )

Ex1_2 Simulation of Euler-Emulated Controller
Lead compensator
G(s) C(s)
–
1 s2
G( s)  C( s )  50
s( s  1) s  10
x o x x
Implement Euler-emulated digital controller at 5Hz, 10Hz and 30Hz

Ex1_2 MATLAB Implementation of the
Continuous-Time System
% Construct the plant transfer function:
G_num = 1; 1
G_den = [1 1 0]; G( s) 
G = tf(G_num, G_den); s( s  1)
% Construct the compensator transfer function:

C_num = 50*[1 2];
C_den = [1 10]; s2
C( s )  50
C = tf(C_num, C_den); s  10
% The open-loop transfer function can be simply calculated by:
OP = G*C;
% The closed-loop transfer function is:

CL = feedback(OP,1,-1);
% Or you can use the following arithmetic:
CL1 = OP / (1+OP); y u e + r
Plant Controller
% Or G(s) C(s)
–
CL2 = OP * inv(1+OP);
% The unit step response of the closed-loop system:

[y,t] = step(CL);
Ex1_2 SIMULINK Implementation of the
Continuous-Time System
Scope Clock Time
1 50(s+2)
y
s 2 +s (s+10) Step
Response (Output)
Plant Lead Compensator

Ex1_2 Discrete-Time Controller
MATLAB: see notes Time step = T Coefficients depend
on T
t_digital
Clock Time
Scope
1 50z+50*(-0.9333) 1
y_digital
s 2 +s z-0.6667 1 Step
Response
Plant Zero-Order Discrete Implementation Sampling
(Output)
Hold
of the Lead Compensator

Ex1_2 Results
1.2 1.2
1 1
Unit Step Response
Unit Step Response

0.8 0.8
10Hz 0.6 0.6 30Hz

0.4 0.4
Analog Control Analog Control
Digital Control (10 Hz) Digital Control (30 Hz)
0.2 0.2
0 0
0 0.5 1 1.5 0 0.5 1 1.5
Time (sec) Time (sec)
1.6
1.2
1.4
1
1.2
1
Unit StepResponse
Unit StepResponse
0.8
5Hz 0.6
0.8
0.6
0.4
Analog Control 0.4
Digital Control (5 Hz) Analog Control
Sampled Digital Output (5 Hz)
0.2 Actual Output
0.2
0 0
0 0.5 1 1.5 0 0.5 1 1.5
Time (sec) Time (sec)
( ) (b)

Issues for Digital Control Systems
• Sampling time for emulated designs need to be
at least about 20-30 times closed-loop
bandwidth. Else inter-sampling behavior
becomes questionable
• Clock Dependency.
• Aliasing (Though briefly discussed in Chapter 1,
explained in more details in Chapter 2)
• Time delay due to Sample/Hold.
• Need for discrete-time models.

Ex1_3 Clock Dependency
 C(s)
u(t) u(kT) Digitized e(kT) e(t) a

D/A Control A/D C ( s) 
Algorithm
T sa
Clock
1 1
Step Response
Step Response
0.8 0.8
0.6 0.6
0.4 0.4
Reference Step
0.2 Continuous-Time Response 0.2
Digital Response
0 0
0 1 2 3 4 5 6 0 1 2 3 4 5 6
1 1
Step Response
Step Response
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0 0
0 1 2 3 4 5 6 0 1 2 3 4 5 6
Time Time

Common Myth
Since sampling will lose information in between
samples, digital control will always be inferior to its
continuous-time counter part, i.e. we cannot
expect better performance from digital control …
The above argument is true for emulation
implementation
Although sampling inevitably loses information,
digital control does pose some unique design
flexibilities that are not achievable through
continuous-time LTI control
Dead-beat control is one example.

Ex1_4 Dead-Beat Control
k
Plant: G (s)  k  G A (s) 
J s2
bK sb
Control law: U (s)  R(s)  K Y (s)
a sa
2  s 0   1
1
Y ( s)
GCL ( s )  
R( s )  s 0  3  2  s  0  2  2  s 0   1
y u r
Arm Amplifier Controller 1.5
GA(s) k C(s)
Position
1
0.5
Open-Loop Frequency Response 0

0 1 2 3 4 5 6 7 8 9 10
0.8
Analog Control Response
0.6
Digital Control Response
Velocity
0.4 Sampled Response
0.2
0
-0.2
0 1 2 3 4 5 6 7 8 9 10
1
Control Input
0.5
-0.5
-1
0 1 2 3 4 5 6 7 8 9 10
Time

Ex1_5 Aliasing/Beating
4.9 Hz sine wave
1 1
0.5 0.5
u(t) e(t)
Response
Input
0 C(s) 0
-0.5 -0.5
-1 -1
0 2 4 6 8 10  C(s) 0 2 4 6 8 10
Time
u(t) u(kT) Digitized e(kT) e(t)
D/A Control A/D
T
Algorithm
Clock
10 Hz sampling
1
1
0.5
Response
Sampled Input
0.5
0
0
-0.5
-0.5
-1
0 2 4 6 8 10 -1
Time 0 2 4 6 8 10
http://library.thinkquest.org/19537/java/Beats.html
4.9 Hz sine wave and 10Hz Sampling
Period = 1/4.9 sec = 204 msec

1
0.8
0.6
0.4
0.2
-0.2
-0.4
-0.6
-0.8
-1
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t=0:0.001:1;
y=sin(9.8*pi*t);
t2 = 0:0.1:1;
y2 = sin(9.8*pi*t2);
plot(t, y, t2, y2, 'ro')
Time Delay Due to Sample/Hold
u(kT) uH(t)
u
Average u(t)
kT
1 2 3 4 5 6 7 8 9 10
Delay ~ T/2 which deteriorates phase margin and

damping (see Example 1_6)
Ex1_6
ZOH signal uH(t)  T
u u(kT) u(t) u (t )  u  t  
 2
 L  
T
 s
U ( s)  e 2
U ( s )
Averaged signal u(t)
1 2 3 4 5 6 7 8 9 10 kT e

T
2
j  1 and  e 

T
2
j
T
 
2
• ZOH introduces additional phase lag, which reduces the

phase margin of the continuous-time design
– The amount of the phase lag is proportional to the frequency
• Device in digital feedback loop that reduces phase margin
– Hold circuits (D/A)
– Low-pass (anti-aliasing) filter

Effect of Delay due to S/H
• Suppose we implement a virtual stiffness of
F= -kx. Due to the delay, a hysteresis is
generated and positive energy may be added
to the controlled plant.
F
k
m1
Compression
x
Rebound

Digital Control Design Process
Indirect Design Physical Process Direct Design
(Plant)
Continuous-Time Select Sampling
Control Model Frequency
Detail Dynamic
Model
Continuous-Time
Controller Design (Simulation Model) Discrete-Time
Control Model
Performance
emulate Evaluation & Analysis
Discrete-Time
Controller Design
Select Sampling
Frequency
Performance
Performance Evaluation & Analysis
Evaluation & Analysis
Implementation

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ME/EE 561 Design of Digital Control Systems

Professor Huei Peng

G036 Auto Lab

Office hours: Monday 3:35-4:30, Wednesday4:30-5:35

Copyright © G.Chiu and H.Peng ME561 Lecture1- 2

Copyright © G.Chiu and H.Peng ME561 Lecture1- 3

Photos from G. Goodwin’s lecture slides

• Analog (electrical/electronics) control systems

• Digital (computer) control systems

Copyright © G.Chiu and H.Peng ME561 Lecture1- 5

From: W. Powers, AVEC 2000

Copyright © G.Chiu and H.Peng ME561 Lecture1- 6

Copyright © G.Chiu and H.Peng ME561 Lecture1- 7

AD/DA devices translate continuous signals to/from

Copyright © G.Chiu and H.Peng ME561 Lecture1- 8

Quantization (discretize in magnitude)

Copyright © G.Chiu and H.Peng ME561 Lecture1- 9

Copyright © G.Chiu and H.Peng ME561 Lecture1- 10

Copyright © G.Chiu and H.Peng ME561 Lecture1- 11

• EECS 461 Embedded Control Systems

• MIT 6.111 Introductory Digital Systems

Copyright © G.Chiu and H.Peng ME561 Lecture1- 12

– Discrete-Time Control Systems, Prentice-Hall, 1995 (2nd edition), K.

Copyright © G.Chiu and H.Peng ME561 Lecture1- 13

Copyright © G.Chiu and H.Peng ME561 Lecture1- 14

Copyright © G.Chiu and H.Peng ME561 Lecture1- 15

• Grading: Homeworks 45%

Copyright © G.Chiu and H.Peng ME561 Lecture1- 16

Copyright © G.Chiu and H.Peng ME561 Lecture1- 17

Copyright © G.Chiu and H.Peng ME561 Lecture1- 18

Copyright © G.Chiu and H.Peng ME561 Lecture1- 19

[A_c, B_c, C_c, D_c] = linmod(‘Ex1_0’)

3x3 (why?) 4x3 (why?)

• The continuous-time compensator can then be

Copyright © G.Chiu and H.Peng ME561 Lecture1- 21

Emulation (indirect design)

y u(t) u(kT) Digitized e(kT) e(t) + r

Copyright © G.Chiu and H.Peng ME561 Lecture1- 22

Discrete-Time Control Systems, Ogata

Copyright © G.Chiu and H.Peng ME561 Lecture1- 23

Figure 1-9 from Discrete-Time Control Systems, Ogata

The Art of Electronics, Horowitz and Hill, pp.415

• R-2R ladder circuit

The Art of Electronics, Horowitz and Hill, pp.410-411

Copyright © G.Chiu and H.Peng ME561 Lecture1- 25

Copyright © G.Chiu and H.Peng ME561 Lecture1- 26

T  tk 1  tk (the sampling period in seconds),

Copyright © G.Chiu and H.Peng ME561 Lecture1- 27

Copyright © G.Chiu and H.Peng ME561 Lecture1- 28

Implement Euler-emulated digital controller at 5Hz, 10Hz and 30Hz

Copyright © G.Chiu and H.Peng ME561 Lecture1- 29

% Construct the compensator transfer function:

% The closed-loop transfer function is:

% The unit step response of the closed-loop system:

Scope Clock Time

Copyright © G.Chiu and H.Peng ME561 Lecture1- 31

Copyright © G.Chiu and H.Peng ME561 Lecture1- 32

Unit Step Response

10Hz 0.6 0.6 30Hz

Copyright © G.Chiu and H.Peng ME561 Lecture1- 33

Copyright © G.Chiu and H.Peng ME561 Lecture1- 34

u(t) u(kT) Digitized e(kT) e(t) a

Copyright © G.Chiu and H.Peng ME561 Lecture1- 35

Copyright © G.Chiu and H.Peng ME561 Lecture1- 36