DIP PROBLEMS AND SOLUTIONS IN VARIABLE SPEED DRIVE INSTALLATIONS

J M Van Coller, R G Koch, Senior Lecturer, School of Electrical and Information Engineering, University of the
Witwatersrand, Private Bag 3, Wits, 2050, South Africa; e-mail: j.vancoller@ee.wits.ac.za

Corporate Consultant: Power Quality, Eskom Holdings (Pty) Ltd, Private Bag 40175, Cleveland, 2022, South Africa; e-
mail: robert.koch@eskom.co.za

Abstract

Voltage dips and interruptions represent the greatest power quality problems experienced by industry. Improving the
dip performance of variable speed drives will greatly lessen these dip problems. In this paper the dip behaviour of
conventional PWM drives is first discussed, followed by methods for improving their dip performance.

Introduction

The variable speed drive (VSD) response to a voltage dip is usually of the form where the control electronics trips the
drive to prevent drive problems during the dip. In particular cases, the dip can even result in damage to the drive.
Because of the above sensitivity to voltage dips, the variable speed drive is often targeted for improvement of its dip
performance. In this paper, issues related to PWM drives used to control squirrel cage induction motors will be
discussed as these are by far the most widely used.

Pwm drive behaviour during dips

Investigating the likelihood of the PWM drive surviving a particular voltage dip requires identifying the energy storage
within the drive. With the PWM drive, electrical energy storage is provided by the DC bus capacitance (figure 1)

Figure 1: Conventional PWM drive topology

During the voltage dip the DC bus capacitor discharges. At some pre-determined threshold voltage the control
electronics trips the drive to avoid drive problems such as supply-side overcurrents (figure 2).

Figure 2: Typical PWM drive behaviour during a dip

The DC bus capacitor discharge current is determined by the average power transferred via the DC bus and this is
determined by the average power transferred to the motor, which in turn is related to the product of the motor speed and
the mechanical torque produced by the motor.

Clearly the mechanical loading of the motor at the time of the dip plays a major role in determining the instant during
the dip at which the drive trips or whether the drive in fact survives a short-duration dip without tripping.

Quantifying the pwm drive behaviour during dips

Because of the wide variety of dips (magnitude, duration, negative sequence component), the wide variety of
mechanical loads and the wide variety of commercial drive responses to dips (hardware and software issues), it is very
difficult if not impossible to provide a simple model that describes the drive behaviour for all types of dips.

For simple balanced dips, immunity levels can be specified - for example in IEC 61000-4-11:2004 Testing and
measurement techniques – voltage dips, short interruptions and voltage variations immunity tests. These immunity
levels are specified for smaller equipment that draws 16A or less supply current but can still be used as a guide for
larger drives – shown below (figure 3) with NRS 048-2:2003 dip categories superimposed
Figure 3: IEC 61000-4-11 dip immunity levels

In some standards other less customer-friendly approaches are taken “The immunity levels of class … are the
compatibility levels of class … of IEC 61000-2-4 excluding short time dips and interruptions (which are not admissible
at most converters) …” !! – clause 5.5.1 of IEC 60146-2: 1999 - Self-commutated semiconductor converters including
d.c. converters.

Testing of variable speed drives (up to 65kW) for various dip characteristics and load characteristics is performed
regularly at the Wits/Eskom voltage dip test bed located at the University of the Witwatersrand (figure 4 and figure 5).

Figure 4: Wits/Eskom voltage dip test bed – block diagram

Figure 5: Wits/Eskom voltage dip test bed – equipment view

Specific pwm drive problems caused by dips

These include

· the drive trips on DC bus undervoltage (most common)

· the drive malfunctions because the voltage supply to the control electronics becomes inadequate – in the worst
case the control electronics is fed directly off the AC supply voltage with little energy storage, leading to the
drive tripping even though the DC bus retains sufficient voltage (operation off the DC bus or by adding
additional energy storage into the power supply of the control electronics solves this problem – the usual
approach adopted by drive manufacturers)

· the drive trips on overcurrent - upstream unbalance protection relays trip or supply fuses operate due to the
unbalance conditions present during the dip (if the unbalance relay settings and the fuse ratings are correct then
the only solution may be to trip the drive earlier in the dip)

· the supply-side diodes or supply-side fuses or inverter IGBTs fail (DC bus resonant overvoltages) because the
precharge circuitry fails to reset – the precharge circuit is bypassed when the drive is re-energized at the end of
the dip (this is a drive hardware and/or software problem and the only solution is to refer the problem back to
the drive manufacturer)(figure 6)

Figure 6: PWM drive precharge circuitry – one of the many possible configurations

Dip behaviour options that manufacturers provide for conventional pwm drives

These include

· trip on undervoltage – manual restart (figure 7)

Figure 7: PWM drive configured for manual restart

 · trip on undervoltage – automatic restart after the motor has stopped (figure 8)

Figure 8: PWM drive configured for automatic restart

· trip on undervoltage - automatic restart after the dip but before the motor has stopped (requires re-
synchronizing of the drive output voltages with the voltages across the motor terminals due to the flux trapped
in the motor) – flying restart (figure 9)(usually preferred)

Figure 9: PWM drive configured for flying restart

Methods for improving the dip performance of conventional pwm drives

These include

· increasing the DC bus capacitance – this is the most obvious solution but a significant amount of capacitance
needs to be added to make a significant difference in the drive dip performance – if the undervoltage trip
setting is 0,7pu and the drive trips after 100ms then to survive a 1s dip the DC bus capacitance would have to
be increased by a factor of at least ten.

· While rules-of-thumb relationships are used by manufacturers to match the amount of DC bus capacitance with
the drive size (in kW) some manufacturers are more generous than others.

· With some manufacturers, a standard chassis size may be used with a range of drive sizes. This results in
smaller drives having spare slots in the DC bus capacitor rack. The dip performance of these drives can be
improved (by a few 10‘s of milliseconds) by filling these spare slots. Obviously any modification to the drive
itself must be done with drive manufacturer approval.

· Where there are no spare slots, adding additional DC bus capacitance is very difficult since the additional DC
bus capacitors must be incorporated into the low inductance busbars associated with the power circuitry.

· A significant improvement in the dip performance can be achieved by using a larger PWM drive with a
particular motor (a factor of 2 to 3 in dip duration survivability can be achieved with this approach).

· operate off a UPS – batteries have a much larger energy storage capability compared with capacitors – an
expensive solution but should be considered for smaller, more critical drives which must be totally unaffected
by voltage dips

· reduce the DC bus undervoltage trip level – usually limited by manufacturer-supplied settings – maintaining
drive operation with lower supply voltage implies higher supply currents which further pull down the upstream
supply voltage during the dip. This makes the situation worse for adjacent loads and can even lead to network
voltage collapse

· regeneration back from the motor to the DC bus during the dip – by maintaining the DC bus voltage at a
healthy level during the dip the likelihood of a successful flying restart after the dip is increased

· increasing the load inertia – the drop in motor speed during the dip is reduced - followed by a flying restart – in
many situations the most attractive solution

Other possible approaches for improving the dip performance of pwm drives

These include
 · DC bus step-up chopper to maintain the DC bus voltage constant during the dip (figure 10) – also has the
disadvantage of pulling down the upstream supply voltage during the dip

Figure 10: PWM drive with DC bus step-up chopper – one of the many possible configurations

· PWM rectifier input (figure 11) also has the disadvantage of pulling down the upstream supply voltage during
the dip

Figure 11: PWM drive with supply-side PWM rectifier

· other energy storage methods on the DC bus (perhaps batteries – combined UPS/VSD)(figure 12) – preferably
sharing the batteries between multiple drives – more supply friendly during dips

Figure 12: PWM drive with DC bus battery

Conclusions

Understanding the behaviour of PWM variable speed drives during dips allows users to appreciate the various issues
involved. Methods for improving the dip performance of PWM drives are presented in this paper. The effect of these
methods on the upstream supply voltage during the dip also needs to be considered.