Signal flow/setup for External Interrupt EXTIx,  x = 0...

15
SYSCFG module GPIO module
PAx mode Pin
0
1 PBx PAx
EXTIx 2 PCx Configure PAx
: : as input (00)
:
Select source for EXTIx 15
: GPIOA –> MODER
4
4 bits each
0000 = PAx
0001 = PBx EXTI3 EXTI2 EXTI1 EXTI0
: SYSCFG –> EXTICR[0]

EXTI module
CPU NVIC
For all EXTIx registers: Bit n controls EXTIn
Enable NVIC_EnableIRQ(n); EXTI –> IMR
interrupt mask interrupt mask
EN EN (enable) EXTI –> FTSR
EN EXTI –> RTSR
IRQ EXTI –> PR
Pending EXTIx Pending EXTIx
EXTIx
flag flag edge
_ _ enable_irq( ); EXTIx
_ _ disable_irq( ); Set when EXTIx activates Set by HW enable select falling
Clear when intr. handler exits Clear by SW this and/or
-------------- interrupt rising edge
NVIC_ClearPendingIRQ(n);
1 of 45, passed
clear pending flag
by NVIC to CPU
NVIC_SetPriority(intr. #, value);
value = priority of intr. #