You are on page 1of 100

5 4 3 2 1

Power
SYSTEM PAGE REF.

PAGE Content
UX31A2 SCHEMATIC Revision R2.0 VCORE+GFX CORE
Page 80

1 Block Diagram System


2 System Setting Page 81
3
4
CPU(1)_DMI,PEG,FDI,CLK,MISC
CPU(2)_DDR3
BLOCK DIAGRAM
D
+1.05VS D
5 CPU(3)_CFG,RSVD,GND Page 82
6 CPU(4)_PWR
7 CPU(5)_XDP +1.5V & +0.75V
13 DDR3 TERMINATION Page 83
14 DDR3 ON-BOARD_A
15 DDR3 ON-BOARD_B +1.8VS
19 DDR3 CA_DQ VOLTAGE Page 84
20 PCH_SATA,IHDA,RTC,LPC
ं࣭࣡ࢽ࣑ࢽࣩࣾऋंऐ CPU ࣯࣐࣡࣡ࢽ࣓࣎࣍࣍࣪ࣥग
21 PCH_PCIE,CLK,SMB,PEG DDR3 on-board DIMM +0.8VS
22 PCH_FDI,DMI,SYS PWR Ivy Bridge ULV
16bits * 8 , 2 channel Page 87
23 PCH_DP,LVDS,CRT Page 13~15, 19
24 PCH_PCI,NVRAM,USB Page 3~7 Charger
25 PCH_CPU,GPIO,MISC
26 PCH_POWER,GND ࣣࣦ࣡ࢽकࣕ ࣦ࣡࣪ࢽक࣑ Page 88

27 PCH_POWER,GND Load Switch


28 PCH_SPI ROM,OTH Page 91
29 **** ࣦࣥ࣡࣪
30 EC_IT8572_BGA
31 EC_KB_TP_TPM HDMI type D
C

32 RST_Reset Circuit Page 48 5 C

38 AUD SPK-R-CONN MiniCard


44 BUG_Debug 2
WLAN + BT
45 LCD Panel_CMOS_DMIC Page 53
46 CRT_D-Sub Debug Conn. ࣭ࣦ࣠࣢ࢽक࣎
48 HDMI_type D Page 44 PCH 0 Chief River
50 FAN_Fan & Sensor Touchpad ࣩ࣭࣠
51 MiniCard_SSD EC Panther-point Page 64
Page 31
53 MiniCard_Wlan & BT ITE IT8572 BGA
56 LED_Indicator Keyboard USB 3.0 Port
57 DSG_Discharge
Page 30 HM76 ࣰࣲࣟࢽ࣏࣋࣍
Page 31 Page 69
58 PW_PROTECT SPI ROM
60 DC_DC & BAT Conn. Page 28 Page 20~28
63 B TO B CONN 1
65 ME_Conn & Skew Hole
68 USB3.0 FRESCO FL1009
69 USB3.0_One Port
ࣰࣲࣟࢽ࣐࣋࣍
ࣰࣱࣞࣞ

Daughter Board Conn


70 EC_PWR_SW 1
B 2 USB Port 3.0 (Chief River) B

MiniCard
SSD 0
3 CardReader Cardreader
Page 51
Page RTS5139-GR
56

80_PW_VCORE(RT8168B) ं࣭࣡ ࣞगࣾउआࣾ


81_PW_SYSTEM(RT8239B) Azalia Codec Jack
2
82_PW_I/O_VCCP(TPS51317) eDP conn with CMOS & D-Mic &
83_PW_I/O_DDR(RT8207M) Touch Panel 4
Realtek ALC269
84_PW_+1.8VS(RT8015B) Page 45 Speaker L
87_PW_+0.8VS(RT8015B) ࣡आऄआऑࣾउࢽ࣪आऀ
88_PW_CHARGER(BQ24725)
91. PWR_LOAD SWITCH
Speaker R
Page 38
Page 63 Daughter Board
A A

Discharge Circuit DC & BATT. Conn.


Page 57 Page 60

PWM Fan Reset Circuit Skew Holes


Page 50 Page 32 Page 65
Title : %ORFN'LDJUDP
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 1 of 99
5 4 3 2 1
5 4 3 2 1

PCH_IBEX Int.& Ext EC GPIO Use As Signal Name


PCH_CPT GPIO Use As Signal Name Pull up / down Power EC IT8572 GPA0 O PWR_LED#
Design IP Source: N53S
GPIO 00 Native NC_TP EXT PU 1K +3VS
GPIO GPIO 01 GPI EXT_SMI# INT PU 20K, EXT PU 10K +3VS GPIO GPA1 O SM_BUS ADDRESS :
GPA2 O CHG_FULL_LED# 3&+0DVWHU
GPIO 02 Native NC_TP EXT PU 10K +3VS
GPA3 O 60%XV'HYLFH 60%XV$GGUHVV
GPIO 03 GPI SATA_ODD_DA# EXT PU 10K +5VS
EXT PD 10K
GPA4 O
GPIO 04 GPI PCB_ID0
EXT PD 10K
GPA5 O FAN_PWM
GPIO 05 GPI PCB_ID1
INT PU 20K, EXT PU 10K
GPA6 -
GPIO 06 Native TMDS_HDMI_HPD +3VS
INT PU 20K, EXT PU 10K +3VS
GPA7 O KB_LED_PWM
D GPIO 07 GPI USB3_SMI# D
GPB0 O ME_AC_PRESENT
GPIO 08 Straping ICC_EN#
EXT PU 10K
GPB1 O
GPIO 09 Native EXT_SCI# +3VSUS
EXT PU 10K
GPB2 O +3VA_ON
GPIO 10 Native OC#6 +3VSUS
EXT PU 10K
GPB3 IO SMB0_CLK
GPIO 11 GPI EXT_SCI# +3VSUS
GPB4 IO SMB0_DAT (&0DVWHU 60% 60%XV$GGUHVV
GPIO 12 GPO
GPB5 O A20GATE 60%XV'HYLFH
GPIO 13 Native HDA_DOCK_RST#
GPB6 O RCIN# ',007(03 $K
GPIO 14 Native OC#7 EXT PU 10K +3VSUS
INT PD 20K, EXT PU 1K
GPB7 O PM_RSMRST# &387KHUPDO6HQVRU K
GPIO 15 GPO BT_LED +3VSUS
EXT PU 10K
GPC0
GPIO 16 Native SATA_DET#4 +3VS
INT PU 20K, EXT PD 10K
GPC1 IO SMB1_CLK
GPIO 17 GPI
EXT PU 10K
GPC2 IO SMB1_DAT
GPIO 18 Native CLK_REQ1# +3VS
INT PU 20K, EXT PU 10K +3VS
GPC3 O PM_PWRBTN#
GPIO 19 Native SATA1GP
EXT PU 10K
GPC4 I AC_IN_OC#
GPIO 20 Native CLK_REQ2# +3VS
EXT PU 10K
GPC5
GPIO 21 Native SATA0GP +3VS
EXT PU 10K
GPC6 I BAT1_IN_OC#
GPIO 22 GPO WLAN_LED +3VS
INT PU 20K
GPC7
GPIO 23 Native LPC_DRQ#1
EXT PU 10K
GPD0 I PWRLIMIT#_EC
GPIO 24 GPO +3VSUS
EXT PU 10K
GPD1 O CAP_LED#
GPIO 25 Native CLKREQ_USB3# +3VSUS
EXT PU 10K
GPD2 I BUF_PLT_RST# PCI Express USB Port
C
GPIO 26 Native CLK_REQ4# +3VSUS C
GPD3 O EXT_SCI# PCIE 1 USB 0 USB 3.0 Port
GPIO 27 Native DSW_WAKE# INT PU 20K
GPD4 O EXT_SMI# PCIE 2 Minicard WLAN USB 1 USB Port 1
GPIO 28 Straping WLAN_ON# INT PU 20K +3VSUS
GPD5 O OP_SD# PCIE 3 USB 2 Touch Panel
GPIO 29 Native SLP_LAN# EXT PU 10K +3VSUS
GPD6 I FAN0_TACH PCIE 4 USB 3.0 USB 3 Card Reader
GPIO 30 Native ME_SusPwrDnAck EXT PU 10K +3VSUS
GPD7 - PCIE 5 USB 4 CMOS Camera
GPIO 31 Native ME_AC_PRESENT_PCH INT PD 20K,EXT PU 10K +VCCPDSW
GPE0 O SUSC_EC# PCIE 6 USB 5 Bluetooth
GPIO 32 Native PM_CLKRUN# EXT PU 10K +3VS
GPE1 PCIE 7 USB 6
GPIO 33 Native HDA_DOCK_EN#
GPE2 O 1.5V_ON PCIE 8 USB 7
GPIO 34 Native STP_PCI# EXT PU 10K +3VS
GPE3 O BIOS_WP# USB 8
GPIO 35 GPO GPIO35_PCH
GPE4 I PWR_SW# SATA Port USB 9
GPIO 36 Native DMI_OVRVLTG INT PD 20K, EXT PU 200K+3VS
GPE5 I PM_SUSC# SATA 0 SATA SSD USB 10
GPIO 37 Native FDI_OVRVLTG INT PD 20K, EXT PD 100K
GPE6 I LID_SW_EC# SATA1 USB 11
GPIO 38 Native MFG_MODE EXT PU 10K +3VS
GPE7 SATA2 USB 12
GPIO 39 Native GFX_CRB_DET EXT PU 10K +3VS
GPF0 O PM_SYSPWROK SATA4 USB 13
GPIO 40 Native OC#1 EXT PU 10K +3VSUS
EXT PU 10K
GPF1 O 3VSUS_ON
GPIO 41 Native DIMM_SEL0 +3VSUS
EXT PU 10K
GPF2 - Device Identification
GPIO 42 Native DIMM_SEL1 +3VSUS
GPF3 O USB_CHARGE_ON# CPU Thermal Senser
GPIO 43 Native DIMM_SEL2 EXT PU 10K +3VSUS
GPF4 IO TP_CLK 1st 06G023123010 NCT7717U
GPIO 44 Native CLKREQ_GLAN# INT PU 20K, EXT PU 10K +3VSUS
B GPF5 IO TP_DAT 2nd B
GPIO 45 Native CLK_REQ6# EXT PU 10K +3VSUS
INT PU 20K, EXT PU 10K +3VSUS
GPF6 I PECI_EC
GPIO 46 Native CLK_REQ7# Memory Thermal Senser
EXT PU 1K
GPF7 O PCH_SPI_OV
GPIO 47 Native CLK_PEGA_REQ# +3VSUS 1st 06G023048020 G781-1
EXT PU 10K
GPG0 I ME_SusPwrDnAck
GPIO 48 GPIO TEST_SET_UP +3VS 2nd
EXT PU 10K
GPG1 I PM_SUSB#
GPIO 49 GPI SATA_DET#5 +3VS
EXT PD 10K
GPG2
GPIO 50 GPO GPU_RST#
INT PU 20K, EXT PU 10K
GPG6 -
GPIO 51 Straping PCI_GNT1# +3VS
EXT PU 10K
GPH0 IO PM_CLKRUN#
GPIO 52 Native PCI_REQ#2 +3VS
INT PU 20K
GPH1 O THRO_CPU#
GPIO 53 Native DGPU_PWM_SELECT#
EXT PD 1K
GPH2 O LCD_BACKOFF#
GPIO 54 GPO DGPU_PWR_EN#
INT PU 20K, EXT PD 1K
GPH3 O SUSB_EC#
GPIO 55 Straping STP_A16OVR
EXT PU 10K
GPH4 O USB_CHARGE_VBUS_EC
GPIO 56 Native CLK_PEGB_REQ# +3VSUS
EXT PD 100K
GPH5
GPIO 57 GPO BT_ON
EXT PU 2.2K
GPH6 I 5VSUS_PWRGD
GPIO 58 Native SML1_CLK +3VSUS
EXT PU 10K
GPI0 I Light_Sensor_AD
GPIO 59 Native OC#0 +3VSUS
EXT PU 2.2K
GPI1 I SUS_PWRGD
GPIO 60 GPO DRAMRST_PCH +3VSUS
GPI2 I ALL_SYSTEM_PWRGD
GPIO 61 Native PM_SUS_STAT#
GPI3 I CORE_PWRGD
GPIO 62 Native SUS_CLK#
GPI4 -
GPIO 63 Native SLP_S5#
A
INT PD 20K
GPI5 - A
GPIO[66:64] Native CLK_OUT[2:0]
INT PD 20K
GPI6 -
GPIO 67 Native
INT PU 20K
GPI7 I Adaptor_Sense
GPIO 68 GPO NC_TP
INT PU 20K, EXT PD 1K
GPJ0 O
GPIO 69 GPI NC_TP
INT PU 20K, EXT PU 1K
GPJ1 O PM_PWROK
GPIO[71:70] Native NC_TP +3VS
GPJ2 O
GPIO 72 Native PM_BATLOW# INT PU 20K, EXT PU 10K +3VSUS Title : 6\VWHP6HWWLQJ
EXT PU 10K
GPJ3 O
GPIO 73 Native CLK_REQ0# +3VSUS ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
EXT PU 10K
GPJ4 O 5VSUS_PWRON Size Project Name
GPIO 74 Native PCHHOT# +3VSUS Rev

EXT PU 2.2K
GPJ5 O DRAMRST_EC C 8;$ R2.0
GPIO 75 Native SML1_DATA +3VSUS Date: Tuesday, March 27, 2012 Sheet 2 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

FDI disable: (For discrete graphic) +VTT_CPU


U0301A
1. NC: G3 PEG_IRCOMP_R R0301 1 2 24.9Ohm 1%
PEG_ICOMPI
G1
PEG_ICOMPO
FDI_TX#[0:7],FDI_TX[0:7],VCC_AXGSENSE,VSS_AXGSENSE 22 DMI_TXN0 M2
DMI_RX#[0] PEG_RCOMPO
G4
22 DMI_TXN1 P6
D DMI_RX#[1] D
22 DMI_TXN2 P1
DMI_RX#[2]
2. Pull-down to GND via 1Kȍ ± 5% resistor: 22 DMI_TXN3 P10
DMI_RX#[3] PEG_RX#[0]
H22
PEG_RX#[1]
J21 Huron River PCIE support 2.5 GT/s, 5 GT/s and 8 GT/s
FDI_FSYNC[0:1],FDI_LSYNC[0:1],FDI_INT,GFX_IMON 22 DMI_TXP0 N3
DMI_RX[0] PEG_RX#[2]
B22
22 DMI_TXP1 P7 D21
~15mW power saving DMI_RX[1] PEG_RX#[3]

DMI
22 DMI_TXP2 P3 A19
DMI_RX[2] PEG_RX#[4]
3. Connected to GND: 22 DMI_TXP3 P11
DMI_RX[3] PEG_RX#[5]
D17
B14
PEG_RX#[6]
VCCAXG 22 DMI_RXN0 K1
DMI_TX#[0] PEG_RX#[7]
D13
22 DMI_RXN1 M8 A11
DMI_TX#[1] PEG_RX#[8]
4. Can be connected to GND directly: 22 DMI_RXN2 N4
DMI_TX#[2] PEG_RX#[9]
B10
22 DMI_RXN3 R2 G8
DMI_TX#[3] PEG_RX#[10]
DPLL_REF_CLK,DPLL_REF_CLK# PEG_RX#[11]
A8
22 DMI_RXP0 K3 B6
DMI_TX[0] PEG_RX#[12]
5. Connect to +V1.05S rail: 22 DMI_RXP1 M7
DMI_TX[1] PEG_RX#[13]
H8
22 DMI_RXP2 P4 E5
DMI_TX[2] PEG_RX#[14]
VCCFDIPLL 22 DMI_RXP3 T3
DMI_TX[3] PEG_RX#[15]
K7

K22
PEG_RX[0]
K19
eDP disable/Enable 22 FDI_TXN[7:0]
PEG_RX[1]
C21
FDI_TXN0 PEG_RX[2]
CFG[4]: FDI_TXN1
U7
FDI0_TX#[0] PEG_RX[3]
D19
W11 C19
FDI_TXN2 FDI0_TX#[1] PEG_RX[4]
Enable: Mount R0503, R0303=1K FDI_TXN3
W1
FDI0_TX#[2] PEG_RX[5]
D16

PCI EXPRESS -- GRAPHICS


AA6 C13
FDI_TXN4 FDI0_TX#[3] PEG_RX[6]
Disable: un-mount R0503, R0303=10Kohm FDI_TXN5
W6
FDI1_TX#[0] PEG_RX[7]
D12
V4 C11
FDI_TXN6 FDI1_TX#[1] PEG_RX[8]
Y2 C9
FDI1_TX#[2] PEG_RX[9]

Intel(R) FDI
FDI_TXN7 AC9 F8
FDI1_TX#[3] PEG_RX[10]
C8
PEG_RX[11]
22 FDI_TXP[7:0] C5
FDI_TXP0 PEG_RX[12]
U6 H6
FDI_TXP1 FDI0_TX[0] PEG_RX[13]
W10 F6
FDI_TXP2 FDI0_TX[1] PEG_RX[14]
W3 K6
FDI_TXP3 FDI0_TX[2] PEG_RX[15]
AA7
+1.5VS FDI_TXP4 FDI0_TX[3]
W7
FDI1_TX[0] PEG_TX#[0]
G22 PCIE AC Coupling Capacitors:
DRAMPWROK: OD, Ouput FDI_TXP5 T4 C23
FDI_TXP6 FDI1_TX[1] PEG_TX#[1]
AA3
FDI1_TX[2] PEG_TX#[2]
D23 1. 436735 PDG Page 39, 75nF~200nF
FDI_TXP7 AC8 F21
FDI1_TX[3] PEG_TX#[3]
2

+3V +3V
PEG_TX#[4]
H19 2. 431433 EMERALD LAKE Schematic 220nF
R0335 22 FDI_FSYNC0 AA11 C17
200Ohm FDI0_FSYNC PEG_TX#[5]
22 FDI_FSYNC1 AC12
FDI1_FSYNC PEG_TX#[6]
K15 3. 436735 PDG Page 41, 180nF~265nF
2

F17
R0334 PEG_TX#[7]
22 FDI_INT U11 F14
1

200Ohm FDI_INT PEG_TX#[8]


A15
PEG_TX#[9]
22 FDI_LSYNC0 AA10 J14
FDI0_LSYNC PEG_TX#[10]
AG8 H13
PR-001 22 FDI_LSYNC1
1

FDI1_LSYNC PEG_TX#[11]
M10
PEG_TX#[12]
F10
U0303 +VTT_CPU PEG_TX#[13]
D9
C PEG_TX#[14] C
22,30,58,80 ALL_SYSTEM_PWRGD 1 5 J4
INB VCC PEG_TX#[15]
2

2 R0302 1 2 24.9Ohm 1% AF3


22 H_DRAM_PWRGD INA eDP_COMPIO
3 4 DRAMPWROK R0336 R0357 AD2 F22
GND OUTY 1KOhm 1 eDP_HPD# eDP_ICOMPO PEG_TX[0]
22Ohm 2 AG11
eDP_HPD PEG_TX[1]
A23
74AHC1G09GW 45 eDP_HPD# D24
PEG_TX[2]
E21
1

PEG_TX[3]
45 EDP_AUXN AG4 G19
eDP_AUX# PEG_TX[4]
45 EDP_AUXP AF4 B18
eDP_AUX PEG_TX[5]
K17
PEG_TX[6]

DP
G17
3 PEG_TX[7]
D 45 EDP_TXN0 AC3 E14
Q0302 eDP_TX#[0] PEG_TX[8]
45 EDP_TXN1 AC4 C15
eDP_TX#[1] PEG_TX[9]
2N7002 45 EDP_TXN2 AE11 K13
1 eDP_TX#[2] PEG_TX[10]
57 SUSB_EC 45 EDP_TXN3 AE7 G13
G eDP_TX#[3] PEG_TX[11]
K10
2 S AC1
PEG_TX[12]
G10
45 EDP_TXP0 eDP_TX[0] PEG_TX[13]
45 EDP_TXP1 AA4 D8
eDP_TX[1] PEG_TX[14]
45 EDP_TXP2 AE10 K4
eDP_TX[2] PEG_TX[15]
45 EDP_TXP3 AE6
eDP_TX[3]

AV8062700839404

SKTOCC# (Socket RNX0304 close to CPU


Occupied): pulled U0301B
to ground on the CLK_CPU_BCLK_L
J3 1 0Ohm 2 RNX0304A CLK_CPU_BCLK 21
processor package BCLK CLK_CPU_BCLK#_L
H2 3 0Ohm 4 RNX0304B CLK_CPU_BCLK# 21 100 MHz, Come form PCH
BCLK#
CLOCKS
MISC

25 H_SNB_INV# F49
B PROC_SELECT# CLK_CPU_DREF B
DPLL_REF_CLK
AG3 1 0Ohm 2 RNX0306A CLK_DREF 21
AG1 CLK_CPU_DREF# 3 4 RNX0306B
DPLL_REF_CLK# 0Ohm CLK_DREF# 21
80 SNB_SKTOCC# C57
PROC_DETECT#
PROCHOT#: 0.15nS<Tr<0.44nS, BCLK_ITP
N59 CLK_ITP_BCLK 7
0.1ns<Tf<0.45ns (measured N58 CLK_ITP_BCLK# 7
BCLK_ITP#
between 0.7*VCCP and T0303 H_CATERR#
1 C49
CATERR#
0.3*VCCP
THERMAL

@
C0337 1 2 0.01UF/16V
30 PECI_EC A48 AT30 M_DRAMRST# 4
PECI SM_DRAMRST#
connected 80 H_PROCHOT_S# +VTT_CPU
43pF close BF44 SM_RCOMP0 R0323 1 2 140Ohm 1%
SM_RCOMP[0]
to the IMVP R0307 1 2 200Ohm H_PROCHOT_S#_R C45
PROCHOT# SM_RCOMP[1]
BE43 SM_RCOMP1 R0324 1 2 25.5OHM 1%
SM_RCOMP2 R0325 2 200Ohm 1%
DDR3
MISC

BG43 1
R0315 SM_RCOMP[2]
88,90 PWRLIMIT#_CPU 2 1 0Ohm H_PROCHOT_S# R0308 1 2 56OHM

SL0301 2 H_THRMTRIP#_R
25 H_THRMTRIP# 0402
1 D45
THERMTRIP# 5/20 Follow 2DPC DG 436175 Rev 0.6
1

+VTT_CPU
C0334 N53 XDP_PRDY# 7
PRDY#
43PF/50V N55 XDP_PREQ# 7
2

@ PREQ# XDP_TMS R0329 2 1 51Ohm


30 THRO_CPU# R0314 2 1 0Ohm @ L56 XDP_TDI R0330 2 1 51Ohm
TCK XDP_TCLK 7
C0336 1 2 0.01UF/16V L55 XDP_PREQ# R0331 2 1 51Ohm
TMS XDP_TMS 7
PWR MANAGEMENT

J58 XDP_TRST# 7
TRST#
JTAG & BPM

22 PM_SYNC# SL0302 1 2 PM_SYNC#_R C48 M60 XDP_TDI 7 XDP_TCLK R0332 1 2 51Ohm


0402 PM_SYNC TDI XDP_TRST# R0333
L59 XDP_TDO 7 1 2 51Ohm
C0335 TDO
1 2 0.01UF/16V

7,25 H_CPUPWRGD B46


UNCOREPWRGOOD
K58 XDP_DBRESET# 7,22
DBR#
2 1
10KOhm R0309
DRAMPWROK R0322 1 2 VDDPWRGOOD_R BE45 G58 XDP_OBS0 1 T0306
130Ohm 1% SM_DRAMPWROK BPM#[0] XDP_OBS1 T0307
E55 1
BPM#[1] XDP_OBS2 T0308
E59 1
BPM#[2] XDP_OBS3 T0309
The maximum rise/fall time of UNCOREPWRGOOD is 20 ns. BPM#[3]
G55 1
G59 XDP_OBS4 1 T0310
CPU_RST# BPM#[4] XDP_OBS5 T0311
D44 H60 1
T0302 RESET# BPM#[5] XDP_OBS6 T0312
1 J59 1
BPM#[6] XDP_OBS7 T0313
J61 1
BPM#[7]

A A

7,24,30,31,45,53,63 BUF_PLT_RST# R0310 2 1% 1 1.5KOhm AV8062700839404


1

R0311
750Ohm
1%
2

Title : &38B'0,3(*)',&/.0,6&
ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Wednesday, April 11, 2012 Sheet 3 of 99
5 4 3 2 1
5 4 3 2 1

Main Board
SDRAM 2DIE SDRAM 2DIE
M_A_CKE1 R0410 2 /2D 1 0Ohm M_A_CKE1_2DIE 13,14 M_B_CKE1 R0420 2 /2D 1 0Ohm M_B_CKE1_2DIE 13,15
M_A_CS#1 R0418 2 /2D 1 0Ohm M_A_CS#1_2DIE 13,14 M_B_CS#1 R0415 2 /2D 1 0Ohm M_B_CS#1_2DIE 13,15
M_A_ODT1 R0419 2 /2D 1 0Ohm M_A_ODT1_2DIE 13,14 M_B_ODT1 R0416 2 /2D 1 0Ohm M_B_ODT1_2DIE 13,15

D D
U0301C U0301D

14 M_A_DQ[63:0] 15 M_B_DQ[63:0] to Every DIMM and Termination


M_A_DQ0 AG6 M_B_DQ0 AL4
M_A_DQ1 SA_DQ[0] M_B_DQ1 SB_DQ[0]
AJ6 AU36 M_A_CLK_DDR0 13,14 AL1 BA34 M_B_CLK_DDR0 13,15
M_A_DQ2 SA_DQ[1] SA_CLK[0] M_B_DQ2 SB_DQ[1] SB_CLK[0]
AP11 AV36 M_A_CLK_DDR#0 13,14 AN3 AY34 M_B_CLK_DDR#0 13,15
M_A_DQ3 SA_DQ[2] SA_CLK#[0] M_B_DQ3 SB_DQ[2] SB_CLK#[0]
AL6 AY26 M_A_CKE0 13,14 AR4 AR22 M_B_CKE0 13,15
M_A_DQ4 SA_DQ[3] SA_CKE[0] M_B_DQ4 SB_DQ[3] SB_CKE[0]
AJ10 AK4
M_A_DQ5 SA_DQ[4] M_B_DQ5 SB_DQ[4]
AJ8 AK3
M_A_DQ6 SA_DQ[5] M_B_DQ6 SB_DQ[5]
AL8 AN4
M_A_DQ7 SA_DQ[6] M_B_DQ7 SB_DQ[6]
AL7 R0414 AR1
M_A_DQ8 SA_DQ[7] 75Ohm M_B_DQ8 SB_DQ[7] R0417 75Ohm
AR11 AU4
M_A_DQ9 SA_DQ[8] M_A_CLK_DDR1 M_B_DQ9 SB_DQ[8] M_B_CLK_DDR1
AP6 AT40 1 2 AT2 BA36 1 2
M_A_DQ10 SA_DQ[9] SA_CLK[1] M_A_CLK_DDR#1 M_B_DQ10 SB_DQ[9] SB_CLK[1] M_B_CLK_DDR#1
AU6 AU40 AV4 BB36
M_A_DQ11 SA_DQ[10] SA_CLK#[1] M_A_CKE1 M_B_DQ11 SB_DQ[10] SB_CLK#[1] M_B_CKE1
AV9 BB26 BA4 BF27
M_A_DQ12 SA_DQ[11] SA_CKE[1] M_B_DQ12 SB_DQ[11] SB_CKE[1]
AR6 AU3
M_A_DQ13 SA_DQ[12] M_B_DQ13 SB_DQ[12]
AP8 AR3
M_A_DQ14 SA_DQ[13] M_B_DQ14 SB_DQ[13]
AT13 AY2
M_A_DQ15 SA_DQ[14] M_B_DQ15 SB_DQ[14]
AU13 BA3
M_A_DQ16 SA_DQ[15] M_B_DQ16 SB_DQ[15]
BC7 BE9
M_A_DQ17 SA_DQ[16] M_B_DQ17 SB_DQ[16]
BB7 BB40 M_A_CS#0 13,14 BD9 BE41 M_B_CS#0 13,15
M_A_DQ18 SA_DQ[17] SA_CS#[0] M_A_CS#1 M_B_DQ18 SB_DQ[17] SB_CS#[0] M_B_CS#1
BA13 BC41 BD13 BE47
M_A_DQ19 SA_DQ[18] SA_CS#[1] M_B_DQ19 SB_DQ[18] SB_CS#[1]
BB11 BF12
M_A_DQ20 SA_DQ[19] M_B_DQ20 SB_DQ[19]
BA7 BF8
M_A_DQ21 SA_DQ[20] M_B_DQ21 SB_DQ[20]
BA9 BD10
M_A_DQ22 SA_DQ[21] M_B_DQ22 SB_DQ[21]
BB9 BD14
M_A_DQ23 SA_DQ[22] M_B_DQ23 SB_DQ[22]
AY13 BE13
M_A_DQ24 SA_DQ[23] M_B_DQ24 SB_DQ[23]
AV14 AY40 M_A_ODT0 13,14 BF16 AT43 M_B_ODT0 13,15
M_A_DQ25 SA_DQ[24] SA_ODT[0] M_A_ODT1 M_B_DQ25 SB_DQ[24] SB_ODT[0] M_B_ODT1
AR14 BA41 BE17 BG47
M_A_DQ26 SA_DQ[25] SA_ODT[1] M_B_DQ26 SB_DQ[25] SB_ODT[1]
AY17 BE18
M_A_DQ27 SA_DQ[26] M_B_DQ27 SB_DQ[26]
AR19
SA_DQ[27]
BE21
SB_DQ[27]
Refer to SO-DIMM Single Rank x8 Design
M_A_DQ28 BA14 M_B_DQ28 BE14 SA_CKE1 / SA_CS1 / SA_ODT1 are all NC
M_A_DQ29 SA_DQ[28] M_B_DQ29 SB_DQ[28]
AU14 BG14
M_A_DQ30 SA_DQ[29] M_B_DQ30 SB_DQ[29]
BB14 M_A_DQS#[7:0] 14 BG18 M_B_DQS#[7:0] 15
M_A_DQ31 SA_DQ[30] M_A_DQS#0 M_B_DQ31 SB_DQ[30] M_B_DQS#0
BB17 AL11 BF19 AL3
M_A_DQ32 SA_DQ[31] SA_DQS#[0] M_A_DQS#1 M_B_DQ32 SB_DQ[31] SB_DQS#[0] M_B_DQS#1
BA45 AR8 BD50 AV3
M_A_DQ33 SA_DQ[32] SA_DQS#[1] M_A_DQS#2 M_B_DQ33 SB_DQ[32] SB_DQS#[1] M_B_DQS#2
AR43 AV11 BF48 BG11
M_A_DQ34 SA_DQ[33] SA_DQS#[2] M_A_DQS#3 M_B_DQ34 SB_DQ[33] SB_DQS#[2] M_B_DQS#3
C AW48 AT17 BD53 BD17 C
M_A_DQ35 SA_DQ[34] SA_DQS#[3] M_A_DQS#4 M_B_DQ35 SB_DQ[34] SB_DQS#[3] M_B_DQS#4
BC48 AV45 BF52 BG51
DDR SYSTEM MEMORY A

SA_DQ[35] SA_DQS#[4] SB_DQ[35] SB_DQS#[4]

DDR SYSTEM MEMORY B


M_A_DQ36 BC45 AY51 M_A_DQS#5 M_B_DQ36 BD49 BA59 M_B_DQS#5
M_A_DQ37 SA_DQ[36] SA_DQS#[5] M_A_DQS#6 M_B_DQ37 SB_DQ[36] SB_DQS#[5] M_B_DQS#6
AR45 AT55 BE49 AT60
M_A_DQ38 SA_DQ[37] SA_DQS#[6] M_A_DQS#7 M_B_DQ38 SB_DQ[37] SB_DQS#[6] M_B_DQS#7
AT48 AK55 BD54 AK59
M_A_DQ39 SA_DQ[38] SA_DQS#[7] M_B_DQ39 SB_DQ[38] SB_DQS#[7]
AY48 BE53
M_A_DQ40 SA_DQ[39] M_B_DQ40 SB_DQ[39]
BA49 BF56
M_A_DQ41 SA_DQ[40] M_B_DQ41 SB_DQ[40]
AV49 BE57
M_A_DQ42 SA_DQ[41] M_B_DQ42 SB_DQ[41]
BB51 BC59
M_A_DQ43 SA_DQ[42] M_B_DQ43 SB_DQ[42]
AY53 AY60
M_A_DQ44 SA_DQ[43] M_B_DQ44 SB_DQ[43]
BB49 M_A_DQS[7:0] 14 BE54
M_A_DQ45 SA_DQ[44] M_A_DQS0 M_B_DQ45 SB_DQ[44]
AU49 AJ11 BG54 M_B_DQS[7:0] 15
M_A_DQ46 SA_DQ[45] SA_DQS[0] M_A_DQS1 M_B_DQ46 SB_DQ[45] M_B_DQS0
BA53 AR10 BA58 AM2
M_A_DQ47 SA_DQ[46] SA_DQS[1] M_A_DQS2 M_B_DQ47 SB_DQ[46] SB_DQS[0] M_B_DQS1
BB55 AY11 AW59 AV1
M_A_DQ48 SA_DQ[47] SA_DQS[2] M_A_DQS3 M_B_DQ48 SB_DQ[47] SB_DQS[1] M_B_DQS2
BA55 AU17 AW58 BE11
M_A_DQ49 SA_DQ[48] SA_DQS[3] M_A_DQS4 M_B_DQ49 SB_DQ[48] SB_DQS[2] M_B_DQS3
AV56 AW45 AU58 BD18
M_A_DQ50 SA_DQ[49] SA_DQS[4] M_A_DQS5 M_B_DQ50 SB_DQ[49] SB_DQS[3] M_B_DQS4
AP50 AV51 AN61 BE51
M_A_DQ51 SA_DQ[50] SA_DQS[5] M_A_DQS6 M_B_DQ51 SB_DQ[50] SB_DQS[4] M_B_DQS5
AP53 AT56 AN59 BA61
M_A_DQ52 SA_DQ[51] SA_DQS[6] M_A_DQS7 M_B_DQ52 SB_DQ[51] SB_DQS[5] M_B_DQS6
AV54 AK54 AU59 AR59
M_A_DQ53 SA_DQ[52] SA_DQS[7] M_B_DQ53 SB_DQ[52] SB_DQS[6] M_B_DQS7
AT54 AU61 AK61
M_A_DQ54 SA_DQ[53] M_B_DQ54 SB_DQ[53] SB_DQS[7]
AP56 AN58
M_A_DQ55 SA_DQ[54] M_B_DQ55 SB_DQ[54]
AP52 AR58
M_A_DQ56 SA_DQ[55] M_B_DQ56 SB_DQ[55]
AN57 AK58
M_A_DQ57 SA_DQ[56] M_B_DQ57 SB_DQ[56]
AN53
SA_DQ[57]
AL58
SB_DQ[57] to Every DIMM and Termination
M_A_DQ58 AG56 M_B_DQ58 AG58
M_A_DQ59 SA_DQ[58] M_B_DQ59 SB_DQ[58]
AG53 AG59
M_A_DQ60 SA_DQ[59] M_B_DQ60 SB_DQ[59]
AN55 M_A_A[15:0] 13,14 AM60 M_B_A[15:0] 13,15
M_A_DQ61 SA_DQ[60] M_A_A0 M_B_DQ61 SB_DQ[60] M_B_A0
AN52 BG35 AL59 BF32
M_A_DQ62 SA_DQ[61] SA_MA[0] M_A_A1 M_B_DQ62 SB_DQ[61] SB_MA[0] M_B_A1
AG55 BB34 AF61 BE33
M_A_DQ63 SA_DQ[62] SA_MA[1] M_A_A2 M_B_DQ63 SB_DQ[62] SB_MA[1] M_B_A2
AK56 BE35 AH60 BD33
SA_DQ[63] SA_MA[2] M_A_A3 SB_DQ[63] SB_MA[2] M_B_A3
BD35 AU30
SA_MA[3] M_A_A4 SB_MA[3] M_B_A4
AT34 BD30
SA_MA[4] M_A_A5 SB_MA[4] M_B_A5
AU34 AV30
SA_MA[5] M_A_A6 SB_MA[5] M_B_A6
BB32 BG30
SA_MA[6] M_A_A7 SB_MA[6] M_B_A7
13,14 M_A_BS0 BD37 AT32 13,15 M_B_BS0 BG39 BD29
SA_BS[0] SA_MA[7] M_A_A8 SB_BS[0] SB_MA[7] M_B_A8
13,14 M_A_BS1 BF36 AY32 13,15 M_B_BS1 BD42 BE30
SA_BS[1] SA_MA[8] M_A_A9 SB_BS[1] SB_MA[8] M_B_A9
13,14 M_A_BS2 BA28 AV32 13,15 M_B_BS2 AT22 BE28
SA_BS[2] SA_MA[9] M_A_A10 SB_BS[2] SB_MA[9] M_B_A10
BE37 BD43
B SA_MA[10] M_A_A11 SB_MA[10] M_B_A11 B
BA30 AT28
SA_MA[11] M_A_A12 SB_MA[11] M_B_A12
BC30 AV28
SA_MA[12] M_A_A13 SB_MA[12] M_B_A13
13,14 M_A_CAS# BE39 AW41 13,15 M_B_CAS# AV43 BD46
SA_CAS# SA_MA[13] M_A_A14 SB_CAS# SB_MA[13] M_B_A14
13,14 M_A_RAS# BD39 AY28 13,15 M_B_RAS# BF40 AT26
SA_RAS# SA_MA[14] M_A_A15 SB_RAS# SB_MA[14] M_B_A15
13,14 M_A_WE# AT41 AU26 13,15 M_B_WE# BD45 AU22
SA_WE# SA_MA[15] SB_WE# SB_MA[15]

AV8062700839404 AV8062700839404

DRAM RESET

+1.5V
2

R0401
Q0401
1KOhm
2N7002
R0405
1
S 2

3 M_DRAMRST# 2 1 DRAMRST# 14,15


3

A 5% A
1KOhm
G
1

R0402 1 2 4.99KOhm

0Ohm
21 DRAMRST_PCH 1 2 R0412 DRAMRST#_GATE 19
Come from PCH, must
pull high to +3VSUS /normal_S3
1

0Ohm C0401
30 DRAMRST_EC 1 2 R0411 0.047UF/16V Title : &38B''5
2

ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang


/Deep_S3
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 4 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

Ivy-Bridge CPU:
Pin BE7: SA_DIMM_VREFDQ U0301H
D Pin BG7: SB_DIMM_VREFDQ D

Sandy-Bridge CPU: U0301I

Pin BE7: RSVD28 A13 AM38


U0301E VSS[1] VSS[91]
Pin BG7: RSVD29 A17
VSS[2] VSS[92]
AM4
A21 AM42 BG17 M4
VSS[3] VSS[93] VSS[181] VSS[251]
A25 AM45 BG21 M58
VSS[4] VSS[94] VSS[182] VSS[252]
A28 AM48 BG24 M6
CFG0 VSS[5] VSS[95] VSS[183] VSS[253]
7 CFG0 B50 BE7 SA_DIMM_VREFDQ 19 A33 AM58 BG28 N1
CFG[0] RSVD28 VSS[6] VSS[96] VSS[184] VSS[254]
C51 BG7 SB_DIMM_VREFDQ 19 A37 AN1 BG37 N17
CFG[1] RSVD29 VSS[7] VSS[97] VSS[185] VSS[255]
B54 A40 AN21 BG41 N21
CFG[2] VSS[8] VSS[98] VSS[186] VSS[256]
D53 A45 AN25 BG45 N25
CFG[3] VSS[9] VSS[99] VSS[187] VSS[257]
2 1 A51 N42 A49 AN28 BG49 N28
R0505 CFG[4] RSVD30 VSS[10] VSS[100] VSS[188] VSS[258]
C53 L42 A53 AN33 BG53 N33
CFG[5] RSVD31 VSS[11] VSS[101] VSS[189] VSS[259]
C55 L45 A9 AN36 BG9 N36
1KOhm CFG[6] RSVD32 VSS[12] VSS[102] VSS[190] VSS[260]
H49 L47 AA1 AN40 C29 N40
CFG[7] RSVD33 VSS[13] VSS[103] VSS[191] VSS[261]
A55 AA13 AN43 C35 N43
CFG[8] VSS[14] VSS[104] VSS[192] VSS[262]
H51 AA50 AN47 C40 N47
CFG[9] VSS[15] VSS[105] VSS[193] VSS[263]
K49 M13 AA51 AN50 D10 N48
CFG[10] RSVD34 VSS[16] VSS[106] VSS[194] VSS[264]
K53 M14 AA52 AN54 D14 N51
CFG[11] RSVD35 VSS[17] VSS[107] VSS[195] VSS[265]
F53 U14 AA53 AP10 D18 N52
CFG[12] RSVD36 VSS[18] VSS[108] VSS[196] VSS[266]
G53 W14 AA55 AP51 D22 N56
CFG[13] RSVD37 VSS[19] VSS[109] VSS[197] VSS[267]
L51 P13 AA56 AP55 D26 N61
CFG[14] RSVD38 VSS[20] VSS[110] VSS[198] VSS[268]
F51 AA8 AP7 D29 P14
CFG[15] VSS[21] VSS[111] VSS[199] VSS[269]
D52 AB16 AR13 D35 P16
CFG[16] VSS[22] VSS[112] VSS[200] VSS[270]
L53 AT49 AB18 AR17 D4 P18
CFG[17] RSVD39 VSS[23] VSS[113] VSS[201] VSS[271]
K24 AB21 AR21 D40 P21
RSVD40 VSS[24] VSS[114] VSS[202] VSS[272]
AB48 AR41 D43 P58
VSS

RESERVED
T0588 H_CPU_RSVD3 VSS[25] VSS[115] VSS[203] VSS[273]
1 H43 AB61 AR48 D46 P59
T0589 H_CPU_RSVD4 VCC_VAL_SENSE VSS[26] VSS[116] VSS[204] VSS[274]
1 K43 AH2 AC10 AR61 D50 P9
VSS_VAL_SENSE RSVD41 VSS[27] VSS[117] VSS[205] VSS[275]
AG13 AC14 AR7 D54 R17
RSVD42 VSS[28] VSS[118] VSS[206] VSS[276]
AM14 AC46 AT14 D58 R20
T0590 H_CPU_RSVD1 RSVD43 VSS[29] VSS[119] VSS[207] VSS[277]
1 H45 AM15 AC6 AT19 D6 R4
T0591 H_CPU_RSVD2 VAXG_VAL_SENSE RSVD44 VSS[30] VSS[120] VSS[208] VSS[278]
1 K45 AD17 AT36 E25 R46
VSSAXG_VAL_SENSE VSS[31] VSS[121] VSS[209] VSS[279]
AD20 AT4 E29 T1
VSS[32] VSS[122] VSS[210] VSS[280]
N50 AD4 AT45 E3 T47

C
T0519 1 VCC_DIESENSE F48
VCC_DIE_SENSE
RSVD45
AD61
AE13
VSS[33]
VSS[34]
VSS[35]
VSS VSS[123]
VSS[124]
VSS[125]
AT52
AT58
E35
E40
VSS[211]
VSS[212]
VSS[213]
VSS[281]
VSS[282]
VSS[283]
T50
T51 C
AE8 AU1 F13 T52
T0520 VSS[36] VSS[126] VSS[214] VSS[284]
1 H48 AF1 AU11 F15 T53
T0521 RSVD6 VSS[37] VSS[127] VSS[215] VSS[285]
1 K48 AF17 AU28 F19 T55
RSVD7 VSS[38] VSS[128] VSS[216] VSS[286]
A4 AF21 AU32 F29 T56
DC_TEST_A4 VSS[39] VSS[129] VSS[217] VSS[287]
C4 AF47 AU51 F35 U13
DC_TEST_C4 VSS[40] VSS[130] VSS[218] VSS[288]
BA19 D3 AF48 AU7 F40 U8
RSVD8 DC_TEST_D3 VSS[41] VSS[131] VSS[219] VSS[289]
AV19 D1 AF50 AV17 F55 V20
RSVD9 DC_TEST_D1 VSS[42] VSS[132] VSS[220] VSS[290]
AT21 A58 AF51 AV21 G48 V61
RSVD10 DC_TEST_A58 VSS[43] VSS[133] VSS[221] VSS[291]
BB21 A59 AF52 AV22 G51 W13
RSVD11 DC_TEST_A59 VSS[44] VSS[134] VSS[222] VSS[292]
BB19 C59 AF53 AV34 G6 W15
RSVD12 DC_TEST_C59 VSS[45] VSS[135] VSS[223] VSS[293]
AY21 A61 AF55 AV40 G61 W18
RSVD13 DC_TEST_A61 VSS[46] VSS[136] VSS[224] VSS[294]
BA22
RSVD14 DC_TEST_C61
C61 Sandy Bridge SFF AF56
VSS[47] VSS[137]
AV48 H10
VSS[225] VSS[295]
W21
AY22 D61 Daisy Chain Routing AF58 AV55 H14 W46
RSVD15 DC_TEST_D61 VSS[48] VSS[138] VSS[226] VSS[296]
AU19 BD61 AF59 AW13 H17 W8
RSVD16 DC_TEST_BD61 VSS[49] VSS[139] VSS[227] VSS[297]
AU21 BE61 AG10 AW43 H21 Y4
RSVD17 DC_TEST_BE61 VSS[50] VSS[140] VSS[228] VSS[298]
BD21
RSVD18 DC_TEST_BE59
BE59 SFF Design Guide AG14
VSS[51] VSS[141]
AW61 H4
VSS[229] VSS[299]
Y47
BD22 BG61 #438297 R2.0 AG18 AW7 H53 Y58
RSVD19 DC_TEST_BG61 VSS[52] VSS[142] VSS[230] VSS[300]
BD25 BG59 P.124 AG47 AY14 H58 Y59
RSVD20 DC_TEST_BG59 VSS[53] VSS[143] VSS[231] VSS[301]
BD26 BG58 AG52 AY19 J1
RSVD21 DC_TEST_BG58 VSS[54] VSS[144] VSS[232]
BG22 BG4 AG61 AY30 J49
RSVD22 DC_TEST_BG4 VSS[55] VSS[145] VSS[233]
BE22 BG3 AG7 AY36 J55
RSVD23 DC_TEST_BG3 VSS[56] VSS[146] VSS[234]
BG26 BE3 AH4 AY4 K11
RSVD24 DC_TEST_BE3 VSS[57] VSS[147] VSS[235]
BE26 BG1 AH58 AY41 K21
RSVD25 DC_TEST_BG1 VSS[58] VSS[148] VSS[236]
BF23 BE1 AJ13 AY45 K51 A5
RSVD26 DC_TEST_BE1 VSS[59] VSS[149] VSS[237] VSS_NCTF_1
BE24 BD1 AJ16 AY49 K8 A57
RSVD27 DC_TEST_BD1 VSS[60] VSS[150] VSS[238] VSS_NCTF_2
AJ20 AY55 L16 BC61
VSS[61] VSS[151] VSS[239] VSS_NCTF_3
AJ22 AY58 L20 BD3
VSS[62] VSS[152] VSS[240] VSS_NCTF_4
AJ26 AY9 L22 BD59

NCTF
VSS[63] VSS[153] VSS[241] VSS_NCTF_5
AJ30 BA1 L26 BE4
AV8062700839404 VSS[64] VSS[154] VSS[242] VSS_NCTF_6
AJ34 BA11 L30 BE58
VSS[65] VSS[155] VSS[243] VSS_NCTF_7
AJ38 BA17 L34 BG5
VSS[66] VSS[156] VSS[244] VSS_NCTF_8
AJ42 BA21 L38 BG57
VSS[67] VSS[157] VSS[245] VSS_NCTF_9
AJ45 BA26 L43 C3
VSS[68] VSS[158] VSS[246] VSS_NCTF_10
AJ48 BA32 L48 C58
VSS[69] VSS[159] VSS[247] VSS_NCTF_11
AJ7 BA48 L61 D59
VSS[70] VSS[160] VSS[248] VSS_NCTF_12
AK1 BA51 M11 E1
VSS[71] VSS[161] VSS[249] VSS_NCTF_13
AK52 BB53 M15 E61
B VSS[72] VSS[162] VSS[250] VSS_NCTF_14 B
AL10 BC13
VSS[73] VSS[163]
AL13 BC5
VSS[74] VSS[164]
AL17 BC57
VSS[75] VSS[165]
AL21 BD12
VSS[76] VSS[166]
AL25 BD16
VSS[77] VSS[167] AV8062700839404
AL28 BD19
VSS[78] VSS[168]
AL33 BD23
VSS[79] VSS[169]
AL36 BD27
VSS[80] VSS[170]
AL40 BD32
VSS[81] VSS[171]
AL43 BD36
VSS[82] VSS[172]
AL47 BD40
VSS[83] VSS[173]
AL61 BD44
VSS[84] VSS[174]
AM13 BD48
VSS[85] VSS[175]
AM20 BD52
VSS[86] VSS[176]
AM22 BD56
VSS[87] VSS[177]
AM26 BD8
VSS[88] VSS[178]
AM30 BE5
VSS[89] VSS[179]
AM34 BG13
VSS[90] VSS[180]

CFG strapping information:


CFG[2]: PEG Static Lane Reversal (For the 16X)
AV8062700839404
- 1: (Default) Normal Operation; Lane # definition matches socket pin map definition
- 0: Lane Reversed
CFG[4]: Display Port Presence Strap
- 1 : (Default) Disable; No Physical Display Port attached to Embedded Display Port
- 0 : Enable; An external Display Port device is connected to the Embeded Display port
CFG[6:5]: PCIE Port Bifurcation Straps
- 11 : (Default) X16 - Device 1 functions 1 and 2 disable
- 10 : X8, X8 - Device 1 function 1 enabled; Function 2 disable
A - 01 : Reserved - (Device 1 Function 1 disable ; Function 2 enable A

- 00 : X8, X4 X4 - Device 1 function 1 and 2 enabled

CFG[7]: Defer Training


-1: (Default) PEG Train immediately following xxRESETB de assertion
-0: PEG Wait for BIOS for training
Title : &38B&)*569'*1'
ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 5 of 99
5 4 3 2 1
5 4 3 2 1

Main Board
+VCORE
+VCORE_CPU
+1.05VS +VTT_CPU

+VGFX_CORE +VGFX
HFM: 0.7V ~ 1.2V
LFM: 0.65V ~ 0.9V

ULV: 0.65V ~ 1.35V


ULV
P0 (Turbo): 33A U0301F ER-014
P1 ( HFM ): 21.5A ULV
Px ( LFM ): 12.5A +VTT_CPU GT2 (Turbo): 26A U0301G
D
VDDQ D
8.5A GT2 (TDC) : 10A +V_SM_VREF Should
AF46 +VGFX
VCCIO[1] GT1 (Turbo) :16A have 10 mil trace

1
+VCORE_CPU AG48

1
VCCIO[3] GT1( TDC) : 8A width R0617
AG50
VCCIO[4] C0604 C0605
A26 AG51 AA46 1KOhm
VCC[1] VCCIO[5] VAXG[1]
A29 AJ17 22UF/6.3V 22UF/6.3V AB47

1
VCC[2] VCCIO[6] VAXG[2]
A31 AJ21 AB50

2
VCC[3] VCCIO[7] C0628 C0629 C0630 VAXG[3] +V_SM_VREF_CNT
A34 AJ25 AB51 AY43 1 2
VCC[4] VCCIO[8] VAXG[4] SM_VREF R0618 1KOhm
A35 AJ43 22UF/6.3V 22UF/6.3V 22UF/6.3V AB52

2
VCC[5] VCCIO[9] VAXG[5]
A38 AJ47 AB53

1
VCC[6] VCCIO[10] VAXG[6]
A39 AK50 AB55
VCC[7] VCCIO[11] C0607 C0608 C0609 C0610 VAXG[7]
A42 AK51 AB56
VCC[8] VCCIO[12] VAXG[8]
C26 AL14 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V AB58 VDDQ +1.5VS

1
VCC[9] VCCIO[13] VAXG[9]
C27 AL15 AB59 AJ28
VCC[10] VCCIO[14] C0631 C0632 C0633 VAXG[10] VDDQ[1]
C32
VCC[11] VCCIO[15]
AL16 AC61
VAXG[11] VDDQ[2]
AJ33 5A
C34 AL20 22UF/6.3V 22UF/6.3V 22UF/6.3V AD47 AJ36 VDDQ

2
VCC[12] VCCIO[16] VAXG[12] VDDQ[3]
C37 AL22 AD48 AJ40
VCC[13] VCCIO[17] VAXG[13] VDDQ[4]

1
C39 AL26 AD50 AL30

- 1.5V RAILS
VCC[14] VCCIO[18] C0611 C0612 C0613 C0614 C0615 C0668 VAXG[14] VDDQ[5] C0647 C0648
C42 AL45 AD51 AL34
VCC[15] VCCIO[19] VAXG[15] VDDQ[6]
D27 AL48 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V AD52 AL38 10UF/6.3V 10UF/6.3V

2
1

1
VCC[16] VCCIO[20] VAXG[16] VDDQ[7]
D32 AM16 AD53 AL42
VCC[17] VCCIO[21] C0681 C0682 C0683 C0684 VAXG[17] VDDQ[8]
D34 AM17 AD55 AM33
VCC[18] VCCIO[22] VAXG[18] VDDQ[9]
D37 AM21 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V AD56 AM36

2
VCC[19] VCCIO[23] VAXG[19] VDDQ[10]
D39 AM43 AD58 AM40
VCC[20] VCCIO[24] VAXG[20] VDDQ[11]
1

1
D42 AM47 AD59 AN30
VCC[21] VCCIO[25] C0616 C0617 C0618 C0619 C0620 C0667 VAXG[21] VDDQ[12] C0650 C0651 C0652
E26 AN20 AE46 AN34
VCC[22] VCCIO[26] VAXG[22] VDDQ[13]
E28 AN42 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V N45 AN38 10UF/6.3V 10UF/6.3V 10UF/6.3V

POWER
2

2
VCC[23] VCCIO[27] VAXG[23] VDDQ[14]
E32 AN45 P47 AR26
VCC[24] VCCIO[28] VAXG[24] VDDQ[15]
E34 AN48 P48 AR28
VCC[25] VCCIO[29] VAXG[25] VDDQ[16]

1
E37 P50 AR30
VCC[26] C0635 C0636 C0637 VAXG[26] VDDQ[17]
E38 P51 AR32

1
VCC[27] VAXG[27] VDDQ[18]
CORE SUPPLY

F25 10UF/6.3V 10UF/6.3V 10UF/6.3V P52 AR34

DDR3
2

2
VCC[28] C0699 C0698 C0697 VAXG[28] VDDQ[19]
F26 P53 AR36
PEG AND DDR

VCC[29] VAXG[29] VDDQ[20]


F28 22UF/6.3V 22UF/6.3V 22UF/6.3V P55 AR40

2
VCC[30] VAXG[30] VDDQ[21]
F32 P56 AV41
VCC[31] VAXG[31] VDDQ[22]
F34 P61 AW26

1
VCC[32] VAXG[32] VDDQ[23]
F37 AA14 T48 BA40
VCC[33] VCCIO[30] VAXG[33] VDDQ[24]

1
GRAPHICS
C F38 AA15 C0638 C0639 C0640 T58 BB28 C
VCC[34] VCCIO[31] VAXG[34] VDDQ[25] C0674 C0675 C0676 C0677 C0678
F42 AB17 10UF/6.3V 10UF/6.3V 10UF/6.3V T59 BG33

2
VCC[35] VCCIO[32] VAXG[35] VDDQ[26]
G42 AB20 T61 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
VCC[36] VCCIO[33] VAXG[36]
H25 AC13 U46
1

1
VCC[37] VCCIO[34] VAXG[37]
H26 AD16 V47
VCC[38] VCCIO[35] C0621 C0622 C0623 C0624 C0625 C0665 VAXG[38]
H28 AD18 V48

1
VCC[39] VCCIO[36] VAXG[39]
H29 AD21 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V V50
2

2
VCC[40] VCCIO[37] C0691 C0687 C0686 C0685 VAXG[40]
H32 AE14 V51
VCC[41] VCCIO[38] VAXG[41]
H34 AE15 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V V52

2
VCC[42] VCCIO[39] VAXG[42]
H35 AF16 V53
VCC[43] VCCIO[40] VAXG[43]
H37 AF18 V55
VCC[44] VCCIO[41] VAXG[44]
H38 AF20 V56
VCC[45] VCCIO[42] VAXG[45]
1

1
H40 AG15 V58
VCC[46] VCCIO[43] C0626 C0627 C0662 C0663 C0664 C0666 VAXG[46]
J25 AG16 V59
VCC[47] VCCIO[44] VAXG[47]
J26 AG17 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V W50
2

2
VCC[48] VCCIO[45] VAXG[48]

1
J28 AG20 W51
VCC[49] VCCIO[46] C0689 C0690 C0692 VAXG[49]
J29 AG21 W52
VCC[50] VCCIO[47] VAXG[50]
J32 AJ14 1UF/6.3V 1UF/6.3V 1UF/6.3V W53

2
VCC[51] VCCIO[48] VAXG[51]
POWER

J34 AJ15 W55


VCC[52] VCCIO[49] VAXG[52]
J35
J37
VCC[53] SVID signal is very critical. W56
W61
VAXG[53]
VCC[54] VAXG[54]
J38
VCC[55] Please follow Intel design guide Y48
VAXG[55]
J40 Y61
VCC[56] VAXG[56]
J42
VCC[57] +3VSUS
K26
VCC[58] VCCIO50
W16 It must be min 100 ns after to +1.5Vs reaches 80%
K27 W17
VCC[59] VCCIO51
K29
VCC[60]
1

K32

QUIET RAILS
VCC[61] R0613 +1.8VS
K34 AM28
VCC[62] VCCDQ[1]

LINES
SENSE
K35 10KOhm 80 VCC_AXG_SENSE F45 AN26
VCC[63] VAXG_SENSE VCCDQ[2]
K37 80 VSS_AXG_SENSE G45
VCC[64] VSSAXG_SENSE
K39
2

VCC[66]

1
K42 BC22 H_SNB_IVB#_PWRCTRL 1 C0688
VCC[67] VCCIO_SEL T0609 SL0607 1UF/6.3V
L25
VCC[68]
L28 R0805

2
VCC[69]

1.8V RAIL
L33 +VTT_CPU
VCC[70]
L36 1.2A
1
VCC[71] +VTT_CPU VCCPLL
L40 BB3
QUIET RAILS

B VCC[72] VCCPLL[1] B
N26 BC1
1

1
VCC[73] C0645 C0646 VCCPLL[2]
N30 AM25 BC4
VCC[74] VCCPQE[1] VCCPLL[3]
1

N34 AN22 C0661 C0644 1UF/6.3V 1UF/6.3V


2

VCC[75] VCCPQE[2] 1UF/6.3V


N38 10UF/6.3V
??
2

2
VCC[76]
R0605
75Ohm
2

BC43 1
VDDQ_SENSE T0603
BA43 1

SENSE LINES
VSS_SENSE_VDDQ T0602
+0.8VS
1

L17
1% VCCSA[1]
L21
H_CPU_SVIDALRT# R0611 1 VCCSA[2]
A44 2 43Ohm VR_SVID_ALERT# 80 N16
VIDALERT# VCCSA[3]
B43 6A N20
SVID

VIDSCLK VR_SVID_CLK 80 VCCSA[4]

SA RAIL
C44 VCCSA N22
VR_SVID_DATA 80
1

1
VIDSOUT VCCSA[5]
P17
+VCORE C0696 10UF/6.3V C0655 C0654 C0653 VCCSA[6]
P20 U10 VCCUSA_SENSE 87
1

C0601 VCCSA[7] VCCSA_SENSE


+VTT_CPU R0604 1 2 130Ohm 1% 22UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V R16
2

2
100PF/50V C0656 VCCSA[8]
R18
VCCSA[9]
2

@ R21
2

VCCSA[10] VCCSA_SEL0 87
R0606 U15 VCCSA_SEL0
VCCSA[11] 10KOhm
100Ohm V16
VCCSA[12]
V17 D48 1 R0608 2
1% VCCSA[13] VCCSA_VID[0]
V18 D49 VCCSA_SEL1 87
1

VCCSA[14] VCCSA_VID[1]
F43 V21
SENSE LINES

VCCSENSE 80
1

VCC_SENSE VCCSA[15] 10KOhm


G43 VSSSENSE 80 W20
VSS_SENSE C0669 C0670 C0671 C0672 C0673 VCCSA[16]
1 R0609 2
2

1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V


2

R0607
100Ohm
AN16 VCCP_SENSE 82
VCCIO_SENSE 1% AV8062700839404
AN17 VSSP_SENSE 82
1

VSS_SENSE_VCCIO
VCCSA_SEL0 VCCSA_SEL1 VCCSA_SEL

AV8062700839404
L L
0.9V
A A

L H
0.85V for ULV only

H L 0.75V
Title : &38B3:5
H_SNB_IVB#_PWRCTRL= LOW, VCCP=1.0V ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
H_SNB_IVB#_PWRCTRL= High/NC, VCCP=1.05V
H H 0.65V Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 6 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

㬌枩ℐ㓦TOP side

D D

J0701
3 XDP_PREQ# 1
1
3 XDP_PRDY# 2
+VTT_CPU 2
3
+3VS OBS_DATA0 3
1 4
+3VA T0701 OBS_DATA1 4
1 5
T0702 5
6
OBS_DATA2 6
1 7
2

T0703 OBS_DATA3 7
1 8
8

1
R0707 T0704 9
51Ohm R0709 R0711 R0701 @ 0Ohm nbs_r0201_h12_000s CPUPWRGD_XDP 9
3,25 H_CPUPWRGD 2 1 10
R0702 @ 0Ohm nbs_r0201_h12_000s PM_PWRBTN#_XDP 10
1KOhm 1KOhm 22 PM_PWRBTN#_R 2 1 11
R0703 @ 0Ohm nbs_r0201_h12_000s XDP_HOOK2 11
C 1 2 12 C
1

5 CFG0 12
@ R0704 1 @ 2 0Ohm nbs_r0201_h12_000s SYS_PWROK_XDP 13
22 PM_SYSPWROK_PCH
2

2
XDP_TDO CLK_XDP_P 13
14
CLK_XDP_N 14
15
R0708 @ XDP_DBRESET# SYS_PWROK_XDP 15
1 2 0Ohm PCH_JTAG_TDO 20 +VTT_CPU 16
R0705 @ 16
3,24,30,31,45,53,63 BUF_PLT_RST# 1 2 0Ohm nbs_r0201_h12_000s XDP_RST#_R 17
17
3,22 XDP_DBRESET# 18
18
19
19
3 XDP_TDO 20
20
3 XDP_TRST# 21
21
3 XDP_TDI 22
22
3 XDP_TMS 23
TCK1 23
1 24
T0705 24
25
25
3 XDP_TCLK 26
26
XDP_TDI R0712 1 @ 2 0Ohm SMDPAD_26P
PCH_JTAG_TDI 20
XDP_TMS R0710 1 @ 2 0Ohm PCH_JTAG_TMS 20

CLK_XDP_P 4 RNX0702B @
CLK_XDP_N
3
1
0OHM
2 RNX0702A @
CLK_ITP_BCLK 3 Please mount J0701,
0OHM CLK_ITP_BCLK# 3
R0701~R0705 and RNX0702
CLK_XDP_N 3 4 RNX0703B @ CLK_ITP_BCLK_PCH# 21
0OHM for debug on SR and ER
CLK_XDP_P 1 2 RNX0703A @ CLK_ITP_BCLK_PCH 21
0OHM

B B

Place near J0701


BUF_PLT_RST# PM_PWRBTN#_R PM_SYSPWROK_PCH

1
C0701 C0702 C0703
0.01UF/10V 0.01UF/10V 0.01UF/10V

2
A A

Title : &38B;'3
ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 7 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : 1%B
ASUSTeK COMPUTER INC. NB1 Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 8 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : 1%B
ASUSTeK COMPUTER INC. NB1 Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 9 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : 1%B
ASUSTeK COMPUTER INC. NB1 Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 10 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : 1%B
ASUSTeK COMPUTER INC. NB1 Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 11 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : 1%B
ASUSTeK COMPUTER INC. NB1 Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 12 of 99
5 4 3 2 1
5 4 3 2 1

+0.75VS

4,14 M_A_A[15:0] +1.5V

1
C1305 C1304 C1302
10UF/6.3V 10UF/6.3V 0.1UF/6.3V

2
@ @ R1301
1 2 DIMM_CLOCK_TERM 1 2 M_A_CLK_DDR0 4,14
GND GND

1
M_A_A5 1 2 RN1321A 30.1Ohm
39Ohm
M_A_A0 3 4 RN1321B C1301
39Ohm
M_A_A3 5 6 RN1321C 1.5pF/50V

2
39Ohm
7 8 RN1321D R1302
4,14 M_A_BS2 39Ohm
SWAP M_A_A2 1 2 RN1322A 1 2
D 39Ohm M_A_CLK_DDR#0 4,14 D
M_A_A14 3 4 RN1322B
39Ohm

1
UX21 M_A_A11 5 6 RN1322C 30.1Ohm
39Ohm
M_A_A7 7 8 RN1322D C1303
39Ohm
0.1UF/6.3V

2
GND
M_A_A8 1 2 RN1323A +1.5V
39Ohm
M_A_A6 3 4 RN1323B
39Ohm
M_A_A1 5 6 RN1323C
39Ohm
M_A_A4 7 8 RN1323D C1309
39Ohm
1 2 RN1324A 0.1UF/6.3V
4,14 M_A_CAS# 39Ohm
3 4 RN1324B @ R1305
4,14 M_A_CKE0 39Ohm
5 6 RN1324C 1 2 DIMM_CLOCK_TERM_B 1 2
4,14 M_A_ODT0 39Ohm M_B_CLK_DDR0 4,15
7 8 RN1324D
4,14 M_A_RAS# 39Ohm

1
30.1Ohm
SWAP C1308
1.5pF/50V

2
UX21 R1306
M_A_A13 1 2 RN1325A 1 2
39Ohm M_B_CLK_DDR#0 4,15
M_A_A9 3 4 RN1325B
39Ohm
M_A_A12 5 6 RN1325C 30.1Ohm
39Ohm

1
7 8 RN1325D
4,14 M_A_BS1 39Ohm
1 2 RN1326A C1342
4,14 M_A_WE# 39Ohm
3 4 RN1326B 0.1UF/6.3V
4,14 M_A_BS0 39Ohm

2
5 6 RN1326C
4,14 M_A_CS#0 39Ohm
M_A_A10 7 8 RN1326D
39Ohm

GND

M_A_A15 R1303 1 2 39Ohm

To support 4Gb
SDRAM 2DIE ==> /2D use 2rank
C C
/2D R1307 1 2 39Ohm
4,14 M_A_CKE1_2DIE
C1354
/2D R1308 1 2 39Ohm 0.1UF/6.3V
4,14 M_A_CS#1_2DIE
nbs_c0201_h13_000s
/2D R1309 1 2 39Ohm 1 2
4,14 M_A_ODT1_2DIE
@

GND

Refer to Intel CRB

+0.75VS

1
C1330 C1331 C1332 C1333 C1335
+0.75VS 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V C1334 1UF/6.3V C1336
8PF/25V @ 8PF/25V

2
4,15 M_B_A[15:0]
1

GND
C1306 C1307
10UF/6.3V 10UF/6.3V
2

GND GND
1 2 RN1311A Refer to Intel CRB
4,15 M_B_BS2 39Ohm
M_B_A0 3 4 RN1311B
39Ohm
M_B_A5 5 6 RN1311C
39Ohm +0.75VS
M_B_A2 7 8 RN1311D
B 39Ohm B
SWAP M_B_A10 1 2 RN1312A
39Ohm
3 4 RN1312B
4,15 M_B_CS#0 39Ohm
UX21 5 6 RN1312C
4,15 M_B_WE# 39Ohm
7 8 RN1312D
4,15 M_B_BS0 39Ohm

1
C1344 C1345 C1346 C1347 C1348 C1349 C1350
1UF/6.3V 1UF/6.3V 8PF/50V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
@ @ @

2
M_B_A8 1 2 RN1313A
39Ohm
M_B_A6 3 4 RN1313B
39Ohm
M_B_A7 5 6 RN1313C
39Ohm
M_B_A4 7 8 RN1313D GND
39Ohm
M_B_A11 1 2 RN1314A
39Ohm
M_B_A1 3 4 RN1314B
39Ohm
M_B_A13 5 6 RN1314C
39Ohm
M_B_A14 7 8 RN1314D
39Ohm
SWAP ER-001
UX21 +0.75VS
UX31EP 013 12/21
M_B_A3 1 2 RN1315A
39Ohm
3 4 RN1315B
4,15 M_B_BS1 39Ohm
M_B_A12 5 6 RN1315C
39Ohm
M_B_A9 7 8 RN1315D
39Ohm
1

1
1 2 RN1316A C1357 C1358 C1359 C1351
4,15 M_B_RAS# 39Ohm
3 4 RN1316B 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
4,15 M_B_ODT0 39Ohm
5 6 RN1316C
4,15 M_B_CKE0 39Ohm
2

2
7 8 RN1316D
4,15 M_B_CAS# 39Ohm

R1304 GND add for channel B


M_B_A15 1 2 39Ohm

To support 4Gb
+1.5V
A SDRAM 2DIE ==> /2D use 2rank A
1

/2D R1311 1 2 39Ohm C1337


4,15 M_B_CKE1_2DIE
C1355 @
/2D R1310 1 2 39Ohm 0.1UF/6.3V 8PF/25V
4,15 M_B_CS#1_2DIE
2

@
/2D R1312 1 2 39Ohm 1 2
4,15 M_B_ODT1_2DIE
GND

GND Title : ''5B7(50,1$7,21


ER-022 ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Friday, May 18, 2012 Sheet 13 of 98
5 4 3 2 1
5 4 3 2 1

M_A_DQ[63:0] 4
+1.5V +1.5V +1.5V +1.5V
M_A_A[15:0] 4,13
U1401 U1402 U1403 U1404
M_A_A0 N3 H9 M_A_A0 N3 H9 M_A_A0 N3 H9 M_A_A0 N3 H9
M_A_A1 A0 VDDQ1 M_A_A1 A0 VDDQ1 M_A_A1 A0 VDDQ1 M_A_A1 A0 VDDQ1
P7 H2 P7 H2 P7 H2 P7 H2
M_A_A2 A1 VDDQ2 M_A_A2 A1 VDDQ2 M_A_A2 A1 VDDQ2 M_A_A2 A1 VDDQ2
M_A_DQS[7:0] 4 P3 F1 P3 F1 P3 F1 P3 F1
M_A_A3 A2 VDDQ3 M_A_A3 A2 VDDQ3 M_A_A3 A2 VDDQ3 M_A_A3 A2 VDDQ3
N2 E9 N2 E9 N2 E9 N2 E9
M_A_A4 A3 VDDQ4 M_A_A4 A3 VDDQ4 M_A_A4 A3 VDDQ4 M_A_A4 A3 VDDQ4
M_A_DQS#[7:0] 4 P8 D2 P8 D2 P8 D2 P8 D2
D M_A_A5 A4 VDDQ5 M_A_A5 A4 VDDQ5 M_A_A5 A4 VDDQ5 M_A_A5 A4 VDDQ5 D
P2 C9 P2 C9 P2 C9 P2 C9
M_A_A6 A5 VDDQ6 M_A_A6 A5 VDDQ6 M_A_A6 A5 VDDQ6 M_A_A6 A5 VDDQ6
R8 C1 R8 C1 R8 C1 R8 C1
M_A_A7 A6 VDDQ7 M_A_A7 A6 VDDQ7 M_A_A7 A6 VDDQ7 M_A_A7 A6 VDDQ7
R2 A8 R2 A8 R2 A8 R2 A8
M_A_A8 A7 VDDQ8 M_A_A8 A7 VDDQ8 M_A_A8 A7 VDDQ8 M_A_A8 A7 VDDQ8
T8 A1 T8 A1 T8 A1 T8 A1
M_A_A9 A8 VDDQ9 M_A_A9 A8 VDDQ9 M_A_A9 A8 VDDQ9 M_A_A9 A8 VDDQ9
R3 R3 R3 R3
M_A_A10 A9 M_A_A10 A9 M_A_A10 A9 M_A_A10 A9
L7 L7 L7 L7
M_A_A11 A10/AP M_A_A11 A10/AP M_A_A11 A10/AP M_A_A11 A10/AP
R7 R9 R7 R9 R7 R9 R7 R9
M_A_A12 A11 VDD1 M_A_A12 A11 VDD1 M_A_A12 A11 VDD1 M_A_A12 A11 VDD1
N7 R1 N7 R1 N7 R1 N7 R1
M_A_A13 A12/BC# VDD2 M_A_A13 A12/BC# VDD2 M_A_A13 A12/BC# VDD2 M_A_A13 A12/BC# VDD2
T3 N9 T3 N9 T3 N9 T3 N9
M_A_A14 A13 VDD3 M_A_A14 A13 VDD3 M_A_A14 A13 VDD3 M_A_A14 A13 VDD3
T7 N1 T7 N1 T7 N1 T7 N1
A14 VDD4 A14 VDD4 A14 VDD4 A14 VDD4
K8 K8 K8 K8
VDD5 VDD5 VDD5 VDD5
SDRAM 2DIE VDD6
K2
VDD6
K2
VDD6
K2
VDD6
K2
G7 G7 G7 G7
M_A_CS#1_2DIE M_A_BS0 VDD7 M_A_BS0 VDD7 M_A_BS0 VDD7 M_A_BS0 VDD7
4,13 M_A_CS#1_2DIE 4,13 M_A_BS0 M2 D9 M2 D9 M2 D9 M2 D9
M_A_CKE1_2DIE M_A_BS1 BA0 VDD8 M_A_BS1 BA0 VDD8 M_A_BS1 BA0 VDD8 M_A_BS1 BA0 VDD8
4,13 M_A_CKE1_2DIE 4,13 M_A_BS1 N8 B2 N8 B2 N8 B2 N8 B2
M_A_ODT1_2DIE M_A_BS2 BA1 VDD9 M_A_BS2 BA1 VDD9 M_A_BS2 BA1 VDD9 M_A_BS2 BA1 VDD9
4,13 M_A_ODT1_2DIE 4,13 M_A_BS2 M3 M3 M3 M3
BA2 BA2 BA2 BA2

4,13 M_A_CAS# M_A_CAS# K3 G9 M_A_CAS# K3 G9 M_A_CAS# K3 G9 M_A_CAS# K3 G9


M_A_RAS# CAS# VSSQ1 M_A_RAS# CAS# VSSQ1 M_A_RAS# CAS# VSSQ1 M_A_RAS# CAS# VSSQ1
4,13 M_A_RAS# J3 G1 J3 G1 J3 G1 J3 G1
M_A_ODT0 RAS# VSSQ2 M_A_ODT0 RAS# VSSQ2 M_A_ODT0 RAS# VSSQ2 M_A_ODT0 RAS# VSSQ2
4,13 M_A_ODT0 K1 F9 K1 F9 K1 F9 K1 F9
ODT VSSQ3 ODT VSSQ3 ODT VSSQ3 ODT VSSQ3
E8 E8 E8 E8
VSSQ4 VSSQ4 VSSQ4 VSSQ4
E2 E2 E2 E2
M_A_CLK_DDR0 VSSQ5 M_A_CLK_DDR0 VSSQ5 M_A_CLK_DDR0 VSSQ5 M_A_CLK_DDR0 VSSQ5
check here 4,13 M_A_CLK_DDR0
M_A_CLK_DDR#0
J7
CK VSSQ6
D8
M_A_CLK_DDR#0
J7
CK VSSQ6
D8
M_A_CLK_DDR#0
J7
CK VSSQ6
D8
M_A_CLK_DDR#0
J7
CK VSSQ6
D8
4,13 M_A_CLK_DDR#0 K7 D1 K7 D1 K7 D1 K7 D1
M_A_CKE0 CK# VSSQ7 M_A_CKE0 CK# VSSQ7 M_A_CKE0 CK# VSSQ7 M_A_CKE0 CK# VSSQ7
4,13 M_A_CKE0 K9 B9 K9 B9 K9 B9 K9 B9
FBA_ZQ0 CKE VSSQ8 CKE VSSQ8 CKE VSSQ8 CKE VSSQ8
1 R1409 2 B1 B1 B1 B1
240Ohm VSSQ9 VSSQ9 VSSQ9 VSSQ9
FBA_ZQ0 L8 FBA_ZQ1 L8 FBA_ZQ2 L8 FBA_ZQ3 L8
FBA_ZQ1 M_A_CS#0 ZQ M_A_CS#0 ZQ M_A_CS#0 ZQ M_A_CS#0 ZQ
1 R1410 2 4,13 M_A_CS#0 L2 L2 L2 L2
240Ohm M_A_W E# CS# M_A_W E# CS# M_A_WE# CS# M_A_WE# CS#
4,13 M_A_W E# L3 L3 L3 L3
DRAMRST# WE# DRAMRST# WE# DRAMRST# WE# DRAMRST# WE#
4,15 DRAMRST# T2 T9 T2 T9 T2 T9 T2 T9
FBA_ZQ2 RESET# VSS1 RESET# VSS1 RESET# VSS1 RESET# VSS1
1 R1411 2 T1 T1 T1 T1
240Ohm VSS2 VSS2 VSS2 VSS2
E7 P9 E7 P9 E7 P9 E7 P9
DML VSS3 DML VSS3 DML VSS3 DML VSS3
D3 P1 D3 P1 D3 P1 D3 P1
FBA_ZQ3 DMU VSS4 DMU VSS4 DMU VSS4 DMU VSS4
1 R1412 2 M9 M9 M9 M9
240Ohm M_A_DQS1 VSS5 M_A_DQS2 VSS5 M_A_DQS5 VSS5 M_A_DQS6 VSS5
F3 M1 F3 M1 F3 M1 F3 M1
M_A_DQS#1 DQSL VSS6 M_A_DQS#2 DQSL VSS6 GND M_A_DQS#5 DQSL VSS6 GND M_A_DQS#6 DQSL VSS6
G3 J8 G3 J8 G3 J8 G3 J8
GND M_A_DQS0 DQSL# VSS7 GND M_A_DQS3 DQSL# VSS7 M_A_DQS4 DQSL# VSS7 M_A_DQS7 DQSL# VSS7
C7 J2 C7 J2 C7 J2 C7 J2
GND M_A_DQS#0 DQSU VSS8 M_A_DQS#3 DQSU VSS8 M_A_DQS#4 DQSU VSS8 M_A_DQS#7 DQSU VSS8
B7 G8 B7 G8 B7 G8 B7 G8
DQSU# VSS9 DQSU# VSS9 DQSU# VSS9 DQSU# VSS9
E1 E1 E1 E1
VSS10 VSS10 VSS10 VSS10
B3 B3 B3 B3
M_A_DQ14 E3 VSS11 M_A_DQ19 E3 VSS11 M_A_DQ42 VSS11 M_A_DQ54 VSS11
A9 A9 E3 A9 E3 A9
M_A_DQ9 F7 DQL0 VSS12 M_A_DQ21 F7 DQL0 VSS12 M_A_DQ44 DQL0 VSS12 M_A_DQ53 DQL0 VSS12
SDRAM 2DIE F7 F7
M_A_DQ15 F2 DQL1 M_A_DQ23 DQL1 M_A_DQ46 F2 DQL1 M_A_DQ55 DQL1
F2 F2
FBA_ZQ01 DQL2 DQL2 DQL2 DQL2
1 R1414 2 M_A_DQ13 F8 GND M_A_DQ17 F8 GND M_A_DQ40 F8 GND M_A_DQ49 F8 GND
240Ohm /2D M_A_DQ10 H3 DQL3 M_A_DQ20 H3 DQL3 M_A_DQ43 DQL3 M_A_DQ51 DQL3
H3 H3
M_A_DQ12 H8 DQL4 M_A_DQ16 H8 DQL4 M_A_DQ45 DQL4 M_A_DQ52 DQL4
H8 H8
FBA_ZQ11 DQL5 DQL5 DQL5 DQL5
1 R1413 2 M_A_DQ11 G2 H1 M_A_VREFDQ M_A_DQ18 G2 H1 M_A_VREFDQ M_A_DQ47 G2 H1 M_A_VREFDQ M_A_DQ50 G2 H1 M_A_VREFDQ
/2D 240Ohm M_A_DQ8 H7 DQL6 VREFDQ M_A_DQ22 H7 DQL6 VREFDQ M_A_DQ41 DQL6 VREFDQ M_A_DQ48 H7 DQL6 VREFDQ
H7
DQL7 DQL7 DQL7 DQL7
M8 M_A_VREFCA M8 M_A_VREFCA M8 M_A_VREFCA M8 M_A_VREFCA
C FBA_ZQ21 VREFCA VREFCA VREFCA VREFCA C
1 R1416 2
240Ohm /2D
M_A_DQ6 D7 M_A_DQ26 D7 M_A_DQ37 D7 M_A_DQ57 D7
FBA_ZQ31 M_A_DQ2 DQU0 M_A_DQ29 DQU0 M_A_DQ32 DQU0 M_A_DQ58 C3 DQU0
1 R1415 2 C3 C3 C3
240Ohm /2D M_A_DQ1 DQU1 M_A_DQ30 C8 DQU1 M_A_DQ33 DQU1 M_A_DQ61 DQU1
C8 SDRAM 2DIE SDRAM 2DIE C8 SDRAM 2DIE C8 SDRAM 2DIE
M_A_DQ0 DQU2 M_A_A15 M_A_DQ27 C2 DQU2 M_A_A15 M_A_DQ36 DQU2 M_A_A15 M_A_DQ63 C2 DQU2 M_A_A15
C2 M7 M7 C2 M7 M7
M_A_DQ7 DQU3 NC5 FBA_ZQ01 M_A_DQ28 A7 DQU3 NC5 FBA_ZQ11 M_A_DQ34 DQU3 NC5 FBA_ZQ21 M_A_DQ56 A7 DQU3 NC5 FBA_ZQ31
A7 L9 L9 A7 L9 L9
GND M_A_DQ5 DQU4 NC4 M_A_CS#1_2DIE M_A_DQ25 DQU4 NC4 M_A_CS#1_2DIE M_A_DQ39 DQU4 NC4 M_A_CS#1_2DIE M_A_DQ59 A2 DQU4 NC4 M_A_CS#1_2DIE
A2 L1 A2 L1 A2 L1 L1
M_A_DQ3 DQU5 NC3 M_A_CKE1_2DIE M_A_DQ31 B8 DQU5 NC3 M_A_CKE1_2DIE M_A_DQ38 DQU5 NC3 M_A_CKE1_2DIE M_A_DQ60 B8 DQU5 NC3 M_A_CKE1_2DIE
B8 J9 J9 B8 J9 J9
M_A_DQ4 DQU6 NC2 M_A_ODT1_2DIE M_A_DQ24 DQU6 NC2 M_A_ODT1_2DIE M_A_DQ35 DQU6 NC2 M_A_ODT1_2DIE M_A_DQ62 DQU6 NC2 M_A_ODT1_2DIE
A3 J1 A3 J1 A3 J1 A3 J1
DQU7 NC1 DQU7 NC1 DQU7 NC1 DQU7 NC1
EDJ4216BASE-DJ-F EDJ4216BASE-DJ-F EDJ4216BASE-DJ-F EDJ4216BASE-DJ-F

Cap Placement of VREF


M_A_VREFCA
M_A_VREFDQ
U1401 Cap Placement of +1.5V
0.1uF
U1501 U1401
0.1uF x 4 0.1uF x 4
U1402
0.1uF
U1502 U1402
2.2uF 0.1uF x 4 0.1uF x 4
U1403 2.2uF 330uF 2.2uF
0.1uF U1503 x 2 x1 x 2 U1403
0.1uF x 4 0.1uF x 4

B U1404 U1504 U1404 B


0.1uF 0.1uF x 4 0.1uF x 4

ER-001 ER-022
+1.5V +1.5V +1.5V +1.5V +1.5V
1

C1435 C1436 C1437 C1438


Refer to Intel CRB
8PF/25V 8PF/25V 8PF/25V 8PF/25V
2

2
1

M_A_VREFDQ M_A_VREFCA C1430 C1431 C1432 C1434 C1433


C1429 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 2.2UF/10V
2.2UF/10V
2

GND GND GND GND


1

nbs_c0201_h13_000s
nbs_c0201_h13_000s
nbs_c0201_h13_000s
nbs_c0201_h13_000s
C1428 C1427
2.2UF/10V 2.2UF/10V
Close Close Close Close
2

GND
Close U1404 U1401 U1402 U1403 U1404
GND GND
DIM Thermal Sensor
+1.5V Bulk Cap near DIMM Device
M_A_VREFDQ M_A_VREFCA
+1.5V
0201 0.1uF Change Size form 0603 to 0402 +3VS
PHILIP PMBS3904
Near Top memory IC
1

C1424 C1423 C1425 C1426 C1419 C1420 C1421 C1422


 Pleace in the center

1
0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V C1414 C1413 CE1401 C1451
nbs_c0201_h13_000s nbs_c0201_h13_000s 220UF/2.5V
of CPU socket. 0.1UF/16V
2.2UF/10V 2.2UF/10V
2

2
nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s DIM_THRM_DA 10mil trace
nbs_c0201_h13_000s nbs_c0201_h13_000s
ER-037
GND GND GND Q1402 C U1410
GND 1 8
VCC SMBCLK SMB1_CLK_S 28,50

1
A 0201 0.1uF 2 7 A
B DXP SMBDATA SMB1_DAT_S 28,50
C1450 3 6
+1.5V +1.5V +1.5V +1.5V DXN ALERT#
R3.02. 2200PF/50V 4 5

2
THERM# GND
Item 107. PMBS3904 G781-1
E
1

C1401 C1402 C1403 C1415 C1407 C1408 C1409 C1418 C1410 C1411 C1412 C1417 C1405 C1406 C1416 DIM_THRM_DC
0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V C1404 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 10mil trace
nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s 8PF/25V
2

nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s


nbs_c0201_h13_000s
nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s
SMBUS addr=(9A)
Close U1401 GND Close U1402 GND R3.02. Close U1403 GND Close U1404 GND
Item 107. U1410: Remote(Local) thermal sensor,use remote mode.
Title : ''5B21%2$5'B$
ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
D 8;$ R2.0
Date: Friday, May 18, 2012 Sheet 14 of 98
5 4 3 2 1
5 4 3 2 1

+1.5V +1.5V

+1.5V +1.5V U1503 U1504


M_B_DQ[63:0] 4
M_B_A0 N3 H9 M_B_A0 N3 H9
U1501 U1502 M_B_A1 A0 VDDQ1 M_B_A1 A0 VDDQ1
P7 H2 P7 H2
M_B_A0 M_B_A0 M_B_A2 A1 VDDQ2 M_B_A2 A1 VDDQ2
M_B_A[15:0] 4,13 N3 H9 N3 H9 P3 F1 P3 F1
M_B_A1 A0 VDDQ1 M_B_A1 A0 VDDQ1 M_B_A3 A2 VDDQ3 M_B_A3 A2 VDDQ3
P7 H2 P7 H2 N2 E9 N2 E9
M_B_A2 A1 VDDQ2 M_B_A2 A1 VDDQ2 M_B_A4 A3 VDDQ4 M_B_A4 A3 VDDQ4
P3 F1 P3 F1 P8 D2 P8 D2
M_B_A3 A2 VDDQ3 M_B_A3 A2 VDDQ3 M_B_A5 A4 VDDQ5 M_B_A5 A4 VDDQ5
N2 E9 N2 E9 P2 C9 P2 C9
M_B_A4 A3 VDDQ4 M_B_A4 A3 VDDQ4 M_B_A6 A5 VDDQ6 M_B_A6 A5 VDDQ6
M_B_DQS[7:0] 4 P8 D2 P8 D2 R8 C1 R8 C1
M_B_A5 A4 VDDQ5 M_B_A5 A4 VDDQ5 M_B_A7 A6 VDDQ7 M_B_A7 A6 VDDQ7
P2 C9 P2 C9 R2 A8 R2 A8
D M_B_A6 A5 VDDQ6 M_B_A6 A5 VDDQ6 M_B_A8 A7 VDDQ8 M_B_A8 A7 VDDQ8 D
M_B_DQS#[7:0] 4 R8 C1 R8 C1 T8 A1 T8 A1
M_B_A7 A6 VDDQ7 M_B_A7 A6 VDDQ7 M_B_A9 A8 VDDQ9 M_B_A9 A8 VDDQ9
R2 A8 R2 A8 R3 R3
M_B_A8 A7 VDDQ8 M_B_A8 A7 VDDQ8 M_B_A10 A9 M_B_A10 A9
T8 A1 T8 A1 L7 L7
M_B_A9 A8 VDDQ9 M_B_A9 A8 VDDQ9 M_B_A11 A10/AP M_B_A11 A10/AP
R3 R3 R7 R9 R7 R9
M_B_A10 A9 M_B_A10 A9 M_B_A12 A11 VDD1 M_B_A12 A11 VDD1
L7 L7 N7 R1 N7 R1
M_B_A11 A10/AP M_B_A11 A10/AP M_B_A13 A12/BC# VDD2 M_B_A13 A12/BC# VDD2
R7 R9 R7 R9 T3 N9 T3 N9
M_B_A12 A11 VDD1 M_B_A12 A11 VDD1 M_B_A14 A13 VDD3 M_B_A14 A13 VDD3
N7 R1 N7 R1 T7 N1 T7 N1
M_B_A13 A12/BC# VDD2 M_B_A13 A12/BC# VDD2 A14 VDD4 A14 VDD4
T3 N9 T3 N9 K8 K8
M_B_A14 A13 VDD3 M_B_A14 A13 VDD3 VDD5 VDD5
T7 N1 T7 N1 K2 K2
A14 VDD4 A14 VDD4 VDD6 VDD6
K8 K8 G7 G7
VDD5 VDD5 M_B_BS0 VDD7 M_B_BS0 VDD7
K2 K2 M2 D9 M2 D9
VDD6 VDD6 M_B_BS1 BA0 VDD8 M_B_BS1 BA0 VDD8
G7 G7 N8 B2 N8 B2
M_B_BS0 VDD7 M_B_BS0 VDD7 M_B_BS2 BA1 VDD9 M_B_BS2 BA1 VDD9
4,13 M_B_BS0 M2 D9 M2 D9 M3 M3
M_B_BS1 BA0 VDD8 M_B_BS1 BA0 VDD8 BA2 BA2
4,13 M_B_BS1 N8 B2 N8 B2
M_B_BS2 BA1 VDD9 M_B_BS2 BA1 VDD9 M_B_CAS# M_B_CAS#
SDRAM 2DIE 4,13 M_B_BS2 M3 M3 K3 G9 K3 G9
BA2 BA2 M_B_RAS# CAS# VSSQ1 M_B_RAS# CAS# VSSQ1
J3 G1 J3 G1
M_B_CS#1_2DIE M_B_CAS# M_B_CAS# M_B_ODT0 RAS# VSSQ2 M_B_ODT0 RAS# VSSQ2
4,13 M_B_CS#1_2DIE 4,13 M_B_CAS# K3 G9 K3 G9 K1 F9 K1 F9
M_B_CKE1_2DIE M_B_RAS# CAS# VSSQ1 M_B_RAS# CAS# VSSQ1 ODT VSSQ3 ODT VSSQ3
4,13 M_B_CKE1_2DIE 4,13 M_B_RAS# J3 G1 J3 G1 E8 E8
M_B_ODT1_2DIE M_B_ODT0 RAS# VSSQ2 M_B_ODT0 RAS# VSSQ2 VSSQ4 VSSQ4
4,13 M_B_ODT1_2DIE 4,13 M_B_ODT0 K1 F9 K1 F9 E2 E2
ODT VSSQ3 ODT VSSQ3 M_B_CLK_DDR0 VSSQ5 M_B_CLK_DDR0 VSSQ5
E8 E8 J7 D8 J7 D8
VSSQ4 VSSQ4 M_B_CLK_DDR#0 CK VSSQ6 M_B_CLK_DDR#0 CK VSSQ6
E2 E2 K7 D1 K7 D1
M_B_CLK_DDR0 VSSQ5 M_B_CLK_DDR0 VSSQ5 M_B_CKE0 CK# VSSQ7 M_B_CKE0 CK# VSSQ7
4,13 M_B_CLK_DDR0 J7 D8 J7 D8 K9 B9 K9 B9
M_B_CLK_DDR#0 CK VSSQ6 M_B_CLK_DDR#0 CK VSSQ6 CKE VSSQ8 CKE VSSQ8
4,13 M_B_CLK_DDR#0 K7 D1 K7 D1 B1 B1
M_B_CKE0 CK# VSSQ7 M_B_CKE0 CK# VSSQ7 VSSQ9 VSSQ9
4,13 M_B_CKE0 K9 B9 K9 B9
CKE VSSQ8 CKE VSSQ8 FBB_ZQ2 FBB_ZQ3
B1 B1 L8 L8
VSSQ9 VSSQ9 M_B_CS#0 ZQ M_B_CS#0 ZQ
L2 L2
FBB_ZQ0 FBB_ZQ1 M_B_WE# CS# M_B_WE# CS#
L8 L8 L3 L3
M_B_CS#0 ZQ M_B_CS#0 ZQ DRAMRST# WE# DRAMRST# WE#
check here 4,13 M_B_CS#0
M_B_W E#
L2
CS# M_B_W E#
L2
CS#
T2
RESET# VSS1
T9 T2
RESET# VSS1
T9
4,13 M_B_W E# L3 L3 T1 T1
DRAMRST# WE# DRAMRST# WE# VSS2 VSS2
4,14 DRAMRST# T2 T9 T2 T9 E7 P9 E7 P9
RESET# VSS1 RESET# VSS1 DML VSS3 DML VSS3
T1 T1 D3 P1 D3 P1
FBB_ZQ0 VSS2 VSS2 DMU VSS4 DMU VSS4
1 R1509 2 E7 P9 E7 P9 M9 M9
240Ohm DML VSS3 DML VSS3 M_B_DQS5 VSS5 M_B_DQS6 VSS5
D3 P1 D3 P1 F3 M1 F3 M1
DMU VSS4 DMU VSS4 M_B_DQS#5 DQSL VSS6 M_B_DQS#6 DQSL VSS6
M9 M9 G3 J8 G3 J8
FBB_ZQ1 VSS5 VSS5 DQSL# VSS7 DQSL# VSS7
1 R1510 2 M_B_DQS1 F3 M1 M_B_DQS3 F3 M1 GND M_B_DQS4 C7 J2 GND M_B_DQS7 C7 J2
240Ohm GND M_B_DQS#1 DQSL VSS6 M_B_DQS#3 G3 DQSL VSS6 M_B_DQS#4 DQSU VSS8 M_B_DQS#7 DQSU VSS8
G3 J8 J8 B7 G8 B7 G8
M_B_DQS0 DQSL# VSS7 GND M_B_DQS2 C7 DQSL# VSS7 DQSU# VSS9 DQSU# VSS9
C7 J2 J2 E1 E1
FBB_ZQ2 DQSU VSS8 DQSU VSS8 VSS10 VSS10
1 R1511 2 M_B_DQS#0 B7 G8 M_B_DQS#2 B7 G8 B3 B3
240Ohm DQSU# VSS9 DQSU# VSS9 M_B_DQ40 E3 VSS11 M_B_DQ51 VSS11
E1 E1 A9 E3 A9
VSS10 VSS10 M_B_DQ44 F7 DQL0 VSS12 M_B_DQ49 DQL0 VSS12
B3 B3 F7
FBB_ZQ3 VSS11 VSS11 DQL1 DQL1
1 R1512 2 M_B_DQ14 E3 A9 M_B_DQ27 E3 A9 M_B_DQ41 F2 M_B_DQ52 F2
240Ohm M_B_DQ12 DQL0 VSS12 M_B_DQ29 DQL0 VSS12 M_B_DQ45 F8 DQL2 GND M_B_DQ55 DQL2 GND
F7 F7 F8
M_B_DQ10 F2 DQL1 M_B_DQ30 DQL1 M_B_DQ42 H3 DQL3 M_B_DQ53 H3 DQL3
F2
M_B_DQ8 F8 DQL2 GND M_B_DQ28 DQL2 GND M_B_DQ47 H8 DQL4 M_B_DQ54 H8 DQL4
F8
M_B_DQ11 H3 DQL3 M_B_DQ31 DQL3 M_B_DQ43 G2 DQL5 M_B_DQ50 DQL5
H3 H1 M_B_VREFDQ G2 H1 M_B_VREFDQ
GND M_B_DQ13 DQL4 M_B_DQ24 DQL4 M_B_DQ46 H7 DQL6 VREFDQ M_B_DQ48 DQL6 VREFDQ
H8 H8 H7
M_B_DQ15 G2 DQL5 M_B_DQ26 DQL5 DQL7 DQL7
H1 M_B_VREFDQ G2 H1 M_B_VREFDQ M8 M_B_VREFCA M8 M_B_VREFCA
M_B_DQ9 H7 DQL6 VREFDQ M_B_DQ25 DQL6 VREFDQ VREFCA VREFCA
H7
DQL7 DQL7
M8 M_B_VREFCA M8 M_B_VREFCA
VREFCA VREFCA M_B_DQ36 D7 M_B_DQ60 D7
C M_B_DQ34 C3 DQU0 M_B_DQ59 DQU0 C
C3
M_B_DQ1 M_B_DQ17 M_B_DQ37 C8 DQU1 M_B_DQ57 DQU1
D7
DQU0
D7
DQU0 DQU2
SDRAM 2DIE C8
DQU2
SDRAM 2DIE
M_B_DQ7 C3 M_B_DQ19 C3 M_B_DQ38 C2 M7 M_B_A15 M_B_DQ62 C2 M7 M_B_A15
M_B_DQ0 DQU1 M_B_DQ16 DQU1 M_B_DQ32 DQU3 NC5 FBB_ZQ21 M_B_DQ56 DQU3 NC5 FBB_ZQ31
C8
DQU2
SDRAM 2DIE C8
DQU2
SDRAM 2DIE A7
DQU4 NC4
L9 A7
DQU4 NC4
L9
M_B_DQ3 C2 M7 M_B_A15 M_B_DQ22 C2 M7 M_B_A15 M_B_DQ35 A2 L1 M_B_CS#1_2DIE M_B_DQ63 A2 L1 M_B_CS#1_2DIE
FBB_ZQ01 DQU3 NC5 DQU3 NC5 DQU5 NC3 DQU5 NC3
1 R1513 2 M_B_DQ5 A7 L9 FBB_ZQ01 M_B_DQ21 A7 L9 FBB_ZQ11 M_B_DQ33 B8 J9 M_B_CKE1_2DIE M_B_DQ58 B8 J9 M_B_CKE1_2DIE
240Ohm /2D M_B_DQ2 DQU4 NC4 M_B_CS#1_2DIE M_B_DQ18 DQU4 NC4 M_B_CS#1_2DIE M_B_DQ39 A3 DQU6 NC2 M_B_ODT1_2DIE M_B_DQ61 DQU6 NC2 M_B_ODT1_2DIE
A2 L1 A2 L1 J1 A3 J1
M_B_DQ4 DQU5 NC3 M_B_CKE1_2DIE M_B_DQ20 DQU5 NC3 M_B_CKE1_2DIE DQU7 NC1 DQU7 NC1
B8 J9 B8 J9
FBB_ZQ11 M_B_DQ6 DQU6 NC2 M_B_ODT1_2DIE M_B_DQ23 DQU6 NC2 M_B_ODT1_2DIE
1 R1516 2 A3 J1 A3 J1 EDJ4216BASE-DJ-F EDJ4216BASE-DJ-F
240Ohm /2D DQU7 NC1 DQU7 NC1
EDJ4216BASE-DJ-F EDJ4216BASE-DJ-F
FBB_ZQ21 1 R1514 2
240Ohm /2D

FBB_ZQ31 1 R1515 2
240Ohm /2D

GND

R3.0. Item 100.

Cap Placement of VREF


M_B_VREFCA Cap Placement of +1.5V
M_B_VREFDQ
U1501
0.1uF
U1501 U1401
0.1uF x 4 0.1uF x 4
U1502
0.1uF U1502 U1402
0.1uF x 4 0.1uF x 4
2.2uF
2.2uF 220uF 2.2uF
U1503 U1503 x 2 x1 x 2 U1403
0.1uF 0.1uF x 4 0.1uF x 4

U1504 U1404
U1504 0.1uF x 4 0.1uF x 4
0.1uF
B B

Refer to Intel CRB

M_B_VREFDQ M_B_VREFCA
1

C1527 C1528
2.2UF/10V 2.2UF/10V
2

GND GND

0201 0.1uF +1.5V

M_B_VREFDQ M_B_VREFCA
Change Size form 0603 to 0402
1

1
1

C1523 C1524 C1525 C1526 C1519 C1520 C1521 C1522 C1508 C1507
0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 2.2UF/10V 2.2UF/10V
2

nbs_c0201_h13_000s nbs_c0201_h13_000s
2

nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s


nbs_c0201_h13_000s nbs_c0201_h13_000s

GND GND GND

A
ER-037 ER-022 A
0201 0.1uF

+1.5V +1.5V +1.5V +1.5V +1.5V +1.5V +1.5V +1.5V


R3.02.
Item 107.
1

1
C1529 C1530 C1531 C1532
1

C1501 C1517 C1518 C1513 C1514 C1515 C1516 C1502 C1504 C1503 C1505 C1512 C1510 C1509 C1506 8PF/25V 8PF/25V 8PF/25V 8PF/25V
2

0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 8PF/25V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V C1511 0.1UF/6.3V
nbs_c0201_h13_000s nbs_c0201_h13_000s 8PF/25V nbs_c0201_h13_000s
2

nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s nbs_c0201_h13_000s GND GND GND GND


nbs_c0201_h13_000s nbs_c0201_h13_000s

Close U1501 GND Close U1502 GND Close U1503 GND Close U1504 R3.02. GND
Close Close Close Close
Item 107.
U1501 U1502 U1503 U1504 Title : ''5B21%2$5'B%
ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
D 8;$ R2.0
Date: Friday, May 18, 2012 Sheet 15 of 98
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : ''5B7(50,1$7,21B%
ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 16 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : ''5B21%2$5'B%B/
ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 17 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : ''5B21%2$5'B%B+
ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 18 of 99
5 4 3 2 1
5 4 3 2 1

Calpella Clarksfield DDR3 SO-DIMM VREFDQ DDR3 Vref


Platform Design Guide Change Details
Intel Document Number: 400755
D D

+1.5V

2
R1901
1KOhm
M_A_VREFCA

1
1

1
C1903
0.1UF/16V
R1902

2
1KOhm
Near DIMM Device <5000 mil

2
GND GND
Ivy-Bridge CPU:
+1.5V
Q1901 mount
Sandy-Bridge CPU:
Q1901 un-mount
2
R1903
DRAMRST#_GATE 4
1KOhm Q1901
M_A_VREFDQ 2N7002
/CR

1
1

G
3

S 2
SA_DIMM_VREFDQ 5

D
1

C C1904 C
0.1UF/16V
R1904 R1909
2

1KOhm 0Ohm
2 @ 1
2

GND GND

Del M_B_VREFCA and M_B_VREFDQ


+1.5V
2

R1905
1KOhm
M_B_VREFCA
1
1

C1905
0.1UF/16V
R1907
2

1KOhm
2

B B
Ivy-Bridge CPU:
GND GND
Q1902 mount
+1.5V Sandy-Bridge CPU:
Q1902 un-mount
2

R1908 DRAMRST#_GATE
1KOhm Q1902
M_B_VREFDQ 2N7002
/CR
1
1

G
3

S 2

SB_DIMM_VREFDQ 5
D
1

C1906
0.1UF/16V
R1906 R1910
2

1KOhm 0Ohm
2 @ 1
2

GND GND

R3.0. Item 96,


Payne. 110905.

A A

Title :''5&$B'492/7$*(
ASUSTeK COMPUTER INC. NB6 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 19 of 98
5 4 3 2 1
5 4 3 2 1

+VCC_RTC

D D

2 1
R2002 2 1
20KOhm

1
1% GND C2005

1
JRST2001 18PF/50V X2001

1
CMOS Settings JRST2001

1
C2002 SGL_JUMP 2 32.768Khz R2006

2
1UF/6.3V @ 10MOhm
Clear CMOS Shunt 5% U2001A
3

2
Open

2
Keep CMOS C2006 X1_RTC A20 C38
(Default) RTCX1 FWH0/LAD0 LPC_AD0 30,31,44
18PF/50V SL2001 A38 LPC_AD1 30,31,44

4
FWH1/LAD1

LPC
2 1 X2RTC 2 1 X2_RTC C20 B37
0402 RTCX2 FWH2/LAD2 LPC_AD2 30,31,44
GND GND C37
TPM Settings JRST2002 GND RTCRST# D20
FWH3/LAD3 LPC_AD3 30,31,44
RTCRST#
Clear ME RTC Shunt D36 LPC_FRAME# 30,31,44
SRTCRST# FWH4/LFRAME#
G22
Registers R2004 SRTCRST#
E36
LDRQ0#
2 1MOhm 1 SM_INTRUDER#

RTC
Keep ME RTC Open K22
INTRUDER# LDRQ1#/GPIO23
K36
Registers (Default) 2 1 1 2 INTVRMEN C17 V5
+VCC_RTC INTVRMEN SERIRQ INT_SERIRQ 30,31
R2007 330KOhm 5%
R2003
20KOhm AM3 SATA_RXN0 51
SATA0RXN

1
1% ACZ_BCLK N34 AM1 SATA_RXP0 51
JRST2002 HDA_BCLK SATA0RXP

SATA 6G
AP7 01/04 Modify by Spark;

1
SATA0TXN SATA_TXN0 51

1
C2003 SGL_JUMP ACZ_SYNC_PCH L34 AP5 Follow Capealla
HDA_SYNC SATA0TXP SATA_TXP0 51

2
1UF/6.3V @
T2014 1 PCH_SPKR T10 AM10 SATA_RXN1 51
HD Audio

2
SPKR SATA1RXN
AM8
ACZ_RST# K34
HDA_RST#
SATA1RXP
SATA1TXN
AP11
SATA_RXP1
SATA_TXN1
51
51
ER-026
AP10 SATA_TXP1 51
SATA1TXP
HDA_SYNC(On-Die PLL VR voltage select):
GND GND 63 ACZ_SDIN0_AUD E34 AD7
Rising edge of RSMRST# pin HDA_SDIN0 SATA2RXN
+3VSUS_HDA SATA2RXP
AD5 SATA 0 SSD
High:1.5V, Low:1.8V (default) G34
HDA_SDIN1 SATA2TXN
AH5
+5VS
C
SATA2TXP
AH4 SATA 1 SSD (RAID) C
C34
HDA_SDIN2

IHDA
SATA3RXN
AB8 SATA 2
1
1KOhm

A34 AB10
HDA_SDIN3 SATA3RXP
AF3 SATA 3
R2028

SATA3TXN
AF1
ACZ_SDOUT_PCH SATA3TXP
A36
HDA_SDO SATA 4
2

SATA
Y7
2

SATA4RXN
SATA4RXP
Y5 SATA 5
ACZ_SYNC 1 6 ACZ_SYNC_PCH C36 AD3
HDA_DOCK_EN#/GPIO33 SATA4TXN
AD1
UM6K1N SATA4TXP
N32
HDA_DOCK_RST#/GPIO13
Q2011A Y3
SATA5RXN
1
1KOhm

Y1
SATA5RXP
AB3
R2029

@ PCH_JTAG_TCK SATA5TXN
J3 AB1
JTAG_TCK SATA5TXP
7 PCH_JTAG_TMS PCH_JTAG_TMS H7 Y11
2

JTAG_TMS SATAICOMPO

JTAG
7 PCH_JTAG_TDI PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2 +VTT_SATA
JTAG_TDI SATAICOMPI R2021 37.4Ohm 1%
7 PCH_JTAG_TDO PCH_JTAG_TDO H1
JTAG_TDO
AB12
SATA3RCOMPO
AB13 SATA3_COMP 1 2 +VTT_SATA3
R2019 1 SATA3COMPI
63 ACZ_BCLK_AUD 2 33Ohm ACZ_BCLK R2022 49.9Ohm 1%
63 ACZ_SYNC_AUD R2024 1 2 33Ohm ACZ_SYNC
63 ACZ_RST#_AUD R2025 1 2 33Ohm ACZ_RST# 28 SPI_CLK T3 AH1 RBIAS_SATA3 1 2
R2026 1 SPI_CLK SATA3RBIAS
63 ACZ_SDOUT_AUD 2 33Ohm ACZ_SDOUT R2023 750Ohm 1%
28 SPI_CS#0 2 1 SB_SPICS0# Y14
R2010 15Ohm 5% SPI_CS0# GND
T1
SPI_CS1#
1

SPI
C2008 P3 SATALED#: O.D. 6mA
15PF/50V SATALED#
@ ACZ_SDIN0_AUD 28 SPI_SI V4 V14 SATA0GP
2

SPI_MOSI SATA0GP/GPIO21
28 SPI_SO U3 P1 SATA1GP 1 T2012
SPI_MISO SATA1GP/GPIO19
1

B B
C2007
15PF/50V PRE-ES1
GND @ Boot BIOS Strap:GNT1#(BBS0), SATA1GP(BBS1)
2

RTC Battery
+3VSUS_ORG
ACZ_SDOUT:(1) PCH: Internal PD 20k JTAG For PU/PD
+5VS
ohm, VIL=0.35V, VIH=0.65~3.3V (2) Boundary Scan TP (PCH)
ALC269:VIL<0.35*3.3V, VIH>0.65*3.3V
1

R2008
1KOhm
U37 001 +3VS_VCC3_3
5

+RTCBAT PCH_JTAG_TCK T2008


RTC battery 1
2

ACZ_SDOUT 4 3 ACZ_SDOUT_PCH INT_SERIRQ 3 RN2002B PCH_JTAG_TMS T2009


10KOHM4 1
J2001 +3VA UM6K1N PCH_JTAG_TDI 1 T2010
1

3 SATA0GP 5 RN2002C
SIDE1 +VCC_RTC
Q2011B 10KOHM6
1 R2043 PCH_JTAG_TDO 1 T2011
1 D2001 33Ohm
2
2 RN2002A
4 1 1 10KOHM2
SIDE2
3
2

WTOB_CON_2P 2 1 +RTC_BAT 2 RTCRST# 1 T2013


R2001 7 RN2002D
10KOHM8
3

A BAT54CW 3 A
1KOhm D
Q2001
2N7002 INTVRMEN 1 T2015
1 @ 2 30 PCH_SPI_OV 11
R2009 0Ohm G SRTCRST# 1 T2016
2 S
2

ER-023
GND

ACZ_SDOUT is a signal used for Flash


Title3&+B,%(;  6$7$,+'$57&/3&
:
Descriptor security Override/ME debug mode ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
HIGH : get overrideen, LOW : disable override Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 20 of 99
5 4 3 2 1
5 4 3 2 1

+3VSUS_ORG

+3VSUS_ORG

1
R2137 PR-006
/@_TPanel
U2001B 10KOhm R2111 +12VS +3VS
1 2 0Ohm EXT_SCI# 24,30 PCHHOT# 1 10KOHM2
RN2101A

2
3 RN2101B
10KOHM4
BG34
PERN1 R2112
BJ34 E12 1 2 0Ohm TP_INT 31 5 10KOHM6
RN2101C
PERP1 SMBALERT#/GPIO11
AV32
PETN1

5
AU32 H14 SCL_3A CLK_PEGB_REQ# 7 RN2101D
PETP1 SMBCLK 10KOHM8

D PCIE2: WLAN 53 PCIE_RXN2_WLAN BE34


PERN2 SMBDATA
C9 SDA_3A PR-006 SCL_3A 3 4 SCL_CLK_TP
SCL_CLK_TP 31
SDA_3A 1 2.2KOhm2
RN2102A
D
53 PCIE_RXP2_WLAN BF34
0.1UF/16V 2 PERP2
53 PCIE_TXN2_WLAN 1 C2101 PCIE_TXN2_C BB32 UM6K1N SCL_CLK_TP 3 2.2KOhm4
RN2102B
PETN2

2
53 PCIE_TXP2_WLAN 0.1UF/16V 2 1 C2102 PCIE_TXP2_C AY32 Q2111B
PETP2

SMBUS
A12 DRAMRST_PCH SCL_3A 5 RN2102C
SML0ALERT#/GPIO60 DRAMRST_PCH 4 2.2KOhm6
BG36 SDA_3A 6 1 SCL_DAT_TP
PERN3 SCL_DAT_TP 31
BJ36 C8 SML0_CLK SCL_DAT_TP 7 RN2102D
PERP3 SML0CLK 2.2KOhm8
AV34 UM6K1N RC Delay Time
PETN3 SML0_DAT
AU34 G12 Q2111A
PETP3 SML0DATA SML0_CLK RN2103C
5 2.2KOhm6
BF36
PERN4 SML1_CLK RN2103A
BE36 1 2.2KOhm2
PERP4 PCHHOT# T2111
AY34 C13 1
PETN4 SML1ALERT#/PCHHOT#/GPIO74
BB34
ER-013 PETP4
SML1CLK/GPIO58
E14 SML1_CLK SML0_DAT 7 2.2KOhm8
RN2103D

PCI-E*
BG37
PERN5 To EC
BH37 M16 SML1_DAT SML1_DAT 3 RN2103B
PERP5 SML1DATA/GPIO75 2.2KOhm4
AY36
PETN5
BB36
PETP5 +3VSUS_ORG +3VS_VCC3_3
BJ38
PERN6
BG38
PERP6 CLK_REQ6# RN2105A

Controller
AU36 M7 1 10KOHM2
PETN6 CL_CLK1 CLK_REQ7# RN2105B
AV36 3 10KOHM4
PETP6 CLK_PEGA_REQ# RN2105C
PCH CLKREQ Setting: 5 10KOHM6

Link
BG40 T11 CLK_REQ2# 7 RN2105D
PERN7 CL_DATA1 10KOHM8
BJ40
PERP7 +3VSUS_ORG
AY40
PETN7
BB40 P10
PETP7 CL_RST1#
BE38 CLK_REQ4# 1 RN2104A
10KOHM2

䡢娵㗗⏎㚫㺷暣?
PERN8 CLK_REQ5# RN2104B
BC38 3 10KOHM4
PERP8
AW38
PETN8
AY38
PETP8 +3VSUS_ORG
M10 CLK_PEGA_REQ# 1 T2114
PEG_A_CLKRQ#/GPIO47
Y40 CLK_REQ0# 610KOHM 5 RN2104C
CLKOUT_PCIE0N
Y39 CLK_REQ1# 810KOHM 7 RN2104D
CLKOUT_PCIE0P
C AB37 C
T2125 CLK_REQ0# CLKOUT_PEG_A_N
1 J2

CLOCKS
AB38
PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P
GND
53 CLK_PCIE_WLAN# 2 1 SL2119 CLK_PCH_SRC1_N AB49 AV22 CLK_CPU_BCLK#_PCH 2 1 SL2107 CLK_CPU_BCLK# 3
0402 CLKOUT_PCIE1N CLKOUT_DMI_N 0402
53 CLK_PCIE_WLAN 2 1 SL2120 CLK_PCH_SRC1_P AB47 AU22 CLK_CPU_BCLK_PCH 2 1 SL2108 CLK_CPU_BCLK 3
0402 CLKOUT_PCIE1P CLKOUT_DMI_P 0402
2 1 SL2118 CLK_REQ1# M1 +3VSUS_ORG
53 CLKREQ_WLAN# 0402 PCIECLKRQ1#/GPIO18
AM12 CLK_DREF# 3
CLKOUT_DP_N
AM13 CLK_DREF 3 2 1
CLKOUT_DP_P CLKREQ_USB3# 10KOhm @ R2135
AA48 2 1
CLKOUT_PCIE2N 10KOhm R2134
AA47
CLKOUT_PCIE2P CLK_DMI#_PCH
BF18
T2123 CLK_REQ2# CLKIN_DMI_N CLK_DMI_PCH GND
1 V10 BE18
PCIECLKRQ2#/GPIO20 CLKIN_DMI_P
+3VSUS_ORG
Y37 BJ30 CLK_GND#
ER-013 Y36
CLKOUT_PCIE3N
CLKOUT_PCIE3P
CLKIN_GND1_N
CLKIN_GND1_P
BG30 CLK_GND
DRAMRST_PCH 2 1
T2127 1 CLKREQ_USB3# A8 10KOhm R2136
PCIECLKRQ3#/GPIO25 CLK_DOT96#_PCH
G24
CLKIN_DOT_96N CLK_DOT96_PCH
E24
CLKIN_DOT_96P
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P CLK_SATA#_PCH
AK7
T2124 CLK_REQ4# CLKIN_SATA_N CLK_SATA_PCH
1 L12 AK5
PCIECLKRQ4#/GPIO26 CLKIN_SATA_P

V45 K45 CLK_ICH14_PCH C2108


CLKOUT_PCIE5N REFCLK14IN X1_25IN_XTAL
V46 1 2
CLKOUT_PCIE5P T2118
1

3
T2126 1 CLK_REQ5# L14 H45 CLK_PCI_FB CLK_PCI_FB 24 12PF/50V
PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK

2
R2107 4
AB42 V47 X1_25IN 1MOhm X2101
CLKOUT_PEG_B_N XTAL25_IN X2_25OUT
AB40 V49 2 25Mhz
CLKOUT_PEG_B_P XTAL25_OUT

1
T2116 1 CLK_PEGB_REQ# E6
B PEG_B_CLKRQ#/GPIO56 C2109 B

1
Y47 XCLK_COMP 1 2 +VCCDIFFCLKN 2 1 X225OUT 1 2
XCLK_RCOMP R2101 90.9Ohm 1% SL2123 0402
V40
CLKOUT_PCIE6N
V42 12PF/50V
CLKOUT_PCIE6P GND CLK_GND#
R2108: For Xtal measurement 1 2
T2122 1 CLK_REQ6# T13 CLK_GND R2130
1 210KOhm
PCIECLKRQ6#/GPIO45 R2131 10KOhm
V38 K43
CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64 CLK_DMI#_PCH
V37 1 2
FLEX CLOCKS

CLKOUT_PCIE7P CLK_DMI_PCH R2123


F47 1 210KOhm
T2117 CLK_REQ7# CLKOUTFLEX1/GPIO65 R2125 10KOhm
1 K12
PCIECLKRQ7#/GPIO46
H47
CLKOUTFLEX2/GPIO66 CLK_DOT96#_PCH
7 CLK_ITP_BCLK_PCH# AK14 1 2
CLKOUT_ITPXDP_N CLK_OUT3 R2103
7 CLK_ITP_BCLK_PCH AK13 K49 1 2 39Ohm CLK_USB48 63
CLK_DOT96_PCH R2126
1 210KOhm
CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67 R2127 10KOhm

1
PRE-ES1 C2107 CLK_SATA#_PCH 1 2
10PF/50V CLK_SATA_PCH R2128
1 210KOhm
@/EMI R2129 10KOhm
Check BIOS

2
Programmable output clock
CLK_ICH14_PCH 1 2
GND R2122 10KOhm

stuff:Integrated clock mode

GND

A A

Title : 3&+B,%(;  B3&,(&/.60%3(

ASUSTeK COMPUTER INC. Engineer: shihhsien_yang


Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 21 of 99
5 4 3 2 1
5 4 3 2 1

U2001C
FDI_TXN[7:0] 3
D D

3 DMI_RXN0 BC24 BJ14 FDI_TXN0


DMI0RXN FDI_RXN0 FDI_TXN1
3 DMI_RXN1 BE20 AY14
DMI1RXN FDI_RXN1 FDI_TXN2
3 DMI_RXN2 BG18
DMI2RXN FDI_RXN2
BE14 DSWVRMEN:
3 DMI_RXN3 BG20 BH13 FDI_TXN3 High -> DSW On-Die VR Enable
DMI3RXN FDI_RXN3 FDI_TXN4
BC12 Low -> DSW On-Die VR disable
FDI_RXN4 FDI_TXN5
3 DMI_RXP0 BE24 BJ12
DMI0RXP FDI_RXN5 FDI_TXN6 R2203
3 DMI_RXP1 BC20 BG10
DMI1RXP FDI_RXN6 FDI_TXN7 330KOhm
3 DMI_RXP2 BJ18 BG9 FDI_TXP[7:0] 3
DMI2RXP FDI_RXN7 5%
3 DMI_RXP3 BJ20
DMI3RXP FDI_TXP0 DSWVRMEN
BG14 2 1 +VCC_RTC
+VTT_PCH_VCCIO FDI_RXP0 FDI_TXP1
3 DMI_TXN0 AW24
DMI0TXN FDI_RXP1
BB14 DPWROK:
3 DMI_TXN1 AW20 BF14 FDI_TXP2 This input is tied

1
DMI1TXN FDI_RXP2 FDI_TXP3
3 DMI_TXN2 BB18 BG13 together with RSMRST#
DMI2TXN FDI_RXP3 FDI_TXP4 R2204
3 DMI_TXN3 AV18 BE12
DMI3TXN FDI_RXP4 in platforms that do not

DMI
FDI
BG12 FDI_TXP5 330KOhm

2
FDI_RXP5 FDI_TXP6 5% @ support DeepSx
SUSACK#: 3 DMI_TXP0 AY24
DMI0TXP FDI_RXP6
BJ10
SUSACK# and SUSWARN# can be tied together R2202 3 DMI_TXP1 AY20 BH9 FDI_TXP7

2
DMI1TXP FDI_RXP7
if EC does not want to involve in handshake 49.9Ohm 3 DMI_TXP2 AY18
1% DMI2TXP
3 DMI_TXP3 AU18 VCCDSW stable to DPWROK
mechanism for the Deep Sleep state entry and exit. DMI3TXP GND
AW16 FDI_INT 3 assertion is 10ms (min)

1
FDI_INT
BJ24 AV12 FDI_FSYNC0 3
DMI_ZCOMP FDI_FSYNC0
DMI_COMP BG25 BC10
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 3
1 2 BH21 AV14 FDI_LSYNC0 3
R2201 750Ohm 1% DMI2RBIAS FDI_LSYNC0
BB10 FDI_LSYNC1 3
FDI_LSYNC1
GND

A18 DSWVRMEN
ME_SusPwrDnAck_R DSWVRMEN
2 1
SL2213 0402

System Power Management


PM_SUSACK# C12 E22 DPWROK_R 1 2 SL2207 PM_RSMRST#_PCH
SUSACK# DPWROK 0402
C C
3,7 XDP_DBRESET# R2212 2 @ 1 0Ohm nbs_r0201_h12_000s SYS_RESET# K3 B9 WAKE# 1 2 SL2206 PCIE_WAKE# 53
SYS_RESET# WAKE# 0402
4/23 Delete R2222, R2228,
7 PM_SYSPWROK_PCH PM_SYSPWROK_PCH P12 N3 PM_CLKRUN#
SYS_PWROK CLKRUN#/GPIO32 PM_CLKRUN# 30,31 U2201, R2230, R2233, C2201

ASW Power well stable for at least 1ms


PM_PWROK_PCH L22
PWROK SUS_STAT#/GPIO61
G8 PM_SUS_STAT#
PM_SUS_STAT# 31 sleeper 天恋㌱
and D2203, Deeper

before platform logic asserts APWROK


2 1 APWROK_R L10 N14 SUS_CLK# 1 T2213
SL2214 0402 APWROK SUSCLK/GPIO62

Have Pull up Res. in CPU side 3 H_DRAM_PWRGD B13 D10 SLP_S5# 1 T2205
DRAMPWROK SLP_S5#/GPIO63
APWROK:
For platform not supporting iAMT PM_RSMRST#_PCH C21 H4 SLP_S4#_R 1 2 SL2204
RSMRST# SLP_S4# 0402 PM_SUSC# 30
it can be connected to PWROK.
30 ME_SUSPWRDNACK 2 1ME_SusPwrDnAck_R K16 F4 SLP_S3#_R 1 2 SL2205 PM_SUSB# 30
SL2212 0402 SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# 0402
SUSPWRDNACK (PCH to EC): 7 PM_PWRBTN#_R
This pin requires a pull-up to +3VSUS. 30 PM_PWRBTN# 2 1 E20 G10 SLP_A# 1 T2206
SL2203 0402 PWRBTN# SLP_A#
Platforms are not expected to use this
signal when the PCH's Deep S4/S5 feature is used. ME_AC_PRESENT_PCH H20 G16 SLP_SUS#_R 1 T2208
ACPRESENT/GPIO31 SLP_SUS#

T2201 1 PM_BATLOW# E10 AP14 PMSYNCH is Low in C6/C7 states only


BATLOW#/GPIO72 PMSYNCH PM_SYNC# 3
SUSWARN# (PCH to EC):
This pin aserts low when PCH is planning
T2202 1 PM_RI# A10 K14 SLP_LAN# 1 T2207
to enter the DeepSx power state and remove RI# SLP_LAN#/GPIO29
Suspend power(using SLP_SUS#)
PRE-ES1

Entry Into Deep S4/S5


A combination of condition is required for entry into Deep S4/S5
B
All of the following must be met:
CHECK PULL-UP OR DOWN B

-Intel ME in Moff.
-AND either "a" or "b"(EDS R0.7v1 p.186).

+VCCPDSW

Power failure solution (S0-->G3,S5-->G3): 09'MoW04:


PM_PWROK,PM_RSMRST#: previous platform solution.
2

Optional if ME FW is
ME_PWROK,ME_AC_PRESENT: reserved for test. R2214Ignition
FW
10KOhm
1

For PU/PD CRB:8.2K Ohm


Boundary Scan TP (PCH)
2 1 PM_SYSPWROK_PCH +3VS_VCC3_3
30 PM_SYSPWROK
10KOhm R2234
30 PM_PWROK 2 1 PM_PWROK_PCH
10KOhm R2217 +3VSUS_ORG PM_CLKRUN# 1 2 PM_RSMRST#_PCH 1 T2217
1

C2202 R2205 10KOhm


30 PM_RSMRST# 2 R2218 1 1KOhm PM_RSMRST#_PCH 0.01UF/16V PM_PWROK_PCH 1 T2211
@ PM_RI# 1 2
2

R2209 10KOhm APWROK_R 1 T2215


1SS355PT 1 2 D2207 ME_AC_PRESENT_PCH Internal PU 15K to 40K Strap high is GPIO mode
30 ME_AC_PRESENT
GND PCIE_WAKE# 1 2 SYS_RESET# 1 2
D2207: Prevent EC drive hign, R2226 10KOhm R2210 10KOhm
SUS_PWRGD sink low in S5-->G3. PM_SYSPWROK_PCH1 T2216
1

3,30,58,80 ALL_SYSTEM_PWRGD 1 ME_SusPwrDnAck 1 2


1

A R2235 3 R2227 10KOhm A


10KOhm R2220 SUS_PWRGD 2
10KOhm PM_BATLOW# 1 2
BAT54AW R2225 10KOhm
2

D2201 DG:Pull-up 10K Ohm to 3.3V(Core)


2

SLP_LAN# 1 2
D2204 R2206 10KOhm CRB:NO Pull-up or down resistor
1 @
DPWROK_R 3
GND 2
GND
BAT54CW
D2202
Title : 3&+B,%(;  B)','0,6<63:5
1
ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
30,58,81 SUS_PWRGD 3
2 Size Project Name Rev

BAT54CW
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 22 of 99
5 4 3 2 1
5 4 3 2 1

PORT STRAP ENABLE PORT DISABLE PORT


LVDS L_DDC_DATA
PORT B SDVO_CTRLDATA
Pull up to 3.3(V) NC
PORT C DDPC_CTRLDATA with 2.2k Ohm
PORT D DDPD_CTRLDATA
DG P.105,168
D D

+3VS_VCC3_3

L_CTRL_CLK 1 RN2303A
2.2KOHM2
U2001D
L_CTRL_DATA 3 RN2303B
2.2KOHM4
45 LCD_BACKEN J47 AP43
L_BKLTEN SDVO_TVCLKINN
45 LCD_VDD_EN M45 AP45
L_VDD_EN SDVO_TVCLKINP

45 LED_BKLTCTL P45 AM42


L_BKLTCTL SDVO_STALLN
AM40
SDVO_STALLP
T40
L_DDC_CLK
K47 AP39
L_DDC_DATA SDVO_INTN
AP40
T2301 L_CTRL_CLK SDVO_INTP
1 T45
T2302 L_CTRL_DATA L_CTRL_CLK
1 P39
L_CTRL_DATA
AF37 P38
LVD_IBG SDVO_CTRLCLK
AF36 M39
LVD_VBG SDVO_CTRLDATA
AE48
LVD_VREFH
AE47 AT49
LVD_VREFL DDPB_AUXN
AT47
DDPB_AUXP
AT40
DDPB_HPD
AK39
LVDSA_CLK#

LVDS
AK40 AV42
LVDSA_CLK DDPB_0N
AV40
DDPB_0P
AN48 AV45
LVDSA_DATA#0 DDPB_1N
AM47
LVDSA_DATA#1 DDPB_1P
AV46 PULL UP 2.2KOhm@CONNECTOR SIDE

Digital Display Interface


AK47 AU48
LVDSA_DATA#2 DDPB_2N
AJ48 AU47
LVDSA_DATA#3 DDPB_2P
AV47
DDPB_3N
AN47 AV49
LVDSA_DATA0 DDPB_3P
C AM49 C
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47 P46 HDMI_CLK 48
LVDSA_DATA3 DDPC_CTRLCLK
P42 HDMI_DAT 48
DDPC_CTRLDATA
AF40
LVDSB_CLK#
AF39 AP47
LVDSB_CLK DDPC_AUXN
AP49
DDPC_AUXP
AH45 AT38 HDMI_HP 48
LVDSB_DATA#0 DDPC_HPD
AH47
LVDSB_DATA#1 TMDS_TXN2_PCH
AF49 AY47 HDMI_TX2N_PCH 48
LVDSB_DATA#2 DDPC_0N TMDS_TXP2_PCH
AF45 AY49 HDMI_TX2P_PCH 48
LVDSB_DATA#3 DDPC_0P TMDS_TXN1_PCH
AY43
check AH43
LVDSB_DATA0
DDPC_1N
DDPC_1P
AY45 TMDS_TXP1_PCH
HDMI_TX1N_PCH
HDMI_TX1P_PCH
48
48
AH49 BA47 TMDS_TXN0_PCH
LVDSB_DATA1 DDPC_2N HDMI_TX0N_PCH 48
AF47 BA48 TMDS_TXP0_PCH
LVDSB_DATA2 DDPC_2P HDMI_TX0P_PCH 48
AF43 BB47 TMDS_CLKN_PCH
LVDSB_DATA3 DDPC_3N HDMI_CLKN_PCH 48
BB49 TMDS_CLKP_PCH
DDPC_3P HDMI_CLKP_PCH 48

46 CRT_BLUE JP2301 1 2 SHORT_PIN @ CRT_B_PCH_R


N48 M43
JP2302 CRT_G_PCH_R CRT_BLUE DDPD_CTRLCLK
46 CRT_GREEN 1 2 SHORT_PIN @ P49 M36
CRT_R_PCH_R CRT_GREEN DDPD_CTRLDATA
T49
JP2303 CRT_RED
46 CRT_RED 1 2 SHORT_PIN @ PULL UP 2.2KOhm@CONNECTOR SIDE
1 R2307

1 R2308

1 R2309

AT45
DDPD_AUXN

CRT
46 CRT_DDC_CLK T39 AT43
CRT_DDC_CLK DDPD_AUXP
46 CRT_DDC_DATA M40 BH41
CRT_DDC_DATA DDPD_HPD
C2303

C2304

C2305

BB43
1

DDPD_0N
46 CRT_HSYNC 2 1 SL2303 M47 BB45
@ @ @ 0402 CRT_HSYNC DDPD_0P
46 CRT_VSYNC 2 1 SL2304 M49 BF44
0402 CRT_VSYNC DDPD_1N
BE44
2

DDPD_1P
BF42
2

DDPD_2N
2 1 T43 BE42
1KOHM R2310 0.5% DAC_IREF DDPD_2P
150Ohm

150Ohm

150Ohm

T42 BJ42
5PF/50V

5PF/50V

5PF/50V

CRT_IRTN DDPD_3N
BG42
DDPD_3P
GND PRE-ES1
B B
1% 1% 1% GND

ER-021
GND

A A

Title : 3&+B,%(;  B'3/9'6&57


ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 23 of 99
5 4 3 2 1
5 4 3 2 1

Tacoma Pass(NVRAM) Disabling and termination guidelines(DG R0.7 p.322)


If the tacoma Pass interface is not used,
the interface signals, inculding NV_RCOMP,
U2001E
can be left as No connects with few exceptions.
AY7 VccpNAND, NV_ALE, NV_CLE
RSVD1
AV7
RSVD2
BG26 AU3
D TP1 RSVD3 D
BJ26 BG4
TP2 RSVD4
BH25
TP3
BJ16 AT10
TP4 RSVD5
BG16
TP5 RSVD6
BC8 DMI & FDI Termination Voltage PU / PD
AH38
TP6
AH37 AU2
TP7 RSVD7 +3VSUS_ORG
AK43
TP8 RSVD8
AT4 LOW : Set to Vss
AK45
TP9 RSVD9
AT3 NV_CLE
C18 AT1
TP10 RSVD10 OC#5 RN2410A
N30
TP11 RSVD11
AY3 HIGH : Set to Vcc 1 10KOHM 2
H3 AT5
TP12 RSVD12 USB_OC#0 RN2410B
AH12
TP13 RSVD13
AV3 CRB 3 10KOHM 4
AM4 AV1
TP14 RSVD14
AM5 BB1
TP15 RSVD15
Y13 BA3
TP16 RSVD16 OC#7 RN2410C
K24 BB5 5 10KOHM 6
TP17 RSVD17
L24 BB3
TP18 RSVD18 OC#1 RN2410D
AB46 BB7 7 10KOHM 8
AB45
TP19
TP20
RSVD19
RSVD20
BE8 ER-018

RSVD
BD4
RSVD21
BF6
RSVD22 OC#6 1 2
B21 AV5 1 T2401 R2448 10KOhm
TP21 RSVD23 T2403
M20 AV10 1
TP22 RSVD24
AY16
TP23 T2402
BG46 AT8 1
TP24 RSVD25
AY5 +3VS_VCC3_3
RSVD26
BA2
RSVD27
69 U3_U3RXDN1_PCH BE28 RP2401A
USB3Rn1
63 U3_U3RXDN2_PCH BC30 AT12 1 10KOhm5
USB3Rn2 RSVD28
BE32 BF3 10 RP2401B
USB3Rn3 RSVD29 PCI_INTE#
BJ32 2 10KOhm5
USB3Rn4
BC28 10 RP2401C
69 U3_U3RXDP1_PCH
63 U3_U3RXDP2_PCH BE30
USB3Rp1
USB3Rp2 USB2.0 USB 3.0 PCI_INTB# 3 10KOhm5
BF32
USB3Rp3 0 USB 3.0 Port 1 USB 3.0 Port 10 RP2401D
BG32 C24 PCI_INTA# 4
USB3Rp4 USBP0N USB_PN0 69 10KOhm5
69 U3_U3TXDN1_PCH AV26
USB3Tn1 USBP0P
A24 USB_PP0 69 1 USB 2.0 Port (Debug) 2 USB 3.0 Port 10 RP2401E
BB26 C25 SATA_ODD_DA# 6
63 U3_U3TXDN2_PCH USB3Tn2 USBP1N USB_PN1 63 10KOhm5
AU28
USB3Tn3 USBP1P
B25 USB_PP1 63 2 3 10 RP2401F
AY30 C26 PCI_INTD# 7
USB3Tn4 USBP2N 10KOhm5
69 U3_U3TXDP1_PCH AU26
USB3Tp1 USBP2P
A26 3 4 10 RP2401G
AY26 K28 PCI_INTC# 8
63 U3_U3TXDP2_PCH USB3Tp2 USBP3N 10KOhm5
AV28
USB3Tp3 USBP3P
H28 4 Camera 10 RP2401H
AW30 E28 USB_PN4 45 9 10KOhm5
USB3Tp4 USBP4N
USBP4P
D28 USB_PP4 45 5 WiFi/ WiMax/Blue Tooth 10
C28 USB_PN5 53
USBP5N
USBP5P
A28 USB_PP5 53 6
C29
USBP6N
C USBP6P
B29 7 C
PCI_INTA# K40 N28
PCI_INTB# PIRQA# USBP7N +3VS_VCC3_3
K38
PIRQB# USBP7P
M28 8 Touch Panel
PCI
PCI_INTC# H38 L30
PIRQC# USBP8N USB_PN8 45 R2407
PCI_INTD# G38 K30 9 Card Reader
+3V PIRQD# USBP8P USB_PP8 45
USBP9N
G30 USB_PN9 63 1 2 STP_27M
GPU_RST# C46 E30 10
REQ1#/GPIO50 USBP9P USB_PP9 63 +3VS_VCC3_3

USB
STP_27M C44 C30
DGPU_PWR_EN# REQ2#/GPIO52 USBP10N 10KOhm
E40
REQ3#/GPIO54 USBP10P
A30 11
L32
74LVC1G08GW T2416 1 PCI_GNT1# D47
GNT1#/GPIO51
USBP11N
USBP11P
K32 ER-031 12 1 R2408 2GPU_RST#
E42 G32
T2419 STP_A16OVR GNT2#/GPIO53 USBP12N
5
VCC INB
1 1 F46
GNT3#/GPIO55 USBP12P
E32 13 10KOhm
2 PLT_RST# C32
INA USBP13N +3VS_VCC3_3
4 3 A32
3,7,30,31,45,53,63 BUF_PLT_RST# OUTY GND PCI_INTE# USBP13P
G42
T2409 SATA_ODD_DA# PIRQE#/GPIO2
U2401 1 G40
PCB_ID0 PIRQF#/GPIO3
C42 C33 1 R2409 2 DGPU_PWR_EN#
GND PCB_ID1 PIRQG#/GPIO4 USBRBIAS#
D44
PIRQH#/GPIO5
USBRBIAS_PN 10KOhm
B33 1 2
T2407 PCI_PME# USBRBIAS R2406 22.6Ohm 1%
1 K10
PME#
PLT_RST# C6 A14 USB_OC#0 1 /CR 2 GND
PLTRST# OC0#/GPIO59 U3_OC# 69
32 PLT_RST# K20 OC#1 R2410 0Ohm
/TPM OC1#/GPIO40 DIMM_SEL0
B17
R2431 OC2#/GPIO41
31 CLK_TPM 1 2 22Ohm CLK_TPM_R H49 C16 DIMM_SEL1 DIMM_SEL
R2428 CLKOUT_PCI0 OC3#/GPIO42
21 CLK_PCI_FB 1 2 39Ohm CLK_PCI_FB_R H43 L16 DIMM_SEL2
R2429 CLKOUT_PCI1 OC4#/GPIO43
30 CLK_KBCPCI_PCH 1 2 39Ohm CLK_KBCPCI_PCH_R J48 A16 OC#5 1 2 EXT_SCI# 21,30
R2430 CLKOUT_PCI2 OC5#/GPIO9
44 CLK_DEBUG 1 2 22Ohm CLK_DEBUG_R K42 D14 OC#6 R2411 0Ohm
CLKOUT_PCI3 OC6#/GPIO10 OC#7
H40 C14 /TPanel
CLKOUT_PCI4 OC7#/GPIO14
ER-030 +3VSUS_ORG
PRE-ES1 1 @ 2 DIMM_SEL0 1 2
R2442 10KOhm R2445 10KOhm
1 @ 2 DIMM_SEL1 1 2
R2443 10KOhm R2446 10KOhm
1 @ 2 DIMM_SEL2 1 2
R2444 10KOhm R2447 10KOhm

GND

PCBID:10 2GB (DDR3_1333)


DDR3_1333 Samsung Hynix ELPIDA Micron
B B
DIMM_SEL0 L H L H
PCB_ID
DIMM_SEL1 L L H H
+3VS_VCC3_3
DIMM_SEL2 L L L L

+3VS_VCC3_3
PCBID:10 4GB (DDR3_1333)
DDR3_1333 Samsung ASINT ELPIDA Micron
DIMM_SEL0 L H L H
2

2
DIMM_SEL1 L L H H
R2402 R2403
100KOhm 100KOhm DIMM_SEL2 H H H H

ˣDDR3L_1600ˣDDR3_1600)
@ @
1

PCBID:00 4GB (DDR3_L_1333


PCB_ID1 PCB_ID0
DDR3_L_1333 Hynix ELPIDA
2

DIMM_SEL0 H L
R2404 R2405
100KOhm 100KOhm DIMM_SEL1 L H
DIMM_SEL2 L L
1

Boot BIOS Strap : GNT1#, SATA1GP GNT3#: A16 swap override Strap/ DDR3L_1600 Micro ELPIDA
Top-Block swap override jumper DIMM_SEL0 L H
Boot BIOS Strap GND GND
DIMM_SEL1 L H
GNT1#(BBS1) SATA1GP(BBS0) Boot BIOS Location Low=Enabled A16 swap override/
Top-Block swap override DIMM_SEL2 H H
0 1 Reserved PCB_ID1 PCB_ID0 On Board Memory
1
1
0
1
PCI
SPI (PCH)
High=Default 0 0 4GB(DDR3_1600 ˣ DDR3_L_1333 ˣ
DDR3_L_1600)
DDR3_1600
DIMM_SEL0
Hynix ELPIDA
H L
0 0 LPC 0 1 N/A DIMM_SEL1 L H
Sampled on rising edge of PWROK. DIMM_SEL2 H H
1 0 4GB(DDR3_1333)
PCBID:11 8GB (DDR3_1600)
1 1 8GB(DDR3_1600)
A
DDR3_1600 Hynix ELPIDA A
DIMM_SEL0 H L
Default
PU 20K DIMM_SEL1 L H
OHM DIMM_SEL2 H H

Title : 3&+B,%(;  B3&,195$086%


ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Wednesday, April 11, 2012 Sheet 24 of 99
5 4 3 2 1
5 4 3 2 1

+3VS_VCC3_3

2
D D

R2506
1KOhm
+3VS_VCC3_3
1

U2001F
R2597
1% ER-029 STP_PCI# 2 1
S_GPIO 2 100Ohm 1 T7 C40 10KOhm R2515
BMBUSY#/GPIO0 TACH4/GPIO68 WLAN_LED 2 1
30 EXT_SMI# A42 B41 2 1 100KOhm R2540
TACH1/GPIO1 TACH5/GPIO69 R2531 10KOhm PCH_TEMP_ALERT# 2 1
H36 C41 2 1 10KOhm R2541
TACH2/GPIO6 TACH6/GPIO70 R2529 10KOhm EXT_SMI# 2 1
T2508 1 USB3_SMI# E38 A40 2 1 10KOhm R2537
ER-013 TACH3/GPIO7 TACH7/GPIO71 R2530 10KOhm
+3VS_VCC3_3
USB3_SMI# 2 1
T2507 1 ICC_EN# C10 10KOhm R2538
GPIO8 TEST_SET_UP 2 1
C4 10KOhm R2523
LAN_PHY_PWR_CTRL/GPIO12 SATA_DET#4 1 2
56 BT_LED G2 P4 A20GATE 30 10KOhm R2513
GPIO15 A20GATE GFX_CRB_DET 2 1
AU16 10KOhm R2519
SATA_DET#4 PECI
U2
SATA4GP/GPIO16
RCIN#
P5 RCIN# 30
ER-018
DMI_OVRVLTG 2 1

GPIO
D40 AY11 200KOhm R2509
TACH0/GPIO17 PROCPWRGD H_CPUPWRGD 3,7

CPU/MISC
T5 AY10 PM_THRMTRIP# R2512 1 2 390Ohm +V_NVRAM_VCCPNAND DMI Termination Voltage Override
56 WLAN_LED H_THRMTRIP# 3

2
SCLOCK/GPIO22 THRMTRIP#
T2511 1 USB20_SEL E8 T14 INT3_3V# 1 T2502 C2505

2
GPIO24 INIT3_3V#
0.01UF/16V

1
T2510 1 DSW_WAKE# E16 AY1 NV_CLE R2502 1 2 4.7KOhm R2501
GPIO27 DF_TVS
2.2kOHM
53 WLAN_ON# 2 1 SL2502 PLL_ODVR_EN P8
0402 GPIO28 GND
AH8

1
STP_PCI# TS_VSS1
K1 H_SNB_INV# 3
STP_PCI#/GPIO34
AK11
TS_VSS2 +3VSUS_ORG
C K4
GPIO35
PDG V0.9, 3.9.3 These signals shouldn't float C
AH10 on the motherboard. they should be tied to
DMI_OVRVLTG TS_VSS3 BT_LED
V8 GND directly. 2 1
SATA2GP/GPIO36 5% 330KOhm R2526
AK10
FDI_OVRVLTG TS_VSS4
M5
SATA3GP/GPIO37 +3VSUS_ORG
T2512 1 MFG_MODE N2 P37
SLOAD/GPIO38 NC_1 PLL_ODVR_EN 2 1
GFX_CRB_DET M3 GND 10KOhm R2536
SDATAOUT0/GPIO39
TEST_SET_UP V13 BG2 2 @ 1
SDATAOUT1/GPIO48 VSS_NCTF_15 1KOhm R2534
T2501 1 PCH_TEMP_ALERT# V3 BG48
SATA5GP/GPIO49/TEMP_ALERT# VSS_NCTF_16
GPIO28(On-Die PLL VR):
53 BT_ON D6 BH3 GND
GPIO57 VSS_NCTF_17 High:Enable (default), Low:Disable
1 2 BT_ON BH47
VSS_NCTF_18
A4 BJ4
100KOhm VSS_NCTF_1 VSS_NCTF_19
FDI Termination Voltage Override
R2525 A44 BJ44
GND VSS_NCTF_2 VSS_NCTF_20
R2520
A45 BJ45
VSS_NCTF_3 VSS_NCTF_21 FDI_OVRVLTG 2 1
NCTF

A46 BJ46
VSS_NCTF_4 VSS_NCTF_22
100KOhm
A5 BJ5
VSS_NCTF_5 VSS_NCTF_23
A6 BJ6 GND
VSS_NCTF_6 VSS_NCTF_24
B3 C2
VSS_NCTF_7 VSS_NCTF_25
B47 C48
VSS_NCTF_8 VSS_NCTF_26
BD1 D1
VSS_NCTF_9 VSS_NCTF_27
BD49 D49
VSS_NCTF_10 VSS_NCTF_28
B B
BE1 E1
VSS_NCTF_11 VSS_NCTF_29
BE49 E49
VSS_NCTF_12 VSS_NCTF_30
BF1
VSS_NCTF_13 VSS_NCTF_31
F1 GPIO27(checklist r0.7):
Default = Do not connect (floating)
BF49 F49 High (1) = Enables the internal VccVRM to have a
VSS_NCTF_14 VSS_NCTF_32
clean supply for analog rails. No need to use on-board
PRE-ES1 filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board
filter circuits for analog rails.

???
U37 3/11 015

A A

Title : 3&+B,%(;  &38*3,20,6&


ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 25 of 99
5 4 3 2 1
5 4 3 2 1

All Beads : 0603 !!

+VCCA_DAC_1_2 +3VS_VCC3_3

(VccADAC: 1mA@3.3V)
1 2
L2603 1KOhm/100Mhz
U2001H

1
C2614 C2613 C2612 H5
VSS[0]
+VTT_PCH_VCC 0.01UF/16V 0.1UF/6.3V 10UF/6.3V AA17 AK38

2
VSS[1] VSS[80]
AA2 AK4
VSS[2] VSS[81]
(VccCore: 1.3A@1.05V) AA3
VSS[3] VSS[82]
AK42
AA33 AK46
GND GND GND VSS[4] VSS[83]
AA34 AK8
VSS[5] VSS[84]
AB11 AL16
VSS[6] VSS[85]

1
D C2601 C2602 C2603 C2604 AB14 AL17 D
U2001G POWER AB39
VSS[7]
VSS[8]
VSS[86]
VSS[87]
AL19
10UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V AB4 AL2

2
VSS[9] VSS[88]
AB43 AL21
VSS[10] VSS[89]
AA23 U48 AB5 AL23
VCCCORE[1] VCCADAC VSS[11] VSS[90]
AC23 AB7 AL26
GND GND GND GND VCCCORE[2] VSS[12] VSS[91]
AD21 AC19 AL27

CRT
VCCCORE[3] VSS[13] VSS[92]
AD23 U47 AC2 AL31
VCCCORE[4] VSSADAC VSS[14] VSS[93]
AF21 AC21 AL33

VCC CORE
VCCCORE[5] VSS[15] VSS[94]
AF23 AC24 AL34
VCCCORE[6] GND VSS[16] VSS[95]
AG21 AC33 AL48
VCCCORE[7] VSS[17] VSS[96]
AG23 AC34 AM11
VCCCORE[8] VSS[18] VSS[97]
AG24 AK36 AC48 AM14
VCCCORE[9] VCCALVDS VSS[19] VSS[98]
AG26 GND AD10 AM36
VCCCORE[10] VSS[20] VSS[99]
AG27 AK37 AD11 AM39
VCCCORE[11] VSSALVDS VSS[21] VSS[100]
AG29 AD12 AM43
VCCCORE[12] VSS[22] VSS[101]
AJ23 AD13 AM45
+VTT_PCH_VCCIO +VTT_PCH_VCCDPLL_EXP VCCCORE[13] VSS[23] VSS[102]

LVDS
AJ26 AM37 GND AD19 AM46
VCCCORE[14] VCCTX_LVDS[1] VSS[24] VSS[103]
AJ27 AD24 AM7
VCCCORE[15] VSS[25] VSS[104]
AJ29 AM38 AD26 AN2
VCCCORE[16] VCCTX_LVDS[2] VSS[26] VSS[105]
AJ31 AD27 AN29
SL2601 2 VCCCORE[17] VSS[27] VSS[106]
1 R0603 AP36 GND AD33 AN3
VCCTX_LVDS[3] VSS[28] VSS[107]
AD34 AN31
VSS[29] VSS[108]
AP37 AD36 AP12
VCCTX_LVDS[4] VSS[30] VSS[109]
AN19 AD37 AP19
+VTT_PCH_VCC VCCIO[28] +3VS_VCC_GIO +3VS_VCC3_3 VSS[31] VSS[110]
(VccAPLLEXP: 75mA@1.05V,CRB) AD38
VSS[32] VSS[111]
AP28
@ Analog Power Supply for DMI PLL AD39 AP30
VSS[33] VSS[112]
2 1 BJ22 1 2 AD4 AP32
L2601 1KOhm/100Mhz VCCAPLLEXP R0603 SL2605 VSS[34] VSS[113]
AD40 AP38
VSS[35] VSS[114]

1
C2605 V33 C2618 AD42 AP4
VCC3_3[6] VSS[36] VSS[115]

HVCMOS
@ AN16 AD43 AP42
10UF/6.3V VCCIO[15] 0.1UF/6.3V VSS[37] VSS[116]
AD45 AP46
2

2
VSS[38] VSS[117]
AN17 AD46 AP8
VCCIO[16] VSS[39] VSS[118]
V34 AD8 AR2
GND VCC3_3[7] GND +VTT_CPU_VCC_DMI +VTT_PCH_VCC VSS[40] VSS[119]
AE2 AR48
VSS[41] VSS[120]
AN21 AE3 AT11
VCCIO[17] +VCCAFDI_VRM VSS[42] VSS[121]
1 2 AF10 AT13
+VTT_PCH_VCCIO R0603 SL2607 VSS[43] VSS[122]
(VccIO: 3.709A@1.05V) AN26
VCCIO[18]
AF12
VSS[44] VSS[123]
AT18

1
+VTT_PCH_VCC_EXP C2619 C2625 AD14 AT22
1UF/6.3V VSS[45] VSS[124]
AN27 AT16 AD16 AT26
VCCIO[19] VCCVRM[3] 0.1UF/6.3V VSS[46] VSS[125]
AF16 AT28

2
VSS[47] VSS[126]
AP21 AF19 AT30
VCCIO[20] VSS[48] VSS[127]
1

C2609 C2606 C2608 C2607 C2610 (VccDMI: 42mA@1.05V) AF24 AT32


GND GND VSS[49] VSS[128]
AP23
VCCIO[21] VCCDMI[1]
AT20 VCC_DMI is 1.1V for Mobile AF26
VSS[50] VSS[129]
AT34
10UF/6.3V 1UF/6.3V 1UF/6.3V 0.1UF/6.3V 1UF/6.3V AF27 AT39
2

+VccCLKDMI_PCH +VTT_PCH_VCC VSS[51] VSS[130]

DMI
AP24 AF29 AT42
VCCIO[22] VSS[52] VSS[131]

VCCIO
AF31 AT46
VSS[53] VSS[132]
AP26
VCCIO[23] VCCCLKDMI
AB36 (VccCLKDMI: 75mA@1.05V) 1 2 AF38
VSS[54] VSS[133]
AT7
GND GND GND GND GND R0603 SL2610 AF4 AU24
VSS[55] VSS[134]

1
AT24 C2620 AF42 AU30
C VCCIO[24] 1UF/6.3V VSS[56] VSS[135] C
AF46 AV16
VSS[57] VSS[136]
AF5 AV20

2
VSS[58] VSS[137]
AN33 AF7 AV24
VCCIO[25] VSS[59] VSS[138]
AF8 AV30
+3VS_VCCA3GBG GND VSS[60] VSS[139]
AN34 AG16 AG19 AV38
+3VS_VCC3_3 VCCIO[26] VCCDFTERM[1] VSS[61] VSS[140]
AG2 AV4
VSS[62] VSS[141]
(Vcc3_3: 228mA@3.3V) AG31
VSS[63] VSS[142]
AV43
2 1 BH29 AG17 +V_NVRAM_VCCPNAND +1.8VS AG48 AV8
VCC3_3[3] VCCDFTERM[2] VSS[64] VSS[143]

DFT / SPI
R0402 SL2602 AH11 AW14
VSS[65] VSS[144]
1

C2611 (VccVRM: 167mA@1.5V) AH3 AW18


VSS[66] VSS[145]
VCCDFTERM[3]
AJ16 (VccpNAND: 190mA@1.8V) 1 2 AH36
VSS[67] VSS[146]
AW2
0.1UF/6.3V +VCCAFDI_VRM R0603 SL2608 AH39 AW22
2

C2623 VSS[68] VSS[147]

1
AP16 AH40 AW26
+VTT_PCH_VCC +VccAFDIPLL_PCH VCCVRM[2] 0.1UF/6.3V VSS[69] VSS[148]
AJ17 AH42 AW28
@ GND VCCDFTERM[4] VSS[70] VSS[149]
(VccAFDIPLL: 75mA@1.05V) AH46 AW32

2
VSS[71] VSS[150]
2 1 Analog Power Supply for FDI PLL BG6
VccAFDIPLL
AH7
VSS[72] VSS[151]
AW34
L2602 1KOhm/100Mhz +V3.3_VCCSPI +3VSUS_ORG AJ19 AW36
VSS[73] VSS[152]
1

C2628 GND AJ21 AW40


VSS[74] VSS[153]
AP17 AJ24 AW48
1000PF/50V VCCIO[27] VSS[75] VSS[154]
V1 (VccSPI: 10mA@1.8V) 1 2 AJ33 AV11
FDI
2

+VTT_PCH_VCCIO +VTT_PCH_VCCDPLL_FDI VCCSPI R0603 SL2609 VSS[76] VSS[155]


AJ34 AY12
+VTT_CPU_VCC_DMI VSS[77] VSS[156]
2 1 AU20 AK12 AY22
VCCDMI[2] VSS[78] VSS[157]

1
GND R0402 SL2603 C2622 AK3 AY28
1UF/6.3V VSS[79] VSS[158]
PRE-ES1 PRE-ES1

2
GND GND
GND

B B

L2630 /normal_S3
1 2

1KOhm/100Mhz
+5VSUS_PCH
VccRAM : 1.5V/1.8V supply for internal PLL and VRMs PCH ICC Description +5VSUS Q2630
EMB20N03V
+VTT 4.68A /Deep_S3 3

S
5 2

D
+1.5VS 0.167A 1

1
C2630
ER-028

G
+1.8VS 0.19A 2.2UF/10V

4
+VCCAFDI_VRM (+VTT_PCH: 4.68A@1.05V) /DEEP_S3

2
+1.5VS
+1.05VS +VTT_PCH_VCC
+3VS 0.355A +5VA +12VSUS
R2607 2 1 0Ohm +3VSUS 0.1A

2
GND
2

+1.8VS @ R2630
R2605 2 1 0Ohm (+VTT_PCH_VCC: 1.412A@1.05V) R2631 511KOhm
100KOhm /DEEP_S3
+VTT_PCH_VCCIO /DEEP_S3
ER-024
1
1

/DEEP_S3
6
(+VTT_PCH_VCCIO: 3.709A@1.05V) UM6K1N
2 Q2631A

1
/DEEP_S3 C2621
1
3

0.01UF/16V
/DEEP_S3 UM6K1N /DEEP_S3

2
2 1 5 Q2631B
30,81 3VSUS_ON
R2602 10KOhm
4

C2627
1

@
0.1UF/6.3V
2

GND GND GND


A A

Title : 3&+B,%(;  B32:(5*1'


ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 26 of 99
5 4 3 2 1
5 4 3 2 1

+VTT_PCH_VCC +VTT_PCH_VCCA_CLK +VCCIO_USB +VTT_PCH_VCCIO

@ (VccACLK: ???A@1.05V)
2 1 1 2
ER-033 L2701 1KOhm/100Mhz R0603

1
C2730
+3VSUS_ORG +VCCPDSW 1UF/6.3V U2001I
(VccDSW3_3: 1mA@3.3V)

2
1 2 AY4 VSS[159] VSS[259] H46
R2705 0Ohm AY42 K18
C2708 VSS[160] VSS[260]

1
+3VA_EC GND AY46 K26
VSS[161] VSS[261]
AY8 K39
@ 0.1UF/6.3V +3VSUS_ORG VSS[162] VSS[262]
1 2 B11 K46
POWER

2
R2706 0Ohm U2001J VSS[163] VSS[263]
(VccSUS3_3: 97mA@3.3V) B15
VSS[164] VSS[264]
K7
+3VA B19 L18
GND +3VSUS_VCCPUSB VSS[165] VSS[265]
AD49 N26 1 2 B23 L2
@ VCCACLK VCCIO[29] R0603 SL2701 VSS[166] VSS[266]
1 2 C2731 B27
VSS[167] VSS[267]
L20

1
R2707 0Ohm 04/20 No-stuff C2707 P26 B31 L26
@ VCCIO[30] 0.1UF/6.3V VSS[168] VSS[268]
for +1.05VS T16 B35 L28
0.1UF/6.3V VCCDSW3_3 VSS[169] VSS[269]
P28 B39 L36

2
leakage VCCIO[31] VSS[170] VSS[270]
B7 L48
+3VS_VCC3_3 VSS[171] VSS[271]
V12 T27 F45 M12
D L2707 GND DCPSUSBYP VCCIO[32] GND VSS[172] VSS[272] D
BB12 P16
+3VS_VCC_CLKF33 +3VSUS_VCCAUBG VSS[173] VSS[273]
1 2 VCCIO[33]
T29 2 1 BB16
VSS[174] VSS[274]
M18
1KOhm/100Mhz T38 R0402 SL2713 BB20 M22
VCC3_3[5] C2732 VSS[175] VSS[275]

1
C2744 C2745 BB22 M24
0.1UF/6.3V VSS[176] VSS[276]
(VccAPLLDMI2: ???mA@1.8V) VCCSUS3_3[7]
T23 BB24
VSS[177] VSS[277]
M30
+VTT_PCH_VCC 1UF/6.3V 10UF/6.3V BH23 BB28 M32

2
VCCAPLLDMI2 D2702 VSS[178] VSS[278]
T24 BB30 M34
@ VCCSUS3_3[8] VSS[179] VSS[279]
AL29 2 BB38 M38
+VCCAPLL_CPY_PCH GND GND VCCIO[14] GND +VTT_PCH_VCCIO VSS[180] VSS[280]
2 1 V23 3 BB4 M4
VCCSUS3_3[9] VSS[181] VSS[281]

USB
L2706 1 +3VSUS_ORG BB46 M42
VSS[182] VSS[282]
1

1KOhm/100Mhz C2711 AL24 V24 BC14 M46


@ +VTT_PCH_VCCIO DCPSUS[3] VCCSUS3_3[10] BAT54CW VSS[183] VSS[283]
1 2 BC18
VSS[184] VSS[284]
M8

1
10UF/6.3V C2712 P24 R0603 SL2714 BC2 N18
2

VCCSUS3_3[6] +5VSUS_PCH VSS[185] VSS[285]


2 1 +VCCDPLL_CPY BC22
VSS[186] VSS[286]
P30
R0402 SL2708 1UF/6.3V AA19 BC26 N47

2
GND VCCASW[1] +VTT_VCCAUPLL VSS[187] VSS[287]
T26 BC32 P11
VCCIO[34] VSS[188] VSS[288]
AA21 BC34 P18
GND VCCASW[2] R2701 VSS[189] VSS[289]
BC36 T33
D2703 VSS[190] VSS[290]
AA24
VCCASW[3] V5REF_SUS
M26 (V5REF_SUS: 1mA@5V) 1 2 BC40
VSS[191] VSS[291]
P40
2 BC42 P43
VSS[192] VSS[292]

1
+VTT_PCH_VCC AA26 C2733 10Ohm 3 BC48 P47

Clock and Miscellaneous


VCCASW[4] VSS[193] VSS[293]
(VccASW: 1.01A@1.05V) DCPSUS[4]
AN23 1 +3VS_VCC3_3 BD46
VSS[194] VSS[294]
P7
1 2+V1.05M_VCCASW AA27 0.1UF/6.3V BD5 R2

2
VCCASW[5] VSS[195] VSS[295]

1
R0603 SL2709 AN24 +VTT_VCCPSUS C2735 BAT54CW BE22 R48
VCCSUS3_3[1] VSS[196] VSS[296]
1

1
C2713 C2714 AA29 1UF/6.3V BE26 T12
VCCASW[6] GND +5VS VSS[197] VSS[297]
BE40 T31

2
22UF/6.3V 22UF/6.3V VSS[198] VSS[298]
AA31 BF10 T37
2

2
VCCASW[7] R2702 VSS[199] VSS[299]
BF12 T4
GND VSS[200] VSS[300]
AC26 P34 (V5REF: 1mA@5V) 1 2 BF16 W34
GND GND VCCASW[8] V5REF VSS[201] VSS[301]
BF20 T46
VSS[202] VSS[302]

1
AC27 (VccSUS3_3: 65mA@3.3V) +3VSUS_ORG C2734 10Ohm BF22 T47
VCCASW[9] VSS[203] VSS[303]
N20 BF24 T8
VCCSUS3_3[2] VSS[204] VSS[304]
1

PCI/GPIO/LPC
C2717 C2715 C2716 AC29 +VTT_VCCPSUS 1 2 1UF/6.3V BF26 V11

2
VCCASW[10] R0603 SL2715 VSS[205] VSS[305]
N22 BF28 V17
VCCSUS3_3[3] VSS[206] VSS[306]

1
1UF/6.3V 1UF/6.3V 1UF/6.3V AC31 C2736 +3VS_VCC3_3 BD3 V26
2

VCCASW[11] 1UF/6.3V GND VSS[207] VSS[307]


P20 BF30 V27
VCCSUS3_3[4] VSS[208] VSS[308]
AD29 1 2 BF38 V29

2
GND GND GND VCCASW[12] R0603 SL2716 VSS[209] VSS[309]
P22 C2737 BF40 V31
VCCSUS3_3[5] VSS[210] VSS[310]

1
AD31 BF8 V36
VCCASW[13] GND 0.1UF/6.3V VSS[211] VSS[311]
BG17 V39
VSS[212] VSS[312]
W21 AA16 BG21 V43

2
VCCASW[14] VCC3_3[1] VSS[213] VSS[313]
BG33 V7
VSS[214] VSS[314]
C2718 W23 W16 BG44 W17
VCCASW[15] VCC3_3[8] VSS[215] VSS[315]
1

GND BG8 W19


+3VS_VCCPPCI VSS[216] VSS[316]
W24
VCCASW[16] VCC3_3[4]
T34 VCC3_3: 228mA@3.3V 1 2 BH11
VSS[217] VSS[317]
W2
0.1UF/6.3V R0603 SL2717 BH15 W27
2

VSS[218] VSS[318]
W26 C2738 BH17 W48
VCCASW[17] VSS[219] VSS[319]

1
BH19 Y12
GND +3VS_VCC3_3 0.1UF/6.3V +VTT_SATA3 +VTT_PCH_VCCIO VSS[220] VSS[320]
W29 H10 Y38
VCCASW[18] VSS[221] VSS[321]
BH27 Y4

2
C VSS[222] VSS[322] C
W31 AJ2 1 2 BH31 Y42
VCCASW[19] VCC3_3[2] R0603 SL2718 VSS[223] VSS[323]
C2739 BH33 Y46
VSS[224] VSS[324]

1
W33 GND C2740 BH35 Y8
+VTT_PCH_VCCA_A_DPL VCCASW[20] VSS[225] VSS[325]
AF13 BH39 BG29
VCCIO[5] 0.1UF/6.3V 1UF/6.3V VSS[226] VSS[328]
BH43 N24

2
+VTT_PCH_VCCA_B_DPL +VCCAFDI_VRM VSS[227] VSS[329]
N16 BH7 AJ3
DCPRTC VSS[228] VSS[330]
AH13 D3 AD47
VCCIO[12] GND GND +VTT_PCH_VCC VSS[229] VSS[331]
D12 B43
@ VSS[230] VSS[333]
Y49 AH14 D16 BE10
VCCVRM[4] VCCIO[13] +VTT_VCCAPLL_SATA3 VSS[231] VSS[334]
(VccADPLLA: 75mA@1.05V) 1 2 D18
VSS[232] VSS[335]
BG41
+VTT_PCH_VCCIO (VccADPLLB: 75mA@1.05V) L2702 1KOhm/100Mhz D22 G14
VSS[233] VSS[337]

1
AF14 C2741 D24 H16
VCCIO[6] @ VSS[234] VSS[338]
BD47 D26 T36
VCCADPLLA VSS[235] VSS[340]
SATA

1 2 +VCCDIFFCLK AK1 (VccAPLLSATA: ???mA@1.05V) 10UF/6.3V D30 BG22

2
SL2710 VCCAPLLSATA VSS[236] VSS[342]
BF47 D32 BG24
R0603 +VCCDIFFCLKN VCCADPLLB VSS[237] VSS[343]
D34 C22
VSS[238] VSS[344]
1

C2719 AF11 +VCCAFDI_VRM GND D38 AP13


R0402 1 +VCCDIFFCLKN 1UF/6.3V VCCVRM[1] VSS[239] VSS[345]
2 AF17 D42 M14
SL2711 VCCIO[7] +VTT_SATA +VTT_PCH_VCCIO VSS[240] VSS[346]
AF33 D8 AP3
2

VCCDIFFCLKN[1] VSS[241] VSS[347]


1

R0402 1 2 +VTT_SSCVCC C2720 AF34 AC16 E18 AP1


SL2712 1UF/6.3V VCCDIFFCLKN[2] VCCIO[2] VSS[242] VSS[348]
AG34 E26 BE16
GND VCCDIFFCLKN[3] VSS[243] VSS[349]
(VccDIFFCLKN: 55mA@1.05V) AC17 1 2 G18 BC16
2

VCCIO[3] VSS[244] VSS[350]


1

C2721 R0603 SL2719 G20 BG28


VSS[245] VSS[351]

1
AG33 AD17 C2742 G26 BJ28
1UF/6.3V VCCSSC VCCIO[4] 1UF/6.3V VSS[246] VSS[352]
(VccSSC: 95mA@1.05V) G28
2

GND VSS[247]
G36

2
VSS[248]
V16 G48
GND DCPSST VSS[249]
H12
VSS[250]
1

C2722 GND H18


VSS[251]
T17 T21 2 1 H22
0.1UF/6.3V DCPSUS[1] VCCASW[22] R0402 SL2720 +VTT_PCH_VCC VSS[252]
V19 H24
2

+VTT_PCH_VCC +VTT_CPU_VCCPCPU DCPSUS[2] VSS[253]


MISC

H26
VSS[254]
V21 2 1 H30
GND VCCASW[23] R0402 SL2721 VSS[255]
(V_PROC_IO: 1mA@1.05V) (VCCASW: 903mA@1.05V) H32
VSS[256]
CPU

1 2 BJ8
V_PROC_IO
H34
VSS[257]
R0402 SL2702 T19 2 1 F3
VCCASW[21] VSS[258]
1

C2724 C2725 C2726 R0402 SL2722

4.7UF/6.3V 0.1UF/6.3V 0.1UF/6.3V


2

A22 P32 PRE-ES1


RTC

VCCRTC VCCSUSHDA
HDA

GND GND GND


+VCC_RTC PRE-ES1

(VccRTC: N/A@3.3V) GND GND


1

C2727 C2728 C2729


+3VSUS_HDA +3VSUS_ORG
1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V (VccSUSHDA: 10mA@3.3V)
2

1 2
B SL2703 B
GND GND GND R0402
PCH TDP is 3.9W C2743
1

0.1UF/6.3V
nbs_c0201_h13_000s
2

VCCACLK, VCCAPLLEXP, VCCAPLLDMI2, VCCAFDIPLL,


GND
VCCAPLLSATA can be left no connect in On-Die VR
enable mode

+VTT_PCH_VCCA_A_DPL +VTT_PCH_VCC

L2703
+3VSUS +3VSUS_ORG +VTT_PCH_VCCA_A_DPL 1 2
+3VS 357mA +3VS_VCC3_3 10UH

1
S0 max C2703

1
1UF/6.3V
C2706 C2705
1

C2702

2
@/EMI @/EMI 22UF/6.3V

2
0.1UF/6.3V 0.1UF/6.3V
2

GND
+VTT_PCH_VCCA_B_DPL
GND GND
L2704
+VTT_PCH_VCCA_B_DPL 1 2

10UH

1
C2704
A 1UF/6.3V GND A

2
GND

Title : 3&+B,%(;  B32:(5*1'


ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 27 of 99
5 4 3 2 1
5 4 3 2 1

05/12 delete +3VA

PCH SPI ROM +3VSUS_ORG +3VM_SPI

D D

Remove SPI FLASH TOOL CON

+3VM_SPI
2

1
R2833 R2831 C2802
100KOhm 100KOhm 0.1UF/6.3V
nbs_c0201_h13_000s

2
1

1
20 SPI_CS#0 1 2 U2801
R2837 33Ohm 1 8
CS# VCC +3VM_SPI_00 R2840 33Ohm
20 SPI_SO 1 2 2 7
R2838 33Ohm BIOS_WP# DO(IO1) HOLD#(IO3) SPICLK0
30 BIOS_WP# 3 6 1 2 SPI_CLK 20
WP#(IO2) CLK SPISI0
4 5 1 2 SPI_SI 20
GND DI(IO0)
W25Q64FVSSIG R2841 33Ohm
2

2
C R2802 R2803 (64Mb) C
0Ohm 0Ohm R2804 R2805
0Ohm
Main: 05006-00010300 0Ohm
1

second: 05G00170B020

1
UX31EP 023 01/18

ER-016

30 EC_SCE#_PCH
EC_SCK_PCH 30

30 EC_SO_PCH
EC_SI_PCH 30

ER-025
+12VS
+3VM_SPI +3VS
SPISI0 SPICLK0 +3VM_SPI_00
1

C2806 C2805 C2804 C2803


B B

2
8PF/25V 8PF/25V 8PF/25V 8PF/25V
2

4.7KOhm 4.7KOhm
EC

2
R2809 R2808

1
30 SMB1_CLK 6 1 SMB1_CLK_S 14,50

Q2804A
UM6K31N CPU,Thermal

5
30 SMB1_DAT 3 4 SMB1_DAT_S 14,50

Q2804B
UM6K31N

A A

Title : 3&+B63,52027+
ASUSTeK COMPUTER INC. Engineer: Susi_Hong
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 28 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : &/.B,&6/56
ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 29 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

+3VS +3VA +3VA_EC +3VA_EC +3VACC


JP3001
PU/PD
SL3006
1 2 1 2 +3VA_EC
1 2

1
C3002 1MM_OPEN_5MIL C3004 C3005 R0603 C3007
0.1UF/6.3V C3003 C3006 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V
10UF/6.3V 10UF/6.3V SL3007

2
1 2
LID_SW#_EC RN3003C 5
D 10KOHM 6 D
R0603 PWRLIMIT#_EC RN3003B 3 10KOHM 4
EC_AGND PWR_SW# RN3003A 1 10KOHM 2
AC_IN_OC#_L RN3003D 7 10KOHM 8
PR-005
SMB1_CLK RN3001A 1 4.7KOhm 2
SMB0_CLK RN3001B 3 4.7KOhm 4
SMB1_DAT RN3001C 5 4.7KOhm 6
SMB0_DAT RN3001D 7 4.7KOhm 8 +3VS

TP_CLK RN3002A 1 4.7KOhm 2


TP_DAT RN3002B 3 4.7KOhm 4
SUSB_EC# RN3002C 5 4.7KOhm 6 +3VA_EC
SUSC_EC# RN3002D 7
+3VS +3VACC 4.7KOhm 8
+3VA_EC

BAT1_IN_OC# RN3006A 2 100KOhm1


+3VA_ON RN3006B 3 100KOhm4
PM_SUSC# RN3006C 5 100KOhm6

J12
G5
G8

D1
E6
E7
E8

E5
PM_SUSB# RN3006D 7 100KOhm8 ER-010
U3001
7 8 RNX3004D E1 H3

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5

VCC

AVCC
VSTBY6(PLL)
20,31,44 LPC_AD0 47OHM LAD0/GPM0 PWM0/GPA0 PWR_LED# 56
20,31,44 LPC_AD1 5 6 RNX3004C D2 J2 CHG_LED# 1 T3022 UX31EP 010 12/21
47OHM LAD1/GPM1 PWM1/GPA1
20,31,44 LPC_AD2 3 4 RNX3004B D4 J1 CHG_FULL_LED# 56
47OHM LAD2/GPM2 PWM2/GPA2
20,31,44 LPC_AD3 1 2 RNX3004A C3 K1 3VSUS_ON R3030 1 @ 2 100KOhm
47OHM LAD3/GPM3 PWM3/GPA3
24 CLK_KBCPCI_PCH F2 M1
LPCCLK/GPM4 PWM4/GPA4
20,31,44 LPC_FRAME# D3 L1 FAN_PWM 50
LFRAME#/GPM5 PWM5/GPA5
3,7,24,31,45,53,63 BUF_PLT_RST# G3 M2
LPCRST#/WUI4/GPD2 PWM6/SSCK/GPA6
20,31 INT_SERIRQ A2 K2 KB_LED_PWM 31
SERIRQ/GPM6 PWM7/GPA7

LPC
25 EXT_SMI# E3
ECSMI#/GPD4 +3VS
21,24 EXT_SCI# J3 B8 ME_AC_PRESENT 22
ECSCI#/GPD3 RXD/SIN0/GPB0
25 A20GATE B2 A8
GA20/GPB5 TXD/SOUT0/GPB1 A20GATE RN3005D
25 RCIN# C2 A4 +3VA_ON 70 7 10KOHM 8
KBRST#/GPB6 CTX0/TMA0/GPB2 RCIN# RN3005B
32 EC_RST# E2
WRST# RING#/PWRFAIL#/CK32KOUT /LPCRST#/GPB7 A7 PM_RSMRST# 22 UX31EP 016 12/29 3 10KOHM 4
RN3005C 5
ER-012 10KOHM 6
B7 B4 PM_RSMRST# RN3005A 1
22 ME_SusPwrDnAck SSCE1#/GPG0 GPC0 10KOHM 2

FLASH ROM
C 28 EC_SCK_PCH R3049 1 2 15Ohm SCK_EC C8 0Ohm 1 R3083 2 AC_IN_OC#_EC 70 C
FSCK AC_IN_OC#_L 0Ohm 1 R3084
B9 A5 2 AC_IN_OC# 56,88
DSR0#/GPG6 TMRI0/WUI2/GPC4 @
28 EC_SO_PCH C9
R3015 SI_EC FMISO
28 EC_SI_PCH 1 2 15Ohm A9 B3 BAT1_IN_OC# 60
R3050 SCE#_EC FMOSI TMRI1/WUI3/GPC6 +3VS
28 EC_SCE#_PCH 1 2 15Ohm C10 F1
FSCE# PWUREQ#/BBO/GPC7
B10
SSCE0#/GPG2
G1 PWRLIMIT#_EC 88 R3002
RI1#/WUI0/GPD0
31 KSI0 M8 H2 CAP_LED# 56
KSI0/STB# RI2#/WUI1/GPD1 GPI0
31 KSI1 L9 L2 OP_SD# 63 1 2
KSI1/AFD# GINT/CTS0#/GPD5 /@_Light_Sensor
31 KSI2 M9 L6 FAN0_TACH 50
KSI2/INIT# TACH0A/GPD6
L8 J9
31
31
KSI3
KSI4 K9
KSI3/SLIN#
KSI4
TACH1A/TMA1/GPD7
ER-009
1MOhm ER-011
31 KSI5 M10 H1 USB_CHARGE_VBUS_EC 69
KSI5 L80HLAT/BAO/WUI24/GPE0
31 KSI6 L10 F10
KSI6 EGAD/WUI25/GPE1
31 KSI7 K10
KSI7 EGCS#/WUI26/GPE2
F12 1.5V_ON 83 UX31EP 011 12/21
E12 BIOS_WP# BIOS_WP# 28
EGCLK/WUI27/GPE3
31 KSO0 L3 A3 PWR_SW# 32,70
KSO0/PD0 PWRSW/GPE4
GPIO
KBMX

31 KSO1 K3 M3 PM_SUSC# 22
KSO1/PD1 WUI5/GPE5
31 KSO2 J4 G2 LID_SW#_EC 70
KSO2/PD2 LPCPD#/WUI6/GPE6
31 KSO3 L4 F3
KSO3/PD3 L80LLAT/WUI7/GPE7
31 KSO4 H5
KSO4/PD4
31 KSO5 M4
KSO5/PD5
31 KSO6 K4 C7 PM_SUSB# 22
KSO6/PD6 SBUSY/GPG1/ID7
31 KSO7 M5
KSO7/PD7
31 KSO8 L5
KSO8/ACK#
31 KSO9 K5
KSO9/BUSY
31 KSO10 M6
KSO10/PE
H6
31
31
KSO11
KSO12 M7
KSO11/ERR#
KSO12/SLCT CLKRUN#/WUI16/GPH0/ID0
C12 PM_CLKRUN# 22,31
DEEP_S3 +5VSUS
31 KSO13 K6 A12 THRO_CPU# 3
KSO13 CRX1/SMCLK3/WUI17/GPH1/ID1
31 KSO14 L7 B11 LCD_BACKOFF# 45
KSO14 CTX1/SMDAT3/WUI18/GPH2/ID2 5VSUS_PWRGD R3060
31 KSO15 H7 B12 SUSC_EC# 57,91 2 1 100KOhm
KSO15 WUI19/GPH3/ID3 /DEEP_S3
K8 A11
22 PM_PWRBTN#
K7
KSO16/SMOSI/GPC3
KSO17/SMISO/GPC5
GPH4/ID4
GPH5/ID5
C11
SUSB_EC# 57,82,83,84,87,91
ER-009
A10 5VSUS_PWRGD 58
EC_XIN GPH6/ID6 R3031
B1 2 1 200KOhm
CK32K GPI0 0Ohm 1 R3082 /DEEP_S3
C1 M12 2 Light_Sensor_AD 45
CK32KE ADC0/GPI0
L12 SUS_PWRGD 22,58,81
B ADC1/GPI1 B
PS/2

22 PM_SYSPWROK E10 K12 ALL_SYSTEM_PWRGD 3,22,58,80 5VSUS_ON R3056 1 2 1MOhm


TMB0/GPF0 ADC2/GPI2 /DEEP_S3
26,81 3VSUS_ON E11 M11 CORE_PWRGD 58
TMB1/GPF1 ADC3/GPI3
D9 L11

1
PS2CLK1/DTR0#/GPF2 ADC4/WUI28/GPI4 C3013
69 USB_CHARGE_ON# D10 K11
PS2DAT1/RTS0#/GPF3 ADC5/WUI29/GPI5 0.01UF/16V
31 TP_CLK D11 J11
PS2CLK2/WUI20/GPF4 ADC6/WUI30/GPI6
31 TP_DAT D12 H11 Adaptor_Sense 88

2
PS2DAT2/WUI21/GPF5 ADC7/WUI31/GPI7
60,83,88 SMB0_CLK B6 H10
SMCLK0/GPB3 TACH2/GPJ0
SMBus

Battery/Charge IC 60,83,88 SMB0_DAT C6


SMDAT0/GPB4 GPJ1
J10 PM_PWROK 22
28 SMB1_CLK B5 G10
SMCLK1/GPC1 DAC2/TACH0B/GPJ2 @
Thermal sensor
VCORE

28 SMB1_DAT A6 G11
SMDAT1/GPC2 DAC3/TACH1B/GPJ3
AVSS
VSS1

VSS2
VSS3
VSS4
VSS5
VSS6
VSS7

3 PECI_EC 0Ohm 1 2 R3074 PECI_EC_R C5 G12 5VSUS_ON 81 CLK_KBCPCI_PCH C3019 1 2 10PF/50V


PECI/WUI22/GPF6 DAC4/DCD0#/GPJ4
20 PCH_SPI_OV C4 F11 DRAMRST_EC 4
PECIRQT#/WUI23/GPF7 DAC5/RIG0#/GPJ5 @
IT8572G BAT1_IN_OC# C3015 1 2 0.01UF/16V
A1
F8
F5
F6
F7
G6
G7
H8
H12

@
PWR_SW# C3014 1 2 0.01UF/16V
C3008
1

@
0.1UF/6.3V BUF_PLT_RST# C3016 1 2 0.01UF/16V
2

EC_AGND

PR-005
GPI0

1
C3020
@
0.1UF/25V

2
A A

Title : .%&B,7(B%*$
ASUSTeK COMPUTER INC. NB3 Engineer: Susi_Hong
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 30 of 99
5 4 3 2 1
5 4 3 2 1

Main Board
ClickPad Schematic
Keyboard BOM_Note
Normal TP option -> /PS2TP
ER-003 +5VSUS
ELAN SMBUS TP option
C3107 Synaptics SMBUS TP option
Keyboard

D
BL_CON 1 2

0.1UF/6.3V
click pad option is for win8 requirement Function
D
FPC_CON_30P nbs_c0201_h13_000s PR-005
1 @ UX31EP 021 1/18
1
2 RF_LED# 56
+5VS_KBLED +5VS 2
3 POWER_LED# 56

J3103 SL3102
3
4
5
6
4
5
6
CAP_LED_CON# 56
PWR_SW_KB# 70 T/P
6 1 1 2 7 KSO14 +3VS +3VS_TP
SIDE2 1 0603 7 KSO14 30
2 8 KSO9
2 8 KSO9 30
3 9 KSO3 SL3101
3 9 KSO3 30
5 4 31 10 KSO1 1 2
SIDE1 4 SIDE1 10 KSO1 30 0603
11 KSO13
11 KSO13 30
FPC_CON_4P 12 KSI5
12 KSI5 30 C3111

1
13 KSI1 C3110
Q3101 Q3102 13 KSI1 30 0.1UF/6.3V
14 KSI7 1UF/16V
2N7002 2N7002 14 KSI7 30
3
D D
3 15 KSI6 @ nbs_c0201_h13_000s
KSI6 30

2
15 KSI4
16 KSI4 30
16 KSI2
17 KSI2 30
KB_LED_PWM 1 1 17 KSI0
KB_LED_PWM 30 18 KSI0 30
G G 18 KSI3
19 KSI3 30
2 S S 2 19
20 KSO12
20 KSO12 30
32 21 KSO10 GND
SIDE2 21 KSO10 30
22 KSO11
22 KSO11 30
23 KSO6
23 KSO6 30
24 KSO8
24 KSO8 30 +3VS_TP
25 KSO4
25 KSO4 30
26 KSO2
26 KSO2 30
27 KSO5 J3105
27 KSO5 30
28 KSO7 8
PR-009 28
29
29 KSO0
KSO15
KSO7
KSO0
30
30
TP_CLK
7
8
7 SIDE2
10
30 KSO15 30 30 TP_CLK 6
30 TP_DAT 6
30 TP_DAT 5
+5VS_KBLED J3101 5
4
R3105 4
21 SCL_DAT_TP 2 1 0Ohm 3
R3106 3
21 SCL_CLK_TP 2 1 0Ohm 2 9
2 SIDE1
1
1
1

C C3114 C
10PF/50V FPC_CON_8P
2

+5VS +3VS

1
1
G
R3104
2N7002ET1G Q3103 10KOhm

S 2
D
@

2
21 TP_INT 1 2
R3103 @ 0Ohm

TPM
ER-036
TP_DAT TP_CLK

1
C3112 C3113
@ @
33PF/50V 33PF/50V

2
+3V +3VS +3VS

GND GND

B B
U3101
1 28 PM_SUS_STAT# 22
T3101 TPM_GPIO2 NC1 LPCPD#
1 2 27 INT_SERIRQ 20,30
GPIO2 SERIRQ
3 26 LPC_AD0 20,30,44
NC2 LAD0
4 25
GND1 GND4
5 24
@ 0Ohm T3102 TPM_GPIO1 VSB VDD3
1 6 23 LPC_AD1 20,30,44
C3104 GPIO LAD1
1

1 2 R3101 7 22 LPC_FRAME# 20,30,44


0.1UF/6.3V 0Ohm PP LFRAME#
8 21 CLK_TPM 24
TESTI LCLK
1 2 R3102 9 20 LPC_AD2 20,30,44
2

TESTBI/BADD LAD2
10 19
NC3 VDD2
C3105 11 18
/TPM GND2 GND3
/TPM 12 17 LPC_AD3 20,30,44
NC4 LAD3
2 1 13 16 BUF_PLT_RST# 3,7,24,30,45,53,63
XTALI/32k_IN LRESET#
14 15
/TPM XTALO CLKRUN# PM_CLKRUN# 22,30 PR-010
1

22PF/25V X3101 SLB9635TT1.2-FW3.16


C3106 32.768khz
1

C3101 C3102 C3103


2

2 1 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V


2

/TPM +3VS_TP
22PF/25V
/TPM /TPM /TPM /TPM
J3102 @
6 8
TP_DAT 6 SIDE2
5
TP_CLK 5
4
4
3
3
2
2
1 7
1 SIDE1
FPC_CON_6P

A A

GND GND

Title : (&B.%B73B730
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 31 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D
Thermal Policy D

R3210
50 CPU_THERM# 1 2
0Ohm

1 T3202
S 2
G
24 PLT_RST# 1 IT8752 has built-in level detection for
2N7002 power-on reset circuit
Q3204 D 100KOhm
3 +3VA_EC 1%
R3212
1 2
D3204
1 2
C 1 T3203 C
1SS355PT
EC_RST# 30

1
C3202 C3204
0.1UF/6.3V
1UF/6.3V nbs_c0201_h13_000s

2
Output Signal

battery embedded (press pwr_sw 10sec, then reset ec )

+3VA_EC
B B
1

R3203
R3201 EC_RST#_R 1 2 EC_RST#
1MOhm
1KOhm
2

R3202 UM6K1N
1 2 5 Q3202B
4

1KOhm
1

C3203
6

10UF/6.3V
2

UM6K1N
2 Q3202A
30,70 PWR_SW#
1

A A

Title : 567B5HVHW&LUFXLW
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 32 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : /$1
ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 33 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : /$1
ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 34 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title :
ASUSTeK COMPUTER INC. NB1 Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 35 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : $8'
ASUSTeK COMPUTER INC Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 36 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : AUD-****
ASUSTeK COMPUTER INC Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 37 of 99
5 4 3 2 1
5 4 3 2 1

D D

L3801
80Ohm/100Mhz J3801
1 2 H_SPKR+_CON 2 4
63 H_SPKR+ 2 SIDE2
1 2 H_SPKR-_CON 1 3
63 H_SPKR- 1 SIDE1
80Ohm/100Mhz WTOB_CON_2P

1
L3802
C3801 C3802
100PF/50V 100PF/50V

2
@ @
GND
GND GND

C C

+5VS
H_SPKR+_CON

VI/O

VBUS

VI/O
4

6
D3802
IP4223-CZ6

VI/O
3

1
VI/O

GND
H_SPKR-_CON GND

B B

A A

<Variant Name>

Title : $8'63.5&211
ASUSTeK COMPUTER INC Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 38 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : $8'
ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 39 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

Title : &%
A A

ASUSTeK COMPUTER INC. NB6 Engineer: shihhsien_yang


Size Project Name Rev
A 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 40 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : &%
ASUSTeK COMPUTER INC. NB6 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 41 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : &%
ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 42 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : &%
ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 43 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

LPC Debug Port

C C

PR-013
+3V

C4402
1

0.1UF/6.3V
nbs_c0201_h13_000s
2

PR-002

JDEBUG1
12
LPC_AD0 12
20,30,31 LPC_AD0 11 14
11 SIDE2
10
LPC_AD1 10
20,30,31 LPC_AD1 9
9
8
LPC_AD2 8
20,30,31 LPC_AD2 7
7
6
LPC_AD3 6
20,30,31 LPC_AD3 5
B 5 B
4
LPC_FRAME# 4
20,30,31 LPC_FRAME# 3
3
2 13
CLK_DEBUG 2 SIDE1
24 CLK_DEBUG 1
1
JDEBUG1

A A

Title : %8*B'HEXJ
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 44 of 99
5 4 3 2 1
5 4 3 2 1

Main Board
+3VS
C4510 2 1 0.1UF/6.3V
USB_PN4_con
USB_PP4_con
LVDS CONN
MIC_INT_DATA
MIC_INT_CLK

42
R4507 2 /DALS 1 0Ohm WtoB_CON_40P
30 SMB1_CLK
R4506 2 /AALS 1 0Ohm 40

SIDE2
40
39
+3VS +3VS_TPanel R4505 39
2 /DALS 1 0Ohm 38
ER-022 30 SMB1_DAT
30 Light_Sensor_AD R4504 2 /AALS 1 0Ohm 37
38
37
36
L4514 36
35
35
1 2 34
EDP_TXN3_C C4567 34
1 2 0.1UF/16V EDP_TXN3_CON 33

1
D
120Ohm/100Mhz C4554 EDP_TXP3_C C4557 EDP_TXP3_CON 33 D
1 2 0.1UF/16V 32
1UF/6.3V 32
31
EDP_TXN2_C C4566 31
1 2 0.1UF/16V EDP_TXN2_CON 30

2
EDP_TXP2_C C4556 EDP_TXP2_CON 30
1 2 0.1UF/16V 29
29
28
GND EDP_TXN1_C C4561 EDP_TXN1_CON 28
1 2 0.1UF/16V 27
EDP_TXP1_C C4552 EDP_TXP1_CON 27
1 2 0.1UF/16V 26
26
25
EDP_TXN0_C C4560 0.1UF/16V EDP_TXN0_CON 25
1 2 24
EDP_TXP0_C C4551 0.1UF/16V EDP_TXP0_CON 24
1 2 23
C4559 0.1UF/16V EDP_AUXP_CON 23
3 EDP_AUXP 1 2 22
C4558 0.1UF/16V EDP_AUXN_CON 22
3 EDP_AUXN 1 2 21 45
21 SIDE5
20
L4518 1 20
2 80Ohm/100Mhz Irat=3A 19
63 MIC_INT_CLK
ER-036 +3VS_LCD
C4509 2 1 0.1UF/6.3V 18
19
18
63 MIC_INT_DATA 17
eDP_HPD_con 17
16
16
15 44

1
C4512 @1 0.1UF/6.3V BL_EN 15 SIDE4
GND 2 14
C4502 C4503 C4513 @1 0.1UF/6.3V LED_BKLTCTL 14
GND 2 13
13
100PF/50V 100PF/50V 12
2

2
L4510 AC_BAT_SYS_INV_CON 12
AC_BAT_SYS 1 2 11
120Ohm/100Mhz 11
10
C4522 2 10
GND 1 1UF/25V 9 43
9 SIDE3
8
8
7
7
6
PR-007 +3VS_TPanel
5
6
5
3,7,24,30,31,53,63 BUF_PLT_RST# 4
4
3
3

SIDE1
2
2
1
For 3D panel of VX7 R4503 1
3,7,24,30,31,53,63 ALS_INT# 2 /DALS 1 0Ohm
J4511

41
USB_PP8_con R4501 2 /TP_USB 1 0Ohm
USB_PN8_con R4502 2 /TP_USB 1 0Ohm
+3VS_LCD R4566 220Ohm +3VSUS
C 1 2 C
ER-022 ER-031
U4503
1
OUT IN
5 ER-022
2 AC_BAT_SYS_INV_CON BUF_PLT_RST# +3VS_TPanel
GND

23 LCD_VDD_EN 3 4

1
EN DSG C4570 C4571 C4572 C4573 C4574
G5244T11U @ @ @
2

1
C4550 C4501 8PF/50V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V

2
1

R4581 C4504 1UF/6.3V


4.7UF/6.3V 8PF/25V
2

2
100KOhm 8PF/25V C4507
PR-014
2

GND GND GND


1

RN4502A
GND GND GND GND GND GND
PR-014 1 0Ohm 2 ER-036
ER-022 PR-014 3 EDP_TXN0
EDP_TXN0_C

1
90Ohm/100Mhz
L4512

4
@
3 eDP_HPD#
RN4502B
3 4 EDP_TXP0_C
3 3 EDP_TXP0 0Ohm
D
Q4501
2N7002 1 eDP_HPD_con
G
S 2
1

RN4503A
1

B B
C4568 C4569 R4521 1 2
0Ohm
@ @ 100KOhm
5PF/50V 5PF/50V
ER-022 ER-022
2

EDP_TXN1_C
3 EDP_TXN1
2

1
90Ohm/100Mhz 4 3 RN4506B
GND GND L4513 ER-031 0Ohm

4
@
USB_PN8_con
24 USB_PN8

1
RN4503B
3 4 EDP_TXP1_C 90Ohm/100Mhz
3 EDP_TXP1 0Ohm L4517
USB_PP8_con
24 USB_PP8

4
LED_BKLTCTL LED_BKLTCTL 23 RN4504A @
1 0Ohm 2
1

2 1 RN4506A
0Ohm
R4550
10KOhm EDP_TXN2_C
3 EDP_TXN2
2

1
2

90Ohm/100Mhz 4 3 RN4501B
L4516 0Ohm
3

@
USB_PN4_con
24 USB_PN4

1
RN4504B
+3VS_LCD 3 4 EDP_TXP2_C 90Ohm/100Mhz
3 EDP_TXP2 0Ohm L4511
U4501
1 5 USB_PP4_con

4
23 LCD_BACKEN INB VCC 24 USB_PP4
30 LCD_BACKOFF# 2
INA BL_EN
3 4
GND OUTY @
74LVC1G08GW
A RN4505A 2 1 RN4501A A
0Ohm
GND 1 2
0Ohm

EDP_TXN3_C
3 EDP_TXN3
2

90Ohm/100Mhz
L4515
3

RN4505B
Title : /&'3DQHOB&026B'0,&
3 EDP_TXP3 3 0Ohm 4 EDP_TXP3_C ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Friday, May 18, 2012 Sheet 45 of 99
5 4 3 2 1
5 4 3 2 1

ER-030 Main Board


L4601
23 CRT_RED CRT_RED 2 1 CRT_R_55 1 2 CRT_R_CON

1
JP4601 0.1UH

1
SHORT_PIN R4601
150Ohm C4601 C4602
5PF/50V 10PF/50V

2
2
D D
L4602
23 CRT_GREEN CRT_GREEN 2 1 CRT_G_55 1 2 CRT_G_CON

1
JP4602 0.1UH

1
SHORT_PIN R4602
150Ohm C4603 C4604
5PF/50V 10PF/50V

2
2
L4603
23 CRT_BLUE CRT_BLUE 2 1 CRT_B_55 1 2 CRT_B_CON

1
JP4603 0.1UH

1
SHORT_PIN R4603
150Ohm C4605 C4606
5PF/50V 10PF/50V

2
2

U4601
CRT_G_CON 1
CRT_B_CON Line-1 CRT_G_CON
2 9
Line-2 NC4 CRT_B_CON
3 8
CRT_R_CON 4
GND
Line-3
NC3
NC2
7 CRT_R_CON ER-004
HSYNC_CON 5 6 HSYNC_CON
Line-4 NC1
UX31EP 004 12/21
AZ1045-04F

+3VS +5VS_CRT
GND J4601
12 1
CRT_DDC_CLK RN4620A D4601 DDC_CLK_CON GND4 +5V CRT_R_CON
C 1 2.2KOHM 2 11 2 C
RN4603A DDC_DATA VSYNC_CON DDC_CLK CRT_RED
+5VS 2 1 1 2.2KOHM2 10 3
CRT_DDC_DATA RN4620B RN4603B DDC_CLK HSYNC_CON CRT_VSYNC GND1 CRT_G_CON
3 2.2KOHM 4 3 2.2KOHM4 9 4
DDC_DATA_CON CRT_HSYNC CRT_GREEN
1SS355PT 8 5
DDC_DATA GND2 CRT_B_CON
7 6
GND3 CRT_BLUE
14 13
NP_NC2 NP_NC1
16 15
P_GND2 P_GND1
18 17
U4602 P_GND4 P_GND3
20 19
DDC_DATA_CON P_GND6 P_GND5
1
DDC_CLK_CON Line-1 DDC_DATA_CON DOCKING_12P
2 9
Line-2 NC4 DDC_CLK_CON
3 8
VSYNC_CON GND NC3 VSYNC_CON
4 7
Line-3 NC2
5 6
U4603 +3VS Line-4 NC1
1 5 AZ1045-04F
OE# VCC
23 CRT_VSYNC 2
A VSYNC_CRT RN4601B VSYNC_CON
3 4 3 33OHM 4
GND Y GND
1

74LVC1G125GV C4608 GND


GND 47PF/50V
nbs_c0402_h22_000s
2

@ GND

GND

U4604 +3VS
1 5
OE# VCC
23 CRT_HSYNC 2
A HSYNC_CRT RN4601A HSYNC_CON
3 4 1 33OHM 2
GND Y
1

74LVC1G125GV C4607
GND 47PF/50V
nbs_c0402_h22_000s
2

GND
B B

Q4602A
SSM6N48FU SL4603
1 6 DDC_DATA 1 2 DDC_DATA_CON
23 CRT_DDC_DATA 0603
1

C4609
22PF/25V
2

+3VS
2
5

SL4604
4 3 DDC_CLK 1 2 DDC_CLK_CON
23 CRT_DDC_CLK 0603
1

SSM6N48FU C4610
Q4602B 22PF/25V
2

A A

Title : &57B'6XE
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 46 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : 'LVSOD\3RUW
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 47 of 99
5 4 3 2 1
5 4 3 2 1

D D

Close to CONNECTOR
Near CON J4801
+5VS +12VS +5VS_HDMI_CRT
ER-022

1
G
F4801 SL4801
+5VSHDMI

2 S

3
1 2 1 2
0603

D
23 HDMI_TX2N_PCH 1 2 DVI_TX2N_R R4801 1 2 8.2Ohm HDMI_TX2N 0.75A/13.2V

1
C4801 0.1UF/6.3V
Q4802 C4809
3

90Ohm/100Mhz SI2304DDS-T1-GE3
0.1UF/6.3V
ER-005

2
@
L4801
UX31EP 005 12/21
JP4804 @
1 2 GND
2

1 2

DVI_TX2P_R R4802
SGL_JUMP HDMI CON.
23 HDMI_TX2P_PCH 1 2 1 2 8.2Ohm HDMI_TX2P J4801
C4802 0.1UF/6.3V HDMI_HP_CON 1
Hot_Plug_Detect
2
+3VS HDMI_TX2P Utility
3
TMDS_Data2+
4
HDMI_TX2N TMDS_Data2_Shield
5 20
TMDS_Data2- P_GND1

1
HDMI_TX1P 6
DVI_TX1N_R R4803 TMDS_Data1+
23 HDMI_TX1N_PCH 1 2 1 2 8.2Ohm HDMI_TX1N 7 22
C4803 0.1UF/6.3V RN4811B RN4811A HDMI_TX1N TMDS_Data1_Shield P_GND3
8
TMDS_Data1-

3
1
U4802 +3VS 2.2KOHM 2.2KOHM HDMI_TX0P 9
TMDS_Data0+
2

C HDMI_TX2P 1 10 C
L4802 HDMI_TX2N Line-1 HDMI_TX2P RN4810B RN4810A HDMI_TX0N TMDS_Data0_Shield
2 9 11

2
@ Line-2 NC4 HDMI_TX2N 2.2KOHM 2.2KOHM HDMI_TXCP TMDS_Data0-
3 8 Q4807A 12 23
90Ohm/100Mhz HDMI_TX0P GND NC3 HDMI_TX0P TMDS_Clock+ P_GND4
4 7 13
3

HDMI_TX0N Line-3 NC2 HDMI_TX0N UM6K31N HDMI_TXCN TMDS_Clock_Shield


5 6 14 21

4
2
Line-4 NC1 TMDS_Clock- P_GND2

2
15
R4804 CEC
23 HDMI_TX1P_PCH 1 2 DVI_TX1P_R 1 2 8.2Ohm HDMI_TX1P AZ1045-04F 16
C4804 0.1UF/6.3V DDC_CLK_HDMI DDC/CEC_GROUND
23 HDMI_CLK 1 6 17
GND SCL
18
+5VSHDMI SDA
19
U4803 DDC_DATA_HDMI +5V_Power
23 HDMI_DAT 4 3
HDMI_TX1P 1 MICRO_HDMI_19P
HDMI_TX1N Line-1 HDMI_TX1P
2 9
Line-2 NC4 HDMI_TX1N Q4807B
3 8

5
R4805 GND NC3
23 HDMI_TX0N_PCH 1 2 DVI_TX0N_R 1 2 8.2Ohm HDMI_TX0N HDMI_TXCP 4 7 HDMI_TXCP UM6K31N
C4810 0.1UF/6.3V HDMI_TXCN Line-3 NC2 HDMI_TXCN
5 6
Line-4 NC1
3

90Ohm/100Mhz AZ1045-04F
@ +3VS GND GND
L4803 GND
2

23 HDMI_TX0P_PCH 1 2 DVI_TX0P_R R4806 1 2 8.2Ohm HDMI_TX0P


C4811 0.1UF/6.3V

23 HDMI_CLKN_PCH 1 2 DVI_CLKN_R R4807 1 2 8.2Ohm HDMI_TXCN


C4812 0.1UF/6.3V
2

L4804
@
90Ohm/100Mhz
3

B B

23 HDMI_CLKP_PCH 1 2 DVI_CLKP_R R4808 1 2 8.2Ohm HDMI_TXCP


C4813 0.1UF/6.3V

+3VS

C
R4827 1%
R4831 1 2 680Ohm HDMI_TX2P 150KOHM
R4836 1 2 680Ohm HDMI_TX2N Q4804 B 2 1 HDMI_HP_CON
PMBS3904
R4832 1 2 680Ohm HDMI_TX1P
R4833 1 2 680Ohm HDMI_TX1N
E
R4834 1 2 680Ohm HDMI_TX0P R4861
R4835 1 2 680Ohm HDMI_TX0N HDMI_HP 2 1
23 HDMI_HP
0Ohm
1

R4838 1 2 680Ohm HDMI_TXCP


R4837 1 2 680Ohm HDMI_TXCN R4826
10KOhm
3
+3VS D
Q4801
2

2N7002
A 1 A
G
2 S GND

GND

Title : +'0,W\SH'
ASUSTeK COMPUTER INC Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 48 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : 79B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 49 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

CPU Thermal Sensor


ER-022
SMB1_CLK_S 14,28

1
C5002
@ Route CPU_THRM_DA , CPU_THRM_DC and on
0.1UF/6.3V

2
the same layer
SMB1_DAT_S 14,28

U5003 ------------------OTHER SIGNALS


1 5 +3VS
SCL SDA 10 mils
2
GND
3 4 ===============GND
ALERT# VDD
C5010

1
NCT7717U 10 mils
0.1UF/6.3V
nbs_c0201_h13_000s
=========H_THERMDA(10 mils)

2
10 mils
=========H_THERMDC(10 mils)
10 mils
=========GND
SMBUS addr=10010000 (90) 10 mils
U5002: Remote(Local) thermal sensor,use remote mode. ---------------------OTHER SIGNALS
C +3VS C
Avoid FSB,Power

1
R5006
7.5KOhm
1%
Set to 90 , BIOS set
to 85 degree

2
O/D
CPU_THERM# 32

B B

DC FAN Control

UX31E 047 5/09


+3VS
+5VS
1

C5005 C5001
R5002 10UF/10V 8PF/25V
10KOhm
2

J5001
4 6
2

4 SIDE2
30 FAN_PWM 3
3
2
2
30 FAN0_TACH 1 5
1 SIDE1
1

WtoB_CON_4P
C5003 C5004
100PF/50V 100PF/50V
2

A A

Title :)$1B7KHUPDO6HQVRU
ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Friday, May 18, 2012 Sheet 50 of 99
5 4 3 2 1
5 4 3 2 1

D D

+3VS
2.5A

SSD_TX+ MLCC 0.01UF/16V (0402) X7R 10% CX5109 1 2 /RAID 0.01UF/16V SATA_TXP1 20
J5101 SSD_TX- MLCC 0.01UF/16V (0402) X7R 10% CX5112 1 2 /RAID 0.01UF/16V SATA_TXN1 20
19 P_GND1 1 1
2 1 /RAID 2
2
3 3 R5105 0Ohm ER-026
4 4
5 SSD_RX- MLCC 0.01UF/16V (0402) X7R 10% CX5111 1 2 /RAID 0.01UF/16V SATA_RXN1 20
5 SSD_RX+ MLCC 0.01UF/16V (0402) X7R 10% CX5110 1
6 6 2 /RAID 0.01UF/16V SATA_RXP1 20
7 7
8 8
C 9 9 SATA_TXP0 20 C
SSD_RX 10 10 SATA_TXN0 20 PCH Tx to SSD Rx
11 11
12 12
13 13 SATA_RXN0 20
SSD_TX 14 14 SATA_RXP0 20 PCH Rx to SSD Tx
15 15
16 +3VS
16 JP5101
17 17
20 P_GND2 18 18 1 1 2 2

1
C5101 C5102 C5103 C5104
MINI_PCI_18P 1MM_OPEN_5MIL 5PF/25V 5PF/25V 5PF/25V 5PF/25V
@ @ @ @

2
Mini-PCI (SDD): 12G030100180 ER-034

+3VS +3VS

B B
C5105
1

C5110
0.1UF/6.3V
nbs_c0201_h13_000s 8PF/25V
2

ER-022

A A

Title : 0LQL&DUGB66'
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
B 8;$ R2.0
Date: Friday, May 18, 2012 Sheet 51 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : 86%B86%3RUW 
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 52 of 99
5 4 3 2 1
5 4 3 2 1

D D

+3VAUX_WLAN
+3VSUS
R5306 2 1 0Ohm PR-012
@
+3VS
+3VS
+3VAUX_WLAN R5304 2 1 0Ohm
2

+3V
R5313 ER-008
1MOhm R5305 2 1 0Ohm
@
1

BAT54CW +1.5VS

55
53
D5306 J5303
2 1 2

SIDE1
NP_NC1
22 PCIE_WAKE# 1 2
25 BT_ON 3 3 4
BT_ON_C BT_ON_C R5311 1 3 4
1 2 0Ohm WLAN_PIN5 5 6 +1.5VS_WLAN R5303 2 1 0Ohm
5 6 /DDR3
21 CLKREQ_WLAN# 7 8

1
7 8 C5315 C5316
9 10
+3VS 9 10 0.1UF/6.3V 0.1UF/6.3V
11 12
21 CLK_PCIE_WLAN#
21 CLK_PCIE_WLAN 13
11 12
14 @ @ ER-024

2
13 14
15 16
15 16
@ 17 18
17 18
1

Reserve for Intel BT_ON_C R5308 1 2 0Ohm WLAN_PIN19 19 20 WLAN_ON_C


R5301 19 20
Rainbow Peak 21 22 BUF_PLT_RST# 3,7,24,30,31,45,63
21 22
10KOhm 21 PCIE_RXN2_WLAN 23 24
23 24
21 PCIE_RXP2_WLAN 25 26
25 26
27 28
2

27 28
C 29 30 C
WLAN_ON_C 29 30
21 PCIE_TXN2_WLAN 31 32
31 32
21 PCIE_TXP2_WLAN 33 34
3

3 33 34
D 35 36 USB_PN5 24
Q5301 35 36
37 38 USB_PP5 24
2N7002 37 38
39 40
39 40
25 WLAN_ON# 11 41 42
G 41 42
43 44
2 S 45
43 44
46
2

45 46

NP_NC2
47 48
47 48

SIDE2
49 50
BT_ON_C R5310 WLAN_PIN51 49 50
1 2 0Ohm 51 52
51 52
MINI_PCI_52P

56
54
UX31EP 008 12/21

WLAN +3VAUX bypass capactor:


Place 0.1UF near pin 2,24,52,39 41.
Place 10UF near +3VAUX_WLAN source side. PCIE_TXP2_WLAN PCIE_RXP2_WLAN
PCIE_TXN2_WLAN PCIE_RXN2_WLAN
1

1
1

1
C5302 C5304
+3VAUX_WLAN C5303 5PF/25V C5307 5PF/25V
2

2
5PF/25V 5PF/25V
2

2
B B
@ @
@ @
C5305 C5306
1

C5325 C5324
C5312 0.1UF/6.3V 0.1UF/6.3V 0.01UF/16V 0.01UF/16V
10UF/6.3V
2

+3VAUX_WLAN
1

C5301 C5308 C5309 C5310


@ @ @ @
8PF/25V 8PF/25V 8PF/25V 8PF/25V
2

ER-022

A A

Title :0,1,&$5'B:ODQ %7


ASUSTeK COMPUTER INC. NB6 Engineer: Susi_Hong
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 53 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : %$5B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 54 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : 6,2B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 55 of 99

5 4 3 2 1
5 4 3 2 1

Main Board

CAPS_LOCK LED For Charge LED A/D_DOCK_IN

+3VS Close J6001

1
R5604 ER-020
10KOhm

2
D D

1
R5639
R5603 1 2 CHG_LED_con
CHG_LED_con 60
10KOhm 2 1 CAP_LED_CON# 31 R5601 1KOhm
+3VA 5%

2
1

1
2.2kOHM
UM6K1N

1
R5606 5% C5624 D5602 R5607

2
10KOhm 5 Q5603B 1UF/25V 1SS355PT 1KOhm

1
R5609 @ @ 5%

2
/UX31A_charger 4.3KOHM
2

2
1MOhm /UX31E_charger
6
R5611

1
UM6K1N

2
2 Q5603A GND GND
30 CAP_LED#
1

ER-027

D
3
D
Q5610
IF=5mA G1 2N7002K_T1_E3

D
3
VF Min. 2.55V G
2S
D

S
VF Max. 3.25V GND
Q4503 Q5611
2N7002 3 G1 2N7002K_T1_E3
D 30,88 AC_IN_OC#
G
2S

S
1
30 CHG_FULL_LED#
G
2 S

GND GND GND

C C
PR-008
WireLess/BT LED

R5637
2 1 RF_LED# 31

2.2kOHM
3

UM6K1N 5%
5 Q5601B
25 WLAN_LED
4

UM6K1N
1

2 Q5601A
25 BT_LED
C5623
1
1

10UF/6.3V
2

C5622
10UF/6.3V PR-003
2

GND GND GND

GND LID SW (no TouchPanel)


WirelessLAN & Bluetooth Status LED
+3VA

B B

J5603
1 4 LID_SW#
VDD OUT
2 3
VSS NC
PWR LED

1
S-5711ANDL-I4T1G C5613
+5VSUS C5605 0.1UF/16V
0.1UF/16V

2
GND

GND
1
3

LED5602 ER-017
WHITE
GND UX31EP 024 01/18 LID SW (for TouchPanel)
LID_SW#
2

+3VA
1

R5640
R5605
1MOhm 2 1 POWER_LED# 31
2

+5VSUS
R5636
2

1.5KOhm
2.2kOHM
1%
5%
1

3
1

R5602 UM6K1N
5 Q5609B J5602 @
ER-028 200KOhm 1 4 LID_SW#
LID_SW# 70
4

VDD OUT
2 3
2

VSS NC

1
UM6K1N C5604 S-5711ANDL-I4T1G C5612
A 2 Q5602A @ @ A
6

0.1UF/16V 0.1UF/16V
1

2
UM6K1N
PWR_LED# 2 Q5609A
3

GND
1

UM6K1N
5 Q5602B
30 PWR_LED#
GND
4

Title : /('B,QGLFDWRU
GND
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev

GND
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 56 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

+5VS +3VS +1.8VS +1.5VS +1.05VS +1.05VS +0.75VS +VCORE +VGFX_CORE +0.8VS

1
R5703 R5704 R5705 R5706 R5707 R5708 R5713 R5714 R5715 R5720
D +3VA D
330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm
@ @ @ @ @ @ @ @
@

2
2
R5701 +5VS_DISCHRG +3VS_DISCHRG +1.8VS_DISCHRG +1.5VS_DISCHRG +VTT_PCH_DISCHRG +VTT_CPU_DISCHRG +0.75VS_DISCHRG +VCORE_DISCHRG +VGFX_CORE_DISCHRG +0.8VS_DISCHRG
100KOhm

6
UM6K1N UM6K1N UM6K1N UM6K1N UM6K1N UM6K1N UM6K1N UM6K1N UM6K1N UM6K1N

1
5 Q5701B 2 Q5702A 5 Q5702B 2 Q5703A 5 Q5703B 2 Q5704A 5 Q5704B 2 Q5707A 5 Q5707B 2 Q5710A

1
6
UM6K1N
2 Q5701A @ @ @ @ @ @ @ @ @
30,82,83,84,87,91 SUSB_EC#
1

SUSB_EC 3

C C

4/20 Stuff R5710 and R5711


+5V +3V +1.5V
1

R5710 R5711 R5712


+3VA 330Ohm 330Ohm 330Ohm
@
2

2
2

R5702 +5V_DISCHRG +3V_DISCHRG +1.5V_DISCHRG


100KOhm
3

UM6K1N UM6K1N UM6K1N


1

5 Q5705B 2 Q5706A 5 Q5706B


4

4
6

UM6K1N
2 Q5705A
30,91 SUSC_EC#
1

B B

A A

Title : '6*B'LVFKDUJH
ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 57 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

+3VS

D +3VSUS D

5
RN5801C
1 100KOhm

RN5801A
100KOhm

6
2

D5801
22,30,81 SUS_PWRGD 1
3
30 5VSUS_PWRGD 2

BAT54AW
OD R5806
83 DDR_PWRGD 0Ohm 1 2

OD R5802 SL5802
84 P_1VS8_PWRGD 0Ohm 1 2 1 2 SYSTEM_PWRGD
0402

OD
R5803
P_0V8_PWRGD 0Ohm 1 2
1

C5805
0.1UF/6.3V
@ nbs_c0201_h13_000s
2

C C

OD R5804
82 +VTT_CPU_PWRGD 0Ohm 1 2
1

C5804 +3VS
0.01UF/16V
2

RN5801D
100KOhm
8

R5805
OD 0Ohm 1 2 CORE_PWRGD
80 VRM_PWRGD CORE_PWRGD 30

+3VS
3

B B

100KOhm
RN5801B
4

+3VSUS

U5803
87 P_0V8_PWRGD 1 5
SYSTEM_PWRGD INB VCC
2
INA SL5803
3 4 1 2 ALL_SYSTEM_PWRGD 3,22,30,80
GND OUTY 0402
74LVC1G08GW

A A

Title : 352B3URWHFW
ASUSTeK COMPUTER INC. NB3 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 58 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : '-B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 59 of 99
5 4 3 2 1
5 4 3 2 1

ER-015

Current setting=6A
56 CHG_LED_con
D
+V_DCJACK
Depend on the current A/D_DOCK_IN
D

of the adaptor.
J6001
6 1 PT6000 2 1
2 1 PT6001
PT6002 PL6001
$YRLG6SLNH 5᤟
1
1 PT6003 80Ohm/100Mhz
Irat=3A
4 2 1

1
PL6002 PC6005

1
1 PC6000 80Ohm/100Mhz 10UF/25V
3 0.1UF/25V Irat=3A nbs_c0805_h55_000s

2
1

1
5 

1
7 PC6001 PC6002 PC6003 PR6003 @ PCE6000

1
4.7UF/25V 1UF/25V 0.1UF/25V 200KOhm 15UF/25V
DC_POW ER_JACK_3P nbs_c0805_h57_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s @ PR6004 PR6005

2
1 PT6004 2.2Ohm 5% 2.2Ohm 5%

2
1 PT6005 nbs_r1206_h30_000s nbs_r1206_h30_000s
1 PT6006

2
1 PT6007
12014-00101000
UX31EP 018 01/18 GND
GND

C C

Battery Connector
GND

GND
VI/O

VI/O
3

1
BAT_CON
PD6001
IP4223-CZ6

B PT6008 1 B
PT6009 1
PT6010
0D[$
1
PT6011 1

VI/O
VI/O

VBUS
4

6
+3VA

W TOB_CON_8P
1 1 PT6016
1 PT6017
9 SIDE1 2 2 1
3 1 PT6018
3 SMB0_DAT_CLK_CON PR6002 1
4 2 330Ohm SMB0_CLK 30,83,88
4 SMB0_DAT_BAT_CON PR6001 1
5 5 2 330Ohm SMB0_DAT 30,83,88
6 TS1#_BAT_CON PR6000 1 2 330Ohm
6 BAT1_IN_OC# 30
10 SIDE2 7 7
1

8 PC6004
8 0.1UF/25V
J6003 nbs_c0603_h37_000s
2

1 PT6012
1 PT6013
1 PT6014
1 PT6015

GND
A A

Title : DC_DC & BAT IN


ASUSTeK COMPUTER INC. Engineer: Power
Size Project Name Rev
Custom UX31A2 R2.0
Date: Tuesday, March 27, 2012 Sheet 60 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : %7
ASUSTeK COMPUTER INC. NB1 Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 61 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title
:
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 62 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

FPC_CON_36P
38
SIDE2
24 U3_U3RXDN2_PCH 36
36
24 U3_U3RXDP2_PCH 35
35
34
SL6301 34
24 U3_U3TXDN2_PCH 33
USB_PP1_con 33
24 USB_PP1 1 2 24 U3_U3TXDP2_PCH 32
32
31
R0603 USB_PN1_con 31
30
SL6302 USB_PP1_con 30
29
USB_PN1_con 29
24 USB_PN1 1 2 28
28
20 ACZ_BCLK_AUD 27
R0603 27
20 ACZ_SYNC_AUD 26
26
20 ACZ_RST#_AUD 25
25
20 ACZ_SDOUT_AUD 24
24
20 ACZ_SDIN0_AUD 23
23
30 OP_SD# 22
22
21 CLK_USB48 21
21
20
USB_PP9_con 20
19
ER-031 USB_PN9_con 18
19
18
17
17
45 MIC_INT_CLK 16
16
45 MIC_INT_DATA 15
15
14
14
3,7,24,30,31,45,53 BUF_PLT_RST# 13
13
C
38 H_SPKR+ 12 C
12
38 H_SPKR- 11
11
ER-031 Ϯ +5V 10
10
9
9
8
8
7

1
SL6303 C6302 7
6
USB_PP9_con 0.1UF/6.3V +3V 6
24 USB_PP9 1 2 +5VS 5
5
4

2
R0603 +3VS 4
3
SL6304 3
2
USB_PN9_con 2
24 USB_PN9 1 2 1 37
GND 1 SIDE1
R0603

1
C6301 J6301
8PF/25V

2
GND GND GND

ER-022 PR-011 ER-035


+3V +5VS +5VS +3VS +5V

MIC_INT_CLK
B B

1
C6305 C6304 C6303 C6308 C6306 C6307
10PF/50V 8PF/25V @
8PF/25V

2
0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V

GND GND GND GND GND GND

A A

Title : %72%&211
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Friday, May 18, 2012 Sheet 63 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : 781B797XQHU
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 64 of 99
5 4 3 2 1
5 4 3 2 1

CPU Bracket UX31A WLAN NUT PCH NUT SSD NUT

H6512 H6501 H6520


1
CT339B154I154D134 H6519

H6513 CT217B176D146 CT217CB140D110


1
CT339B154I154D134 CT217CB140ID110

H6514
D
1 D
CT339B154I154D134 GND GND

H6515 GND
1
CT339B154I154D134

GND

Screw hole

H6504
H6517 H6505
1 2 1 1 H6511
OTRBIDO142X220 C177I111D91 1
C90D67
2DRILL_D67_D91 H6506
H6518 1
1 C177I111D91
GND GND OTRBIDO142X220
GND

H6516
H6508
1
NP_NC GND1
2 GND 1 ER-002
3 C177I111D91
GND2
4
GND3 H6509
C C
1
C177I111D91
O91X138DO91X138N
H6510
1
C177I111D91

GND
GND

Bottom Pad

U6502 U6507
U6501 1 1
1 1
1
1
C79_NP C177_NP
SMD232X260_NP

UX31E 094 08/12 U6508


1
GND 1
U6515 C177_NP
1 U6504
B 1 B
1
1
SMD190X98
C79_NP
GND
U6505
GND 1
1

C79_NP

GND

EMI Shrapnel

UX31EP 002 12/21 ER-002


A A

Title : 0(B&RQQ 6NHZ+ROH


ASUSTeK COMPUTER INC. NB4 Engineer: Susi_Hong
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 65 of 99
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : (6$B(6$7$
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 66 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : 3&+B;'321),
ASUSTeK COMPUTER INC. NB4 shihhsien_yang
Engineer:
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 67 of 99
5 4 3 2 1
5 4 3 2 1

ER-013
D D

C C

B B

A A

Title :
ASUSTeK COMPUTER INC. NB3 Engineer: Susi_Hong
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 68 of 99
5 4 3 2 1
5 4 3 2 1

USB2.0 EMI-Protection & ESD-Protection


RN6916A
1 0Ohm 2
@
USB_U2+ USB_U2+_CON

1
L6901
90Ohm/100Mhz

4
USB_U2- USB_U2-_CON
RN6916B
D D
3 0Ohm 4
@
D6902

ER-030 VI/O
3
VI/O
4

+5VSUS
GND VBUS
2 5

VI/O VI/O
1 6

USB3.0 IP4223-CZ6

EMI-Protection USB3.0 USB30 CONN


ESD-Protection
1st : 07G028076030 USB30 CONN
2

1
90Ohm
L6978 ESD PROTECTION AZ1045-04F UX21 CON 12013-00011600
2nd : 07G028153010
2 3

1 4

0805 UX31EP 007 12/21


+5V_USB2
90Ohm @ ESD PROTECTION IP4284CZ10-TB
L6979 J6901
ER-013 U6984 1
3

0805 U3_U3RXDN1_R USB_U2-_CON VBUS


1 2
U3_U3RXDP1_R Line-1 U3_U3RXDN1_R USB_U2+_CON D-
2 9 3
U3_U3RXDP1_R Line-2 NC4 U3_U3RXDP1_R D+
24 U3_U3RXDP1_PCH 4 @0Ohm 3 RN6901B 3 8 4
0Ohm RN6901A U3_U3RXDN1_R U3_U3TXDN1_R GND NC3 U3_U3TXDN1_R U3_U3RXDN1_R PGND
C
24 U3_U3RXDN1_PCH 2 1 4 7 5 C
RN6915B C6930 U3_U3TXDP1_R U3_U3TXDP1_R Line-3 NC2 U3_U3TXDP1_R U3_U3RXDP1_R SSRX-
24 U3_U3TXDP1_PCH 4 0Ohm 3 2 1 0.1UF/16V 5 6 6
RN6915A C6925 Line-4 NC1 SSRX+
24 U3_U3TXDN1_PCH 2 0Ohm 1 2 1 0.1UF/16V U3_U3TXDN1_R 7
AZ1045-04F U3_U3TXDN1_R GND
8
U3_U3TXDP1_R SSTX-
9
SSTX+
10
P_GND1
11
GND P_GND2
12
P_GND3
GND 13
P_GND4
14
P_GND5
15
P_GND6

USB_CON_9P

GND

Charger_pwr_control & DC mode low USB_SW


USB Charger voltage control VBUS Contorl Circuit
+5VSUS +5V_USB2
L6906
1 2

ER-032
1

120Ohm/100Mhz

1
B
C6904  B
0.1UF/16V C6926 CE6902
2

0.1UF/6.3V 100UF/6.3V

2
USB_SW_CNTL 2 R6905 1 USB_SW_CNTL_R 1

2
0Ohm 3 USB_CHARGE_VBUS
ER-013 U6904
30 USB_CHARGE_VBUS_EC 2
5 4 GND GND
VDD GND1 USB_U2+ BAT54AW
24 USB_PP0 6
Y+ D+
3 EMI
1

7 2 USB_U2- C6901 D6903


24 USB_PN0 Y- D-
8 1 USB_SW_CNTL 1UF/25V
30 USB_CHARGE_ON# SB# INT
9 @
2

1
GND2

PI5USB14566AZAE +3VA R6909


4.7KOhm
GND Ϯ @

2
+5VSUS +5VSUS_AI

1
100KOhm U6903
R6901 1 8
VBUS_discharger 2
GND OUT3
7

2
IN1 OUT2
3 6
USB_CHARGE_VBUS IN2 OUT1 U3_OC#
4 5 U3_OC# 24
EN OC#

1
+5V_USB2 TPS2065DGNG4
+3VA R6910
GND 8.2KOhm
ER-019 @
1 @ 2

2
R6903 1KOhm
1

R6902
@ GND
1MOhm
2

UM6K1N
A 5 Q6901B A
@
4
6

UM6K1N
USB_CHARGE_VBUS 2 Q6901A
@
1

Using TI IC, then the


Title : 86%BRQH3RUW
iphone4S can't charger ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
GND in S4&S3 mode. Size
C
Project Name
8;$
Rev
R2.0
Date: Tuesday, March 27, 2012 Sheet 69 of 99
5 4 3 2 1
5 4 3 2 1

Place close to EC
+3VA +3VA_EC

1
D D
+3VA
100KOhm 100KOhm
R7009 R7010
+3VA_EC

2
1

100KOhm D7003
@

1
R7011 1 2
56 LID_SW# LID_SW#_EC 30
2

100KOhm
1SS355PT R7008

ER-022

2
5
D7002
1 PWR_SW# 30,32
4 3 3 @
2
1

C7010 Q7003B +3VA +3VA


BAT54CW
UM6K31N
0.1UF/25V +3VA_EC +3VA
2

ER-028 ER-028
2

1
330Ohm 1 R7001 2
+3VA R7005 R7004
R7016

200KOhm 200KOhm
U7001
330Ohm 1 5

nbs_r0402_h16_000s
1

2
OUT IN

1
UM6K31N
Q7002A 2
511KOhm GND

1
R7007 1 6 3 4 C7001
31 PWR_SW_KB# EN DSG 1UF/6.3V

2
G5244T11U
ER-006

2
1
C7002

2
1
1UF/6.3V

2
R7006 Q7002B
UX31EP 022 01/18

3
C 10KOhm UM6K31N C
+3VA
5

4
Q7003A

1
UM6K31N
+3VA R7002

1
2 +3VA 1MOhm
30 +3VA_ON
C7003

1
2.2UF/10V

2
1

1
Q7001A

6
R7003 UM6K31N
100KOhm D7001 1MOhm
R7012 1SS355PT 2

1
2
Q7001B

3
UM6K31N

4
1
C7004
2.2UF/10V

2
D7004
2 1
30 AC_IN_OC#_EC

1SS355PT
B B

3
Q7004
3D

88 AC_IN 1 1
G

2 S
2N7002K
2

A A

Title : (&B3:5B6:
ASUSTeK COMPUTER INC. NB4 Engineer: Susi_Hong
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 70 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : 9*$B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 71 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : 9*$B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 72 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : 9*$B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 73 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : 9*$B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 74 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : 9*$B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 75 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : 9*$B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 76 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : 9*$B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 77 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : 9*$B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 78 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : 9*$B
ASUSTeK COMPUTER INC. NB4 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 79 of 99
5 4 3 2 1
5 4 3 2 1

+VCORE PJP8004
In CPU socket @ 1MM_OPEN_5MIL
1 2 AC_BAT_SYS
1 2
1

1
PC8070 PC8071 PC8072 PC8073 PC8074 PC8075 PC8076 PC8077 PC8078 PC8079
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V AC_BAT_SYS_CORE @ PJP8003
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s
nbs_c0603_h37_000s 1MM_OPEN_5MIL
2

2
1 2 +5VSUS
3-FORVHWR3&(
1 2
@ @ @ @ @

PJ8010
@
SHORT_PIN
2 1 AC_BAT_SYS_CORE

1


1
PC8021 PC8011 PCE8001
D 0.1UF/25V 1UF/25V 15UF/25V D
nbs_c0603_h37_000s

FDMC7696

FDMC7696
nbs_powerpak_5p_000

nbs_powerpak_5p_000

2
5

5
D D
PC8017 PC8025
680PF/50V 220PF/50V P_VCORE_DHR1_30 4 4

PQ8000

PQ8001
1 2 1 2 G S G S

5᤟

1
2
3

1
2
3
PR8011
PR8016 PR8020 1Ohm Imax=33A
6 VCCSENSE 1 8.06KOhm2 2 29.4KOhm1 nbs_r0603_h24_000s
PL8005

2
1
PC8043 5% 0.36UH +VCORE
1000PF/50V CYNTEC/PCME064T-R36MS1R407

1
PC8042 1 2

2
1000PF/50V
PQ8002 7*7*4

ESR=6mOhm/Ir=3.5A
2
1

1
PC8044 FDMC0310AS PC8010

1
1000PF/50V 4 G D 5 1000PF/50V

1
PQ8003 nbs_c0603_h37_000s  

PCE8002
@ @

470UF/2V
SHORT_PIN

SHORT_PIN
2

2
6 VSSSENSE 3 S 6 D FDMC0310AS GND 3 PCE8004
4 G D

PJ8001

PJ8002
5 220UF/2V
2&3$ 2&3$ I .+] 2 S 7 D P_VCORE_SNB_S

2P_VCORE_LX_PJ_10
@
9*); 9&25(

2
PR8093 3 S 6 D
7PD[ & 8 D

2
1
10Ohm 5%
,FF0D[ $ ,FF0D[ $ PR8002 1 S
nbs_r0201_h10_000s

nbs_r0201_h10_000s

1
nbs_r0603_h24_000s 150KOhm 2 S 7 D PR8010
nbs_r0201_h10_000s

nbs_r0201_h10_000s
+5VS_PWR 2 1 1 2P_VCORE_AC_TON_10 8 D 1Ohm 5%

P_VCORE_SETINI&A_10
1 S nbs_r1206_h30_000s

P_VCORE_TONSET_10
& 9

P_VCORE_SENSE-_10
2

1
PC8045
300KOhm

300KOhm

249KOhm

P_VCORE_COMP_10

2
P_GFX_GFXPS2_10
P_VCORE_VDD_20

P_VCORE_CSN_10
P_VCORE_CSP_10

P_VCORE_BST_30
PR8030

PR8026

PR8022 PR8039 1UF/25V


300KOhm

300KOhm
+5VS_PWR
3&(SODFHXQGHU&38

P_VCORE_FB_10
PR8023

PR8021
100KOhm nbs_c0603_h37_000s

2
nbs_r0201_h12_000s PC8056
2200PF/50V PR8014
1

2
5%

5%

2 1 3.6KOhm
1

PC8038
2

1 200KOhm2
PR8049

PR8045
470KOHM

470KOHM

0.1UF/25V PC8057 PC8040

1
PR8089

PR8088

PR8087 nbs_c0603_h37_000s 2200PF/50V 0.1UF/25V


39KOhm

39KOhm
220KOhm

220KOhm
PR8032

PR8028

2 1 nbs_c0603_h37_000s
2 1
2

10
C C
1

9
8
7
6
5
4
3
2
1
2

P_VCORE_CSP_10 2 1 2 1
0.1UF/25V

0.1UF/25V

SETINIA

GFXPS2

FB
COMP

ISEN1P

BOOT1
VCC

RGND

ISEN1N

TONSET
1

1
PR8091
11KOhm

PC8035

PR8090
11KOhm

PC8039

PR8006 PR8007
PR8076 3KOhm 10KOhm
41 1Ohm 5%
2

GND1 P_VCORE_DH_30 nbs_r0603_h24_000s


11 40
1

P_VCORE_TMPMAX_10 SETINI UGATE1 P_VCORE_LX_30


12 39 1 2 +5VS_PWR
P_VCORE_ICCMAX_10 TMPMAX PHASE1 P_VCORE_DL_30
13 38

1
P_GFX_ICCMAX_10 ICCMAX PU8000A LGATE1 P_VCORE_VDDP_30 PC8046 P_VCORE_RNTCP_10
14 37 2 1
P_VCORE_TSEN_10 ICCMAXA RT8168BGQW PVCC P_GFX_DL_30 1UF/25V
15 36
P_VCORE_OCSET_10 TSEN LGATEA P_GFX_LX_30 nbs_c0603_h37_000s PR8047
16 35

2
P_GFX_TSEN_10 OCSET PHASEA P_GFX_DH_30 10KOHM 3%
17 34
P_GFX_OCSET_10 TSENA UGATEA P_GFX_BST_30
18 33
P_VCORE_IBIAS_10 OCSETA BOOTA
19 32 ALL_SYSTEM_PWRGD 3,22,30,58
IBIAS EN

VRA_READY
20 31 P_GFX_TONSET_10 P_VCORE_CSN_10

VR_READY
2

VRHOT# TONSETA
3&FORVH,&SLQ
53.6KOhm

I .+]

ALERT#

ISENAN
COMPA

ISENAP
RGNDA
PR8033

PSL8008

1
VCLK
VDIO
3 SNB_SKTOCC# 1 2 PC8047

FBA
0402 PR8003 0.1UF/25V
150KOhm @

P_GFX_AC_TON_10
1

2
21
22
23
24
25
26
27
28
29
30

1
3-FORVHWR3&(

P_VCORE_ALERT#_5
2 1

P_GFX_SENSE-_10
P_VCORE_SCLK_5
PR8099

P_VCORE_SDA_5

P_GFX_COMP_10
1Ohm 5% PC8041 @

P_GFX_CSN_10
P_GFX_CSP_10
P_GFX_FB_10
nbs_r0603_h24_000s 0.1UF/25V PJ8009 @ PJP8002
1 2 P_SVIDPWR_10 nbs_c0603_h37_000s SHORT_PIN 1MM_OPEN_5MIL
+1.05VS
2 1 P_GFX_VIN_S 1 2 AC_BAT_SYS
35LVFORVHWR38
1 2
1

PC8036

1

PR8072

PR8073

1UF/25V
130Ohm

54.9Ohm

FDMC7696
nbs_powerpak_5p_000

1
nbs_c0603_h37_000s PC8015 PC8016 PCE8008
2

5
D 0.1UF/25V 1UF/25V 15UF/25V
nbs_c0603_h37_000s
1

2
2 1 P_GFX_DHR_30 4
3 H_PROCHOT_S#

PQ8004
PR8012 G S
58 VRM_PWRGD
PSL8005 0Ohm
6 VR_SVID_ALERT# 1 2 PSL8006 nbs_r0603_h24_000s Imax=29A

1
2
3
0402 1 2 PSL8007
6 VR_SVID_DATA 0402
B 1 2 B
6 VR_SVID_CLK 0402 +VGFX_CORE
PL8003
0.36UH
CYNTEC/PCME064T-R36MS1R407
1

PC8064 PC8063 1 2
100PF/50V 100PF/50V

ESR=6mOhm/Ir=3.5A
@ @ 7*7*4
2

1
@ @

SHORT_PIN

SHORT_PIN
1

1
PQ8005 PC8014  

PCE8003
470UF/2V
FDMC0310AS 1000PF/50V PCE8005

PJ8007

PJ8008
GND 3
PR8070 PC8018 PC8019 4 G D 5 nbs_c0603_h37_000s 220UF/2V

2P_GFX_LX_PJ_10
2
100Ohm 680PF/50V 220PF/50V PQ8006 @

2
1 2 1 2 1 2 3 S 6 D FDMC0310AS P_GFX_SNB_S
+VGFX_CORE

2
4 G D 5
2 S 7 D

1
8 D 3 S 6 D
1 S PR8013
6 VCC_AXG_SENSE 1 2 2 1 2 S 7 D 1Ohm 5%
PR8037 PR8036 8 D nbs_r1206_h30_000s
1

PC8052 10KOhm 24KOhm 1 S PR8015

2
1000PF/50V 3.6KOhm PC8051
1

PC8053 0.1UF/25V
2

1000PF/50V PC8058 nbs_c0603_h37_000s

1
2200PF/50V 2 1
2
1

2 1
PC8054 PC8060 2 1 2 1
1000PF/50V 2200PF/50V P_GFX_CSP_10 PR8008 PR8009
2

P_GFX_SENSE-_10 2 1 3KOhm 10KOhm


6 VSS_AXG_SENSE
1 2
P_GFX_RNTCP_10 2 1
PR8071
100Ohm PR8046
10KOHM 3%

PU8000B P_GFX_CSN_10
RT8168BGQW 3&FORVH,&SLQ
42

1
GND2 PC8050
43
GND3 0.1UF/25V
44
A GND4 A
45 @

2
GND5

Title : +VCORE/+VGFX
ASUSTeK COMPUTER INC. NB1 Engineer: Power
Size Project Name Rev
A2 UX31A2 R2.0
Date: Tuesday, March 27, 2012 Sheet 80 of 99

5 4 3 2 1
5 4 3 2 1

PR8101
1Ohm 5%
nbs_r0603_h24_000s
P_5V3V_VIN_S 1 2

2
PR8102
392KOhm
D
@ D

1
P_5V3V_VIN_S P_5V3V_VIN_S 1 2
1 2 AC_BAT_SYS
1

1
 PJP8100
1

1
PCE8100 PC8121 PC8120 PR8103 PC8117 PC8118 1MM_OPEN_5MIL PC8129
15UF/25V 1UF/25V 0.1UF/25V 200KOhm 0.1UF/25V 1UF/25V 0.1UF/25V
nbs_c0603_h37_000s nbs_c0603_h37_000s @
2

2
@ @

P_5V3V_ENLDO_10
P_5V3V_SECFB_10
PQ8102 EMB20N03V

PQ8100 EMB20N03V
nbs_powerpak_5p_011

nbs_powerpak_5p_011
P_5V3V_VIN_20
+5VAO

5
5᤟
D D

1
PC8134 +3VAO
4.7UF/6.3V

1
4 P_5VSUS_DH_30 nbs_c0603_h37_000sPC8103 PC8102 P_3VSUS_DH_30 2 1 P_3VSUS_DHR_30 4

2
S G 4.7UF/6.3V 0.1UF/25V PR8107 G S

2
nbs_c0603_h37_000s nbs_c0603_h37_000s 0Ohm
Imax=4A

2
PR8118 PR8119
nbs_r0603_h24_000s Imax=4A
3
2
1

1
2
3
@ PL8101 10KOhm 10KOhm PL8100

15
14
13
12
11
PJP8101 +5VO 2.2UH 2.2UH +3VO
@ @ @
1MM_OPEN_5MIL Irat=8A Irat=8A

ENLDO
LDO3
LDO5
SECFB

VIN
1

1
1 1 2 2 2 1 P_5VSUS_LX_30 P_3VSUS_LX_30 2 1 1 2
+5VSUS 1 2 +3VSUS
PJP8102
7*7*3 7*7*3
1

1
PQ8103 EMB20N03V

PQ8101 EMB20N03V
nbs_powerpak_5p_011

nbs_powerpak_5p_011
PC8128 P_5VSUS_DL_30 16 10 P_3VSUS_DL_30 PC8127 1MM_OPEN_5MIL
1000PF/50V P_5VSUS_LX_30 LGATE1 LGATE2 P_3VSUS_LX_30 1000PF/50V
17 PHASE1 PHASE2 9
1

5
 nbs_c0603_h37_000s D P_5VSUS_DH_30 18 8 P_3VSUS_DH_30 D nbs_c0603_h37_000s
2

2
PCE8101 P_5VSUS_BST_30 UGATE1 UGATE2 P_3VSUS_BST_30
1 2 19 7 1 2
BOOT1 BOOT2
1

1

SHORT_PIN

220UF/6.3V @ P_5VSUS_SNB_S 20 6 SUS_PWRGD P_3VSUS_SNB_S


+5VO BYP1 PGOOD

1
SHORT_PIN
4 PC8106 21 PC8109 4 @ PCE8102 PC8131 PC8132

ENTRIP1

ENTRIP2
2

GND
1

1
PJ8103

S G 0.1UF/25V 0.1UF/25V G S 150UF/6.3V 22UF/6.3V 22UF/6.3V


C C

PJ8100
PR8131 nbs_c0603_h37_000s nbs_c0603_h37_000s PR8130 nbs_c0805_h57_000s
nbs_c0805_h57_000s

TON

2
FB1

FB2
1Ohm 5% 1Ohm 5% @ @
3
2
1

1
2
3
nbs_r1206_h30_000s PU8100 nbs_r1206_h30_000s
5᤟
2

RT8239BZQW

P_5VSUS_EN_OC_10

P_3VSUS_EN_OC_10
5᤟
2

P_5VSUS_FB_10 1
2
3
4
P_3VSUS_FB_10 5

2
P_3VSUS_DL_30
1 2

1
1 2 P_5VSUS_DL_30

P_5V3V_TON_10
PC8101 @ PR8139
P_5VSUS_VSENS_10 PC8100 @ PD8100 2200PF/50V 249KOhm P_3VSUS_VSENS_10
2200PF/50V BAT54CW @ SUS_PWRGD 22,30,58
1

1
1

2
1

1
PC8105 PR8105 PC8104 +5VO 3 PC8111 PR8115 PC8112
0.1UF/25V 10.2KOhm 1000PF/50V 2 1000PF/50V 10KOhm 0.1UF/25V
5᤟
2

2
2

2
1

5᤟

1
PR8104
6.65KOhm
5᤟ PR8114

1
PR8111 14.7KOhm
392KOhm PR8106 PR8117 PR8113
2

2 1 P_5VSUS_LX_30 249KOhm 56KOhm 249KOhm

2
2

2
PR8110 @
3

6
0Ohm
2 1 PQ8108B PQ8108A
83 P_+5VSUS_VSET_10
30 5VSUS_ON 5 UM6K1N UM6K1N 2 3VSUS_ON 26,30
Battery Mode
4

1
B S0 S3 DS3 S5 S5 with AI charger B

5VSUS_ON 1 1 1 0 1
3VSUS_ON 1 1 0 0 0
SUSC_EC# 1 1 0 0 0
SUSB_EC# 1 0 0 0 0
@ PC8108
1000PF/50V 1.5V_ON 1 1 1 0 0
1 2
5᤟
P_5V3V_SECFB_10

PR8100 Adaptor Mode


200KOhm
+12VSUS 2 1
S0 S3 DS3 S5 S5 with AI charger
5VSUS_ON 1 1 1 1 1
2

PR8116
39KOHM 3VSUS_ON 1 1 0 1 1
SUSC_EC# 1 1 0 0 0
1

PSL8100
SUSB_EC# 1 0 0 0 0
+5VAO 2 1 +5VA
0603
1.5V_ON 1 1 1 0 0

PD8101 PSL8101
BAT54SW 2 1
+3VAO 0603 +3VA
1
P_5VSUS_DL_30 2 +5VO
1 P_5V3V_CP1_20 3
2 P_5V3V_CP3_20
A PC8113 PT8107 TPC28T PT8100 TPC28T PT8105 TPC28T A
0.1UF/25V +12VSUS 1 +3VO 1 +3VAO 1
1

nbs_c0603_h37_000s PC8115
0.1UF/25V PT8101 TPC28T PT8106 TPC28T
PD8102 nbs_c0603_h37_000s +3VSUS 1 +3VA 1
2

BAT54SW

Title : +3VSUS/+5VSUS
1 PT8109 TPC28T PT8102 TPC28T PT8112 TPC28T
2 1 P_5V3V_CP2_20 3 PSL8102 GND 1 +5VO 1 GND 1
2 P_5V3V_CP4_20 2 1
shihhsien_yang
PC8114 0603 +12VSUS PT8110 TPC28T PT8103 TPC28T PT8111 TPC28T Engineer:
婳 check 㔜ấ䶂嶗 +12VSUS total ᷎倗⮵⛘暣旣ᶵ⼿⮷㕤10kOhm
ASUSTeK COMPUTER INC. NB
1

0.1UF/25V PC8116 GND 1 +5VSUS 1 GND 1


nbs_c0603_h37_000s 0.1UF/25V Size Project Name Rev
nbs_c0603_h37_000s PT8104 TPC28T Custom UX31A2
2

+5VAO R2.0
1
Date: Tuesday, March 27, 2012 Sheet 81 of 97
5 4 3 2 1
5 4 3 2 1

+VTT_CPU & +VTT_PCH & +1.05VS POWER SUPPLY


1 2

PR8215 @
0Ohm
58 +VTT_CPU_PW RGD
D D
PR8237
0Ohm
1 2 SUSB_EC# 30,57,83,84,87,91
+5VSUS @ PR8201
PJP8200 2.2Ohm 5%

1
1MM_OPEN_5MIL nbs_r0603_h24_000s PC8204
1 2 P_VCCP_IN_S 2 1 0.1UF/25V
1 2 PC8201 @

2
1UF/25V
nbs_c0603_h37_000s
1

P_VCCP_MODE_10
PC8235 PC8226 PC8216 1 2

P_VCCP_V5IN_20

P_VCCP_BST_20
0.1UF/25V 10UF/6.3V 0.1UF/25V

P_VCCP_EN_10
nbs_c0805_h57_000s
f=1MHz
@ @
2

2
2 1

PC8229
0.1UF/25V
nbs_c0603_h37_000s

25
24
23
22
21
20
19
18
17
16
V5IN
GND5
GND4
GND3
GND2
GND1

PGOOD
MODE
EN
BST
OCP=7.6A
C C
PL8200
Imax=6A
1.0UH +1.05VO PJP8201
@ +1.05VS
1 PGND1 SW5 15
2 PU8200 14 Irat=10.1A 1MM_OPEN_5MIL
PGND2 TPS51317RGBR SW4 P_VCCP_PHASE_S
3 PGND3 SW3 13 1 2 1 1 2 2
4 VIN1 SW2 12
5 11 5*5*3

1
VIN2 SW1 PC8219 PC8231 PC8232

1
PC8225 22UF/6.3V 22UF/6.3V 22UF/6.3V

COMP
REFIN

2
VOUT
VREF
1000PF/50V nbs_c0805_h57_000s
nbs_c0805_h57_000s
nbs_c0805_h57_000s

GND

2
nbs_c0603_h37_000s PJ8204

2
SHORT_PIN

nbs_c0603_h37_000s
P_VTT_SNB_S @

6
7
8
9
10

1
0.22UF/25V

1
PC8202
PR8228

P_VCCP_VREF_10
P_VCCP_COMP_10
P_VCCP_REFIN_10
P_VCCP_VOUT_10
1
1Ohm 5%
95()9 nbs_r1206_h30_000s

2
1

PC8228 1
PR8203 2200PF/50V
B 49.9KOhm PR8204 PR8227 B
2

3KOhm 10Ohm
1 2 1 2 P_VCCP_LOSENS_10
2

5(),19
PSL8201
2

1 2 VCCP_SENSE 6

1
PR8202 PC8211 0402
56KOhm 0.1UF/25V
@

2
1

PSL8202
1 2 VSSP_SENSE 6
0402

A A

<Variant Name>

Title : +1.05VS
ASUSTeK COMPUTER INC. NB Engineer: shihhsien_yang
Size Project Name Rev
Custom UX31A2 R2.0
Date: Tuesday, March 27, 2012 Sheet 82 of 99
5 4 3 2 1
5 4 3 2 1

D D

6$QG67UXWK7DEOH
PD8300 @
BAT54CW
1 6WDWH 6 6 9''4
3
2

30 1.5V_ON 1 2 P_+1.5V_S5_10 6   2Q

1
PR8301 PC8300
49.9KOHM
2
0.033UF/16V
6   2Q
S3/S0
PD8301
BAT54CW
1 66   2Q
S5 S5 3
2

30,57,82,84,87,91 SUSB_EC# 2 1 P_+1.5V_S3_10 6WDWH 9775() 977


PR8302
39KOHM
6 2Q 2Q
1

PC8301
S0 1UF/6.3V
6 2Q 2IIᤡ+L=ᤢ
2

S3/S5 S3/S5
66 2II 2II
ᤡ'LVFKDUJHᤢ ᤡ'LVFKDUJHᤢ

C C

+0.75VS 5᤟ @
PJP8300
VTTREF 1MM_OPEN_5MIL
P_+1.5V_IN_S 1 1 2 2 AC_BAT_SYS
1

PC8306 PC8307
10UF/6.3V 10UF/6.3V

1
nbs_c0805_h57_000s
nbs_c0805_h57_000s PC8304 PC8303 PC8321
2

0.1UF/25V 1UF/25V 0.1UF/25V


1

PC8308 nbs_c0603_h37_000s

2
0.1UF/25V
2

PQ8301 EMB20N03V
nbs_powerpak_5p_011
5

P_+1.5V_VDDQ_20 PR8307
D
0Ohm
+1.5VS nbs_r0603_h24_000s
2 1 4
PU8300 G S
5
4
3
2
1

2
RT8207MZQW @

SHORT_PIN
2
VTTGND
VTTSNS
VTTREF
VDDQ

GND1

1
2
3

PR8308

PJ8302
23 0Ohm

f=308kHz
GND4
GND3
22
21
nbs_r0603_h24_000s
PC8309
5᤟
1

1
P_+1.5V_FB_10 GND2 0.1UF/25V
6 20
PR8318 P_+1.5V_S3_10 FB VTT P_+1.5V_VLDOIN_30 nbs_c0603_h37_000s PL8301
820KOhm P_+1.5V_S5_10
7
S3 VLDOIN
19
P_+1.5V_BOOT_20 2.2UH +1.5VO PJP8301
@
P_+1.5V_IN_S P_+1.5V_TON_10
8
S5 BOOT
18
P_+1.5V_UGATE_30
1 2 Imax=10A
1 2 9 17 Irat=8A 1MM_OPEN_5MIL
TON UGATE P_+1.5V_PHASE_30
58 DDR_PWRGD 10
PGOOD PHASE
16 2 1 1 1 2 2
+1.5V
PQ8303 EMB20N03V
LGATE

7*7*3
PGND

nbs_powerpak_5p_011
VDDP
VDD

5
CS

5᤟
D
1

PC8320
1

PC8310 1000PF/50V
11
12
13
14
15

1UF/25V 4 nbs_c0603_h37_000s
2

nbs_c0603_h37_000s G S
2

PR8321
P_+1.5V_VDDP_20
P_+1.5V_VDD_20

330KOHM
P_+1.5V_CS_10

1
2
3

P_+1.5V_PHASE_30 2 1
PC8311
2

2200PF/50V
P_+1.5V_LGATE_30 1 2 PR8320
B B
1

+5VSUS +5VSUS 1Ohm 5% 


nbs_r1206_h30_000s PCE8324
100UF/2.5V
1

@
SHORT_PIN

2
2

PR8309 PR8310
PJ8301

2.2Ohm 5% 2.2Ohm 5%
nbs_r0603_h24_000s
nbs_r0603_h24_000s
1

+5VSUS
VDDQ OCP=(PR8312/Rds,on)*10uA
1 2
VTT OCP=1.3A PR8312
5᤟
P_+1.5V_FB_10

PC8312 PC8313 24KOhm


1UF/25V 1UF/25V
nbs_c0603_h37_000s
nbs_c0603_h37_000s OCP=9.23A PC8314
2

680PF/50V
PR8324 @ 1 2
0Ohm
P_1V5_VSET_10 2 1

35 35FORVHWR38
1 2P_+1.5V_FBJP_10

FB=0.75V PR8313
1

DDR3(1.5V): PR8314=9.53K 10KOhm PC8315


1

0.1UF/25V
DDR3L(1.35V: )PR8314=12K PR8314
2

12KOhm
5᤟
2

+3VA_EC
+5VSUS
1

A A
1

PR8305 PR8304 PC8324 P_1V5_VSET_10 P_+5VSUS_VSET_10


2.2KOhm 2.2KOhm 1UF/25V
1

@ @ @ nbs_c0603_h37_000s PC8327 PC8326


2

PU8302 @ @ @
2

PR8323 @ UP6268AMA6 8PF/25V 8PF/25V


2

0Ohm 1 6
GND VCC P_1V5_VSET_10
30,60,88 SMB0_CLK 2 1 2 SCL OUT1 5
30,60,88 SMB0_DAT 2 1 3 4 P_+5VSUS_VSET_10 81
SDA OUT2
1

PR8322 @ PC8316 PC8317


0Ohm Address: 0x50 0.1UF/25V 0.1UF/25V
@ @
2

Title : +1.5V/+0.75VS
ASUSTek Computer INC. Engineer: shihhsien_yang
Size Project Name Rev
Custom UX31A2 R2.0
Date: Tuesday, March 27, 2012 Sheet 83 of 99
5 4 3 2 1
5 4 3 2 1

+1.8VS POWER SUPPLY


D D

PR8404
10KOhm @
nbs_r0201_h12_000s
1 2 P_1VS8_IN_S 1 2
1 2 +5VSUS

1
PC8405 PJP8400
10UF/6.3V 1MM_OPEN_5MIL
nbs_c0805_h57_000s

2
f=1MHz

P_1VS8_SHDN_10

2
PR8400 PU8400 PL8400
OCP=4A
10Ohm RT8015BGQW 2.2UH +1.8VO
Irat=6A
@ Imax=2A
6 PVDD LX1 3
4 P_1VS8_LX_S 1 2 1 2
+1.8VS

1
P_1VS8_VDD_10 LX2 1 2
7 VDD
PC8410  
9 P_1VS8_FB_10 PJP8401
FB

1
8 1MM_OPEN_5MIL
58 P_1VS8_PW RGD PGOOD

1
10 P_1VS8_COMP_10
1 2 P_1VS8_RC_10 1000PF/50V @

SHORT_PIN
PD8403 COMP
@BAT54CW 1 2P_1VS8_SHDNRT_101 PR8414 nbs_c0603_h37_000s PC8400 PC8403

2
C SHDN/RT 24KOhm 10UF/6.3V 10UF/6.3V C

PJ8400
2

2
PR8402 GND1 P_1VS8_SNB_S nbs_c0805_h57_000s
nbs_c0805_h57_000s
1 11 GND2
3 330KOHM 12 5
GND3 PGND

1
2 PQ8400 3 13 PC8416
D

2
2N7002 GND4 100PF/50V PR8410

1
PC8406 1Ohm 5%

2
2 1P_1VS8_RCEN_10 1 0.1UF/25V nbs_r1206_h30_000s
30,57,82,83,87,91 SUSB_EC#
G
2

2
PR8416 2 S
1

39KOHM PC8418
0.01UF/25V
2

PC8404
47PF/50V
1 2

PR8401 PR8406
12KOhm 15KOhm
1 2 1 2 P_1VS8_SENSE_10
B B

FB=0.8V

PT8401 TPC28T
+1.8VS 1

PT8402 TPC28T
GND 1

PT8403 TPC28T
GND 1
A A

Title : +1.8VS
ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
Custom UX31A2 R2.0
Date: Tuesday, March 27, 2012 Sheet 84 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : POWER_I/O_NVDD
ASUSTeK COMPUTER INC. NB1 Engineer: shihhsien_yang
Size Project Name Rev
Custom UX31A2 R2.0
Date: Tuesday, March 27, 2012 Sheet 85 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : POWER_+VGFX_CORE
ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
Custom UX31A2 R2.0
Date: Tuesday, March 27, 2012 Sheet 86 of 99
5 4 3 2 1
5 4 3 2 1

+0.8VS POWER SUPPLY


PR8736
10KOhm
D
nbs_r0201_h12_000s 30mil D
1 2 P_0VS8_IN_S 1 2
1 2
@
+3VSUS
PJP8700

1
PC8735 1MM_OPEN_5MIL
10UF/6.3V

2
f=1MHz nbs_c0805_h57_000s

2
P_0VS8_SHDN_10
PR8733
10Ohm OCP=4A
PU8701 PL8700
RT8015BGQW 2.2UH +0.8VO
@ Imax=3A

1
6 3 Irat=6A
PVDD LX1 P_0VS8_LX_S
4 1 2 1 2
P_0VS8_VDD_10 7
VDD
LX2 1 2
+0.8VS
9 P_0VS8_FB_10 5*5*3 PJP8701
FB

1
58 P_0V8_PWRGD 8 PC8734 1MM_OPEN_5MIL
PGOOD P_0VS8_COMP_10 P_0VS8_RC_10 1000PF/50V
COMP 10 1 2

1
2P_0VS8_SHDNRT_101 PR8735 nbs_c0603_h37_000s PC8738 PC8737 PC8740

SHORT_PIN
1 @

2
SHDN/RT 24KOhm 22UF/6.3V 22UF/6.3V 22UF/6.3V
GND1 2

PJ8705
PR8734 11 P_0VS8_SNB_S nbs_c0805_h57_000s
nbs_c0805_h57_000s
nbs_c0805_h57_000s
5᤟

2
GND2

1
330KOHM 12 5 PC8732
GND3 PGND

1
PC8736 13 100PF/50V
GND4

6
0.1UF/25V PR8737

2
PQ8701A 1Ohm 5%

2
30,57,82,83,84,91 SUSB_EC# 2 1P_0VS8_EN_RC_10 2 UM6K1N nbs_r1206_h30_000s
C C
1

2
PR8724
1

0Ohm PC8711

P_0VS8_LOSENSE_10
0.1UF/25V
@
2

PR8712=300K

2
PC8739
Chief River PR8720=4.99K PR8712 47PF/50V
300KOhm 1 2
VCCSA_SEL0 VCCSA_SEL1 +0.8VS(VCCSA)

1
L L PR8741 PR8740
0.9V 1KOhm 0Ohm
L H P_0VS8_FB_10 2 1 2 1
0.8V
H L 0.775V(0.8V) FB=0.8V

2
PR8732 @
H H PR8720 0Ohm
0.75V(0.8V) +3VSUS P_0VS8_SENSE_10
4.99KOhm 2 1
5᤟
VCCUSA_SENSE 6
PR8712=16K PT8719 TPC28T

1
Huron River PR8720=13K +0.8VS 1
P_0VS8_FB_RC_10
VCCSA_SEL0 VCCSA_SEL1 +0.8VS(VCCSA) PT8714 TPC28T
B GND 1 B

1
L L 0.9V PC8713
PR8713 PR8711 0.01UF/25V PT8716 TPC28T
L H 0.85V 100KOhm 3KOhm GND 1

2
H L 0.9V PT8720 TPC28T PT8717 TPC28T
2

2
P_0VS8_UV2_MOS_10 GND 1 +0.8VS 1
H H 0.85V
PT8715 TPC28T PT8718 TPC28T

3
GND 1 +0.8VS 1
PQ8701B
P_0VS8_UV2_BJT_10 5 UM6K1N

4
1

PC8722
PD8701 C 0.1UF/25V
BAT54CW PR8722 @
2

1 1KOhm
6 VCCSA_SEL0 B
3 2 1 P_0VS8_UV2_10 PQ8706
2 PMBS3904
6 VCCSA_SEL1

A A

Title : +0.8VS
ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
Custom UX31A2 R2.0
Date: Tuesday, March 27, 2012 Sheet 87 of 99
5 4 3 2 1
5 4 3 2 1

D D

AC_BAT_SYS

5᤟
PQ8801 PQ8802
A/D_DOCK_IN P0903BEA P0903BEA PR8806 1 2
nbs_powerpak_5p_011 nbs_powerpak_5p_011 10mOhm
3 P_19V_CHARGE_BOMB_SHAPE 3 nbs_r1508_h24_000s PC8866 @

S
S

P_CHG_PATH_19V_SHAPE 1000PF/50V

D
5 2 2 5 1 2
D

1 1 PD8803
SBR10U45SP5-13

G
G

0.1UF/25V

2
5᤟
4

4
1

PC8812

3
1

1
2

PJ8803

PJ8804
SHORT_PIN

SHORT_PIN
PC8805 PQ8803
2200PF/50V P0903BEA
1 2 nbs_powerpak_5p_011
@ @ 3

S
5 2

D
1

G
2

1
PC8858

4
1

PR8801 0.1UF/25V
1MOHM PR8809 @

2
4.02KOHM P_CHG_BATDRV_20 1 2
PR8859
1

1
PC8810 4.02KOHM
2

0.1UF/25V @
PJP8801

2
C PR8808 PC8811 1MM_OPEN_5MIL C
4.02KOHM 0.1UF/25V P_CHG_INPUT_SHAPE 1 1 2 2 AC_BAT_SYS
2 1 1 2

1


PQ8804 EMB20N03V
nbs_powerpak_5p_011
1

1
PC8808 PC8817 PC8816 PCE8801

5
P_CHG_REGN_20 2 1 0.1UF/25V 0.1UF/25V 1UF/25V 15UF/25V
D
nbs_c0603_h37_000s

2
+3VA PR8812

P_CHG_ACOK_10
P_CHG_ACDRV_20
P_CHG_CMSRC_20
P_CHG_ACP_10
P_CHG_ACN_10
@
1

100KOhm 4
PR8813 G S
1

100KOhm
2

2
PR8829 P_CHG_VCC_20

1
2
3
PR8845 100KOhm PR8843 P_CHG_RSENS_SHAPE
2

10KOhm 10KOhm
1

PSL8801 PL8801 PR8807


G

@ @
2

PU8800 6.8UH 10mOhm


2 1
3

S 2
1

1
5
4
3
2
1

1
A/D_DOCK_IN 30 AC_IN_OC# 0402 BQ24725ARGRR PC8804 Irat=4.5A nbs_r1508_h24_000s
D

1UF/25V P_CHG_LX_30 1 2 1 2
ACOK
ACDRV

ACP
CMSRC

ACN

BAT
1 2 nbs_c0603_h37_000s

2
PQ8810
GND3 22

1
PR8814 2N7002 21 PC8820
GND2
2

1
127KOhm P_CHG_ACDET_10 6 20 P_CHG_VCC_20 0.047UF/25V 
ACDET VCC
1

1
PQ8805 EMB20N03V
PR8815 PC8825 P_CHG_IOUT_10 7 19 P_CHG_LX_30 nbs_c0603_h37_000s PCE8802

nbs_powerpak_5p_011
2
IOUT PHASE

1
P_CHG_SDA_10 P_CHG_HG_30

PJ8801

PJ8802
20KOhm 0.1UF/25V PC8822 15UF/25V

SHORT_PIN

SHORT_PIN
8 SDA HIDRV 18

5
@ P_CHG_SCL_10 9 17 P_CHG_BST_30 1000PF/50V
D
2

2
SCL BTST
1

PC8801 P_CHG_ILIM_10 10 16 P_CHG_REGN_20 nbs_c0603_h37_000s


1

2
47PF/50V ILIM REGN

3
BATDRV

70 AC_IN P_CHG_LG_30 P_CHG_SNB_20


4 @ @
LODRV
2

2
1
GND1

PC8803 G S
SRN
SRP

1
1UF/25V PD8801
PSL8802 nbs_c0603_h37_000s BAT54CW PR8844 PR8805
2

1
2
3
2 1 10KOhm 1Ohm 5%
11
12
13
14
15

30,60,83 SMB0_DAT 0402 nbs_r1206_h30_000s


VREGN=6V @

2
PSL8803

2
P_CHG_BATDRV_20
P_CHG_SRN_10
P_CHG_SRP_10

P_CHG_LG_30

2 1
30,60,83 SMB0_CLK 0402
B B

2 1 @
5᤟
+3VA
PC8814 PJP8802
PR8820 0.1UF/25V 3MM_OPEN_5MIL
1

300KOhm PR8810 1 2 BAT 1 1 2 2 BAT_CON


1

PR8819 PC8802 10OHM


,OLPLW$ 100KOhm 0.1UF/25V nbs_r0603_h39_000s
@ 1 2
2
2

PC8813
PR8817 0.1UF/25V
6.8Ohm
2

nbs_r0603_h24_000s
1 2
1

PC8809
0.1UF/25V +3VACC
2

PR8828 SET

1
PR8816
100KOhm
40W: 0V =>0 OHM
45W: 0.4V =>14k
5᤟ 50W: 0.8V =>31.6k

2
30 ADAPTOR_SENSE
PR8842
65W: 1.2V =>56k
3RZHU/LPLW:

2
+3VA
PWRLIMIT#_EC 30
10Ohm 5%
nbs_r1206_h28_000s PR8828
75W: 1.6V =>93.1k
1 2 14KOHM 90W: 2.0V =>150k
1

PR8838 P_CHG_IOUT_10 P_CHG_IOUT_R_10 +5VS_PWR +5VS_PWR PQ8808B 120W: 2.4V =>270k

1
100KOhm 5 UM6K1N PD8802 P_CHG_VCC_20
BAT54CW PQ8809 150W: 2.8V =>560k
@
4
1

PU8801 A/D_DOCK_IN 2 PMBS3906


CHG_VCC 180W: 3.3V =>@
2

TS391CG-AF5-R PR8839 3 E C
A P_CHG_REFIN_10 1 5 100KOhm PWRLIMIT#_CPU 3,90 1 A
IN- VCC BAT
2
6

PR8837 2 PC8819 PR8841


2

330KOHM GND PQ8808A 0.1UF/25V 10KOhm PR8816 & PR8828 Close to U3001(EC) 2011_09_05
B
2

1 2 3 4 P_CHG_PWRLIMIT 2 UM6K1N @ @
2

IN+ OUTPUT
1

PC8831 PR8836
please check page 30,
1

1
1

0.1UF/25V 15KOhm PC8832 PC8834 PC8833


1

PC8835 0.1UF/25V 0.1UF/25V 1UF/25V there is no resistors connect to GPI7 pin


2

0.1UF/25V @ nbs_c0603_h37_000s
1

@
2

PR8840
10KOhm
Title : Charger
@ ASUSTeK COMPUTER INC. NB3 Engineer: POWER
1

Size Project Name Rev


Custom 1.0
UX Series
Date: Wednesday, April 11, 2012 Sheet 88 of 97

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : 3:B
ASUSTeK COMPUTER INC. NB1 Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 89 of 99
5 4 3 2 1
5 4 3 2 1

PR9008
2.2Ohm 5%
nbs_r0603_h24_000s
+5VS_PWR 1 2
PR9013

2
AC_BAT_SYS PC9003 0Ohm
1UF/25V 1 2
nbs_c0603_h37_000s PWRLIMIT#_CPU 3,88

1
2
PR9000 +5VS_PWR
470KOhm
P_CPUTR_CRG_10 PU9000

1
TS391CG-AF5-R

1
D D
P_CPUTR_IN-_10 1 5 PR9007
IN- VCC 100KOhm

3
PC9000 2 PQ9000B

6
A/D_DOCK_IN 4.7UF/25V PR9002 PR9001 GND UM6K1N

2
nbs_c0805_h57_000s 470KOhm 82KOhm 3 4 P_CPUTR_OUT_10 5
IN+ OUTPUT
2 1 1 2 2

4
PQ9000A

1
UM6K1N

P_CPUTR_IN+_10
PR9003

P_CPUTR_CR_10
470KOhm
5᤟

1
AC_BAT_SYS

PR9010

2
470KOhm

請遠離熱源! PR9004
470KOhm
PD9000
2 1 P_CPUTR_IN-_10

1SS355PT

3
PR9005 PR9010 PR9011 PQ9107 P_CPUTR_RD_10 2 1 PQ9002B
UM6K1N

2
UX series 2S BAT 62k @ @ @ PR9005
5
2 1

4
Other series 3S/4S BAT 75k 150k 100k UM6K1N 49.9KOhm
PR9006 PR9011 @
470KOhm 100KOhm

1
PC9001 1 2 P_CPUTR_RD_10
10UF/6.3V

VGA_Alert (GPIO9) pull low GPU 降 1/4 頻 5᤟


nbs_c0603_h37_000s

6
dGPU_PD pull low (GPIO12) GPU 降最低頻
PQ9002A
UM6K1N
2
C C

1
B B

A A

Title : HW_Throttle
ASUSTeK COMPUTER INC. NB1 Engineer: Power
Size Project Name Rev
C UX31A2 R2.0
Date: Tuesday, March 27, 2012 Sheet 90 of 99
5 4 3 2 1
5 4 3 2 1

SUSB#_PWR POWER SUSC#_PWR POWER


PQ9100
EMB20N03V
nbs_powerpak_5p_011
3 200mil +1.5VS 6A

S
5 2
+1.5V D

1
1 PC9100
0.1UF/25V

G
4

2
D PR9100 D
150KOHM 1%
P_1.5VSLS_RC_10 2 1
1 +12VS

PC9101
0.022UF/25V
2

PQ9101 PQ9103
EMB20N03V EMB20N03V
nbs_powerpak_5p_011 nbs_powerpak_5p_011
3 160mil +3VS 4A 3 120mil +3V 2A
S

S
5 2 5 2
D

D
+3VSUS +3VSUS
1

1
1 PC9102 1 PC9106
0.1UF/25V 0.1UF/25V
G

G
4

2
PR9104
PR9101 150KOHM 1%
150KOHM 1% P_3VLS_RC_10 2 1 +12V
P_3VSLS_RC_10 2 1 +12VS

1
C C
1

PC9107
PC9103 0.022UF/25V

2
0.022UF/25V
2

PSL9101 婳㒢⛐ PQ9102 㕩怲


2 1 +5VS_PW R
0603
PSL9101
PQ9102 PQ9104
EMB20N03V EMB20N03V
nbs_powerpak_5p_011 nbs_powerpak_5p_011
3 160mil +5VS 4A 3 40mil +5V 2A
S

S
5 2 5 2
D

D
+5VSUS +5VSUS
1

1
1 PC9104 1 PC9108
0.1UF/25V 0.1UF/25V
G

G
4

2
PR9102 PR9105
150KOHM 1% 150KOHM 1%
P_5VSLS_RC_10 2 1 P_5VLS_RC_10 2 1
+12VS +12V
1

1
B B
PC9105 PC9109
0.022UF/25V 0.022UF/25V
2

PQ9105 PQ9106
PUMD12 PUMD12
20mil 4 TR2
3 20mil +12VSUS 20mil 4 TR2
3 20mil
+12VSUS +12VS +12V
R2 R1 R2 R1

PQ9105_PIN5_10 5 2 PQ9106_PIN5_10 5 2
5%

5%
2

4
R1 R1
R2 R2
PRN9100A

PRN9100B
6 1 6 1
1 1MOhm

TR1 TR1
3 1MOhm

30,57,82,83,84,87 SUSB_EC# 30,57 SUSC_EC#

A A
5%

5%
6

8
PRN9100C

PRN9100D
5 1MOhm

7 1MOhm

<Variant Name>

Title : Load Switch


ASUSTeK COMPUTER INC. NB Engineer: shihhsien_yang
Size Project Name
UX31A2
Rev
Custom R2.0
Date: Tuesday, March 27, 2012 Sheet 91 of 98
5 4 3 2 1
5 4 3 2 1

$'᤟'2&.᤟,1
(0%19 (0%19 $&᤟%$7᤟6<6
%4 (0%39
$&'59
+026
60%᤟'$7 (0%19  %$7
/026
60%᤟&/. (0%19 
$&2.

$&᤟%$7᤟6<6
D D

$&᤟%$7᤟6<6

9$2 9$
57% 9$
9$2 9$
9$
+026
9686᤟21 (0%19  92
/026 9686
(0%19 
686&᤟(& (0%19 9

686%᤟(& (0%19 96

96᤟3:5
92
686%᤟(& 736 96
977᤟&38᤟3:5*'

92
C

686%᤟(& 57% 96 C

3᤟96᤟3:5*'
+026 92
9686᤟21 (0%19  9686
/026
(0%19 
686&᤟(& (0%19 9

686%᤟(& (0%19 96

92
57% 96
686%᤟(&
3᤟9᤟3:5*'
9686

686&᤟(& 380' 9


686᤟3:5*'
686%᤟(& 380' 96

B B

57%
+026
(0%19  9&25(
/026
96᤟3:5 (0%19 

$//᤟6<67(0᤟3:5*'
+026
95᤟69,'᤟$/(57
(0%19  9*);᤟&25(
95᤟69,'᤟'$7$
/026
(0%19 
95᤟69,'᤟&/.

570 92 9


9
9686 +026
(0%19  (0%19 96
9᤟21 /026
(0%19  96
A 686%᤟(& A

''5᤟3:5*'

<Variant Name>

Title : POWER_FLOWCHART
ASUSTeK COMPUTER INC. Engineer: Power
Size Project Name Rev
Custom UX31A2 R2.0
Date: Tuesday, March 27, 2012 Sheet 92 of 99
5 4 3 2 1
5 4 3 2 1

AC_BAT_SYS AC_BAT_SYS 45,80,81,83,88,90

BAT BAT 88

D D
+3VAO +3VAO 81

+5VA +5VA 26,81

+3VA +3VA 7,20,27,30,56,57,60,69,70,81,88

+5VAO +5VAO 81

+5VSUS_PCH +5VSUS_PCH 26,27

+5VSUS +5VSUS 26,30,31,56,69,80,81,82,83,84,91

+5V +5V 57,63,91

+5VS +5VS 20,27,31,38,46,48,50,57,63,91

+3VSUS +3VSUS 6,20,21,22,24,25,26,27,28,45,53,58,81,87,91

+3V +3V 3,24,31,44,53,57,63,91

+3VS +3VS 7,14,20,21,22,23,24,25,26,27,28,30,31,45,46,48,50,51,53,56,57,58,63,91

+12VSUS +12VSUS 26,81,91

+12V +12V 91

+12VS +12VS 21,28,48,91


C C

+1.8VS +1.8VS 6,26,57,84

+0.75VS +0.75VS 13,57,83

+1.5V +1.5V 4,13,14,15,19,57,83,91

+1.5VS +1.5VS 3,6,26,53,57,83,91

+VGFX_CORE +VGFX_CORE 6,57,80


B B

+VCORE +VCORE 6,57,80

+1.05VS +1.05VS 3,6,7,22,26,27,57,80,82

A/D_DOCK_IN A/D_DOCK_IN 56,60,88,90

A A

<Variant Name>

Title : POWER_SIGNAL
ASUSTeK COMPUTER INC. NB Engineer: shihhsien_yang
Size Project Name Rev
Custom UX31A2 R2.0
Date: Tuesday, March 27, 2012 Sheet 93 of 99
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : POWER_FLOWCHART

ASUSTeK COMPUTER INC. NB Engineer: Morris/Sting


Size Project Name Rev
Custom UX31A2 R2.0
Date: Tuesday, March 27, 2012 Sheet 94 of 99
5 4 3 2 1
5 4 3 2 1

[U36SD] R1.1
1. Change source of PQ9102 and PQ9104 from +5VSUS to +5VSYS p91
2. transform pin1,4,7,10 trace to +1.7v_lan p34
3. WLAN clk_req1 follow u36jc pull low p21
4. ALC269 pin9 trace to +3vsus for leakage current p36
5. EC PIN3 is NC p30
6. Add ESD protect part for HDMI p48
7. Add capacitance for EMI request on H_CPUPWRGD p25

D 8. Change C3404 trace from GND_LAN to GND p34 D

9. Follow U36JC CRT solution p46

C C

B B

A A

Title : 6\VWHP+LVWRU\
ASUSTeK COMPUTER INC. NB Engineer:
Size Project Name Rev
C 8;$
Date: Tuesday, March 27, 2012 Sheet 95 of 99
5 4 3 2 1
5 4 3 2 1

[M61JA] R1.0 => R1.1


1. Follow E.E RC delay
+5v R9107 100K change to 68K
+3v R9106 200K change to 121K
D +1.5v R8306 49.9K change to 68K D

+5VS R9104 200K change to 68K


+3VS R9103 200K change to 121K
+1.8VS R8401 33.2K change to 121K
+1.5VS R9102 470K change to 390K
+1.05VS R8252 39K change to 200K
+0.75VS R8312 0 change to 2.49K C8310 0.1U change to 2.2U

2.VR_VID0~2 pull high 1K VR_VID6 pull low 1K.


3.U8401 RT8015A change to RT8015B
4.Reserve GVR_VID0~VID6 pull high and low resistor R8627~R8633
5.Reserve R8517~R5720 pull high & pull low risistor for MCP_CORE_VID
C C
6.page86 component option change to ARD (CFD no stuff)
7.R8004 option change to CFD & R8049 change to ARD(For IMON)
8.Change RN8801A RN8801B(layout request)
9.R8517 R8519 change to stuff
10.R8406 13K change to 12K
11.CE8005 no stuff , CE8007 stuff
12.C8403 C8406 size 0603 change to 0805
13.R8213 R8305 ohm change to 2.2 ohm
14.R8621~R8633 stuff 1K ohm

B
15.R8512 change form 200K to 33K ohm B

16.VTT_PCH component option change to CFD


17.Delete U8502 & GPU_PWRON signal change to GPU_PWRON_1.8VSG_&_3.3VSG
18.L8601 1uH => 0.56uH , C8608 0.01uF/50 => 0.01uF/16V , R8621 43K => 36K , C8617 =>0.1uF/16V 1uF/10V ,
C8607 68pF/50V => 33pF/50V , R8625 10K => 18.7K , R8613 3.6K => 4.02K
19.R8057 change form 10K to 2.05K
20.Add Q8007 & Q8008 form thermal issue

A A

Title : 6\VWHP+LVWRU\
ASUSTeK COMPUTER INC. NB Engineer:
Size Project Name Rev
Custom 8;$
Date: Tuesday, March 27, 2012 Sheet 96 of 99
5 4 3 2 1
5 4 3 2 1

ER
001 Page 13 & 14 : add +0.75VS de-coupling capacitors for channel B by samsung simulation recommand , and add +1.5V de-coupling capacitors around U1404 by samsung simulation recommand
002
003
004
Page
Page
Page
65 : remove U6511~14, U6516
31 : change J3101 to 12G183000403 and add PWR_SW
46 : change J4601 to 12019-00020000
ˣ
PWR_LED function on Keyboard
005 Page 48 : change J4801 to 12022-00013700
006 Page 70 : remove SW7001
007 Page 69 : change J6901 to 12013-00011600
008 Page 53 : change J5303 to 12003-00020700
009 Page 30 : swap EC GPE0 and GPH4 for EC request
010 Page 30 : +3VA_ON pull low
011 Page 30 : add R3002 for without Light_sensor system
012 Page 30 : unmount R3084, mount R3083 for S4/S5 EC power down
013 Page 21,68,69 : remove about FL1009 circuit
D 014 Page 06 : modify R0617,R0618 to 1K follow intel DG D

015 Page 60 : change J6001 to 12014-00101000 for MP


016 Page 28 : change U2801 to 05006-00010300 (64M)
017 Page 56 : add R5640 for PWR_LED# current limit
018 Page 24,25 : change (H_SNB_INV#) AV10 to AY1 for following VC circuit.
019 Page 69 : add +5V_USB2 discharge for AI-charger function fail on iPhone 4S
020 Page 56 : Change R5604 size from 0201 to 0402.
021 Page 23 : Reserve 5pF cap. of RGB signals for EMI suggestion.
022 Page 45 : Reserved 8pF cap. to +3VS_LCD & +3VSUS for RF suggestion.
Page 45 : Reserved 5pF cap. to G & D sides of Q4501 for RF suggestion.
Page 45 : Reserved 5pF cap. to G & D sides of Q4501 for RF suggestion.
Page 45 : Reserved 0.1pF cap. to AC_BAT_SYS_INV_CON for RF suggestion.
Page 45 : Changed R4503 to L4514 for RF suggestion.
Page 45 : Colay USB_PP2 0 ohm & choke for RF suggestion.
Page 13 : Add cap. to +1.5V for RF suggestion.
Page 14 : Add cap. to +1.5V for RF suggestion.
Page 15 : Add cap. to +1.5V for RF suggestion.
Page 48 : Colay HDMI ohm & choke for RF suggestion.
Page 50 : Reserved cap. to SMB1_CLK_S for RF suggestion.
Page 51 : Reserved cap. to +3VS for RF suggestion.
Page 53 : Reserved cap. to +3VAUX_WLAN for RF suggestion.
Page 70 : Reserved cap. to pin 4 of Q7003 for RF suggestion.
Page 70 : Reserved cap. to pin 4 of Q7003 for RF suggestion.
Page 63 : Reserved cap. to +3V for RF suggestion.
Page 63 : Reserved cap. to net of for RF suggestion.
023 Page 20 : Reserved R2009 for RTC battery change type.
024 Page 26 : Deleting R2606 for DDR3L power change path.
Page 53 : Deleting R5302 for DDR3L power change path.
025 Page 28 : Add cap. to pin 5~8 of SPI ROM for RF suggestion.
026 Page 20 & 51 : Add SATA_TX1 net to SSD for SSD support RAID .
027 Page 56 : Change R5609 and reserve C5624 for DC jack change size.
C
028 Page
Page ˣ
26 : Change resistor value of R2630 to 511K ohm and change size from 0201 to 0402 for reducing power consumption.
70 : Change resistor value of R7004 R7005 to 200K ohm for reducing power consumption.
C

029
030
Page
Page
Page
ˣ ˣ
56 : Change resistor value of R5602 to 200K ohm for reducing power consumption.
ˣ ˣ
25 : Change R2529 R2530 R2531 for following sedding schematic design.
ˣ ˣ
46 : Change C4602 C4604 C4606 cap. value to 10PF and L4601 L4602 L4603 for EMI suggestion & EA measure pass.
Page 24 : Change R2428 resistor value to 39 ohm for EA measure pass.
Page 69 : Delete RN6916 and add L6901 for EMI suggestion.
031 Page 24 & 45 & 63 : Change USB port2 & port3 to port 8 & port 9 for BIOS suggestion.
032 Page 69 : Add R6905 & C6901 for USB problem.
033 Page 27 : Change power plane of VCCDSW3_3 for supporting hybrid sleep mode.
034 Page 51 : Add JP5101 for measurement.
035 Page 63 : Add 0.1UF cap. to +3VS & +5V for RF suggestion.
036 Page 45 : Reserve 0.1UF cap. to BUF_PLT_RST# & TPanel_INT#_C for EMI suggestion.
Page 31 : Reserve 0.1UF cap. to TP_DAT & TP_CLK for EMI suggestion.
Page 45 : Add L4518 to +3VS_LCD for EMI suggestion.
037 Page 14 & 15 : Change C1416 & C1501 cap. value from 8PF to 0.1UF for RF suggestion.

PWR modify
Page 88 : Updating CHG IC to BQ24725A
Page 88 : Add shut down sche.
Page 90 : Add HW_throttle sche.
Page 90 : Add PR8107 for WLAN noise.
Page 83 : Delete PCE8301 for WLAN noise.
Page 83
Page 83
Page 83
:
:
:
ˣ
Change PL8300 to 2.2uH for WLAN noise.
Add PC8326 PC8327 for RF suggestion.
Add PR8321 to 330k
Page 83 : Change PR8314 to 9.53k
Page 60 & 90 : Change BOM
Page 81 & 90 : Change BOM & sche. for power design ip sche change.
Page 81 & 90 : Change BOM PCE8101 to 220uF, and PR9005 to 49.9k ohm
B B

PR
001 Page 03 : Change U0303 to 06G004753010 for CR sche.
002 Page 44 : Change JDEBUG1 to 12G18340120R
003 Page 56 : Add a new lid sw for touchpanel using. (Panel PCB length change)
004 Page 30 : Reserved 0.1UF to light_sensor.
005 Page 31 : Change 6 pin to 8 pin for TP changing.
006 Page 21 : Change SMBus and INT for TP using.
007 Page 45 : Change Touch Panel pin define.
008 Page 56 : Change control method of charger led.
009 Page 31 : Add C3114 for RF suggestion.
010 Page 31 : Add and reserve the old 6 pins con and delete +5VS_TP.
011 Page 63 : Add 8PF cap. to +5VS for RF suggestion.
012 Page 53 : Add R5306 and Pull high to +3VSUS for intel smart card function using.
013
014
Page
Page
44
45
:
: ˣ ˣ
Change pin define for footprint vs datasheet aren't the same.
Add C4570 C4501 C4504 Cap. for RF suggestion.

PWR modify
Page 81 : Add PC8131, PC8132
Page 83 : Add PC8317 / P8316 / PR8305 / PC8305
Page 83 : Change PR8314=>12k
Page 88 : Update Adaptor voltage table
Page 84 : Change PL8400 BOM
Page 87 : Change PL8700 BOM
Page 83 : PR8304 & PR8305 pull high to +3VA_EC
Page 88 : 
PR8810 & PR8817 change 10ohm/0603 to 0ohm/0603.
Page 88 : PR8838 change 95.3kohm/0402 to 100kohm/0402.

A A

Title : 6\VWHP+LVWRU\
ASUSTeK COMPUTER INC. NB Engineer:
Size Project Name Rev
Custom 8;$
Date: Tuesday, March 27, 2012 Sheet 97 of 99
5 4 3 2 1
5 4 3 2 1

AC-IN Mode M52J Power On Sequence Diagram Rev. 0.31


Reset
Logic
(RC)
P.32
PWR_SW# 8 Power On

EC_RST#
D Button D

2
ME_AC_PRESENT 7
+3VA EC ME_SusPwrDnAck 4 ME_PM_SLP_M#
AC_BAT_SYS PM_PWRBTN# 9 ME_PM_SLP_LAN# 10 to EC
+5VA 1 +3VA_EC IT8512E
MAX17020 PM_RSMRST# 6 12 to power
(+IT8301E) PM_SUSC#
P.81 ME_PWROK 17
SLP_S4# 11 to EC
PM_SUSB#
PM_PWROK 27
ME_PWROK SLP_S3# 12 to EC
3 VSUS_ON LAN_RST#
DRAMPWRGD
+3VSUS PCH_PWROK PLT_RST#
+5VSUS SYS_PWROK

BUF_PLT_RST#

H_DRAM_PWRGD
5 SUS_PWRGD CPU_PWRGD

SUSB_EC#
SUSC_EC#
ME_SLP_M_EC#
+12VSUS

H_CPUPWRGD
P.81
PCH
23 26 16 24
+1.5V

CPU_VRON
VRM_PWRGD
ALL_SYSTEM_PWRGD

ME_+VM_PWRGD
+3V 15 14
+5V
C
14 SUSC_EC# +12V 13 29 30 28 C

+VGFX_CORE 22 GFX_PWRGD

RSTIN#

DRAMPWROK
VCCPWRGOOD_0
VCCPWRGOOD_1
19 GFX_VR_ON 19 GFX_VR_ON

+0.75VS
+1.5VS PWROK PWROK PWROK
15 SUSB_EC# +1.8VS Logic1 Logic2 Logic3
+3VS P.92 P.92 P.92
+5VS
+12VS H_VTTPWRGD 21 CPU
VTTPWRGOOD

18 SYSTEM_PWRGD

20 +VTT_CPU_PWRGD
+VTT_CPU

B B

12 13
ME_PM_SLP_LAN# ME_SLP_M_EC#
+VM_OK
+1.05VM_LAN +1.05VM Logic
P.84

Delay +VTT_PCH
15 SUSB_EC# Logic

+3VSUS

12 ME_PM_SLP_LAN# +3VM Power On Sequence


IMVP6.5
+VCORE
25 CLK_PWRGD CLK Gen.
CK505
1 30
A A

Title : 32:(56(48(1&(
ASUSTeK COMPUTER INC Engineer: shihhsien_yang
Size Project Name Rev
C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 98 of 99
5 4 3 2 1
5 4 3 2 1

AC-IN Mode
1 +3VA/+5VA/+3VA_EC
M52J Power-On Sequence
(to EC) 2 EC_RST# Timing Diagram Rev.0.31
(EC to power) 3 VSUS_ON
+3VSUS/+5VSUS (pull up to +3VSUS)

(PCH to EC) 4 ME_SusPwrDnAck


D T0=20ms(spec.>=10ms) D

(power to EC) 5 SUS_PWRGD


T1<200ms(check)
(EC to PCH) 6 PM_RSMRST#

(EC to PCH) 7 ME_AC_PRESENT


(falling edge)
(to EC) 8 PWR_SW#
T2=50ms
(EC to PCH) 9 PM_PWRBTN#

(PCH to EC) 10 ME_PM_SLP_M#

(PCH to EC) 11 PM_SUSC#

12 PM_SUSB#/ME_PM_SLP_LAN#
(PCH to EC) (PCH to power)
+1.1VM_LAN
C C

(EC to power) 13 ME_SLP_M_EC#


+1.1VM/+3VM

(EC to power) 14 SUSC_EC#

+1.5V/+3V/+5V

(EC to power) 15 SUSB_EC#


+0.75VS/+1.5VS//+1.8VS/+3VS/+5VS

(power to EC) 16 ME_+VM_PWRGD


T3=2ms(spec.>=1ms)
(EC to PCH) 17 ME_PWROK

18 SYSTEM_PWRGD
+VTT_CPU
B B

(CPU to power) 19 GFX_VR_ON


T4=1.25ms
20 +VTT_CPU_PWRGD/ 21 H_VTTPWRGD
(power to CPU)
GFX_VID

+VGFX_CORE
T5=60us(typ.)
22 GFX_PWRGD
(power to EC)
23 ALL_SYSTEM_PWRGD
T6=110ms (spec.>=99ms)
(EC to power) 24 CPU_VRON
T7=10~100us
+VCORE

25 CLK_PWRGD
(inversion of CLK_EN#) T8=3~20ms
A
(power to EC) 26 VRM_PWRGD A

(EC to PCH) 27 PM_PWROK


T9=10ms
(PCH to CPU) 28 H_DRAM_PWRGD
Title : 3RZHU2Q7LPLQJ
(PCH to CPU) 29 H_CPUPWRGD <OrgName> Engineer: shihhsien_yang
Size Project Name Rev
(PCH to CPU) 30 BUF_PLT_RST# C 8;$ R2.0
Date: Tuesday, March 27, 2012 Sheet 99 of 99
5 4 3 2 1
5 4 3 2 1

D D

UX31A R2.0 SKU table

BOM CPU Memory TPM SSD PANEL


Option /CPU /MEM /TPM
60-NIOMB160*-B0* I7-3517U Elpida 4G DDR3LRS-1600 /TPM A-DATA/XM11-256GB-V2 CMO/N133HSE-EA1
60-NIOMB1C0*-A0* I7-3517U Elpida 4G DDR3LRS-1600 N/A
60-NIOMB1A0*-B0* I5-3317U Elpida 4G DDR3LRS-1600 /TPM
60-NIOMB180*-B0* I5-3317U Elpida 4G DDR3LRS-1600 N/A A-DATA/XM11-128GB-V2 CMO/N133HSE-EA1
60-NIOMB1B0*-A0* I7-3667U Micron 4G DDR3LRS-1600 /TPM
60-NIOMB1D0*-A0* I7-3517U Elpida 4G DDR3-1600 N/A SANDISK/SDSA5JK-128G CPT/CLAA133UA03 CW

1. CPU:
INT I7-3667U 2G/4M : 01001-00173400 (MP)
INT I7-3517U 1.9G/4M : 01001-00172300 (MP)
INT I5-3317U 1.7G/3M : 01001-00172400 (MP)

2. PCH:
INT PANTHERPOINT HM76 : 02001-00051100 (MP)

3. MEM: Differential memory DIMM & Vendor have the differential DIMM_SEL[2:0] defined on board memory.
Elpida 4G DDR3LRS 1600 256M*16 : 03006-00051300
C Elpida 4G DDR3 1600 256M*16 : 03006-00050800 C

Micron 4G DDR3LRS 1600 256M*16 : 03006-00051100

DDR3L_1600 Micro ELPIDA


DIMM_SEL0 L H
DIMM_SEL1 L H
DIMM_SEL2 H H

DDR3_1600 Hynix ELPIDA


DIMM_SEL0 H L
DIMM_SEL1 L H
DIMM_SEL2 H H

B B

A A

Title : 6.87DEOH5
ASUSTeK COMPUTER INC. Engineer: shihhsien_yang
Size Project Name Rev
Custom 8;$ R2.0
Date: Wednesday, April 11, 2012 Sheet of 99
5 4 3 2 1

You might also like