DIGITAL CONTROL OF POWER CONVERTERS

2 Digital controller design

 Outline

▪ Review of frequency domain control design

 Performance limitations
▪ Discrete time system analysis and modeling
▪ Digital controller design

Digital control of Power Converters

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 Review of frequency
domain control design
 Response of linear systems
Discrete system Analog system

{rk} {ek} {uk} {yk} r(t) e(t) u(t) y(t)

R(z) G(z) R(s) G(s)
- -

1
1

0.8
0.8

0.6
0.6

0.4
0.4

0.2 0.2

0 0

-0.2 -0.2

-0.4 -0.4

-0.6 -0.6

-0.8 -0.8

-1 -1
0 1 2 3 4 5 6 0 1 2 3 4 5 6 7

Digital control of Power Converters

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 Review of Continuous system design

u y Frequency response
G(s)
A

|G(jw)| B
A B

C
C
G(jw) w

Digital control of Power Converters

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 Ideal controller

z(t) disturbances

r(t) e(t) u(t)

y(t)
f-1(o) f(o)
-

y  f (u)  z
Conceptual controller

y  f ( f 1 (r  z ))  z

yr

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 Realization of a conceptual controller

z(t) disturbances

r(t) u(t)
h(o) f(o) y(t)
-
f(o)

Conceptual controller The loop implements an approximate inverse

of f o, i.e. u = f r, if

r - h-1u  r

Digital control of Power Converters

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 Realization of a conceptual controller

Open loop controller

r(t) u(t)
h(o) f(o) y(t)
-
f(o)

Feedback controller

r(t) y(t)
R(s) G(s)
-

Digital control of Power Converters

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 Review of Continuous system design
1
e r error
?? 1  RG
r(t) e(t) u(t) y(t)
1
R(s) G(s) S S :Nominal sensitivity
- 1  RG

RG:Loop Gain
|RG(jw)|

|G(jw)|
|R(jw)| 1
e( jw)  r ( jw)
1  RG( jw)
w
wc

|S(jw)|

Bandwidth  |RG(jwc)|=1

Digital control of Power Converters

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 Review of Continuous system design
1
e r error
?? 1  RG
r(t) e(t) u(t) y(t)
r
R(s) G(s) e
- w=0.1wc |e| 0.1r

e
|RG(jw)|
w=wc |e| 0.7r
|G(jw)|
|R(jw)| e
w=10wc |e| r
w
wc

|S(jw)| The control is useful

bellow the loop gain
wc jw
For RG ( s )  e( jw)  r ( jw) bandwidth
s jw  wc
Digital control of Power Converters
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 Review of Continuous system design

z(t) disturbances 1
error e z
?? 1  RG
r(t) e(t) u(t)
y(t) z
R(s) G(s) e
- w=0.1wc |e| 0.1r

z
e
|RG(jw)|
w=wc |e| 0.7r
|G(jw)| z
|R(jw)| e
w=10wc |e| r
w
wc

|S(jw)| The same effect of

feedback for disturbances

Digital control of Power Converters

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 Review of Continuous system design

▪ The higher the bandwidth the better the performance

z(t)
??
r(t) e(t) u(t)
y(t)
R(s) G(s)
-

|RG(jw)|

w
wc

|S(jw)|

Digital control of Power Converters

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 Review of Continuous system design

z(t) disturbances
??
r(t) e(t) u(t) output
y(t)
R(s) G(s) RG
- y r
1  RG

Control effort
R
u r
|G(jw)|
u
1  RG
|R(jw)|
1
w Below wc u r
G

High values of u can lead to

saturation!!

Digital control of Power Converters

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 Review of Continuous system design

??
r(t) e(t) u(t) referene
y(t)
R(s) G(s) RG
- y r
n(t) 1  RG
noise Noise
RG
y n
1  RG
Noise and reference are amplified in the same way

Limit the bandwidth to limit the effect of noise

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 Stability margins and sensitivity peak

▪ If G0 is stable
▪ Stability is assured if R·G does not enclosed -1 Z=N+P

Gain and Phase Margins Peak Sensitivity

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 Stability margins

The gain margin, Mg, and the phase margin Mf are defined as:

Peak sensitivity:
S0 is a maximum at the frequency where G0(jw)R(jw) is
closest to the point -1. The peak sensitivity is thus 1/

1
S ,
1  GR

Digital control of Power Converters

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 Stability margins in Bode diagrams

r(t) y(t)
R(s) G(s)
-

G0 R

Useful
Control
Action

Digital control of Power Converters

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 Performance limitations: Bode’s Integral constraint

r(t) y(t)
R(s) G(s)
-

for an open loop stable plant, the integral of the 

logarithm of the closed loop sensitivity is zero; i.e. 0 ln | S0( jw) | dw  0
2
0 +

 1
S.2frsp
5
-
 10
 10
0.01 0.1 1 10 100 Equal areas
0.01  0 100
S.1frsp

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 Performance limitations

r(t) y(t)
R(s) G(s)
-

Sensitivity function
Loop gain
100
5
 1.32110

 10
50  1
S.1frsp

 1 20
S.2frsp

0
 30

 40
 40
 50 0.01 0.1 1 10 100
0.01 0.1 1 10 100  0
0.01 S.1frsp 100

Improved performance
Worse performane
at low freq
around bandwidth
Digital control of Power Converters
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 Performance limitations

▪ Physical interpretation

log S
0 ln | S0( jw) | dw  0

Sensitivity
dirt

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 Effect of RHP zeroes and poles

r(t) y(t)
R(s) G(s)
-

|RG(jw)| |RG(jw)|

fRHPZ freq fRHPP freq

½ fRHPZ 2 fRHPZ

To avoid large frequency domain sensitivity peaks it is necessary to limit the

range of sensitivity reduction to be:
(i) less than any right half plane open loop zero
(ii) greater than any right half plane open loop pole.
Digital control of Power Converters
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 Performance limitations

This begs the question - “What happens if there is a right half plane
open loop zero having smaller magnitude than a right half plan open
loop pole?”
Clearly the requirements specified on the previous slide are then
mutually incompatible. The consequence is that large sensitivity
peaks are unavoidable and, as a result, poor feedback performance is
inevitable.

Digital control of Power Converters

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 Outline

▪ Review of frequency domain control design

 Performance limitations
▪ Discrete time system analysis and modeling
▪ Digital controller design

Digital control of Power Converters

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 Modelling of discrete systems
iL L
+
vo(t)
iC i
+
Driver
R H(s)
ve C R vs
v(t)
- -
{vk} v (t)
PWM ADC
{dk} {ek} {vk}
DPWM R(z)
{vref,k}
processor
{dk}
{dk} {vk}
G(z)

Inside the digital processor the system input and output simply
appear as sequences of numbers
It therefore makes sense to build digital models that relate a discrete
time input sequence, {e(k)}, to a sampled output sequence {d(k)}.
Digital control of Power Converters
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 Sampling and Aliasing

Consider the signal HF

if the sampling period  is chosen equal to 0.1[s] then

LF

the high frequency component appears as a signal of low frequency (here

zero). This phenomenon is known as aliasing.

Digital control of Power Converters

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 Aliasing effect when using low sampling rate

 is chosen equal to 0.1s

▪ Rule of thumb sampling rate should be 5 to 10 times the bandwidth

of the signals

Digital control of Power Converters

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 Signal Reconstruction

{u[k]}

Sample and hold

{u[k]}

DPWM

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 Signal reconstruction

▪ Sample and Hold vs PWM

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0
0 2 4

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 Typical discretization of G(s)

Zero-order
Hold Sampler
HO G(s)
G(z) Matlab function:
C2D(G(s),TS,’zoh’)
Power
PWM ADC
converter

The zero order hold is used to model the PWM

Digital control of Power Converters

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 Discrete systems basics

sequences Continous functions

{uk} {vk} u(t) v(t) v (t)

G(z) u(t) G(s)

{uk}
{vk}

Integral
Discrete Integral

t
v(k  1)  v(k )  Ts ·u(k ) v(t )  v(t0 )   u ( )d
t0

Digital control of Power Converters

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 Z-Transform

Z-transform for discrete time signals is equivalent to the Laplace

transform (s) for continuous systems.
Consider a sequence {y[k]; k = 0, 1, 2, …]. Then the Z-transform pair
associated with {y[k]} is given by

Z-transforms have a similar property than the S-transform for discrete time models,
namely they convert difference equations (expressed in terms of the shift operator
q) into algebraic equations.

Digital control of Power Converters

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 Discrete systems basics

sequences Continous functions

u(t) {uk}
{uk} {vk}

k·Ts
Continous Integral
Discrete Integral

t
v(k  1)  v(k )  Ts ·u(k ) v(t )  v(t0 )   u ( )d
t0

Continous derivative
Discrete derivative
u(t) {uk}
u (k )  u (k  1) du (t )
v(k )  v(t ) 
Ts dt
k·Ts

Digital control of Power Converters

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 z-transform vs s-tranform

 x(t) {xk} 

X ( z)  
k 
xk ·z  k X ( s)   x(t )·e s ·t dt


k·Ts

t
v(k  1)  v(k )  Ts ·u(k ) v(t )  v(t0 )   u ( )d
t0

Z-transform s-transform

1 1
z·V ( z )  V ( z )  Ts ·U ( z ) 
V ( s)  V (t0 )  U ( s)
s s
Z-transfer function s-transfer function

Ts 1
V ( z)  U ( z) V ( s)  U ( s)
z 1 s
Digital control of Power Converters
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 Z- transfer function

Ignoring the initial conditions, the Z-transform of the output Y(z) is

related to the Z-transform of the input by Y(z) = Gq(z)U(z) where

Gq(z) is called the discrete (shift form) transfer function.

Digital control of Power Converters

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 An interesting observation

The Z-transform of a unit pulse is 1 U ( z )  1·z 0

Y(z) = Gq(z)U(z)

{uk} {yk}
Gq(z)

G(z) is the z transform of the output when the

Input is a unit pulse
{uk}={1,0,0…}
{yk}

Digital control of Power Converters

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 Example of a buck converter

iL L
+
iC i
+
Driver
R H(s)
ve C R vs
vo(t)
- -
PWM
{dk} {ek} e (t)
vref(t)
DPWM R(z) ADC

{dk}
{ek} e (t)

{dk} {ek}
G(z)

Digital control of Power Converters

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 Example of a buck converter
L
+
iC iL i
+
Driver
R H(s)
ve C R vs
vo(t)
- -

{dk} {ek} e (t)

vref(t)
DPWM R(z) ADC

e (t)
{dk} {ek}
{dk} DPWM G(s) H(s) ADC {ek}

{dk} {ek}
G(z)

Digital control of Power Converters

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 Example of a buck converter

iL L
+
vo(t)
iC i
+
Driver
R H(s)
ve C R vs
v(t)
- -
{vk} v (t)
PWM ADC
{dk} {ek} {vk}
DPWM R(z)
{vref,k}
{dk}
{dk} {vk}
G(z)

Digital control of Power Converters

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 Example of a buck converter
iL L
PWM +
vo(t)
iC i
+
Driver
R H(s)
ve C R vs
v(t)
- -
{vk} v (t)
ADC
{dk} {ek} {vk}
DPWM R(z)
{vref,k}
v (t)
{dk} {vk}
{dk} DPWM G(s) H(s) ADC {vk}

{dk} {vk}
G(z)

Digital control of Power Converters

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 Example of a buck converter
iL L
PWM +
vo(t)
iC i
+
Driver
R H(s)
ve C R vs
v(t)
- -
{vk} v (t)
ADC
{dk} {ek} {vk}
DPWM R(z)

{dk} {vk}
DPWM G(s) H(s) ADC

discretization

{vk} {ek} {dk} {vk}

R(z) G(z)
-

Digital control of Power Converters

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 Digital controller design

Digital control of Power Converters

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 Example of a buck converter
Analog design Discrete design

1 Design the analog controller 1 Discretize the converter

vref(t) vo(t) {vk}
R(s) G(s) DPWM G(s) H(s) ADC

{dk} {vk}
G(z)

2 Design the discrete controller

2 Discretize the analog controller
{ek} {vk}
R(s) R(z) R(z) G(z)
-

Digital control of Power Converters

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 Discrete controllers design

Analog design Discrete design

▪ Good knowledge of
averaged models for Use this kwoledge as basics and
converters push beyond with digital control
▪ Complete design in the
frequency domain?
▪ Good design practices
and experience

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 Discrete controllers design
Analog design

1 Design the analog controller vref(t) vo(t)

|RG(jw)| R(s) G(s)
-
|G(jw)|
|R(jw)|
wi s
w R( s )  ·(1  )
wc s wz

2 Discretize the controller = How to map s poles to z?

 There are different methods:
zoh  Zero order hold or step invariant
foh  First order hold
matched  Pole/zero match
N/A  Backward Euler, derivative operator or rectangular integration
Recommended by Duan,
APEC 1999
tustin  Blinear, Tustin or trapezoidal integration
Matlab C2D
Digital control of Power Converters
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 Example

vref(t) vo(t)
R(s) G(s)
-

discretize

vref(t) v (t)
ADC R(z) ZOH G(s)
-

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 Example
|RG(jw)| vref(t)
fc= 1kHz vo(t)
|G(jw)| R(s) G(s)
|R(jw)| -
Ts= 100us
freq
fc

FOH ZOH

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 Example
|RG(jw)| vref(t)
fc= 1kHz vo(t)
|G(jw)| R(s) G(s)
|R(jw)| -
Ts= 100us
freq
fc

tustin Prewarp (1khz)

Digital control of Power Converters

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 Example
|RG(jw)| vref(t)
fc= 1kHz vo(t)
|G(jw)| R(s) G(s)
|R(jw)| -
Ts= 100us
freq
fc

Matched

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 Example: Sampling Time effect
|RG(jw)| vref(t)
fc= 1kHz vo(t)
|G(jw)| R(s) G(s)
|R(jw)| -
freq
fc

ZOH Ts= 100us ZOH Ts= 250us

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 Example: Sampling time effect
|RG(jw)| vref(t)
fc= 1kHz vo(t)
|G(jw)| R(s) G(s)
|R(jw)| -
Ts= 100us
freq
fc

Matched Ts= 250us

Matched Ts= 100us

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 Example
|RG(jw)| vref(t)
fc= 1kHz vo(t)
|G(jw)| R(s) G(s)
|R(jw)| -
freq
fc

Prewarp (1kHz) Ts= 100us Prewarp (1khz) Ts= 250us

Digital control of Power Converters

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