HANDY AUDIO S.A.

Final Report
Document: Final Report
Final Report
Date: 03/01/2017
Rev: 01 HANDY AUDIO S.A.
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REVISION HISTORY AND APPROVAL RECORD

Revision Date Purpose

0 03/01/2017 Document creation
1 07/01/2017 Document revision
2 13/01/2017 Document ending

DOCUMENT DISTRIBUTION LIST

Name E-mail
Jordi Altayó jordi.altayo@alu-etsetb.upc.edu
David Vila david.vila.bagaria@gmail.com
Mohamed El Atiki moha.atiki@gmail.com
Josep Cerdà pepete96@gmail.com
Ramón Bragos rbb@eel.upc.edu
Miguel Jesús García miguel.j.garcia@upc.edu

WRITTEN BY: REVIEWED AND APPROVED BY:

David Vila David Vila
Mohamed El Atiki Mohamed El Atiki
Jordi Altayó Jordi Altayó
Josep Cerdà Josep Cerdà

Date 03/01/2017 Date 07/01/2017

Name Josep Cerdà Name Jordi Altayó
Position Docum. Resp. Position Project leader
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0. CONTENTS
0. Contents.................................................................................................................................... 3
1. Document scope........................................................................................................................ 4
2. Time plan updated..................................................................................................................... 5
3. System design documentation...................................................................................................7
3.1. Matlab Scripts.................................................................................................................. 7
3.2. System block diagram...................................................................................................10
3.2.1. Level Shifter:................................................................................................................ 10
3.2.2. Pre-amplification:......................................................................................................... 10
3.2.3. Triangular pulse generator:..........................................................................................10
3.2.4. Comparator:................................................................................................................. 11
3.2.5. Gate Driver & Power Stage:.........................................................................................11
3.2.6. L-C Filter:..................................................................................................................... 11
4. System implementation documentation...................................................................................12
4.1. Final schematic.............................................................................................................. 12
4.1.1. Level Shifter................................................................................................................. 13
4.1.2. Triangular Wave Generator..........................................................................................13
4.1.3. Comparator.................................................................................................................. 14
4.1.4. Power Stage................................................................................................................ 14
4.1.5. Low-pass Filter............................................................................................................. 14
4.2. Circuit Layout................................................................................................................. 15
4.3. Final components list with values..................................................................................18
4.4. Circuit pictures............................................................................................................... 19
5. System characterization.......................................................................................................... 20
6. Budget..................................................................................................................................... 21
6.1. Components list with approximate costs........................................................................21
7. Conclusions............................................................................................................................. 24
8. Reflection document................................................................................................................ 25
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Date: 03/01/2017
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1. DOCUMENT SCOPE

The goal of this document is to make a full report of our project in order to
inform our customer all we have done in these weeks. Therefore, we will
update our time plan, where we include a document which represents the real
time we have used to implement our amplifier and also the problems that we
had with the amplifier. Furthermore, we make a full characterization of how the
amplifier works, its blocks, its components, and all the specifications that the
client had requested to us.

Finally, we will make a budget which includes all the hours we have spent, all
the material we have used and also its cost. With this document we hope that
our customer have all the information he has to have in order to make use of
the product and all the knowledge about it. We will also show that our product
achieves all the required specifications the customer told us.
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2. TIME PLAN UPDATED

Our a priori Gannt Diagram:

Our real time plan.

12 October 19 October 26 October 2 November

 PWM  PSPICE basic  Final complete  Assembling
modulation amplifier filter schematic PWM
schematic. phase model. modulation on
 Amplifier phase  Final basic the Protoboard.
schematic. PSPICE  Assembling get
model. driver .
 Assembling the
amplifier filter
on the
protoboard.

9 November 16 November 23 November 30 November

 Test our  Improve filter,  Improve filter,
 Assembling get protoboard firstly we would firstly we would
driver circuit. work with a work with a
 Assembling the  PCB plans, double filter, double filter,
two previous and sent to but finally we but finally we
tasks in one Vicente, who decided to decided to
unique circuit print it the work with a work with a
on the following week. simply simply
protoboard. Butterworth Butterworth
filter. filter.
 Assembling the  Assembling the
PCB. PCB.

7 December 14 December 21 December

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 Improve the  Test our finally  Test our finally

PCB plans and circuit and circuit.
print a new one make some
with that changes to
improvements. fulfill the
 We had a requirements.
problem with We test all
the Get- Driver except the
xip because it distortion again
overheated because the
and didn’t work differential
well. amplifier
 Also to doesn’t works
measure the well.
distortion we  Test to ensure
doesn’t how to the smooth
work the operation of
differential the amplifier.
amplifier.
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3. SYSTEM DESIGN DOCUMENTATION

3.1.Matlab Scripts
In order to model the behavior of the system, we were given a Matlab script that calculated some of
the characteristics of the circuit, such as the effect of using a signal or another as the PWM
modulating signal, the effect of varying the PWM modulator frequency, the effect of varying Q in the
filter, etc. Then, once we tried changing some parameters, we decided the ones that we thought
fitted better in our design.

First of all, we studied the effect of using a triangular or a saw tooth signal as the PWM modulating
signal:
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As we can see in the right plots, the PWM modulating signal one-sided spectrum is better in the
case of the triangular signal because there are less harmonics than in the spectrum of the saw
tooth. For this reason, we decided to implement a triangular wave generator. An other parameter
related to the PWM modulation is the modulating frequency, which we also decided to change in
order to decide at what frequency we should modulate. In the plots of the previous page, we used a
modulating frequency of 200 kHz.

In the graphs above, the used modulating frequency was 10 kHz. As we can see, the PWM
modulation generates a lot of harmonics and distortion. The PWM output signal has its pulses wider
than the PWM output signal for a frequency of 200 kHz. This is the reason why there is more
distortion in this graph than at the ones in the previous page. Observing this phenomena, we could
conclude the bigger the modulating frequency is, the better the PWM output signal would be. So,
we chose a modulating frequency of 200 kHz.

An other thing we studied was the pulse width error in PWM through the imperfect mismatch
between the amplitudes of the modulating and audio signals. When the amplitude of the modulating
signal was lower than the audio one, we had this problem:

As we can observe in the graph, when the audio

signal overpasses 0.5V, which is the modulating
signal amplitude, the result is that the PWM output
signal has low-level. For the same reason, when
the audio signal is -0.5V or lower, the PWM output
signal will be in high level creating a long pulse that
isn’t desired.
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When the amplitude of the modulating signal was higher than the audio signal amplitude, appeared
an other problem:

Observing the PWM output signal we see that the

pulses are almost uniform, which isn’t desired too
because the PWM modulation lies in the
difference of the modulated pulses. Furthermore,
the effect of this modulation is reflexed in the
spectrum of the signal.

As we can observe, the amplitude of the tone of

the audio signal is lower than the amplitude of the
tone of the modulation. Therefore, we can
conclude that if we want to make a good
modulation we need to match the amplitude of the
audio signal with the modulating one.

Finally, we studied the frequency response of the L-C output filter, and the effect when varying the
factor of quality Q.

In this graph, we can see that the frequency response

of the filter is critically damped. This frequency
response is for a
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Here we have an underdamped frequency

response. We can observe that in the cut frequency
it appears a peculiarity that increments that instead
of attenuating the nearby frequencies, the filter
amplifies them.

As we can see, in order to make the design of the filter we have to take in count the quality factor of
the filter, which is related with all the parameters of it:

So, we chose those components that gave us a factor quality of a damped frequency response.

3.2.System block diagram

3.2.1. Level Shifter:

We add an off-set voltage to the audio original signal in order to make the signal unipolar.

3.2.2. Pre-amplification:
This block is the responsible of the amplification of the audio signal, it’s necessary because our
original signal audio is too low to work with it.

3.2.3. Triangular pulse generator:

We need a triangular pulse generator because we will implement a PWM module amplification. This
type of modulation needs a reference signal, which will be our triangular.
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3.2.4. Comparator:
There we will compare the original signal with and off-set and also amplified with the triangular
signal, then, at the output we will have a rectangular train of different pulses. The comparator
decides if the output is Vcc or –Vcc (high or low level), if the pendent of the triangular wave is
positive the output of the comparator will be Vcc, in the opposite case, the output will be –Vcc.

3.2.5. Gate Driver & Power Stage:

This block is necessary for the recuperation of the amplified signal audio. This block has one input
but two outputs. It consist in the next: in the input we will have a triangular train pulses, and at the
outputs, on the one hand we have the same as input but amplified, and on the other hand we have
the same as the input but upside down and also amplified.

3.2.6. L-C Filter:

This is a simply LC filter composed by an inductor and a capacitor, whose function is filtered the
frequencies greater than 20 KHz ideally. However, this filter also realizes another function. Since we
have a floating load, we need to filter the get driver’s outputs and then we subtract them on the
load, obtaining the signal audio amplified.
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4. SYSTEM IMPLEMENTATION DOCUMENTATION

4.1. Final schematic

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As we can see, and according to the block diagram shown previously; our class D amp has 5 main
stages.

4.1.1. Level Shifter

First of all, the input signal arrives to the first stage: the level shifter. The main objective of this part
is to adapt the signal to the requisites of the following blocks.
The signal gets filtered by C11 and R22 to remove its DC content. We’ve chosen the values of the
filter in order to get a fc of 3,38Hz. With a non-inverter amplifier Op-amp structure, and adding C12,
we are able to amplify just the AC content.
Moreover, we add a 2,5V DC voltage to the non-inverter input, which remains unaltered.
So, at the end of the signal we obtain the input signal amplified by G plus 2,5V of continuous
voltage.
G is defined as:

We’ve chosen the previous values according to the international line level standard. In Comercial
Audio case, 0.8943Vpp.

We can conclude that the maximum levels at the end of this stage will be:

4.1.2. Triangular Wave Generator

To build our triangular wave which will be compared to the input signal, we’ve implemented an
oscillator with TLC2272 and LM319 IT’s.
Through a voltage divider, we add 2.5VDC to the generated signal. In this way, by means of C21 and
C22, we avoid every noise produced previously. This structure generates a triangular and a square
signal. We defined the characteristics of the triangular wave according to:
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It can be appreciated the fact that theoretically, the input signal and our triangular wave will share
the same dimensions, which would produce a good efficiency, because we make the most of the
triangular range of values. We also can hardly guaranty that we won’t get stuck only in one level at
the output of the PWM comparator because, input signal won’t be major than triangular.

So, our triangular wave is ready to be compared with.

4.1.3. Comparator

We can emphasize that we’ve incorporated pull-up resistors to the IC’s which have to hold high
frequencies. This speeds up the transitions from low to high level at the output.

Our third stage only compares the signals which came from stages 1 and 2. We obtain, therefore a
Pulse-Width Modulation. The comparator will decide high level only if input signal is greater than the
other one and otherwise. In function of the duration of the pulses at the output we will later
reconstruct the original input signal.

4.1.4. Power Stage

To implement a power stage, we only used the SIP2100 IC and a NAND logic gate. In our case, all
came incrusted in a tiny PCB with SMD components, so the design of this stage can be considered
despicable.

SIP2100 only uses two transistors powered with 5V to amplify high and low levels that come from
the comparator. The result will be the same at the entry but with higher levels, concretely, on the
range [0’25, 4’4] V.

4.1.5. Low-pass Filter

The only thing that remains to do is filter all the high-frequency content of the signal. Once this is
done, we’ll have the reconstruction of the original one.

By now, our signal has content on the audio range, but has some power at 250kHz, provided by the
switching of the pulse modulation.
We’ve implemented the low-pass filter with a second order Butterworth filter. Its cut frequency is:

In this case, putting that value, we start attenuating frequencies over the limits of audible signal, and
by frequencies in the order of 250kHz, we’ll almost completely eliminate them.

We have to say that every active component has capacitors between him and the power supply to
avoid noise.
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4.2. Circuit Layout

Using Eagle, and after many hours of learning and researching how to use this tool, we build a
design. However, once we brought it to the lab, we realized that it had some problems to be solved
(although it worked correctly). So, we made the REV B, which accomplishes all of our spectates,
and has a very good look too.

Since the amplifier is not a high frequency circuit there are not restrictions in the PCB layout design.
Only things taken into account were the thickness of the output traces which were wider than signal
ones to offer less resistance thus more power efficiency. Right angle traces were avoided to provide
a more solid mechanical robustness as well as top connections in order to facilitate soldering
process.
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4.3. Final components list with values

In the following table, we have detailed each component used on the design and his value.

Name Value
Cd1 100 nF
Cd2 100 nF
Cd3 100 nF
Cd4 10 µF
Cd5 1 µF
Cd6 100 nF
C11 100 nF
C12 1 µF
R11 470 kΩ
R12 18 kΩ
R13 10 kΩ
C21 10 µF
C22 100 nF
C23 100 pF
R21 100 kΩ
R22 100 kΩ
R23 20 kΩ
R24 10 kΩ
R25 20 kΩ
R26 4,7 kΩ
R31 4,7 kΩ
C51 680 nF
L51 68 µH
Rs 8Ω
LM319 -
TLC2272 -
SIP2100 -
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4.4. Circuit pictures

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5. SYSTEM CHARACTERIZATION

- Measurement set-up
- Measurement graphs and results. Final performance.
- Short discussion
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6. BUDGET

6.1. Components list with approximate costs

It has been hard to us to stablish a concrete price for all our work. In fact, we consider that although
homework, we’ve worked 3 hours of a normal lab session (without taking into account extra hours
at the end of the class) during 13 sessions.
Total work has been distributed equally, and we consider, by looking at other engineer costs, that an
average price per hour of an engineer is 35€ approximately.

Design and prototyping costs

Main Task Engineer Days Hours per day Price per hour (€) Cost per Engineer (€)
Leader/Design Jordi 13 3 35 1365
Test/ Mohamed 13 3 35 1365
Documentation Pep 13 3 35 1365
Design/HW David 13 3 35 1365
TOTAL 5460
Cost per unit 5,46

All the costs that appear on the table have been extracted from two of the most important electronic
distributors in the sector: Farnell and Mouser. To verify that fact, we add all the paths to the
webpages.

Name Value Price € (1 unit) Price (1.000 units)

Cd1 100 nF 0,111 0,0362

Cd2 100 nF 0,111 0,0362

Cd3 100 nF 0,111 0,0362

Cd4 10 µF 0,0558 0,0239

Cd5 1 µF 0,0551 0,0239

Cd6 100 nF 0,111 0,0362

C11 100 nF 0,111 0,0362

C12 1 µF 0,0551 0,0239

R11 470 kΩ 0,02 0,0141

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R12 18 kΩ 0,02 0,0141

R13 10 kΩ 0,02 0,0141

C21 10 µF 0,0558 0,0241

C22 100 nF 0,111 0,0362

C23 100 pF 0,0376 0,0188

R21 100 kΩ 0,02 0,0141

R22 100 kΩ 0,02 0,0141

R23 20 kΩ 0,02 0,0141

R24 10 kΩ 0,02 0,0141

R25 20 kΩ 0,02 0,0141

R26 4,7 kΩ 0,02 0,0141

R31 4,7 kΩ 0,02 0,0141

C51 680 nF 0,532 0,139

L51 68 µH 1,75 1,33

Rs 8Ω 0,981 0,472

LM319 - 0,44 0,181

TLC2272 - 2,21 1,01

SIP2100 - 1,8 0,843

Without work 4,4478

TOTAL 9,3406
Including work 9,907

Expected <25 (only materials) <10 (including work)

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EXPLICAR QUE COMPLIM AMB LA PASTA

References:
http://es.farnell.com/fairchild-semiconductor/lm319n/comparator-dual-80ns-dip-14/dp/2450778
http://www.mouser.es/ProductDetail/Vishay/SIP2100DY-T1-GE3/?qs=%2fha2pyFaduiDggBd%2f
%252bqfZvRbGKkSkKZ4lyOeUgjoqfc%3d
http://es.farnell.com/texas-instruments/tlc2272cp/op-amp-2-18mhz-3-6v-us-300uv-pdip/dp/8454051
http://es.farnell.com/multicomp/mc0805b104k500a5-08mm/cond-cer-mult-0-1uf-50v-x7r-rad/dp/2395773
http://www.mouser.es/ProductDetail/Murata-PowerSolutions/33680C/?qs=94qWIstW55WvVXdvw QoYBg==
http://es.farnell.com/kemet/r82ec3680dq70k/cond-pel-c-pet-0-68uf-100v-rad/dp/2446337
http://es.farnell.com/multicomp/mcre000037/resistencia-pel-carb-n-1k-0-125w/dp/1700237
http://es.farnell.com/multicomp/mcgpr63v106m5x11/cond-elec-alum-10uf-63v-rad/dp/9451480
http://es.farnell.com/multicomp/mcrh50v105m5x11/cond-elec-alum-1uf-50v-rad/dp/1902924
http://es.farnell.com/multicomp/mcbu5101k5/cond-cer-mult-y5p-100pf-50v-rad/dp/9411747
http://www.mouser.es/ProductDetail/Vishay-Dale/CPF38R0000FEE14/?qs=sGAEpiMZZMsPqMdJzcrNwtgF
%252bvVgJ41wQUMqAB7OG1E0Tv1CULtaIA%3d%3d
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7. CONCLUSIONS

If we take a look back, 13 weeks ago we had to face our first engineering project designed and
made by us. We did not know much about power electronics neither audio-related electronics. It’s a
common opinion among all members of the group that this project has contributed to increase our
knowledge among this fields and also served to provide us a first look at how projects are carried
out in real word.

We also want to thank both Ramon and Miguel, our lecturers, for all the support received during this
project and all the tips and advices.
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8. REFLECTION DOCUMENT

- Things that could have been done better by the organizers/lecturers

- Things that could have been done better by the team
- Performance as a work team
- Self assessment (remember the team mark goal in the team constitution document)