ELEC4602

Microelectronics
Design and Technology

Lab 3: Op-amp design

Objective
The objective of this laboratory session is to design and characterise a two-stage CMOS op-
erational amplifier. The caracterisation is to be carried out using both hand-calculations and
computer simulations. For the hand-calculations, you should use the parameters for the TSMC
0.18 µm CMOS process published at the course web-site. The hand-calculations should not be
carried out in the laboratory session!

Op-amp design
The opamp to be designed is shown in the figure below. You should create a cell that contanins
the schematic, and use suitable test-benches (as outlined in lab 2) for the different simulations
that you are going to carry out. Note, that on the figure, the gate of M6 is connected to the gates of
M7 and M8 — the bulk-terminal on M7 is not drawn; this is standard notation for current-mirrors
with multiple outputs.

VDD

M2
M1 M3
RC

vIM vO MOSFET W /µm L/µm

IB CC
M4 M5
vIP M1 3 0.4
M4 1 0.4
M7 M6−−8 2 0.4
M8
M6

(a) (b)
Figure 1: CMOS op-amp (a), transistor dimensions (b)

Transistor dimesions: The dimensions of most of the transistors are given in the figure; choose
the dimensions for the other transistors in the op-amp.

Parametric values: You will need to find CC and RC using simulations; to this end, it is very
useful to enter their values as paramters in the schematic. Choose rc Ohms as the Resistance
of RC , and cc F as the Capacitance of CC .
TL/lab3/July 28, 2015
School of Electrical Engineering
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Building a generic testbench
Depending on the type of simulation you want to do, your test bench is going to look different.
The easiest way to handle that is to build a test bench in which you can “add” or “remove”
connections by entering extreme values of components (e.g. a resistor of 1 fΩ is effectivily
a short-circuit, while a resistor of 1 TΩ is effectivily an open-circuit). Build the generic test
bench for your op-amp shown in the figure below. v2 should be of type vpulse for transisent
simulations; the other voltage sources can be of vdc type.

VDD
Component Value
20uA VDD 1.8 V
CL 10 pF
1.8V IB IB 20 µA
vIP vO
V1 Cin 1 TF / 1 fF
vIM
v2 R in CL Rin 1 TΩ / 1 fΩ
Lfb 1 TH / 1 fH
Cin L fb R fb Rfb 1 TΩ / 1 fΩ
v3

(b)
Figure 2: Generic simulation test bench for op-amp

Finding the DC gain

To run open-loop DC simulations on your generic test bench choose the following component
values:
Cin = 1 fF, Rin = 1 fΩ, Lfb = 1 fH, Rfb = 1 TΩ
To find the DC gain, choose v2 = vIP = 0.9 V, and perform a DC analysis (as in lab 2) where
you sweep v3 around 0.9 V (You will find that the gain is very large, so in order to see a smooth
transfer function, you need to simulate in a very narrow band around the common-mode voltage
(0.9 V).) The gain is, of course, the (maximum) slope of the DC (v2 to vO ) transfer function.
Before you start the simulation, though, you need to choose values for the parameters cc
and rc: in the Analog Design Environment menu, choose Variables-Copy From Cellview;
that should make cc and rc appear under Design Variables in the simulation window. Now
double-click on cc and enter 1e-12 in the Value (Expr) field and click OK; double-click on rc
and enter 1 in the Value (Expr) field and click OK. You should be able to do simulations now.

Finding the DC offset — Monte Carlo simluations

An appropriately designed opamp has no systematic offset; i.e. when vIP = vIM , the output is
very close to VDD /2 (when used on a single supply voltage); in reality, you need to apply a
certain differential input voltage (the offset voltage) to make vO ∼ VDD /2. The actual offset in a
fabricated circuit is then mainly due to mismatch between devices. The simulator model device
mismatch using Monte-Carlo simulations: a large number of simulations (e.g. DC simulations)
are carried out, each having slightly different, randomly chosen, parameters for each transistor
corresponding to one particular fabricated circuit. If enough random simulations are carried out,

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you can get a very good idea of the range the offset voltage (or some other parameter of interest)
will lie within.
To find the offset voltage range, first ensure that you are using the stat section of the tsmc018.scs
model library as described in lab 2, and have your DC simulation of the amplifier transfer func-
tion (i.e. the one you just found the DC gain on) set up — you will need an sweep band around the
common-mode voltage of about ±100 mV. Then, in the in the Analog Design Environment menu,
choose Tools-Monte Carlo ...; now, in the popped up Analog Statistical Analysis window
choose 30 for Number of Runs, choose Process & Mismatch for Analysis Variation, and
tick the box for Save Data Between Runs to Allow Family Plots. Finally, in the menu
choose Simulation-Run; it will take a little while for this simulation to run. Plotting vO will
now get you 30 transfer functions, each with a different offset.

Gain-bandwidth and phase margin

The value for CC = 1 pF (cc) is not too bad; however to get a decent phase margin lead com-
pensation is required, which means that you need to determine the value for RC . When doing
open-loop AC simulations, it is best to provide a DC feed-back to make sure that the circuit op-
erates in the high-gain region; that can also be achieved by noting the DC operating piont (as in
lab 2), but that point will change, if you make a tiny change to the circuit: The following set-up
is much easier. Choose the following component values:

Cin = 1 TF, Rin = 1 TΩ, Lfb = 1 TH, Rfb = 1 fΩ

Remember to enter an AC Magnitude of 1 for v2 ; you can now run an AC simulation; to find
the unity-gain frequency plot the magnitude of output voltage (vO ) in dB and find the frequency
where this has reduced to 0 dB. To find the phase margin, plot the phase of the output voltage,
and read tis value at the unity-gain frequency.

Parametric sweep: To find a good value for RC , choose in the simulation window menu
Tools-Parametric Analysis... and in the pop-up window enter rc as the Variable Name,
enter a Range Type of From/To, enter 1e3 in the From field, and 1e6 in the To field; under
Step Control choose Decade and enter 2 in the Steps/Decade field. Now select Analysis-
Start in the parametric window menu; this should start a series of AC simulations with different
values for RC . Choose a value for RC that give a smooth 20 dB/dec roll-off, and a good phase
margin. What is your unity-gain bandwith and your phase margin?

Common-mode input range

Using AC simulations, try to change the value of v2 (e.g. by doing a parametric sweep) and
find the allowable range for this voltage (i.e., the common-mode input range); when the voltage
get too large or too small, you should see a significant deviation in the magnitude plot (e.g.
significantly lower low-frequency gain).

Slew-rate
To find the amplifiers slew-rate, prepare your test-bench to do transisent simulations on a unity-
gain configured amplifier; choose the following component values:

Cin = 1 fF, Rin = 1 TΩ, Lfb = 1 fH, Rfb = 1 fΩ

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For v2 , enter rise and fall-times of 1 ns, 50 % duty cycle, a repetition period of 2 µs, and a voltage
swing between 0.8 V and 1.3 V. Now carry out a transient simulation, and note down the slew
rate (i.e., the highest dvO /dt) for both for rising and falling edges. Why are they different?

Report
A short report in .pdf format on the laboratory exercise must be prepared and uploaded on the
course Moodle site no later than the due date. This need to include:

• Your schematic of the op-amp gate.

– Include brief explanation of chosen transistor sizes.

• Your schematic of the test bench.

• Your DC simulation.

– On which you read the DC gain (compare this with simple hand calculations).

• Your Monte-Carlo simulation.

– On which you read worst-casre DC offset.

• Your AC simulations for different RC s.

– On which you read unity-gain frequency and phase margin (compare the unity-gain
frequency with simple hand calculations).

• Your AC simluations for finding the common-mode range.

– On which you read the common-mode range (compare this with simple hand calcu-
lations)

• Your Transient simulations.

– On which you read the slew rates (compare this with simple hand calculations)

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