a Dual, Current Feedback

Low Power Op Amp

AD812
FEATURES PIN CONFIGURATION
Two Video Amplifiers in One 8-Lead SOIC Package 8-Lead Plastic
Optimized for Driving Cables in Video Systems Mini-DIP and SOIC
Excellent Video Specifications (RL = 150 ⍀):
Gain Flatness 0.1 dB to 40 MHz
OUT1 1 8 V+
0.02% Differential Gain Error
0.02ⴗ Differential Phase Error –IN1 2 + 7 OUT2
Low Power +IN1 3 6 –IN2
Operates on Single +3 V Supply +
V– 4 5 +IN2
5.5 mA/Amplifier Max Power Supply Current AD812
High Speed
145 MHz Unity Gain Bandwidth (3 dB)
1600 V/␮s Slew Rate
Easy to Use
50 mA Output Current
Output Swing to 1 V of Rails (150 ⍀ Load)

APPLICATIONS
The AD812 offers low power of 4.0 mA per amplifier max (VS =
Video Line Driver
+5 V) and can run on a single +3 V power supply. The outputs
Professional Cameras
of each amplifier swing to within one volt of either supply rail to
Video Switchers
easily accommodate video signals of 1 V p-p. Also, at gains of
Special Effects
+2 the AD812 can swing 3 V p-p on a single +5 V power sup-
ply. All this is offered in a small 8-lead plastic DIP or 8-lead
PRODUCT DESCRIPTION SOIC package. These features make this dual amplifier ideal
The AD812 is a low power, single supply, dual video amplifier. for portable and battery powered applications where size and
Each of the amplifiers have 50 mA of output current and are power is critical.
optimized for driving one back-terminated video load (150 Ω)
each. Each amplifier is a current feedback amplifier and fea- The outstanding bandwidth of 145 MHz along with 1600 V/µs
tures gain flatness of 0.1 dB to 40 MHz while offering differen- of slew rate make the AD812 useful in many general purpose
tial gain and phase error of 0.02% and 0.02°. This makes the high speed applications where a single +5 V or dual power sup-
AD812 ideal for professional video electronics such as cameras plies up to ± 15 V are available. The AD812 is available in the
and video switchers. industrial temperature range of –40°C to +85°C.

0.4

DIFFERENTIAL GAIN – %
0.06
G = +2
0.3 RL = 150V
0.04
0.2
DIFFERENTIAL GAIN
NORMALIZED GAIN – dB

0.1
0.08 0.02
DIFFERENTIAL PHASE – Degrees

–0.1 0.06

–0.2 DIFFERENTIAL PHASE

VS = 615V 0.04
–0.3
65V
–0.4
0.02
5V
–0.5
3V
–0.6 0
100k 1M 10M 100M 5 6 7 8 9 10 11 12 13 14 15
FREQUENCY – Hz SUPPLY VOLTAGE – 6Volts

Figure 1. Fine-Scale Gain Flatness vs. Frequency, Gain Figure 2. Differential Gain and Phase vs. Supply Voltage,
= +2, RL = 150 Ω Gain = +2, RL = 150 Ω
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
which may result from its use. No license is granted by implication or Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
otherwise under any patent or patent rights of Analog Devices. Fax: 781/326-8703 © Analog Devices, Inc., 1998
AD812* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017

COMPARABLE PARTS REFERENCE MATERIALS

View a parametric search of comparable parts. Tutorials
• MT-034: Current Feedback (CFB) Op Amps
EVALUATION KITS • MT-051: Current Feedback Op Amp Noise Considerations
• Universal Evaluation Board for Dual High Speed • MT-057: High Speed Current Feedback Op Amps
Operational Amplifiers
• MT-059: Compensating for the Effects of Input
Capacitance on VFB and CFB Op Amps Used in Current-to-
DOCUMENTATION Voltage Converters
Application Notes
• AN-414: Low Cost, Low Power Devices for HDSL DESIGN RESOURCES
Applications • AD812 Material Declaration
• AN-649: Using the Analog Devices Active Filter Design • PCN-PDN Information
Tool
• Quality And Reliability
• AN-692: Universal Precision Op Amp Evaluation Board
• Symbols and Footprints
• AN-851: A WiMax Double Downconversion IF Sampling
Receiver Design
DISCUSSIONS
Data Sheet
View all AD812 EngineerZone Discussions.
• AD812: Dual, Current Feedback Low Power Op Amp Data
Sheet
SAMPLE AND BUY
User Guides
Visit the product page to see pricing options.
• UG-128: Universal Evaluation Board for Dual High Speed
Op Amps in SOIC Packages
TECHNICAL SUPPORT
TOOLS AND SIMULATIONS Submit a technical question or find your regional support
number.
• AD812 SPICE Macro-Model

DOCUMENT FEEDBACK
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AD812–SPECIFICATIONS
Dual Supply (@ T = +25ⴗC, R = 150 ⍀, unless otherwise noted)
A L

Model AD812A
Conditions VS Min Typ Max Units
DYNAMIC PERFORMANCE
–3 dB Bandwidth G = +2, No Peaking ±5 V 50 65 MHz
± 15 V 75 100 MHz
Gain = +1 ± 15 V 100 145 MHz
Bandwidth for 0.1 dB Flatness G = +2 ±5 V 20 30 MHz
± 15 V 25 40 MHz
Slew Rate1 G = +2, RL = 1 kΩ ±5 V 275 425 V/µs
20 V Step ± 15 V 1400 1600 V/µs
G = –1, RL = 1 kΩ ±5 V 250 V/µs
± 15 V 600 V/µs
Settling Time to 0.1% G = –1, RL = 1 kΩ
VO = 3 V Step ±5 V 50 ns
VO = 10 V Step ± 15 V 40 ns

NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion fC = 1 MHz, RL = 1 kΩ ± 15 V –90 dBc
Input Voltage Noise f = 10 kHz ± 5 V, ± 15 V 3.5 nV/√Hz
Input Current Noise f = 10 kHz, +In ± 5 V, ± 15 V 1.5 pA/√Hz
f = 10 kHz, –In ± 5 V, ± 15 V 18 pA/√Hz
Differential Gain Error NTSC, G = +2, RL = 150 Ω ±5 V 0.05 0.1 %
± 15 V 0.02 0.06 %
Differential Phase Error ±5 V 0.07 0.15 Degrees
± 15 V 0.02 0.06 Degrees

DC PERFORMANCE
Input Offset Voltage ± 5 V, ± 15 V 2 5 mV
TMIN –TMAX 12 mV
Offset Drift ± 5 V, ± 15 V 15 µV/°C
–Input Bias Current ± 5 V, ± 15 V 7 25 µA
TMIN –T MAX 38 µA
+Input Bias Current ± 5 V, ± 15 V 0.3 1.5 µA
TMIN –T MAX 2.0 µA
Open-Loop Voltage Gain VO = ± 2.5 V, RL = 150 Ω ±5 V 68 76 dB
TMIN –T MAX 69 dB
VO = ± 10 V, RL = 1 kΩ ± 15 V 76 82 dB
TMIN –T MAX 75 dB
Open-Loop Transresistance VO = ± 2.5 V, RL = 150 Ω ±5 V 350 550 kΩ
TMIN –T MAX 270 kΩ
VO = ± 10 V, RL = 1 kΩ ± 15 V 450 800 kΩ
TMIN –T MAX 370 kΩ

INPUT CHARACTERISTICS
Input Resistance +Input ± 15 V 15 MΩ
–Input 65 Ω
Input Capacitance +Input 1.7 pF
Input Common Mode ±5 V 4.0 ±V
Voltage Range ± 15 V 13.5 ±V
Common-Mode Rejection Ratio
Input Offset Voltage VCM = ± 2.5 V ±5 V 51 58 dB
–Input Current 2 3.0 µA/V
+Input Current 0.07 0.15 µA/V
Input Offset Voltage VCM = ± 12 V ± 15 V 55 60 dB
–Input Current 1.5 3.3 µA/V
+Input Current 0.05 0.15 µA/V

–2– REV. B
 AD812
Model AD812A
Conditions VS Min Typ Max Units
OUTPUT CHARACTERISTICS
Output Voltage Swing RL = 150 Ω, TMIN –TMAX ±5 V 3.5 3.8 ±V
RL = 1 kΩ, TMIN –TMAX ± 15 V 13.6 14.0 ±V
Output Current ±5 V 30 40 mA
± 15 V 40 50 mA
Short Circuit Current G = +2, RF = 715 Ω ± 15 V 100 mA
VIN = 2 V
Output Resistance Open-Loop ± 15 V 15 Ω

MATCHING CHARACTERISTICS
Dynamic
Crosstalk G = +2, f = 5 MHz ± 5 V, ± 15 V –75 dB
Gain Flatness Match G = +2, f = 40 MHz ± 15 V 0.1 dB
DC
Input offset Voltage TMIN –TMAX ± 5 V, ± 15 V 0.5 3.6 mV
–Input Bias Current TMIN –TMAX ± 5 V, ± 15 V 2 25 µA

POWER SUPPLY
Operating Range ± 1.2 ± 18 V
Quiescent Current Per Amplifier ±5 V 3.5 4.0 mA
± 15 V 4.5 5.5 mA
TMIN –TMAX ± 15 V 6.0 mA
Power Supply Rejection Ratio
Input Offset Voltage VS = ± 1.5 V to ± 15 V 70 80 dB
–Input Current 0.3 0.6 µA/V
+Input Current 0.005 0.05 µA/V
NOTES
1
Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain.
Specifications subject to change without notice.

Single Supply (@ TA = +25ⴗC, RL = 150 ⍀, unless otherwise noted)

Model AD812A
Conditions VS Min Typ Max Units
DYNAMIC PERFORMANCE
–3 dB Bandwidth G = +2, No Peaking +5 V 35 50 MHz
+3 V 30 40 MHz
Bandwidth for 0.1 dB
Flatness G = +2 +5 V 13 20 MHz
+3 V 10 18 MHz
Slew Rate1 G = +2, RL = 1 kΩ +5 V 125 V/µs
+3 V 60 V/µs

NOISE/HARMONIC PERFORMANCE
Input Voltage Noise f = 10 kHz +5 V, +3 V 3.5 nV/√Hz
Input Current Noise f = 10 kHz, +In +5 V, +3 V 1.5 pA/√Hz
f = 10 kHz, –In +5 V, +3 V 18 pA/√Hz
Differential Gain Error2 NTSC, G = +2, RL = 150 Ω +5 V 0.07 %
G = +1 +3 V 0.15 %
Differential Phase Error 2 G = +2 +5 V 0.06 Degrees
G = +1 +3 V 0.15 Degrees

REV. B –3–
AD812–SPECIFICATIONS
Single Supply (Continued)
AD812A
Model Conditions VS Min Typ Max Units
DC PERFORMANCE
Input Offset Voltage +5 V, +3 V 1.5 4.5 mV
TMIN –TMAX 7.0 mV
Offset Drift +5 V, +3 V 7 µV/°C
–Input Bias Current +5 V, +3 V 2 20 µA
TMIN –TMAX 30 µA
+Input Bias Current +5 V, +3 V 0.2 1.5 µA
TMIN –TMAX 2.0 µA
Open-Loop Voltage Gain VO = +2.5 V p-p +5 V 67 73 dB
VO = +0.7 V p-p +3 V 70 dB
Open-Loop Transresistance VO = +2.5 V p-p +5 V 250 400 kΩ
VO = +0.7 V p-p +3 V 300 kΩ

INPUT CHARACTERISTICS
Input Resistance +Input +5 V 15 MΩ
–Input +5 V 90 Ω
Input Capacitance +Input 2 pF
Input Common Mode +5 V 1.0 4.0 V
Voltage Range +3 V 1.0 2.0 V
Common-Mode Rejection Ratio
Input Offset Voltage VCM = 1.25 V to 3.75 V +5 V 52 55 dB
–Input Current 3 5.5 µA/V
+Input Current 0.1 0.2 µA/V
Input Offset Voltage VCM = 1 V to 2 V +3 V 52 dB
–Input Current 3.5 µA/V
+Input Current 0.1 µA/V

OUTPUT CHARACTERISTICS
Output Voltage Swing p-p RL = 1 kΩ, TMIN –TMAX +5 V 3.0 3.2 V p-p
RL = 150 Ω, TMIN –TMAX +5 V 2.8 3.1 V p-p
+3 V 1.0 1.3 V p-p
Output Current +5 V 20 30 mA
+3 V 15 25 mA
Short Circuit Current G = +2, RF = 715 Ω +5 V 40 mA
VIN = 1 V

MATCHING CHARACTERISTICS
Dynamic
Crosstalk G = +2, f = 5 MHz +5 V, +3 V –72 dB
Gain Flatness Match G = +2, f = 20 MHz +5 V, +3 V 0.1 dB
DC
Input offset Voltage TMIN –TMAX +5 V, +3 V 0.5 3.5 mV
–Input Bias Current TMIN –TMAX +5 V, +3 V 2 25 µA

POWER SUPPLY
Operating Range 2.4 36 V
Quiescent Current Per Amplifier +5 V 3.2 4.0 mA
+3 V 3.0 3.5 mA
TMIN –TMAX +5 V 4.5 mA
Power Supply Rejection Ratio
Input Offset Voltage VS = +3 V to +30 V 70 80 dB
–Input Current 0.3 0.6 µA/V
+Input Current 0.005 0.05 µA/V

TRANSISTOR COUNT 56
NOTES
1
Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain.
2
Single supply differential gain and phase are measured with the ac coupled circuit of Figure 53.
Specifications subject to change without notice.

–4– REV. B

ABSOLUTE MAXIMUM RATINGS 1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Internal Power Dissipation2
Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Watts
Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9 Watts
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ± VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 1.2 V
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range N, R . . . . . . . . . –65°C to +125°C
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering, 10 sec) . . . . . . . +300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air: 8-lead plastic package: θJA = 90°C/Watt;
8-lead SOIC package: θJA = 150°C/Watt.
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
AD812
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
AD812 is limited by the associated rise in junction temperature.
The maximum safe junction temperature for the plastic encap-
sulated parts is determined by the glass transition temperature
of the plastic, about 150°C. Exceeding this limit temporarily
may cause a shift in parametric performance due to a change in
the stresses exerted on the die by the package. Exceeding a
junction temperature of 175°C for an extended period can result
in device failure.
While the AD812 is internally short circuit protected, this may
not be sufficient to guarantee that the maximum junction tem-
perature (150 degrees) is not exceeded under all conditions. To
ensure proper operation, it is important to observe the derating
curves.
It must also be noted that in high (noninverting) gain configura-
tions (with low values of gain resistor), a high level of input
overdrive can result in a large input error current, which may
result in a significant power dissipation in the input stage. This
power must be included when computing the junction tempera-
ture rise due to total internal power.
2.0
TJ = +1508C

MAXIMUM POWER DISSIPATION – Watts

AD812AN –40°C to +85°C 8-Lead Plastic DIP N-8
AD812AR –40°C to +85°C 8-Lead Plastic SOIC SO-8 8-LEAD MINI-DIP PACKAGE

AD812AR-REEL 13" Reel 1.5

AD812AR-REEL7 7" Reel

METALIZATION PHOTO 1.0

Dimensions shown in inches and (mm).
8-LEAD SOIC PACKAGE

0.0783
(1.99) 0.5

V+ OUT2 –IN2
8 7 6

0
5 +IN2 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
AMBIENT TEMPERATURE – 8C

Figure 3. Plot of Maximum Power Dissipation vs.

Temperature
0.0539
(1.37)

4 V–

1 2 3 4
OUT1 –IN1 +IN1 V–

CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. WARNING!
Although the AD812 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD ESD SENSITIVE DEVICE
precautions are recommended to avoid performance degradation or loss of functionality.

REV. B –5–
AD812–Typical Performance Characteristics
20 16
COMMON-MODE VOLTAGE RANGE – 6Volts

14

TOTAL SUPPLY CURRENT – mA

15 VS = 615V
12

10 10
VS = 65V

5
6

0 4
0 5 10 15 20 –60 –40 –20 0 20 40 60 80 100 120 140
SUPPLY VOLTAGE – 6Volts JUNCTION TEMPERATURE – 8C

Figure 4. Input Common-Mode Voltage Range vs. Supply Figure 7. Total Supply Current vs. Junction Temperature
Voltage

10
20 TA = +25 C

NO LOAD

TOTAL SUPPLY CURRENT – mA

9
OUTPUT VOLTAGE – V p-p

15

10
7
RL = 150V

5 6

5
0 2 4 6 8 10 12 14 16
0
0 5 10 15 20 SUPPLY VOLTAGE – 6Volts
SUPPLY VOLTAGE – 6Volts

Figure 5. Output Voltage Swing vs. Supply Voltage Figure 8. Total Supply Current vs. Supply Voltage

30 25

615V SUPPLY 20
25
15
OUTPUT VOLTAGE – Volts p-p

INPUT BIAS CURRENT – mA

10 –IB, VS = 65V
20
5

15 0

–5 +IB, VS = 65V, 615V

10
–10
65V SUPPLY –IB, VS = 615V
–15
5
–20

0 –25
10 100 1k 10k –60 –40 –20 0 20 40 60 80 100 120 140
LOAD RESISTANCE – V JUNCTION TEMPERATURE – 8C

Figure 6. Output Voltage Swing vs. Load Resistance Figure 9. Input Bias Current vs. Junction Temperature

–6– REV. B
 AD812
4 70

2
VS = 65V
0 60
INPUT OFFSET VOLTAGE – mV

OUTPUT CURRENT – mA
–2

–4 50
VS = 615V
–6

–8 40

–10

–12 30

–14

–16 20
–60 –40 –20 0 20 40 60 80 100 120 140 0 5 10 15 20
JUNCTION TEMPERATURE – 8C SUPPLY VOLTAGE – 6Volts

Figure 10. Input Offset Voltage vs. Junction Temperature Figure 13. Linear Output Current vs. Supply Voltage

160 1k

CLOSED-LOOP OUTPUT RESISTANCE – V

G = +2
140
100
SHORT CIRCUIT CURRENT – mA

SINK VS = 615V

120
10

100
SOURCE
1
80 65VS

0.1
60
615VS

40 0.01
–60 –40 –20 0 20 40 60 80 100 120 140 10k 100k 1M 10M 100M
JUNCTION TEMPERATURE – 8C FREQUENCY – Hz

Figure 11. Short Circuit Current vs. Junction Temperature Figure 14. Closed-Loop Output Resistance vs. Frequency

80 30

VS = 615V
70 25
OUTPUT VOLTAGE – V p-p
OUTPUT CURRENT – mA

60 20
RL = 1kV

50 15

VS = 65V
40 10 VS = 65V
VS = 615V
30 5

20 0
–60 –40 –20 0 20 40 60 80 100 120 140 100k 1M 10M 100M
JUNCTION TEMPERATURE – 8C FREQUENCY – Hz

Figure 12. Linear Output Current vs. Junction Temperature Figure 15. Large Signal Frequency Response

REV. B –7–
AD812
100 100 0

PHASE – Degrees
120 –45
PHASE VS = 615V
INVERTING INPUT –90
VOLTAGE NOISE – nV/ Hz

CURRENT NOISE

TRANSIMPEDANCE – dB
CURRENT NOISE – pA/ Hz
100 –135
GAIN
VS = 3V –180
10 10
80
VOLTAGE NOISE VS = 3V VS = 615V

NONINVERTING INPUT 60
CURRENT NOISE

1 1 40
10 100 1k 10k 100k 10k 100k 1M 10M 100M
FREQUENCY – Hz FREQUENCY – Hz

Figure 16. Input Current and Voltage Noise vs. Frequency Figure 19. Open-Loop Transimpedance vs. Frequency
(Relative to 1 Ω)

90 –30
681V G = +2
80 681V VS = 2V p-p
VIN VOUT VS = 615V ; RL = 1kV
COMMON-MODE REJECTION – dB

–50
70
681V HARMONIC DISTORTION – dBc VS = 65V ; RL = 150V

681V
60
–70

50 VS = 65V
VS = 615V VS = 615V
40 –90 2ND HARMONIC
VS = 3V
3RD HARMONIC
30
–110
20 2ND
3RD
10 –130
10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M
FREQUENCY – Hz FREQUENCY – Hz

Figure 17. Common-Mode Rejection vs. Frequency Figure 20. Harmonic Distortion vs. Frequency

80 10
GAIN = –1
70 8 VS = 615V
POWER SUPPLY REJECTION – dB

615V
6
OUTPUT SWING FROM 6V TO 0

60
4
50
2
61.5V
40 0 1% 0.1% 0.025%

30 –2

–4
20
–6
10
–8

0 –10
10k 100k 1M 10M 100M 20 30 40 50 60
FREQUENCY – Hz SETTLING TIME – ns

Figure 18. Power Supply Rejection vs. Frequency Figure 21. Output Swing and Error vs. Settling Time

–8– REV. B
 AD812
1400 1400
G = +1
VS = 615V G = +1
1200 1200
RL = 500V

1000 1000
SLEW RATE – V/ms

SLEW RATE – V/ms

G = +2

800 800 G = +2

G = +10 G = +10
600 600

400 G = –1 400
G = –1

200 200

0 0
0 1 2 3 4 5 6 7 8 9 10 0 1.5 3.0 4.5 6.0 7.5 9.0 10.5 12.0 13.5 15.0
OUTPUT STEP SIZE – Vp-p SUPPLY VOLTAGE – 6Volts

Figure 22. Slew Rate vs. Output Step Size Figure 25. Maximum Slew Rate vs. Supply Voltage

2V 50ns 500mV 20ns

100 100
VIN 90
VIN
90

10 VOUT 10 VOUT
0% 0%

2V 500mV

Figure 23. Large Signal Pulse Response, Gain = +1, Figure 26. Small Signal Pulse Response, Gain = +1,
(RF = 750 Ω, RL = 150 Ω, VS = ± 5 V) (RF = 750 Ω, RL = 150 Ω, VS = ± 5 V)

200
PHASE SHIFT – Degrees

PHASE G = +1 G = +1
RL = 150V 0 180
RL = 150V
VS = 615V –90 160 RF = 750V
65V
–3dB BANDWIDTH – MHz

1 –180 140
RF = 866V
GAIN 5V
0 –270 120
CLOSED-LOOP GAIN – dB

3V PEAKING 1dB
–1 100
VS = 615V PEAKING 0.2dB
–2 80
65V
–3 60
5V
–4 40
3V
–5 20

–6 0
1 10 100 1000 0 2 4 6 8 10 12 14 16 18 20
FREQUENCY – MHz SUPPLY VOLTAGE – 6Volts

Figure 24. Closed-Loop Gain and Phase vs. Frequency, Figure 27. –3 dB Bandwidth vs. Supply Voltage, G = +1
G = +1

REV. B –9–
AD812
500mV 50ns 50mV 20ns

100 100

90
VIN 90 VIN

10 VOUT 10 VOUT
0% 0%

5V 500mV

Figure 28. Large Signal Pulse Response, Gain = +10, Figure 31. Small Signal Pulse Response, Gain = +10,
(RF = 357 Ω, RL = 500 Ω, VS = ± 15 V) (RF = 357 Ω, RL = 150 Ω, VS = ± 5 V)

PHASE SHIFT – Degrees

PHASE G = +10 PHASE G = +10

PHASE SHIFT – Degrees

VS = 615V RL = 150V 0 VS = 615V 0
RL = 1kV
–90 65V
CLOSED-LOOP GAIN (NORMALIZED) – dB

–90

CLOSED-LOOP GAIN (NORMALIZED) – dB

65V
5V 3V
–180 5V
1 1 –180
GAIN 3V GAIN
0 –270 0 –270

–1 VS = 615V
–1 –360
5V 5V
–2 –2 VS = 615V
3V
–3 3V
–3
65V
–4 –4
65V
–5 –5

–6 –6
1 10 100 1000 1 10 100 1000
FREQUENCY – MHz FREQUENCY – MHz

Figure 29. Closed-Loop Gain and Phase vs. Frequency, Figure 32. Closed-Loop Gain and Phase vs. Frequency,
Gain = +10, RL = 150 Ω Gain = +10, RL = 1 k Ω

100
110
90 G = +10
100 G = +10
RL= 150V
RL = 1kV
80 90
RF = 357V
–3dB BANDWIDTH – MHz

–3dB BANDWIDTH – MHz

70 80
PEAKING 1dB RF = 357V
60 70
RF = 154V RF = 154V
50 60
RF = 649V RF = 649V
40
50
30
40
20 30
10
20
0
0 2 4 6 8 10 12 14 16 18 20 10
0 2 4 6 8 10 12 14 16 18 20
SUPPLY VOLTAGE – 6Volts
SUPPLY VOLTAGE – 6Volts

Figure 30. –3 dB Bandwidth vs. Supply Voltage, Figure 33. –3 dB Bandwidth vs. Supply Voltage,
Gain = +10, RL = 150 Ω Gain = +10, RL = 1 k Ω

–10– REV. B
 AD812

2V 50ns 500mV 20ns

100 100
90 VIN 90 VIN

10 VOUT 10 VOUT
0% 0%

2V 500mV

Figure 34. Large Signal Pulse Response, Gain = –1, Figure 37. Small Signal Pulse Response, Gain = –1,
(RF = 750 Ω, RL = 150 Ω, VS = ± 5 V) (RF = 750 Ω, RL = 150 Ω, VS = ± 5 V)

PHASE SHIFT – Degrees

PHASE VS = 615V

PHASE SHIFT – Degrees

G = –1
RL = 150V PHASE VS = 615V G = –10
0
65V RL = 1kV 0
5V 65V
–90
CLOSED-LOOP GAIN (NORMALIZED) – dB

–90

CLOSED-LOOP GAIN (NORMALIZED) – dB

1 3V –180
1 5V –180
GAIN
GAIN 3V
0 –270
0 –270
–1
–1
VS = 615V
–2
VS = 615V –2
65V
–3
65V –3
–4 5V 5V
–4
–5 3V 3V
–5
–6
1 10 100 1000 –6
FREQUENCY – MHz 1 10 100 1000
FREQUENCY – MHz
Figure 35. Closed-Loop Gain and Phase vs. Frequency,
Figure 38. Closed-Loop Gain and Phase vs. Frequency,
Gain = –1, RL = 150 Ω
Gain = –10, RL = 1 kΩ

130
100
G = –1
120 G = –10
RL = 150V 90
RL = 1kV
110 RF = 681V
80
PEAKING # 1.0dB
–3dB BANDWIDTH – MHz

RF = 357V
–3dB BANDWIDTH – MHz

100 70
RF = 715V
90
60
RF = 154V RF = 649V
80 50
PEAKING # 0.2dB
70 40
60
30
50 20
40
10
30
0 2 4 6 8 10 12 14 16 18 20 0
0 2 4 6 8 10 12 14 16 18 20
SUPPLY VOLTAGE – 6Volts
SUPPLY VOLTAGE – 6Volts

Figure 36. –3 dB Bandwidth vs. Supply Voltage, Figure 39. –3 dB Bandwidth vs. Supply Voltage,
Gain = –1, RL = 150 Ω Gain = –10, RL = 1 kΩ

REV. B –11–
AD812
General Considerations To estimate the –3 dB bandwidth for closed-loop gains or feed-
The AD812 is a wide bandwidth, dual video amplifier which back resistors not listed in the above table, the following two
offers a high level of performance on less than 5.5 mA per am- pole model for the AD812 many be used:
plifier of quiescent supply current. It is designed to offer out-
standing performance at closed-loop inverting or noninverting
G
gains of one or greater. ACL =
Built on a low cost, complementary bipolar process, and achiev- (
S2 
)
 RF + GrIN CT 
( )
 + S RF + GrIN CT + 1
ing bandwidth in excess of 100 MHz, differential gain and phase  2πf 2 
errors of better than 0.1% and 0.1° (into 150 Ω), and output where: ACL = closed-loop gain
current greater than 40 mA, the AD812 is an exceptionally G = 1 + RF /RG
efficient video amplifier. Using a conventional current feedback rIN = input resistance of the inverting input
architecture, its high performance is achieved through careful CT = “transcapacitance,” which forms the open-loop
attention to design details. dominant pole with the tranresistance
Choice of Feedback and Gain Resistors RF = feedback resistor
Because it is a current feedback amplifier, the closed-loop band- RG = gain resistor
width of the AD812 depends on the value of the feedback resis- f2 = frequency of second (nondominant) pole
tor. The bandwidth also depends on the supply voltage. In S = 2 πj f
addition, attenuation of the open-loop response when driving Appropriate values for the model parameters at different supply
load resistors less than about 250 Ω will affect the bandwidth. voltages are listed in Table II. Reasonable approximations for
Table I contains data showing typical bandwidths at different these values at supply voltages not found in the table can be
supply voltages for some useful closed-loop gains when driving a obtained by a simple linear interpolation between those tabu-
load of 150 Ω. (Bandwidths will be about 20% greater for load lated values which “bracket” the desired condition.
resistances above a few hundred ohms.)
The choice of feedback resistor is not critical unless it is impor- Table II. Two-Pole Model Parameters at Various
tant to maintain the widest, flattest frequency response. The Supply Voltages
resistors recommended in the table are those (metal film values)
that will result in the widest 0.1 dB bandwidth. In those appli- VS rIN (⍀) CT (pF) f2 (MHz)
cations where the best control of the bandwidth is desired, 1% ± 15 85 2.5 150
metal film resistors are adequate. Wider bandwidths can be ±5 90 3.8 125
attained by reducing the magnitude of the feedback resistor (at +5 105 4.8 105
the expense of increased peaking), while peaking can be reduced +3 115 5.5 95
by increasing the magnitude of the feedback resistor.
As discussed in many amplifier and electronics textbooks (such
Table I. –3 dB Bandwidth vs. Closed-Loop Gain and
as Roberge’s Operational Amplifiers: Theory and Practice), the
Feedback Resistor (RL = 150 Ω)
–3 dB bandwidth for the 2-pole model can be obtained as:
VS (V) Gain RF (⍀) BW (MHz) f3 = fN [1 – 2d2 + (2 – 4d2 + 4d4 )1/2]1/2
± 15 +1 866 145 where:
+2 715 100
1/ 2
+10 357 65  f2 
–1 715 100 fN =  
–10 357 60 (
 R + Gr
 F IN C ) 
T 

±5 +1 750 90 and:
+2 681 65
+10 154 45 d = (1/2) [f2 (RF + GrIN ) CT]1/2
–1 715 70 This model will predict –3 dB bandwidth within about 10 to
–10 154 45 15% of the correct value when the load is 150 Ω. However, it is
+5 +1 750 60 not an accurate enough to predict either the phase behavior or
+2 681 50 the frequency response peaking of the AD812.
+10 154 35 Printed Circuit Board Layout Guidelines
–1 715 50 As with all wideband amplifiers, printed circuit board parasitics
–10 154 35 can affect the overall closed-loop performance. Most important
for controlling the 0.1 dB bandwidth are stray capacitances at
+3 +1 750 50
the output and inverting input nodes. Increasing the space between
+2 681 40
signal lines and ground plane will minimize the coupling. Also,
+10 154 30
signal lines connecting the feedback and gain resistors should be
–1 715 40
kept short enough that their associated inductance does not
–10 154 25
cause high frequency gain errors.

–12– REV. B

Power Supply Bypassing
Adequate power supply bypassing can be very important when
optimizing the performance of high speed circuits. Inductance
in the supply leads can (for example) contribute to resonant
circuits that produce peaking in the amplifier’s response. In
addition, if large current transients must be delivered to a load,
then large (greater than 1 µF) bypass capacitors are required to
produce the best settling time and lowest distortion. Although
0.1 µF capacitors may be adequate in some applications, more
elaborate bypassing is required in other cases.
When multiple bypass capacitors are connected in parallel, it is
important to be sure that the capacitors themselves do not form
resonant circuits. A small (say 5 Ω) resistor may be required in
series with one of the capacitors to minimize this possibility.
As discussed below, power supply bypassing can have a signifi-
cant impact on crosstalk performance.
Achieving Low Crosstalk
Measured crosstalk from the output of amplifier 2 to the input
of amplifier 1 of the AD812 is shown in Figure 40. The crosstalk
from the output of amplifier 1 to the input of amplifier 2 is a few
dB better than this due to the additional distance between criti-
cal signal nodes.
A carefully laid-out PC board should be able to achieve the level
of crosstalk shown in the figure. The most significant contribu-
tors to difficulty in achieving low crosstalk are inadequate power
supply bypassing, overlapped input and/or output signal paths,
and capacitive coupling between critical nodes.
AD812
The input and output signal return paths must also be kept from
overlapping. Since ground connections are not of perfectly zero
impedance, current in one ground return path can produce a
voltage drop in another ground return path if they are allowed
to overlap.
Electric field coupling external to (and across) the package can
be reduced by arranging for a narrow strip of ground plane to be
run between the pins (parallel to the pin rows). Doing this on
both sides of the board can reduce the high frequency crosstalk
by about 5 dB or 6 dB.
Driving Capacitive Loads
When used with the appropriate output series resistor, any load
capacitance can be driven without peaking or oscillation. In
most cases, less than 50 Ω is all that is needed to achieve an
extremely flat frequency response. As illustrated in Figure 44,
the AD812 can be very attractive for driving largely capacitive
loads. In this case, the AD812’s high output short circuit
current allows for a 150 V/µs slew rate when driving a 510 pF
capacitor.
RF
+VS 0.1mF
1.0mF
RG
8
RS
AD812 VO

The bypass capacitors must be connected to the ground plane at VIN 4 1.0mF
CL RL
a point close to and between the ground reference points for the RT
two loads. (The bypass of the negative power supply is particu- 0.1mF
larly important in this regard.) There are two amplifiers in the
package, and low impedance signal return paths must be pro- –VS
vided for each load. (Using a parallel combination of 1 µF,
0.1 µF, and 0.01 µF bypass capacitors will help to achieve opti- Figure 41. Circuit for Driving a Capacitive Load
mal crosstalk.)

–10
VS = 65V
–20 G = +2
RL = 150V RF = 750V
–30 RL = 1kV
12 CL = 10pF
–40
CLOSED-LOOP GAIN – dB
CROSSTALK – dB

9
–50 RS = 0
6
–60 RS = 30V
3
–70
0 RS = 50V
–80
–3
–90
–6
–100

–110 1
100k 1M 10M 100M 10 100 1000
FREQUENCY – MHz
FREQUENCY – Hz

Figure 40. Crosstalk vs. Frequency Figure 42. Response to a Small Load Capacitor at ± 5 V

REV. B –13–
AD812
VS = 615V
1V 50ns
G = +2
RF = 750V
RL = 1kV 100
90 VIN
12

9
CLOSED-LOOP GAIN – dB

6
CL = 150pF, RS = 30V
3

0
10 VOUT
–3 0%
CL = 510pF, RS = 15V
–6 2V

–9
1 10 100 1000
FREQUENCY – MHz Figure 45. 6 dB Overload Recovery; G = 10, RL = 500 Ω,
VS = ± 5 V
Figure 43. Response to Large Load Capacitor, VS = ± 15 V

5V
100
90
10
0%
5V
Figure 44. Pulse Response of Circuit of Figure 41 with
CL = 510 pF, RL = 1 kΩ, RF = RG = 715 Ω, RS = 15 Ω
Overload Recovery
There are three important overload conditions to consider.
They are due to input common mode voltage overdrive, input
current overdrive, and output voltage overdrive. When the
amplifier is configured for low closed-loop gains, and its input
common-mode voltage range is exceeded, the recovery time will
be very fast, typically under 10 ns. When configured for a higher
In the case of high gains with very high levels of input overdrive,
100ns a longer recovery time may occur. For example, if the input
common-mode voltage range is exceeded in a gain of +10, the
VIN
recovery time will be on the order of 100 ns. This is primarily
due to current overloading of the input stage.
As noted in the warning under “Maximum Power Dissipation,”
a high level of input overdrive in a high noninverting gain circuit
can result in a large current flow in the input stage. For differ-
ential input voltages of less than about 1.25 V, this will be inter-
VOUT nally limited to less than 20 mA (decreasing with supply voltage).
For input overdrives which result in higher differential input
voltages, power dissipation in the input stage must be consid-
ered. It is recommended that external diode clamps be used in
cases where the differential input voltage is expected to exceed
1.25 V.
High Performance Video Line Driver
At a gain of +2, the AD812 makes an excellent driver for a back-
terminated 75 Ω video line. Low differential gain and phase
errors and wide 0.1 dB bandwidth can be realized over a wide
range of power supply voltage. Outstanding gain and group
delay matching are also attainable over the full operating supply
voltage range.
RG RF

gain, and overloaded at the output, the recovery time will also
+VS
be short. For example, in a gain of +10, with 6 dB of input 0.1mF
overdrive, the recovery time of the AD812 is about 10 ns.
8 75V
75V CABLE
75V VOUT
CABLE AD812
VIN 4 75V

75V 0.1mF

–VS

Figure 46. Gain of +2 Video Line Driver (RF = RG from

Table I)

–14– REV. B
 AD812

PHASE SHIFT – Degrees

90 0.4
PHASE G = +2
0 0.3 G = +2
RL = 150V RL = 150V
–90 0.2
3V 5V VS = 615V

NORMALIZED GAIN – dB
1 –180 0.1
GAIN 65V
0 –270 0
CLOSED-LOOP GAIN – dB

–1 5V
–0.1
3V
–2 VS = 615V –0.2
VS = 615V
–3 –0.3
65V 65V
–4 –0.4
5V
–5 –0.5
3V
–6 –0.6
1 10 100 1000 100k 1M 10M 100M
FREQUENCY –MHz FREQUENCY – Hz

Figure 47. Closed-Loop Gain and Phase vs. Frequency for Figure 50. Fine-Scale Gain Flatness vs. Frequency,
the Line Driver Gain = +2, RL = 150 Ω

120 1.0
G = +2 RF = 590V G = +2
110 RL = 150V 0.8
RF = 715V RL = 150V
100 VS = 3V
RF = 750V 0.6
PEAKING # 1dB RF = 681V
–3dB BANDWIDTH – MHz

90 GAIN MATCH – dB 0.4

80 0.2
NO PEAKING
70 0

60 VS = 615V
–0.2
RF = 715V
50 –0.4

40 –0.6

30 –0.8

20 –1.0
0 2 4 6 8 10 12 14 16 18 20 1 10 100 1000
SUPPLY VOLTAGE – 6Volts FREQUENCY – MHz

Figure 48. –3 dB Bandwidth vs. Supply Voltage, Figure 51. Closed-Loop Gain Matching vs. Frequency,
Gain = +2, RL = 150 Ω Gain = +2, RL = 150 Ω

DELAY
0.06
DIFFERENTIAL GAIN – %

8
3V
6 5V
0.04
4 65V
DIFFERENTIAL GAIN
615V
GROUP DELAY – ns

0.08 0.02 2
DIFFERENTIAL PHASE – Degrees

0.06 DELAY MATCHING

0.4
DIFFERENTIAL PHASE
0.04 0.2
VS = 3V TO 615V
0
0.02
–0.2

–0.4
0 100k 1M 10M 100M
5 6 7 8 9 10 11 12 13 14 15 FREQUENCY – Hz
SUPPLY VOLTAGE – 6Volts
Figure 52. Group Delay and Group Delay Matching vs.
Figure 49. Differential Gain and Phase vs. Supply Voltage, Frequency, G = +2, RL = 150 Ω
Gain = +2, RL = 150 Ω

REV. B –15–
AD812
Operation Using a Single Supply 90

PHASE SHIFT – Degrees

The AD812 will operate with total supply voltages from 36 V PHASE
0
down to 2.4 V. With proper biasing (see Figure 53), it can be an VS = 5V
outstanding single supply video amplifier. Since the input and 0.5
GAIN
–90

output voltage ranges extend to within 1 volt of the supply rails, 0 –180

CLOSED-LOOP GAIN – dB
it will handle a 1.3 V p-p signal on a single 3.3 V supply, or a
–0.5 –270
3 V p-p signal on a single 5 V supply. The small signal, 0.1 dB

C1859b–0–9/98
bandwidths will exceed 10 MHz in either case, and the large –1.0

signal bandwidths will exceed 6 MHz. –1.5

The capacitively coupled cable driver in Figure 53 will achieve –2.0

outstanding differential gain and phase errors of 0.07% and 0.06 –2.5
degrees respectively on a single 5 V supply. Resistor R2, in this
–3.0
circuit, is selected to optimize the differential gain and phase by
operating the amplifier in its most linear region. To optimize the –3.5
1 10 100 1000
circuit for a 3 V supply, a value of 8 kΩ is recommended for R2. FREQUENCY – MHz

649V 649V
Figure 54. Closed-Loop Gain and Phase vs. Frequency,
Circuit of Figure 53
C3 R3
30mF 1kV
+VS
C2
1mF 1V 50ns
R1
COUT 75V
9kV 8 100
47mF 75V CABLE VIN
90
C1 VOUT
2mF AD812
VIN 4 75V
R2
11.8kV

VOUT
Figure 53. Biasing for Single Supply Operation 10
0%

500mV

Figure 55. Pulse Response of the Circuit of Figure 53 with

VS = 5 V

OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).

8-Lead Plastic DIP 8-Lead Plastic SOIC

(N-8) (SO-8)

0.39 (9.91) 0.1968 (5.00)

0.1890 (4.80)
8 5 PRINTED IN U.S.A.
0.25
8 5
(6.35) 0.1574 (4.00) 0.2440 (6.20)
1 4
0.325 (8.25) 0.1497 (3.80) 1 4 0.2284 (5.80)
0.300 (7.62)
PIN 1 0.060 (1.52)
0.015 (0.38) 0.195 (4.95)
0.165 60.01 PIN 1 0.0688 (1.75) 0.0196 (0.50)
(4.19 60.25) 0.115 (2.93)
0.0098 (0.25) 0.0532 (1.35) 3 458
0.0099 (0.25)
0.125 (3.18) 0.0040 (0.10)
MIN
SEATING 0.015 (0.381)
0.018 60.003 0.10 0.033 (0.84) 0.008 (0.204) 88
PLANE 0.0500 0.0192 (0.49)
(0.46 +0.08) (2.54) NOM 08 0.0500 (1.27)
BSC SEATING (1.27) 0.0098 (0.25)
PLANE BSC 0.0138 (0.35) 0.0075 (0.19) 0.0160 (0.41)

–16– REV. B