Quanta r33 R1a 20110831 Schematics PDF

1 2 3 4 5 6 7 8
R33 INTEL UMA/DISCRETE SYSTEM DIAGRAM 01

+3V/+5V S5
PG.35
A
+1.05V_VTT A
PG.38 SODIMM1 DDR3 INTEL

CPU Core Max. 4GB
PG.12
Channel A
IVY AMD
PG.40~41
37.5mm X 37.5mm PCI-E x8 Thames XT HDMI PG.25
DDR3 SODIMM2 DDR3 989pin PGA 29mm X 29mm
PG.37 Max. 4GB CRT
PG.13
Channel B TDP 35W TDP 25W PG.24
VCCSA
PG.2~5 PG.14~20 LVDS PG.23
PG.36 DDR3 900MHz
FDI DMI
B Charge VRAM B
PG.34 128Mx16x8,128bit PG.21~22

Dis-Charge SATA0
HDD PG.32
PG.39
+VGACORE SATA1
ODD PG.32
INTEL PCH DP Port B
PG.42
+1.0V_VGA Panther Point CRT
PG.43 LVDS
PCI-E x 1
LANE2 LANE1
USB 3.0 USB3.0 Ports Webcam
C
LAN WLAN USB 2.0 X2
C
RTL8105EH BT COMBO PORT10 PG.28 PG.23

10/100 PG.29 PG.33 USB 2.0 PORT1,2 PORT4
PORT0,1
PCI-E x 1
LANE3 Stackup
PG.6~11
USB2.0 Ports
Accelerometer Card Reader PG.28 TOP
PG.33 RTS5229 GND
SMBUS PG.26
IN1
KBC LPC IN2
Speaker
EnE KB3930QF A2 PG.27
D
PG.30 AUDIO VCC D
CODEC HP/MIC BOT

KB PG.31 TPPG.31 ROM FANPG.32 PG.28
PG.30
IDT 92HD87 PROJECT : R33
ICT Analog MIC Quanta Computer Inc.
PG.27 PG.28
Size Document Number Rev
Custom 1A
NB5 BLOCK DIAGRAM
Date: Wednesday, September 07, 2011 Sheet 1 of 43
1 2 3 4 5 6 7 8
5 4 3 2 1
Ivy Bridge Processor (DMI,PEG,FDI)

U22A
PEG_ICOMPI J22
J21
PEG_COMP PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.
Ivy Bridge Processor (CLK,MISC,JTAG)
U22B
02
PEG_ICOMPO PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.
<6> DMI_TXN0 B27 DMI_RX#[0] PEG_RCOMPO H22
B25 A28 CLK_CPU_BCLKP
<6> DMI_TXN1 DMI_RX#[1] PEG_RX#[0..7] <14> BCLK CLK_CPU_BCLKP <8>
MISC
CLOCKS
A25 C26 A27 CLK_CPU_BCLKN
<6> DMI_TXN2 DMI_RX#[2] <7> H_SNB_IVB# PROC_SELECT# BCLK# CLK_CPU_BCLKN <8>
B24 K33 PEG_RX#0
<6> DMI_TXN3 DMI_RX#[3] PEG_RX#[0]
M35 PEG_RX#1
PEG_RX#[1] PEG_RX#2 SKTOCC#
<6> DMI_TXP0 B28 DMI_RX[0] PEG_RX#[2] L34 SNB_IVB# N.A at SNB EDS #27637 0.7v1 TP79 AN34 SKTOCC#
D B26 J35 PEG_RX#3 A16 CLK_DPLL_SSCLKP D
<6> DMI_TXP1 DMI_RX[1] PEG_RX#[3] DPLL_REF_CLK CLK_DPLL_SSCLKP <8>
DMI
A24 J32 PEG_RX#4 A15 CLK_DPLL_SSCLKN
<6> DMI_TXP2 DMI_RX[2] PEG_RX#[4] PEG_RX#5 DPLL_REF_CLK# CLK_DPLL_SSCLKN <8>
<6> DMI_TXP3 B23 DMI_RX[3] PEG_RX#[5] H34
H31 PEG_RX#6
PEG_RX#[6] PEG_RX#7 TP_CATERR#
<6> DMI_RXN0 G21 DMI_TX#[0] PEG_RX#[7] G33 TP77 AL33 CATERR#
<6> DMI_RXN1 E22 DMI_TX#[1] PEG_RX#[8] G30
<6> DMI_RXN2 F21 DMI_TX#[2] PEG_RX#[9] F35 Placement close to EC.
THERMAL
<6> DMI_RXN3 D21 DMI_TX#[3] PEG_RX#[10] E34
E32 <30> EC_PECI R217 43_4 H_PECI AN33 R8 CPU_DRAMRST#
PEG_RX#[11] PECI SM_DRAMRST#
<6> DMI_RXP0 G22 D33 close to VR side
DDR3
MISC
DMI_TX[0] PEG_RX#[12]
<6> DMI_RXP1 D22 DMI_TX[1] PEG_RX#[13] D31
F20 B33
PCI EXPRESS* - GRAPHICS

<6> DMI_RXP2 DMI_TX[2] PEG_RX#[14]
C21 C32 PEG_RX[0..7] <14> <30,40> H_PROCHOT# R177 56.2/F_4H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R167 140/F_4
<6> DMI_RXP3 DMI_TX[3] PEG_RX#[15] PROCHOT# SM_RCOMP[0]
Intel DG. A5 SM_RCOMP_1 R393 25.5/F_4
PEG_RX0 C33 SM_RCOMP[1] SM_RCOMP_2 R392 200/F_4
PEG_RX[0] J33 SM_RCOMP[2] A4
L35 PEG_RX1
PEG_RX[1] PEG_RX2 43P/50V_4
PEG_RX[2] K34 AN32 THERMTRIP# SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
A21 H35 PEG_RX3
<6> FDI_TXN0 FDI0_TX#[0] PEG_RX[3] PEG_RX4
SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
<6> FDI_TXN1 H19 FDI0_TX#[1] PEG_RX[4] H32
E19 G34 PEG_RX5 R191 *0_4/S PM_THRMTRIP#_R SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
<6> FDI_TXN2 FDI0_TX#[2] PEG_RX[5] <9,30> PM_THRMTRIP#
F18 G31 PEG_RX6
Intel(R) FDI
<6> FDI_TXN3 FDI0_TX#[3] PEG_RX[6]

B21 F33 PEG_RX7 AP29 XDP_PRDY#
<6> FDI_TXN4 FDI1_TX#[0] PEG_RX[7] PRDY# TP40
C20 F30 AP27 XDP_PREQ# TP46 CPU XDP
<6> FDI_TXN5 FDI1_TX#[1] PEG_RX[8] PREQ#
<6> FDI_TXN6 D18 FDI1_TX#[2] PEG_RX[9] E35
E17 E33 AR26 XDP_TCLK
<6> FDI_TXN7 FDI1_TX#[3] PEG_RX[10] TCK TP43
PWR MANAGEMENT
XDP_TMS
JTAG & BPM

PEG_RX[11] F32 TMS AR27 TP44
D34 <6> PM_SYNC R448 *0_4/S PM_SYNC_R AM34 AP30 XDP_TRST#
TP45
PEG_RX[12] PM_SYNC TRST#
<6> FDI_TXP0 A22 FDI0_TX[0] PEG_RX[13] E31
G19 C33 reserved for "boot hang 47" issue C708 *0.1U/10V_4 AR28 XDP_TDI_R TP87
<6> FDI_TXP1 FDI0_TX[1] PEG_RX[14] TDI
E20 B32 AP26 XDP_TDO
C <6> FDI_TXP2 FDI0_TX[2] PEG_RX[15] TDO TP41 C
G18 <9> H_PWRGOOD R453 *0_4/S H_PWRGOOD_R AP33
<6> FDI_TXP3 FDI0_TX[3] UNCOREPW RGOOD
B20 M29 C_PEG_TX#0 R445 *1K_4
<6> FDI_TXP4 FDI1_TX[0] PEG_TX#[0] +3V
C19 M32 C_PEG_TX#1 R447 10K_4
<6> FDI_TXP5 FDI1_TX[1] PEG_TX#[1]
D19 M31 C_PEG_TX#2 AL35 XDP_DBRST#
<6> FDI_TXP6 FDI1_TX[2] PEG_TX#[2] DBR# XDP_DBRST# <6>
F17 L32 C_PEG_TX#3 PM_DRAM_PWRGD_R V8
<6> FDI_TXP7 FDI1_TX[3] PEG_TX#[3] SM_DRAMPW ROK
L29 C_PEG_TX#4
PEG_TX#[4] C_PEG_TX#5 R463 *75/F_4 XDP_BPM0
<6> FDI_FSYNC0 J18 FDI0_FSYNC PEG_TX#[5] K31 +1.05V_VTT BPM#[0] AT28 TP82
J17 K28 C_PEG_TX#6 AR29 XDP_BPM1
<6> FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] BPM#[1] TP80
J30 C_PEG_TX#7 U26 AR30 XDP_BPM2
H20
PEG_TX#[7]
J28
CPU RESET# 3 4 CPU_PLTRST# R457 *43_4 CPU_PLTRST#_R AR33
BPM#[2]
AT30 XDP_BPM3
TP83
TP86
<6> FDI_INT FDI_INT PEG_TX#[8] GND OUT RESET# BPM#[3]
H29 AP32 XDP_BPM4
PEG_TX#[9] +3VS5 BPM#[4] TP42
J19 G27 2 AR31 XDP_BPM5
<6> FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] <8,14,26,29,30,33> PLTRST# IN C735 BPM#[5] TP84
H17 E29 AT31 XDP_BPM6 TP81
<6> FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] BPM#[6]
F27 1 5 R460 AR32 XDP_BPM7
PEG_TX#[12] NC VCC BPM#[7] TP85
PEG_TX#[13] D28
F26 *74LVC1G07GW 750/F_4
PEG_TX#[14] 0.1U/10V_4
PEG_TX#[15] E25
eDP_COMP A18 eDP_COMPIO C_PEG_TX0 R461 1.5K/F_4 Ivy Bridge_rPGA_2DPC_Rev0p61
A17 eDP_ICOMPO PEG_TX[0] M28
INT_eDP_HPD_Q B16 M33 C_PEG_TX1
eDP_HPD PEG_TX[1]
PEG_TX[2] M30
L31
C_PEG_TX2
C_PEG_TX3 +3VS5 +3VS5
DDR3 DRAM RESET
PEG_TX[3] C_PEG_TX4
TP8 C15 eDP_AUX PEG_TX[4] L28
D15 K30 C_PEG_TX5 +1.5V_CPU R374 1K_4 R376 *0_4
TP10 eDP_AUX# PEG_TX[5] +1.5VSUS
eDP
K27 C_PEG_TX6
PEG_TX[6] C_PEG_TX7
PEG_TX[7] J29
C17 J27 R35 U7 C44 R375 1K_4 3 1 CPU_DRAMRST#
TP6 eDP_TX[0] PEG_TX[8] <12,13> DDR3_DRAMRST#
TP13 F16 H28 10K_4 1 5 0.1U/10V_4
eDP_TX[1] PEG_TX[9] NC VCC R44
TP5 C16 eDP_TX[2] PEG_TX[10] G28
G15 E28 PM_DRAM_PWRGD_PU 2 200/F_4 CPU_DRAMRST#_R Q30
TP14
2
B eDP_TX[3] PEG_TX[11] IN 2N7002 B
PEG_TX[12] F28
C18 D27 3 4 PM_DRAM_PWRGD_C R42 130/F_4 PM_DRAM_PWRGD_R R378 *0_4/S
TP7 eDP_TX#[0] PEG_TX[13] GND OUT <8,12,13> DRAMRST_CNTRL_PCH
TP9 E16 E26 R377
eDP_TX#[1] PEG_TX[14] R40 *74LVC1G07GW C563 4.99K/F_4
TP11 D16 eDP_TX#[2] PEG_TX[15] D25
TP12 F15 *0_4 R36 0.047U/10V_4
eDP_TX#[3]
RB500V-40 D8 PM_DRAM_PWRGD <6>
3
Ivy Bridge_rPGA_2DPC_Rev0p61 *39_4
R41 *0_4/S PM_DRAM_PWRGD_C

2 MAIN_ONG <4,39>
+1.05V_VTT <4,10,30,38,40>
eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils. R43
+1.5V_CPU <4>
*3K/F_4 Q8
eDP_COMP connect to PIN A17 W:12mils/S:15mils/L: 500mils.
SM_DRAMPWROK Processor Input. *2N7002
+3VS5
+3V
<6,7,8,9,10,23,33,35,38,39,42,43>
<6,7,8,9,10,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
1
DP & PEG Compensation
check Processor pull-up (CPU)
FDI disable PEG x16 disable (UMA only remove) R59 *10K_4 INT_eDP_HPD_Q
+1.05V_VTT
+1.05V_VTT
(DIS only stuff) <14> PEG_TX[0..7] <14> PEG_TX#[0..7]
H_PROCHOT#
XDP_TDO
R176
R186
62_4
51_4
+1.05V_VTT R395 24.9/F_4 eDP_COMP XDP_TMS R189 51_4
XDP_TDI_R R462 51_4
C_PEG_TX0 C596 0.1U/10V_4 PEG_TX0 C_PEG_TX#0 C599 0.1U/10V_4 PEG_TX#0 XDP_PREQ# R188 *51_4
A DEL C_PEG_TX1 C600 0.1U/10V_4 PEG_TX1 C_PEG_TX#1 C602 0.1U/10V_4 PEG_TX#1 eDP_COMPIO and ICOMPO signals should be shorted XDP_TCLK R187 51_4 A
C_PEG_TX2 C603 0.1U/10V_4 PEG_TX2 C_PEG_TX#2 C605 0.1U/10V_4 PEG_TX#2 XDP_TRST# R190 51_4
C_PEG_TX3 C607 0.1U/10V_4 PEG_TX3 C_PEG_TX#3 C614 0.1U/10V_4 PEG_TX#3 near balls and routed with typical impedance <25 mohms
C_PEG_TX4 C617 0.1U/10V_4 PEG_TX4 C_PEG_TX#4 C618 0.1U/10V_4 PEG_TX#4
C_PEG_TX5 C619 0.1U/10V_4 PEG_TX5 C_PEG_TX#5 C622 0.1U/10V_4 PEG_TX#5 R97 24.9/F_4 PEG_COMP
+1.05V_VTT
FDI_FSYNC can gang all these 4

PEG_ICOMPI and RCOMPO signals
PROJECT : R33
signals together and tie them should be routed within 500 mils typical Quanta Computer Inc.
with only one 1K resistor to GND impedance = 43 mohms PEG_ICOMPO
(DG V0.5 Ch2.2.9). signals should be routed within 500 mils Size Document Number Rev
0.22uF AC coupling Caps for PCIE GEN1/2/3 0.22uF AC coupling Caps for PCIE GEN1/2/3 Custom SNB 1/4 (PCIE&DMI&FDI) 1A
typical impedance = 14.5 mohms NB5
Date: Wednesday, August 31, 2011 Sheet 2 of 43
5 4 3 2 1
5 4 3 2 1
Ivy Bridge Processor (DDR3) 03

U22C U22D
D D
SA_CLK[0] AB6 M_A_CLKP0 <12> <13> M_B_DQ[63:0] SB_CLK[0] AE2 M_B_CLKP0 <13>
<12> M_A_DQ[63:0] SA_CLK#[0] AA6 M_A_CLKN0 <12> SB_CLK#[0] AD2 M_B_CLKN0 <13>
M_A_DQ0 C5 V9 M_B_DQ0 C9 R9
SA_DQ[0] SA_CKE[0] M_A_CKE0 <12> SB_DQ[0] SB_CKE[0] M_B_CKE0 <13>
M_A_DQ1 D5 M_B_DQ1 A7
M_A_DQ2 SA_DQ[1] M_B_DQ2 SB_DQ[1]
D3 SA_DQ[2] D10 SB_DQ[2]
M_A_DQ3 D2 M_B_DQ3 C8
D6 SA_DQ[4] SA_CLK[1] AA5 M_A_CLKP1 <12> A9 SB_DQ[4] SB_CLK[1] AE1 M_B_CLKP1 <13>
M_A_DQ5 C6 AB5 M_A_CLKN1 <12> M_B_DQ5 A8 AD1 M_B_CLKN1 <13>
M_A_DQ6 SA_DQ[5] SA_CLK#[1] M_B_DQ6 SB_DQ[5] SB_CLK#[1]
C2 SA_DQ[6] SA_CKE[1] V10 M_A_CKE1 <12> D9 SB_DQ[6] SB_CKE[1] R10 M_B_CKE1 <13>
M_A_DQ7 C3 M_B_DQ7 D8
F10 SA_DQ[8] G4 SB_DQ[8]
M_A_DQ9 F8 M_B_DQ9 F4
G10 SA_DQ[10] SA_CLK[2] AB4 F1 SB_DQ[10] SB_CLK[2] AB2
M_A_DQ11 G9 AA4 M_B_DQ11 G1 AA2
F9 SA_DQ[12] SA_CKE[2] W9 G5 SB_DQ[12] SB_CKE[2] T9
M_A_DQ13 F7 M_B_DQ13 F5
G8 SA_DQ[14] F2 SB_DQ[14]
M_A_DQ15 G7 M_B_DQ15 G2
K4 SA_DQ[16] SA_CLK[3] AB3 J7 SB_DQ[16] SB_CLK[3] AA1
M_A_DQ17 K5 AA3 M_B_DQ17 J8 AB1
K1 SA_DQ[18] SA_CKE[3] W 10 K10 SB_DQ[18] SB_CKE[3] T10
M_A_DQ19 J1 M_B_DQ19 K9
J5 SA_DQ[20] J9 SB_DQ[20]
M_A_DQ21 J4 M_B_DQ21 J10
J2 SA_DQ[22] SA_CS#[0] AK3 M_A_CS#0 <12> K8 SB_DQ[22] SB_CS#[0] AD3 M_B_CS#0 <13>
M_A_DQ23 K2 AL3 M_A_CS#1 <12> M_B_DQ23 K7 AE3 M_B_CS#1 <13>
M_A_DQ24 SA_DQ[23] SA_CS#[1] M_B_DQ24 SB_DQ[23] SB_CS#[1]
M8 SA_DQ[24] SA_CS#[2] AG1 M5 SB_DQ[24] SB_CS#[2] AD6
M_A_DQ25 N10 AH1 M_B_DQ25 N4 AE6
M_A_DQ26 SA_DQ[25] SA_CS#[3] M_B_DQ26 SB_DQ[25] SB_CS#[3]
N8 SA_DQ[26] N2 SB_DQ[26]
C M_A_DQ27 N7 M_B_DQ27 N1 C
M10 SA_DQ[28] M4 SB_DQ[28]
M_A_DQ29 M9 AH3 M_B_DQ29 N5 AE4
SA_DQ[29] SA_ODT[0] M_A_ODT0 <12> SB_DQ[29] SB_ODT[0] M_B_ODT0 <13>
DDR SYSTEM MEMORY B

M_A_DQ30 N9 AG3 M_B_DQ30 M2 AD4
DDR SYSTEM MEMORY A
SA_DQ[30] SA_ODT[1] M_A_ODT1 <12> SB_DQ[30] SB_ODT[1] M_B_ODT1 <13>
M_A_DQ31 M7 AG2 M_B_DQ31 M1 AD5
M_A_DQ32 SA_DQ[31] SA_ODT[2] M_B_DQ32 SB_DQ[31] SB_ODT[2]
AG6 SA_DQ[32] SA_ODT[3] AH2 AM5 SB_DQ[32] SB_ODT[3] AE5
M_A_DQ33 AG5 M_B_DQ33 AM6
AK6 SA_DQ[34] AR3 SB_DQ[34]
M_A_DQ35 AK5 M_B_DQ35 AP3
AH5 SA_DQ[36] M_A_DQSN[7:0] <12> AN3 SB_DQ[36] M_B_DQSN[7:0] <13>
M_A_DQ37 AH6 C4 M_A_DQSN0 M_B_DQ37 AN2 D7 M_B_DQSN0
M_A_DQ38 SA_DQ[37] SA_DQS#[0] M_A_DQSN1 M_B_DQ38 SB_DQ[37] SB_DQS#[0] M_B_DQSN1
AJ5 SA_DQ[38] SA_DQS#[1] G6 AN1 SB_DQ[38] SB_DQS#[1] F3
M_A_DQ39 AJ6 J3 M_A_DQSN2 M_B_DQ39 AP2 K6 M_B_DQSN2
AJ8 SA_DQ[40] SA_DQS#[3] M6 AP5 SB_DQ[40] SB_DQS#[3] N3
M_A_DQ41 AK8 AL6 M_A_DQSN4 M_B_DQ41 AN9 AN5 M_B_DQSN4
AJ9 SA_DQ[42] SA_DQS#[5] AM8 AT5 SB_DQ[42] SB_DQS#[5] AP9
M_A_DQ43 AK9 AR12 M_A_DQSN6 M_B_DQ43 AT6 AK12 M_B_DQSN6
AH8 SA_DQ[44] SA_DQS#[7] AM15 AP6 SB_DQ[44] SB_DQS#[7] AP15
M_A_DQ45 AH9 M_B_DQ45 AN8
AL9 SA_DQ[46] AR6 SB_DQ[46]
M_A_DQ47 AL8 M_B_DQ47 AR5
AP11 SA_DQ[48] M_A_DQSP[7:0] <12> AR9 SB_DQ[48] M_B_DQSP[7:0] <13>
M_A_DQ49 AN11 D4 M_A_DQSP0 M_B_DQ49 AJ11 C7 M_B_DQSP0
M_A_DQ50 SA_DQ[49] SA_DQS[0] M_A_DQSP1 M_B_DQ50 SB_DQ[49] SB_DQS[0] M_B_DQSP1
AL12 SA_DQ[50] SA_DQS[1] F6 AT8 SB_DQ[50] SB_DQS[1] G3
M_A_DQ51 AM12 K3 M_A_DQSP2 M_B_DQ51 AT9 J6 M_B_DQSP2
AM11 SA_DQ[52] SA_DQS[3] N6 AH11 SB_DQ[52] SB_DQS[3] M3
M_A_DQ53 AL11 AL5 M_A_DQSP4 M_B_DQ53 AR8 AN6 M_B_DQSP4
AP12 SA_DQ[54] SA_DQS[5] AM9 AJ12 SB_DQ[54] SB_DQS[5] AP8
M_A_DQ55 AN12 AR11 M_A_DQSP6 M_B_DQ55 AH12 AK11 M_B_DQSP6
AJ14 SA_DQ[56] SA_DQS[7] AM14 AT11 SB_DQ[56] SB_DQS[7] AP14
B M_A_DQ57 AH14 M_B_DQ57 AN14 B
AL15 SA_DQ[58] AR14 SB_DQ[58]
M_A_DQ59 AK15 M_B_DQ59 AT14
AL14 SA_DQ[60] M_A_A[15:0] <12> AT12 SB_DQ[60] M_B_A[15:0] <13>
M_A_DQ61 AK14 AD10 M_A_A0 M_B_DQ61 AN15 AA8 M_B_A0
M_A_DQ62 SA_DQ[61] SA_MA[0] M_A_A1 M_B_DQ62 SB_DQ[61] SB_MA[0] M_B_A1
AJ15 SA_DQ[62] SA_MA[1] W1 AR15 SB_DQ[62] SB_MA[1] T7
M_A_DQ63 AH15 W2 M_A_A2 M_B_DQ63 AT15 R7 M_B_A2
SA_DQ[63] SA_MA[2] M_A_A3 SB_DQ[63] SB_MA[2] M_B_A3
SA_MA[3] W7 SB_MA[3] T6
V3 M_A_A4 T2 M_B_A4
SA_MA[4] M_A_A5 SB_MA[4] M_B_A5
SA_MA[5] V2 SB_MA[5] T4
W3 M_A_A6 T3 M_B_A6
<12> M_A_BS#0 AE10 SA_BS[0] SA_MA[7] W6 <13> M_B_BS#0 AA9 SB_BS[0] SB_MA[7] R2
AF10 V1 M_A_A8 AA7 T5 M_B_A8
<12> M_A_BS#1 SA_BS[1] SA_MA[8] <13> M_B_BS#1 SB_BS[1] SB_MA[8]
V6 W5 M_A_A9 R6 R3 M_B_A9
<12> M_A_BS#2 SA_BS[2] SA_MA[9] <13> M_B_BS#2 SB_BS[2] SB_MA[9]
AD8 M_A_A10 AB7 M_B_A10
SA_MA[11] V4 SB_MA[11] R1
W4 M_A_A12 T1 M_B_A12
<12> M_A_CAS# AE8 SA_CAS# SA_MA[13] AF8 <13> M_B_CAS# AA10 SB_CAS# SB_MA[13] AB10
AD9 V5 M_A_A14 AB8 R5 M_B_A14
<12> M_A_RAS# SA_RAS# SA_MA[14] <13> M_B_RAS# SB_RAS# SB_MA[14]
<12> M_A_WE# AF9 V7 M_A_A15 <13> M_B_WE# AB9 R4 M_B_A15
SA_W E# SA_MA[15] SB_W E# SB_MA[15]
Ivy Bridge_rPGA_2DPC_Rev0p61 Ivy Bridge_rPGA_2DPC_Rev0p61
A A
PROJECT : R33
Quanta Computer Inc.
Custom SNB 2/4 (DDR3 I/F) 1A
NB5
5 4 3 2 1
5 4 3 2 1
SNB: 55A +VCC_CORE

U22F POWER
Ivy Bridge Processor (POWER)
SNB: 8.5A 22uF_8 x2 Socket TOP cavity U22G

POWER
R162 100/F_4 +VCC_GFX
VCC_AXG_SENSE <40>
VSS_AXG_SENSE <40>
04
+1.05V_VTT 22uF_8 x2 Socket BOT cavity R166 100/F_4
IVY: 8.5A
SENSE
LINES
22uF_8 x4 Socket TOP edge
IVY: 55A AG35 VCC1 AT24 VAXG1 VAXG_SENSE AK35
AG34 VCC2 VCCIO1 AH13 22uF_8 x4 Socket BOT edge AT23 VAXG2 VSSAXG_SENSE AK34
AG33 VCC3 VCCIO2 AH10 470uF_7343 x2 AT21 VAXG3 CAD Note: +VDDR_REF_CPU should
AG32 AG10 AT20 +VDDR_REF_CPU
C638 C682 C637 VCC4 VCCIO3 C165 C156 C626 VAXG4 have 10 mil trace width
AG31 VCC5 VCCIO4 AC10 AT18 VAXG5
D 22U/6.3VS_8 10U/6.3VS_6 22U/6.3VS_8 AG30 Y10 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 AT17 D
VCC6 VCCIO5 +VCC_GFX VAXG6
AG29 VCC7 VCCIO6 U10 SNB: 21.5A AR24 VAXG7
AG28 VCC8 VCCIO7 P10 AR23 VAXG8
AG27 VCC9 VCCIO8 L10 AR21 VAXG9 1 3 DDR_VTTREF <12,13,37>
AG26 VCC10 VCCIO9 J14 AR20 VAXG10
AF35 J13 AR18 AL1 R192 Q18
VCC11 VCCIO10 C271 C207 C184 C669 C273 VAXG11 SM_VREF 100K_4 2N7002
AF34 J12 AR17
2
VCC12 VCCIO11 VAXG12
VREF
C80 C67 C193 AF33 J11 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 22U/6.3V_8 22U/6.3V_8 AP24
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 VCC13 VCCIO12 VAXG13 MAIND
AF32 VCC14 VCCIO13 H14 AP23 VAXG14 MAIND <39>
AF31 VCC15 VCCIO14 H12 AP21 VAXG15
AF30 VCC16 VCCIO15 H11 AP20 VAXG16 SA_DIMM_VREFDQ B4 SMDDR_VREF_DQ0_M3 <12>
AF29 VCC17 VCCIO16 G14 AP18 VAXG17 SB_DIMM_VREFDQ D1 SMDDR_VREF_DQ1_M3 <13>
AF28 VCC18 VCCIO17 G13 AP17 VAXG18
PEG AND DDR

AF27 G12 C155 C227 C666 C305 C324 AN24
VCC19 VCCIO18 *22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 22U/6.3V_8 22U/6.3V_8 VAXG19
AF26 VCC20 VCCIO19 F14 AN23 VAXG20
C664 C196 C272 AD35 F13 AN21 R391 R386
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 VCC21 VCCIO20 VAXG21 *1K_4 *1K_4
AD34 VCC22 VCCIO21 F12 AN20 VAXG22
DDR3 -1.5V RAILS

AD33 VCC23 VCCIO22 F11 AN18 VAXG23
AD32 VCC24 VCCIO23 E14 AN17 VAXG24
GRAPHICS
AD31 VCC25 VCCIO24 E12 AM24 VAXG25 VDDQ1 AF7
C677 C218 C88 C304 C670 +1.5V_CPU
AD30 VCC26 AM23 VAXG26 VDDQ2 AF4 SNB: 5A
AD29 E11 *22U/6.3VS_8 *22U/6.3VS_8 *22U/6.3VS_8 22U/6.3V_8 22U/6.3V_8 AM21 AF1
VCC27 VCCIO25 VAXG27 VDDQ3
AD28 VCC28 VCCIO26 D14 AM20 VAXG28 VDDQ4 AC7
C699 C53 C639 AD27 D13 AM18 AC4
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 VCC29 VCCIO27 VAXG29 VDDQ5
AD26 VCC30 VCCIO28 D12 AM17 VAXG30 VDDQ6 AC1
AC35 D11 AL24 Y7 C320 C226 C310 C275
VCC31 VCCIO29 VAXG31 VDDQ7 10U/6.3V_6 10U/6.3V_8 10U/6.3V_6 10U/6.3V_6
AC34 VCC32 VCCIO30 C14 5/14 modify AL23 VAXG32 VDDQ8 Y4
AC33 C13 C635 C94 C302 C325 C249 AL21 Y1
VCC33 VCCIO31 22U/6.3VS_8 *22U/6.3VS_8 *22U/6.3VS_8 22U/6.3V_8 22U/6.3V_8 VAXG33 VDDQ9
AC32 VCC34 VCCIO32 C12 AL20 VAXG34 VDDQ10 U7
AC31 VCC35 VCCIO33 C11 AL18 VAXG35 VDDQ11 U4
C C691 AC30 B14 AL17 U1 C
VCC36 VCCIO34 VAXG36 VDDQ12
1
C199 *10U/6.3V_6S C58 AC29 B12 AK24 P7
22U/6.3VS_8 22U/6.3VS_8 VCC37 VCCIO35 VAXG37 VDDQ13 +
AC28 VCC38 VCCIO36 A14 AK23 VAXG38 VDDQ14 P4
AC27 A13 AK21 P1 C209 C341 C737
VCC39 VCCIO37 C188 C652 C247 C668 C250 VAXG39 VDDQ15 10U/6.3V_6 10U/6.3V_6 *330U_2.5V_5.0x5.9_ESR10m
AC26 A12 AK20
2
VCC40 VCCIO38 *22U/6.3VS_8 22U/6.3VS_8 *22U/6.3VS_8 22U/6.3V_8 22U/6.3V_8 VAXG40
AA35 VCC41 VCCIO39 A11 AK18 VAXG41
AA34 VCC42 AK17 VAXG42
AA33 VCC43 VCCIO40 J23 AJ24 VAXG43 330uF x1, 10uF_8 x6 Socket BOT edge.
AA32 VCC44 AJ23 VAXG44
C160 C277 C303 AA31 AJ21
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 VCC45 VAXG45
AA30 VCC46 AJ20 VAXG46
C657 C645 C168 C274 C671 +VCCSA
AA29 VCC47 AJ18 VAXG47 SNB: 6A
AA28 *22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 22U/6.3V_8 22U/6.3V_8 AJ17 M27
SA RAIL
VCC48 VAXG48 VCCSA1
AA27 VCC49 AH24 VAXG49 VCCSA2 M26
AA26 VCC50 AH23 VAXG50 VCCSA3 L26
CORE SUPPLY
Y35 VCC51 AH21 VAXG51 VCCSA4 J26

Y34 22uF_8 x7 Socket TOP cavity AH20 J25 C625 C579 C630 C571
C248 C233 C179 VCC52 VAXG52 VCCSA5 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 *10U/6.3V_8
Y33 VCC53 22uF_8 x5 Socket BOT cavity AH18 VAXG53 VCCSA6 J24
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 Y32 AH17 H26
VCC54 22uF_8 x2 Socket TOP cavity (no stuff) VAXG54 VCCSA7
Y31 VCC55 VCCSA8 H25
Y30 VCC56
22uF_8 x5 Socket BOT cavity (no stuff) 330uF x1, 10uF_8 x1 Socket BOT edge,
Y29 VCC57 330uF_7343 x2 10uF_8 x2 Socket BOT cavity.
Y28 +1.05V_VTT
VCC58
Y27 VCC59
1.8V RAIL
Y26 VCC60
C684 C222 C576 V35 VCC61 VCCSA_SENSE H23 VCCUSA_SENSE_R R85 *0_4/S VCCUSA_SENSE <36>
SVID
*22U/6.3VS_8 *22U/6.3VS_8 22U/6.3VS_8 H_CPU_SVIDALRT# +1.8V

V34 VCC62 VIDALERT# AJ29
H_CPU_SVIDCLK
SNB: 1.5A
V33 VCC63 VIDSCLK AJ30 VCCSA_SEL0 <36>
V32 AJ28 H_CPU_SVIDDAT B6
VCC64 VIDSOUT VCCPLL1
MISC
V31 VCC65 A6 VCCPLL2 VCCSA_VID[0] C22 VCCSA_SEL0 R71 10K_4
1
B V30 A2 C24 VCCSA_SEL B
VCC66 VCCPLL3 VCCSA_VID[1] VCCSA_SEL <36>
V29 C55 C51 C50 + C65 R73 10K_4
VCC67 10U/6.3V_8 1U/6.3V_4 1U/6.3V_4 *330u_2.5V_3528
V28 VCC68
C192 C678 C253 V27
2
22U/6.3VS_8 10U/6.3VS_6 22U/6.3VS_8 VCC69 VTTVID1 R389 0_4
V26 VCC70 VCCIO_SEL A19 H_VTTVID1 <38>
U35 VCC71 330uF x1, 10uF_8 x1, 1uF_4 x2
U34 VCC72 Socket BOT edge.
U33 Ivy Bridge_rPGA_2DPC_Rev0p61
VCC73
U32 VCC74
U31 +1.5V_CPU R50 *0_8/S +1.5V
C695 VCC75
U30 VCC76
C573 C572 *10U/6.3V_6S U29 40mile routing
22U/6.3VS_8 22U/6.3VS_8 VCC77
U28 VCC78
U27 VCC79
U26 VCC80 Layout note: need routing SVID CLK +1.5VSUS +1.5V_CPU +1.5VSUS
R35 VCC81
R34 together and ALERT need
VCC82 C582 0.1U/10V_4
22uF_8 x8 Socket TOP cavity R33 VCC83 between CLK and DATA.
22uF_8 x10 Socket BOT cavity R32 VCC84 Q10
R31 C580 0.1U/10V_4
22uF_8 x8 Socket TOP edge VCC85 H_CPU_SVIDCLK AON7410
R30 VCC86 VR_SVID_CLK <40>
470uF_7343 x4 R29 VCC87
R157 100_4 +VCC_CORE 1 R229 C574 0.1U/10V_4
SENSE LINES
R28 5 2 220_8
VCC88 C577 0.1U/10V_4
R27 VCC89 VCC_SENSE AJ35 VCC_SENSE <40> 3
R26 AJ34 +1.05V_VTT +1.05V_VTT
VCC90 VSS_SENSE VSS_SENSE <40> SVID DATA
3
P35 VCC91
P34 R160 100_4 Placement close to CPU.
4
VCC92 MAIND
P33 VCC93
P32 B10 VCCP_SENSE VCCP_SENSE <38> Place PU resistor Place PU resistor 2 MAIN_ONG <2,39>
VCC94 VCCIO_SENSE R172 R175
P31 VCC95 VSS_SENSE_VCCIO A10 close to CPU close to VR
A P30 VSSP_SENSE 130/F_4 *130/F_4 C54 Q22 A
VCC96 VSSP_SENSE <38>
P29 *470P/50V_4 2N7002
VCC97 H_CPU_SVIDDAT
P28 Trace Route to Power IC area. VR_SVID_DATA <40>
CPU VDDQ
1
VCC98
P27 VCC99
+1.5V <10,12,33> P26 VCC100 Place PU resistor close to CPU
+1.8V <7,10,38,43>
+VCCSA <36>
+1.05V_VTT C352 0.1U/10V_4
SVID ALERT PROJECT : R33
+1.5VSUS <2,10,12,13,37,43>
+1.5V_CPU <2>
Ivy Bridge_rPGA_2DPC_Rev0p61
VCCP_SENSE R394 10/F_4 +1.05V_VTT R170 75/F_4 Quanta Computer Inc.
+VCC_GFX <41>
VSSP_SENSE R390 10/F_4
+1.05V_VTT <2,10,30,38,40>
H_CPU_SVIDALRT# R171 43_4 VR_SVID_ALERT# <40> Size Document Number Rev
+VCC_CORE <41>
Custom SNB 3/4 (POWER) 1A
NB5
5 4 3 2 1
5 4 3 2 1
AT35
U22H
Ivy Bridge Processor (GND)
AJ22
U22I
Ivy Bridge Processor (RESERVED, CFG)
U22E
05
VSS1 VSS81
AT32 VSS2 VSS82 AJ19 For CPU debug.
AT29 VSS3 VSS83 AJ16 T35 VSS161 VSS234 F22 VCC_DIE_SENSE AH27 VCC_DIE_SENSE TP35
AT27 AJ13 T34 F19 TP39 CFG0 AK28 AH26 VSS_DIE_SENSE
VSS4 VSS84 VSS162 VSS235 CFG[0] VSS_DIE_SENSE TP31
AT25 VSS5 VSS85 AJ10 T33 VSS163 VSS236 E30 TP37 AK29 CFG[1]
AT22 AJ7 T32 E27 CFG2 AL26
VSS6 VSS86 VSS164 VSS237 CFG[2] R158
AT19 VSS7 VSS87 AJ4 T31 VSS165 VSS238 E24 TP38 AL27 CFG[3]
D AT16 AJ3 T30 E21 CFG4 AK26 L7 *0_4 D
VSS8 VSS88 VSS166 VSS239 CFG5 CFG[4] RSVD28
AT13 VSS9 VSS89 AJ2 T29 VSS167 VSS240 E18 AL29 CFG[5] RSVD29 AG7
AT10 AJ1 T28 E15 CFG6 AL30 AE7 For Sandy Bridge R122 stuff
VSS10 VSS90 VSS168 VSS241 CFG7 CFG[6] RSVD30
AT7 VSS11 VSS91 AH35 T27 VSS169 VSS242 E13 AM31 CFG[7] RSVD31 AK2 For Ivy Bridge R122 no stuff
AT4 VSS12 VSS92 AH34 T26 VSS170 VSS243 E10 AM32 CFG[8]
CFG
AT3 VSS13 VSS93 AH32 P9 VSS171 VSS244 E9 AM30 CFG[9] RSVD32 W8
AR25 VSS14 VSS94 AH30 P8 VSS172 VSS245 E8 AM28 CFG[10]
AR22 VSS15 VSS95 AH29 P6 VSS173 VSS246 E7 AM26 CFG[11]
AR19 VSS16 VSS96 AH28 P5 VSS174 VSS247 E6 AN28 CFG[12] RSVD33 AT26
AR16 VSS17 VSS98 AH25 P3 VSS175 VSS248 E5 AN31 CFG[13] RSVD34 AM33
AR13 VSS18 VSS99 AH22 P2 VSS176 VSS249 E4 AN26 CFG[14] RSVD35 AJ27
AR10 VSS19 VSS100 AH19 N35 VSS177 VSS250 E3 AM27 CFG[15]
AR7 VSS20 VSS101 AH16 N34 VSS178 VSS251 E2 AK31 CFG[16]
AR4 VSS21 VSS102 AH7 N33 VSS179 VSS252 E1 AN29 CFG[17]
AR2 VSS22 VSS103 AH4 N32 VSS180 VSS253 D35
AP34 VSS23 VSS104 AG9 N31 VSS181 VSS254 D32 INTEL DG
AP31 VSS24 VSS105 AG8 N30 VSS182 VSS255 D29 RSVD37 T8
AP28 VSS25 VSS106 AG4 N29 VSS183 VSS256 D26 RSVD38 J16
AP25 AF6 N28 D20 R168 *0_4 AJ31 H16
VSS26 VSS107 VSS184 VSS257 TP36 VAXG_VAL_SENSE RSVD39
AP22 AF5 N27 D17 R161 *0_4 AH31 G16
VSS27 VSS108 VSS185 VSS258 TP34 VSSAXG_VAL_SENSE RSVD40
AP19 VSS28 VSS109 AF3 N26 VSS186 VSS259 C34 TP32 AJ33 VCC_VAL_SENSE
AP16 VSS29 VSS110 AF2 M34 VSS187 VSS260 C31 TP33 AH33 VSS_VAL_SENSE
AP13 VSS30 VSS111 AE35 L33 VSS188 VSS261 C28
AP10 VSS31 VSS112 AE34 L30 VSS189 VSS262 C27
AP7 VSS32 VSS113 AE33 L27 VSS190 VSS263 C25 AJ26 RSVD5 RSVD41 AR35
RESERVED
AP4 VSS33 VSS114 AE32 L9 VSS191 VSS264 C23 RSVD42 AT34
AP1 VSS34 VSS115 AE31 L8 VSS192 VSS265 C10 RSVD43 AT33
AN30 VSS35 VSS116 AE30 L6 VSS193 VSS266 C1 RSVD44 AP35
AN27 VSS36 VSS117 AE29 L5 VSS194 VSS267 B22 RSVD45 AR34
AN25 AE28 L4 B19
C AN22
AN19
VSS37
VSS38
VSS39
VSS VSS118
VSS119
VSS120
AE27
AE26
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15 F25 RSVD8
C
AN16 VSS40 VSS121 AE9 L1 VSS198 VSS271 B13 F24 RSVD9

AN13 VSS41 VSS122 AD7 K35 VSS199 VSS272 B11 F23 RSVD10
AN10 VSS42 VSS123 AC9 K32 VSS200 VSS273 B9 D24 RSVD11 RSVD46 B34
AN7 VSS43 VSS124 AC8 K29 VSS201 VSS274 B8 G25 RSVD12 RSVD47 A33
AN4 VSS44 VSS125 AC6 K26 VSS202 VSS275 B7 G24 RSVD13 RSVD48 A34
AM29 VSS45 VSS126 AC5 J34 VSS203 VSS276 B5 E23 RSVD14 RSVD49 B35
AM25 VSS46 VSS127 AC3 J31 VSS204 VSS277 B3 D23 RSVD15 RSVD50 C35
AM22 VSS47 VSS128 AC2 H33 VSS205 VSS278 B2 C30 RSVD16
AM19 VSS48 VSS129 AB35 H30 VSS206 VSS279 A35 A31 RSVD17
AM16 VSS49 VSS130 AB34 H27 VSS207 VSS280 A32 B30 RSVD18
AM13 VSS50 VSS131 AB33 H24 VSS208 VSS281 A29 B29 RSVD19
AM10 VSS51 VSS132 AB32 H21 VSS209 VSS282 A26 D30 RSVD20 RSVD51 AJ32
AM7 VSS52 VSS133 AB31 H18 VSS210 VSS283 A23 B31 RSVD21 RSVD52 AK32
AM4 VSS53 VSS134 AB30 H15 VSS211 VSS284 A20 A30 RSVD22
AM3 VSS54 VSS135 AB29 H13 VSS212 VSS285 A3 C29 RSVD23
AM2 VSS55 VSS136 AB28 H10 VSS213
AM1 VSS56 VSS137 AB27 H9 VSS214 BCLK_ITP AN35 TP78
AL34 VSS57 VSS138 AB26 H8 VSS215 J20 RSVD24 BCLK_ITP# AM35 TP76
AL31 VSS58 VSS139 Y9 H7 VSS216 B18 RSVD25
AL28 VSS59 VSS140 Y8 H6 VSS217
AL19 VSS62 VSS143 Y3 H3 VSS220 J15 RSVD27 RSVD56 AT2
AL16 VSS63 VSS144 Y2 H2 VSS221 RSVD57 AT1
AL13 VSS64 VSS145 W 35 H1 VSS222 RSVD58 AR1
AL10 VSS65 VSS146 W 34 G35 VSS223
AL7 VSS66 VSS147 W 33 G32 VSS224
AL4 VSS67 VSS148 W 32 G29 VSS225
B AL2 W 31 G26 B1 B
VSS68 VSS149 VSS226 KEY
AK33 VSS69 VSS150 W 30 G23 VSS227
AK30 VSS70 VSS151 W 29 G20 VSS228
AK27 VSS71 VSS152 W 28 G17 VSS229
AK25 VSS72 VSS153 W 27 G11 VSS230
AK22 VSS73 VSS154 W 26 F34 VSS231
AK19 U9 F31 Ivy Bridge_rPGA_2DPC_Rev0p61
VSS74 VSS155 VSS232
AK16 VSS75 VSS156 U8 F29 VSS233
AK13 VSS76 VSS157 U6 For rPGA socket, RSVD59 pin should be left NC.
AK10 VSS77 VSS158 U5
AK7 VSS78 VSS159 U3
AK4 VSS79 VSS160 U2
AJ25 VSS80
Ivy Bridge_rPGA_2DPC_Rev0p61 Ivy Bridge_rPGA_2DPC_Rev0p61
CFG[6:5] (PCIE Port Bifurcation Straps)

The CFG signals have a default value of '1' if not terminated on the board.
Processor Strapping 11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
1 0 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
CFG2 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
A A
(PEG Static Lane Reversal) Normal Operation Lane Reversed CFG2 R184 *1K_4
CFG4 CFG4 R185 *1K_4
(DP Presence Strap) Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP CFG7 R181 *1K_4
PROJECT : R33
CFG7 PEG train immediately following PEG wait for BIOS training CFG5 R183 1K_4 Quanta Computer Inc.
(PEG Defer Training) xxRESETB de assertion CFG6 R179 1K_4
Custom SNB 4/4 (GND) 1A
NB5
5 4 3 2 1
5 4 3 2 1
<2> DMI_RXN0
Cougar Point/Panther Point (DMI,FDI,PM)
U32C
BC24
BE20
DMI0RXN FDI_RXN0 BJ14
AY14
FDI_TXN0 <2> <23>
Cougar Point/Panther Point (LVDS,DDI)
<23> LVDS_BLON
DISP_ON
J47
M45
U32D
L_BKLTEN
L_VDD_EN
SDVO_TVCLKINN
SDVO_TVCLKINP
AP43
AP45
06
<2> DMI_RXN1 DMI1RXN FDI_RXN1 FDI_TXN1 <2>
<2> DMI_RXN2 BG18 DMI2RXN FDI_RXN2 BE14 FDI_TXN2 <2> <23> DPST_PWM P45 L_BKLTCTL SDVO_STALLN AM42
<2> DMI_RXN3 BG20 DMI3RXN FDI_RXN3 BH13 FDI_TXN3 <2> SDVO_STALLP AM40
FDI_RXN4 BC12 FDI_TXN4 <2> <23> EDIDCLK T40 L_DDC_CLK
<2> DMI_RXP0 BE24 DMI0RXP FDI_RXN5 BJ12 FDI_TXN5 <2> <23> EDIDDATA K47 L_DDC_DATA SDVO_INTN AP39
<2> DMI_RXP1 BC20 DMI1RXP FDI_RXN6 BG10 FDI_TXN6 <2> SDVO_INTP AP40
D BJ18 BG9 R331 2.2K_4 L_CTRL_CLK T45 D
<2> DMI_RXP2 DMI2RXP FDI_RXN7 FDI_TXN7 <2> L_CTRL_CLK
<2> DMI_RXP3 BJ20 +3V R330 2.2K_4 L_CTRL_DATA P39
DMI3RXP L_CTRL_DATA
FDI_RXP0 BG14 FDI_TXP0 <2>
AW 24 BB14 R329 2.37K/F_4 LVDS_IBG AF37 P38
<2> DMI_TXN0 DMI0TXN FDI_RXP1 FDI_TXP1 <2> LVD_IBG SDVO_CTRLCLK SDVO_CLK <25>
<2> DMI_TXN1 AW 20 BF14 TP65 LVDS_VBG AF36 M39 SDVO_DATA <25>
DMI1TXN FDI_RXP2 FDI_TXP2 <2> LVD_VBG SDVO_CTRLDATA
<2> DMI_TXN2 BB18 DMI2TXN FDI_RXP3 BG13 FDI_TXP3 <2>
<2> DMI_TXN3 AV18 DMI3TXN FDI_RXP4 BE12 FDI_TXP4 <2> AE48 LVD_VREFH
INT. HDMI
DMI
FDI
FDI_RXP5 BG12 FDI_TXP5 <2> AE47 LVD_VREFL DDPB_AUXN AT49
<2> DMI_TXP0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_TXP6 <2> DDPB_AUXP AT47
<2> DMI_TXP1 AY20 BH9 AT40 DPB_HPD_Q
DMI1TXP FDI_RXP7 FDI_TXP7 <2> DDPB_HPD
<2> DMI_TXP2 AY18 DMI2TXP <23> TXLCLKOUT- AK39 LVDSA_CLK#
LVDS
AU18 AK40 AV42 DPB_LANE0_N
<2> DMI_TXP3 DMI3TXP <23> TXLCLKOUT+ LVDSA_CLK DDPB_0N
AW 16 AV40 DPB_LANE0_P
FDI_INT FDI_INT <2> DDPB_0P
AN48 AV45 DPB_LANE1_N
<23> TXLOUT0- LVDSA_DATA#0 DDPB_1N
BJ24 AV12 AM47 AV46 DPB_LANE1_P
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 <2> <23> TXLOUT1- LVDSA_DATA#1 DDPB_1P
Digital Display Interface

<23> TXLOUT2- AK47 AU48 DPB_LANE2_N
R567 49.9/F_4 DMI_COMP LVDSA_DATA#2 DDPB_2N DPB_LANE2_P
+1.05V BG25 DMI_IRCOMP FDI_FSYNC1 BC10 FDI_FSYNC1 <2> AJ48 LVDSA_DATA#3 DDPB_2P AU47
AV47 DPB_LANE3_N
R557 750/F_4 DMI_RBIAS DDPB_3N DPB_LANE3_P
BH21 DMI2RBIAS FDI_LSYNC0 AV14 FDI_LSYNC0 <2> <23> TXLOUT0+ AN47 LVDSA_DATA0 DDPB_3P AV49
<23> TXLOUT1+ AM49 LVDSA_DATA1
FDI_LSYNC1 BB10 FDI_LSYNC1 <2> <23> TXLOUT2+ AK49 LVDSA_DATA2
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
TP95 DDPC_CTRLDATA P42
A18 DSWVREN AF40

DSW VRMEN TP99 <23> TXUCLKOUT- LVDSB_CLK#
<23> TXUCLKOUT+ AF39 LVDSB_CLK DDPC_AUXN AP47
System Power Management

DDPC_AUXP AP49
SUS_PWR_ACK_R R540 *0_4/S SUSACK#_R C12 E22 R562 *0_4/S RSMRST# <23> TXUOUT0- AH45 AT38
SUSACK# DPW ROK LVDSB_DATA#0 DDPC_HPD
<23> TXUOUT1- AH47 LVDSB_DATA#1
<23> TXUOUT2- AF49 LVDSB_DATA#2 DDPC_0N AY47
C XDP_DBRST# K3 B9 PCIE_WAKE# AF45 AY49 C
<2> XDP_DBRST# SYS_RESET# W AKE# PCIE_WAKE# <29,33> LVDSB_DATA#3 DDPC_0P
DDPC_1N AY43
(+3V) <23> TXUOUT0+ AH43 LVDSB_DATA0 DDPC_1P AY45
SYS_PWROK R485 *0_4/S SYS_PWROK_R P12 N3 CLKRUN# PD Res place close to PCH AH49 BA47
SYS_PW ROK CLKRUN# / GPIO32 CLKRUN# <30> <23> TXUOUT1+ LVDSB_DATA1 DDPC_2N
<23> TXUOUT2+ AF47 LVDSB_DATA2 DDPC_2P BA48
(+3VS5) PCH to Res routeing 37.5 ohm Impedance. AF43 LVDSB_DATA3 DDPC_3N BB47
R478 *0_4/S EC_PWROK_R L22 G8 BB49
<18,30> EC_PWROK PW ROK SUS_STAT# / GPIO61 TP57 Res to connector filter routeing 50ohm Impedance. DDPC_3P
(+3VS5) <24> CRT_B
EC_PWROK_R R265 *0_4/S APWROK_R L10 N14 PCH_SUSCLK_L R304 *0_4/S R340 150/F_4 N48 M43
APW ROK SUSCLK / GPIO62 PCH_SUSCLK <30> CRT_BLUE DDPD_CTRLCLK
<24> CRT_G P49 CRT_GREEN DDPD_CTRLDATA M36
(+3VS5) TP62 R342 150/F_4 T49
PM_DRAM_PWRGD CRT_RED
<2> PM_DRAM_PWRGD B13 DRAMPW ROK SLP_S5# / GPIO63 D10 SLP_S5 <30> <24> CRT_R
R341 150/F_4 AT45
DDPD_AUXN
CRT
<24> DDCCLK T39 CRT_DDC_CLK DDPD_AUXP AT43
<30> RSMRST# RSMRST# C21 H4 R253 *0_4/S SUSC# <30> <24> DDCDATA M40 BH41
RSMRST# SLP_S4# CRT_DDC_DATA DDPD_HPD
(+3VS5) DDPD_0N BB43
R514 *0_4/S SUS_PWR_ACK_R K16 F4 R538 *0_4/S R354 33_4 PCH_HSYNC_R M47 BB45
<30> SUS_PWR_ACK SUSW ARN#/SUSPW RDNACK/GPIO30 SLP_S3# SUSB# <30> <24> HSYNC_COM CRT_HSYNC DDPD_0P
R352 33_4 PCH_VSYNC_R M49 BF44
<24> VSYNC_COM CRT_VSYNC DDPD_1N
DDPD_1P BE44
R560 *0_4/S DNBSWON#_R E20 G10 BF42
<30> DNBSWON# PW RBTN# SLP_A# TP56 DDPD_2N
R335 1K/F_4 DAC_IREF T43 BE42
DAC_IREF DDPD_2P
(DSW) Reserve from EMI request T42 CRT_IRTN DDPD_3N BJ42
R566 *0_4 AC_PRESENT_R H20 G16 BG42
<30> AC_PRESENT ACPRESENT / GPIO31 SLP_SUS# TP61 DDPD_3P
CRT_B
(+3VS5) CRT_G CPT_PPT_Rev_0p5
PM_BATLOW# E10 AP14 CRT_R
BATLOW # / GPIO72 PMSYNCH PM_SYNC <2>
(+3VS5)
B SYS_PWROK_R PM_RI# A10 K14 SLP_LAN# B
RI# SLP_LAN# / GPIO29 C531 C533 C532
C488
+3V_RTC <7,10>
*0.1U/10V_4 CPT_PPT_Rev_0p5 *5.6P/16V_4 *5.6P/16V_4 *5.6P/16V_4
+1.05V <7,8,10,36>
+3VPCU <7,23,30,31,34,35>
+3VS5 <2,7,8,9,10,23,33,35,38,39,42,43>
+3V <2,7,8,9,10,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
+5V <7,10,18,24,25,27,31,32,33,39>
Reserve for power on sequence
PCH Pull-high/low(CLG) INT HDMI disable (DIS only remove) DPWROK FOR DSW
+3VS5
System PWR_OK(CLG)
PM_RI# DPB_LANE0_N
Remove DSW power rail
R496 10K_4
IN_D2# <25>
DPB_LANE0_P
IN_D2 <25>
PM_BATLOW# R494 8.2K_4 INTEL DG DPB_LANE1_N R483 *0_4/S IMVP_PWRGD
DPB_LANE1_P IN_D1# <25>
IN_D1 <25>
PCIE_WAKE# R528 10K_4 DPB_LANE2_N
IN_D0# <25> +3VS5
DPB_LANE2_P
IN_D0 <25>
SLP_LAN# R314 *10K_4 DPB_LANE3_N C796 *0.1U/10V_4
IN_CLK# <25>
DPB_LANE3_P R559 330K_4 DSWVREN R558 *330K_4
IN_CLK <25> +3V_RTC
SUS_PWR_ACK R497 *10K_4
5
AC_PRESENT_R R561 10K_4 On Die DSW VR Enable
2
INT HDMI Detect Function SYS_PWROK 4
IMVP_PWRGD <40>
High = Enable (Default)
A +3V 1 EC_PWROK Low = Disable A
CLKRUN# R535 8.2K_4 U29 3

*TC7SH08FU
XDP_DBRST# R507 1K_4 INTEL DG R482
DPB_HPD_Q R600 *0_4/S 100K_4
HDMI_HPD_CON <25>
R530 *1K_4
PROJECT : R33
RSMRST# R565 10K_4
R484 *0_4
SYS_PWROK R486 *10K_4
Custom PCH 1/6 (DMI/FDI/VIDEO) 1A
NB5
5 4 3 2 1
5 4 3 2 1
TP97
TP98
RTC_X1
Cougar Point/Panther Point (HDA,JTAG,SATA)
A20
U32A
RTCX1 FW H0 /
FW H1 /
LAD0
LAD1
C38
A38
LAD0
LAD1
<30,33>
<30,33>
+1.8V
+1.05V
<4,10,38,43>
<6,8,10,36>
+3V_RTC <6,10>
RTC Clock 32.768KHz 07
LPC
RTC_X2 C20 B37 LAD2 <30,33>
RTCX2 FW H2 / LAD2 +3VPCU <23,30,31,34,35>
C37 C802 18P/50V_4 RTC_X1
FW H3 / LAD3 LAD3 <30,33> +3V <2,6,8,9,10,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
RTC_RST# D20 RTCRST# +V3.3A_1.5A_HDA_IO <10>
2
1
TP63 FW H4 / LFRAME# D36 LFRAME# <30,33> +5V <10,18,24,25,27,31,32,33,39>
SRTC_RST# G22 SRTCRST# PCH_DRQ#0 Y8 R564
LDRQ0# E36 TP67
RTC
R311 1M_4 SM_INTRUDER# K22 K36 PCH_DRQ#1 32.768KHZ 10M_4
D
+3V_RTC INTRUDER# LDRQ1# / GPIO23 TP66 D
(+3V)
3
4
PCH_INVRMEN C17 V5 SERIRQ R291 8.2K_4 +3V C803 18P/50V_4 RTC_X2
INTVRMEN SERIRQ
TP96 SERIRQ <30>
Reserve for EMI SATA0RXN AM3 SATA_RXN0 <32>
ACZ_BCLK N34 AM1
HDA_BCLK SATA0RXP SATA_RXP0 <32>
AP7
SATA 6G
ACZ_SYNC L34
SATA0TXN
AP5
SATA_TXN0 <32> HDD0 (SATA3 6.0Gb/s)
HDA_SYNC SATA0TXP SATA_TXP0 <32>
C529
*10P/50V_4 ACZ_SPKR T10 AM10
<27> ACZ_SPKR
ACZ_RST#
SPKR SATA1RXN
SATA1RXP AM8 RTC Circuitry(RTC) 30mils
K34 HDA_RST# SATA1TXN AP11
AP10 +3V_RTC
SATA1TXP
E34 AD7 R616 20K/F_4 RTC_RST#
<27> ACZ_SDIN0 HDA_SDIN0 SATA2RXN
SATA2RXP AD5
1
TP64 G34 HDA_SDIN1 SATA2TXN AH5
SATA2TXP AH4
C34 DG recommended that AC coupling capacitors should be C865 J6
HDA_SDIN2
IHDA
AB8 1U/6.3V_4 *SOLDERJUMPER-2
close to the connector (<100 mils) for optimal signal quality.
2
SATA3RXN
A34 HDA_SDIN3 SATA3RXP AB10
AF3 +3VPCU R623 *0_6/S +3V_RTC_2
SATA3TXN R615 20K/F_4 SRTC_RST#
SATA3TXP AF1
ACZ_SDOUT A36 +3V_RTC_0 R622 1K_4 +3V_RTC_1
HDA_SDO
1
SATA
SATA4RXN Y7 SATA_RXN4 <32>
1
+3VS5 R332 10K_4 (+3V) Y5
SATA4RXP SATA_RXP4 <32>
GPIO33 C36 AD3 CN26 D20 C869 C860 J5
HDA_DOCK_EN# / GPIO33 SATA4TXN
AD1
SATA_TXN4 <32> ODD (SATA1 1.5Gb/s) BAT_CONN BAT54C 1U/6.3V_4 1U/6.3V_4 *SOLDERJUMPER-2
(+3VS5) SATA_TXP4 <32>
2
SIO_EXT_SCI# SATA4TXP
<30> SIO_EXT_SCI# N32 DFWF02MS022
2
HDA_DOCK_RST# / GPIO13
SATA5RXN Y3
C 50273-0027N-001-2P-L C
SATA5RXP Y1
PCH_JTAG_TCK_R SATA5TXN AB3 RTC Power trace width 20mils. RTC_RST#
TP92 J3 AB1 R305 *0_6 SRTC_RST#
JTAG_TCK SATA5TXP
TP50 PCH_JTAG_TMS H7 Y11

JTAG_TMS SATAICOMPO
JTAG
PCH_JTAG_TDI_R K5 Y10 SATA_COMP R299 37.4/F_4

TP49 JTAG_TDI SATAICOMPI +1.05V
PCH JTAG Debug(CLG)
TP88 PCH_JTAG_TDO_R H1 JTAG_TDO
BIT_CLK_AUDIO HDA Bus(CLG)
SATA3RCOMPO AB12
R337 33_4 ACZ_BCLK +3VS5
+3VPCU
SATA3COMPI AB13 SATA3_COMP R301 49.9/F_4 EMI <27> BIT_CLK_AUDIO
C528
PCH_SPI_CLK T3 AH1 SATA3_RBIAS R521 750/F_4 *33P/50V_4 R336 33_4 ACZ_RST#
SPI_CLK SATA3RBIAS <27> ACZ_RST#_AUDIO
R533
*10K_4 PCH_SPI_CS0# Y14 R575 33_4 ACZ_SDOUT
SPI_CS0# <27> ACZ_SDOUT_AUDIO
SATA_LED# <28> R285 R255 R493
R516 0_4 PCH_SPI_CS1# T1 *210/F_4 *210/F_4 *210/F_4
<30> PCH_SPI_CS1_R# SPI_CS1#
SPI
P3 R517 10K_4 +3V +5V R590 10K_4

SATALED#
2
PCH_JTAG_TMS
PCH_SPI_SI (+3V) DGT_STOP# R277 *10K_4 PCH_JTAG_TDI_R
V4 SPI_MOSI SATA0GP / GPIO21 V14 +3V
(+3V) <27> ACZ_SYNC_AUDIO R594 33_4 1 3 ACZ_SYNC PCH_JTAG_TDO_R
PCH_SPI_SO U3 P1 BBS_BIT0 R505 *10K_4 PCH_JTAG_TCK_R
SPI_MISO SATA1GP / GPIO19 +3V
Q44
2N7002K
CPT_PPT_Rev_0p5 R579 R286 R279 R537 R510
1M_4 *100/F_4 *100/F_4 *100/F_4 *51_4
B
PCH Strap Table B
Pin Name Strap description Sampled Configuration Circuit Add for Intel leakage issue
Different from 0 = Default (weak pull-down 20K) ACZ_SPKR
SPKR No reboot mode setting PWROK 1 = Setting to No-Reboot mode R500 *1K_4
Calpella +3V
TP91 TP89TP94 TP48 PCH SPI ROM(CLG)
0 = "top-block swap" mode R584 *1K_4
PCI_GNT3# <8>
GNT3# / GPIO55 Top-Block Swap Override PWROK 1 = Default (weak pull-up 20K) +3V R595 10K_4
+3V
U31
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up PCH_INVRMEN R563 330K_4 +3V_RTC <30> PCH_SPI_CS0_R# R498 *0_4 PCH_SPI_CS0# 1 8
R548 0_4 PCH_SPI_CLK R555 0_4 6 CE# VDD
<30> PCH_SPI_CLK_R SCK
Flash Descriptor Security 0 = Override R572 0_4 <30> PCH_SPI_SI_R R554 0_4 PCH_SPI_SI R551 0_4 5
GPIO33 BIOS_WP# R490 0_4 PCH_SPI_SO R525 0_4 2 SI R553 3.3K_4
HDA_DOCK_EN#/GPIO33 Only for Interposer PWROK 1 = Default (weak pull-up 20K) 1 2 <30> PCH_SPI_SO_R SO HOLD# 7
[Need external pull-down for LPC BIOS] 3 W P# VSS 4

GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK GNT1# GNT0# Boot Location Default weak pull-up on GNT0/1# C795 C797 C798
1 1 SPI BBS_BIT0 *22P/50V_4 *22P/50V_4 EN25Q32B-104HIP 0.1U/10V_4
Different from 0 0 LPC R534 *1K_4
GPIO19 Boot BIOS Selection 0 [bit-0] PWROK R585 *1K_4 BBS_BIT1 <8>
Calpella
Should not be pull-down R524 3.3K_4 BIOS_WP#
+3V
GNT2# / GPIO53 ESI strap (Server only) PWROK (weak pull-up 20K) USE GPIO PIN TP90
Intel Anti-Theft HDD protection Vender Size P/N

NV_ALE Only for Interposer PWROK 0 = Disable (Internal pull-down 20kohm) +1.8V R547 *1K_4
NV_ALE <8>
EON 4MB AKE39ZN0Q02 (EN25Q32B-104HIP)
NV_CLE DMI Termination voltage PWROK weak pull-down 20kohm +1.8V R526 2.2K_4 R546 1K_4
NV_CLE <9>
H_SNB_IVB# <2> sandy/Ivy bridge Max 4MB AKE39FP0Z02 (MX25L3206EM2I-12G)
A 0 = Support by 1.8V (weak pull-down) R334 1K_4 ACZ_SYNC A
HDA_SYNC On-Die PLL VR Voltage Select RSMRST 1 = Support by 1.5V
+3VS5 Socket DFHS08FS023
0 = Default (weak pull-down 20K) ACZ_SDOUT
HDA_SDO Flash Descriptor Security PWROK 1 = Overridden R573 *1K_4 +V3.3A_1.5A_HDA_IO
<30> GPIO33_E
GPIO8 Integrated Clock Chip Enable RSMRST# Should be pull-down (weak pull-up 20K) PROJECT : R33
Different from 0 = Disable
R492 *1K_4
GPIO28 Calpella On-die PLL Voltage Regulator RSMRST# 1 = Enable (Default) PLL_ODVR_EN <9>
0 = Default (weak pull-down 20K) Size Document Number Rev

SPI_MOSI iTPM function Disable APWROK 1 = Enable PCH_SPI_SI R292 1K_4 Custom PCH 2/6 (SATA/HDA/SPI) 1A
+3V NB5
5 4 3 2 1
5 4 3 2 1
PCI/USBOC# Pull-up(CLG)
+3V
Cougar Point/Panther Point (PCI,USB,NVRAM)
BG26
U32E
RSVD1
RSVD2
AY7
AV7
AU3
<33> PCIE_RXN1
<33> PCIE_RXP1
Cougar Point/Panther Point(PCI-E,SMBUS,CLK)
BG34
BJ34
U32B
PERN1 (+3VS5)
E12 SMBALERT#
08
PCI_PIRQA# R349 8.2K_4 TP1 RSVD3 C519 0.1U/10V_4 PCIE_TXN1_C PERP1 SMBALERT# / GPIO11
PCI_PIRQB# R339 8.2K_4
BJ26
TP2 RSVD4
BG4 WLAN <33> PCIE_TXN1
C513 0.1U/10V_4 PCIE_TXP1_C
AV32
PETN1 SMB_PCH_CLK
BH25 TP3 <33> PCIE_TXP1 AU32 PETP1 SMBCLK H14
PCI_PIRQC# R338 8.2K_4 BJ16 AT10
PCI_PIRQD# R348 8.2K_4 TP4 RSVD5 SMB_PCH_DAT
BG16 BC8 <29> PCIE_RXN2_LAN BE34 C9
TP5 RSVD6 PERN2 SMBDATA
AH38 <29> PCIE_RXP2_LAN BF34
TP6 C517 0.1U/10V_4 PCIE_TXN2_LAN_C PERP2
+3V
AH37
TP7 RSVD7
AU2 LAN <29> PCIE_TXN2_LAN
C516 0.1U/10V_4 PCIE_TXP2_LAN_C
BB32
PETN2
AK43
TP8 RSVD8
AT4 <29> PCIE_TXP2_LAN AY32
PETP2 (+3VS5)
SMBUS
D RP9 AK45 AT3 A12 DRAMRST_CNTRL_PCH DRAMRST_CNTRL_PCH <2,12,13> D
ACC_LED# TP9 RSVD9 SML0ALERT# / GPIO60
10 1 C18 TP10 RSVD10 AT1 <26> PCIE_RXN3_CARD BG36 PERN3
MPC_PWR_CTRL# 9 2 ACCEL_INTH# N30 AY3 Cardreader <26> PCIE_RXP3_CARD BJ36 C8 SMB_ME0_CLK
BT_COMBO_EN# TP11 RSVD11 C524 0.1U/10V_4 PCIE_TXN3_CARD_C PERP3 SML0CLK
8 3 H3 TP12 RSVD12 AT5 <26> PCIE_TXN3_CARD AV34 PETN3
EDID_SELECT# 7 4 DGPU_SELECT# AH12 AV3 <26> PCIE_TXP3_CARD C523 0.1U/10V_4 PCIE_TXP3_CARD_C AU34 G12 SMB_ME0_DAT
LCD_BK TP13 RSVD13 PETP3 SML0DATA
6 5 AM4 TP14 RSVD14 AV1
AM5 TP15 RSVD15 BB1 BF36 PERN4
10K_10P8R_6 Y13 BA3 BE36 (+3VS5)
TP16 RSVD16 PERP4 SML1ALERT#_R
K24 TP17 RSVD17 BB5 AY34 PETN4 SML1ALERT# / PCHHOT# / GPIO74 C13 TP53
L24 BB3 BB34 (+3VS5)
+3VS5 TP18 RSVD18 PETP4 SMB_ME1_CLK
AB46
TP19 RSVD19
BB7 MPC Switch Control SML1CLK / GPIO58
E14
RP8
PCI-E*
AB45 BE8 BG37 (+3VS5)
TP20 RSVD20 PERN5
RSVD
10 1 USB_OC6# BD4 Low = MPC ON BH37 M16 SMB_ME1_DAT
USB_OC4# USB_OC0# RSVD21 PERP5 SML1DATA / GPIO75
9 2
RSVD22
BF6 MPC_PWR_CTRL# High = MPC OFF (Default) AY36
PETN5
USB_OC1# 8 3 PCH_AOCS# BB36
USB_OC2# USB_OC5# NV_ALE PETP5
7 4 B21 AV5 NV_ALE <7>
USB_OC3# TP21 RSVD23 MPC_PWR_CTRL# R582 *1K_4
6 5 M20 AV10 BJ38
TP22 RSVD24 PERN6
AY16 BG38
10K_10P8R_6 TP23 PERP6 CL_CLK_R
Controller
BG46 AT8 AU36 M7 TP54
TP24 RSVD25 PETN6 CL_CLK1
AV36 PETP6
AY5
RSVD26
Link
BA2 BG40 T11 CL_DAT_R TP51
RSVD27 PERN7 CL_DATA1
<28> USB30_RX1- BE28 TP25 USB30_RX1N BJ40 PERP7
<28> USB30_RX2- BC30 USB30_RX2N AT12 AY40
TP26 RSVD28 PETN7 CL_RST#_R
BE32 TP27 USB30_RX3N RSVD29 BF3 BB40 PETP7 CL_RST1# P10 TP60
BJ32 USB30_RX4N
TP28
<28> USB30_RX1+ BC28 USB30_RX1P BE38
TP29 PERN8
<28> USB30_RX2+ BE30 TP30 USB30_RX2P BC38 PERP8
BF32 USB30_RX3P AW38
TP31 PETN8
BG32 TP32 USB30_RX4P USBP0N C24 USBP0- <28> AY38 PETP8 (+3VS5)
<28> USB30_TX1- AV26
TP33 USB30_TX1N USBP0P
A24 USBP0+ <28> USB2.0 USB2.0/USB3.0 COMBO 1st
BB26 C25 M10 CLK_PEGA_REQ#
USB3.0 <28> USB30_TX2-
AU28
TP34 USB30_TX2N USBP1N
B25
USBP1- <28>
USB2.0 USB2.0/USB3.0 COMBO 2nd CLK_PCH_SRC0N Y40
PEG_A_CLKRQ# / GPIO47
C TP35 USB30_TX3N USBP1P USBP1+ <28> CLKOUT_PCIE0N C
AY30 C26 CLK_PCH_SRC0P Y39
TP36 USB30_TX4N USBP2N CLKOUT_PCIE0P
AU26 A26 AB37 CLK_PCH_PEGAN
<28> USB30_TX1+ TP37 USB30_TX1P USBP2P CLKOUT_PEG_A_N
CLK_PCIE_REQ0# CLK_PCH_PEGAP
CLOCKS
<28> USB30_TX2+ AY26 USB30_TX2P K28 J2 AB38
TP38 USBP3N PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
AV28 H28
TP39 USB30_TX3P USBP3P
AW30
TP40 USB30_TX4P USBP4N
E28 USBP4- <23> (+3VS5)
D28 Webcam CLK_PCH_SRC2N AB49 AV22 CLK_CPU_BCLKN <2>
USBP4P USBP4+ <23> CLKOUT_PCIE1N CLKOUT_DMI_N
C28 CLK_PCH_SRC2P AB47 AU22 CLK_CPU_BCLKP <2>
USBP5N CLKOUT_PCIE1P CLKOUT_DMI_P
A28
USBP5P CLK_PCIE_REQ1#
C29 M1
USBP6N PCIECLKRQ1# / GPIO18
B29 AM12 CLK_DPLL_SSCLKN <2>
PCI_PIRQA# USBP6P CLKOUT_DP_N
K40
PIRQA# USBP7N
N28 (+3V) CLKOUT_DP_P
AM13 CLK_DPLL_SSCLKP <2>
PCI_PIRQB# K38 M28 <26> CLK_PCIE_CARDN CLK_PCH_CARD2N AA48
PIRQB# USBP7P CLKOUT_PCIE2N
PCI
PCI_PIRQC# H38 L30 <26> CLK_PCIE_CARDP CLK_PCH_CARD2P AA47

PCI_PIRQD# PIRQC# USBP8N CLKOUT_PCIE2P CLK_BUF_PCIE_3GPLL#
G38 K30 BF18
PIRQD# USBP8P CLK_PCIE_REQ2# CLKIN_DMI_N CLK_BUF_PCIE_3GPLL
G30 USBP9- <28> <26> CLK_PCIE_REQ2# V10 BE18
BT_COMBO_EN# USBP9N PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
<33> BT_COMBO_EN# C46
REQ1# / GPIO50 (+3V) USBP9P
E30 USBP9+ <28> Right_USB
USB
DGPU_SELECT# C44 C30 (+3V)

EDID_SELECT# REQ2# / GPIO52 (+3V) USBP10N USBP10- <33>
CLK_BUF_BCLK_N
E40
REQ3# / GPIO54 (+3V) USBP10P
A30 USBP10+ <33> WLAN Y37
CLKOUT_PCIE3N CLKIN_GND1_N
BJ30
L32 Y36 BG30 CLK_BUF_BCLK_P
BBS_BIT1 USBP11N CLKOUT_PCIE3P CLKIN_GND1_P
<7> BBS_BIT1 D47 (+3V) K32
ACC_LED# GNT1# / GPIO51 USBP11P CLK_PCIE_REQ3#
<28> ACC_LED# E42 GNT2# / GPIO53 (+3V) USBP12N G32 A8 PCIECLKRQ3# / GPIO25
PCI_GNT3# F46 E32 CLK_33M_DEBUG G24 CLK_BUF_DREFCLK#
<7> PCI_GNT3# GNT3# / GPIO55 (+3V) USBP12P CLKIN_DOT_96N CLK_BUF_DREFCLK
USBP13N
C32 (+3VS5) CLKIN_DOT_96P
E24
A32 CLK_33M_KBC Y43
MPC_PWR_CTRL# USBP13P CLKOUT_PCIE4N
G42 (+3V) Y45
LCD_BK PIRQE# / GPIO2 CLKOUT_PCIE4P CLK_BUF_DREFSSCLK#
<23> LCD_BK G40 (+3V) AK7
PIRQF# / GPIO3 USB_BIAS C535 C534 CLK_PCIE_REQ4# CLKIN_SATA_N CLK_BUF_DREFSSCLK
<9> BOARD_ID3 C42 (+3V) C33 L12 AK5
ACCEL_INTH# PIRQG# / GPIO4 USBRBIAS# PCIECLKRQ4# / GPIO26 CLKIN_SATA_P
<33> ACCEL_INTH# D44 PIRQH# / GPIO5 (+3V) R571
*22P/50V_4 *22P/50V_4
(+3VS5) change 25M to small size
B33 22.6/F_4 V45 K45 CLK_PCH_14M
PCI_PME# USBRBIAS CLKOUT_PCIE5N REFCLK14IN
TP55 K10 PME# V46 CLKOUT_PCIE5P TP100
B PCI_PLTRST# C6 A14 USB_OC0# <9> BOARD_ID0 L14 H45 CLK_PCI_FB C813 33P/50V_4 B
PLTRST# (+3VS5) OC0# / GPIO59
K20 USB_OC1# PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK
(+3VS5) OC1# / GPIO40
B17 USB_OC2# (+3VS5)
CLK_PCI_TPM_R H49
(+3VS5) OC2# / GPIO41
C16 USB_OC3# AB42 V47 XTAL25_IN R587 Y9
TP102 CLKOUT_PCI0 (+3VS5) OC3# / GPIO42 CLKOUT_PEG_B_N XTAL25_IN
TP69 CLK_PCI_CARD_R H43 L16 USB_OC4# AB40 V49 XTAL25_OUT 1M_4 25MHZ
J48
CLKOUT_PCI1 (+3VS5) OC4# / GPIO43
A16 USB_OC5# CLKOUT_PEG_B_P XTAL25_OUT
R351 22_4 K42
CLKOUT_PCI2 (+3VS5) OC5# / GPIO9
D14 USB_OC6# CLK_PEGB_REQ# E6
<33> CLK_33M_DEBUG CLKOUT_PCI3 (+3VS5) OC6# / GPIO10 TP47 PEG_B_CLKRQ# / GPIO56
<30> CLK_33M_KBC R350 22_4 H40 C14 PCH_AOCS# C814 27P/50V_4
CLKOUT_PCI4 (+3VS5) OC7# / GPIO14 PCH_AOCS# <33>
(+3VS5) XCLK_RCOMP Y47 TP101
CLK_PCI_FB R353 22_4 <9> BOARD_ID1 V40
CPT_PPT_Rev_0p5 CLKOUT_PCIE6N
V42 CLKOUT_PCIE6P
CLK_PCI_FB_R XCLK_RCOMP R583 90.9/F_4
CLK_PCI_LPC_R
EMI
<9> BOARD_ID2
T13
PCIECLKRQ6# / GPIO45
+1.05V
RF
CLK_PCI_EC_R (+3V) CLK_PCH_14M
(+3VS5) CLK_FLEX0
V38 K43 TP68
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64
FLEX CLOCKS
V37 PCH_CLK_27M_1
CLKOUT_PCIE7P (+3V) CLK_FLEX1
CLKOUTFLEX1 / GPIO65 F47 TP70
PLTRST#(CLG) +3VS5 SMBus/Pull-up(CLG) CLK_REQ/Strap Pin(CLG) +3V
K12
PCIECLKRQ7# / GPIO46 (+3V)
H47 CLK_FLEX2 TP103 C530 C821
C480 0.01U/16V_4 (+3VS5) CLKOUTFLEX2 / GPIO66
TP59 AK14 (+3V) *22P/50V_4 *22P/50V_4
CLK_PCIE_REQ1# R515 10K_4 CLKOUT_ITPXDP_N CLK_FLEX3 R586 *22_4 PCH_CLK_27M_1
TP58 AK13 CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 K49
*2N7002K CLK_PCIE_REQ2# R293 10K_4 Rb
5
<13,30,33> MBCLK2 1 3 SMB_ME1_CLK CLK_PCH_ITPN Remove Ra, Rb for UMA &

2 +3VS5 CLK_PCH_ITPP CPT_PPT_Rev_0p5
PLTRST# Q25 R303 2.2K_4
SG. 27MHz support DIS only.
4
PCI_PLTRST# 1 CLK_PCIE_REQ0# R542 10K_4
2
+3V +3VS5 CLK_PCIE_REQ3# R495 10K_4

U19 CLK_PCIE_REQ4# R264 10K_4
PCIE Clock SMBus/Pull-up(CLG)
3
*TC7SH08FU R251 R308 2.2K_4 +3VS5

100K_4 CLK_PEGB_REQ# R269 10K_4
<13,30,33> MBDATA2 1 3 SMB_ME1_DAT CLK_PEGA_REQ# Ra R273 *10K_4 <33> CLK_PCIE_WLAN# CLK_PCH_SRC0N R541 1K_4 DRAMRST_CNTRL_PCH
CLK_PEGA_REQ# Rb R256 10K_4 WLAN <33> CLK_PCIE_WLAN CLK_PCH_SRC0P
Q26 CLK_PEGB_REQ# R270 *10K_4 R263 10K_4 SMBALERT#
A A
R266 *0_4/S PLTRST# PLTRST# <2,14,26,29,30,33> *2N7002K <33> PCIE_CLKREQ_WLAN# R509 *0_4/S CLK_PCIE_REQ0# R248 2.2K_4 SMB_PCH_CLK
SG : Rb ; UMA : Ra R513 2.2K_4 SMB_PCH_DAT
CLK_BUF_BCLK_N R325 10K_4 R531 2.2K_4 SMB_ME0_CLK
SMB_PCH_DAT 3 1 SMB_RUN_DAT <12,13> CLK_BUF_BCLK_P R323 10K_4 <29> CLK_PCIE_LANP CLK_PCH_SRC2P R298 2.2K_4 SMB_ME0_DAT
LAN <29> CLK_PCIE_LANN CLK_PCH_SRC2N R294 10K_4 SML1ALERT#_R
Q24 CLK_BUF_PCIE_3GPLL# R307 10K_4
2N7002K R250 4.7K_4 CLK_BUF_PCIE_3GPLL R306 10K_4 <29> PCIE_CLKREQ_LAN# R499 *0_4/S CLK_PCIE_REQ1#
2
+3V
R246 4.7K_4
CLK_BUF_DREFCLK#
CLK_BUF_DREFCLK
R321
R316
10K_4
10K_4
PROJECT : R33
2
CLK_BUF_DREFSSCLK# R290 10K_4 <14> CLK_PCIE_VGA# RP7 2 1 CLK_PCH_PEGAN

CLK_BUF_DREFSSCLK R289 10K_4 GPU <14> CLK_PCIE_VGA 0_4P2R_4 4 3 CLK_PCH_PEGAP
SMB_PCH_CLK 3 1 SMB_RUN_CLK <12,13> CLK_PCH_14M R343 10K_4
+1.05V <6,7,10,36>
Remove for UMA only. Size Document Number Rev
+3VS5 <2,6,7,9,10,23,33,35,38,39,42,43>
Q23 CLOCK TERMINATION for FCIM Custom PCH 3/6 (PCIE/USB/CLK) 1A
+3V <2,6,7,9,10,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
2N7002K NB5
5 4 3 2 1
5 4 3 2 1
<30> PCI_SERR# R252 *0_4/S S_GPIO

Cougar Point/Panther Point (GPIO,VSS_NCTF,RSVD)
T7
U32F
BMBUSY# / GPIO0 TACH4 / GPIO68 C40 GPIO68 R574 10K_4 +3V

Clock Gen Power OK (CLG)
09
SIO_EXT_SMI# (+3V) (+3V) GPIO69 R577 1.5K/F_4
<30> SIO_EXT_SMI# A42 TACH1 / GPIO1 TACH5 / GPIO69 B41
R578 *1.5K/F_4 +3V
BOARD_ID4 (+3V) (+3V) GPIO70
H36 TACH2 / GPIO6 TACH6 / GPIO70 C41
BOARD_ID5 (+3V) (+3V) GPIO71
E38 TACH3 / GPIO7 TACH7 / GPIO71 A40
D BT_OFF# (+3V) D
<33> BT_OFF# C10 GPIO8 (+3V)
LAN_DISABLE#_R C4
(+3VS5)
LAN_PHY_PW R_CTRL / GPIO12
RF_OFF# (+3VS5)
<33> RF_OFF# G2 GPIO15 A20GATE P4 EC_A20GATE <30>
(+3VS5) PECI AU16
Reserve <32> ODD_PRSNT# R543 *0_4 ODD_PRSNT#_R U2 SATA4GP / GPIO16 EC_RCIN#
RCIN# P5 EC_RCIN# <30>
(+3V)
GPIO
DGPU_PWROK D40 AY11
<18,30,42,43> DGPU_PWROK TACH0 / GPIO17 PROCPW RGD H_PWRGOOD <2>
CPU/MISC
BIOS_REC (+3V) PCH_THRMTRIP# R552 390_4
T5 AY10
SCLOCK / GPIO22 THRMTRIP# PM_THRMTRIP# <2,30> MFG-TEST GPIO Pull-up/Pull-down(CLG)
DGPU_HOLD_RST# E8
(+3V) T14
<14> DGPU_HOLD_RST# GPIO24 / MEM_LED INIT3_3V# +3V +3VS5
GPIO27 (+3VS5) NV_CLE
E16 GPIO27 DF_TVS AY1 NV_CLE <7> MFG_MODE R536 10K_4 DGPU_HOLD_RST# R268 10K_4
R491 *0_4/S PLL_ODVR_EN_R (DSW) LAN_DISABLE#_R R512 10K_4
<7> PLL_ODVR_EN P8 GPIO28
AH8 R518 *0_4
R508 10K_4 GPIO34 K1
(+3VS5) TS_VSS1
+3V STP_PCI# / GPIO34 +3V
(+3V) TS_VSS2 AK11
TP52 GPIO35 K4 GPIO35
(+3V) TS_VSS3 AH10
R271 *0_4/S DGPU_PWR_EN_R V8 SIO_EXT_SMI# R580 10K_4
<43> DGPU_PWR_EN SATA2GP / GPIO36
AK10 BT_OFF# R539 10K_4
FDI_OVRVLTG (+3V) TS_VSS4 EC_A20GATE R262 10K_4
M5 SATA3GP / GPIO37 EC_RCIN# R280 10K_4
MFG_MODE (+3V) GPIO49 R544 *10K_4
N2 SLOAD / GPIO38 NC_1 P37
GPIO70 R581 1.5K/F_4
C DGPU_PRSNT# M3
(+3V) +3V GPIO71 R576 1.5K/F_4 C
SDATAOUT0 / GPIO39 ODD_PRSNT#_R R532 10K_4
TEST_SET_UP V13
(+3V) BG2 S_GPIO R261 10K_4 DGPU_PWROK R346 10K_4
SDATAOUT1 / GPIO48 VSS_NCTF_15 R272 *0_4
GPIO49 V3
(+3V) BG48
TP93 SATA5GP / GPIO49 VSS_NCTF_16 DGPU_PWROK R347 *10K_4
SV_DET (+3V) GPIO27 R302 10K_4
D6 GPIO57 VSS_NCTF_17 BH3
(+3VS5)
VSS_NCTF_18 BH47
A4 VSS_NCTF_1 VSS_NCTF_19 BJ4
A45 BJ45 +3VS5

VSS_NCTF_3 VSS_NCTF_21 +3V
A46
NCTF BJ46 RF_OFF# R511 1K_4
VSS_NCTF_4 VSS_NCTF_22 R274 *0_4 BIOS_REC R257 10K_4
Intel ME Crypto Transport Layer
A6 VSS_NCTF_6 VSS_NCTF_24 BJ6 Security (TLS) cipher suite
BIOS RECOVERY High = Disable (Default)
B3 C2 Low = Disable (Default) Low = Enable
VSS_NCTF_7 VSS_NCTF_25 High = Enable
B47 VSS_NCTF_8 VSS_NCTF_26 C48
BD1 VSS_NCTF_9 VSS_NCTF_27 D1
BD49 VSS_NCTF_10 VSS_NCTF_28 D49

B BE1 E1 +3V +3V B
VSS_NCTF_11 VSS_NCTF_29
BE49 E49 R275 *0_4 TEST_SET_UP R258 10K_4 R295 100K_4 SV_DET R296 *10K_4
VSS_NCTF_12 VSS_NCTF_30
BF1 VSS_NCTF_13 VSS_NCTF_31 F1
SV_SET_UP TEST DETECT
BF49 VSS_NCTF_14 VSS_NCTF_32 F49
High = Strong (Default) Low = Default
+3VS5 <2,6,7,8,10,23,33,35,38,39,42,43>
CPT_PPT_Rev_0p5
+3V <2,6,7,8,10,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
+3V +3V
BOARD_ID0
BOARD ID SETTING <8>
<8>
<8>
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID1
BOARD_ID2
9/3 SI for H/W. DGPU_PWR_EN_R R260 *200K/F_4 R254 100K_4 FDI_OVRVLTG R278 *1K_4
<8> BOARD_ID3 BOARD_ID3

Low = Tx, Rx terminated to
DMI TERMINATION same voltage (DC Coupling Mode) FDI TERMINATION LOW - Tx, Rx terminated
VOLTAGE OVERRIDE (DEFAULT) VOLTAGE OVERRIDE to same voltage
BOARD_ID5 BOARD_ID4 BOARD_ID3 BOARD_ID2 BOARD_ID1 BOARD_ID0

RD0 BOARD_ID0
RU0
Model R549 *10K_4 R550 10K_4 +3VS5
RD1 BOARD_ID1
RU1
R33 UMA 0 0 0 0 0 0 R276 10K_4 R259 *10K_4
A A
RD2 RU2
R33 DIS 0 0 0 0 0 1 R284 10K_4 BOARD_ID2 R288 *10K_4 GFX Present +3V
RD3 RU3 Rb Ra
0 0 0 0 1 1 R356 10K_4 BOARD_ID3 R355 *10K_4 R506 *100K_4 DGPU_PRSNT# R529 10K_4
+3V
0 0 0 1 1 1 R596
RD4
10K_4 BOARD_ID4 R593
RU4
*10K_4 SG UMA
PROJECT : R33
Stuff Ra Rb
RD5 BOARD_ID5
RU5
0 0 0 0 0 0 R345 10K_4 R344 *10K_4
NC Rb Ra Size Document Number Rev
Custom PCH 4/6 (GPIO/MISC) 1A
NB5
5 4 3 2 1
5 4 3 2 1
1mA (10mils)
+3V
Cougar Point/Panther Point(POWER)
10
+VCCA_DAC_1_2
+1.05V R589 *0_8 COUGAR POINT/Panther Point (POWER) L61
U32J POWER +1.05V_VCCUSBCORE +1.05V 1.3 A (60mils) *HCB1608KF-181T15/1.5A_6
R315 *0_4/S
+VCCACLK AD49 VCCACLK VCCIO[29] N26 R588 *0_8/S +1.05V +1.05V_PCH_VCC U32G POWER +3V_LDO
+3VS5
VCCIO[30] P26
+VCCPDSW T16 C815 AA23 U48
VCCDSW3_3 1U/6.3V_4 VCCCORE[1] VCCADAC
3mA (10mils) VCCIO[31] P28 119mA (20mils) AC23 VCCCORE[2]
C487 C506 C500 AD21
CRT
C496 PCH_VCCDSW +3VS5 1U/6.3V_4 1U/6.3V_4 VCCCORE[3] C827 10U/6.3VS_6
V12 DCPSUSBYP VCCIO[32] T27 AD23 VCCCORE[4] VSSADAC U47
0.1U/10V_4 AF21
VCC CORE
*0.1U/10V_4 R319 *0_6/S VCCCORE[5] C819 0.1U/10V_4
VCCIO[33] T29 AF23 VCCCORE[6]
D
+3V_SUS_CLKF33 T38 AG21 D
VCC3_3[5] VCCCORE[7] C823 0.01U/25V_4
AG23 VCCCORE[8]
T23 +3V_VCCPUSB C501 AG24 AK36
VCCSUS3_3[7] 0.1U/10V_4 VCCCORE[9] VCCALVDS R597 *0_6
BH23 VCCAPLLDMI2 AG26 VCCCORE[10]
+1.05V +VCCAPLL_CPY_PCH T24 C497 C510 AG27 AK37 1mA (10mils)
L55 +VCCDPLL_CPY VCCSUS3_3[8] 10U/6.3VS_6 1U/6.3V_4 VCCCORE[11] VSSALVDS
AL29 VCCIO[14] AG29 VCCCORE[12]
V23 R318 *0_6/S AJ23 +VCCALVDS +3V
VCCSUS3_3[9] VCCCORE[13]
USB
LVDS
AJ26 VCCCORE[14] VCCTX_LVDS[1] AM37
*10uH/100mA_8 +VCCSUS1 AL24 V24 AJ27
C801 DCPSUS[3] VCCSUS3_3[10] C504 VCCCORE[15]
AJ29 VCCCORE[16] VCCTX_LVDS[2] AM38 60mA (10mils)
*10U/6.3V_6 P24 +3V_VCCAUBG 0.1U/10V_4 +1.05V +1.05V_PCH_VCCDPLL_EXP AJ31
C502 VCCSUS3_3[6] R309 VCCCORE[17] +VCC_TX_LVDS
VCCTX_LVDS[3] AP36
+1.05V *1U/6.3V_4 AA19 L59 +1.8V
R324 VCCASW[1] +VCCAUPLL R322 *0_6/S 0.1uH/250mA_8
VCCIO[34] T26 +1.05V VCCTX_LVDS[4] AP37
AA21 *0_6/S AN19
VCCASW[2] VCCIO[28]
*0_6/S AA24 M26 +5V_PCH_VCC5REFSUS +1.05V +1.05V_VCCAPLL_EXP C828 22U/6.3VS_8
VCCASW[3] V5REF_SUS L54 +3V_VCC_GIO
BJ22 VCCAPLLEXP
+1.05V +1.05V_VCCEPW 1.01A (60mils) AA26 C527 0.01U/25V_4
Clock and Miscellaneous

VCCASW[4] +VCCA_USBSUS C498 *1U/6.3V_4
DCPSUS[4] AN23 VCC3_3[6] V33
HVCMOS
AA27 *1uH/25mA_6 AN16 C525 0.01U/25V_4
VCCASW[5] +3V_VCCPSUS C800 VCCIO[15]
VCCSUS3_3[1] AN24
AA29 *10U/6.3V_6 AN17 +3V
C505 C511 C512 VCCASW[6] VCCIO[16] C853
VCC3_3[7] V34
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AA31 R608 *0_6/S
VCCASW[7] 0.1U/10V_4
AN21 VCCIO[17]
AC26 P34 +5V_PCH_VCC5REF
VCCASW[8] V5REF +1.05V AN26 VCCIO[18]
AC27 2.925 A (140mils) 42mA (10mils) +1.05V_VTT
VCCASW[9] +VCCAFDI_VRM
VCCSUS3_3[2] N20 AN27 VCCIO[19] VCCVRM[3] AT16
+1.1V_VCC_DMI +1.05V
PCI/GPIO/LPC
AC29 VCCASW[10]
C482 C481 N22 119mA (15mils) AP21
22U/6.3VS_8 22U/6.3VS_8 VCCSUS3_3[3] C520 C521 VCCIO[20] R501 *0_4
AC31 VCCASW[11]
P20 +3V_VCCPSUS R320 *0_6/S +3VS5 1U/6.3V_4 1U/6.3V_4 AP23 AT20 R503 0_4
VCCSUS3_3[4] VCCIO[21] VCCDMI[1]
AD29 VCCASW[12] +1.1V_VCC_DMI_CCI
DMI
C VCCSUS3_3[5] P22 AP24 VCCIO[22] C
VCCIO
AD31 C499 C495
VCCASW[13] 1U/6.3V_4 1U/6.3V_4
AP26 VCCIO[23] VCCCLKDMI AB36
W21 VCCASW[14] VCC3_3[1] AA16 266mA (20mils)
C503 C508 C509 AT24
+3V_VCCPCORE R267 *0_6/S 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 VCCIO[24] C833 C837
W23 VCCASW[15] VCC3_3[8] W16 +3V
1U/6.3V_4 *10U/6.3V_6
W24 VCCASW[16] VCC3_3[4] T34 +3V AN33 VCCIO[25]
C483 190 mA (15mils)
W26 0.1U/10V_4 +3V_VCC_EXP AN34 AG16
VCCASW[17] C790 +3V VCCIO[26] VCCDFTERM[1] +VCCP_NAND +1.8V
W29 0.1U/10V_4
VCCASW[18] R568 *0_8/S R282 *0_8/S
BH29 VCC3_3[3] VCCDFTERM[2] AG17
DFT / SPI
W31 VCCASW[19] VCC3_3[2] AJ2 +3V
R527 *0_6/S +VCCAFDI_VRM
+1.05V
W33 (Mobile 1.5V) 160mA (15mils) C807 AJ16 C492
VCCASW[20] C789 R598 *0_6/S 0.1U/10V_4 VCCDFTERM[3] 0.1U/10V_4
VCCIO[5] AF13 +1.5V
C792 0.1U/10V_4 AP16
1U/6.3V_4 C489 +VCCRTCEXT VCCVRM[2]
N16 DCPRTC VCCDFTERM[4] AJ17
0.1U/10V_4 AH13 +1.05V R599 *0_6 +VCCAFDI_VRM
VCCIO[12] +V1.05S_SATA3 R287 *0_8/S +1.05V BG6 VccAFDIPLL 20mA (10mils)
+1.05V R592 *0_6/S +VCCAFDI_VRM Y49 AH14 +1.05V_VCCAPLL_FDI
VCCVRM[4] VCCIO[13] +3V_VCCME_SPI +3V
160mA (20mils)
C484 +1.05V R545 *0_8 AP17
C817 +1.05V_VCCA_A_DPL 1U/6.3V_4 VCCIO[27] R502 *0_6/S
AF14 V1
FDI
1U/6.3V_4 VCCIO[6] R556 *0_8/S VCCSPI
65mA (10mils) BD47 VCCADPLLA
SATA
VCCAPLLSATA AK1 AU20 VCCDMI[2]

+1.05V_VCCA_B_DPL BF47 +V1.1LAN_VCCAPLL L53 +1.05V +1.05V_VCCDPLL_FDI C783
R591 *0_6/S VCCADPLLB *10uH/100mA_8 1U/6.3V_4
+1.05V 8mA (10mils)
AF11 +VCCAFDI_VRM +1.05V R520 0_4 CPT_PPT_Rev_0p5
+VCCDIFFCLK VCCVRM[1] C788
AF17 VCCIO[7]
C816 +VCCDIFFCLKN AF33 *10U/6.3V_6
1U/6.3V_4 VCCDIFFCLKN[1]
55mA (10mils) AF34 VCCDIFFCLKN[2] VCCIO[2] AC16
AG34 +1.05V_VTT R504 *0_4
VCCDIFFCLKN[3] +1.05V_VCCIO1 R281 *0_6/S
VCCIO[3] AC17 +1.05V
B B
+V1.05V_SSCVCC AG33 AD17
R310 *0_6 VCCSSC VCCIO[4] C493
+1.05V 95mA (10mils)
1.01A (60mils) 1U/6.3V_4
C490 +VCCSST V16
C494 0.1U/10V_4 DCPSST +1.05V_VCCEPW +1.05V 65mA (10mils)
*1U/6.3V_4 +5V_PCH_VCC5REF R326 10_4 +5V
T17 T21 L57 +1.05V_VCCA_A_DPL C818 1U/6.3V_4
+V1.05M_VCCSUS DCPSUS[1] VCCASW[22] 10uH/100MA_8 D12 RB500V-40
V19 DCPSUS[2] V5REF= 1mA +3V
R523 *0_4 C839 *220U/2.5V_3528 C514
+
MISC
+1.05V
+1.05V_VTT R519 0_4 +VTT_VCCPCPU V21 8mA (10mils) 1U/6.3V_4
VCCASW[23]
10mA (10mils)
CPU
BJ8 L56 +1.05V_VCCA_B_DPL C811 1U/6.3V_4

C784 C785 C786 V_PROC_IO +V3.3A_1.5A_HDA_IO 10uH/100MA_8
VCCASW[21] T19
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 C812 *220U/2.5V_3528 +5V_PCH_VCC5REFSUS R328 10_4
+
V_PROC_IO=1mA +5VS5
R569 *0_4
(10mils) +1.5VSUS
D13 RB500V-40
VCC5REFSUS=1mA +3VS5
A22 P32 R570 *0_4/S +3V 20mA (10mils) C515
+3V_RTC +3VS5
RTC
VCCRTC VCCSUSHDA
HDA
0.1U/10V_4
VCCRTC<1mA R603 *0_6 +3V_SUS_CLKF33 C846 1U/6.3V_4
C805 C809 C804 CPT_PPT_Rev_0p5 C806 C808
(10mils) 1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 *1U/6.3V_4 R606 1/F_4 +3V_SUS_CLKF33_R C841 10U/6.3VS_6
L62
10uH/100mA_8
20mA (10mils)
+1.05V +VCC_DMI_CCI +1.1V_VCC_DMI_CCI
R601 *1/F_4 If have power noise issue then stuff it.

L60 +5V +3V_LDO
R602 *0_4/S *10uH/100mA_8 U33
G910T21U
3 Vin Vout 1
+1.05V R232 +1.05V_VTT
GND
+1.05V <6,7,8,36>
F3_2X1_65-2_8
+3V_RTC <6,7>
A +1.5V <4,12,33> A
1 2 C838
+3VS5 <2,6,7,8,9,23,33,35,38,39,42,43>
2
1U/6.3V_4
+3V <2,6,7,8,9,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
+5VS5 <28,35,36,37,38,39,40,41,42>
RC1206-R020
+5V <7,18,24,25,27,31,32,33,39>
+1.5VSUS <2,4,12,13,37,43>
+1.8V <4,7,38,43>
Reserve for DB only, after DB change to short pad
PROJECT : R33
Custom PCH 5/6 (POWER) 1A
NB5
5 4 3 2 1
5 4 3 2 1
Cougar Point/Panther Point (GND)

U32I
Cougar Point/Panther Point (GND) 11
AY4 VSS[159] VSS[259] H46
AY42 K18 U32H
VSS[160] VSS[260]
AY46 VSS[161] VSS[261] K26 H5 VSS[0]
AY8 VSS[162] VSS[262] K39
B11 VSS[163] VSS[263] K46 AA17 VSS[1] VSS[80] AK38
B15 VSS[164] VSS[264] K7 AA2 VSS[2] VSS[81] AK4
D B19 L18 AA3 AK42 D
VSS[165] VSS[265] VSS[3] VSS[82]
B23 VSS[166] VSS[266] L2 AA33 VSS[4] VSS[83] AK46
B27 VSS[167] VSS[267] L20 AA34 VSS[5] VSS[84] AK8
B31 VSS[168] VSS[268] L26 AB11 VSS[6] VSS[85] AL16
F45 VSS[172] VSS[272] M12 AB43 VSS[10] VSS[89] AL21
BB12 VSS[173] VSS[273] P16 AB5 VSS[11] VSS[90] AL23
BB16 VSS[174] VSS[274] M18 AB7 VSS[12] VSS[91] AL26
BB20 VSS[175] VSS[275] M22 AC19 VSS[13] VSS[92] AL27
BB38 VSS[180] VSS[280] M38 AC34 VSS[18] VSS[97] AM11
BB4 VSS[181] VSS[281] M4 AC48 VSS[19] VSS[98] AM14
BB46 VSS[182] VSS[282] M42 AD10 VSS[20] VSS[99] AM36
BC14 VSS[183] VSS[283] M46 AD11 VSS[21] VSS[100] AM39
BC18 VSS[184] VSS[284] M8 AD12 VSS[22] VSS[101] AM43
BC2 VSS[185] VSS[285] N18 AD13 VSS[23] VSS[102] AM45
BC22 VSS[186] VSS[286] P30 AD19 VSS[24] VSS[103] AM46
BC26 VSS[187] VSS[287] N47 AD24 VSS[25] VSS[104] AM7
BC32 VSS[188] VSS[288] P11 AD26 VSS[26] VSS[105] AN2
BC36 VSS[190] VSS[290] T33 AD33 VSS[28] VSS[107] AN3
BC42 VSS[192] VSS[292] P43 AD36 VSS[30] VSS[109] AP12
BC48 VSS[193] VSS[293] P47 AD37 VSS[31] VSS[110] AP19
BD46 VSS[194] VSS[294] P7 AD38 VSS[32] VSS[111] AP28
C BD5 R2 AD39 AP30 C
VSS[195] VSS[295] VSS[33] VSS[112]
BE22 VSS[196] VSS[296] R48 AD4 VSS[34] VSS[113] AP32
BE26 VSS[197] VSS[297] T12 AD40 VSS[35] VSS[114] AP38
BE40 VSS[198] VSS[298] T31 AD42 VSS[36] VSS[115] AP4
BF10 VSS[199] VSS[299] T37 AD43 VSS[37] VSS[116] AP42
BF12 VSS[200] VSS[300] T4 AD45 VSS[38] VSS[117] AP46
BF16 VSS[201] VSS[301] W 34 AD46 VSS[39] VSS[118] AP8
BF20 VSS[202] VSS[302] T46 AD8 VSS[40] VSS[119] AR2
BF22 VSS[203] VSS[303] T47 AE2 VSS[41] VSS[120] AR48
BF24 VSS[204] VSS[304] T8 AE3 VSS[42] VSS[121] AT11
BF26 VSS[205] VSS[305] V11 AF10 VSS[43] VSS[122] AT13
BD3 VSS[207] VSS[307] V26 AD14 VSS[45] VSS[124] AT22
BF30 VSS[208] VSS[308] V27 AD16 VSS[46] VSS[125] AT26
BG17 VSS[212] VSS[312] V39 AF26 VSS[50] VSS[129] AT34
BG44 VSS[215] VSS[315] W 17 AF31 VSS[53] VSS[132] AT46
BG8 VSS[216] VSS[316] W 19 AF38 VSS[54] VSS[133] AT7
BH11 VSS[217] VSS[317] W2 AF4 VSS[55] VSS[134] AU24
BH15 VSS[218] VSS[318] W 27 AF42 VSS[56] VSS[135] AU30
BH17 VSS[219] VSS[319] W 48 AF46 VSS[57] VSS[136] AV16
BH19 VSS[220] VSS[320] Y12 AF5 VSS[58] VSS[137] AV20
H10 VSS[221] VSS[321] Y38 AF7 VSS[59] VSS[138] AV24
BH27 VSS[222] VSS[322] Y4 AF8 VSS[60] VSS[139] AV30
BH31 VSS[223] VSS[323] Y42 AG19 VSS[61] VSS[140] AV38
BH33 VSS[224] VSS[324] Y46 AG2 VSS[62] VSS[141] AV4
B BH35 Y8 AG31 AV43 B
VSS[225] VSS[325] VSS[63] VSS[142]
BH39 VSS[226] VSS[328] BG29 AG48 VSS[64] VSS[143] AV8
BH43 VSS[227] VSS[329] N24 AH11 VSS[65] VSS[144] AW 14
BH7 VSS[228] VSS[330] AJ3 AH3 VSS[66] VSS[145] AW 18
D3 VSS[229] VSS[331] AD47 AH36 VSS[67] VSS[146] AW 2
D12 VSS[230] VSS[333] B43 AH39 VSS[68] VSS[147] AW 22
D16 VSS[231] VSS[334] BE10 AH40 VSS[69] VSS[148] AW 26
D18 VSS[232] VSS[335] BG41 AH42 VSS[70] VSS[149] AW 28
D22 VSS[233] VSS[337] G14 AH46 VSS[71] VSS[150] AW 32
D24 VSS[234] VSS[338] H16 AH7 VSS[72] VSS[151] AW 34
D26 VSS[235] VSS[340] T36 AJ19 VSS[73] VSS[152] AW 36
D30 VSS[236] VSS[342] BG22 AJ21 VSS[74] VSS[153] AW 40
D32 VSS[237] VSS[343] BG24 AJ24 VSS[75] VSS[154] AW 48
D34 VSS[238] VSS[344] C22 AJ33 VSS[76] VSS[155] AV11
D38 VSS[239] VSS[345] AP13 AJ34 VSS[77] VSS[156] AY12
D42 VSS[240] VSS[346] M14 AK12 VSS[78] VSS[157] AY22
D8 VSS[241] VSS[347] AP3 AK3 VSS[79] VSS[158] AY28
E18 VSS[242] VSS[348] AP1
E26 BE16 CPT_PPT_Rev_0p5
VSS[243] VSS[349]
G18 VSS[244] VSS[350] BC16
G20 VSS[245] VSS[351] BG28
G26 VSS[246] VSS[352] BJ28
G28 VSS[247]
G36 VSS[248]
G48 VSS[249]
H12 VSS[250]
H18 VSS[251]
H22 VSS[252]
H24 VSS[253]
H26 VSS[254]
A H30 A
VSS[255]
H32 VSS[256]
H34 VSS[257]
F3 VSS[258]
CPT_PPT_Rev_0p5
PROJECT : R33
Custom PCH 6/6 (GND) 1A
NB5
5 4 3 2 1
5 4 3 2 1
<3> M_A_A[15:0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
98
97
96
95
JDIM5A
A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
17
M_A_DQ4
M_A_DQ5
M_A_DQ7
M_A_DQ6
M_A_DQ[63:0] <3>
2.48A +1.5VSUS
75
76
81
JDIM5B
VDD1
VDD2
VSS16
VSS17
44
48
49
12
M_A_A4 A3 DQ3 M_A_DQ1 VDD3 VSS18
92 A4 DQ4 4 82 VDD4 VSS19 54
M_A_A5 91 6 M_A_DQ0 87 55
90 A6 DQ6 16 88 VDD6 VSS21 60
M_A_A7 86 18 M_A_DQ2 93 61
89 A8 DQ8 21 94 VDD8 VSS23 65
M_A_A9 85 23 M_A_DQ8 99 66
D M_A_A10 A9 DQ9 M_A_DQ15 VDD9 VSS24 D
107 A10/AP DQ10 33 100 VDD10 VSS25 71
M_A_A11 84 35 M_A_DQ10 105 72
PC2100 DDR3 SDRAM SO-DIMM

83 A12/BC# DQ12 22 106 VDD12 VSS27 127
M_A_A13 119 24 M_A_DQ13 111 128
80 A14 DQ14 34 112 VDD14 VSS29 133
M_A_A15 78 36 M_A_DQ11 117 134
A15 DQ15 M_A_DQ21 VDD15 VSS30

DQ16 39 118 VDD16 VSS31 138
109 41 M_A_DQ16 123 139
<3> M_A_BS#0 BA0 DQ17 VDD17 VSS32
108 51 M_A_DQ19 124 144
<3> M_A_BS#1 BA1 DQ18 VDD18 VSS33
79 53 M_A_DQ18 145
<3> M_A_BS#2 BA2 DQ19 VSS34
114 40 M_A_DQ20 199 150
<3> M_A_CS#0 S0# DQ20 +3V VDDSPD VSS35
121 42 M_A_DQ17 151
<3> M_A_CS#1 S1# DQ21 VSS36
101 50 M_A_DQ23 77 155
<3> M_A_CLKP0 CK0 DQ22 NC1 VSS37
103 52 M_A_DQ22 122 156
<3> M_A_CLKN0 CK0# DQ23 NC2 VSS38
102 57 M_A_DQ25 R169 10K_4 125 161
<3> M_A_CLKP1 CK1 DQ24 M_A_DQ24 +3V NCTEST VSS39
<3> M_A_CLKN1 104 CK1# DQ25 59 VSS40 162
73 67 M_A_DQ30 PM_EXTTS#0 198 167
<3> M_A_CKE0 CKE0 DQ26 <13> PM_EXTTS#0 EVENT# VSS41
74 69 M_A_DQ26 30 168
<3> M_A_CKE1 CKE1 DQ27 <2,13> DDR3_DRAMRST# RESET# VSS42
115 56 M_A_DQ28 172
<3> M_A_CAS# CAS# DQ28 VSS43
110 58 M_A_DQ29 173
<3> M_A_RAS# RAS# DQ29 M_A_DQ31 SMDDR_VREF_DQ0_M1 R45 +SMDDR_VREF_DQ0 VSS44
113 68 *0_6/S 1 178
<3> M_A_WE# W E# DQ30 VREF_DQ VSS45
R199 10K_4 DIMM0_SA0 197 70 M_A_DQ27 +SMDDR_VREF_DIMM 126 179
R198 10K_4 DIMM0_SA1 SA0 DQ31 M_A_DQ36 SMDDR_VREF_DQ0_M3 R46 *0_6 VREF_CA VSS46
201 SA1 DQ32 129 <4> SMDDR_VREF_DQ0_M3 VSS47 184
SMB_RUN_CLK 202 131 M_A_DQ37 185
<8,13> SMB_RUN_CLK SCL DQ33 VSS48
SMB_RUN_DAT 200 141 M_A_DQ34 2 189
<8,13> SMB_RUN_DAT SDA DQ34 VSS1 VSS49
143 M_A_DQ38 3 190
DQ35 M_A_DQ32 VSS2 VSS50
116 130 8 195
(204P)
<3> M_A_ODT0 ODT0 DQ36 VSS3 VSS51
120 132 M_A_DQ33 Reseve for RF 9 196
<3> M_A_ODT1 ODT1 DQ37 VSS4 VSS52
140 M_A_DQ35 13
M_A_DM1 DQ38 M_A_DQ39 VSS5
11 DM0 DQ39 142 14 VSS6
C 28 147 M_A_DQ41 19 C
DM1 DQ40 M_A_DQ45 C237 *2.2U/6.3V_6 VSS7
46 149 20
(204P)
DM2 DQ41 +1.5VSUS VSS8
63 157 M_A_DQ47 25
M_A_DM2 DM3 DQ42 M_A_DQ46 C96 *2.2U/6.3V_6 VSS9
136 DM4 DQ43 159 26 VSS10 VTT1 203 +0.75V_DDR_VTT
153 146 M_A_DQ40 31 204
DM5 DQ44 M_A_DQ44 C61 *2.2U/6.3V_6 VSS11 VTT2
170 DM6 DQ45 148 +1.5V 32 VSS12
187 158 M_A_DQ42 37 205
DM7 DQ46 M_A_DQ43 C60 *2.2U/6.3V_6 VSS13 GND
<3> M_A_DQSP[7:0] DQ47 160 38 VSS14 GND 206
M_A_DQSP0 12 163 M_A_DQ49 43
M_A_DQSP1 DQS0 DQ48 M_A_DQ48 VSS15
29 DQS1 DQ49 165
M_A_DQSP2 47 175 M_A_DQ54
M_A_DQSP3 DQS2 DQ50 M_A_DQ55 DDR3-DIMM0_H=5.2_RVS
64 DQS3 DQ51 177
M_A_DQSP4 137 164 M_A_DQ53 DDR-78279-001-RVS-204P
M_A_DQSP5 DQS4 DQ52 M_A_DQ52 DGMK4000271
154 DQS5 DQ53 166
M_A_DQSP6 171 174 M_A_DQ50 IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
M_A_DQSP7 DQS6 DQ54 M_A_DQ51
<3> M_A_DQSN[7:0] 188 DQS7 DQ55 176
M_A_DQSN0 10 181 M_A_DQ61
M_A_DQSN1 DQS#0 DQ56 M_A_DQ60
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ62
62 DQS#3 DQ59 193
M_A_DQSN4 135 180 M_A_DQ56
152 DQS#5 DQ61 182
M_A_DQSN6 169 192 M_A_DQ59
DQS#6 DQ62 +1.5V <4,10,33>
M_A_DQSN7 186 194 M_A_DQ58
DQS#7 DQ63 +0.75V_DDR_VTT <13,37,39>
+1.5VSUS <2,4,10,13,37,43>
+3VPCU <7,23,30,31,34,35>
DDR3-DIMM0_H=5.2_RVS
+3V <2,6,7,8,9,10,13,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
DDR-78279-001-RVS-204P
DGMK4000271
IC SOCKET DDRIII SO-DIMM(204P,H5.2,RVS)
B B
+1.5VSUS
VREF DQ0 M2 Solution Place these Caps near So-Dimm0. VREF DQ0 M1 Solution
+1.5VSUS +0.75V_DDR_VTT DDR_VTTREF R37 *0_6
R33
C178 1U/6.3V_4 C410 1U/6.3V_4 1K/F_4
C256 1U/6.3V_4 C738 1U/6.3V_4 SMDDR_VREF_DQ0_M3 1 3 SMDDR_VREF_DQ0_M1
C246 1U/6.3V_4 C390 1U/6.3V_4 +1.5VSUS

Q7
2
C213 1U/6.3V_4 C397 1U/6.3V_4 AO3416 R39
1K/F_4
C269 10U/6.3VS_6 C734 10U/6.3V_6
del M2 solution C653 10U/6.3VS_6 C388 *10U/6.3V_6
<2,8,13> DRAMRST_CNTRL_PCH R143
1K/F_4
C621 10U/6.3VS_6
+SMDDR_VREF_DIMM R164 *0_6 +SMDDR_VREF_DIMM
<4,13,37> DDR_VTTREF
C631 10U/6.3VS_6
C306 0.1U/10V_4
C642 10U/6.3VS_6
C297 2.2U/6.3V_6 R156 C268
C656 10U/6.3VS_6 1K/F_4 470P/50V_4
A C140 *10U/6.3V_6 +SMDDR_VREF_DQ0 A
C133 10U/6.3V_8 C49 0.1U/10V_4
C252 10U/6.3V_8 C48 2.2U/6.3V_6
+3V PROJECT : R33

C367 0.1U/10V_4
4/27: layout modify C377 2.2U/6.3V_6 Size Document Number Rev
Custom DDR3 DIMM0-RVS (5.2H) 1A
NB5
5 4 3 2 1
5 4 3 2 1
<3> M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
98
97
96
JDIM6A
A0
A1
DQ0
DQ1
5
7
15
M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ[63:0] <3>
+1.5VSUS
75
76
81
JDIM6B
VDD1
VDD2
VSS16
VSS17
44
48
49
13
M_B_A3 A2 DQ2 M_B_DQ2 VDD3 VSS18
95 A3 DQ3 17 82 VDD4 VSS19 54
M_B_A4 92 4 M_B_DQ0 87 55
91 A5 DQ5 6 88 VDD6 VSS21 60
M_B_A6 90 16 M_B_DQ6 93 61
86 A7 DQ7 18 94 VDD8 VSS23 65
M_B_A8 M_B_DQ12
D M_B_A9
89
85
A8 DQ8 21
23 M_B_DQ13
2.48A 99
100
VDD9 VSS24 66
71 D
107 A10/AP DQ10 33 105 VDD11 VSS26 72
M_B_A11 M_B_DQ10

84 A11 DQ11 35 106 VDD12 VSS27 127
M_B_A12 83 22 M_B_DQ8 111 128
M_B_A13 A12/BC# DQ12 M_B_DQ9 VDD13 VSS28
119 A13 DQ13 24 112 VDD14 VSS29 133
M_B_A14 80 34 M_B_DQ11 117 134
78 A15 DQ15 36 118 VDD16 VSS31 138
M_B_DQ20

DQ16 39 123 VDD17 VSS32 139
109 41 M_B_DQ21 124 144
<3> M_B_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_B_DQ18 145
<3> M_B_BS#1 BA1 DQ18 VSS34
79 53 M_B_DQ22 199 150
<3> M_B_BS#2 BA2 DQ19 +3V VDDSPD VSS35
114 40 M_B_DQ17 151
<3> M_B_CS#0 S0# DQ20 M_B_DQ16 VSS36
<3> M_B_CS#1 121 S1# DQ21 42 77 NC1 VSS37 155
101 50 M_B_DQ19 122 156
<3> M_B_CLKP0 CK0 DQ22 NC2 VSS38
103 52 M_B_DQ23 125 161
<3> M_B_CLKN0 CK0# DQ23 M_B_DQ25 NCTEST VSS39
<3> M_B_CLKP1 102 CK1 DQ24 57 VSS40 162
104 59 M_B_DQ29 PM_EXTTS#0 198 167
<3> M_B_CLKN1 CK1# DQ25 M_B_DQ27 EVENT# VSS41
<3> M_B_CKE0 73 CKE0 DQ26 67 <2,12> DDR3_DRAMRST# 30 RESET# VSS42 168
74 69 M_B_DQ26 172
<3> M_B_CKE1 CKE1 DQ27 VSS43
115 56 M_B_DQ28 173
<3> M_B_CAS# CAS# DQ28 M_B_DQ24 SMDDR_VREF_DQ1_M1 R398 +SMDDR_VREF_DQ1 VSS44
110 58 *0_6/S 1 178
<3> M_B_RAS# RAS# DQ29 VREF_DQ VSS45
113 68 M_B_DQ31 126 179
<3> M_B_WE# W E# DQ30 VREF_CA VSS46
R213 10K_4 DIMM1_SA0 197 70 M_B_DQ30 <4> SMDDR_VREF_DQ1_M3 SMDDR_VREF_DQ1_M3 R387 *0_6 +SMDDR_VREF_DIMM1 184
R207 10K_4 DIMM1_SA1 SA0 DQ31 M_B_DQ36 VSS47
+3V 201 SA1 DQ32 129 VSS48 185
<8,12> SMB_RUN_CLK 202 131 M_B_DQ37 2 189
SCL DQ33 M_B_DQ35 VSS1 VSS49
<8,12> SMB_RUN_DAT 200 SDA DQ34 141 3 VSS2 VSS50 190
143 M_B_DQ34 8 195
(204P)
DQ35 M_B_DQ33 +1.5VSUS VSS3 VSS51
<3> M_B_ODT0 116 ODT0 DQ36 130 9 VSS4 VSS52 196
<3> M_B_ODT1 120 132 M_B_DQ32 13
ODT1 DQ37 M_B_DQ39 VSS5
DQ38 140 14 VSS6
C M_B_DM1 11 142 M_B_DQ38 19 C
DM0 DQ39 M_B_DQ44 R144 VSS7
28 DM1 DQ40 147 20 VSS8
46 149 M_B_DQ40 1K/F_4 25
(204P)
DM2 DQ41 M_B_DQ42 VSS9
63 DM3 DQ42 157 26 VSS10 VTT1 203 +0.75V_DDR_VTT
M_B_DM2 136 159 M_B_DQ43 31 204
DM4 DQ43 M_B_DQ45 R159 *0_6 +SMDDR_VREF_DIMM1 VSS11 VTT2
153 DM5 DQ44 146 <4,12,37> DDR_VTTREF 32 VSS12
170 148 M_B_DQ41 37 205
DM6 DQ45 M_B_DQ46 VSS13 GND
187 DM7 DQ46 158 38 VSS14 GND 206
160 M_B_DQ47 43
<3> M_B_DQSP[7:0] DQ47 VSS15
M_B_DQSP0 12 163 M_B_DQ49 R145 C290
M_B_DQSP1 DQS0 DQ48 M_B_DQ48 1K/F_4 470P/50V_4
29 DQS1 DQ49 165
M_B_DQSP2 47 175 M_B_DQ54 DDR3-DIMM1_H=9.2_RVS
M_B_DQSP3 DQS2 DQ50 M_B_DQ55 DDR-AS0A626-UARN-7F-204P
64 DQS3 DQ51 177
M_B_DQSP4 137 164 M_B_DQ52 DGMK4000272
M_B_DQSP5 DQS4 DQ52 M_B_DQ53 IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS)
154 DQS5 DQ53 166
M_B_DQSP6 171 174 M_B_DQ50
M_B_DQSP7 DQS6 DQ54 M_B_DQ51
<3> M_B_DQSN[7:0] 188 DQS7 DQ55 176
M_B_DQSN0 10 181 M_B_DQ61
M_B_DQSN1 DQS#0 DQ56 M_B_DQ56
27 DQS#1 DQ57 183
M_B_DQSN2 45 191 M_B_DQ62
62 193
M_B_DQSN4 135
DQS#3 DQ59
180 M_B_DQ57 DDR3 Thermal Sensor
152 DQS#5 DQ61 182
M_B_DQSN6 169 192 M_B_DQ59 U15 C379 *0.01U/25V_4
186 DQS#7 DQ63 194
MBCLK2 8 1
<8,30,33> MBCLK2 SCLK VCC +3V
DDR3-DIMM1_H=9.2_RVS MBDATA2 7 2 DDR_THERMDA
<8,30,33> MBDATA2 SDA DXP
DDR-AS0A626-UARN-7F-204P
3
DGMK4000272 PM_EXTTS#0 6 3
B +0.75V_DDR_VTT <12,37,39> <12> PM_EXTTS#0 ALERT# DXN B
IC SOCKET DDRIII SO-DIMM(204P,H9.2,RVS) C368 2 Q19
+1.5VSUS <2,4,10,12,37,43>
PM_EXTTS#0_EC 4 5 *2200P/50V_4 *MMBT3904-7-F
+3VPCU <7,23,30,31,34,35> OVERT# GND
+3V <2,6,7,8,9,10,12,14,18,23,24,25,26,27,28,29,30,31,32,33,39,40,42,43>
1
DDR_THERMDC
+3V R182 *10K_4 *LM95245CIMM
+1.5VSUS
VREF DQ1 M1 Solution
Place these Caps near So-Dimm1.
R407
+1.5VSUS +0.75V_DDR_VTT +SMDDR_VREF_DIMM1 1K/F_4
C208 1U/6.3V_4 C394 1U/6.3V_4 C300 0.1U/10V_4

R415 *0_6 SMDDR_VREF_DQ1_M1
<4,12,37> DDR_VTTREF
C129 1U/6.3V_4 C398 1U/6.3V_4 C318 2.2U/6.3V_6
C181 1U/6.3V_4 C399 1U/6.3V_4 R406

1K/F_4
C171 1U/6.3V_4 C405 1U/6.3V_4 +SMDDR_VREF_DQ1
del M2 solution C159 10U/6.3VS_6 C389 10U/6.3V_6 C585 0.1U/10V_4

SMDDR_VREF_DQ1_M3 1 3
C154 10U/6.3VS_6 C396 *10U/6.3V_6 C584 2.2U/6.3V_6 Q31
2
AO3416
C647 10U/6.3VS_6
A C149 10U/6.3VS_6 +3V A

<2,8,12> DRAMRST_CNTRL_PCH
C211 10U/6.3VS_6 C385 0.1U/10V_4
C221 10U/6.3VS_6 C386 2.2U/6.3V_6
C198 *10U/6.3V_6
PROJECT : R33
C103 10U/6.3V_8 Quanta Computer Inc.
C228 10U/6.3V_8
Custom DDR3 DIMM1-RVS (9.2H) 1A
NB5
5 4 3 2 1
5 4 3 2 1
PART 1 0F 9
U23A
14
AA38 PCIE_RX0P PCIE_TX0P Y33 C_PEG_RXP0 C702 0.1U/10V_4
<2> PEG_TX0 PEG_RX0 <2>
Y37 PCIE_RX0N PCIE_TX0N Y32 C_PEG_RXN0 C704 0.1U/10V_4
<2> PEG_TX#0 PEG_RX#0 <2>
D D
Y35 PCIE_RX1P PCIE_TX1P W 33 C_PEG_RXP1 C711 0.1U/10V_4

W 36 PCIE_RX1N PCIE_TX1N W 32 C_PEG_RXN1 C713 0.1U/10V_4
W 38 PCIE_RX2P PCIE_TX2P U33 C_PEG_RXP2 C705 0.1U/10V_4

V37 PCIE_RX2N PCIE_TX2N U32 C_PEG_RXN2 C709 0.1U/10V_4
V35 PCIE_RX3P PCIE_TX3P U30 C_PEG_RXP3 C697 0.1U/10V_4

U36 PCIE_RX3N PCIE_TX3N U29 C_PEG_RXN3 C700 0.1U/10V_4
U38 PCIE_RX4P PCIE_TX4P T33 C_PEG_RXP4 C715 0.1U/10V_4

T37 PCIE_RX4N PCIE_TX4N T32 C_PEG_RXN4 C718 0.1U/10V_4
T35 PCIE_RX5P PCIE_TX5P T30 C_PEG_RXP5 C693 0.1U/10V_4

R36 PCIE_RX5N PCIE_TX5N T29 C_PEG_RXN5 C696 0.1U/10V_4
R38 PCIE_RX6P PCIE_TX6P P33 C_PEG_RXP6 C683 0.1U/10V_4

P37 PCIE_RX6N PCIE_TX6N P32 C_PEG_RXN6 C688 0.1U/10V_4
P35 PCIE_RX7P PCIE_TX7P P30 C_PEG_RXP7 C689 0.1U/10V_4

N36 PCIE_RX7N PCIE_TX7N P29 C_PEG_RXN7 C692 0.1U/10V_4
C N38 PCIE_RX8P PCIE_TX8P N33 C

M37 PCIE_RX8N PCIE_TX8N N32
PCI EXPRESS INTERFACE
M35 PCIE_RX9P PCIE_TX9P N30

L36 PCIE_RX9N PCIE_TX9N N29
L38 PCIE_RX10P PCIE_TX10P L33

K37 PCIE_RX10N PCIE_TX10N L32
K35 PCIE_RX11P PCIE_TX11P L30

J36 PCIE_RX11N PCIE_TX11N L29
J38 PCIE_RX12P PCIE_TX12P K33

H37 PCIE_RX12N PCIE_TX12N K32
H35 PCIE_RX13P PCIE_TX13P J33

G36 PCIE_RX13N PCIE_TX13N J32
G38 PCIE_RX14P PCIE_TX14P K30

F37 PCIE_RX14N PCIE_TX14N K29
Chelsea Only
Do not install For Thames
F35 PCIE_RX15P PCIE_TX15P H33
B
E37 PCIE_RX15N PCIE_TX15N H32 B
Ra
R142 *1.69K/F_4 +1.0V_VGA
CLOCK
CLK_PCIE_VGA AB35 PCIE_REFCLKP
<8> CLK_PCIE_VGA
CLK_PCIE_VGA# AA36 PCIE_REFCLKN
<8> CLK_PCIE_VGA#
Do not install for Chelsea
CALIBRATION
Install for Thames ONLY
Rb
PCIE_CALR_TX Y30 PCIE_CALRP R147 1.27K/F_4
R117 1K/F_4 AH16 TEST_PG PCIE_CALR_RX Y29 PCIE_CALRN R150 2K/F_4 +1.0V_VGA
Rc
Install 2k for Thames
PEGX_RST# AA30 PERSTB
THAMES_M2_XT Chelsea Thames
+3V Ra 1.69K n/a
Rb n/a 1.27K
C267 Rc 1K 2K
U11 0.1U/10V_4
MC74VHC1G08DFT2G
5
A A
<2,8,26,29,30,33> PLTRST# 2 +1.0V_VGA
<16,18,19,43> +1.0V_VGA
4 PEGX_RST#
<9> DGPU_HOLD_RST# R140 330_4 DGPU_HIN_RST# 1
R149
3
100K_4
PROJECT : R33
Custom 1A
NB5 THAMES_PCIE_Interface
5 4 3 2 1
5 4 3 2 1
MEM_ID[3:0]
0000
Vendor
Hynix- D (VEGA)
Type
64Mx16 *8, 900Mhz
Vendor P/N
H5TQ1G63DFR-11C
U23B
PART 2 0F 9
15
0001 Micron- G die 64Mx16 *8, 900Mhz MT41J64M16JT-107G:G MUTI GFX
0010 Samsung- G die 64Mx16 *8, 900Mhz K4W1G1646G-BC11 GENLK_CLK AD29 GENLK_CLK TXCAP_DPA3P AU24
<17> GENLK_CLK
GENLK_VSYNC AC29 GENLK_VSYNC TXCAM_DPA3N AV23
0011 Hynix- B (VEGA) 128Mx16 *8, 900Mhz H5TQ2G63BFR-11C <17> GENLK_VSYNC U23F
0100 Micron- D die 128Mx16 *8, 900Mhz MT41J128M16HA-107G:D TX0P_DPA2P AT25

PART 6 0F 9
128Mx16 *8, 900Mhz K4W2G1646C-HC11 AJ21 SWAPLOCKA TX0M_DPA2N AR24
0101 Samsung- C die AK21 SWAPLOCKB
DPA
0110 Hynix- B (VEGA) 128Mx16 *4, 900Mhz H5TQ2G63BFR-11C TX1P_DPA1P AU26 AB39 PCIE_VSS GND A3
TX1M_DPA1N AV25 E39 PCIE_VSS GND A37
0111 Micron- D die 128Mx16 *4, 900Mhz MT41J128M16HA-107G:D F34 PCIE_VSS GND AA16
D D
1000 Samsung- C die 128Mx16 *4, 900Mhz K4W2G1646C-HC11 AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27 F39 PCIE_VSS GND AA18
1001 AU8 DVPCNTL_MVP_1 TX2M_DPA0N AR26 G33 PCIE_VSS GND AA2
1010 AP8 DVPCNTL_0 G34 PCIE_VSS GND AA21
1011 AW8 DVPCNTL_1 TXCBP_DPB3P AR30 H31 PCIE_VSS GND AA23
+1.8V_VGA
1100 Memory ID AR3 DVPCNTL_2 TXCBM_DPB3N AT29 H34 PCIE_VSS GND AA26
1101 AR1 DVPCLK H39 PCIE_VSS GND AA28
R414 10K/F_4 MEM_ID0 AU1 AV31 J31 AA6
1110 R412 10K/F_4 MEM_ID1
DVPDATA_0 TX3P_DPB2P PCIE_VSS GND
1111 AU3 DVPDATA_1 TX3M_DPB2N AU30 J34 PCIE_VSS GND AB12

R413 *10K/F_4 MEM_ID2 DPB
AW3 DVPDATA_2 K31 PCIE_VSS GND AB15
R411 *10K/F_4 MEM_ID3 AP6 DVPDATA_3 TX4P_DPB1P AR32 K34 PCIE_VSS GND AB17
AW5 AT31 K39 AB20
GPIO16 GPIO20 GPIO15 AU5
DVPDATA_4
DVPDATA_5
TX4M_DPB1N
L31
PCIE_VSS
PCIE_VSS
GND
GND AB22
AR6 DVPDATA_6 TX5P_DPB0P AT33 L34 PCIE_VSS GND AB24
Thames XT PWRCNTL2 PWRCNTL1 PWRCNTL0 V-CORE AW6 DVPDATA_7 TX5M_DPB0N AU32 M34 PCIE_VSS GND AB27
AU6 DVPDATA_8 M39 PCIE_VSS GND AC11
AT7 DVPDATA_9 TXCCP_DPC3P AU14 N31 PCIE_VSS GND AC13
L 0 0 0 1.0V AV7 DVPDATA_10 TXCCM_DPC3N AV13 N34 PCIE_VSS GND AC16
AN7 DVPDATA_11 P31 PCIE_VSS GND AC18
AV9 DVPDATA_12 TX0P_DPC2P AT15 P34 PCIE_VSS GND AC2
M 0 0 1 0.9V AT9 DVPDATA_13 TX0M_DPC2N AR14 P39 PCIE_VSS GND AC21
AR10 DVPDATA_14 R34 PCIE_VSS GND AC23
DPC
AW10 DVPDATA_15 TX1P_DPC1P AU16 T31 PCIE_VSS GND AC26
H 0 1 0 0.875V AU10 DVPDATA_16 TX1M_DPC1N AV15 T34 PCIE_VSS GND AC28
AP10 DVPDATA_17 T39 PCIE_VSS GND AC6
+3V_DELAY AV11 DVPDATA_18 TX2P_DPC0P AT17 U31 PCIE_VSS GND AD15
0 1 1 0.85V R104 4.7K_4
AT11 DVPDATA_19 TX2M_DPC0N AR16 U34 PCIE_VSS GND AD17
AR12 DVPDATA_20 V34 PCIE_VSS GND AD20
AW12 DVPDATA_21 TXCDP_DPD3P AU20 V39 PCIE_VSS GND AD22
R101 4.7K_4
1 0 0 0.8V AU12 DVPDATA_22 TXCDM_DPD3N AT19 W31 PCIE_VSS GND AD24
AP12 DVPDATA_23 W34 PCIE_VSS GND AD27
<30> DGPUT_CLK TX3P_DPD2P AT21 Y34 PCIE_VSS GND AD9
1 0 1 0.75V <30> DGPUT_DATA TX3M_DPD2N AR20 Y39 PCIE_VSS GND AE2
GND AE6
DGPUT_CLK DPD
Access to SMBBus ans SDA/SCL is mandatory on all designs AJ23 SMBCLK
SMBus
TX4P_DPD1P AU22 GND AF10
DGPUT_DATA AH23 AV21 AF16
Add test points on SMBBus and SDA/SCL for debug R78 4.7K_4
SMBDATA TX4M_DPD1N GND
GND AF18
+3V_DELAY R92 4.7K_4 TX5P_DPD0P AT23 GND GND AF21
C TX5M_DPD0N AR22 GND AG17 C
TP15 AK26 SCL F15 GND GND AG2
I2C
TP25 AJ26 SDA F17 GND GND AG20
F19 GND GND AG22
+3V_DELAY AD39 F21 AG6
R TP75 GND GND
GENERAL PURPOSE I/O AVSSN#1 AD37 F23 GND GND AG9
<17> GPIO0 GPIO0 AH20 GPIO_0 F25 GND GND AH21
R103 *10K/F_4 GPIO_23_CLKREQb GPIO1 AH18 AE36 F27 AJ10
<17> GPIO1 GPIO_1 G TP73 GND GND
<17> GPIO2 GPIO2 AN16 GPIO_2 AVSSN#2 AD35 F29 GND GND AJ11
F31 GND GND AJ2
B AF37 TP26 F33 GND GND AJ28
R416 *10K/F_4 GPIO5 R409 *10K/F_4 R91 *0_4 GPIO5 AH17 GPIO_5_AC_BATT AVSSN#3 AE38 F7 GND GND AJ6
<30> GPU_AC_BATT
AJ17 GPIO_6 F9 GND GND AK11
DAC1 GPU_HSYNC_COM
AK17 GPIO_7_BLON HSYNC AC36 GPU_HSYNC_COM <17> G2 GND GND AK31
R113 10K/F_4 DGPU_TRSTB <17> GPIO8 GPIO8 AJ13 GPIO_8_ROMSO VSYNC AC38 GPU_VSYNC_COM G6 GND GND AK7
GPU_VSYNC_COM <17>
GPIO9 AH15 GPIO_9_ROMSI H9 GND GND AL11
<17> GPIO9
R111 10K/F_4 DGPU_TDI TP71 GPIO10 AJ16 GPIO_10_ROMSCK J2 GND GND AL14
GPIO11 AK16 GPIO_11 RSET AB34 R146 499/F_4 J27 GND GND AL17
<17> GPIO11
R112 10K/F_4 DGPU_TMS GPIO12 AL16 GPIO_12 J6 GND GND AL2
<17> GPIO12
GPIO13 AM16 GPIO_13 AVDD AD34 +1.8V_AVDD_Q +1.8V_AVDD_Q J8 GND GND AL20
<17> GPIO13
R100 10K/F_4 DGPU_TCK TP19 HDMI_HP2 AM14 GPIO_14_HPD2 AVSSQ AE34 K14 GND
<42> GFX_CORE_CNTRL0 GFX_CORE_CNTRL0 AM13 GPIO_15_PWRCNTL_0 DAC1 Analog Power K7 GND GND AL23
GFX_CORE_CNTRL2 AK14 GPIO_16 VDD1DI AC33 +VDDD1 AVDD : 1.8V @ 18mA +1.8V_AVDD_Q L11 GND GND AL26
<42> GFX_CORE_CNTRL2 +VDDD1
VGA_ALERT AG30 GPIO_17_THERMAL_INT VSS1DI AC34 +1.8V_VGA L17 GND GND AL32
TP74
HPD3 AN14 GPIO_18_HPD3 L25 BLM15BD121SN1D(120,300MA) L2 GND GND AL6
TP72
TEMP_FAIL AM17 GPIO_19_CTF L22 GND GND AL8
+3V_DELAY GFX_CORE_CNTRL1 AL13 GPIO_20_PWRCNTL_1 NC#1 V13 L24 GND GND AM11
<42> GFX_CORE_CNTRL1
GPIO21 AJ14 GPIO_21 NC#2 U13 C232 C224 C251 L6 GND GND AM31
<17> GPIO21
GPIO22 AK13 GPIO_22_ROMCSB NC#3 AC31 10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 M17 GND GND AM9
R80 *3.01K/F_4 <17> GPIO22
GPIO22 GPIO_23_CLKREQb AN13 CLKREQB NC#4 AD30 M22 GND GND AN11
NC#5 AC32 M24 GND GND AN2
A 3-k external pull up (3.3 V) is required if an external BIOS ROM chip is used. NC#6 AD32 DAC1 Digital Power. N16 GND GND AN30
AG32 GPIO_29 NC#7 AF32 VDD1DI : 1.8V @ 117mA +VDDD1 N18 GND GND AN6
AG33 GPIO_30 NC#8 AA29 N2 GND GND AN8
NC#9 AG21 L24 BLM15BD121SN1D(120,300MA) N21 GND GND AP11
AJ19 GENERICA N23 GND GND AP7
AK19 GENERICB Thames INSTALL, do not install for Chelsea N26 GND GND AP9
GENERICC AJ20 GENERICC C220 C206 C205 N6 GND GND AR5
B <17> GENERICC PS_0 should be tied to GND on Thames B
AK20 GENERICD 10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 R15 GND GND B11
R89 10K/F_4 TEMP_FAIL AJ24 GENERICE_HPD4 NC_TSVSSQ AF33 R135 0_4 R17 GND GND B13
AH26 GENERICF_HPD5 R2 GND GND B15
AH24 GENERICG_HPD6 R122 0_4 R20 GND GND B17
R22 GND GND B19
PS_0 AM34 TP17 R24 GND GND B21
R27 GND GND B23
AC30 CEC_1 R6 GND GND B25
T11 GND GND B27
+1.8V_VGA AK24 AD31 T13 B29
HPD1
MLPS
PS_1 TP29 GND GND
T16 GND GND B31
R96 499/F_4 T18 GND GND B33
T21 GND GND B7
R93 249/F_4 +0.6V_VREFG AH13 VREFG PS_2 AG31 TP24 PS_1,PS_2, PS_3 are NC on Thames T23 GND GND B9
Do not install for Thames T26 GND GND C1
U15 GND GND C39
TP22 BACO U17 GND GND E35
C139 0.1U/10V_4 AL21 PX_EN PS_3 AD33 TP27 U2 GND GND E5
<18> PX_EN
U20 GND GND F11
U22 GND GND F13
U24 GND
U27 GND
R141 *5.1K/F_4 DEBUG DDC/AUX
+3V_DELAY DDC1CLK AM26 U6 GND
DDC1DATA AN26 V11 GND
TESTEN AD28 TESTEN V16 GND
R47 *3.01K/F_4 TP30
GFX_CORE_CNTRL0 AUX1P AM27 V18 GND
R148 1K/F_4 AUX1N AL27 V21 GND
GFX_CORE_CNTRL1 R48 *3.01K/F_4 V23 GND
DGPU_TRSTB AM23 JTAG_TRSTB DDC2CLK AM19 V26 GND
R49 *3.01K/F_4 TP23
GFX_CORE_CNTRL2 DGPU_TDI AN23 JTAG_TDI DDC2DATA AL19 W2 GND
TP18
DGPU_TCK AK23 JTAG_TCK W6 GND
TP16
DGPU_TMS AL24 JTAG_TMS AUX2P AN20 Y15 GND
TP21
Reserve for Power Play DGPU_TDO AM24 JTAG_TDO AUX2N AM20 Y17 GND
TP20
Y20 GND
DDCCLK_AUX3P AL30 Y22 GND VSS_MECH A39
DDCDATA_AUX3N AM30 Y24 GND VSS_MECH AW1
Y27 GND VSS_MECH AW39
THERMAL
A DDCCLK_AUX4P AL29 A
AF29 DPLUS DDCDATA_AUX4N AM29
+1.8V_TSVDD AG29 DMINUS
DDCCLK_AUX5P AN21 THAMES_M2_XT
PBY160808T-121Y-N(120,2.5A) 1.8V(8mA TSVDD) DDCDATA_AUX5N AM21
+1.8V_VGA GPIO28 AK32 GPIO_28_FDO
<17> GPIO28
L28 DDCCLK_AUX6P AK30
AL31 TS_A DDCDATA_AUX6N AK29
C223 C219 C225
DDCVGACLK AJ30
10U/6.3V_8 1U/10V_4 0.1U/10V_4 +1.8V_TSVDD AJ32
AJ33
TSVDD
TSVSS
DDCVGADATA AJ31 <14,16,18,19,43> +1.0V_VGA
+1.0V_VGA
PROJECT : R33
<16,18,19,43> +1.8V_VGA
+1.8V_VGA Quanta Computer Inc.
THAMES_M2_XT +3V_DELAY
<17,18,42> +3V_DELAY
Custom 1A
NB5 THAMES_Main & GND
5 4 3 2 1
5 4 3 2 1
16
Memory Type
27-MHz (± 30 ppm) crystal connected to XTALIN/XTALOUT, or

DDR3 27-MHz (1.8 V) oscillator connected to XTALIN.
+1.8V_DPLL_PVDD Display Phase Lock Loop Power 27-MHz (3.3 V) oscillator connected to XO_IN, and
D DPLL_PVDD : 1.8V @ 75mA 100-MHz (3.3 V) oscillator connected to XO_IN2. (By default, this clock should not be D
BLM18PG471SN1D/1A_6 GDDR5
+1.8V_VGA +1.8V_DPLL_PVDD spread since internal spreading is used.)
L23
C214
C201 C215
U23I
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4
PART 9 0F 9
+1.0V_DPLL_VDDC
DPLL_VDDC : 0.935V @ 140mA AM32 DPLL_PVDD XTALIN AV33 EVGA-XTALI 22P/50V_4 C609
1
+1.0V_VGA L22 BLM18PG471SN1D/1A_6 +1.0V_DPLL_VDDC AN31 DPLL_VDDC
R417 Y7
1.0V(125mA DPLL_VDDC) C185 C203 C202 10M_6 27MHZ
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 AN32 DPLL_PVSS
2
C DPLL_PVSS C
XTALOUT AU34 EVGA-XTALO C628
+1.8V_MPLL_PVDD 22P/50V_4
MPLL_PVDD : 1.8V @ 150mA
BLM18PG471SN1D/1A_6
+1.8V_VGA +1.8V_MPLL_PVDD H7 MPLL_PVDD
L33 H8 MPLL_PVDD
C402
C404 C403 XO_IN AW34
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4
AM10 SPLL_PVDD
PLLS/XTAL
R120 0_4
+1.8V_SPLL_PVDD
SPLL_PVDD : 1.8V @ 75mA AN9 SPLL_VDDC XO_IN2 AW35
+1.8V_VGA L17 BLM15BD121SN1D(120,300MA) +1.8V_SPLL_PVDD
C117 AN10 SPLL_PVSS

C112 C127
B B
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4
CLKTESTA AK10 CLKTESTA

AF30 NC_XTAL_PVDD CLKTESTB AL10 CLKTESTB
AF31 NC_XTAL_PVSS
+1.0V_VGA
+1.0V_SPLL_VDDC <14,18,19,43> +1.0V_VGA
SPLL_VDDC : 0.935V @ 150mA +1.8V_VGA
<15,18,19,43> +1.8V_VGA
C136 C162
+1.0V_VGA L19 BLM18PG471SN1D/1A_6 +1.0V_SPLL_VDDC *0.1U/10V_4 *0.1U/10V_4
Debug only,
1.0V(125mA DPLL_VDDC) C132 C172 C161 THAMES_M2_XT
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 for clock observation,
SPLL_PVSS if not needed, DNI R88 R99
*51.1/F_4 *51.1/F_4
route 50ohms
A A
single-ended/
100ohms diff and keep short PROJECT : R33
Custom 1A
NB5 THAMES_XTAL
5 4 3 2 1
5 4 3 2 1
U23G
PART 7 0F 9
VARY_BL AK27
17
LVDS CONTROL DIGON AJ27
CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
TXCLK_UP_DPF3P AK35 THEY MUST NOT CONFLICT DURING RESET
TXCLK_UN_DPF3N AL36
D D
TXOUT_U0P_DPF2P AJ38 STRAPS MLPS GPIO PIN DESCRIPTION OF DEFAULT SETTINGS Default Setting
TXOUT_U0N_DPF2N AK37
TXOUT_U1P_DPF1P AH35 MLPS_DISABLE NA GPIO_28_FDO Enable MLPS, NA for Thames/Whistler/Seymour X

TXOUT_U1N_DPF1N AJ36 0: Enable MLPS, disable GPIO PINSTRAP
1: Disable MLPS, enable GPIO PINSTRAP
TXOUT_U2P_DPF0P AG38
TXOUT_U2N_DPF0N AH37
TX_PWRS_ENB PS_1[4] GPIO0 Transmitter Power Savings Enable
TXOUT_U3P AF35 0: 50% Tx output swing X
TXOUT_U3N AG36 1: Full Tx output swing
LVTMDP
TX_DEEMPH_EN PS_1[5] GPIO1 PCIE Transmitter De-emphasis Enable X

0: Tx de-emphasis disabled
1: Tx de-emphasis enabled
TXCLK_LP_DPE3P AP34
TXCLK_LN_DPE3N AR34 BIF_GEN3_EN_A PS_1[1] GPIO2 PCIE Gen3 Enable (NOTE: RESERVED for Thames/Whistler/Seymour) 1
0: GEN3 not supported at power-on
TXOUT_L0P_DPE2P AW37 1: GEN3 supported at power-on
TXOUT_L0N_DPE2N AU35
BIF_VGA DIS PS_2[4] GPIO9 VGA Control 0
TXOUT_L1P_DPE1P AR37 0: VGA controller capacity enabled
TXOUT_L1N_DPE1N AU39 1: VGA controller capacity disabled (for multi-GPU)
TXOUT_L2P_DPE0P AP35
TXOUT_L2N_DPE0N AR35 ROMIDCFG[2:0] PS_0[3..1] GPIO[13:11] Serial ROM type or Memory Aperture Size Select
TXOUT_L3P AN36 If GPIO22 = 0, defines memory aperture size XXX
TXOUT_L3N AP37 If GPIO22 = 1, defines ROM type
100 - 512Kbit M25P05A (ST)
101 - 1Mbit M25P10A (ST)
101 - 2Mbit M25P20 (ST)
101 - 4Mbit M25P40 (ST)
THAMES_M2_XT
101 - 8Mbit M25P80 (ST)
C 100 - 512Kbit Pm25LV512 (Chingis) C
101 - 1Mbit Pm25LV010 (Chingis)
+3V_DELAY
BIOS_ROM_EN PS_2[3] GPIO22 Enable external BIOS ROM device X
0: Disabled
1: Enabled
<15> GPIO0 GPIO0 R67 *10K_4
AUD[1] NA HSYNC 00 - No audio function XX
AUD[0] NA VSYNC 01 - Audio for DP only
<15> GPIO1 GPIO1 R95 *10K_4 10 - Audio for DP and HDMI if dongle is detected
11 - Audio for both DP and HDMI
GPIO2 R65 *10K_4 HDMI must only be enabled on systems that are legally entitled. It is the
<15> GPIO2 responsibility of the system designer to ensure that the system is entitled to
support this feature.
GPIO9 R68 *10K_4
<15> GPIO9
CEC_DIS PS_0[4] GENLK_VSYNC Enable CEC function. Reserved for Thames/Whistler/Seymour X
GPIO13 R66 *10K_4 0: Disabled
<15> GPIO13 1: Enabled
GPIO12 R74 *10K_4
<15> GPIO12
GPIO11 R76 10K_4
<15> GPIO11
GPIO22 R77 *10K_4 NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR
<15> GPIO22 IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET
R79 *10K_4 RESERVED PS_1[3] GENLK_CLK Reserved 0

<15> GENLK_VSYNC RESERVED PS_1[2] GPIO8 Reserved 0
R420 *10K_4 RESERVED NA GPIO21 Reserved 0
<15> GPU_HSYNC_COM RESERVED NA GENERICC Reserved (for Thames/Whistler/Seymour only) 0
R421 *10K_4
<15> GPU_VSYNC_COM
AUD_PORT_CONN_PINSTRAP[2] PS_3[5] NA STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS XXX
<15> GENLK_CLK R69 *10K_4 AUD_PORT_CONN_PINSTRAP[1] PS_3[4] NA 111 = 0 usable endpoints
AUD_PORT_CONN_PINSTRAP[0] PS_0[5] NA 110 = 1 usable endpoints
B GPIO8 R70 *10K_4 101 = 2 usable endpoints B
<15> GPIO8 100 = 3 usable endpoints
R106 *10K_4 011 = 4 usable endpoints
<15> GENERICC 010 = 5 usable endpoints
GPIO21 R75 *10K_4 001 = 6 usable endpoints
<15> GPIO21 000 = all endpoints are usable
GPIO28 R129 10K_4
<15> GPIO28
Power Up/Down Sequence

Memory Aperture size
GPIO9 GPIO13 GPIO12 GPIO11
BIOSROM ROMIDCFG2 ROMIDCFG1 ROMIDCFG0
+VGA_CORE VDDC
0 128M 0 0 0
0 256M 0 0 1 +VGA_CORE VDDCI
0 64M 0 1 0
+1.5V_VGA VDDR1
0 32M 0 1 1
0 512M 1 0 0
A +3.3V_Delay VDDR3 A
0 1G 1 0 1
+1.8V_VGA VDDR4
0 2G 1 1 0
+1.8V_VGA VDD_CT
0 4G 1 1 1
20ms 20ms PROJECT : R33
It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0. Quanta Computer Inc.
Custom 1A
NB5 THAMES_LVDS / STRAP
5 4 3 2 1
5 4 3 2 1
U23E Chelsea uninstall Chelsea uninstall PCIe I/O power. +1.8V_VGA
18
VDDR1 , 1.5V @ 2A, GDDR5 900MHz Thames install, Thames install
+1.5V_VGA +PCIE_VDDR1 total 440mA PCIE_VDDR : 1.8V @ 200mA
PART 5 0F 9
Rc
MEM I/O L29
I/O power for the AC7 VDDR1 NC_PCIE_VDDR AA31 BLM15AG700SS1D(70,0.5A) C321 C309 C301 C291 C342 C334
C359 C471 C659 C477 C414 C681 C283 C413 C665 C474 AD11 VDDR1 NC_PCIE_VDDR AA32 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 1U/6.3V_4 10U/6.3VS_6 10U/6.3VS_6
memory interface. +PCIE_VDDR2
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AF7 VDDR1 NC_PCIE_VDDR AA33
AG10 VDDR1 NC_PCIE_VDDR AA34 Rd
AJ7 VDDR1 NC_PCIE_VDDR W30 L30
AK8 VDDR1 NC_PCIE_VDDR Y31 BLM15AG700SS1D(70,0.5A)
AL9 VDDR1 NC_BIF_VDDC V28 L31 BIF_VDDC
G11 VDDR1 NC_BIF_VDDC W29 *BLM15AG700SS1D(70,0.5A) PCIe Digital Power Supply
G14 VDDR1 PCIE_PVDD AB37 +1.8V_VGA PCIE_VDDC : 0.935V @ 1.88A (GEN2.0) +1.0V_VGA
PCIE
G17 VDDR1
G20 VDDR1 PCIE_VDDC G30 PCIE_VDDC : 0.935V @ 2.5A (GEN3.0)
G23 VDDR1 PCIE_VDDC G31
C355 C420 C776 C736 C613 C475 G26 VDDR1 PCIE_VDDC H29
10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 G29 VDDR1 PCIE_VDDC H30 C348 C332 C358 C345 C354 C344 C360 C333 C335
D D
H10 VDDR1 PCIE_VDDC J29 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
J7 VDDR1 PCIE_VDDC J30 +1.0V_VGA
J9 VDDR1 PCIE_VDDC L28
K11 VDDR1 PCIE_VDDC M28
K13 VDDR1 PCIE_VDDC N28
K8 VDDR1 PCIE_VDDC R28 C353 C351 C322 C338 C319 C327
L12 VDDR1 PCIE_VDDC T28 BIF_VDDC 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 10U/6.3VS_6
L16 VDDR1 PCIE_VDDC U28 Ra
Reserve for Drop L21 VDDR1 R163 *0_4
L23 VDDR1 Rb
L26 VDDR1 BIF_VDDC N27 R456 *0_4
BACO +VGA_CORE
C771 C364 C428 C589 C701 L7 VDDR1 BIF_VDDC T27 Ra Rb Rc Rd
*22U/6.3VS_8 *22U/6.3VS_8 *22U/6.3VS_8 22U/6.3VS_8 *22U/6.3VS_8 M11 VDDR1
N11 VDDR1 Chelsea-non BACO install na na na
P7 VDDR1 VDDC AA15
CORE Chelsea-BACO install na na na
R11 VDDR1 VDDC AA17
330u_2.5V_3528
*330u_2.5V_3528
U11 VDDR1 VDDC AA20
C473 C142 C746 C590 C710 U7 VDDR1 VDDC AA22 Thames-non BACO na install install install
+VGA_CORE
+ +
*22U/6.3VS_8 22U/6.3VS_8 *22U/6.3VS_8 Y11 VDDR1 VDDC AA24
Y7 VDDR1 VDDC AA27 Thames-BACO na na install install
1
VDDC AB16
VDDC AB18
VDDC AB21
VDDC AB23
VDDC_CT: 1.8V @250mA +1.8V_VDD_CT LEVEL VDDC AB26
+1.8V_VGA TRANSLATION VDDC AB28 C145 C331 C317 C330 C315 C144 C314 C147 C347 C329
L51 BLM15BD121SN1D(120,300MA) AF26 VDD_CT VDDC AC17 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
AF27 VDD_CT VDDC AC20
AG26 VDD_CT VDDC AC22
AG27 VDD_CT VDDC AC24
C636 C646 C650 C644 C651 VDDC AC27
10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 VDDC AD18
I/O VDDC AD21
AF23 VDDR3 VDDC AD23
+3V_DELAY AF24 VDDR3 VDDC AD26 C260 C643 C634 C316 C328 C295 C261 C262 C174 C313
+3V_VGA VDDR3 : 3.3V @ 60mA AG23 VDDR3 VDDC AF17 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
L18 PBY160808T-221Y-N(220,2A) AG24 VDDR3 VDDC AF20
VDDC AF22
DVP VDDC AG16
C AD12 VDDR4 VDDC AG18 C
C153 C194 C182 C195 AF11 VDDR4
10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AF12 VDDR4 VDDC AH22
AF13 VDDR4 VDDC AH27
VDDC AH28 C152 C264 C311 C265 C263 C164 C294 C204 C296 C173
+VDDR4 VDDC M26 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
VDDR4 : 1.8V @ 300mA AF15 VDDR4 VDDC N24
L20 PBY160808T-221Y-N(220,2A) AG11 VDDR4 VDDC R18
AG13 VDDR4 VDDC R21
AG15 VDDR4 VDDC R23
VDDC R26
C177 C176 C191 C190 C258 C257 VDDC T17
10U/6.3VS_6 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 VDDC T20
VDDC T22 C150 C270 C197 C163 C137
VDDC T24 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6
VDDC U16
VDDC U18 Reserve for Drop
VDDC U21
VDDC U23
VDDC U26
330u_2.5V_3528
VDDC V17
1
VDDC V20
VDDC V22 C143 C254 C183 C292 +
VDDC V24 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 C312
VDDC V27
2
VDDC Y16
VDDC Y18
VDDC Y21
VDDC Y23
VDDC Y26
VDDC Y28 +VDDCI +VGA_CORE
VDDCI 0.8-1.15V @ 6A
VDDCI AA13
VDDCI AB13 L32
VDDCI AC12 UPB201212T-121Y-N(120,100M,5A)_8
VDDCI AC15
VDDCI AD13
VDDCI AD16 C259 C337 C298 C276 C293 C343 C326 C350
VDDCI M15 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
B
VDDCI M16 B
VDDCI M18
VOLTAGE
SENESE
VDDCI M23
CORE I/O
N13
ISOLATED
VDDCI
AF28 FB_VDDC VDDCI N15
<43> PX_MODE1 VDDCI N17
VDDCI N20 C346 C349 C356 C323 C308
AG28 FB_VDDCI VDDCI N22 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6
1U/6.3V_4 1U/6.3V_4
3
VDDCI R12
Q42 VDDCI R13
AH29 FB_GND VDDCI R16
PX_EN 2 VDDCI T12
VDDCI T15
2N7002 VDDCI V15
VDDCI Y13
+1.5V_VGA
1
<20,21,22,43> +1.5V_VGA
+1.0V_VGA
<14,16,19,43> +1.0V_VGA
THAMES_M2_XT +1.8V_VGA
<15,16,19,43> +1.8V_VGA
+3V_VGA
<30,43> +3V_VGA
+VGA_CORE
<42> +VGA_CORE
PX_MODE R487 *0_4 PX_MODE1
+5V
+5V
Support BACO Mode +3V +3V
R455
Q15
AO3416
Q16
AO3416
R454 1K_4
R489 1K_4 1 3 3 1 BIF_VDDC
+1.0V_VGA
*10K_4 R466 PX_EN##
PX_EN#
100K/F_4
2
2
3
PX_EN#
Q21 Q17
3
R488 0_4 AO3416 AO3416

<42> PX_MODE
3
Q40 2 Q39 2 Q20 C365 C362 C363 C361

2N7002 2N7002 +VGA_CORE 1 3 3 1 22U/6.3VS_8 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6
2 2N7002 +3V
<15> PX_EN 2 Q43 C716
2N7002
1
2
3
A PX_EN## A
5
R522 Q41 0.1U/10V_4

1
<9,30,42,43> DGPU_PWROK 2
1
5.1K/F_4 2 4 BACO_EN
PX_MODE 1
2N7002
U25 Note1. 1. No BACO Support :BIF_VDDC shorts with VDDC (Install Ra)
3
TC7SH08FU
1
<6,30> EC_PWROK 2. BACO Support: Refer to the BACO reference

schematics/Application note for detail about BIF_VDDC Rail
PX_EN = 0, for Normal Operation
PX_EN = 1, for BACO MODE if BACO is Supported (Uninstall Ra) PROJECT : R33
Custom THAMES_Power & BACO 1A
NB5
5 4 3 2 1
5 4 3 2 1
For Thames a dedicated BEAD is required

for each DPAB_VDD18, DPCD_VDD18, DPEF_VDD18
U23H
PART 8 0F 9
For Thames a dedicated BEAD is required
for each DPAB_VDD10, DPCD_VDD10, DPEF_VDD10
DPAB_VDD10
L21
+1.0V_VGA 19
BLM15BD121SN1D(120,300MA)
D D
DP_VDDR DP_VDDC
DP_VDDC AP31 C186 C187 C167

+1.8V_VGA DP_VDDC AP32 0.1U/10V_4 1U/6.3V_4 10U/6.3VS_6
DPAB_VDD18 DP_VDDC AN33
DP_VDDC AP33 +1.0V_VGA
L50 BLM15BD121SN1D(120,300MA) AN24 DP_VDDR
AP24 DP_VDDR DP_VDDC AP13 DPCD_VDD10
AP25 DP_VDDR DP_VDDC AT13 L49 BLM15BD121SN1D(120,300MA)
C610 C612 C611 AP26 DP_VDDR DP_VDDC AP14
10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 AU28 DP_VDDR DP_VDDC AP15
+1.8V_VGA AV29 DP_VDDR C616 C608 C604
DP_VDDC AL33 0.1U/10V_4 1U/6.3V_4 10U/6.3VS_6
DPCD_VDD18 DP_VDDC AM33
L48 BLM15BD121SN1D(120,300MA) AP20 DP_VDDR DP_VDDC AK33
AP21 DP_VDDR DP_VDDC AK34 +1.0V_VGA
AP22 DP_VDDR
C601 C615 C606 AP23 DP_VDDR
DPEF_VDD10
10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 AU18 DP_VDDR L26 BLM15BD121SN1D(120,300MA)
+1.8V_VGA AV19 DP_VDDR
DP GND
C DPEF_VDD18 DP_VSSR AN27 C230 C229 C231 C
L27 BLM15BD121SN1D(120,300MA) AH34 DP_VDDR DP_VSSR AP27 0.1U/10V_4 1U/6.3V_4 10U/6.3VS_6
AJ34 DP_VDDR DP_VSSR AP28
AF34 DP_VDDR DP_VSSR AW24
C212 C217 C216 AG34 DP_VDDR DP_VSSR AW26
10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 AM37 DP_VDDR DP_VSSR AN29
AL38 DP_VDDR DP_VSSR AP29
DP_VSSR AP30
DP_VSSR AW30
DP_VSSR AW32
DP_VSSR AN17
DP_VSSR AP16
DP_VSSR AP17
DP_VSSR AW14
DP_VSSR AW16
DP_VSSR AN19
DP_VSSR AP18
DP_VSSR AP19
CALIBRATION
DP_VSSR AW20
DP_VSSR AW22
DP_VSSR AN34
B B
DP_VSSR AP39
R118 150/F_4 AW28 DPAB_CALR DP_VSSR AR39
DP_VSSR AU37
DP_VSSR AF39
DP_VSSR AH39
R410 150/F_4 AW18 DPCD_CALR DP_VSSR AK39
DP_VSSR AL34
DP_VSSR AV27
DP_VSSR AR28
R419 150/F_4 AM39 DPEF_CALR DP_VSSR AV17
DP_VSSR AR18
DP_VSSR AN38
DP_VSSR AM35
+1.0V_VGA
<14,16,18,43> +1.0V_VGA
+1.8V_VGA
<15,16,18,43> +1.8V_VGA
A THAMES_M2_XT A
PROJECT : R33
Custom 1A
NB5 THAMES_DP Powers
5 4 3 2 1
5 4 3 2 1
20
VMA_ODT0
<21> VMA_ODT0
<21> VMA_ODT1 VMA_ODT1 <22> VMB_ODT0 VMB_ODT0
U23D
VMB_ODT1
U23C <22> VMB_ODT1
<21> VMA_RAS0# VMA_RAS0#
PART 4 0F 9
<21> VMA_RAS1# VMA_RAS1# <22> VMB_RAS0# VMB_RAS0#
PART 3 0F 9
VMB_RAS1#
<22> VMB_RAS1# GDDR5/DDR3
<21> VMA_CAS0# VMA_CAS0# GDDR5/DDR3 VMB_DQ0 C5 DQB0_0 MAB0_0/MAB_0 P8 VMB_MA0
<21> VMA_CAS1# VMA_CAS1# VMA_DQ0 C37 DQA0_0 MAA0_0/MAA_0 G24 VMA_MA0 <22> VMB_CAS0# VMB_CAS0# VMB_DQ1 C3 DQB0_1 MAB0_1/MAB_1 T9 VMB_MA1
VMA_DQ1 C35 DQA0_1 MAA0_1/MAA_1 J23 VMA_MA1 VMB_CAS1# VMB_DQ2 E3 DQB0_2 MAB0_2/MAB_2 P9 VMB_MA2
<22> VMB_CAS1#
VMA_WE0# VMA_DQ2 A35 DQA0_2 MAA0_2/MAA_2 H24 VMA_MA2 VMB_DQ3 E1 DQB0_3 MAB0_3/MAB_3 N7 VMB_MA3
<21> VMA_WE0#
VMA_WE1# VMA_DQ3 E34 DQA0_3 MAA0_3/MAA_3 J24 VMA_MA3 VMB_WE0# VMB_DQ4 F1 DQB0_4 MAB0_4/MAB_4 N8 VMB_MA4
<21> VMA_WE1# <22> VMB_WE0#
VMA_DQ4 G32 DQA0_4 MAA0_4/MAA_4 H26 VMA_MA4 <22> VMB_WE1# VMB_WE1# VMB_DQ5 F3 DQB0_5 MAB0_5/MAB_5 N9 VMB_MA5
VMA_CS0# VMA_DQ5 D33 DQA0_5 MAA0_5/MAA_5 J26 VMA_MA5 VMB_DQ6 F5 DQB0_6 MAB0_6/MAB_6 U9 VMB_MA6
<21> VMA_CS0#
VMA_DQ6 F32 DQA0_6 MAA0_6/MAA_6 H21 VMA_MA6 VMB_CS0# VMB_DQ7 G4 DQB0_7 MAB0_7/MAB_7 U8 VMB_MA7
D <22> VMB_CS0# D
<21> VMA_CS1# VMA_CS1# VMA_DQ7 E32 DQA0_7 MAA0_7/MAA_7 G21 VMA_MA7 VMB_DQ8 H5 DQB0_8 MAB1_0/MAB_8 Y9 VMB_MA8
VMA_DQ8 D31 H19 VMA_MA8 VMB_CS1# VMB_DQ9 H6 W9 VMB_MA9
MEMORY INTERFACE A
DQA0_8 MAA1_0/MAA_8 <22> VMB_CS1# DQB0_9 MAB1_1/MAB_9
VMA_CKE0 VMA_DQ9 F30 DQA0_9 MAA1_1/MAA_9 H20 VMA_MA9 VMB_DQ10 J4 DQB0_10 MAB1_2/MAB_10 AC8 VMB_MA10
<21> VMA_CKE0
VMA_CKE1 VMA_DQ10 C30 DQA0_10 MAA1_2/MAA_10 L13 VMA_MA10 VMB_CKE0 VMB_DQ11 K6 DQB0_11 MAB1_3/MAB_11 AC9 VMB_MA11
<21> VMA_CKE1 <22> VMB_CKE0
VMA_DQ11 A30 DQA0_11 MAA1_3/MAA_11 G16 VMA_MA11 <22> VMB_CKE1 VMB_CKE1 VMB_DQ12 K5 DQB0_12 MAB1_4/MAB_12 AA7 VMB_MA12
VMA_CLK0 VMA_DQ12 F28 DQA0_12 MAA1_4/MAA_12 J16 VMA_MA12 VMB_DQ13 L4 DQB0_13 MAB1_5/BA2 AA8 VMB_BA2
<21> VMA_CLK0
VMA_CLK0# VMA_DQ13 C28 DQA0_13 MAA1_5/MAA_BA2 H16 VMA_BA2 VMB_CLK0 VMB_DQ14 M6 DQB0_14 MAB1_6/BA0 Y8 VMB_BA0
<21> VMA_CLK0# <22> VMB_CLK0
VMA_DQ14 A28 DQA0_14 MAA1_6/MAA_BA0 J17 VMA_BA0 <22> VMB_CLK0# VMB_CLK0# VMB_DQ15 M1 DQB0_15 MAB1_7/BA1 AA9 VMB_BA1
<21> VMA_CLK1 VMA_CLK1 VMA_DQ15 E28 DQA0_15 MAA1_7/MAA_BA1 H17 VMA_BA1 VMB_DQ16 M3 DQB0_16
MEMORY INTERFACE B
<21> VMA_CLK1# VMA_CLK1# VMA_DQ16 D27 DQA0_16 <22> VMB_CLK1 VMB_CLK1 VMB_DQ17 M5 DQB0_17 WCKB0_0/DQMB_0 H3 VMB_DM0
VMA_DQ17 F26 DQA0_17 WCKA0_0/DQMA_0 A32 VMA_DM0 VMB_CLK1# VMB_DQ18 N4 DQB0_18 WCKB0B_0/DQMB_1 H1 VMB_DM1
<22> VMB_CLK1#
VMA_WDQS[7..0] VMA_DQ18 C26 DQA0_18 WCKA0B_0/DQMA_1 C32 VMA_DM1 VMB_DQ19 P6 DQB0_19 WCKB0_1/DQMB_2 T3 VMB_DM2
<21> VMA_WDQS[7..0] VMB_WDQS[7..0]
VMA_DQ19 A26 DQA0_19 WCKA0_1/DQMA_2 D23 VMA_DM2 VMB_DQ20 P5 DQB0_20 WCKB0B_1/DQMB_3 T5 VMB_DM3
VMA_RDQS[7..0] <22> VMB_WDQS[7..0]
VMA_DQ20 F24 DQA0_20 WCKA0B_1/DQMA_3 E22 VMA_DM3 VMB_DQ21 R4 DQB0_21 WCKB1_0/DQMB_4 AE4 VMB_DM4
<21> VMA_RDQS[7..0] VMB_RDQS[7..0]
VMA_DQ21 C24 DQA0_21 WCKA1_0/DQMA_4 C14 VMA_DM4 VMB_DQ22 T6 DQB0_22 WCKB1B_0/DQMB_5 AF5 VMB_DM5
VMA_DM[7..0] VMA_DQ22 VMA_DM5 <22> VMB_RDQS[7..0] VMB_DQ23 VMB_DM6
<21> VMA_DM[7..0] A24 DQA0_22 WCKA1B_0/DQMA_5 A14 T1 DQB0_23 WCKB1_1/DQMB_6 AK6
VMA_DQ23 E24 DQA0_23 WCKA1_1/DQMA_6 E10 VMA_DM6 VMB_DM[7..0] VMB_DQ24 U4 DQB0_24 WCKB1B_1/DQMB_7 AK5 VMB_DM7
VMA_DQ[63..0] <22> VMB_DM[7..0]
VMA_DQ24 C22 DQA0_24 WCKA1B_1/DQMA_7 D9 VMA_DM7 VMB_DQ25 V6 DQB0_25
<21> VMA_DQ[63..0] VMB_DQ[63..0]
VMA_DQ25 A22 DQA0_25 VMB_DQ26 V1 DQB0_26 EDCB0_0/QSB_0 F6 VMB_RDQS0
VMA_MA[13..0] <22> VMB_DQ[63..0]
<21> VMA_MA[13..0] VMA_DQ26 F22 DQA0_26 EDCA0_0/QSA_0 C34 VMA_RDQS0 VMB_DQ27 V3 DQB0_27 EDCB0_1/QSB_1 K3 VMB_RDQS1
VMA_DQ27 D21 DQA0_27 EDCA0_1/QSA_1 D29 VMA_RDQS1 VMB_MA[13..0] VMB_DQ28 Y6 DQB0_28 EDCB0_2/QSB_2 P3 VMB_RDQS2
<22> VMB_MA[13..0]
VMA_DQ28 A20 DQA0_28 EDCA0_2/QSA_2 D25 VMA_RDQS2 VMB_DQ29 Y1 DQB0_29 EDCB0_3/QSB_3 V5 VMB_RDQS3
<21> VMA_BA0 VMA_BA0 VMA_DQ29 F20 DQA0_29 EDCA0_3/QSA_3 E20 VMA_RDQS3 VMB_DQ30 Y3 DQB0_30 EDCB1_0/QSB_4 AB5 VMB_RDQS4
VMA_BA1 VMA_DQ30 D19 DQA0_30 EDCA1_0/QSA_4 E16 VMA_RDQS4 VMB_BA0 VMB_DQ31 Y5 DQB0_31 EDCB1_1/QSB_5 AH1 VMB_RDQS5
<21> VMA_BA1 <22> VMB_BA0
VMA_BA2 VMA_DQ31 E18 DQA0_31 EDCA1_1/QSA_5 E12 VMA_RDQS5 VMB_BA1 VMB_DQ32 AA4 DQB1_0 EDCB1_2/QSB_6 AJ9 VMB_RDQS6
<21> VMA_BA2 <22> VMB_BA1
VMA_DQ32 C18 DQA1_0 EDCA1_2/QSA_6 J10 VMA_RDQS6 VMB_BA2 VMB_DQ33 AB6 DQB1_1 EDCB1_3/QSB_7 AM5 VMB_RDQS7
<22> VMB_BA2
VMA_DQ33 A18 DQA1_1 EDCA1_3/QSA_7 D7 VMA_RDQS7 VMB_DQ34 AB1 DQB1_2
VMA_DQ34 F18 DQA1_2 VMB_DQ35 AB3 DQB1_3 DDBIB0_0/QSB_0B G7 VMB_WDQS0
VMA_DQ35 D17 DQA1_3 DDBIA0_0/QSA_0B A34 VMA_WDQS0 VMB_DQ36 AD6 DQB1_4 DDBIB0_1/QSB_1B K1 VMB_WDQS1
C VMA_DQ36 A16 DQA1_4 DDBIA0_1/QSA_1B E30 VMA_WDQS1 VMB_DQ37 AD1 DQB1_5 DDBIB0_2/QSB_2B P1 VMB_WDQS2 C
+1.5V_VGA VMA_DQ37 F16 DQA1_5 DDBIA0_2/QSA_2B E26 VMA_WDQS2 +1.5V_VGA VMB_DQ38 AD3 DQB1_6 DDBIB0_3/QSB_3B W4 VMB_WDQS3
VMA_DQ38 D15 DQA1_6 DDBIA0_3/QSA_3B C20 VMA_WDQS3 VMB_DQ39 AD5 DQB1_7 DDBIB1_0/QSB_4B AC4 VMB_WDQS4
VMA_DQ39 E14 DQA1_7 DDBIA1_0/QSA_4B C16 VMA_WDQS4 VMB_DQ40 AF1 DQB1_8 DDBIB1_1/QSB_5B AH3 VMB_WDQS5
VMA_DQ40 F14 DQA1_8 DDBIA1_1/QSA_5B C12 VMA_WDQS5 VMB_DQ41 AF3 DQB1_9 DDBIB1_2/QSB_6B AJ8 VMB_WDQS6
R219 VMA_DQ41 D13 DQA1_9 DDBIA1_2/QSA_6B J11 VMA_WDQS6 R201 VMB_DQ42 AF6 DQB1_10 DDBIB1_3/QSB_7B AM3 VMB_WDQS7
VMA_DQ42 F12 DQA1_10 DDBIA1_3/QSA_7B F8 VMA_WDQS7 VMB_DQ43 AG4 DQB1_11
40.2/F_4 VMA_DQ43 A12 DQA1_11 40.2/F_4 VMB_DQ44 AH5 DQB1_12 ADBIB0/ODTB0 T7 VMB_ODT0
VMA_DQ44 D11 DQA1_12 ADBIA0/ODTA0 J21 VMA_ODT0 VMB_DQ45 AH6 DQB1_13 ADBIB1/ODTB1 W7 VMB_ODT1
VMA_DQ45 F10 DQA1_13 ADBIA1/ODTA1 G19 VMA_ODT1 VMB_DQ46 AJ4 DQB1_14
VMA_DQ46 A10 DQA1_14 VMB_DQ47 AK3 DQB1_15 CLKB0 L9 VMB_CLK0
VMA_DQ47 C10 DQA1_15 CLKA0 H27 VMA_CLK0 VMB_DQ48 AF8 DQB1_16 CLKB0B L8 VMB_CLK0#
VMA_DQ48 G13 DQA1_16 CLKA0B G27 VMA_CLK0# VMB_DQ49 AF9 DQB1_17
R214 VMA_DQ49 H13 DQA1_17 R200 VMB_DQ50 AG8 DQB1_18 CLKB1 AD8 VMB_CLK1
C408 VMA_DQ50 J13 DQA1_18 CLKA1 J14 VMA_CLK1 C382 VMB_DQ51 AG7 DQB1_19 CLKB1B AD7 VMB_CLK1#
1U/6.3V_4 100/F_4 VMA_DQ51 H11 DQA1_19 CLKA1B H14 VMA_CLK1# 1U/6.3V_4 100/F_4 VMB_DQ52 AK9 DQB1_20
VMA_DQ52 G10 DQA1_20 VMB_DQ53 AL7 DQB1_21 RASB0B T10 VMB_RAS0#
VMA_DQ53 G8 DQA1_21 RASA0B K23 VMA_RAS0# VMB_DQ54 AM8 DQB1_22 RASB1B Y10 VMB_RAS1#
VMA_DQ54 K9 DQA1_22 RASA1B K19 VMA_RAS1# VMB_DQ55 AM7 DQB1_23
PLACE MVREFD DIVIDERS VMA_DQ55 K10 DQA1_23 PLACE MVREFD DIVIDERS VMB_DQ56 AK1 DQB1_24 CASB0B W 10 VMB_CAS0#
AND CAPS CLOSE TO ASIC VMA_DQ56 G9 DQA1_24 CASA0B K20 VMA_CAS0# AND CAPS CLOSE TO ASIC VMB_DQ57 AL4 DQB1_25 CASB1B AA10 VMB_CAS1#
VMA_DQ57 A8 DQA1_25 CASA1B K17 VMA_CAS1# VMB_DQ58 AM6 DQB1_26
+1.5V_VGA VMA_DQ58 C8 DQA1_26 +1.5V_VGA VMB_DQ59 AM1 DQB1_27 CSB0B_0 P10 VMB_CS0#
VMA_DQ59 E8 DQA1_27 CSA0B_0 K24 VMA_CS0# VMB_DQ60 AN4 DQB1_28 CSB0B_1 L10
VMA_DQ60 A6 DQA1_28 CSA0B_1 K27 VMB_DQ61 AP3 DQB1_29
VMA_DQ61 C6 DQA1_29 VMB_DQ62 AP1 DQB1_30 CSB1B_0 AD10 VMB_CS1#
R220 VMA_DQ62 E6 DQA1_30 CSA1B_0 M13 VMA_CS1# R64 VMB_DQ63 AP5 DQB1_31 CSB1B_1 AC10
VMA_DQ63 A5 DQA1_31 CSA1B_1 K16
40.2/F_4 40.2/F_4 CKEB0 U10 VMB_CKE0
MVREFDA L18 MVREFDA CKEA0 K21 VMA_CKE0 MVREFDB Y12 MVREFDB CKEB1 AA11 VMB_CKE1
B B
MVREFSA L20 MVREFSA CKEA1 J20 VMA_CKE1 MVREFSB AA12 MVREFSB
+1.5V_VGA WEB0B N10 VMB_WE0#
RaR180 240/F_4 L27 NC_MEM_CALRN0 WEA0B K26 VMA_WE0# WEB1B AB11 VMB_WE1#
RbR173 240/F_4 N12 NC_MEM_CALRN1 WEA1B L15 VMA_WE1#
R215 RcR108 240/F_4 AG12 NC_MEM_CALRN2 R72 need check
C409 C114 MAB0_8/MAB_13 T8 VMB_MA13
1U/6.3V_4 100/F_4 RdR174 240/F_4 M12 NC_MEM_CALRP1 MAA0_8/MAA_13 H23 VMA_MA13 1U/6.3V_4 100/F_4 MAB1_8/MAB_14 W8
ReR178 240/F_4 M27 MEM_CALRP0 MAA1_8/MAA_14 J19 MAB0_9/MAB_15 U12
RfR61 240/F_4 AH12 MEM_CALRP2 MAA0_9/MAA_15 M21 MAB1_9/RSVD V12
MAA1_9/RSVD M20
DRAM_RST AH11 DRAM_RST
For Chelsea,
Uninstall Ra, Rb, Rc and Rd
THAMES_M2_XT
For Thames THAMES_M2_XT

Install Ra, Rb, Rc and Rd
install 240 Ohm for Re AND Rf DRAM_RST R81 10_4 DRAM_RST_M
DRAM_RST_M <21,22>
R86 51_4
R82 C119
4.99K/F_4
120P/50V_4
A +1.5V_VGA A
<18,21,22,43> +1.5V_VGA
PROJECT : R33
Custom 1A
NB5 THAMES_MEM_Interface
5 4 3 2 1
5 4 3 2 1
VMA_MA[13..0]
21
<20> VMA_MA[13..0] <20> VMA_DQ[63..0]
<20> VMA_DM[7..0] <20> VMA_WDQS[7..0]
<20> VMA_RDQS[7..0]
U17
CHANNEL A: 256MB/512MB DDR3 VREFC_VMA3 M9
U16
VREFCA DQL0
E4 VMA_DQ47 U27
U28 VREFD_VMA3 H2 F8 VMA_DQ44
VREFC_VMA2 VMA_DQ11 VREFDQ DQL1 VMA_DQ45 VREFC_VMA4 VMA_DQ49
M9 E4 F3 M9 E4
VREFC_VMA1 VMA_DQ0 VREFD_VMA2 VREFCA DQL0 VMA_DQ12 VMA_MA0 DQL2 VMA_DQ43 VREFD_VMA4 VREFCA DQL0 VMA_DQ52
M9 E4 H2 F8 N4 F9 H2 F8
VREFD_VMA1 VREFCA DQL0 VMA_DQ6 VREFDQ DQL1 VMA_DQ15 VMA_MA1 A0 DQL3 VMA_DQ46 VREFDQ DQL1 VMA_DQ50
H2 F8 F3 P8 H4 F3
VREFDQ DQL1 VMA_DQ2 VMA_MA0 DQL2 VMA_DQ10 VMA_MA2 A1 DQL4 VMA_DQ41 VMA_MA0 DQL2 VMA_DQ54
F3 N4 F9 P4 H9 N4 F9
VMA_MA0 DQL2 VMA_DQ7 VMA_MA1 A0 DQL3 VMA_DQ14 VMA_MA3 A2 DQL5 VMA_DQ40 VMA_MA1 A0 DQL3 VMA_DQ51
N4 F9 P8 H4 N3 G3 P8 H4
VMA_MA1 A0 DQL3 VMA_DQ3 VMA_MA2 A1 DQL4 VMA_DQ8 VMA_MA4 A3 DQL6 VMA_DQ42 VMA_MA2 A1 DQL4 VMA_DQ53
P8 H4 P4 H9 P9 H8 P4 H9
VMA_MA2 A1 DQL4 VMA_DQ4 VMA_MA3 A2 DQL5 VMA_DQ13 VMA_MA5 A4 DQL7 VMA_MA3 A2 DQL5 VMA_DQ48
P4 H9 N3 G3 P3 N3 G3
VMA_MA3 A2 DQL5 VMA_DQ1 VMA_MA4 A3 DQL6 VMA_DQ9 VMA_MA6 A5 VMA_MA4 A3 DQL6 VMA_DQ55
N3 G3 P9 H8 R9 P9 H8
VMA_MA4 A3 DQL6 VMA_DQ5 VMA_MA5 A4 DQL7 VMA_MA7 A6 VMA_DQ32 VMA_MA5 A4 DQL7
P9 H8 P3 R3 D8 P3
VMA_MA5 A4 DQL7 VMA_MA6 A5 VMA_MA8 A7 DQU0 VMA_DQ36 VMA_MA6 A5
P3 R9 T9 C4 R9
D VMA_MA6 A5 VMA_MA7 A6 VMA_DQ27 VMA_MA9 A8 DQU1 VMA_DQ33 VMA_MA7 A6 VMA_DQ60 D
R9 R3 D8 R4 C9 R3 D8
VMA_MA7 A6 VMA_DQ20 VMA_MA8 A7 DQU0 VMA_DQ29 VMA_MA10 A9 DQU2 VMA_DQ38 VMA_MA8 A7 DQU0 VMA_DQ59
R3 D8 T9 C4 L8 C3 T9 C4
VMA_MA8 A7 DQU0 VMA_DQ19 VMA_MA9 A8 DQU1 VMA_DQ26 VMA_MA11 A10/AP DQU3 VMA_DQ34 VMA_MA9 A8 DQU1 VMA_DQ63
T9 C4 R4 C9 R8 A8 R4 C9
VMA_MA9 A8 DQU1 VMA_DQ23 VMA_MA10 A9 DQU2 VMA_DQ28 VMA_MA12 A11 DQU4 VMA_DQ39 VMA_MA10 A9 DQU2 VMA_DQ58
R4 C9 L8 C3 N8 A3 L8 C3
VMA_MA10 A9 DQU2 VMA_DQ17 VMA_MA11 A10/AP DQU3 VMA_DQ25 VMA_MA13 A12/BC DQU5 VMA_DQ35 VMA_MA11 A10/AP DQU3 VMA_DQ61
L8 C3 R8 A8 T4 B9 R8 A8
VMA_MA11 A10/AP DQU3 VMA_DQ22 VMA_MA12 A11 DQU4 VMA_DQ30 A13 DQU6 VMA_DQ37 VMA_MA12 A11 DQU4 VMA_DQ56
R8 A8 N8 A3 T8 A4 N8 A3
VMA_MA12 A11 DQU4 VMA_DQ16 VMA_MA13 A12/BC DQU5 VMA_DQ24 A14 DQU7 VMA_MA13 A12/BC DQU5 VMA_DQ62
N8 A3 T4 B9 M8 T4 B9
VMA_MA13 A12/BC DQU5 VMA_DQ21 A13 DQU6 VMA_DQ31 A15/BA3 +1.5V_VGA A13 DQU6 VMA_DQ57
T4 B9 T8 A4 T8 A4
A13 DQU6 VMA_DQ18 A14 DQU7 VMA_CLK0 A14 DQU7
T8 A4 M8 M8
A14 DQU7 A15/BA3 +1.5V_VGA VMA_BA0 A15/BA3 +1.5V_VGA
M8 M3 B3
A15/BA3 +1.5V_VGA VMA_BA1 BA0 VDD#B3
N9 D10
VMA_BA0 R239 VMA_BA2 BA1 VDD#D10 VMA_BA0
M3 B3 M4 G8 M3 B3
VMA_BA1 BA0 VDD#B3 BA2 VDD#G8 VMA_BA1 BA0 VDD#B3
<20> VMA_BA0 M3 B3 N9 D10 56.2/F_4 K3 N9 D10
BA0 VDD#B3 VMA_BA2 BA1 VDD#D10 VDD#K3 VMA_BA2 BA1 VDD#D10
<20> VMA_BA1 N9 D10 M4 G8 C449 K9 M4 G8
BA1 VDD#D10 BA2 VDD#G8 VDD#K9 BA2 VDD#G8
<20> VMA_BA2 M4 G8 K3 N2 K3
BA2 VDD#G8 VDD#K3 VMA_CLK0_COMM VDD#N2 VDD#K3
K3 K9 <20> VMA_CLK1 J8 N10 K9
VDD#K3 VDD#K9 CK VDD#N10 VDD#K9
K9 N2 <20> VMA_CLK1# K8 R2 N2
VDD#K9 VMA_CLK0 VDD#N2 CK VDD#R2 VMA_CLK1 VDD#N2
N2 J8 N10 <20> VMA_CKE1 K10 R10 J8 N10
VDD#N2 VMA_CLK0# CK VDD#N10 R241 0.01U/16V_4 CKE/CKE0 VDD#R10 +1.5V_VGA VMA_CLK1# CK VDD#N10
<20> VMA_CLK0 J8 N10 K8 R2 K8 R2
CK VDD#N10 VMA_CKE0 CK VDD#R2 VMA_CKE1 CK VDD#R2
<20> VMA_CLK0# K8 R2 K10 R10 56.2/F_4 K10 R10
CK VDD#R2 CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA
<20> VMA_CKE0 K10 R10 <20> VMA_ODT1 K2 A2
CKE/CKE0 VDD#R10 +1.5V_VGA ODT/ODT0 VDDQ#A2
<20> VMA_CS1# L3 A9
VMA_ODT0 VMA_CLK0# CS /CS0 VDDQ#A9 VMA_ODT1
K2 A2 <20> VMA_RAS1# J4 C2 K2 A2
VMA_CS0# ODT/ODT0 VDDQ#A2 VMA_CLK1 RAS VDDQ#C2 VMA_CS1# ODT/ODT0 VDDQ#A2
<20> VMA_ODT0 K2 A2 L3 A9 <20> VMA_CAS1# K4 C10 L3 A9
ODT/ODT0 VDDQ#A2 VMA_RAS0# CS /CS0 VDDQ#A9 CAS VDDQ#C10 VMA_RAS1# CS /CS0 VDDQ#A9
<20> VMA_CS0# L3 A9 J4 C2 <20> VMA_WE1# L4 D3 J4 C2
CS /CS0 VDDQ#A9 VMA_CAS0# RAS VDDQ#C2 WE VDDQ#D3 VMA_CAS1# RAS VDDQ#C2
<20> VMA_RAS0# J4 C2 K4 C10 E10 K4 C10
RAS VDDQ#C2 VMA_WE0# CAS VDDQ#C10 R471 VDDQ#E10 VMA_WE1# CAS VDDQ#C10
<20> VMA_CAS0# K4 C10 L4 D3 F2 L4 D3
CAS VDDQ#C10 WE VDDQ#D3 VMA_RDQS5 VDDQ#F2 WE VDDQ#D3
<20> VMA_WE0# L4 D3 E10 56.2/F_4 F4 H3 E10
WE VDDQ#D3 VDDQ#E10 VMA_RDQS4 DQSL VDDQ#H3 VDDQ#E10
E10 F2 C751 C8 H10 F2
VDDQ#E10 VMA_RDQS1 VDDQ#F2 DQSU VDDQ#H10 VMA_RDQS6 VDDQ#F2
F2 F4 H3 F4 H3
VMA_RDQS0 VDDQ#F2 VMA_RDQS3 DQSL VDDQ#H3 VMA_CLK1_COMM VMA_RDQS7 DQSL VDDQ#H3
F4 H3 C8 H10 C8 H10
VMA_RDQS2 DQSL VDDQ#H3 DQSU VDDQ#H10 VMA_DM5 DQSU VDDQ#H10
C8 H10 E8 A10
C DQSU VDDQ#H10 VMA_DM4 DML VSS#A10 C
D4 B4
VMA_DM1 R475 0.01U/16V_4 DMU VSS#B4 VMA_DM6
E8 A10 E2 E8 A10
VMA_DM0 VMA_DM3 DML VSS#A10 VSS#E2 VMA_DM7 DML VSS#A10
E8 A10 D4 B4 56.2/F_4 G9 D4 B4
VMA_DM2 DML VSS#A10 DMU VSS#B4 VMA_WDQS5 VSS#G9 DMU VSS#B4
D4 B4 E2 G4 J3 E2
DMU VSS#B4 VSS#E2 VMA_WDQS4 DQSL VSS#J3 VSS#E2
E2 G9 B8 J9 G9
VSS#E2 VMA_WDQS1 VSS#G9 VMA_CLK1# DQSU VSS#J9 VMA_WDQS6 VSS#G9
G9 G4 J3 M2 G4 J3
VMA_WDQS0 VSS#G9 VMA_WDQS3 DQSL VSS#J3 VSS#M2 VMA_WDQS7 DQSL VSS#J3
G4 J3 B8 J9 M10 B8 J9
VMA_WDQS2 DQSL VSS#J3 DQSU VSS#J9 VSS#M10 DQSU VSS#J9
B8 J9 M2 P2 M2
DQSU VSS#J9 VSS#M2 DRAM_RST_M VSS#P2 VSS#M2
M2 M10 T3 P10 M10
VSS#M2 VSS#M10 RESET VSS#P10 VSS#M10
M10 P2 T2 P2
VSS#M10 DRAM_RST_M VSS#P2 VMA_ZQ3 VSS#T2 DRAM_RST_M VSS#P2
P2 T3 P10 L9 T10 T3 P10
VSS#P2 RESET VSS#P10 ZQ/ZQ0 VSS#T10 RESET VSS#P10
<20,22> DRAM_RST_M T3 P10 T2 T2
RESET VSS#P10 VMA_ZQ2 VSS#T2 VMA_ZQ4 VSS#T2
T2 L9 T10 L9 T10
VMA_ZQ1 VSS#T2 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10
L9 T10 A1 B2
ZQ/ZQ0 VSS#T10 NC VSSQ#B2
A1 B2
Vendor QCI PN B/S PN Should be 240 R226
T1
A11
NC VSSQ#B10
B10
D2 A1 B2
NC VSSQ#B2 NC VSSQ#D2 NC VSSQ#B2
A1 B2 T1 B10 Ohms +-1% 243/F_4 T11 D9 T1 B10
NC VSSQ#B2 R231 NC VSSQ#B10 NC VSSQ#D9 R479 NC VSSQ#B10
T1
NC VSSQ#B10
B10 Should be 240 A11
NC VSSQ#D2
D2 Hynix D(Vega) AKD5LZWTW02 AKD5LZWTW08 VSSQ#E3
E3 Should be 240 A11
NC VSSQ#D2
D2
Should be 240 R470 A11 D2 243/F_4 T11 D9 J2 E9 243/F_4 T11 D9
NC VSSQ#D2 Ohms +-1% NC VSSQ#D9 NC/ODT1 VSSQ#E9 Ohms +-1% NC VSSQ#D9
Ohms +-1% 243/F_4 T11 D9 E3 L2 F10 E3
NC VSSQ#D9 VSSQ#E3 NC/CS1 VSSQ#F10 VSSQ#E3
J2
VSSQ#E3
E3
E9
J2
L2
NC/ODT1 VSSQ#E9
E9
F10
Micron G die AKD5EGSTL00 AKD5LZSTL10 J10
L10
NC/CE1 VSSQ#G2
G2
G10
J2
L2
NC/ODT1 VSSQ#E9
E9
F10
NC/ODT1 VSSQ#E9 NC/CS1 VSSQ#F10 NC/ZQ1 VSSQ#G10 NC/CS1 VSSQ#F10
L2 F10 J10 G2 J10 G2
NC/CS1 VSSQ#F10 NC/CE1 VSSQ#G2 100-BALL NC/CE1 VSSQ#G2
J10
L10
NC/CE1 VSSQ#G2
G2
G10
L10
NC/ZQ1 VSSQ#G10
G10 SAMSUNG G die AKD5EGGT500 AKD5EGGT502 SDRAM DDR3
L10
NC/ZQ1 VSSQ#G10
G10
NC/ZQ1 VSSQ#G10 100-BALL H5TQ2G63BFR-11C 100-BALL
100-BALL SDRAM DDR3 SDRAM DDR3
SDRAM DDR3 H5TQ2G63BFR-11C
Hynix B(Vega) AKD5MGWTW00 AKD5MGWTW07 H5TQ2G63BFR-11C
H5TQ2G63BFR-11C +1.5V_VGA +1.5V_VGA
+1.5V_VGA +1.5V_VGA
+1.5V_VGA +1.5V_VGA SAMSUNG C die AKD5MGWT500 AKD5MGWT508 +1.5V_VGA +1.5V_VGA
B R481 R237 B
R236 R230 4.99K/F_4 4.99K/F_4
R472 R468 4.99K/F_4 4.99K/F_4 R477 R467
4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
VREFC_VMA3 VREFD_VMA3
VREFC_VMA2 VREFD_VMA2
VREFC_VMA1 VREFD_VMA1 VREFC_VMA4 VREFD_VMA4
R480 R238
R235 R233 4.99K/F_4 C761 4.99K/F_4 C444
R474 R469 4.99K/F_4 C435 4.99K/F_4 C430 0.1U/10V_4 0.1U/10V_4 R476 R473
4.99K/F_4 C755 4.99K/F_4 C749 0.1U/10V_4 0.1U/10V_4 4.99K/F_4 C756 4.99K/F_4 C752
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA
C763 C753 C762 C754 C768 C748 C742 C759 C743 C461 C440 C427 C442 C441 C443 C426 C438 C437 C472 C433 C423 C421 C469 C468 C446 C452 C448 C781 C772 C745 C424 C767 C777 C780 C774 C744
10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
C775 C770 C758 C757 C760 C773 C766 C764 C450 C464 C459 C460 C439 C454 C463 C466 C470 C467 C453 C436 C429 C445 C425 C456 C769 C778 C431 C750 C434 C462 C747 C779
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
A A
PROJECT : R33
+1.5V_VGA Custom 3A
<18,20,22,43> +1.5V_VGA NB5 VRAM-A (DDR3 BGA96)
5 4 3 2 1
5 4 3 2 1
VMB_MA[13..0]
22
<20> VMB_MA[13..0] <20> VMB_DQ[63..0]
<20> VMB_DM[7..0] <20> VMB_WDQS[7..0]
<20> VMB_RDQS[7..0] CHANNEL B: 256MB/512MB DDR3 U10 U21
U13
VREFC_VMB3 M9 E4 VMB_DQ63 VREFC_VMB4 M9 E4 VMB_DQ50
VREFC_VMB1 VMB_DQ4 U24 VREFD_VMB3 VREFCA DQL0 VMB_DQ57 VREFD_VMB4 VREFCA DQL0 VMB_DQ53
M9 E4 H2 F8 H2 F8
VREFD_VMB1 VREFCA DQL0 VMB_DQ0 VREFDQ DQL1 VMB_DQ61 VREFDQ DQL1 VMB_DQ49
H2 F8 F3 F3
VREFDQ DQL1 VMB_DQ6 VREFC_VMB2 VMB_DQ11 VMB_MA0 DQL2 VMB_DQ58 VMB_MA0 DQL2 VMB_DQ52
F3 M9 E4 N4 F9 N4 F9
DQL2 VMB_DQ1 VREFD_VMB2 VREFCA DQL0 VMB_DQ14 VMB_MA1 A0 DQL3 VMB_DQ62 VMB_MA1 A0 DQL3 VMB_DQ51
<20> VMB_MA0 N4 F9 H2 F8 P8 H4 P8 H4
A0 DQL3 VMB_DQ5 VREFDQ DQL1 VMB_DQ9 VMB_MA2 A1 DQL4 VMB_DQ56 VMB_MA2 A1 DQL4 VMB_DQ55
<20> VMB_MA1 P8 H4 F3 P4 H9 P4 H9
A1 DQL4 VMB_DQ3 VMB_MA0 DQL2 VMB_DQ12 VMB_MA3 A2 DQL5 VMB_DQ60 VMB_MA3 A2 DQL5 VMB_DQ48
<20> VMB_MA2 P4 H9 N4 F9 N3 G3 N3 G3
A2 DQL5 VMB_DQ7 VMB_MA1 A0 DQL3 VMB_DQ10 VMB_MA4 A3 DQL6 VMB_DQ59 VMB_MA4 A3 DQL6 VMB_DQ54
<20> VMB_MA3 N3 G3 P8 H4 P9 H8 P9 H8
A3 DQL6 VMB_DQ2 VMB_MA2 A1 DQL4 VMB_DQ15 VMB_MA5 A4 DQL7 VMB_MA5 A4 DQL7
<20> VMB_MA4 P9 H8 P4 H9 P3 P3
D A4 DQL7 VMB_MA3 A2 DQL5 VMB_DQ8 VMB_MA6 A5 VMB_MA6 A5 D
<20> VMB_MA5 P3 N3 G3 R9 R9
A5 VMB_MA4 A3 DQL6 VMB_DQ13 VMB_MA7 A6 VMB_DQ40 VMB_MA7 A6 VMB_DQ36
<20> VMB_MA6 R9 P9 H8 R3 D8 R3 D8
A6 VMB_DQ21 VMB_MA5 A4 DQL7 VMB_MA8 A7 DQU0 VMB_DQ46 VMB_MA8 A7 DQU0 VMB_DQ33
<20> VMB_MA7 R3 D8 P3 T9 C4 T9 C4
A7 DQU0 VMB_DQ23 VMB_MA6 A5 VMB_MA9 A8 DQU1 VMB_DQ41 VMB_MA9 A8 DQU1 VMB_DQ38
<20> VMB_MA8 T9 C4 R9 R4 C9 R4 C9
A8 DQU1 VMB_DQ17 VMB_MA7 A6 VMB_DQ31 VMB_MA10 A9 DQU2 VMB_DQ47 VMB_MA10 A9 DQU2 VMB_DQ32
<20> VMB_MA9 R4 C9 R3 D8 L8 C3 L8 C3
A9 DQU2 VMB_DQ22 VMB_MA8 A7 DQU0 VMB_DQ26 VMB_MA11 A10/AP DQU3 VMB_DQ44 VMB_MA11 A10/AP DQU3 VMB_DQ39
<20> VMB_MA10 L8 C3 T9 C4 R8 A8 R8 A8
A10/AP DQU3 VMB_DQ16 VMB_MA9 A8 DQU1 VMB_DQ30 VMB_MA12 A11 DQU4 VMB_DQ45 VMB_MA12 A11 DQU4 VMB_DQ35
<20> VMB_MA11 R8 A8 R4 C9 N8 A3 N8 A3
A11 DQU4 VMB_DQ19 VMB_MA10 A9 DQU2 VMB_DQ27 VMB_MA13 A12/BC DQU5 VMB_DQ43 VMB_MA13 A12/BC DQU5 VMB_DQ37
<20> VMB_MA12 N8 A3 L8 C3 T4 B9 T4 B9
A12/BC DQU5 VMB_DQ18 VMB_MA11 A10/AP DQU3 VMB_DQ28 A13 DQU6 VMB_DQ42 A13 DQU6 VMB_DQ34
<20> VMB_MA13 T4 B9 R8 A8 T8 A4 T8 A4
A13 DQU6 VMB_DQ20 VMB_MA12 A11 DQU4 VMB_DQ24 A14 DQU7 A14 DQU7
T8 A4 N8 A3 M8 M8
A14 DQU7 VMB_MA13 A12/BC DQU5 VMB_DQ29 A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA
M8 T4 B9
A15/BA3 +1.5V_VGA A13 DQU6 VMB_DQ25
T8 A4
A14 DQU7 VMB_BA0 VMB_BA0
M8 M3 B3 M3 B3
A15/BA3 +1.5V_VGA VMB_BA1 BA0 VDD#B3 VMB_BA1 BA0 VDD#B3
<20> VMB_BA0 M3 B3 N9 D10 N9 D10
BA0 VDD#B3 VMB_BA2 BA1 VDD#D10 VMB_BA2 BA1 VDD#D10
<20> VMB_BA1 N9 D10 M4 G8 M4 G8
BA1 VDD#D10 VMB_BA0 BA2 VDD#G8 BA2 VDD#G8
<20> VMB_BA2 M4 G8 M3 B3 K3 K3
BA2 VDD#G8 VMB_BA1 BA0 VDD#B3 VDD#K3 VDD#K3
K3 N9 D10 K9 K9
VDD#K3 VMB_BA2 BA1 VDD#D10 VDD#K9 VDD#K9
K9 M4 G8 N2 N2
VDD#K9 BA2 VDD#G8 VDD#N2 VMB_CLK1 VDD#N2
N2 K3 <20> VMB_CLK1 J8 N10 J8 N10
VDD#N2 VDD#K3 CK VDD#N10 VMB_CLK1# CK VDD#N10
<20> VMB_CLK0 J8 N10 K9 <20> VMB_CLK1# K8 R2 K8 R2
CK VDD#N10 VDD#K9 CK VDD#R2 VMB_CKE1 CK VDD#R2
<20> VMB_CLK0# K8 R2 N2 <20> VMB_CKE1 K10 R10 K10 R10
CK VDD#R2 VMB_CLK0 VDD#N2 VMB_CLK0 CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA
<20> VMB_CKE0 K10 R10 J8 N10
CKE/CKE0 VDD#R10 +1.5V_VGA VMB_CLK0# CK VDD#N10
K8 R2
VMB_CKE0 CK VDD#R2 VMB_ODT1 VMB_ODT1
K10 R10 <20> VMB_ODT1 K2 A2 K2 A2
VMB_ODT0 CKE/CKE0 VDD#R10 +1.5V_VGA R197 ODT/ODT0 VDDQ#A2 VMB_CS1# ODT/ODT0 VDDQ#A2
<20> VMB_ODT0 K2 A2 <20> VMB_CS1# L3 A9 L3 A9
ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 VMB_RAS1# CS /CS0 VDDQ#A9
<20> VMB_CS0# L3 A9 56.2/F_4 <20> VMB_RAS1# J4 C2 J4 C2
CS /CS0 VDDQ#A9 VMB_ODT0 RAS VDDQ#C2 VMB_CAS1# RAS VDDQ#C2
<20> VMB_RAS0# J4 C2 K2 A2 C380 <20> VMB_CAS1# K4 C10 K4 C10
RAS VDDQ#C2 VMB_CS0# ODT/ODT0 VDDQ#A2 CAS VDDQ#C10 VMB_WE1# CAS VDDQ#C10
<20> VMB_CAS0# K4 C10 L3 A9 <20> VMB_WE1# L4 D3 L4 D3
CAS VDDQ#C10 VMB_RAS0# CS /CS0 VDDQ#A9 VMB_CLK0_COMM WE VDDQ#D3 WE VDDQ#D3
<20> VMB_WE0# L4 D3 J4 C2 E10 E10
WE VDDQ#D3 VMB_CAS0# RAS VDDQ#C2 VDDQ#E10 VDDQ#E10
E10 K4 C10 F2 F2
VDDQ#E10 VMB_WE0# CAS VDDQ#C10 VMB_RDQS7 VDDQ#F2 VMB_RDQS6 VDDQ#F2
F2 L4 D3 0.01U/16V_4 F4 H3 F4 H3
VMB_RDQS0 VDDQ#F2 WE VDDQ#D3 R196 VMB_RDQS5 DQSL VDDQ#H3 VMB_RDQS4 DQSL VDDQ#H3
F4 H3 E10 C8 H10 C8 H10
C VMB_RDQS2 DQSL VDDQ#H3 VDDQ#E10 DQSU VDDQ#H10 DQSU VDDQ#H10 C
C8 H10 F2 56.2/F_4
DQSU VDDQ#H10 VMB_RDQS1 VDDQ#F2
F4 H3
VMB_RDQS3 DQSL VDDQ#H3 VMB_DM7 VMB_DM6
C8 H10 E8 A10 E8 A10
VMB_DM0 DQSU VDDQ#H10 VMB_CLK0# VMB_DM5 DML VSS#A10 VMB_DM4 DML VSS#A10
E8 A10 D4 B4 D4 B4
VMB_DM2 DML VSS#A10 VMB_CLK1 DMU VSS#B4 DMU VSS#B4
D4 B4 E2 E2
DMU VSS#B4 VMB_DM1 VSS#E2 VSS#E2
E2 E8 A10 G9 G9
VSS#E2 VMB_DM3 DML VSS#A10 VMB_WDQS7 VSS#G9 VMB_WDQS6 VSS#G9
G9 D4 B4 G4 J3 G4 J3
VMB_WDQS0 VSS#G9 DMU VSS#B4 R400 VMB_WDQS5 DQSL VSS#J3 VMB_WDQS4 DQSL VSS#J3
G4 J3 E2 B8 J9 B8 J9
VMB_WDQS2 DQSL VSS#J3 VSS#E2 DQSU VSS#J9 DQSU VSS#J9
B8 J9 G9 56.2/F_4 M2 M2
DQSU VSS#J9 VMB_WDQS1 VSS#G9 VSS#M2 VSS#M2
M2 G4 J3 C594 M10 M10
VSS#M2 VMB_WDQS3 DQSL VSS#J3 VSS#M10 VSS#M10
M10 B8 J9 P2 P2
VSS#M10 DQSU VSS#J9 VMB_CLK1_COMM VSS#P2 VSS#P2
P2 M2 <20,21> DRAM_RST_M T3 P10 <20,21> DRAM_RST_M T3 P10
VSS#P2 VSS#M2 RESET VSS#P10 RESET VSS#P10
<20,21> DRAM_RST_M T3 P10 M10 T2 T2
RESET VSS#P10 VSS#M10 VMB_ZQ3 VSS#T2 VMB_ZQ4 VSS#T2
T2 P2 0.01U/16V_4 L9 T10 L9 T10
VMB_ZQ1 VSS#T2 VSS#P2 R401 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10
L9 T10 <20,21> DRAM_RST_M T3 P10
ZQ/ZQ0 VSS#T10 RESET VSS#P10
VSS#T2
T2 56.2/F_4 Should be 240 Should be 240
Should be 240 VMB_ZQ2 L9 T10 A1 B2 A1 B2
ZQ/ZQ0 VSS#T10 Ohms +-1% NC VSSQ#B2 Ohms +-1% NC VSSQ#B2
Ohms +-1% A1 B2 T1 B10 T1 B10
NC VSSQ#B2 VMB_CLK1# R138 NC VSSQ#B10 R402 NC VSSQ#B10
T1
NC VSSQ#B10
B10 Should be 240 A11
NC VSSQ#D2
D2 A11
NC VSSQ#D2
D2
R195 A11 D2 A1 B2 243/F_4 T11 D9 243/F_4 T11 D9
NC VSSQ#D2 Ohms +-1% NC VSSQ#B2 NC VSSQ#D9 NC VSSQ#D9
243/F_4 T11 D9 T1 B10 E3 E3
NC VSSQ#D9 R427 NC VSSQ#B10 VSSQ#E3 VSSQ#E3
E3 A11 D2 J2 E9 J2 E9
VSSQ#E3 NC VSSQ#D2 NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9
J2 E9 243/F_4 T11 D9 L2 F10 L2 F10
NC/ODT1 VSSQ#E9 NC VSSQ#D9 NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10
L2 F10 E3 J10 G2 J10 G2
NC/CS1 VSSQ#F10 VSSQ#E3 NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2
J10 G2 J2 E9 L10 G10 L10 G10
NC/CE1 VSSQ#G2 NC/ODT1 VSSQ#E9 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10
L10 G10 L2 F10
NC/ZQ1 VSSQ#G10 NC/CS1 VSSQ#F10 100-BALL 100-BALL
J10 G2
100-BALL NC/CE1 VSSQ#G2 SDRAM DDR3 SDRAM DDR3
L10 G10
SDRAM DDR3 NC/ZQ1 VSSQ#G10 H5TQ2G63BFR-11C H5TQ2G63BFR-11C
H5TQ2G63BFR-11C 100-BALL
SDRAM DDR3
H5TQ2G63BFR-11C +1.5V_VGA +1.5V_VGA
B +1.5V_VGA +1.5V_VGA B
R136 R84
R429 R458 4.99K/F_4 4.99K/F_4
R193 R153 4.99K/F_4 4.99K/F_4 R404 R423
4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
VREFC_VMB3 VREFD_VMB3
VREFC_VMB2 VREFD_VMB2
VREFC_VMB1 VREFD_VMB1 VREFC_VMB4 VREFD_VMB4
R137 R83
R428 R459 4.99K/F_4 C242 4.99K/F_4 C122
R194 R152 4.99K/F_4 C672 4.99K/F_4 C720 0.1U/10V_4 0.1U/10V_4 R403 R424
4.99K/F_4 C372 4.99K/F_4 C284 0.1U/10V_4 0.1U/10V_4 4.99K/F_4 C595 4.99K/F_4 C658
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
C381 C289 C288 C286 C375 C285 C282 C279 C369 C719 C673 C722 C733 C729 C728 C727 C725 C723 C120 C115 C245 C240 C121 C118 C244 C357 C239 C648 C649 C660 C662 C663 C593 C633 C641 C588
10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
A A
C374 C280 C287 C373 C376 C281 C370 C371 C674 C661 C675 C726 C724 C730 C686 C721 C166 C128 C243 C238 C241 C123 C125 C124 C655 C654 C629 C620 C597 C591 C592 C624
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
PROJECT : R33
+1.5V_VGA Custom 1A
<18,20,21,43> +1.5V_VGA NB5 VRAM-B (DDR3 BGA96)
5 4 3 2 1
+1.5V_VGA
<18,20,21,43> +1.5V_VGA
1 2 3 4 5 6 7 8
LID Switch
<6> TXLCLKOUT+ TXLCLKOUT+
TXLCLKOUT-
+3V
R6
R7
2.2K_4
2.2K_4
EDIDCLK
EDIDDATA
23
<6> TXLCLKOUT-
<6> TXLOUT0+ TXLOUT0+ RF C9 C10
<6> TXLOUT0- TXLOUT0- *10P/50V_4 *10P/50V_4
<6> TXLOUT1+ TXLOUT1+
<6> TXLOUT1- TXLOUT1-
<6> TXLOUT2+ TXLOUT2+
A A
<6> TXLOUT2- TXLOUT2-
C14 22P/50V_4
G_0
<30> EMU_LID R22 *0_4/S PN_BLON BLON_CON <6> TXUCLKOUT- TXUCLKOUT- +3VLCD_CON
D5 RB500V-40 R11 100K/F_4 TXUCLKOUT+ 1
<6> TXUCLKOUT+ 2
<6> TXUOUT0+ TXUOUT0+ +3V
TXUOUT0- EDIDCLK 3
<6> TXUOUT0- 4
<6> TXUOUT1+ TXUOUT1+ EDIDDATA
R23 47K_4 TXUOUT1- C8 TXLOUT0- 5
C13*0.047U/10V_4
C7*0.047U/10V_4
+3VS5 <6> TXUOUT1- 6
<6> TXUOUT2+ TXUOUT2+ 1000P/50V_4 TXLOUT0+
R18 *47K_4 TXUOUT2- 7
+3VPCU <6> TXUOUT2- 8
2
TXLOUT1-
LVDS_BLON R17 1K/F_4 EDIDCLK TXLOUT1+ 9
LID_EC# <30,31> <6> EDIDCLK 10 G_1
D6 *RB500V-40 <6> EDIDDATA EDIDDATA
1
Q5 TXLOUT2- 11
12
3
*PDTC144EU Close to EC <6> LVDS_BLON LVDS_BLON TXLOUT2+

DISP_ON 13
<6> DISP_ON 14
<8> LCD_BK 2 <6> DPST_PWM DPST_PWM TXLCLKOUT-
TXLCLKOUT+ 15
EMI request 16
C31
TXUOUT0- 17
100P/50V_4
1
TXUOUT0+ 18 G_2
19
TXUOUT1- 20
TXUOUT1+ 21
22
TXUOUT2- 23
TXUOUT2+ 24 G_3
LVDS_BLON R21 100K/F_4 25
TXUCLKOUT- 26
TXUCLKOUT+ 27
B
100mA +3V R14 *0_4/S +3V_CAM 28
B
R5 0_4 29
<27> DIGITAL_D1 30
<27> DIGITAL_CLK L10 DIGITAL_CLK_L
+VIN_BLIGHT SBK160808T-601Y-N/0.2A_6 +3V_CAM 31 G_4
USBP4-_R 32
<8> USBP4- 1 2 33
C12 C21 C20 C30 USBP4+_R
*0.01U/16V_4 *4.7U/6.3V_6 EMI *10P/50V_4
<8>
*10P/50V_4
USBP4+ L6
4 3 34
35
+VIN L5 FBM2125 HM330-T +VIN_BLIGHT WCM2012-90 VADJ1
BLON_CON 36
+VIN_BLIGHT 37
38
C6 0.1U/25V_4 Please note that 2011 camera is +3V a We do not need to use 5V -> 3.95V regulator! 39
40
G_5
C11 0.01U/25V_4
+VIN follow L6 location CN5

GS12401-1011-9H
USBP4- R8 *0_4 USBP4-_R DFHS40FS050
GS12407-11141-9H-40P-R
C22 C32 C83 C39 C458 USBP4+ R9 *0_4 USBP4+_R
4.7U/25V_8 0.1U/25V_4 *0.1U/25V_4 *0.1U/25V_4 *0.1U/25V_4 DPST_PWM R12 *0_4/S VADJ1
R10 *1K/F_4
<30> PWM_VADJ
C5 33P/50V_4
+VIN
C28 C19
C C
4.7U/25V_8 0.1U/25V_4
+3V +3VLCD
+3VLCD_CON
C42 U6
L11
1U/6.3V_4 5 1 TI201209U600_8
IN OUT
1
4 IN GND 2
C45 C41 C38
<6> DISP_ON R31 0_4 DISP_ON_L 3 0.01U/16V_4 0.1U/10V_4 10U/6.3V_8
2
ON/OFF
IC(5P) G5243AT11U
R30
100K/F_4
D D
<2,6,7,8,9,10,12,13,14,18,24,25,26,27,28,29,30,31,32,33,39,40,42,43> +3V
PROJECT : R33
<7,30,31,34,35> +3VPCU Quanta Computer Inc.
<7,10,18,24,25,27,31,32,33,39> +5V
<32,34,39,43> +12VALW Size Document Number Rev

Custom 1A
<34,35,36,37,38,39,41,42,43> +VIN NB5 LCD CONN/LID/CAM
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
24
CRT PORT
16
A
6 A
CRT_R_1 L9 BK1608LL680 CRT_R1 1 11
7
CRT_G_1 L8 BK1608LL680 CRT_G1 2 12 CRTDDCDAT2 C17 *470P/50V_4
8
CRT_B_1 L7 BK1608LL680 CRT_B1 3 13 CRTHSYNC C18 10P/50V_4
+5V_HDMIC 9
4 14 CRTVSYNC C15 10P/50V_4
R16 R13 R15 C23 10
C24 C29 C26 C25 C27 5 15 CRTDDCCLK2 C16 *470P/50V_4
5.6P/16V_4
150/F_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4
CRT_R_1 150/F_4
<6> CRT_R
17
CRT_G_1 150/F_4
<6> CRT_G CRT CONN
CRT_B_1
<6> CRT_B CN14
HSYNC_COM_1 EMI
<6> HSYNC_COM
VSYNC_COM_1
<6> VSYNC_COM
DDCCLK_1
<6> DDCCLK DFDS15FR295
DDCDATA_1
<6> DDCDATA
DSUB-070546HR015M52TZR-15P
+5V
U5
+5V_CRT2 1 16 CRT_VSYNC1 R19 22_4 CRTVSYNC
VCC_SYNC SYNC_OUT2 CRT_HSYNC1 R20 22_4 CRTHSYNC
SYNC_OUT1 14
B 7 VCC_DDC
B
C35 0.22U/25V_6 CRT_BYP 8 BYP VSYNC_COM_1 +5V_CRT2
SYNC_IN2 15
2 13 HSYNC_COM_1
+3V VCC_VIDEO SYNC_IN1
R27 R24
CRT_R1 3 10 DDCCLK_1 2.2K_4 2.2K_4
CRT_G1 VIDEO_1 DDC_IN1 DDCDATA_1
4 VIDEO_2 DDC_IN2 11
CRT_B1 5 VIDEO_3 VGA_DDC_CLK_RT CRTDDCCLK2
DDC_OUT1 9
6 12 VGA_DDC_DAT_RT CRTDDCDAT2
GND DDC_OUT2
IP4772
+3V
DDCCLK_1 R26 2.7K_4

DDCDATA_1 R25 2.7K_4
+5V_HDMIC 2 1 +5V_CRT2
+5V_HDMIC
RB501V-40 D7
C C
PCH BKT
VGA BKT
HOLE H21
H-TC315BC177D122P2
H20
H-TC315BC177D122P2
H12
*H-TC248BC197D150P2
H13
*H-TC248BC197D150P2
H9
*H-TC248BC197D150P2
H7 H14 H6 H5
*h-tc354bsd110x130p2*H-C354I150D110P2 *h-tc354bsd110x130p2*h-tc354bsd110x130p2
H15 H18 H10
*H-C354I150D110P2 *H-C354I150D110P2 *h-tsbsd228x110p2
1
1
1
1
1
Nut PN:MBUL1001010
CPU BKT
H11
D *intel-cpu-bkt2 D
H8 H16 H17 H22
*H-C236I150D110P2 *H-C276I150D110P2 *H-C197D110P2 *SPAD-CXX-1 H19 4
*h-c276d110p2 3
1
PROJECT : R33
1

1

Custom 1A
NB5 CRT,Hole
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
EMI request
+3V
25
C586
0.1U/10V_4
A A
Add for EMI
EMI request
+5V_HDMIC +5V_HDMIC
C104 C101
0.1U/10V_4 220P/50V_4
B EMI request B
C_TX2_HDMI+ R126 150/F_4 C_TX2_HDMI-
C_TXC_HDMI+ R98 150/F_4 C_TXC_HDMI-

DISCRETE HDMI I2C SELECT
close to HDMI conn Close to HDMI Connector
<6> IN_CLK# IN_CLK# C141 0.1U/10V_4 C_TXC_HDMI-
IN_CLK C148 0.1U/10V_4 C_TXC_HDMI+ +3V C_TX2_HDMI+ CN19
<6> IN_CLK
<6> IN_D0# IN_D0# C180 0.1U/10V_4 C_TX0_HDMI- C_TX2_HDMI- 20
IN_D0 C189 0.1U/10V_4 C_TX0_HDMI+ C_TX2_HDMI+ SHELL1
<6> IN_D0 1 21
IN_D1# C157 0.1U/10V_4 C_TX1_HDMI- R418 C_TX2_HDMI- D2+ SHELL2
<6> IN_D1# 3 D2- SHELL2 22
<6> IN_D1 IN_D1 C169 0.1U/10V_4 C_TX1_HDMI+ 2.2K_4 C_TX1_HDMI+ C_TX1_HDMI+ 4 23
IN_D2# C200 0.1U/10V_4 C_TX2_HDMI- C_TX1_HDMI- C_TX1_HDMI- D1+ SHELL2
<6> IN_D2# 6
D1-
2
<6> IN_D2 IN_D2 C210 0.1U/10V_4 C_TX2_HDMI+ 7
D0+
9 D0-
HDMI_SCL_R 1 3HDMI_SCLK C_TX0_HDMI+ C_TX0_HDMI+ 2
C_TX0_HDMI- C_TX0_HDMI- D2 Shield
D1 Shield 5
D0 Shield 8
SDVO_CLK HDMI_SCL_R +3V C_TXC_HDMI+ C_TXC_HDMI+ 10 11
<6> SDVO_CLK Q36 CK+ CK Shield
<6> SDVO_DATA SDVO_DATA HDMI_SDA_R C_TXC_HDMI- C_TXC_HDMI- 12 17
2N7002 CK- GND
C C
<6> HDMI_HPD_CON HDMI_HPD_CON HDMI_HPD_3V R408
2.2K_4 HDMI_SCLK 15 13
HDMI_SDATA DDC CLK CE Remote
16 14
DDC DATA NC
1A
2
+5V_HDMIC
FUSE1.1A8V_POLY
HDMI_SDA_R 1 3 HDMI_SDATA +5V 2 1 18
F5 +5V
Q35 HDMI_HPD HDMI_HPD_L 19

2N7002 HP DET
*0_6/S
L47 HDMI CONN
+3V C598 VC5
220P/50V_4 *AVLC5S_4
reserve for Intel DG reserved for EMI DFHD19MR191
hdmi-2he1608-000111f-19p-ldv
R38
*1M_4
HDMI_SDATA
HDMI_SCLK
2
HDMI_HPD_3V 1 3 HDMI_HPD +5V_HDMIC +5V_HDMIC

C131
C135
Q9
2
*2N7002
+5V D10 D9
+3V
*10P/50V_4
*10P/50V_4
RB501V-40 RB501V-40
R127 680_4/F C_TX2_HDMI+
1
R132 R123 680_4/F C_TX2_HDMI-
3
D D
*0_4/S R109 680_4/F C_TX1_HDMI+ R90 R87
Q13 2.2K_4 2.2K_4
2N7002K R105 680_4/F C_TX1_HDMI-
2 Q6
R32
3
R119 680_4/F C_TX0_HDMI+ MMBT3904-7-F

2 HDMI_DET_R HDMI_HPD HDMI_SCLK HDMI_SDATA
R115 680_4/F C_TX0_HDMI-
1
200K/F_4
1
R139
2
R102 680_4/F C_TXC_HDMI+ HDMI_HPD_3V
R399 PROJECT : R33
100K_4
R94 680_4/F C_TXC_HDMI-
R34
*200K/F_4 Quanta Computer Inc.
C255 10K/F_4
0.1U/10V_4 Custom 1A
NB5 HDMI CONN
1 2 3 4 5 6 7 8
5 4 3 2 1
PLTRST#
26
<2,8,14,29,30,33> PLTRST#
CLK_PCIE_REQ2# R365 *0_4/S CLK_PCIE_REQ2#_R

<8> CLK_PCIE_REQ2#
CLK_PCIE_REQ2#_R
D D
SD_CD#
SD_WP
PLTRST#
24
23
22
21
20
19
U20
CLKREQ#
PERST#
MS_INS#
SD_CD#
SP7
GPIO
Close to chip pin
1 18 SD_D2_R R366 0_4 SD_D2
<8> PCIE_TXP3_CARD HSIP SP6
2 17 SD_D3_R R364 0_4 SD_D3
<8> PCIE_TXN3_CARD HSIN SP5
3 16 SD_CMD_RR362 0_4 SD_CMD
<8> CLK_PCIE_CARDP
4
REFCLKP RTS5229 SP4
15 DV33_18
<8> CLK_PCIE_CARDN REFCLKN DV33_18
C550 0.1U/10V_4 PCIE_RXP3_CARD_C 5 14 SD_CLK_R R361 22_4 SD_CLK C548 10P/50V_4
<8> PCIE_RXP3_CARD HSOP SP3
C547 0.1U/10V_4 PCIE_RXN3_CARD_C 6 13 SD_D0_R R359 0_4 SD_D0
<8> PCIE_RXN3_CARD HSON SP2
CARD_3V3
DV12_S
3V3_IN
RREF
DV33_18
AV12
SP1
25 GND
7
8
9
10
11
12
C C
C551
AV12
R358 1U/10V_4
DV12_S
SD_D1_R SD_D1
RREF
0_4
Close to chip pin

C539 C542 +3V
R357
+3V Reserve for EMI
4.7U/6.3V_6 0.1U/10V_4 C544 C540
6.2K/F_4 0.1U/10V_4 4.7U/6.3V_6 SD_D0 C545 *5.6P/16V_4

C538 C543 SD_D1 C541 *5.6P/16V_4
SD_D2 C557 *5.6P/16V_4
10U/6.3V_8 0.1U/10V_4 SD_D3 C552 *5.6P/16V_4
+3VCARD
SD / MMC
B B
CARD READER
CN12
SD_D2 1
SD_D3 DAT2
2
SD_CMD DAT3 +3VCARD
3
SD_CD# 4
CMD
C/D
CLOSE CONN
5
VSS1
+3VCARD 6
VDD
C843
C844
SD_CLK 7
CLK
8 VSS2
SD_D0 9
SD_D1 DAT0 C847
10
SD_WP DAT1
0.1U/10V_4
11 *0.1U/10V_4
W/P 10U/6.3V_8
12 GND
13
GND
14 GND
15 GND
CARDREADER CONN
A A
PROJECT : R33
Custom 1A
NB5 RTS5229 & CR SOCKET
Date: Thursday, August 25, 2011 Sheet 26 of 43
5 4 3 2 1
A B C D E
<2,6,7,8,9,10,12,13,14,18,23,24,25,26,28,29,30,31,32,33,39,40,42,43>
<7,10,18,24,25,31,32,33,39>
+3V
+5V
+5V_AVDD L58 +4.75VAVDD +4.75VAVDD
27 +5V
Close to CODEC >40mils trace U35
*0_6/S 5 1
Close to CODEC Vout Vin
4 BYP
C825 C820 C874 C870 C873
+3V_DVDD_CORE C832 C836 C831 1U/6.3V_4 0.1U/10V_4 2 3 0.1U/10V_4 0.047U/10V_4 1U/6.3V_4
10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 C810 GND EN
+3V
1U/6.3V_4 TPS793475DBVR
C857
C858 C867 10U/6.3VS_6 AGND AGND AGND
1U/6.3V_4 0.1U/10V_4 U34 AGND R614 10K_4 +5V
AGND Vset=1.242V
1 21 +5V
DVDD_LV AVDD
AVDD 32
Close to CODEC >40mils trace
7 DVDD
PVDD 33
PVDD 39
Digital
<7> BIT_CLK_AUDIO R620 *0_4/S HD_BCLK 5 11 SENSE_A C842 C850 C849
HDA_BITCLK SENSE_A SENSE_A <28>
1U/6.3V_4 0.1U/10V_4 10U/6.3VS_6 SENSE_A R607 2.49K/F_4 +5V_AVDD
R621 33_4 HD_SDIN0 6 12 SENSE_B
<7> ACZ_SDIN0 HDA_SDI SENSE_B
AGND
R619 *0_4/S HD_SDOUT 4 C851 1000P/50V_4
HDA Bus<7> ACZ_SDOUT_AUDIO
C861 *10P/50V_4 HDA_SDO
HP0_PORT_A_L 22
R617 *0_4/S HD_SYNC 8 23 AGND SENSE_B R604 100K/F_4
<7> ACZ_SYNC_AUDIO
C862 *10P/50V_4 HDA_SYNC HP0_PORT_A_R
VREFOUT_A_or_F 19 Close to CODEC +5V_AVDD
<7> ACZ_RST#_AUDIO 9 HDA_RST# AGND

AGND SHIELD C848 *1000P/50V_4
C866 10P/50V_4 25 HPOUT_L
HP1_PORT_B_L HPOUT_L <28>
AGND SHIELD TO Headphone jack
TO Digital MIC <23> DIGITAL_CLK R612 100_4 DMIC_CLK_R 2 26 HPOUT_R
DMIC_CLK/GPIO1 HP1_PORT_B_R HPOUT_R <28>
<23> DIGITAL_D1 R613 *0_4/S DMIC0 3 AGND SHIELD
DMIC0/GPIO2
C872 10P/50V_4 15 MIC_L
PORT_C_L MIC_L <28>
MIC_R
PORT_C_R 16
VREFOUT_C MIC_R <28> TO Audio Jack MIC
VREFOUT_C 20 VREFOUT_C <28>
R609 10K_4 34 L_SPK+
+3V PORT_D_L+ +5V_AVDD
35 L_SPK-
ADC_EAPD# PORT_D_L-
<30> VOLMUTE# 40 EAPD R_SPK+
TO Internal Speakers
PORT_D_R+ 38
D19 RB500V-40 37 R_SPK-
PORT_D_R-
C10625 close C10629, and C10625 R605
CAP- 13 10K_4
Close to CODEC 29 CAP-
PORT_F_L
PORT_F_R 14
close Chip
1
C830 C855 check value C852

4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4
30 10 AMP_BEEP AMP_BEEP_L R611 AMP_BEEP_R2
100K/F_4
Analog
2
CAP+ CAP+ PC_BEEP
3
1 24 18 1
AVSS CAP2 C864
27 AVSS
36 17 R610
AVSS VREFFILT C859 10K_4 2 ACZ_SPKR <7>
28 0.01U/25V_4
V- 2N7002 1000P/50V_4
41 31 Q45
DAP VREG 6/17
1
R10453 close R10454
+3V Check SB side and 92HD87
AGND AGND AGND
vendor reply it AGND
should reserve only
R618
4.7K_4
Check layout
mount location R360 *0_8/S
ACZ_RST#_AUDIO
C863
0.01U/16V_4
ADC_CAP2
ADC_VREG
ADC_V-
ADC_VREFFILT
EMI Request INT. SPEAKER AGND
INT SPEAKER CONN

L_SPK+ L16 SBK160808T-221Y-N/0.2A_6 L_SPK+_R
L_SPK- L15 SBK160808T-221Y-N/0.2A_6 L_SPK-_R 1
R_SPK- L14 SBK160808T-221Y-N/0.2A_6 R_SPK-_R 2
C840 R_SPK+ L13 SBK160808T-221Y-N/0.2A_6 R_SPK+_R 3
4
1
C826
C829 C845 C47 220P/50V_4 CN8
4.7U/6.3V_6 10U/6.3V_8 10U/6.3VS_6 1U/6.3V_4 DFHD04MR142
2
BIT_CLK_AUDIO ACZ_SDIN0 C52 220P/50V_4 3800-X04N-00X-4P-L
C57 220P/50V_4
AGND AGND AGND AGND
C66 220P/50V_4
C875 C876
33P/50V_4 33P/50V_4
Close to CODEC
FOR EMI
PROJECT : R33
Custom Azalia 92HD80 1A
NB5
A B C D E
1 2 3 4 5 6 7 8
USBP0-_C C407 *Clamp-Diode

EMI request
USB 3.0 USB3.0 X 2/USB2.0 COMBO
28
1 2 C739
R218 0_4 1A 1000P/50V_4 CN21
USB3.0 CONN
USB30_TX1-_C C401 *Clamp-Diode L36 +5V_USBP0 1
1 2 1 VBUS
4 3 USBP0-_C 2
<8> USBP0- 2 D-
USBP0+_C C412 *Clamp-Diode 1 2 USBP0+_C 3
1 2 <8> USBP0+ 3 D+
4 4 GND +5VS5
*WCM2012-90 USB30_RX1-_C 5 5 SSRX- U30 80 mils (Iout=2A) +5V_USBP0
R221 0_4 USB30_RX1+_C 6
USB30_TX1+_C C383 *Clamp-Diode 6 SSRX+ +5V_USBP0 C741 470P/50V_4
A 1 2 7 7 2 VIN1 OUT3 8 A
R227 0_4 USB30_TX1-_C GND C740 0.1U/10V_4
8 8 3 VIN2 OUT2 7
USB30_RX1-_C C422 *Clamp-Diode USB30_TX1+_C SSTX- C791 470P/50V_4
1 2 9 9 SSTX+ <30> USBPW_ON# 4 EN OUT1 6
*WCM2012-90 1 5 C787 0.1U/10V_4
13
12
11
10
C793 GND OC
<8> USB30_RX1- 1 2
1U/6.3V_4 G547N2P81U C782 100U/25V
+
<8> USB30_RX1+ 4 3
13
12
11
10
L38
USB30_RX1+_C C419 *Clamp-Diode R225 0_4
1 2
R208 0_4
*WCM2012-90
C395 0.1U/10V_4 USB30_TX1-_R 1 2
<8> USB30_TX1-
<8> USB30_TX1+
C387 0.1U/10V_4 USB30_TX1+_R 4
L35
3
USBP9- R29 *0_4 USBP9-_R

Right SIDE USBX1
R203 0_4
EMI request USBP9+ R28 *0_4 USBP9+_R
USBP1-_C C465 *Clamp-Diode

USB 3.0
1 2 C765
R244 0_4 1A 1000P/50V_4 CN22
+5VS5
USB3.0 CONN C43 0.1U/10V_4
USB30_TX2-_C C457 *Clamp-Diode L41 +5V_USBP0 1
1 2 1 VBUS
4 3 USBP1-_C 2
<8> USBP1- 2 D-
USBP1+_C C476 *Clamp-Diode 1 2 USBP1+_C 3
1 2 <8> USBP1+ 3 D+
4 4 1
*WCM2012-90 USB30_RX2-_C GND
5 5 SSRX- 2
R245 0_4 USB30_RX2+_C 6 USBPW_ON#
USB30_TX2+_C C447 *Clamp-Diode 6 SSRX+ USBP9-_R 3
B
1 2 7 7 <8> USBP9- 2 1 4
B
R249 0_4 USB30_TX2-_C GND USBP9+_R
8 8 <8> USBP9+ 3 4 5
USB30_RX2-_C C479 *Clamp-Diode USB30_TX2+_C SSTX-
1 2 9 9 SSTX+ 6
*WCM2012-90 L12 WCM2012-90
13
12
11
10
7
<8> USB30_RX2- 1 2 <7> SATA_LED# 8
<8> USB30_RX2+ 4 3 <30> PWRLED_RIGHT
13
12
11
10
SATA_LED# 9
L42 +3V 10
C37 1000P/50V_4
USB30_RX2+_C C478 *Clamp-Diode R247 0_4 PWRLED_RIGHT 11
1 2 <8> ACC_LED# 12
C36 1000P/50V_4
R243 0_4 CN6
USB CONN
*WCM2012-90
C455 0.1U/10V_4 USB30_TX2-_R 1 2
<8> USB30_TX2-
C451 0.1U/10V_4 USB30_TX2+_R 4 3 EMI request
<8> USB30_TX2+
L40 USBPW_ON# C40 220P/50V_4
R242 0_4
Line out
CN24
AGND SHIELD BLM18BD601SN1D 3
HPOUT_L R327 16/F_4 HPOUT_L1 L46 HPOUT_L2 1
<27> HPOUT_L
AGND SHIELD BLM18BD601SN1D 4
<27> HPOUT_R HPOUT_R R313 16/F_4 HPOUT_R1 L45 HPOUT_R2 2
C C
AGND SHIELD 5
6
R317 *20K/F_4
HP-JACK-BLACK
R333 *20K/F_4 Normal Open
VC11 VC9 C526 C518
C507 1000P/50V_4 *AVLC5S_4 *AVLC5S_4 0.1U/10V_4 0.1U/10V_4 SENSE_PHONE
VC10 *AVLC5S_4 AGND C522 1000P/50V_4

AGND
AGND
SENSE_PHONE R312 20K/F_4 SENSE_A

SENSE_A <27>
SENSE_MIC R283 10K/F_4 SENSE_A

VREFOUT_C
C486
R297
1U/6.3V_4
3.9K/F_4
AGND MIC
<27> VREFOUT_C
R300 3.9K/F_4 CN23
VC6 *AVLC5S_4 BLM18BD601SN1D 3
AGND MIC_L C799 2.2U/6.3V_6 MIC_L1 L44 MIC_IN_L 1
<27> MIC_L
BLM18BD601SN1D 4
<27> MIC_R MIC_R C794 2.2U/6.3V_6 MIC_R1 L43 MIC_IN_R 2
5
6
C485 220P/50V_4
VC7 VC8 HP-JACK-BLACK
AGND C491 220P/50V_4 *AVLC5S_4 *AVLC5S_4 AGND Normal Open
D COMPONENT CHOICES: D
The selection of ferrite beads can have a large effect on

THD+N, causing failures versus the WLP requirements. SENSE_MIC
At this time, IDT has verified three ferrite beads that will AGND
meet the WLP performance requirements: PROJECT : R33
Murata: BLM18BD601SN1
TDK: MMZ1608Y601BTA
Taiyo Yuden: LF BK 1608HM601-T Size Document Number Rev
Custom 1A
NB5 USB/BT/Audio JacK
Date: Monday, August 29, 2011 Sheet 28 of 43
1 2 3 4 5 6 7 8
5 4 3 2 1
For EMI 0 ~ 22 ohm

+3V_LAN
29
+3VLANVCC
R54 C76 C97 C85

LAN_XTAL1 10_4 XTAL1 C79
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 +1.05V_LAN
D D
Y5
1 2 XTAL2 R55 2.49K/F_4 LANRSET LAN_TX#
+3V_LAN
XTAL2
XTAL1
GND VIA x 9 Pcs LAN_GPIOS R56 1K/F_4
25MHz +3V_LAN
LAN_GLINK100#
C70 C71
33P/50V_4 33P/50V_4
49
48
47
46
45
44
43
42
41
40
39
38
37
U9
DVDD10(NC)
AVDD33
AVDD33
AVDD10
CKXTAL2
CKXTAL1
AVDD33
LED0
DVDD33
RSET
GPO/SMBALERT
LED1/EESK
GND
+3V if ISOLATEB pin
MDI0+ 1 36 pull-low,the LAN
MDI0- MDIP0 REGOUT
2 MDIN0 VDDREG 35 chip will not drive
3 AVDD10 VDDREG 34 it's PCI-E outputs
MDI1+ 4 33
U8 MDIP1 ENSW REG ( excluding
MDI1- 5 32 LAN_GLINK10# R57 10K/F_4
MDIN1 EEDI PCIE_WAKE# pin )
6 AVDD10(NC) LED3/EEDO 31 R62
LAN_MX0+ 1 16 MDI0+ 7 RTL8105E 30 LAN_ECS_SCL R58 10K/F_4 1K_4
TD+ TX+ MDIP2(NC) EECS
8 MDIN2(NC) DVDD10 29 +1.05V_LAN
LAN_MX0- 3 15 V_DAC2 9 28 PCIE_WAKE#
TD- CMT AVDD10(NC) LANW AKEB PCIE_WAKE# <6,33>
10 27 +3V_LAN ISOLATEB
75_4 R51 C64 LAN_MCT1 MDI0- MDIP3(NC) DVDD33 ISOLATEB
2 CT TX- 14 11 MDIN3(NC) ISOLATEB 26
0.01U/100V_0603 PLTRST#
SMBDATA(NC)
C 12 AVDD33(NC) PERSTB 25 PLTRST# <2,8,14,26,30,33> C
2
SMBCLK(NC)
LAN_MX1+ 6 9 MDI1-
RD+ RX-
REFCLK_N
REFCLK_P
R60
CLKREQB
DVDD10
EVDD10
LAN_MX1- 8 10 V_DAC1
RD- CT
HSON
HSOP
15K/F_4
HSIN
HSIP
GND
75_4 R53 C77 LAN_MCT0 7 11 MDI1+
1
0.01U/100V_0603 CT RX+
13
14
15
16
17
18
19
20
21
22
23
24
C46 C72
NS681684
10P/3KV_1808 0.01U/25V_4
+1.05V_LAN
EVDD10
LAN_CLKRQ
PCIE_RXN2_LAN_L C107 0.1U/10V_4
PCIE_RXN2_LAN <8>
PCIE_CLKREQ_LAN# R63 *0_4/S PCIE_RXP2_LAN_L C110 0.1U/10V_4
<8> PCIE_CLKREQ_LAN# PCIE_RXP2_LAN <8>
PCIE_TXP2_LAN
<8> PCIE_TXP2_LAN PCIE_TXN2_LAN
<8> PCIE_TXN2_LAN
CLK_PCIE_LANP
<8> CLK_PCIE_LANP CLK_PCIE_LANN
<8> CLK_PCIE_LANN
B
RJ45 B
+3V_LAN R444 330_4 C707 1000P/50V_4
CN20
LAN_YLED 11
+1.05V_LAN +1.05V_LAN LAN_YLED# LED_AMBER_P
12 LED_AMBER_N
8 RX1-
7 RX1+
C106 C78 C105 LAN_MX1- 6
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 RX0-
5 TX1-
C93 C92 C109 C108 4
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 LAN_MX1+ TX1+
3 RX0+
LAN_MX0- 2 14 R452 0_4
LAN_MX0+ TX0- GND1
1 TX0+
FOR EMI GND 13 R422 0_4
EVDD10 R425 330_4 LAN_GLED 9

+3V_LAN LED_W HITE_P
LAN_GLED# 10 LED_W HITE_N
C90 C98
1U/6.3V_4 0.1U/10V_4
C667 RJ45_CONN
LAN_GLINK100# LAN_GLED# 1000P/50V_4 C690
LAN_TX# LAN_YLED#
Link 1000P/50V_4
C234 C366
A A
*1000P/50V_4 *1000P/50V_4
PROJECT : R33
Custom RTL 8105E/RJ45 1A
NB5
5 4 3 2 1
1 2 3 4 5 6 7 8
+3VPCU
<7> SERIRQ
SERIRQ
LFRAME#
3
U14
SERIRQ VCC1
9
C694
C731
C714
C400
C378
C732
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
500mA +3VPCU_EC +3VPCU
adapter Type check
+3VPCU
30
<7,33> LFRAME# 4 22
LAD0 LFRAME VCC2 C299 0.1U/10V_4 L52
<7,33> LAD0 10 33 Change to 1SS355 as Current loss
1
LAD1 LAD0 VCC3 C717 0.1U/10V_4 BLM18BA470SN1D
<7,33> LAD1 8 96
LAD2 LAD1 VCC4 C698 0.1U/10V_4 D16 3920_RST#
<7,33> LAD2 7 111
LAD3 LAD2 VCC5 C266 *10U/6.3V_8
<7,33> LAD3 5 125 1SS355
LAD3 VCC6
<8> CLK_33M_KBC 12 67 +3VPCU_EC
A PCICLK AVCC R134 4.7K_4 A
<2,8,14,26,29,33> PLTRST# 13 +1.05V_VTT
2
CLKRUN# PCIRST/GPIO5 C687 0.1U/10V_4 C676 AD_TYPE R433 10K_4 R431 100/F_4
<6> CLKRUN# 38 AD_ID <34>
CLKRUN C236 220P/50V_4
2
SCI1# 20 4.7U/6.3V_6 Q14
GATEA20 SCI/GPIOE TEMP_MBAT
<9> EC_A20GATE 1 63 TEMP_MBAT <34>
RCIN# GA20/GPIO0 AD0/GPI38 AD_TYPE C680 R432
<9> EC_RCIN# 2 64 3 1 PM_THRMTRIP# <2,9>
3920_RST# KBRST/GPIO1 AD1/GPI39 AD_AIR 12.1K/F_4 C679
37 65 AD_AIR <34>
ECRST AD2/GPI3A SYS_I 0.1U/10V_4 100P/50V_4 *MMBT3904-7-F
66 SYS_I <34>
MX0 AD3/GPI3B
<31> MX0 55
MX1 KSI0/GPIO30
<31> MX1 56 68 LAN_POWER <39>
MX2 KSI1/GPIO31 DA0/GPO3C GPU_AC_BATT
<31> MX2 57 70 GPU_AC_BATT <15>
MX3 KSI2/GPIO32 DA1/GPO3D BATSHIP
<31> MX3 58 71 BATSHIP <34>
MX4 KSI3/GPIO33 DA2/GPO3E
<31> MX4 59 72
MX5 KSI4/GPIO34 DA3/GPO3F
60 Socket: DFHS08FS023
<31>
<31>
MX5
MX6
MX6
MX7
61
KSI5/GPIO35
KSI6/GPIO36 PWM1/GPIOE
21 PWM_VADJ
BLUELED
PWM_VADJ <23>
adapter select for EC 1M byte SPI EC ROM
<31> MX7 62
KSI7/GPIO37 PWM2/GPIO10
23 AMIC AKE3GZP0801
MY0 39 26 FAN_PWM FAN_PWM <32> +3VPCU GPIO42 EON AKE3GZN0Q01
<31> MY0 KSO0/GPIO20 FANPWM1/GPIO12
MY1 40 27 R436 10K/F_4 R440 *10K/F_4
<31> MY1 KSO1/GPIO21 FANPWM2/GPIO13 EMU_LID <23>
MY2 41 28 FAN1SIG Hi ==> DIS/SG
<31> MY2 KSO2/GPIO22 FANFB1/GPIO14 FAN1SIG <32>
MY3 42 29
<31> MY3 KSO3/GPIO23 FANFB2/GPIO15 ODD_PD <32>
MY4 43 Low ==>UMA
<31> MY4 KSO4/GPIO24 +3VPCU
MY5 44 77 MBCLK
<31> MY5 KSO5/GPIO25 SCL1/GPIO44 MBCLK <34>
MY6 MBDATA
<31> MY6 45
KSO6/GPIO26 SDA1/GPIO45
78 MBDATA <34> for Battery charge/charge and cap board
MY7 46 79 MBCLK2
<31> MY7 KSO7/GPIO27 SCL2/GPIO46 MBCLK2 <8,13,33>
MY8 MBDATA2 C415 0.1U/10V_4
<31> MY8 47
KSO8/GPIO28 SDA2/GPIO47
80 MBDATA2 <8,13,33> for CPU thermal
MY9 48 U18
<31> MY9 KSO9/GPIO29
<31> MY10 MY10 49 BIOS_CS# 1 8
MY11 KSO10/GPIO2A R442 10K/F_4 NBSWON1# BIOS_SPI_CLK_I CE# VDD
<31> MY11 50 +3VPCU 6
MY12 KSO11/GPIO2B R52 10K/F_4 QUICK_BUTTON# BIOS_WR# SCK
<31> MY12 51 5
MY13 KSO12/GPIO2C R439 4.7K_4 MBCLK BIOS_RD# SI SPI_7P
<31> MY13 52 2 7
MY14 KSO13/GPIO2D SUSB# R441 4.7K_4 MBDATA SO HOLD# R222 10K/F_4
<31> MY14 53 6 SUSB# <6>
B MY15 KSO14/GPIO2E GPIO4 SPI_3P3 B
<31> MY15 54 +3VPCU 4
MY16 KSO15/GPIO2F HWPG R240 10K/F_4 WP# VSS
<31> MY16 81 14 HWPG <35,36,37,38>
MY17 KSO16/GPIO48 GPIO7 R430 0_4 AKE3GZN0Q01
<31> MY17 82 15 H_PROCHOT# <2,40>
KSO17/GPIO49 GPIO8 SOIC8-8-1_27
<31> GPUT_CLK GPUT_CLK 83 16 SUSC#
PSCLK1/GPIO4A GPIOA SUSC# <6>
For GPU thermal <31> GPUT_DATA GPUT_DATA 84 17 PWRLED_RIGHT
PSDAT1/GPIO4B GPIOB PWRLED_RIGHT <28>
<31> TPLED# TPLED# 85 18 RB500V-40 D15
PSCLK2/GPIO4C GPIOC GPIO33_E <7>
ACIN 86 19 NBSWON1#
<34,39>
<31>
ACIN
TPCLK TPCLK 87
PSDAT2/GPIO4D
PSCLK3/GPIO4E
GPIOD
GPIO11
25
NBSWON1# <31>
SLP_S5 <6>
TP SM bus
<31> TPDATA TPDATA 88 30 R434 0_4
PSDAT3/GPIO4F GPIO16 EC_DEBUG1 <33>
31 Reserve for ENE timing issue 2N7002K
GPIO17 EJECT# <32>
BIOS_RD# 119 32 KBSMI#1 <15> DGPUT_CLK 1 3 GPUT_CLK <31>
BIOS_WR# RD GPIO18
120
BIOS_CS# WR VRON MBCLK2 Q38 R450 2.2K_4
128 34 VRON <40>
SELMEM/SPICS GPIO19 NUMLED# MBDATA2
<9> PCI_SERR# 89 36 NUMLED# <31>
2
SELIO/GPIO50 GPIO1A
<40> GFX_HWPG 76 +3V_VGA +3VSUS
DGPU_PR_EN_E 109 SELIO2/GPIO43
2
EC_GPXD1 D0/GPXD0 R449 2.2K_4
110
D1/GPXD1 C703 C706
<6> SUS_PWR_ACK 112
D2/GPXD2 QUICK_BUTTON#
<33> RF_LINK# 114 73 QUICK_BUTTON# <31> *10P/50V_4 *10P/50V_4 <15> DGPUT_DATA 1 3 GPUT_DATA <31>
R204 0_4 D3/GPXD3 CIR_RX/GPIO40 R437 *0_4
<7> PCH_SPI_CLK_R 115 74 EC_PECI <2>
R205 0_4 D4/GPXD4 GPIO41 GPIO42 Q37
<7> PCH_SPI_SO_R 116 75
R216 0_4 D5/GPXD5 GPIO42 DNBSWON#1 2N7002K
<7> PCH_SPI_SI_R 117 90
R206 0_4 D6/GPXD6 GPIO52 CAPSLED#
<2> EC_PECI 118 91 CAPSLED# <31>
D7/GPXD7 GPIO53 PWR_LED#
92 PWR_LED# <31>
USBPW_ON# GPIO54 EC_PWROK
<28> USBPW_ON# 97 93 EC_PWROK <6,18>
SUSON A0/GPXA0 GPIO55 RSMRST#
<37,39> SUSON 98 95 RSMRST# <6>
MAINON A1/GPXA1 GPIO56 VOLMUTE#
<34,36,37,38,39> MAINON 99 121 VOLMUTE# <27>
R209 *0_4 A2/GPXA2 GPIO57 BIOS_SPI_CLK L34 BLM15AG700SS1D(70,0.5A) BIOS_SPI_CLK_I
<7> PCH_SPI_CS0_R# 100 126
R202 0_4 A3/GPXA3 GPIO58 LID_EC#
<7> PCH_SPI_CS1_R# 101 127 LID_EC# <23,31>
A4/GPXA4 GPIO59
102
S5_ON A5/GPXA5 R223
<35> S5_ON 103
C A6/GPXA6 CRY2 C391 20P/50V_4 C
<6> AC_PRESENT 104 123 33_4
A7/GPXA7 XCLKO
<34> MBATLED0# 105 If use PCH Change to RB500 as Current loss
4
A8/GPXA8 C34 *0.1U/10V_4

<34> AC_LED_ON# 106 SUSCLK should
A9/GPXA9 CRY1 HWPG SCI1# D17
<31> WIRELESS_ON 107 122 1 2 RB501V-40 SIO_EXT_SCI# <7>
108
A10/GPXA10 XCLKI *32.768KHZ change to 20P.
<31> WIRELESS_OFF A11/GPXA11 Y6 C411
1
11 22P/50V_4 DNBSWON#1 D11 1 2 RB500V-40

GND1 DNBSWON# <6>
24 C393
GND2 *18P/50V_4 C685 *0.1U/10V_4
35
GND3 D18
124 94 FAN1SIG KBSMI#1 1 2 RB500V-40 SIO_EXT_SMI# <9>
V18R GND4
113
2
GND5 C406 *0.1U/10V_4

AGND
69 Add Pin 117,103 for DSM,116 for Bluetooth
C392 C384 DGPU_PR_EN
0.1U/10V_4 4.7U/6.3V_6 CRY2 R465 0_4
PCH_SUSCLK <6>
1
KB3940QF A1 Delete T10 and tie pin 117 from Lan for DSM
For +VIN noise
2
R464
100K_4
1
3920_RST#
+3V R443 4.7K_4 MBCLK2 +3VPCU

R133 47K_4 C235 0.1U/10V_4
R446 4.7K_4 MBDATA2
FOR SG/DIS R435 10K/F_4
+3V
R426 *10K_4 GPIO33_E
<9,18,42,43> DGPU_PWROK R212 *0_4/S EC_GPXD1
R438 *100K/F_4
BLUELED <33>
<42,43> DGPU_PR_EN R211 *0_4/S DGPU_PR_EN_E
D C712 *10P/50V_4 CLK_33M_KBC D

R451 *10_4
R210 DIS/SG==>NA
*100K_4
UMA==>100K
PROJECT : R33
<2,4,10,38,40> +1.05V_VTT Quanta Computer Inc.
<2,6,7,8,9,10,12,13,14,18,23,24,25,26,27,28,29,31,32,33,39,40,42,43> +3V
<7,23,31,34,35> +3VPCU
<34,35> +5VPCU Size Document Number Rev
Custom 1A
NB5 EC (KB3940 A1)/ROM
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
KEYBOARD Con.
MY5
MY6
MY3
MY7
C91
C116
C126
C111
*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
MX1
MX7
MX6
CN10
1
2
3
1
2
<30>
<30>
MY[0..17]
MX[0..7]
MY[0..17]
MX[0..7]
31
MY9 3
4 4
MY8 C113 *220P/50V_4 MX4 5
MY9
MY10
MY11
C81
C151
C146
*220P/50V_4
*220P/50V_4
*220P/50V_4
MX5
MY0
MX2
6
7
5
6
7
KEYBOARD Con.
8
A
MX3
MY5
9
10
8
9 Co-layout for 17" only A
MY1 C95 *220P/50V_4 SI un-install MY1

MX0
11
12
10
11 KEYBOARD PULL-UP
MY2 C100 *220P/50V_4 MY2 12 CN9
13 13
MY4 C102 *220P/50V_4 MY4 14
MY0 C86 *220P/50V_4 MY7 14 MX1
15 15 1 1
MY8 16 RP6 MX7 2
MX4 C82 *220P/50V_4 MY6 16 MY14 MX6 2
17 17 +3VPCU 10 1 3 3
MX6 C75 *220P/50V_4 MY3 18 MY13 9 2 MY11 MY9 4
MX3 C89 *220P/50V_4 MY12 18 MY12 MY10 MX4 4
19 19 8 3 5 5
MX2 C87 *220P/50V_4 MY13 20 MY3 7 4 MY15 MX5 6
MY14 20 MY6 MY0 6
21 21 6 5 7 7
MY11 22 MX2 8
MX7 C69 *220P/50V_4 MY10 22 MX3 8
23 +3VPCU *10P8R-8.2K 9
MX0 C99 *220P/50V_4 MY15 23 MY5 9
24 24 10 10
MX5 C84 *220P/50V_4 MY16 25 RP5 MY1 11
MX1 C63 *220P/50V_4 MY17 25 MY2 MX0 11
26 26 10 1 12 12
+3V 27 MY1 9 2 MY4 MY2 13
MY12 C130 *220P/50V_4 R121 2 27 13
<30> CAPSLED# 1 200/F_6 CAPSLED#_R 28 28
MY5 8 3 MY7 MY4 14 14
MY13 C134 *220P/50V_4 <30> NUMLED# R125 2 1 200/F_6 NUMLED#_R 29 MY0 7 4 MY8 MY7 15
MY14 C138 *220P/50V_4 WIRELESS_ON_R 29 MY9 MY8 15
30 30 6 5 16 16
MY15 C158 *220P/50V_4 WIRELESS_OFF_R 31 MY6 17
MY16 C170 *220P/50V_4 31 MY3 17
32 +3VPCU *10P8R-8.2K 18
MY17 C175 *220P/50V_4 32 MY12 18
19 19
+3V DFFC32FR025 R110 *8.2K_4 MY16 MY13 20
bl135h-32rla-tand-32p-l-smt R114 *8.2K_4 MY17 MY14 20
21 21
*KB CONN MY11 22
MY10 22
EC KB3930 has included K/B pull-up resistor and function MY15
23
24
23
MY16 24
B 25 25
B
+5V +5V MY17 26 26
+3V 27 27
9/15 SI for H/W. CAPSLED#_R 28
R128 R130 NUMLED#_R 28
29 29
1K/F_4 1K/F_4 WIRELESS_ON_R 30
WIRELESS_OFF_R 30
31 31
32 32
R124 2 1 *200/F_6 R131 2 1 *200/F_6 +3V DFFC32FR025
bl135h-32rla-tand-32p-l-smt
WIRELESS_ON_R WIRELESS_OFF_R KB CONN
Q11 Q12
3
3
PDTC144EU PDTC144EU
<30> WIRELESS_ON 2 <30> WIRELESS_OFF 2

1
C POWER BOTTON CONNECT TOUCH PAD Con. C
change to +3VSUS
100mA close conn
C73 1U/10V_4 1. +3VPCU(LIDSWITCH PWR)
+3VSUS R228 4.7K_4 TPCLK
CN7 2. QUICK_BUTTON R224 4.7K_4 TPDATA
C68 0.1U/10V_4
+3VPCU 1 3. LIDSWITCH CN11
<30> QUICK_BUTTON# 2
4.POWERON# TP_LED#
<23,30> LID_EC# 3 <30> TPLED# 8
C432 10P/50V_4
<30> NBSWON1# 4 7
PWR_LED# 5. PWRLED#
<30> PWR_LED# 5 6
<30> TPCLK L39 BLM18BA470SN1D TPCLK-1
6 L37 BLM18BA470SN1D TPDATA-1 5
6. GND <30> TPDATA
C417 10P/50V_4 4
PWR BTN CONN 3
<30> GPUT_DATA 2
DFFC06MR001 <30> GPUT_CLK
88513-0601-6P-L-SMT 1
PWR_LED#
25 mils TOUCH PAD CONN
C56 0.1U/10V_4 DFFC08FR026
LID_EC# 50503-0080n-001-8p-l
C62 0.1U/10V_4
TP_LED# +3VSUS C416 0.1U/10V_4
NBSWON1#
C59 0.1U/10V_4
QUICK_BUTTON#
D C74 0.1U/10V_4 C418 D
0.01U/16V_4
PROJECT : R33
<7,23,30,34,35> +3VPCU
<7,10,18,24,25,27,32,33,39> +5V
<30,33,39> +3VSUS Size Document Number Rev
Custom 1A
<2,6,7,8,9,10,12,13,14,18,23,24,25,26,27,28,29,30,32,33,39,40,42,43> +3V NB5 LED/KB/SW/TP
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+5V
SATA HDD CONNECTOR
32
CPU FAN C561
*2.2U/6.3V_6
C562
0.1U/10V_4
CN25 Bypass CAP close conn

A A
1
+5V CN17
1
2 SATA_TXP0_C C871 0.01U/25V_4
3 SATA_TXN0_C C868 0.01U/25V_4 SATA_TXP0 <7>
5 4 SATA_TXN0 <7>
FAN_PWM 15 SATA_RXN0_C C856 0.01U/25V_4
<30> FAN_PWM 2 5
6 SATA_RXP0_C C854 0.01U/25V_4 SATA_RXN0 <7>
3 SATA_RXP0 <7>
46 6 7
8
FAN Connect 9 +3V
+3V
Main HDD
10
11
DFHD04MR155 12
R385 13 +5V
4.7K/F_4 14
15
16
FAN1SIG 17
<30> FAN1SIG
18
19
C568
19 +5V
*0.1U/10V_4
SATA HDD(1ST)
DFHS13FS022
sata-ah534-00-13p-r
C834 C824 C822 C835

10U/6.3V_8 4.7U/6.3V_6 0.1U/10V_4 10U/6.3V_8
B B
SATA ODD CONNECTOR

CN13 Bypass CAP close conn
1 1
2 SATA_TXP4_C C536 0.01U/25V_4
3 SATA_TXN4_C C537 0.01U/25V_4 SATA_TXP4 <7>
4 SATA_TXN4 <7>
SATA_RXN4_C C546 0.01U/25V_4
5
6 SATA_RXP4_C C549 0.01U/25V_4 SATA_RXN4 <7>
SATA_RXP4 <7>
follow INTEL DG change eject PU to +3V.
7 R363 1K/F_4
8 2 1 ODD_PRSNT# <9>
9 +3V
10 +5V_ODD
11 ODD_EJECT#
+12VALW +5V
12
13 R369 C555
C C
14 AO3404 ID
2
15 +5V_ODD +5V 10K/F_4 current 0.1U/10V_4
16 R371 5.8A
17
18 R367 *0_8 ODD_EJECT# *0_4/S R370 EJECT# <30> 330K_6
3
19 Q27 +5V_ODD
1
19
AO3404
2
SATA ODD High : ODD power down
1
3
DFHS13FS022
Low : ODD power on R368
1
sata-ah534-00-13p-r 22_8
<30> ODD_PD 2
2
1
C560
Q29 0.022U/25V_4
3
2N7002
1
2
120 mils Q28
+5V_ODD
2N7002
1
C556 C558 C553 C554 C559
10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
D D
PROJECT : R33
Custom 1A
NB5 HDD/ODD/FAN
Date: Thursday, August 25, 2011 Sheet 32 of 43
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Mini PCI-E Card 1 R384 0_6 +3V
WLAN
<9> BT_OFF#
D14 RB500V-40
R383 0_6 +3V
+3V_AOAC
C566 C564
+1.5V
C587 C575 C570 C569 C567

+3V_AOAC
33
R373 4.7K_4 0.01U/16V_4 0.1U/10V_4 10U/6.3VS_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3VS_6
+3V
9/6 SI for HW. FOR KBC DEBUG +1.5V
CN18 R380 *4.7K_4

+3V
R372 *0_6 +MINIEC_5V 51 52
+5V Reserved +3.3V
A 49 50 R381 0_4 RF_LINK# A
EC debug pin Reserved GND
47 48
Reserved +1.5V MINI_BLED R379 *0_4
<30> EC_DEBUG1 45 46 BLUELED <30>
Reserved LED_WPAN# RF_LINK#
43 44 RF_LINK# <30>
Reserved LED_WLAN#
41 42
Reserved LED_WWAN# R382 4.7K_4
39 40 +3V
Reserved GND
37 38 USBP10+ <8>
Reserved USB_D+
35 36 USBP10- <8>
PCIE_TXP1 GND USB_D-
<8> PCIE_TXP1 33 34
PCIE_TXN1 PETp0 GND
<8> PCIE_TXN1 31 32
PETn0 SMB_DATA INTEL WLAN
29 30
GND SMB_CLK
27
GND +1.5V
28 CARD PIN 20
<8> PCIE_RXP1 PCIE_RXP1 25 26 W_DISABLE# +3VSUS
PCIE_RXN1 PERp0 GND
<8> PCIE_RXN1 23 24 have
PERn0 +3.3Vaux R405 *10K/F_4
21 22 PLTRST# <2,8,14,26,29,30> internal
GND PERST#
<8> CLK_33M_DEBUG 19 20 RF_OFF# <9>
PLTRST# Reserved W_DISABLE# pull-up 110k
17 18
Reserved GND ohm
2
15 16 LAD0 LAD0 <7,30>
CLK_PCIE_WLAN GND Reserved LAD1
<8> CLK_PCIE_WLAN 13 14 LAD1 <7,30>
CLK_PCIE_WLAN# REFCLK+ Reserved LAD2
<8> CLK_PCIE_WLAN# 11 12 LAD2 <7,30>
REFCLK- Reserved LAD3
9 10 LAD3 <7,30>
GND Reserved LFRAME# MINICAR_PME#
<8> PCIE_CLKREQ_WLAN# 7 8 LFRAME# <7,30> <6,29> PCIE_WAKE# 3 1
R397 *0_4 BT_COMBO_EN_R# CLKREQ# Reserved
<8> BT_COMBO_EN# 5 6
BT_CHCLK +1.5V *PDTC144EU
3 4
MINICAR_PME# BT_DATA GND
1 2 Q34
WAKE# +3.3V
BT_DATA,BT_CHCLK,CLKREQ# MINI PCIE H=9.9 Reserve for AOAC function
internal pull-DOWN 100k DFHS52FR095
MIPCI-C-1759513-52P-LDV-SMT +3VS5 +3VSUS +3V_AOAC
ohm
B B
R396
CLK_33M_DEBUG R388 *0_4 C581 *33P/50V_4 <4,10,12> +1.5V
1
*100K/F_4 <2,6,7,8,9,10,12,13,14,18,23,24,25,26,27,28,29,30,31,32,39,40,42,43> +3V
Q32 <7,23,30,31,34,35> +3VPCU
for EMI request *ME2303T1 <7,10,18,24,25,27,31,32,39> +5V
2
24mil
3
3
+3V_AOAC
Q33
C583 C565 C578
<8> PCH_AOCS# 2
*1U/6.3V_4 *10U/6.3V_8 *.1U/10V_4
*2N7002E
1
Accelerometer Sensor
C C
R165 0_6 +3V
R154 *0_6 +3V_AOAC
U12
HP3DC2TR
C336 C307 1 2
0.1U/10V_4 0.1U/10V_4 Vdd_IO NC
14 3
VDD NC
10
ACCEL_INTH# RESERVED
11 13
<8> ACCEL_INTH# INT1 RESERVED
TP28 9 15
INT2 RESERVED
16
R155 *0_4/S RESERVED
7
SDO
<8,13,30> MBDATA2 6
SDA
<8,13,30> MBCLK2 4 5
SCL GND
12
R151 *0_4/S GND
+3V 8
CS
AL003DC2A00
ACCEL_INTH# MBDATA2 C340 33P/50V_4

D D
MBCLK2 C339 33P/50V_4
C278
22P/50V_4
PROJECT : R33
Custom 1A
NB5 MINI PCIE CONN & G-sensor
1 2 3 4 5 6 7 8
5 4 3 2 1
DC_JACK
90W
EC18
1000P/50V_4
AD_ID <30>
Do Not add test pad on BATDIS_G signal
+PRWSRC 34
+BATCHG
Place this ZVS close to PQ23
EC9 EC8 EC7 EC5 PL8
CN16
5
+VA_AC +VA Diode away +VIN AON6414AL
*10U/25V_8
*10U/25V_8
*10U/25V_8
*10U/25V_8
1 PL19 PQ48 80/5A
AD_ID
VDD PD20
2 ME7835 3 CN15
S
VDD PL7
D 80/5A 5 1 1 2 +VAD PQ50 5 2 BATT+ 2 1 D
P0603BDG 80/5A 2 1
PL18 6 2 1
6 PC231 7 3 P4SMAJ20A 4 3 SMD 3 10
GND 3 10
G
PC93 PC88
0.1U/25V_4
80/5A 8
SMC
0.1U/25V_4
0.1U/25V_4
4 9
4
4 9
8 3
1
LED2 GND PC94 PC60 PC217 PC222 PC206 BQBATDRVPR127 4.02K/F4 BATDIS_ID_DOD
GND 4 5 5 7 7
2200P/50V_4 PC107 +3VPCU
0.1U/25V_4
0.1U/25V_4
0.1U/25V_4
0.1U/50V_6
7
IDEA_G
LED1 0.01U/50V_4 B_TEMP_MBAT6
6 8 8
AC_LED_ON# PR122 +VIN
DC-IN CONN BATDIS_G RC2512-R010 PR69 PR70 200045MR008G10JZR
2
To PWR LED 1 2 330_4 330_4 DFHD08MR175

PQ24 Place this ZVS close to
PDTC144EU bat-bp02081-b82d5-7h-8p-l-v
Far-Far away +VIN PR71
PR111 <30> MBDATA
+12VALW 3 1 PC101 200K_4
1
PQ19
0.1U/25V_4
1M_4 <30> MBCLK
2
2N7002K PD18
PR72
PR108 P4SMAJ20A TEMP_MBAT <30>
1 3 +5VPCU PD12 PD5 1K/F_4
1
PDZ5.6B
PDZ5.6B
2.43K/F_6 PR121 PR123
2
3
+VAD PR105 PR227 PR79 *0_2/S *0_2/S PC48 PC182

PQ12 1M_4 4.02K/F4 4.02K/F4
0.01U/25V_4
0.01U/25V_4
PR86
Q2
PC102
CSIP
2 4 3
CSIN
AC_LED_ON# <30>
*0.1U/25V_4
PR93 1M_4
2
MBATLED0# 5 6
PQ25
1
220K_4 PR104
2
PDTC144EU 2 Q1 1 +VA PC36 PC37
*100P/50V_4
*100P/50V_4
PQ27 PR106 1K_6 PC126 PC132 PC124 PC131 Place this cap
REGN6V
2200P/50V_4
1000P/50V_4
PDTC144EU MMDT2907A
4.7U/25V_8
0.1U/25V_4
220K_4
C close to EC C
PR120
BQACN
BQACP
+12VALW 3 1 PC70 PC79
1M_4 PC59 PC64
0.1U/25V_4
2
8
7
6
5
2N7002K
1U/10V_4 PQ30
16
PR115
1
PQ20 1 3 +5VPCU 0.1U/25V_4 0.1U/25V_4 QM3002N3
ACP
ACN
REGN
2.43K/F_6
3
18 BQHIDRV 4 EC17 EC15 EC16 EC12

BQCMSRC HIDRV
*10U/25V_8
*10U/25V_8
*10U/25V_8
*10U/25V_8
3 CMSRC
PC105 2 MBATLED0# <30> 1 2 REGN6V
*0.1U/25V_4
3
2
1
PD14 RB501V-40 PR240 +BATCHG
PR110
PQ29 BQACDRV 4 BQB_2
17 BQB_1 RC1206-R020
1
PDTC144EU ACDRV BTST F3_2X1_65-2_8

0_6
PC84 PL20
PR76 BQPHASE 0.047U/25V_4 8681LR
REGN6V PHASE 19 1 2
51K_4 4.7uH
ACIN 5 PU9
<30,39> ACIN ACPRES
8
7
6
5
15 BQLODRV
PR78 LODRV
BQ24738 PR155 PC219 PC220 PC97 PC215
10U/25V_8
10U/25V_8
+VAD_1 *2.2_6
0.1U/25V_4
0.1U/25V_4
+VA_AIR +VA *100K/F_4
14 PR241 PR239
PD6 GND *0_2/S
PD10 21 4 *0_2/S
PR119 GND
1 2 2 1 BQVCC 20 22
VCC GND
1
22_8 23 PC51 PC136
BAS316/DG BAS316/DG GND *2200P/50V_4
24
3
2
1
PD11 PC76 GND PD19
GND 25
PR25
RB501V-40
ACIN 2 1 0.47U/25V_6 0.1U/25V_4 PQ31
75K/F_4 PR15
MBDATA BQDATA 8 13 BQSRP PR65 10/F_4 QM3002N3
2
BAS316/DG SDA SRP CSOP
*0_4/S
B PD7 12 BQSRN PR59 7.5/F_4 PC39 CSON B
<30> AD_AIR PR32 SRN
MBCLK BQCLK
0.1U/25V_4
2 1 9
ACDET
<30,36,37,38,39> MAINON SCL
11 BQBATDRV
IOUT
*0_4/S BATDRV
ILIM
PC243 BAS316/DG PC38
0.1U/10V_4
PD8
PR46
10
7
12.4K/F_4 0.1U/25V_4
BQIOUT
+VAD 1 2
4
*BAS316/DG
Place this cap PQ7 PR47
close to EC +VAD_1 PR44
IMD2 430K/F_4 PR52 PR39
SYS_I <30> +BATCHG
100K/F_4
*100K/F_4
10/F_4
ACDET=13V PR54 PR56 PC20
3
69.8K/F_4 88.7K/F_4 PC24 PC183

0.1U/50V_6
100P/50V_4
0.01U/50V_4
PR228
+VAD +3VPCU 470_8
3
MIN. BATV=7.2V PQ10
3
PR100 2N7002K Place this cap
+VA +PRWSRC 2
1M_4
close to EC
+VH28 <39>
+VAD_1 <39> <30> BATSHIP 2
PR101
+3VPCU <7,23,30,31,35>
1M_4
1
+5VPCU <35>
PQ49
+BATCHG
2N7002K
1
A A
3
PQ9
AD_AIR PR63 METR3904-G
2
1M_4
1
PROJECT : R33
Custom Charger (OZ8681) 1A
NB5
5 4 3 2 1
5 4 3 2 1
DC/DC +3VS5/+5VS5
35
D D
+VIN Place these CAPs +VIN_5VS5

PL9
close to FETs
*0_8/S
Place these CAPs +VIN_3VS5 +VIN
PL11
PC98 close to FETs
PC95 PC209 PC117 PC87 EC14 *0_8/S
0.1U/25V_4
2200P/50V_4
68P/50V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
EC11 PC80 PC104 PC89 PC212 PC99
+VIN
68P/50V_4
2200P/50V_4
+5VPCU
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
PC68
PR116
4.7U/6.3V_6
10_8
+3VPCU
+2VREF +5VPCU
PC29
PC75
4.7U/6.3V_6
PC15 PR19
0.1U/25V_4
PR95 1U/6.3V_4 *0_2/S +3.3 Volt +/- 5%
+5 Volt +/- 5% *665K/F_4
Countinue current:4A
16
17
5
6
7
8
8
7
6
5
C C
PQ54 Peak current:6A
Peak current:6A
VREG3
VREG5
REF
VIN
PR96 8205EN QM3002N3
13 4
EN0 TONSEL OCP minimum:7.5A
OCP minimum:7.5A 4
*330K/F_4
5V_UGATE121 10 3V_UGATE2 4
PC50 UGATE1 UGATE2 PC57
+5VS5 PR61 PR66 +3VS5
PQ51 5V_BST1 22 9
PL24 QM3002N3 BOOT1 BOOT2 PL25
2.2_6 2.2_6
1
2
3
3
2
1
2.2UH/8A 0.1U/25V_4 PU8 0.1U/25V_4 2.2UH/8A
+5V_ALWP 5V_PHASE120 UP1585QQAG 11 3V_PHASE2 +3.3V_ALWP
PHASE1 PHASE2
PR246 PR245
5
6
7
8
5V_LGATE1 19 12 3V_LGATE2
LGATE1 LGATE2
8
7
6
5
*0_2/S *0_2/S
1
PR233 24 PR234
ENTRIP1
ENTRIP2
VOUT1
SKIPSEL
+ 2.2_6 5V_FB1 2 7 2.2_6
FB1 OUT2
1
PC226 PC233 PR27 4
GND
GND
ENC
PR51
15.4K/F_4 PR50 PGOOD 3V_FB2 +
330U/6.3V_6X5.8
0.1U/10V_4
+3VS5 23 5 4
2
PQ52 0_4 PGOOD FB2 PC229 PC227

10K_4
PC214 AON7702A PQ53 PC213
0.1U/10V_4
330U/6.3V_6X5.8
1
2
3
18
14
25
15
2
2200P/50V_4
2200P/50V_4
<30,36,37,38> HWPG AON7702A
3
2
1
PR26
10K/F_4 PR28 PR97
Rds(on) 14m ohm 80.6K/F_4 *0_2/S Rds(on) 14m ohm
PR22
6.8K/F_4
PR20
B 90.9K/F_4 B
PR21
10K/F_4
PR94
S5_ON
S5_ON <30>
0_4
PC69
*0.1U/10V_4
A A
PROJECT : R33
Custom 1A
NB5 3/5VPCU(RT8223P)
5 4 3 2 1
5 4 3 2 1
+5VS5
PR128
+VIN_VCCSA
PL10
*0_8/S
+VIN 36
10_6
+VCCSA Volt +/- 5%
RT8241VCC
PC110 PC221 PC218 PC223 PC111 EC13 PC96
2200P/50V_4
68P/50V_4
1U/6.3V_4
0.1U/25V_4
4.7U/25V_8
0.1U/25V_4
*4.7U/25V_8
Peak current:6A
8
7
6
5
D D
OCP minimum:7A
13
12
PU11
5
3 RT8241DH 4 PQ28 +VCCSA
VCC
PAD
GND
PR164 UGATE
RT8241ILIM 11 PC128 QM3002N3
CS PR137
RT8241BST_1 RT8241BST
130K/F_4 BOOST 4
3.3_6
3
2
1
PR159 0_4 RT8241HWPG_S2A 9 0.1U/25V_4 PL23
<30,35,37,38> HWPG PGOOD
2 RT8241LX 200 mils
PR132 0_4 RT8241EN 6 RT8241DZ PHASE 2.2UH/8A
<38> 1.05V_VTT_PWRGD EN
1 RT8241DL
LGATE PR244
8
7
6
5
PR165
PC109 2.2_6
G0
G1
FB
*0_2/S
1
*0.1U/10V_4
+
8
7
RT8241FB 10
4 PC230 PC234
0.1U/10V_4
390U/2.5V_6X5.8ESR10
2
PQ32 PC133
8241G0
8241G1
QM3002N3 2200P/50V_4
3
2
1
PR148
<4> VCCSA_SEL0
0_4
RDSon=26m ohm
PR156
<4> VCCSA_SEL
0_4
C
PR170 PR171 C
<4> VCCUSA_SENSE
0_4 100_4
CPU system agent

voltage slew rate of 0.5 -10 mV/µs
H_FC_C22 VCCSA_SEL
Vout
VID0 VID1
0 0 0.9V
0.80V (SV-RT8241DZGQW)
0 1
0.85V (LV-RT8241EZGQW)
1 0 0.725V
1 1 0.675V
+5VS5 +1.05V +/- 5%

2
B B
PJP7 Peak current:3A
*POWER_JP/S OCP minimum 4.5A
1
+5VPCU_1.05V
PC262 PR259
PC260 PC259 *2200P/50V_4 *2.2_6 +1.05V

*10U/6.3V_8
*0.1U/10V_4
PU16 *G5173
2
16 VIN PH 10
+1.05V_L PR253
1 VIN PH 11 *POWER_JP/S
PL30
1
2 12 G5173_PH1.05V +1.05V_L
VIN PH PC263 *NIMS0603-1R0M/11A
PR262 PR261
MAINON G5173EN1.05V15 13
<30,34,37,38,39> MAINON EN BOOT 1.05_VFBJP PR254
*0_4 PR260 *2.2_6
14 6 *0.1U/10V_4 *0_2/S
<30,35,37,38> HWPG PW RGD VSNS
G5173COMP1.05V
*0_4 R1
PC264 7 3 PC252 PC253 PC254
COMP GND PR255 PC257
*0.1U/10V_4
*10U/6.3V_8
*10U/6.3V_8
*0.01U/50V_4
*82P/50V_4
G5173RT1.05V 8 4 *2.7K/F_4
RT/CLK GND
PAD
PAD
PAD
PAD
PAD
PAD
G5173SS1.05V
9 SS 5 G5173-1.05_VFB
PR258 PR257 AGND
*20K/F_4
*182K/F_4
22
21
20
19
18
17
PC256 R2 PR256
A A
*100P/50V_4
PC258 *10K/F_4
*0.01U/50V_4
PC255
*470P/50V_4
V0=0.827*(R1+R2)/R2
PROJECT : R33
Custom 1A
NB5 VCCSA (RT8241EZ)
5 4 3 2 1
1 2 3 4 5
( VTT/2A )
PR90 PR91
+1.5VSUS
+VIN_DDR
PL6
+VIN
+1.5V +/- 5%
37
0_4 *0_4
+0.75V_DDR_VTT *0_8/S
4
PU5 PC41
24 23 EC10 PC82 PC71 PC58 PC81 PC92
Peak current:12A
MODE
VTT VLDOIN
2200P/50V_4
68P/50V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
8
7
6
5
2 *0.1U/50V_6
A PC63 PC62 VTTSNS OCP minimum 15A A
10U/6.3V_8
10U/6.3V_8
1 VTTGND
UGATE 21 1116DRVH 4
1 2 +5VS5
3 PC25 +1.5VSUS
GND PR58
22 1116VBST PD9 RB501V-40 PQ11
3
2
1
VBST QM3002N3 PL16
( 3mA ) 25 GND 2.2_6
0.1U/25V_4 NIMS0603-R82M/13A
<4,12,13> DDR_VTTREF 5 VTTREF PHASE 20 1116LL
1
PC66 7 NC LGATE 19 1116DRVL PR88
0.033U/10V_4 D 2.2_6 +
G PR230 PC211 PC122
PD13 *0_2/S
0.1U/10V_4
390U/2.5V_5X5.8ESR10
4
2
MAINON 1 2 1116_S3ON 10 18 +5VS5 S
<30,34,36,38,39> MAINON S3 PGND
1
2
3
BAS316/DG 17 PC78
CS_GND
2200P/50V_4
SUSON PR43 0_41116_S5ON 11 PC9 PQ5
PR55 <30,39> SUSON S5 1U/6.3V_4 AON6790
HWPG PR30 0_4 51116PG 13 PR14
100K/F_4 <30,35,36,38> HWPG PGOOD VDDP 15
10_6
PC28
PR34 PR17 Rds(on) 5m ohm
0.1U/10V_4 +VIN_DDR 1116TONSET
12 16 1116CS
TON CS
619K/F_4 7.5K/F_4
PR60 V5FILT
9 FB DEM 6
10K/F_4
8 VDDQSNS VDD 14
B B
PR68 G5616 PC10

10.2K/F_4 1U/6.3V_4
C C
D D
PROJECT : R33
Custom 1A
NB5 DDRIII(RT8207LGQW)
Date: Wednesday, August 31, 2011Sheet 37 of 43
1 2 3 4 5
5 4 3 2 1
1.05V_VTT
+3VS5
38
PR84
10K_4 +VIN_1.05V_VTT
D +VIN D
PR18 PR81 PL5

+5VS5 H_VTTVID1 <4>
10_6 *0_4 *0_8/S
RT8238VCC
RT8238TON
PC16 PC30 PC21 PC23 PC22 EC6 PC8 +1.05V_PCH Volt +/- 5%
+3VS5
2200P/50V_4
68P/50V_4
1U/6.3V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
8
7
6
5
Peak current: 12A
PR83
11
OCP minimum: 14.5A
5
10K_4 PU6
3 RT8238DH 4 PQ8
VCC
TON
<36> 1.05V_VTT_PWRGD PR82 UGATE +1.05V_VTT
RT8238ILIM 10 PC27 QM3002N3
PD15 CS PR36
RT8238BST_1 RT8238BST
56K/F_4 BOOST 4
BAS316/DG 2.2_6 PL17
3
2
1
2 1 PR74 0_4 RT8238HWPG_S2A
9 0.1U/25V_4 NIMS0603-R82M/13A
<30,35,36,37> HWPG PGOOD RT8240BZ
2 RT8238LX 600 mils
PR64 0_4 RT8238EN 8 PHASE
<30,34,36,37,39> MAINON EN
1 RT8238DL
LGATE PR235
MODE
PR87
GND
5
PC35 13 2.2_6
FB
PAD *0_2/S
1
D
*0.1U/10V_4
G + +
12
6
4 PC224 PC232 PC161
S
0.1U/10V_4
390U/2.5V_6X5.8ESR10
*390U/2.5V_6X5.8ESR10
2
2
PQ13 PC46
1
2
3
2200P/50V_4
AON6790
C C
RT8238FB
RDSon=5m ohm
PR48 PR13
*10_4 *10_4
PR31
VCCP_SENSE <4>
0_4
PR38
VSSP_SENSE <4>
0_4
+5VS5
+1.8V +/- 5%
2
PJP5
*POWER_JP/S
B B
Peak current:3A
1
+5VPCU_1.8V
PC42 PR67
OCP minimum 4.5A
PC43 PC44 +1.8V
*2200P/50V_4 *2.2_6
10U/6.3V_8
0.1U/10V_4
PU7 G5193
2
16 VIN PH 10
+1.8V_L PR231
PL15
1
2 12 G5173_PH +1.8V_L
VIN PH PC67 NIMS0603-1R0M/11A
PR103 PR98
MAINON G5173EN 15 13
<30,34,36,37,39> MAINON EN BOOT 1.8_VFBJP PR224
0_4 PR102 2.2_6
14 6 0.1U/10V_4 *0_2/S
<30,35,36,37> HWPG PW RGD VSNS
G5173COMP
0_4 R1
PC74 7 3 PC210 PC201 PC216
COMP GND PR33 PC19
0.1U/10V_4
10U/6.3V_8
10U/6.3V_8
*0.01U/50V_4
G5173RT
*82P/50V_4
8 4 12K/F_4
RT/CLK GND
PAD
PAD
PAD
PAD
PAD
PAD
G5173SS9 5 G5173-1.8_VFB
PR40 PR35 SS AGND
20K/F_4
182K/F_4
22
21
20
19
18
17
PC11 R2 PR16
*100P/50V_4
PC34 10.2K/F_4
0.01U/50V_4
A PC12 A
470P/50V_4
V0=0.827*(R1+R2)/R2
PROJECT : R33
Custom 1A
NB5 1.0V(RT8228BZ)/1.8V(G5173)
Date: Wednesday, August 31, 2011Sheet 38 of 43
5 4 3 2 1
5 4 3 2 1
39
+VH28
+5V <7,10,18,24,25,27,31,32,33>
+VAD +VIN <23,34,35,36,37,38,41,42,43>
+1.5V <4,10,12,33>
+1.8V <4,7,10,38,43>
+3VS5 <2,6,7,8,9,10,23,33,35,38,42,43>
PR172
+5VS5 <10,28,35,36,37,38,40,41,42>
PR168 0_4
+VH28
22_6
+VAD_1 <34>
+3VSUS <30,31,33>
+12VALW <32,34,43>
PC145
0.1U/25V_4 PC135
D +1.5VSUS <2,4,10,12,13,37,43> D
PC141 1U/35V_6
ACIN <30,34> +3VLANVCC <29>
G5934CN
PC139
G5934CP
0.1U/25V_4
+0.75V_DDR_VTT <12,13,37>
0.47U/25V_6
20
19
18
17
16
PR177
0_4 +VAD_1
VOUT
CP
D_CAP
VIN
CN
<30> LAN_POWER 1 ON1 PG 15 G5934PG
PR181
750K/F_4
MAINON 2 14 G5934VSENSE
<30,34,36,37,38> MAINON ON2 VSENSE
+12VALW PR184
100K/F_4
3 ON3 REG 13
<30,37> SUSON
PC158
1U/16V_4
MAINON 4 ON4
PR201
DISC3 7 G5934DISC3 +3VSUS
0_6
PR194 PR200
+3VLANVCC G5934DISC1 5 6 G5934DISC2 +5V
C DISC1 DISC2 C
0_6 0_6
DRIVER4
DRIVER3
DRIVER1
DRIVER2
DISC4
PU13 +5VS5
GND
SLG55448VTR
12
11
G5934DISC4 8
10
21
8
7
6
5
PQ47 PC261 +VIN +0.75V_DDR_VTT
QM3002N3 0.1U/10V_4
MAIND 4
+3VS5
5.1A PR117
PC166 22_8
3
2
1
2200P/50V_4 PR114
5
6
7
8
PR202 +5V 1M_4
3
PC225 PQ55 0_6 PQ22
QM3002N3 +3VS5 2N7002K
0.1U/10V_4
4 MAIND3.3V 2
PC197 PC196
5.2A
3
0.1U/10V_4 *10U/6.3V_6
PC160 +3V PC83
1
2
3
+3V
1
2
5
6
2200P/50V_4 0.1U/10V_4
1
2
LAN_ON 3 PR112
0.7A PQ26 1M_4
PQ21 +3VLANVCC 2N7002K
MAIND <4> MAIN_ONG <2,4>
PC73 PC72 PC167 QM3002V
1
0.1U/10V_4 +3VS5 2200P/50V_4
*10U/6.3V_6
B B
PC115 PC108
0.1U/10V_4
*10U/6.3V_6
PC155
6
5
2
1
0.1U/10V_4
0.04A
3 SUSD
+3VSUS
PQ36
QM3002V PC164
4
2200P/50V_4
PC156 PC154
0.1U/10V_4
*10U/6.3V_6
A A
PROJECT : R33
Custom Dis-charge IC (G5934) 1A
NB5
5 4 3 2 1
5 4 3 2 1
PC32
PC14 PC13
40
PC17 PR24 *1K/F_4 PR41 0_4
1
IMONA
1200P/50V_4
0.1U/10V_4 PUT COLSE
6132AGND
PC18 PR12 PR249 *100P/50V_4 1000P/50V_4
+5VS5 PR53
470P/50V_4 75K/F_4 TO
220K_6 NTC
GT
PR23
21.5K/F_4 Inductor CSCOMPA PR42 510/F_4 DROOPA CSREFA
*4.7K/F_4
2
PC5 PR11
PR5
PR6 PC6 10P/50V_4 165K/F_4
0_4 10/F_4
33P/50V_4 PC7
PR8
D PR7 1K/F_4 D
TRBSTA# PR29 SWN1A
4.3K/F_4 SWN1A <41>
3300P/50V_4 PR9 68.1K/F_6
14K/F_4 CSREFA TSENSEA
6132AGND
PC31
0.047U/25V_4
PR37 0_4
PR45
PC33 CSP1A SWN1A
<4> VCC_AXG_SENSE 1000P/50V_4 6.98K/F_4
1
<4> VSS_AXG_SENSE PC26 CSREFA <41>
1000P/50V_4 PR223 PR222
PR57
PR49 0_4
8.25K/F_4
100K/F_4 NTC
+5VS5
0_4
+1.05V_VTT
2
+3V +3V PR225
CSCOMPA
6132AGND
TSENSEA
TRBSTA#
DROOPA
CSSUMA
CSREFA
PC40
COMPA
*0_4/S
CSP2A
CSP1A
IMONA
DIFFA
VSNA
VSPA
ILIMA
FBA
PR157 PR169 PR160
*75/F_4 10K/F_4 10K/F_4 6132AGND 0.1U/10V_4
PUT COLSE
PU10
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
H_PROCHOT# IMVP_PWRGD GFX_HWPG PR62 2.2_6 NCP6132BMNR2G TO V_GT
<2,30> H_PROCHOT# <6> IMVP_PWRGD +5VS5
HOT SPOT
TRBSTA#
VSNA
VSPA
DIFFA
FBA
COMPA
IOUTA
ILIMA
DROOPA
CSCOMPA
CSSUMA
CSREFA
CSP2A
CSP1A
TSNSA
EPAD
PR77
PC56
2.2U/6.3V_6 25.5K/F_4
C 6132AGND VCC 1 45 6132_PWMA 6132_PWMA <41> C
VCC PW MA
2 VDDBP BSTA 44
<30> GFX_HWPG GFX_HWPG 3 42
PR92 0_4 6132EN 4 VRDYA SW A
<30> VRON EN HGA 43
+1.05V_VTT PR213 0_4 SDIO 5 41
<4> VR_SVID_DATA SDIO LGA
<4> VR_SVID_ALERT# VR_SVID_ALERT# 6 40 BST2 PC65 0.22U/25V_6 Rd POP
PR212 0_4 SCLK 7 ALERT# BST2 SW2
<4> VR_SVID_CLK SCLK SW 2 38 SW2 <41>
PR109 10K/F_4 VBOOT 8
VBOOT HG2 39 HG2
HG2 <41> For Discrete only
PR113 95.3K/F_4 ROSC 9 37 LG2 PC77 +5VS5
PC134
6132AGND
6132VRMP 10 ROSC LG2
36
LG2 <41> operation
+VIN_VCC_CORE VRMP PVCC
PR145 PR140 PR141 0.1U/10V_4 H_PROCHOT# 11 35 +5VS5
130/F_4 *75/F_4 54.9/F_4 PR118 IMVP_PWRGD 12 VRHOT# PGND LG1 2.2U/6.3V_6
VRDY LG1 34 LG1 <41>
1K/F_4 PC91 VSN 13 32 HG1 Rd
VSN HG1 HG1 <41>
0.01U/50V_4 VSP 14 33 SW1 SW1 <41>
SDIO DIFF 15 VSP SW 1 BST1 PR75
31
CSCOMP
DIFF BST1
TRBST#
VR_SVID_ALERT# PC90 0.22U/25V_6 *0_4
DROOP
CSSUM
DRVEN
CSREF
COMP
TSNS
SCLK
CSP3
CSP2
CSP1
6132AGND
PWM
IOUT
ILIM
FB
CSP1A
PR124
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
41.2K/F_4
CSCOMP
COMP
TSENSE
TRBST#
IMON
DROOP
CSSUM
DRVEN
FB
CSREF
ILIM
PR125 0_4 6132_PWM
CSP3
CSP2
CSP1
6132_PWM
<4> VSS_SENSE DRVEN <41>

<4> VCC_SENSE PC103
1000P/50V_4 CSREF
6132AGND
B B
PR131 0_4 PC100
PR149 PC119
11.5K/F_4 0.1U/10V_4 0.047U/25V_4
PC125 CSP1 PR133 6.98K/F_4 SWN1 TSENSE
PR126
1K/F_4 CSP2 PR136 6.98K/F_4 SWN2
33P/50V_4
PR129
+5VS5
PC112 PC129 0_4 PC114
PR134 PR147 0.047U/25V_4
PC123 49.9/F_4 4.3K/F_4 CSREF
PR146 CSREF <41>
100P/50V_4 3300P/50V_4
1
10/F_4
680P/50V_4 PC106 PR73 PR80
1000P/50V_4
8.25K/F_4
100K/F_4 NTC
TRBST# PR143 PR138
1.21K/F_4 24.9K/F_4
2
6132AGND
PC116 CSSUM
4700P/25V_4 PR135 PC113
22.6K/F_4
0.1U/10V_4
PC120 1200P/50V_4
PR154
SWN1
SWN1 <41>
6132AGND 140K/F_6 PUT COLSE
6132AGND 6132AGND PC127 470P/50V_4
PR153
SWN2 TO VCORE
A SWN2 <41> A
PC118 PC130 140K/F_6 HOT SPOT
PR139 *1K/F_4 PR152 0_4
PR150 PR151
*820P/50V_4 1000P/50V_4 75K/F_4 165K/F_4
CSCOMP PR130 DROOP PR144 CSREF
PROJECT : R33
510/F_4 *4.7K/F_4 PUT COLSE 2 1 Quanta Computer Inc.
TO VCORE PR232
Phase 1 220K_6 NTC Size Document Number Rev
Custom 1A
Inductor NB5 <Doc>
Date: Monday, August 29, 2011 Sheet 40of 43
5 4 3 2 1
5 4 3 2 1
+VIN_VCC_CORE +VIN
PL14
*0_8/S
41
1
PC200 PC208 PC205 PC203 PC54 PC47 + PC228
PC198
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
*4.7U/25V_8
470U/25V_EC_10H
0.1U/25V_4
2
2
PQ16
5
AON6414AL
D
PR229 G
HG1 HG1_G 4
<40> HG1 S +VCC_CORE
1_6
PL22
1
2
3
SW1
<40> SW1
0.36uH
D D
5
D PR89
G *2.2_6
LG1 4
<40> LG1 S
PR243 *0_2/S PR236 10/F_4 CSREF
CSREF <40>
1
2
3
PQ18 PC55
AON6784
*2200P/50V_4
PR238 *0_2/S
SWN1 <40>
+VIN_VCC_CORE SV 35W CPU

VID1=0.9V
IccMax=53A
Icc_Dyn=43A
PC199 PC202 PC204 PC207 PC52 PC45
Icc_TDC=36A
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
*4.7U/25V_8
R_LL=1.9m ohm
PQ15
OCP~60A
5
AON6414AL
D
PR226 G
HG2 HG2_G 4
<40> HG2 S
1_6 +VCC_CORE
1
2
3
PL21
SW2
<40> SW2
C 0.36uH C
1
5
+ + + + + +
D PR107 PC138 PC121 PC157 PC169 PC242 PC181
G *2.2_6
330u_2.5V_7343
330u_2.5V_7343
330u_2.5V_7343
330u_2.5V_7343
*330u_2.5V_7343
*330u_2.5V_7343
2
2
LG2 4
<40> LG2 S
PR242 *0_2/S PR142 10/F_4 CSREF
1
2
3
PQ17 PC61
AON6784
*2200P/50V_4
PR237 *0_2/S
SWN2 <40>
+VIN_VCC_GT +VIN
PL13
*0_8/S SV 35W GT2
PC187
PC190 PC193 PC194 PC189 PC195 PC192 VID1=1.23V
0.1U/25V_4
IccMax=33A
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
2200P/50V_4
*4.7U/25V_8
PC184 Icc_Dyn=20.2A
VGTA_BSTRC1 PQ44
Icc_TDC=21.5A
5
AON6414AL
B B
0.22U/25V_6 D R_LL=3.9m ohm
PR216 G OCP~36A
PU15 NCP5911 HGTA_G 4
S
1_6 +VCC_GFX
1 8 HGTA
1
2
3
BST HG
PL29
2 7 SWGTA
<40> 6132_PWMA PWM SW
PR214 0.36uH
DRVEN 3
<40> DRVEN GND 6
5
1
EN
2.74K/F_4
4 5 LGTA D PR215 PR252 *0_2/S PR10 10/F_4 CSREFA + + + +
+5VS5 VCC LG CSREFA <40>
G *2.2_6 PC244 PC247 PC246 PC251
PAD
4
*330u_2.5V_3528
2
2
390U/2.5V_6X5.8ESR10
390U/2.5V_6X5.8ESR10
390U/2.5V_6X5.8ESR10
PC185 9 S PR251 *0_2/S
SWN1A <40>
2.2U/6.3V_6
1
2
3
PQ43 PC186
AON6784
*2200P/50V_4
A A
PROJECT : R33
C 1A
NB5 <Doc>
5 4 3 2 1
1 2 3 4 5 6 7 8
VGA Core
42
<43> 8232EN
A A
+3VS5
PR183
*10K/F_4
PR179
<9,18,30,43> DGPU_PWROK
0_4
PD17 +VIN_VGA +VIN
PR174 PR192
1 2 +3V +5VS5 PL12
*10K/F_4 10_6
*BAS316/DG *0_8/S
PC152
PR173
4.7U/6.3V_6
<30,43> DGPU_PR_EN PC148 PC147 PC143 PC144 PC140 PC142 PC150
24K/F_4 +VGACORE +/- 5%
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
*4.7U/25V_8
8232VDD
D D Countinue current:20A
8232PG
8232EN
<18> PX_MODE PR178 0_4 G G
8232UGATE 4 8232UGATE4
PC151 PD16 S S Peak current:23A
PR161 0.47U/6.3V_4 *RB501V-40
+3V_DELAY OCP minimum 33A
1
2
3
1
2
3
2 18232BOOT_1 PQ38 PQ37
21
12
15
*10K/F_4 +5VS5
3
AON6414AL AON6414AL
8232G0 19 PC146 +VGA_CORE
EN/MODE
UGATE
PAD
PGOOD
VDD
<15> GFX_CORE_CNTRL0
B G0
13 8232BOOTPR182 PL27 B
8232G1 BOOT 0.36U28A(ETQP4LR36AFC)
18
<15> GFX_CORE_CNTRL1 G1
14
2.2_6
8232PHASE 0.1U/25V_4 600 mils
8232G2 PHASE
PR162 17 G2 PR158 PR248
20 8232TON +VIN_VGA
+3V_DELAY TON
5
+2VREFO 4 PU12 360K/F_4 PR180 *0_2/S
*10K/F_4 REFO
1
PC153 11 8232LGATE D D 2.2_6
RT8232AZ LGATE + + +
<15> GFX_CORE_CNTRL2 G G
2 8232FB 4 8232LGATE4 PC238 PC241 PC240 PC179
0.22U/6.3V_4 FB S S
0.1U/10V_4
390U/2.5V_6X5.8ESR10
390U/2.5V_6X5.8ESR10
390U/2.5V_6X5.8ESR10
PR163
2
PR186 8232REFIN 5 8232CS
+3V_DELAY 16
1
2
3
1
2
3
REFIN CS PQ39 PQ41 PC149
*10K/F_4 49.9K/F_4
2200P/50V_4
PC162 AON6784 AON6784
D2
D1
D0
S2
S1
100P/50V_4
PR167
PR193 56K/F_4
6
VSETD0 10
30K/F_4
thames xt PWRCNTL2 PWRCNTL1 PWRCNTL0 V-CORE RDSon=3.5m ohm
VSETD2
VSETD1
VSETS1
VSETS2
PR197
L 0 0 0 1.0V 9.09K/F_4
PR199
M 0 0 1 0.9V 3.3K/F_4
PR196
PR195
2.05K/F_4
H 0 1 0 0.875V 3.65K/F_4 PR198
1.87K/F_4
0 1 1 0.85V
C C
1 0 0 0.8V
1 0 1 0.75V
D D
PROJECT : R33
Custom +VGACORE (RT8208/1.8V) 1A
NB5
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3V
+3V
43
<2,6,7,8,9,10,12,13,14,18,23,24,25,27,28,29,30,31,32,33,39,40,42>
+1.0V/0.935V +/- 5% +VIN <23,34,35,36,37,38,39,41,42>
2
+1.8V <4,7,10,38>
PJP6
*POWER_JP/S
Countinue current:2A +3VS5 <2,6,7,8,9,10,23,33,35,38,39,42>
+5VS5 <10,28,35,36,37,38,39,40,41,42>
Peak current:3A +3V_VGA <18>
1
+3VPCU_1.0VGA
A +12VALW <32,34,39> A
PC175 PR208
OCP minimum 4.5A +1.5VSUS <2,4,10,12,13,37>
+1.5V_VGA <18,20,21,22>
+1.0V_VGA +1.8V_VGA <15,16,18,19>
PC170 PC165
*2.2_6 +3V_DELAY <15,17,18,42>
*2200P/50V_4
10U/6.3V_8
0.1U/10V_4
+VGA_CORE <18,42>
PU14 G5193
2
16 VIN PH 10
+1.0V_VGA_S2 PR211
PL28
1
2 12 G5173_PH_1.0VGA
VIN PH PC239 MMD-05CZ-1R0M/7A
G5173EN_1.0VGA 15 PR247
PR206 9.1K_4 13
<9> DGPU_PWR_EN EN BOOT PR210
1.0_VFBVGAJP
PR205 2.2_6
14 6 0.1U/10V_4 *0_2/S
<30,42> DGPU_PR_EN <9,18,30,42> DGPU_PWROK PW RGD VSNS
0_4
G5173COMP_1.0VGA
R1
7 3 PC178 PC180 PC177
PC172 COMP GND PR203 PC171
0.1U/10V_4
10U/6.3V_8
10U/6.3V_8
*82P/50V_4
0.47U/6.3V_4 G5173RT_1.0VGA 8 4 2.15K/F_4
RT/CLK GND
PAD
PAD
PAD
PAD
PAD
PAD
G5173SS_1.0VGA
9 SS 5 G5173-1.0VFBVGA
PR207 PR209 AGND
20K/F_4
182K/F_4
22
21
20
19
18
17
PC173 R2 PR204
*100P/50V_4
PC176 10.2K/F_4
0.01U/50V_4
PC174
470P/50V_4
B
V0=0.827*(R1+R2)/R2 B
Symour-XT Voltage level R1 Value R1 P/N
17W 1.0V 2.15K CS22152FB07
25W 0.935V 1.37K CS21372FB19
+1.8V
+12VALW
+1.8V_VGA +1.5VSUS
+1.5V_VGA +12VALW
+VIN
8
7
6
5
PR185 PQ40 PC163
PR175 1M_4 QM3002N3 +VIN PC245
0.1U/10V_4
5
*22_8 PR250 PR217
0.1U/10V_4
PR191 1.8VGFX_OND 4 *22_8 1M_4 D
1M_4 G
3
PQ33 PQ42 1.5V_OND 4

*2N7002K 2N7002K 1.5A PR219 S
3
2
1
3
+1.8V_VGA +1.8V 1M_4 PQ58
(5A )
1
2
3
2 2 *2N7002K PQ57
C PC168 PC188 RJK0392DPA +1.5V_VGA C
PL26
3
PQ56 0.01U/16V_4 1.5V_ONG
0.01U/16V_4
2 2
2N7002K *80/5A
3
PR189
1
DGPU_PR_EN 2 1M_4 PC237 PC236 PC235 PQ46

PR188 33K/F_4 0.1U/10V_4 0.1U/10V_4 PR218 2N7002K PC248 PC249 PC250
*10U/6.3V_6
1
1M_4
0.1U/10V_4
*10U/6.3V_6
*10U/6.3V_6
PC159
0.47U/6.3V_4 1.8VGFX_ONG PQ45
1
1
PDTC144EU
+12VALW
+3V_VGA
+3VS5
+VIN PR221 *0_4
<42> 8232EN
PR166
1
2
5
6
PR85 1M_4
*22_8 PC86
PR190 3VGFX_OND 3 0.1U/10V_4
1M_4 DGPU_PR_EN PR220 R234 0_4 PX_MODE1 PX_MODE1 <18>
3
PQ6 PQ34 PQ14

*2N7002K 2N7002K QM3002V 0.06A +3V 30K/F_4
4
+3V_VGA PC191
2 2 0.47U/6.3V_4
PC137 PR99
3
PQ35 0.01U/16V_4
*0_8
2N7002K
PR187 PC53 PC49 PC85
1
D DGPU_PWR_EN 1M_4 0.1U/10V_4 0.1U/10V_4 D

*10U/6.3V_6
2
PR176 0_4
3VGFX_ONG
1
PROJECT : R33
Custom +VGACORE (RT8208/1.8V)
NB5 1A
1 2 3 4 5 6 7 8
www.s-manuals.com

Quanta r33 R1a 20110831 Schematics PDF

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Quanta r33 R1a 20110831 Schematics PDF

Uploaded by

Copyright:

Available Formats

1 2 3 4 5 6 7 8

R33 INTEL UMA/DISCRETE SYSTEM DIAGRAM 01

PG.38 SODIMM1 DDR3 INTEL

PG.34 128Mx16x8,128bit PG.21~22

RTL8105EH BT COMBO PORT10 PG.28 PG.23

CODEC HP/MIC BOT

Ivy Bridge Processor (DMI,PEG,FDI)

PCI EXPRESS* - GRAPHICS

<6> FDI_TXN3 FDI0_TX#[3] PEG_RX[6]

JTAG & BPM

R41 *0_4/S PM_DRAM_PWRGD_C

FDI_FSYNC can gang all these 4

Ivy Bridge Processor (DDR3) 03

DDR SYSTEM MEMORY B

Ivy Bridge_rPGA_2DPC_Rev0p61 Ivy Bridge_rPGA_2DPC_Rev0p61

SNB: 55A +VCC_CORE

SNB: 8.5A 22uF_8 x2 Socket TOP cavity U22G

PEG AND DDR

DDR3 -1.5V RAILS

Y35 VCC51 AH21 VAXG51 VCCSA4 J26

*22U/6.3VS_8 *22U/6.3VS_8 22U/6.3VS_8 H_CPU_SVIDALRT# +1.8V

AN16 VSS40 VSS121 AE9 L1 VSS198 VSS271 B13 F24 RSVD9

Ivy Bridge_rPGA_2DPC_Rev0p61 Ivy Bridge_rPGA_2DPC_Rev0p61

CFG[6:5] (PCIE Port Bifurcation Straps)

CFG4 CFG4 R185 *1K_4

Digital Display Interface

A18 DSWVREN AF40

System Power Management

CLKRUN# R535 8.2K_4 U29 3

TP50 PCH_JTAG_TMS H7 Y11

PCH_JTAG_TDI_R K5 Y10 SATA_COMP R299 37.4/F_4

P3 R517 10K_4 +3V +5V R590 10K_4

[Need external pull-down for LPC BIOS] 3 W P# VSS 4

Intel Anti-Theft HDD protection Vender Size P/N

0 = Default (weak pull-down 20K) Size Document Number Rev

PCI_PIRQC# H38 L30 <26> CLK_PCIE_CARDP CLK_PCH_CARD2P AA47

DGPU_SELECT# C44 C30 (+3V)

<13,30,33> MBCLK2 1 3 SMB_ME1_CLK CLK_PCH_ITPN Remove Ra, Rb for UMA &

+3V +3VS5 CLK_PCIE_REQ3# R495 10K_4

*TC7SH08FU R251 R308 2.2K_4 +3VS5

CLK_BUF_DREFSSCLK# R290 10K_4 <14> CLK_PCIE_VGA# RP7 2 1 CLK_PCH_PEGAN

<30> PCI_SERR# R252 *0_4/S S_GPIO

BMBUSY# / GPIO0 TACH4 / GPIO68 C40 GPIO68 R574 10K_4 +3V

A4 VSS_NCTF_1 VSS_NCTF_19 BJ4

A44 VSS_NCTF_2 VSS_NCTF_20 BJ44

A45 BJ45 +3VS5

BD1 VSS_NCTF_9 VSS_NCTF_27 D1

BD49 VSS_NCTF_10 VSS_NCTF_28 D49

<8> BOARD_ID3 BOARD_ID3

BOARD_ID5 BOARD_ID4 BOARD_ID3 BOARD_ID2 BOARD_ID1 BOARD_ID0

U32J POWER +1.05V_VCCUSBCORE +1.05V 1.3 A (60mils) *HCB1608KF-181T15/1.5A_6

Clock and Miscellaneous

VCCAPLLSATA AK1 AU20 VCCDMI[2]

BJ8 L56 +1.05V_VCCA_B_DPL C811 1U/6.3V_4

R601 *1/F_4 If have power noise issue then stuff it.

Cougar Point/Panther Point (GND)

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

C256 1U/6.3V_4 C738 1U/6.3V_4 SMDDR_VREF_DQ0_M3 1 3 SMDDR_VREF_DQ0_M1

C246 1U/6.3V_4 C390 1U/6.3V_4 +1.5VSUS

A C140 *10U/6.3V_6 +SMDDR_VREF_DQ0 A

C133 10U/6.3V_8 C49 0.1U/10V_4

C252 10U/6.3V_8 C48 2.2U/6.3V_6

22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 H_CPU_SVIDALRT# +1.8V