Mg# Topik Sub Topik Capaian Belajar Mahasiswa Sumber Materi

1 Building  Gain cell  Identify building block of amplifiers Sedra Chp. 6.

Blocks of  Cascode amplifier  Analyze and discuss their properties Sec. 6.1 – 6.6
amplifiers  Bias circuits  Design building blocks to meet stated
(3) specification
2 Differential  MOS differential  Use large signal and incremental LEC device Sedra Chp. 7.
Amplifiers pair models to analyze differential pairs. Sec. 7.1 – 7.3
(3)  Small signal  Explain, compare, and contrast the input,
operation of MOS output, and gain characteristics of
differential pair differential pairs as amplifiers.
 BJT Differential
pair
3 Differential  Nonideal  Use large signal and incremental LEC device Sedra Chp. 7.
Amplifiers characteristics models to analyze nonideal characteristics Sec. 7.4 – 7.5
(3)  Differential with of differential pairs. Sedra Chp. 8
active load  Explain, compare, and contrast the input, Sec. 8.8
 High frequency output, and gain characteristics of
response of differential pairs with active loads.
differential  Produce and analyse the small signal high
amplifier frequency BJT and MOSFET models
differential amplifier circuits.
4 Multistage  Two-stage CMOS  Explain, compare, and contrast the Sedra Chp. 7
Amplifiers opamps characteristics of common twotransistor Sec. 7.6 Sedra
(3)  A bipolar opamp linear amplifier building block stages. Chp. 8 Sec. 8.9-
 Wide band  Produce and analyse the small signal high 8.10
amplifiera and frequency multistage amplifier circuits.
multistage
frequency
response
5 Feedback (3)  Feedback  Explain the benefits of negative feedback. Sedra Chp. 9
structures and  Distinguish the feedback circuits and the Sec. 9.1-9.3
properties of different feedback configurations in
negative feedback amplifiers. (C2)
feedback.  Apply the two-port models to include the
 Feedback loading effect of a feedback circuit to the
topologies: shunt- main amplifier. (C3)
series, shunt-
shut, series-
series, series-
shunt.
 Two-port
modelling and the
small signal
analyses of
feedback
amplifier.
6 Feedback (3)  Analyses of  Analyse frequency response of feedback Sedra Chp. 9
feedback amplifiers. (C4) Sec. 9.4-9.7
amplifiers.
7 Feedback (3)  Loop gain and  Survey the stability of feedback amplifiers. Sedra Chp. 9
amplifier stability.  Design amplifier frequency compensation. Sec. 9.10-9.13
 Stability analyses
 Frequency
compensation
8 Operational  Two-stage  Point out what components in a circuit Sedra Chp. 10
Amplifier Opamp. affect the low frequency, midband, and Sec. 10.1-10.4
circuits (3)  Folded Cascode high frequency responses, and compute the
Amplifiers. frequency response for circuits including
 Analyses of 741 multiple low and high frequency
Opamp: DC bias poles/zeroes.
 Analyse CMOS Operational Amplifier.
 Subdivide a large analog circuits io its
simple building blocks.
 Analyse DC bias circuit of 741 opamp.
9 Operational  Analyses of 741  Produce the small signal equivalent circuits Sedra Chp. 10
Amplifier Opamp: small- of 741 opamp. Sec. 10.5-10.7
circuits (3) signal  Analyse the performance of 741 opamp.
 Analyses of 741  Describe niches in modern opamp designs.
Opamp: Gain,
Frequency
Response and
Slew rate
 Modern BJT
opamps
10 Filter and  Filter  Draw the frequency response curves of a Sedra Chp. 11
Tuned specification, low-pass active filter, a highpass active Sec. 11.1-11.2
Amplifier approximation, filter, a band-pass active filter, and a band- Sec. 11.10-11.11
and transfer stop ( notch ) filter
function  Construct, analyze, and troubleshoot an
 Filter topologies active low-pass filter, an active high-pass
and filter, a band-pass filter, or a band-stop (
implementations. notch ) filter.
 Switched-  Identify SC Filter.
capacitor Filters  Compare the frequency response
 Tuned amplifier characteristics of an ideal amplifier and a
practical tuned amplifier. (C4)
 Perform analyses to calculate the Q and
bandwidth of an amplifier. (C4)
11 Signal  Principles of  Describe the function and requirements of Sedra Chp. 12
Generators sinusoidal an oscillator. (C2) Sec. 12.1-12.3
(Oscillators) oscillators:  Describe positive feedback, how it is
and Barkhausen produced, and how it maintains oscillations
Waveform- Criterion and after an oscillator is triggered, and list
 shaping Negative requirements for proper oscillator
Circuits Resistance. operation. (C2)
 Opamp-RC  Identify, draw the circuits and calculate the
oscillators parameters for opampRC crystal oscillator
 LC, and Crystal circuits. (C3)
oscillators.
12 Signal  Multivibrators  Identify, draw the circuits and calculate the Sedra Chp. 12
Generators and IC timers parameters for LC , and crystal oscillator Sec. 12.4-12.9
(Oscillators)  Waveform- circuits. (C3)
and shaping circuits.  Analyze different types of oscillators used
Waveform- in common electronics. (C4)
shaping  Analyse and understand the operation of
Circuits wave shaping circuits. (C4)
13 Voltage and  Shunt and series  List the purpose of a voltage regulator and Floyd Chp. 17
current linear continuous Explain concept of regulation and methods
regulations voltage regulator for regulating voltage and current. (C2)
circuits.  Calculate performance parameters of a
 Voltage regulator voltage regulator, such as line regulation
circuits with and load regulation. (C3)
monolithic  Apply IC linear voltage regulator circuits to
integrated design specified output voltage levels. (C3)
circuits.
14 Voltage and  Swicthed-mode  Describe the circuit operation of a Floyd Chp. 17
current regulation: Buck buck/boost switching voltage regulator.
regulations and Boost (C2)
configurations.  Apply IC switched regulator sicyuits to
design a simple buck/boost switching
voltage regulator. (C3)
15 Circuits for  Latches and  Memories address: and sensing amplifiers, Sedra Chp. 16
digital Flipflop. row decoder, column decoder. Sec. 16.1-12.4
storage Multivibrator  Describe the structure, configuration,
elements (3) circuits. timing parameters and diagrams for
 Semiconductor memory elements. (C2)
memory types:  Explain and show the operation of latch
RAM, ROM, and circuit and flip-flop circuits and
Flash. mutivibrators: bistable, monostable,
astable. C(3)
 Explain the operation and analyses of
different types of memories. (C2)
 Explain the operation of memory
addressing circuits: sensing amplifiers, row
decoder, column decoder. (C2)