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Embedded Systems

I/O Interfacing
Embedded Systems
I/O Interfacing
Switch, LED Devices
ADC / DAC
LCD
Opto Isolator
High Power Devices Relays
OP Amps :
Adder, Subtracter, Gain , Low Pass filter,
High Pass filter, Integrator,
Differentiator, Current to Voltage Converter

Communication using RS232C , IIC ,SPI, CAN


Sensors,
Magnetic
Temperature
Pressure

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Embedded Systems
I/O Interfacing
Switch
Vcc Vcc

Active Low Active High


Active = 0 Active = 1
Idle = 1 Idle = 0
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Embedded Systems
I/O Interfacing
LED Current 15 mA ~ 20 mA
Vcc
Vcc = VR + VD
Vcc = 5V
VD = 1.5 V
R VR VR = 3.5 V

R = V / I
VD 1) R1 = 3.5 V / 15 mA

2) R2 = 3.5 V / 20 mA

R1 < R <R2
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Embedded Systems
I/O Interfacing
Switch

LED Devices Vcc Vcc


1 0

1 0

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Embedded Systems
I/O Interfacing ADC
ADC

Analog to Digital Converter

An electronic integrated circuit which transforms a signal from analog


(continuous) to digital (discrete) form.

Analog signals are directly measurable quantities.

Digital signals only have two states. For digital computer, we refer to binary
states, 0 and 1.

ADC Provides a link between the analog world of transducers and the digital
world of signal processing and data handling.

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Embedded Systems
I/O Interfacing ADC

2.5 Volts ADC 128

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Embedded Systems
I/O Interfacing ADC

0
1
ADC 1
2.5 Volts 1
1 128
1
1
1

0 Volts 00000000

5 Volts 11111111

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Embedded Systems
I/O Interfacing ADC

2 steps

 Sampling and Holding (S/H)

 Quantizing and Encoding (Q/E)


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Embedded Systems
I/O Interfacing ADC

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Embedded Systems
I/O Interfacing ADC

Sampling Pulse

Sampled Signal

Sampled and Held Signal

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Embedded Systems
I/O Interfacing ADC

Resolution:
The smallest change in analog signal that will result in a change in the
digital output.

Vr
∆V = n
2 −1
V = Reference voltage range
N = Number of bits in digital output.
2N = Number of states.
ΔV = Resolution

The resolution represents the quantization error inherent in the


conversion of the signal to digital form

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Embedded Systems
I/O Interfacing ADC
Quantization
Refers to subdividing a space into
small but measurable increments.
Partitioning the reference signal
range into a number of discrete
quanta, then matching the input
signal to the correct quantum.

Encoding:
Assigning a unique digital code
to each quantum, then allocating
the digital code to theinput signal.

The maximum quantization


error is 1/2 the increment size

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Embedded Systems
I/O Interfacing ADC

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Embedded Systems
I/O Interfacing ADC
Resolution

Resolution defines the number of possible output states

2n states

n is the number of bits of the converter


8-bit converter has 28 = 256 states
10-bit converter has 210 = 1024 states
12-bit converter has 212 = 4096 states

Higher resolution = less quantization error

Resolution defines the number of possible output

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Embedded Systems
I/O Interfacing ADC
ADC DAC Errors

• Linear Error

• Offset Error

• Gain Error

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Embedded Systems
I/O Interfacing ADC
Types of A-D convertor

Successive Approximation A/D Converter

Dual Slope A/D Converter

Flash A/D Converter

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Embedded Systems
ADC SAR

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Embedded Systems
ADC SAR

•Uses a n-bit DAC to compare DAC and original analog results.


•Uses Successive Approximation Register (SAR) supplies an approximate
digital code to DAC of Vin.
•Comparison changes digital output to bring it closer to the input value.
•Uses Closed-Loop Feedback Conversion
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Embedded Systems
ADC SAR

Process
1. MSB initialized as 1
2. Convert digital value to analog using DAC
3. Compares guess to analog input
4., Is Vin>VDAC
• Set bit 1
• If no, bit is 0 and test next bit

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Embedded Systems
ADC :SAR

Advantages Dis Advantages


Capable of high speed Higher resolution successive
and reliable approximation ADC’s will be slower
Medium accuracy Speed limited to ~5Msps
compared to other ADC types
Good tradeoff between
speed and cost

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Embedded Systems
ADC :Dual Slope

Dual Slope A/D Converter

Fundamental components

 Integrator
 Electronically Controlled Switches
 Counter
 Clock
 Control Logic
 Comparator

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Embedded Systems
ADC Dual Slope

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Embedded Systems
ADC Dual Slope

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Embedded Systems
ADC Dual Slope

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Embedded Systems
ADC Dual Slope

Advantages Dis Advantages


Conversion result is Slow
insensitive to errors in the
component values.
Fewer adverse affects from Accuracy is dependent on the
“noise” use of precision external
components
High Accuracy Cost

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Embedded Systems
AD: Flash

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Embedded Systems
AD: Flash

• Uses the 2N resistors to form a ladder voltage divider, which


divides the reference voltage into 2N equal intervals.

• Uses the 2N-1 comparators to determine in which of these 2N


voltage intervals the input voltage Vin lies.

• The Combinational logic then translates the information


provided by the output of the comparators

• This ADC does not require a clock so the conversion time is


essentially set by the settling time of the comparators and the
propagation time of the combinational logic.

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Embedded Systems
AD: Flash

Advantages Dis Advantages


Very Fast (Fastest) Expensive
Very simple Prone to produce
operational theory glitches in the output
Speed is only limited Each additional bit
by gate and of resolution
comparator requires twice the
propagation delay comparators.

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Embedded Systems
ADC : Comparison
Type Speed (relative) Cost (relative)
Dual Slope Slow Med
Successive Appox Medium – Fast Low
Flash Very Fast High

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Embedded Systems
I/O Interfacing DAC

Resistor Ladder D/A Convertor

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Embedded Systems
I/O Interfacing DAC

The Weighted Resistor D/A Converter

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Embedded Systems
I/O Interfacing DAC

The R/2R D/A Converter

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Embedded Systems
I/O Interfacing DAC

The R/2R D/A Converter Calculations


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Embedded Systems
I/O Interfacing : LCD

Built in Controller + Driver Chips


Driver Chips

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Embedded Systems
I/O Interfacing : LCD

Hitachi HD47780

1 Line * 8 Char
.
.
4 Line * 40 Char

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Embedded Systems
I/O Interfacing : LCD
Function Write D7 D6 D5 D4 D3 D2 D1 D0 Wait Time
Clear Display Instruction 0 0 0 0 0 0 0 1 5 ms
Cursor Home Instruction 0 0 0 0 0 0 1 N/A 5ms
Entry Mode Instruction 0 0 0 0 0 1 I/D S 120 µs
Display On/Off Instruction 0 0 0 0 1 D C B 120µs
Cursor &
0 0 0 1 S/c R/L N/A N/A
Display Shift Instruction 120µs
Function Set Instruction 0 0 1 DL N F N/A N/A 120 µs
Set Cursor
1 A A A A A A A
Address Instruction 121 µs
Write Data to D D D D D D D D
Cursor Location Data 122 µs
• I/D = 1 (increment) , I/D = 0 (decrement)
• S = 1 (accompanies display shift)
• D = display, C = cursor, B = blink (ON = 1, OFF = 0)
• S/C = 1 (display shift), S/C = 0 (cursor move)
• R/L = 1 (shift right), R/L = 0 (shift left)
• DL = 1 (8 bit data), DL = 0 (4 bit data)
• N = 1 (2 line display), N = 0 (1 line display)
• F = 1 (5 X 10 dots, 1 line display only), F = 2 (5 X 7 dots)

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Embedded Systems
I/O Interfacing : Opto Isolator
Also Known as Optocoupler

A Semiconductor device that allows signals to be transferred


between circuits or systems, while keeping those circuits or systems
electrically isolated from each other.

Simplest Form
Transmitter Receiver
LED , IRED , Laser Photo Sensor
converts electrical signal into Converts the modulated light
a beam of modulated visible or IR back into an electrical
light or infrared (IR). signal

Input to Output Amplitude (Signal Strength) may change but,


Waveform (Frequency) will remain the same.

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Embedded Systems
I/O Interfacing : Opto Isolator

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Embedded Systems
I/O Interfacing : Opto Isolator

MCT 2 E

High-Voltage Electrical Isolation . . .


MCT2 1.5-kV, or MCT2E3.55-kV Rating
6 pin Dual-In-Line Package
High-Speed Switching:
T r = 5 µs, T f = 5 µs Typical

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Embedded Systems
I/O Interfacing : Opto Isolator

4 pin DIP
Viso ` 5000V

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Embedded Systems
I/O Interfacing Relay

Mechanical

Low Power Circuit Controls a High Power Circuit


Electrically operated Switch
Relays use an electromagnet to operate a switching mechanism mechanically
complete electrical isolation between control and controlled circuits
For Higher Power Control One uses a Contactor

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Embedded Systems
I/O Interfacing Low Loads

Vcc = 5 V
LED Current = 18 mA
R = 100 Ω
Device can C
Source / Sink 2 mA
B
E
R=?

I/O Interfacing

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Embedded Systems
I/O Interfacing Relay

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Embedded Systems
I/O Interfacing Relay
Solid-state relays
control power circuits with no moving parts
Using a semiconductor device to perform switching
The relay may be designed to switch either AC or DC to the load
Generally Opto Isolated

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Embedded Systems
I/O Interfacing Relay

Solid State Relay


Advantages
SSRs are faster than electromechanical relays; the order of
microseconds to milliseconds
Increased lifetime, particularly if activated many times,
as there are no moving parts to wear
Output resistance remains constant regardless of amount of use
Clean, bounce less operation
Decreased electrical noise when switching
No sparking, allowing use in explosive environments where it is critical that
no spark is generated during switching
Totally silent operation
Much less sensitive to storage and operating environment factors such
as mechanical shock, vibration, humidity, and external magnetic fields.

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Embedded Systems
I/O Interfacing CAN
Controller Area Network
Peer stations (controllers, sensors and actuators) are connected via a serial bus

CAN protocol, which corresponds to the data link layer

CAN network protocol detects and corrects transmission errors caused by


electromagnetic interference.

Easy to configure
Possibility of central diagnosis

Station / Node does not have an identity or Address


but Message Content has an Identity and priority

Content Oriented Addressing Scheme

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Embedded Systems
I/O Interfacing CAN

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Embedded Systems
I/O Interfacing CAN

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Embedded Systems
I/O Interfacing CAN

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Embedded Systems
I/O Interfacing CAN
Controller Area Network Protocol

• Make Ready

• Send Message

• Receive Message

• Select

• Accept

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Embedded Systems
I/O Interfacing CAN
Controller Area Network Protocol

SOF(1) Start of Frame Identifier Address 11 bits / 29 Bits


RTR (1) Remote transmission request (0) IDE (1) Standard / Extended
Ro (1) Reserved Bit DLC (4) Num of Data Bytes in Data Field
CRC (15) Frame Security Check CRC( D) 1 Recessive
ACK (2) Slot (0)/ Delim (1) EOF (7) End of Frame
Int (3) Intermission (Must be 1)

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Embedded Systems
I/O Interfacing CAN
Controller Area Network Protocol

Non-destructive bitwise arbitration


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Embedded Systems
I/O Interfacing CAN
Controller Area Network Protocol
Detecting and signaling errors.

Error Detection Message Level


• Cyclic Redundancy Check (CRC)

• Frame Check
• Format Errors

• ACK Errors
• transmission Error Detected by receipents
• Ack Field Corrupted
• No Receivers

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Embedded Systems
I/O Interfacing CAN
Controller Area Network Protocol
Detecting and signaling errors.

Error Detection Bit Level

• Monitoring
• Node Transmits and Observes Bus Signal
• Detect Global and Tx errors

• Bit Stuffing
• After 5 Similar Bits + 1 Complimentary Bit Txed
• Rx removes the Bit
• Rx sends Error Flag

Tx may try to resend error Msgs after23 bit periods

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Embedded Systems
I/O Interfacing CAN

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Embedded Systems
I/O Interfacing CAN
CAN implements
a traffic-dependent bus allocation system
• non-destructive bus access
• decentralized bus access control
• high useful data rate at the

The efficiency of the bus arbitration procedure is increased by the fact that the
bus is utilized only by those stations with pending transmission requests.

These requests are handled in the order of the importance of the messages for
the system as a whole.

This proves especially advantageous in overload situations.

Since bus access is prioritized on the basis of the messages, it is possible to


guarantee low individual latency times in real-time systems.

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Embedded Systems
I/O Interfacing RS 232 C

Describes the physical interface and protocol for relatively low-speed serial data
communication between computers and related devices.

EIA 232 (Electronics Industry Association)

Controlled by USART or UART Chip (Intel 8251)

Valid signal range of +3 to +15 volts, and -3 to -15 volts;


the range between -3 to +3 volts is not a valid

1 - -ve Voltage Marking


0 +ve Voltage Spacing

Ref To Douglas Hall

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Embedded Systems
I/O Interfacing RS 232 C

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Embedded Systems
I/O Interfacing RS 232 C

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Embedded Systems
I/O Interfacing SPI (Serial Peripheral Interface)
SPI bus is a synchronous serial data link standard

Named by Motorola

Operates in full duplex mode.

Devices communicate in master/slave mode


master device initiates the data frame.

Multiple slave devices are allowed with individual slave select (chip select) lines.

Sometimes SPI is called a four-wire serial bus

SPI is often referred to as SSI (Synchronous Serial Interface).

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Embedded Systems
I/O Interfacing SPI
The SPI bus specifies four logic signals:

SCLK: serial clock (output from master);


MOSI; SIMO: master output, slave input (output from master);
MISO; SOMI: master input, slave output (output from slave);
SS: slave select (active low, output from master)

Alternative naming conventions are also widely used:


SCK; CLK: serial clock (output from master)
SDI; DI, DIN, SI: serial data in; data in, serial in
SDO; DO, DOUT, SO: serial data out; data out, serial out
nCS, CS, CSB, CSN, nSS, STE: chip select, slave transmit enable
(active low, output from master)

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Embedded Systems
I/O Interfacing SPI

1 Chip Select per Slave


Centralised Bus Master

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Embedded Systems
I/O Interfacing SPI

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Embedded Systems
I/O Interfacing SPI

Master Clock Serves as synchronization of the data communication

4 Modes on Operation Based on


• clock polarity (CPOL)
• clock phase (CPHA)

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Embedded Systems
I/O Interfacing SPI

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Embedded Systems
I/O Interfacing I2C (Philips)
• Two-wired bus

• originally to interact within small num. of devs (radio/TV tuning, …)

• speeds:
– 100 kbps (standard mode)
– 400 kbps (fast mode)
– 3.4 Mbps (high-speed mode)

• data transfers: serial, 8-bit oriented, bi-directional

• master/slave relationships with multi-master option (arbitration)

• master can operate as transmitter or receiver

• addressing: 7bit or 10bit unique addresses

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Embedded Systems
I/O Interfacing I2C

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Embedded Systems
I/O Interfacing I2C
I2C Bit Transfer
• two-wired bus
– serial data line (SDA)
– serial clock line (SCL)
• voltage levels
– HIGH 1
– LOW 0
– not fixed, depends on associated level of voltage
• bit transfer (level triggered)
– SCL = 1 SDA = valid data
– one clock pulse per data bit
– stable data during high clocks
– data change during low clock

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Embedded Systems
I/O Interfacing I2C

Frames

• start condition (S)


– SDA 10 transition when SCL = 1

• stop condition (P)


– SDA 01 transition when SCL = 1

• repeated start (Sr)


– start is generated instead of stop

• bus state
– busy … after S and before next P
– free … after P and before next S

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Embedded Systems
I/O Interfacing I2C

• Master sets SCL = 0 and generates pulse for each data bit
• 8 pulses for data bits are followed by one pulse for ack. bit
• after ack.
– master tries to generate next byte’s first pulse
– slave can hold SCL low master switches to wait state

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Embedded Systems
I/O Interfacing I2C
Addressing by 7 bits

• the first byte transmitted by master:


– 7 bits: address
– 1 bit: direction (R/W)
0 … master writes data (W), becomes transmitter
1 … master reads data (R), becomes receiver

• data transfer terminated by stop condition

• master may generate repeated start and address another device

• each device listens to address

– address matches its own device switches state according to R/W bit

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Embedded Systems
I/O Interfacing I2C

Master-transmitter

Master-receiver (since second byte)

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Embedded Systems
I/O Interfacing I2C

Acknowledge
• Acknowledge Done on the 9th clock pulse and is mandatory
• Transmitter releases the SDA line
• Receiver pulls down the SDA line (SCL must be HIGH)
• Transfer is aborted if no acknowledge

Clock Stretching
• Clock Stretching-Slave device can hold the CLOCK line LOW when
performing other functions
• Master can slow down the clock to accommodate slow slaves

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Embedded Systems
I/O Interfacing OpAmps

Ideal OpAmp

• The current flow into the input leads of the op amp is zero.
• The op amp gain is assumed to be infinite.
• The voltage between the input leads is zero
• The input impedance of the op amp is infinite.
• The output impedance of the ideal op amp is zero
• The frequency response of the ideal op amp is flat

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Embedded Systems
I/O Interfacing OpAmps

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Embedded Systems
Inverting OpAmps

Inverting Amplifier

Non Inverting I/p Grounded


-ve FeedBack Provided by R2
Current in input is Zero

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Embedded Systems
Non Inverting OpAmps

Non Inverting Amplifier

VIN- = VIN+

Unity Buffer Voltage Follower

Rg is very Large

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Embedded Systems
OpAmps ADDER

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Embedded Systems
I/O Interfacing OpAmps
Integrator Low Pass Filter

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Embedded Systems
I/O Interfacing
Differentiator High Pass Filter

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Embedded Systems
I/O Interfacing ADC

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Embedded Systems
I/O Interfacing

Freq = f
Time = t = 1/f

T OFF = t / 2 T ON = t / 2

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