Digital Logic Design Lab

DEPARTMENT OF ELECTRICAL ENGINEERING

LAB BROCHURE
DIGITAL LOGIC DESIGN LABORATORY

CONTENTS

Lab Venue ...................................................................................................................... 3

Lab Objectives & Courses ............................................................................................. 3
Lab Description & Experiments ..................................................................................... 4
Hardware Experiments ..................................................................................................
5
Verilog Experiments .......................................................................................................
6
Lab Resources ............................................................................................................... 7

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DIGITAL LOGIC DESIGN LABORATORY
Objectives & Courses
Lab Venue
The Digital Logic Design Lab
(DLD Lab) is one of the most
important and well equipped lab of
the Department of Electrical
Engineering at University of
Engineering and Technology, Lahore.
This lab is conducted at the
Computer Interfacing Lab situated at
the first floor of the Electrical
Engineering Department.
Scope of the Lab
The DLD Lab is for
undergraduate coursework related to
the course EE131. It is one of the
core modules of B. Sc. Electrical
Engineering therefore the lab has a
significant importance in the
department.
Related Courses
This lab is designed such that the
students get a hands on familiarity
with the concepts they come across
in the course EE131 that is the Digital
Systems course. This is an
undergraduate course which deals
with the basics of digital systems
design and is a core module of the
B. Sc. Electrical Engineering
coursework as it provides the
prerequisites for advance courses in
digital electronics. Because of the
significance of this course the DLD
Lab has been carefully designed to
meet the course requirement.
DLD Lab Venue:
Computer Interfacing Lab
First Floor, Electrical Department
Brief Overview of the Lab
The Lab is well equipped with
both hardware and software facilities
required by the students to perform
the necessary experiments designed
for this lab. Details of the lab
equipment has been discussed in a
proceeding section.
Experiments are designed in
such a way that the students become
well aware of the concepts they learn
in the theory sessions. A list of
experiments that are conducted in
this lab has also been mentioned in a
proceeding section.
Experiments are related to both
digital hardware and Verilog
Programming.
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DIGITAL LOGIC DESIGN LABORATORY
Lab Description & Experiments
Lab Description
The Experiments in the
Lab have been divided into
two major portions:
• Hardware Labs
• Hardware Description
Language (Verilog) Labs
Hardware Labs have
been designed to
familiarize students with the
Combinational Digital Logic
Design and Sequential
Digital Logic Design
through the implementation
of Digital Logic Circuits
using ICs of basic logic
gates and some simple
digital logic circuits.
HDL (Verilog) Labs have
been designed to
familiarize students with the
HDL based Digital Design
Flow. These labs introduce
students with different
levels of coding available in
Verilog i.e. Gate level,
Dataflow level and
Behavioral level. Xilinx ISE
7.1 tools have been used in
these labs. Finally, the
skills learnt in the HDL
A Lab Demonstration
labs are employed to
implement some digital
logic circuits on Spartan-3
FPGA, using Xilinx Starter
Kit Development Board.
List of Experiments
List of experiments is
given on page 5 and 6. As
Expected Outcomes mentioned before the lab
With the help of the two
has two major portions
threads of the lab
therefore there are two lists
mentioned above, students
of experiments one related
will have clear
to the hardware labs and
understanding of all the
the other related to the
three paradigms of
hardware description
implementation of digital
language (verilog) labs. All
logic circuits:
these experiments are
• Implementation using
mandatory and each lab is
ICs for basic logic gates
followed by specially
and simple circuits
designed assignments.
• Implementation
through the Development
of Dedicated IC(ASIC)
• Implementation
through Reconfigurable
Logic (i.e. FPGA)
This makes students
adept in basic concepts
involved in digital logic
design. The lab contributes
a lot to the basic learning of
digital systems.
This shows the
indispensability of the
DLD Lab.
A Digital Chip (inside view)
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DIGITAL LOGIC DESIGN LABORATORY

Hardware Experiments
TITLE TOPICS
1 To Verify the Behavior of Logic Gates using Truth Table and Basic Logic Gates,
Familiarization with Digital Integrated Circuits Truth Table,
Integrated Circuits

2 Implementation of Boolean Function using Logic Gates Boolean Functions,

and Introduction to Hierarchical Design of Digital Logic Circuits Boolean Algebra,
Hierarchical Design of Digital Logic Circuits

3 Familiarization with the Different Portions of the Datasheet for Datasheet of a Digital Logic IC,
a Digital IC and Using the Datasheet to Gather Relevant Hierarchical Design of Digital Logic Circuits
Information to Utilize the IC as a Component in another Digital
Logic Circuit

4 Implementation of 8 bit Binary Comparator using 4 bit Binary Binary Comparator,

Comparators Hierarchical Design of Digital Logic Circuits

5 Implementation of 4bit into 3bit Binary Multiplier using 4bit Binary Multiplication,
Binary Adders Hierarchical Design of Digital Logic Circuits

6 Implementation of BCD Adder using 4bit Binary Adders, 4 to 7 BCD addition,

Segment Decoder and 2Digit 7 Segment Display Hierarchical Design of Digital Logic Circuits

7 Implementing a Full Adder using Implementation of Boolean function using

(a) Decoder Decoder,
(b) Multiplexer Implementation of Boolean function using
Multiplexer

8 Flip Flops Different Types of Flip Flops

9 To study the fundamentals of basic counters and to construct Counters

various types of counters

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DIGITAL LOGIC DESIGN LABORATORY

Verilog Experiments
TITLE TOPICS
1 Introduction to HDL based Digital Design Methodology HDL based Digital Design Flow using
Verilog,
Introduction to Outsourcing Business Model

2 Introduction to Basic Syntax of Verilog and Gate level Basic Concepts of Verilog, Modules and
Modeling Ports, Gatelevel coding in Verilog,
through implementation of half adder at gate level and its
simulation using Xilinx ISE tools

3 Introduction to the concepts of Instantiation and Hierarchical Hierarchical Design in Verilog

Design in Verilog through the implementation of full adder
using the previously designed half adder modules

4 Introduction to the Concept of Vectors and Introduction to Vectors in Verilog,

Dataflow modeling through implementation of half adder and Dataflow level coding in Verilog
full adder at dataflow level

5 Consolidation of the concepts of Dataflow level modeling and Dataflow level coding in Verilog, Logic
Introduction to the concept of Synthesis by the CAD tool Synthesis

6 Introduction to Behavioral modeling through implementation of Behavioral level coding in Verilog

half adder and full adder at behavioral level.

7 Introduction to if else statement and case statement in if else and case statements in Verilog
Behavioral modeling through implementation of Multiplexer

8 Introduction to the Concepts of Sequential Circuit and Sequential circuits in Verilog, Concept of
a TestBench module (Stimulus Block) Testbench module in Verilog

9 Behavioral Level Coding of Basic Sequential Circuits and Sequential circuits in Verilog
Consolidation of the concepts of TestBench module (Stimulus
Block)

10 Introduction to Field Programmable Gate Array(FPGA) and Need for Reconfigurable Logic, Xilinx ISE
Steps involved in its Programming Tools for Programming the Xilinx FPGAs

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DIGITAL LOGIC DESIGN LABORATORY
Lab Resources
Hardware Resources
The lab is fully
equipped with all the
hardware required to
conduct the above
mentioned experiments.
The hardware resources of
the lab are:
• Pentium-IV PCs (with
MS WinXp OS)
• Hardware trainers for
logic circuit design and
analysis
• Electronic Chips of all
digital gates
• Spartan-III FPGA
board kits
• Power Supplies
These resources allow
the students to have a
hands on experience of
basic digital logic design
concepts. This activity
greatly leverages what the
students learn in the theory
sessions.
Software Resources
The lab also consists of
the software resources
required by the students
namely:
A Digital Circuit Board them strengthen their
• Veriwell concepts.
• ModelSim
Software resources are Lab Staff
• Xilinx IDE
equally important as Like other labs of the
• Matlab
hardware resources are. department there is a
These software resources trained and able staff
are sufficient for the consisting of skilled lab
students to perform technicians that take care
experiments. These of the lab equipment.
softwares provide the They also guide
students with the students about handling
necessary platform to work the lab equipment and the
on HDL that is the Verilog. precautionary measures
These softwares are also required for the students
required to work with the while working in the lab.
sophisticated hardwares
like Spartan-III FPGA
boards.
The lab has all the
resources whether related
to hardware or software so
that the students become
adept in the basic field of
digital electronics.
Students are
encouraged to use the lab
resources to perform
activities and
experiments which help A Simulation
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DIGITAL LOGIC DESIGN LAB
Computer Interfacing Lab
1st Floor, Department of Electrical Engineering
UNIVERSITY OF ENGINEERING & TECHNOLOGY, LAHORE-54890,
PAKISTAN.
Ph: + 92 42 9029229, Fax: + 92 42 9250224
url: www.uet.edu.pk