You are on page 1of 10

Which of the following is a type of error associated with digital-to-analog converters (DACs)?

A. nonmonotonic error

B. incorrect output codes

C. offset error

D. nonmonotonic and offset error


Answer: Option D

A 4-bit R/2R digital-to-analog (DAC) converter has a reference of 5 volts. What is the analog
output for the input code 0101.
A. 0.3125 V

B. 3.125 V

C. 0.78125 V

D. –3.125 V
Answer: Option D

A binary-weighted digital-to-analog converter has an input resistor of 100 k . If the resistor


is connected to a 5 V source, the current through the resistor is:
A. 50 A

B. 5 mA

C. 500 A

D. 50 mA
Answer: Option A

What is the resolution of a digital-to-analog converter (DAC)?


It is the comparison between the actual output of the converter and its expected
A.
output.

It is the deviation between the ideal straight-line output and the actual output of the
B.
converter.

It is the smallest analog output change that can occur as a result of an increment in
C.
the digital input.

It is its ability to resolve between forward and reverse steps when sequenced over its
D.
entire range.
Answer: Option C
The practical use of binary-weighted digital-to-analog converters is limited to:
A. R/2R ladder D/A converters

B. 4-bit D/A converters

C. 8-bit D/A converters

D. op-amp comparators
Answer: Option C

The difference between analog voltage represented by two adjacent digital codes, or the
analog step size, is the:
A. quantization

B. accuracy

C. resolution

D. monotonicity
Answer: Option C

7. The primary disadvantage of the flash analog-to digital converter (ADC) is that:
A. it requires the input voltage to be applied to the inputs simultaneously

B. a long conversion time is required

a large number of output lines is required to simultaneously decode the input


C.
voltage

a large number of comparators is required to represent a reasonable sized binary


D.
number
Answer: Option D

A binary-weighted digital-to-analog converter has a feedback resistor, Rf, of 12 k . If 50


A of current is through the resistor, the voltage out of the circuit is:
A. 0.6 V

B. –0.6 V

C. 0.1 V

D. –0.1 V
Answer: Option B
What is the major advantage of the R/2R ladder digital-to-analog (DAC), as compared to a
binary-weighted digital-to-analog DAC converter?
A. It only uses two different resistor values.

B. It has fewer parts for the same number of inputs.

C. Its operation is much easier to analyze.

The virtual ground is eliminated and the circuit is therefore easier to understand and
D.
troubleshoot.
Answer: Option A

The resolution of a 0–5 V 6-bit digital-to-analog converter (DAC) is:


A. 63%

B. 64%

C. 1.56%

D. 15.6%
Answer: Option C

In a flash analog-to-digital converter, the output of each comparator is connected to an


input of a:
A. decoder

B. priority encoder

C. multiplexer

D. demultiplexer
Answer: Option B

Which is not an analog-to-digital (ADC) conversion error?


A. differential nonlinearity

B. missing code

C. incorrect code

D. offset
Answer: Option A
. Sample-and-hold circuits in analog-to digital converters (ADCs) are designed to:
A. sample and hold the output of the binary counter during the conversion process

B. stabilize the comparator's threshold voltage during the conversion process

C. stabilize the input analog signal during the conversion process

sample and hold the D/A converter staircase waveform during the conversion
D.
process
Answer: Option C

Pulse width modulator is a type of

A. ADC
B. DAC
C. AAC
D. DDC

: A measurement of maximum speed at which DACs circuitry can


operate and still produce correct output is called

A. maximum sampling rate


B. minimum sampling rate
C. maximum summation rate
D. minimum summation rate

a
An ideal DAC converts abstract numbers into a conceptual sequence
of

A. impulses
B. signals
C. quantizations
D. summations

A measurement of difference between largest and smallest signals


DAC is referred as

A. dynamic range
B. static range
C. determinant range
D. stable range

2. Non-linearity in the output of converter is expressed in


a) None of the mentioned
b) Percentage of reference voltage
c) Percentage of resolution
d) Percentage of full scale voltage
View Answer
Answer: d
Explanation: Non-linearity is the measure of deviation of actual output (ε) from the ideal straight
line output (△). Therefore, it is expressed as percentage of full scale voltage (ε/△).
3. A binary input 000 is fed to a 3bit DAC/ADC. The resultant output is 101. Find the type of
error?
a) Settling error
b) Gain error
c) Offset error
d) Linearity error
View Answer
Answer: c
Explanation: Offset error implies that the output of the DAC is not zero when the binary inputs
are all zero.

4. How many equal intervals are present in a 14-bit D-A converter?


a)16383
b)4095
c)65535
d)1023
View Answer
Answer: a
Explanation: A 14-bit D-A converter has 2n-1 equal interval =214-1=16384-1=16383.

5. Resolution of a 6 bit DAC can be stated as


a) Resolution of 1 part in 63
b) 6-bit resolution
c) Resolution of 1.568% of full scale
d) All of the mentioned
View Answer
Answer: d
Explanation: Resolution of 6 bit DAC =VFS% /(2n-1) =(VFS×100)/(26-1) = 1.588% of VFS and the
number of interval is 26-1=63.
=> Thus, resolution of a 6 bit DAC can be stated as a resolution of 1 part in 63.
6. Find the resolution of a 10-bit AD converter for an input range of 10v?
a) 97.7mv
b) 9.77mv
c) 0.977mv
d) 977mv
View Answer
Answer:b
Explanation: Resolution (in volts) VFS /(2n -1)= 10 /(210 -1) =10/1023 =9.77mv.

7. A good converter exhibits a linearity error


a) Less than or equal to (1/2)LSB
b) Greater than equal to (1/2)LSB
c) Greater than or equal to (1/2)LSB
d) None of the mentioned
View Answer
Answer:d
Explanation: A good converter exhibits a linearity error of less than ±(1/2)LSB.

9. A monotonic DAC is one whose analog output increases for


a) Decreases in digital input
b) An increases in analog input
c) An increases in digital input
d) Decreases in analog input
View Answer
Answer: c
Explanation: In a DAC, the analog input is converted into digital output. So, a monotonic DAC
increases its analog output with increase in its digital output. For example, if the output
decreases when input code change from 001 to 010, it is said to be a non-monotonic DAC.
0. All the commercially available DAC are
a) Monotonic
b) Non-monotonic
c) Either monotonic or non-monotonic
d) None of the mentioned
View Answer
Answer: a
Explanation: All the commercially available DACs are monotonic because the linearity error
never exceeds ± (1/2) LSB at each output level.

11. The time taken for the output to settle within a specified band of its final value is referred
as
a) Conversion time
b) Settling time
c) Take off time
d) All of the mentioned
View Answer
Answer: b
Explanation: Settling time represents the time taken for the output to settle within a specified
band ± (1/2) LSB of its final value following a code change at the input (usually a full scale
change).

1. Question

What is the major advantage of the R/2R ladder digital-to-analog (DAC), as


compared to a binary-weighted digital-to-analog DAC converter?

• 1. It has fewer parts for the same number of inputs.


• 2. It only uses two different resistor values.
• 3. Its operation is much easier to analyze.
• 4. The virtual ground is eliminated and the circuit is therefore easier to
understand and troubleshoot.
2

What is the resolution of a digital-to-analog converter (DAC)?

• 1. It is the smallest analog output change that can occur as a result of an


increment in the digital input.
• 2. It is the deviation between the ideal straight-line output and the actual output
of the converter.
• 3. It is its ability to resolve between forward and reverse steps when sequenced
over its entire range.
• 4. It is the comparison between the actual output of the converter and its
expected output.

1
5. Question

1 points
In a flash analog-to-digital converter, the output of each comparator is connected to
an input of a:

• 1. multiplexer
• 2. priority encoder
• 3. demultiplexer
• 4. decoder

The resolution of a 0–5 V 6-bit digital-to-analog converter (DAC) is:

• 1. 1.56%
• 2. 15.6%
• 3. 64%
• 4. 63%

10. Question

1 points
Which is not an analog-to-digital (ADC) conversion error?

• 1. differential nonlinearity
• 2. incorrect code
• 3. missing code
• 4. offset

11. Question

1 points
Sample-and-hold circuits in analog-to digital converters (ADCs) are designed to:

• 1. sample and hold the output of the binary counter during the conversion
process
• 2. stabilize the comparator's threshold voltage during the conversion process
• 3. sample and hold the D/A converter staircase waveform during the conversion
process
• 4. stabilize the input analog signal during the conversion process

You might also like