Design Example Report: Title Specification Application Author Document Number Date Revision

Design Example Report
20 W Single Output, Power Factor Corrected

Title
LED Driver Using TOP247YN
85 VAC – 277 VAC Input
Specification
12 V (12 V - 14 V LED Array), 1.67 A Output
Application LED Driver
Author Power Integrations Applications Department
Document
DER-168
Number
Date November 19, 2007
Revision 1.0
Summary and Features

• Single stage PFC based constant voltage, constant current output power
supply
• Universal input range allows single design to be used worldwide
• Meets ENERGY STAR minimum PF requirement of 0.9 for commercial
environment (0.9 worst case at 277 VAC)
• Meets harmonic content limits as specified in IEC 61000-3-2 for Class C
• Meets EN55015 B conducted EMI limits with >8 dBµV margin
• Fully fault protected
• Auto-restart withstands shorted output indefinitely
• Integrated thermal shutdown protects the entire supply
• Operates with no-load indefinitely
• Full load: 6 rows of 4 diodes part# LW W5SG/GYHY-5K8L-Z
The products and applications illustrated herein (including circuits external to the products and transformer
construction) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign
patent applications assigned to Power Integrations. A complete list of Power Integrations’ patents may be found at
www.powerint.com.
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5245 Hellyer Avenue, San Jose, CA 95138 USA.
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DER-168 20 W Single Output, LED Driver – TOP247YN 19-Nov-07
Table of Contents
1 Introduction.................................................................................................................3
2 Power Supply Specification ........................................................................................4
3 Schematic...................................................................................................................5
4 PCB Layout ................................................................................................................6
5 Circuit Description ......................................................................................................7
5.1 Input EMI Filtering ...............................................................................................7
5.2 TOPSwitch Primary .............................................................................................7
5.3 Output Rectification .............................................................................................8
5.4 Output Feedback.................................................................................................8
5.4.1 Constant Voltage Operation .........................................................................9
5.4.2 Constant Current Operation .........................................................................9
5.5 Soft-Start .............................................................................................................9
6 Bill of Materials .........................................................................................................11
7 Transformer Specification.........................................................................................14
7.1 Electrical Diagram .............................................................................................14
7.2 Electrical Specifications.....................................................................................14
7.3 Materials............................................................................................................14
7.4 Transformer Build Diagram ...............................................................................15
7.5 Transformer Construction..................................................................................15
8 Transformer Spreadsheets .......................................................................................16
9 Performance Data ....................................................................................................19
9.1 Efficiency ...........................................................................................................19
9.2 Line Regulation .................................................................................................19
9.3 Harmonic Content .............................................................................................20
9.4 Harmonic Content in Percentage of Fundamental.............................................20
9.5 Power Factor Vs Line Voltage at Full Load .......................................................21
10 Thermal Performance ...........................................................................................22
11 Waveforms............................................................................................................23
11.1 Drain Voltage and Current, Normal Operation...................................................23
11.2 Output Voltage Start-up Profile..........................................................................24
11.3 Drain Voltage and Current Start-up Profile ........................................................24
11.4 Output Ripple Measurements............................................................................25
11.4.1 Ripple Measurement Technique ................................................................25
11.4.2 Measurement Results ................................................................................26
12 Surge Test ............................................................................................................27
12.1 Surge Test Results with 1.2/50uS Waveform ....................................................27
12.2 Surge Test Results with 0.5uS-100KHz Ring-Waveform...................................27
13 Conducted EMI .....................................................................................................28
14 Revision History ....................................................................................................29
Important Note:
Although this board is designed to satisfy safety isolation requirements, the engineering
prototype has not been agency approved. Therefore, all testing should be performed
using an isolation transformer to provide the AC input to the prototype board.
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19-Nov-07 DER-168 20 W Single Output, LED Driver – TOP247YN
1 Introduction
The document presents a power supply design to be used in LED Lighting applications.
The design input voltage range is 85 to 277 VAC.
Figure 1 – Populated Circuit Board Photograph.
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2 Power Supply Specification
Description Symbol Min Typ Max Units Comment

Input
Voltage VIN 85 277 VAC 2 Wire – no P.E.
Frequency fLINE 47 50/60 64 Hz
Output
Output Voltage 1 VOUT1 12 18 V
Output Ripple Voltage 1 VRIPPLE1 mV 20 MHz Bandwidth
Output Current 1 IOUT1 1.67 A
Total Output Power
Continuous Output Power POUT 20 W
Environmental
Conducted EMI Meets EN55015B
Designed to meet IEC950, UL1950
Safety Class II
1.2/50 µs Surge, IEC 61000-4-5,
Surge 1 kV Series Impedance:
Common Mode: 12 Ω
1.2/50 µs Surge, IEC 61000-4-5,
Surge 0.5 kV Series Impedance:
Differential Mode: 2 Ω
0.5 µs-100KHz Ring-wave IEEE
Ring-wave 2.5 kV C.62.41-1991, Class A,
Differential and Common Mode
o
Ambient Temperature TAMB 0 50 C Free Convection, Sea Level
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3 Schematic
Figure 2 –Schematic.
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4 PCB Layout
Figure 3 – PCB Layout.
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5 Circuit Description
This design uses a discontinuous mode flyback power supply fed from an input stage
with minimal capacitance. With a fixed duty cycle over an AC line cycle, this allows the
peak drain current envelope, and therefore the input current, to follow the input AC
voltage waveform to give high power factor and low harmonic content. Although this
simple configuration gives both output regulation and power factor correction in a single
stage converter, it does require higher peak drain currents compared to a standard power
supply with substantiation input capacitance.
Detailed descriptions of each function block are given below.
5.1 Input EMI Filtering

In addition to the standard filtering (C1 and L1), L2 and L3 were added to provide
increased differential mode filtering and surge withstand capability. This was required
due to the small value of input capacitance (C3) and associated increase in switching
currents seen by the AC input.
Common mode filtering is provided by L1, C8 and C9. Together with transformer
E-Shields (that reduce the source of EMI common mode currents), this allows the design
to pass EN55015 B with good margin.
5.2 TOPSwitch Primary

On application of the AC input, the combination of the in-rush current to charge C1, C18
and C3, together with the inductance in the AC line, causes a voltage spike that appears
across C3. In a design with a large input capacitance, this voltage is negligible; however,
here the voltage spike is sufficiently large to exceed the BVDSS rating of the MOSFET
within TOP247YN. To prevent this, capacitor C4 and D5 limit the maximum voltage while
R1 is the bleeder to discharge this capacitor on AC removal.
The discontinuous mode of operation needed for high power factor increases the primary
RMS current for a given output power. Selecting a larger TOPSwitch device (TOP247YN)
than needed for power delivery offsets increases RMS current by reducing the RDSON
conduction losses and giving higher efficiency and reduced dissipation. This was critical
in this design in order to meet the maximum operating ambient of 50 °C.
As the DC input voltage across C3 falls to zero during normal operation, D6 was added in
series with the drain to prevent the DRAIN ringing below SOURCE and reverse biasing
the device. As reverse biasing of the device is not permitted, this diode must be used.
To provide high power factor using a single stage flyback converter, it is necessary to
maintain the duty cycle of the MOSFET constant over a single AC line cycle (low
bandwidth).
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As the control characteristic of TOPSwitch-GX is CONTROL (C) pin current to duty cycle
(of the internal MOSFET), this requires that the current into the C pin must be held
constant. The simplest way to achieve this would be to use a very large value of
CONTROL pin capacitance (C5). However, a large value of C5 causes a large startup
time and also a large startup overshoot.
To overcome this difficulty, an emitter follower (Q1) was used as an impedance

transformer with a capacitor C10 in its base. Looking into the emitter of Q1, C10 appears
to be larger (C10 x Q1hfe), and R6 appears to be smaller (R6 / Q1hfe). Capacitor C10,
together with R6, sets the dominant pole of the circuit at approximately 0.01 Hz. Resistor
R7 provides loop compensation, creating a zero at approximately 44 Hz, which gives
additional phase starting at 4 Hz to improve phase margin at gain crossover. Gain
crossover occurred in this design at approximately 30 Hz. Higher bandwidth is
undesirable as this degrades power factor by increasing the third harmonic content in the
input current waveform. Diode D8 prevents reverse current through Q1 during startup.
Feedback is provided from the secondary via optocoupler U2B, which in turn modulates
the base voltage of Q1 and changes the current into the CONTROL pin.
The primary clamp circuit is formed by D7, R2, R3, C6 and VR1. During normal
operation, R3 and C6 set the clamping voltage. Zener VR1 sets a defined upper
clamping voltage and conducts only during startup and load transients. A standard
recovery, glass passivated diode, D7, has a reverse recovery time of 2 µs and helps
recover some of the leakage energy, thereby improving efficiency. Note that the glass
passivated version of the 1N4007 must be used to prevent excessive diode reverse
current, unless the FR106 (500 ns) diode is substituted. Resistor R2 damps out high
frequency ringing and helps reduce EMI.
5.3 Output Rectification

To reduce dissipation and increase efficiency, two output diodes were used (D10 and
D11). These are connected to separate secondary windings to improve current sharing
between the two diodes. Filtering is provided by C11 and C12. Relatively large values
are necessary to reduce line frequency ripple that is present in the output due to the low
loop bandwidth required for high power factor. These values may be reduced depending
on the acceptable current ripple through the LED load.
Snubbers (R22, C19 and R29, C20) across D10 and D11 were added to reduce EMI.
5.4 Output Feedback

Output feedback is split into two functional blocks: constant voltage operation and
constant current operation.
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5.4.1 Constant Voltage Operation

Voltage feedback is provided by VR2 and optocoupler U2A. Once the output exceeds
the voltage defined by the forward drop of U2A, VR2 and R16, current will flow through
the optocoupler and provide feedback to the primary. As the line and load change, the
magnitude of current will change to reduce or increase the MOSFET duty cycle so as to
maintain output regulation. Resistor R16 sets the loop gain in the constant voltage
region.
The nominal output voltage regulation is set at 18 V, which is above the expected LED
load voltage when operated at its rated current. Under normal operation, the supply will
operate in constant current mode, and voltage feedback is used only when the output is
unloaded.
5.4.2 Constant Current Operation

Transistor Q3 and the forward drop of the LED in U2A are used to create a bias voltage
on the base on Q2. The additional drop across R11 needed to turn on Q2 is equal to the
difference between the bias voltage and the VBE of Q2 (~0.5 V). Once Q2 turns on, Q4 is
also turned on, supplying current through U2A and providing feedback. Resistor R9
limits the base current from Q4, and R14 sets the gain of the CC loop. Resistor R10
keeps Q4 off until Q2 is on, while C13 provides loop compensation. This arrangement
gave an average output current in CC operation of 1.67 A.
5.5 Soft-Start
The very low loop bandwidth presents a problem at startup. Once the loop closes and
feedback is provided via U2A, it takes significant time for the loop to respond and
therefore allows a significant output overshoot. This is due to the need for C10 to charge
above 5.8 V before current will be supplied into the CONTROL pin of U1.
The standard solution to output overshoot is to provide a soft-finish circuit. Typically this
consists of a capacitor that allows current to flow in the feedback loop before the output
has reached regulation. Here such a passive approach is not practical because of the
size of capacitor that would be required.
To overcome this, the circuit formed around Q5 is used to overdrive the feedback loop
during startup. Using an element with gain (Q5) allows high enough feedback current to
pre-charge C10 before the output reaches regulation.
A separate auxiliary supply is created by D12 and C15 so that the voltage across C15
rises faster than the main output across C11 and C12. While C16 charges, Q5 is on,
supplying current to charge C10 via the optocoupler, with resistor R21 limiting the
maximum current. Once the voltage across C16 reaches VO-VBE (Q5), Q5 turns off and the
circuit becomes inactive. At power down, C16 is discharged via R18, resetting the circuit
for the next power-up. The time constant of C16 and R18 appears very long; however, in
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practice, C10 also takes a significant time to discharge on power down, and even
momentary AC drop outs do not result in any output overshoot.
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6 Bill of Materials
Item Qty Part Ref Value Description Mfg Part Mfg
Number
1 1 C1 100 nF 100 nF, 305 VAC, X2 B32922A2104M Epcos
2 1 C3 220 nF 220 nF, 630 V, Film ECQ-E6224KF Panasonic
3 1 C4 10 µF 10 µF, 450 V, Electrolytic, (12.5 x 20) EKMG451ELL10 United Chemi-
0MK20S Com
4 1 C5 22 µF 22 µF, 16 V, Electrolytic, Gen. ECA1CM220 Panasonic
Purpose, (5 x 11)
5 1 C6 2.2 nF 2.2 nF, 1 kV, Disc Ceramic NCD222K1KVY5 NIC Components
FF Corp
6 1 C7 330 µF 330 µF, 25 V, Electrolytic, Very Low EKZE250ELL331 Nippon Chemi-
ESR, 53 Ω, (10 x 12.5) MJC5S Con
7 2 C8 C9 470 pF 470 pF, 250 Vac, Thru Hole, Ceramic ECK-ATS471MB Panasonic
Y-Capacitor
8 1 C10 33 µF 33 uF, 16 V, Electrolytic, Gen. ECA1CM330 Panasonic
Purpose, (5 x 11)
9 2 C11 1500 uF 1500 µF, 25 V, Electrolytic, Very Low EKZE250ELL152 Nippon Chemi-
C12 ESR, 18 Ω, (12.5 x 25) MK25S Con
10 1 C13 10 nF 10 nF, 50 V, Ceramic, Z5U B37982N5103M Epcos
000
11 1 C14 100 nF 100 nF, 50 V, Ceramic, X7R - Don't B37987F5104K0 Epcos
use for bypass cap. Use Z5U 00
dielectric type - cheaper
12 2 C15 47 µF 47 µF, 25 V, Electrolytic, Very Low EKZE250ELL470 Nippon Chemi-
C16 ESR, 300 Ω, (5 x 11) ME11D Con
13 1 C17 470 pF 470 pF, 1 kV, Disc Ceramic NCD471K1KVY5 NIC Components
FF Corp
14 1 C18 150 nF 150 nF, 305 VAC, X2 B32922A2154M Epcos
15 2 C19 1 nF 1 nF, 100 V, Ceramic, COG B37979G1102J0 Epcos

C20 00
16 4 D1 D2 RL207 1000 V, 2 A, Rectifier, DO-15 RL207 Rectron
D3 D4
17 1 D5 1N4007 1000 V, 1 A, Rectifier, DO-41 1N4007-E3/54 Vishay
18 1 D6 UF5404 400 V, 3 A, Ultrafast Recovery, 75 ns, UF5404-E3 Vishay

DO-201AD
19 1 D7 1N4007GP 1000 V, 1 A, Rectifier, Glass 1N4007GP Vishay
Passivated, 2 us, DO-41
20 1 D8 1N4148 75 V, 300 mA, Fast Switching, DO-35 1N4148 Vishay
21 2 D9 D12 1N4002 100 V, 1 A, Rectifier, DO-41 1N4002 Vishay

22 2 D10 MBR1060 60 V, 10 A, Schottky, TO-220AC MBR1060 Vishay
D11
23 1 F1 5A 5 A, 250 V, Slow, TR5 3721500041 Wickman
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24 1 HS1 HEATSINK HEATSINK, Alum, TO-220 2 hole, 2 Power

mtg pins Integrations
25 2 J1 J2 CON2 2 Position (1 x 2) header, 0.156 pitch, 26-48-1021 Molex
Vertical
26 1 L1 5 mH 5 mH, 0.3 A, Common Mode Choke SU9V-03050 Tokin
27 2 L2 L3 220 µH 220 µH, 0.68 A, 9 x 11.5 mm SBC3-221-681 Tokin
28 3 Q1 Q2 2N3904 NPN, Small Signal BJT, 40 V, 0.2 A, 2N3904RLRAG On

Q3 TO-92 Semiconductor
29 2 Q4 Q5 2N3906 PNP, Small Signal BJT, 40 V, 0.2 A, 2N3906 Fairchild

TO-92
30 1 R1 47 k 47 k, 5%, 1/2 W, Carbon Film CFR-50JB-47K Yageo
31 1 R2 33 33 R, 5%, 1/2 W, Carbon Film CFR-50JB-33R Yageo
32 1 R3 100 k 100 k, 5%, 2 W, Metal Oxide RSF200JB-100K Yageo
34 2 R5 R10 10 k 10 k, 5%, 1/8 W, Carbon Film CFR-12JB-10K Yageo
38 1 R11 0.20 0.20 R, 1%, 1 W 2306 327 52007 Phonex
39 2 R12 1.8 1.8 R, 5%, 1/4 W, Carbon Film CFR-25JB-1R8 Yageo

R23
40 2 R13 1k 1 k, 5%, 1/8 W, Carbon Film CFR-12JB-1K0 Yageo
R15

R20
R21
43 1 R17 1.6 k 1.6 k, 5%, 1/8 W, Carbon Film CFR-12JB-1K6 Yageo

R25
R29
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48 1 R31 18.2 k 18.2 k, 1%, 1/4 W, Metal Film MFR-25FBF- Yageo

18K2
49 1 RV1 320 Vac 320V, 84J, 15.5 mm, RADIAL S14K320 Epcos
50 1 T1 EE28 Bobbin, EE28. Vertical, Extended YW-490-00B Yih-Hwa
creepage, 10 pins Enterprises
51 1 U1 TOP247YN TOPSwitch-GX, TOP247YN, TO220- TOP247YN Power
7C Integrations
52 1 U2 LTV817A Opto coupler, 35 V, CTR 80-160%, LTV-817A Liteon
4-DIP
53 1 VR1 P6KE200A 200 V, 600 W, 5%, TVS, DO204AC P6KE200ARLG OnSemi
(DO-15)
54 1 VR2 1N5247B 17 V, 5%, 500 mW, DO-35 1N5247B Microsemi
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7 Transformer Specification
7.1 Electrical Diagram

2 10
WD2: 9
st
1 Half Primary
WD4:
3
Secondary
WD6:
2nd Half Primary 6
1
7
WD3:
Shield
1
WD1:
Cancellation
WD5:
Bias
5
Figure 4 – Transformer Electrical Diagram.
7.2 Electrical Specifications

Electrical Strength 60 second, 60 Hz, from Pins 1-5 to Pins 6-10 3000 VAC
Pins 1-2, all other windings open, measured at
Primary Inductance 724 µH, -0/+10%
100 kHz
Resonant Frequency Pins 1-2, all other windings open 855 kHz (Min.)
Pins 1-2, with Pins 6-7-8-9-10 shorted, measured
Primary Leakage Inductance 10 µH (Max.)
at 100 kHz.
7.3 Materials
Item Description
[1] Core: EE28 PC40 or equivalent gapped for 452 nH/T2
[2] Bobbin: Vertical EE28 10 pins, safety rated
[3] Magnet Wire: 33AWG
[7] Triple Insulated Wire: 23AWG
[8] Tape: 9.6mm
[9] Varnish
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7.4 Transformer Build Diagram
Pins Side
WD6: 2nd Half Primary 1

3 20T #27
WD5: 5
Bias
4 7T x 4 #30
7,6
WD4: Secondary
10,9 4T x 2 #23_TIW
1
WD3: Shield 4T x 4 #25
st 3
WD2:1 Half Primary
2 20T #27
WD1: Cancellation 1 20T x 2 #33
Figure 5 – Transformer Build Diagram.
7.5 Transformer Construction
Place bobbin, item [2], on the winding machine with pins side oriented to
Bobbin Preparation
the left hand side.
Start at pin 1, wind from left to right 20 bifilar turns of item [3] in a uniform,
WD1 Core Cancellation
tightly wound layer. Cut finish lead at the end of the winding.
Tape Use 1 layer of tape, item [8], to hold the winding.
Start at pin 2, wind from left to right 20 turns of item [4] in a uniform, tightly
WD2 First Half Primary
wound layer. Finish at pin 3.
Using 4 parallel wires of item [5], attach starting lead temporarily to pin 3.
Wind 4 quad-filar turns from left to right in a uniform, tightly layer. Finish at
WD3 Shield
pin 1. Disconnect the starting wire form pin 3 and cut it at the starting of
the winding.
Start at pins 10 and 9 using 2 wires of item [7]. Wind 4 turns of parallel
WD4 Secondary
wires from left to right in a single layer. Finish at pins 7 and 6 respectively.
Start at pin 4, wind 7 quad-filar turns of item [6] from left to right in a single
WD5 Bias
and tight layer. Finish at pin 5.
Start at pin 3, wind from left to right 20 turns of item [4] in a uniform, tightly
WD6 Second Half Primary.
wound layer. Finish at pin 1.
Tape Use 3 layer of tape, item [8].
Assemble and secure core halves with bobbin. Varnish impregnate item
Final Assembly
[9].
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8 Transformer Spreadsheets
ACDC_TOPSwitchGX_
043007; Rev.2.15; TOP_GX_FX_043007: TOPSwitch-GX/FX
Copyright Power Continuous/Discontinuous Flyback
Integrations 2007 INPUT INFO OUTPUT UNIT Transformer Design Spreadsheet
ENTER APPLICATION VARIABLES Design with 85-277VAC EE28 HF
VACMIN 85 Volts Minimum AC Input Voltage
VACMAX 277 Volts Maximum AC Input Voltage
fL 50 Hertz AC Mains Frequency
VO 12.00 Volts Output Voltage (main)
PO 33.00 Watts Output Power
n 0.80 Efficiency Estimate
Z 0.50 Loss Allocation Factor
VB 20 Volts Bias Voltage
tC 3.00 mSeconds Bridge Rectifier Conduction Time Estimate
CIN 99999.00 uFarads Input Filter Capacitor
ENTER TOPSWITCH-GX VARIABLES

TOP-GX TOP247 Universal 115 Doubled/230V
Power
Chosen Device TOP247 Out 125W 165W
External Ilimit reduction factor (KI=1.0 for
KI 0.44 default ILIMIT, KI <1.0 for lower ILIMIT)
ILIMITMIN 1.426 Amps Use 1% resistor in setting external ILIMIT
ILIMITMAX 1.742 Amps Use 1% resistor in setting external ILIMIT
Frequency (F)=132kHz,
(H)=66kHz H Half (H) frequency option - 66kHz
TOPSwitch-GX Switching Frequency:
fS 66000 Hertz Choose between 132 kHz and 66 kHz
TOPSwitch-GX Minimum Switching
fSmin 61500 Hertz Frequency
TOPSwitch-GX Maximum Switching
fSmax 70500 Hertz Frequency
VOR 125.00 Volts Reflected Output Voltage
TOPSwitch On-state Drain to Source
VDS 10.00 Volts Voltage
Output Winding Diode Forward Voltage
VD 0.50 Volts Drop
VDB 0.70 Volts Bias Winding Diode Forward Voltage Drop
Ripple to Peak Current Ratio (0.4 < KRP
KP 1.00 <1.0 : 1.0< KDP<6.0)
ENTER TRANSFORMER CORE/CONSTRUCTION VARIABLES

Core Type EI28*
Core EI28 P/N: PC40EI28-Z
Bobbin EI28 BO P/N: BE-28-1110CPL
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BBIN
AE 0.86 cm^2 Core Effective Cross Sectional Area

LE 4.82 cm Core Effective Path Length
AL 4300 nH/T^2 Ungapped Core Effective Inductance
BW 9.6 mm Bobbin Physical Winding Width
Safety Margin Width (Half the Primary to
M 0.00 mm Secondary Creepage Distance)
L 2.00 Number of Primary Layers
NS 4 Number of Secondary Turns
DC INPUT VOLTAGE PARAMETERS

VMIN 120 Volts Minimum DC Input Voltage
VMAX 392 Volts Maximum DC Input Voltage
CURRENT WAVEFORM SHAPE PARAMETERS

DMAX 0.53 Maximum Duty Cycle
IAVG 0.34 Amps Average Primary Current
IP 1.29 Amps Peak Primary Current
IR 1.29 Amps Primary Ripple Current
IRMS 0.54 Amps Primary RMS Current
TRANSFORMER PRIMARY DESIGN PARAMETERS

LP 724 uHenries Primary Inductance
NP 40 Primary Winding Number of Turns
NB 7 Bias Winding Number of Turns
ALG 452 nH/T^2 Gapped Core Effective Inductance
Maximum Flux Density at PO, VMIN
BM 2717 Gauss (BM<3000)
BP 3666 Gauss Peak Flux Density (BP<4200)
AC Flux Density for Core Loss Curves (0.5
BAC 1359 Gauss X Peak to Peak)
ur 1918 Relative Permeability of Ungapped Core
LG 0.21 mm Gap Length (Lg > 0.1 mm)
BWE 19.2 mm Effective Bobbin Width
Maximum Primary Wire Diameter including
OD 0.48 mm insulation
Estimated Total Insulation Thickness (= 2 *
INS 0.06 mm film thickness)
DIA 0.42 mm Bare Conductor Diameter
Primary Wire Gauge (Rounded to next
AWG 26 AWG smaller standard AWG value)
Bare Conductor Effective Area in Circular
CM 256 Cmils mils
Primary Winding Current Capacity (200 <
CMA 471 Cmils/Amp CMA < 500)
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TRANSFORMER SECONDARY DESIGN PARAMETERS (SINGLE OUTPUT EQUIVALENT)

Lumped parameters
ISP 12.92 Amps Peak Secondary Current
ISRMS 5.10 Amps Secondary RMS Current
IO 2.75 Amps Power Supply Output Current
IRIPPLE 4.30 Amps Output Capacitor RMS Ripple Current
Secondary Bare Conductor minimum

CMS 1021 Cmils circular mils
Secondary Wire Gauge (Rounded Up to
AWGS 20 AWG Next Larger Standard AWG Value)
Secondary Minimum Bare Conductor
DIAS 0.81 mm Diameter
Secondary Maximum Outside Diameter for
ODS 2.40 mm Triple Insulated Wire
Maximum Secondary Insulation Wall
INSS 0.79 mm Thickness
VOLTAGE STRESS PARAMETERS

Maximum Drain Voltage Estimate (Includes
VDRAIN 674 Volts Effect of Leakage Inductance)
Output Rectifier Maximum Peak Inverse
PIVS 51 Volts Voltage
Bias Rectifier Maximum Peak Inverse
PIVB 85 Volts Voltage
*Note EI and EE core are equivalent – here an EE28 core was used but EI entered into
design spreadsheet.
The standard flyback transformer design approach was modified due to the minimal input
capacitance (for high p.f.). A very high value of capacitance was entered for CIN so that
the transformer is designed at the peak of the AC line voltage (at low line). The output
power entered was increased from the 20 W specified to 33 W. This was compensated
for the undelivery of output power as the AC input voltage waveform is low or zero.
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9 Performance Data
All measurements performed at room temperature, 60 Hz input frequency.
9.1 Efficiency
EFFICIENCY Vs LINE VOLTAGE AT FULL LOAD

90
80
70
Output Efficiency (%)
60
50
40
30
20
10
0
80 120 160 200 240 280
Line Voltage (AC)
Figure 6 – Efficiency vs Input Voltage, Room Temperature, 60 Hz.
9.2 Line Regulation
LINE REGULATION AT FULL LOAD

14
12
Output Voltage (DC)
10
0
80 120 160 200 240 280
Line Voltage (AC)
Figure 7 – Line Regulation, Room Temperature, Full Load.
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9.3 Harmonic Content
Input Current Harmonic Content
250
200
Input Current (mA)
115VAC
150
230VAC
100
50
0
1 2 3 4 5 6 7 8 9 10
Harmonic
Figure 8 – Input Current Harmonic Content at Full Load.
9.4 Harmonic Content in Percentage of Fundamental

Harmonic 115 AC % of Maximum % Allowed 230 AC % of Maximum % Allowed
Iin(mA) Fundame By IEC 61000-3-2 Iin(mA) Fundamen By IEC 61000-3-2.
ntal tal Class C
1 234 139
2 3.2 1.37 2 0.9 0.65 2
3 2.9 1.24 29.7 11 7.91 28.0
4 2.6 1.11 0.6 0.43
5 3.6 1.54 10 6.1 4.39 10
6 0.8 0.34 1.5 1.08
7 6.9 2.95 7 8.5 6.12 7
8 1.6 0.68 1.6 1.15
9 7.6 3.25 5 7.8 5.61 5
10 1.3 0.56 0.9 0.65
Figure 9 – Harmonic Content in Percentage of Fundamental and IEC 61000-3-2 Limits for C Class
Equipment. NOTE: Third Harmonic Spec Follows the Formula: 30* PFC. (Power Factor at 115/230 VAC).
Power Integrations
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9.5 Power Factor Vs Line Voltage at Full Load
Vin PF
85 0.970
115 0.990
230 0.934
277 0.902
Power Factor Vs Line Voltage
1
0.99
0.98
0.97
Power Factor (PF)
0.96
0.95
0.94
0.93
0.92
0.91
0.9
0.89
50 100 150 200 250 300
Line Voltage (VAC)
Figure 10 – Power Factor (PF) vs Input Line Voltage (VAC).
Power Integrations
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10 Thermal Performance
Thermal data were taken with unit inside a closed cardboard box at room temperature.
Temperature (°C)
Item
85 VAC 277 VAC
Ambient Outside the
25 25
Box
TOPSWITCH (U1) 42 53
Transformer (T1) 46 52
Output Rectifiers
58 60
(D10, D11)
Power Integrations
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11 Waveforms
11.1 Drain Voltage and Current, Normal Operation
Figure 11 – 115 VAC, Full Load. Figure 12 – 115 VAC, Full Load.
Upper: IDRAIN, 1.0 A / div. Upper: IDRAIN, 1.0 A / div.
Lower: VDRAIN, 100 V, 2 ms / div. Lower: VDRAIN, 100 V, 5 µs / div.
Figure 13 – 230 VAC, Full Load. Figure 14 – 230 VAC, Full Load.
Upper: IDRAIN, 1.0 A / div. Upper: IDRAIN, 1.0 A / div.
Lower: VDRAIN, 200 V, 2 ms / div. Lower: VDRAIN, 200 V, 5 µs / div.
Power Integrations
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11.2 Output Voltage Start-up Profile
Figure 15 – Start-up Profile, 115VAC Figure 16 – Start-up Profile, 230 VAC

2 V, 50 ms / div. 2 V, 50 ms / div.
11.3 Drain Voltage and Current Start-up Profile
Figure 17 – 115 VAC Input and Maximum Load. Figure 18 – 230 VAC Input and Maximum Load.
Upper: IDRAIN Upper: IDRAIN
Lower: VDRAIN Lower: VDRAIN
Power Integrations
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11.4 Output Ripple Measurements
11.4.1 Ripple Measurement Technique

For DC output ripple measurements, a modified oscilloscope test probe must be utilized
in order to reduce spurious signals due to pickup. Details of the probe modification are
provided in the figures below.
The 4987BA probe adapter is affixed with two capacitors tied in parallel across the probe
tip. The capacitors include one (1) 0.1 µF/50 V ceramic type and one (1) 1.0 µF/50 V
aluminum electrolytic. The aluminum electrolytic type capacitor is polarized, so proper
polarity across DC outputs must be maintained (see below).
Probe Ground
Probe Tip
Figure 19 – Oscilloscope Probe Prepared for Ripple Measurement. (End Cap and Ground Lead
Removed).
Figure 20 – Oscilloscope Probe with Probe Master (www.probemaster.com) 4987A BNC Adapter.
(Modified with wires for ripple measurement, and two parallel decoupling capacitors added).
Power Integrations
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11.4.2 Measurement Results
AC coupled measurements showing 1.5 VP-P output ripple at 120 HZ.
Figure 21 – Ripple, 115 VAC, Full Load. Figure 22 – Ripple, 230 VAC, Full Load.
5 ms, 1 V / div. 5 ms, 1 V /div.
Power Integrations
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12 Surge Test
12.1 Surge Test Results with 1.2/50us Waveform
Surge Input Injection Injection Number Of Test Result

Level (V) Voltage Location Phase (°) Surges (Pass/Fail)
(VAC)
+500 230 L to N 90 10 Pass
-500 230 L to N 90 10 Pass
+1000 230 L and N to G 90 10 Pass
-1000 230 L and N to G 90 10 Pass
12.2 Surge Test Results with 0.5us-100 kHz Ring-Waveform
Surge Input Injection Injection Number Of Test Result

Level (V) Voltage Location Phase (°) Surges (Pass/Fail)
(VAC)
+2500 230 L to N 90 10 Pass
-2500 230 L to N 90 10 Pass
+2500 230 L and N to G 90 10 Pass
-2500 230 L and N to G 90 10 Pass
Power Integrations
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13 Conducted EMI
Figure 23 – Conducted EMI, 115 VAC Full Load, LIGHT Traces: N, BOLD Traces: L. OUTRET Grounded.
Figure 24 – Conducted EMI, 230 VAC. Full Load, LIGHT Traces: N, BOLD Traces L. OUTRET Grounded.
Power Integrations
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14 Revision History
Date Author Revision Description & changes Reviewed

19-Nov-07 SGK 1.0 Initial Release
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Notes
Power Integrations
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Notes
Power Integrations
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For the latest updates, visit our website: www.powerint.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power
Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS
MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT
LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-
INFRINGEMENT OF THIRD PARTY RIGHTS.
PATENT INFORMATION
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered
by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations.
A complete list of Power Integrations’ patents may be found at www.powerint.com. Power Integrations grants its customers a license
under certain patent rights as set forth at http://www.powerint.com/ip.htm.
The PI Logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield,
Filterfuse, StackFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their
respective companies. ©Copyright 2007 Power Integrations, Inc.
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Power Integrations
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DI-20 Design Idea
®
TOPSwitch-GX
145 W PC Main ATX Supply
Application Device Power Output Input Voltage Output Voltage Topology

PC Main TOP247YN 145 W 90 – 130 VAC / 3.3 V / 5 V / 12 V Forward
180 – 265 VAC
Design Highlights R3, R5 and R6 implement start-up undervoltage lockout, which

• 145 W cont. (160 W peak) in PC ATX form factor prevents the supply from starting below 180 VDC. Components
• TOPSwitch-GX integrated features enable extremely low R4, R14, Q1 and R30 implement an independent undervoltage
component count using the X pin, which allows the supply to continue delivering
• Meets 1 W standby spec. (0.91 W input 0.5 W output) power all the way down to 140 VDC (increasing hold-up time).
• High efficiency (71% minimum) Resistor R7 provides additional hysteresis.
• Integrated line undervoltage and overvoltage detection
• Low EMI due to frequency jitter The primary side components D1, VR3-5 and C4, along with
• SOURCE referenced TO-220 tab lowers conducted EMI secondary side C9 and R30, implement the Zener/capacitor reset/
• Maximum duty cycle (DCMAX) reduction prevents transformer clamp circuit. This circuit provides reset voltage for the transformer
saturation for fault and transient loads and clamps the DRAIN pin voltage to a safe level (<~600 V) under
• Uses conventional magamp for 3.3 V output all conditions.
• Meets CISPR22B/EN55022B conducted EMI
The reset circuit works in conjunction with the DCMAX reduction
Operation circuit (R8, R36, C22, VR19 and D18) to limit the maximum duty
TOPSwitch-GX integrates many features designed for use with cycle and prevent transformer saturation under fault and transient
forward converters. Transistors Q4, Q6, R1, R2, R3, R5 and R6 conditions.
form an active capacitor (C2, C3) balancing circuit, operating only
as needed to minimize zero-load power consumption. Resistors
C10
1 nF Coupled
50 V choke
L1
13 MH
4 3
+12 V
1 14
C4 D7 5, 6 1, 2 C11
R1 2.2 nF R3
330 k7 2.2 M7 MBR3045 C9 1000MF
1 kV 16 V L2
R4 47 nF 0.5 MH
2.2 M7 13 50 V
D1 R5 +5 V
1N5407 R30
BR1 180 k7 17
KBL06 Q4 5 1W C13
C2 MPSA42 C12
330 MF 2200MF 220 MF
8, 9 R21 63 V
200 V D8 6.3 V 270 7
CY3 C20 MBR6045 TO
2.2 nF 330 pF MAGAMP
(Safety) R6
2.2 M7 50 V (3.3 V)
11,12
RTN
JP9 CY4 TOPSwitch-GX
2.2 nF 7 D6
(Safety) U1 R13 BAV20 C5 R18
TOP247YN 10 7 1 MF 4.74 k7
CX1 Q6 D18 100 V 1%
0.047 MF R8 R36 3 BAV20 C17
To AC Selector MPSA92 130 k7 43.2 k7
250 VAC Switch 100 nF
1% 1% 50 V
L7
8.2 mH R7 VR19
VR3 D L C22 560 k7 1N5229 U2 R15
CX2 BZY97C- 100 pF SFH615A-2 R20
CONTROL 1.8 k7 270 k7
0.33 MF C3 200 50 V R16
250V C
330 MF 1 k7
200 V VR4
BZY97C- R11
R10 300 7
RT1 560 K 180 S X F C8 C16
10 7 R9
1/2 W 0.033 MF 47 7 Q1 100 nF R17
VR5 50 V 2N3908 50 V 15 k7
RV1 R2 BZY97C-
330 k7 D105
275 V, 14 mm 180 R30 1N4148
C6 R14 U5
3.3 k7 47 MF R19
75 k7 TL431
16 V 4.12 k7
1%
PI-3165-100608
R12 +12 V STBY
12 k7 R38 R106
5.1 k7 27 k7
U3 Remote
LTV817 ON/OFF
F1 C7 Q7
4A 100 nF 2N3904
50 V C23 R37
33 nF 10 k7
50 V
L G N
Figure 1. 145 W (160 W pk.) PC Main Power Supply Schematic (Note: Schematic does not include transformer Y-capacitor).
www.powerint.com October 2008

The components R12, C7, R38, Q7, C23, R37, U3, R106 and • Maintain maximum flux density on transformer (T1) <2500
D105 implement the remote ON/OFF drive circuit. During the ON gauss
state, U3 and hence Q7 conduct pulling the X pin to SOURCE via • Check for balanced currents on coupled inductor (L1), for all
resistor R12 (which sets the current limit). load combinations
• Use PI Expert (PIXls) Design Spreadsheet and refer to Applica-
During the OFF state, U3 and Q7 are off, allowing the X pin to be tion Note AN-30, for details on designing forward converters
pulled high by the +15 V standby supply via R38 and R12 and with TOPSwitch-GX
putting the TOPSwitch-GX into the OFF state. Components R38
and D105 reduce device consumption to around 2 mW by Due to the complexity of this design it is not possible to include all
supplying external current to the CONTROL pin from the +15 V details in this Design Idea. For detailed design information on the
standby supply. Resistor R11 is required to allow external bias PC Main please refer to Design Accelerator Kit (DAK-12) and
feed. Engineering Prototype Report EPR-12.
Key Design Points For all other information please refer to Power Integrations'
• Transformer reset: Use recommended Zener/capacitor clamp/
Web site.
reset circuit to maintain drain voltage <600 V and DCMAX
reduction to prevent transformer saturation.
D9
MBR2045 L4 L5
20 μH 0.5 μH
FROM MAIN 3.3 V
CONVERTER L3
5 V WINDING R22
Mag Amp 3Ω
6 Turns R23 R25 R24
Q2 1 kΩ 2.7 kΩ 3.84 kΩ
TIP32 1% C14 C15
R27 C18 1200 μF 1200 μF
R34 10 V 10 V
33 Ω 390 Ω 0.1 μF
D11 50 V
UF4002 C21
D10 1 μF U8 R26
UF4002 50 V TL431 10 kΩ
1%
RTN RTN
PI-3385-093002
Figure 2. Magamp for Independent 3.3 V Secondary Regulation.
Power Integrations Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power
5245 Hellyer Avenue Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS
San Jose, CA 95138, USA. MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED
Main: +1 408-414-9200 WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
Customer Service The products and applications illustrated herein (transformer construction and circuits external to the products) may be covered by
Phone: +1-408-414-9665 one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations.
Fax: +1-408-414-9765 A complete list of Power Integrations' patents may be found at www.powerint.com. Power Integrations grants
Email: usasales@powerint.com its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield, Filterfuse, StackFET,
On the Web PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies.
www.powerint.com ©2002, Power Integrations, Inc.
C
10/08 DI-20
DI-21 Design Idea
®
TOPSwitch-GX
45 W, Universal Input, LCD Monitor External Adapter

LCD Monitor TOP247YN 45 W 90 – 265 VAC 12 V Flyback
Design Highlights selection reduces conduction losses, raising efficiency (without

• High efficiency, >82% at 90 VAC circuit changes or increased overload power), and permits a high
• Low part count solution inductance design with a small EE30 core for higher efficiency.
• Extremely low EMI – frequency jitter helps meet EN55022B and
FCC B limits with output return grounded Key Design Points
• Nominal UV and OV set points are calculated according to the
• Low zero load power consumption, <250 mW at 115 VAC
• Line undervoltage detection (UV) and overvoltage (OV) power
equations:
system surge protection VUV = (50 μA x R1) + 2.5 V, VOV= (R1 x 225 μA) + 2.9 V
• C2 provides high frequency bypass for high voltage DC bus,
• Differential and common mode surge immunity to
4 kV (EN61000-4-5) reducing high frequency EMI.
• C3 reduces clamp Zener temperature and increases efficiency.
• 100 kHz ring wave immunity to 4 kV (IEEE C62.41)
R18 in series with C3 damps drain ringing.
Operation • Ferrite beads, instead of RC snubbers are used on output
The design in Figure 1 utilizes the TOP247YN and takes advan- rectifier D7 to reduce zero load power consumption.
tage of many of the device’s features. Line UV and OV (100 V and • L5 and L6 reduce common mode conducted interference at
450 V, respectively) are implemented using a single 2 MΩ resistor high frequencies (>10 MHz).
(R1). Undervoltage eliminates power-up/down output glitches and • T1 shield winding (pins 2-3) reduces EMI. R7 damps ringing
overvoltage provides protection for both short duration transients caused by shield capacitive currents.
and long duration power system surges, removing the need for an • Capacitor C12 is added to eliminate output start-up overshoot.
input MOV. Resistor R8 programs the internal current limit of the • Feedback compensation is accomplished with C11 and R12
TOP247YN to 50% of nominal. The current limit is further reduced across TL431 reference amplifier U3 and correct choice of
as a function of line voltage by R4-R6 to provide approximately optocoupler series resistor R10.
constant overload power vs. line. The larger TOPSwitch-GX
Note: Beads L3 and L4

CY1 are placed on D7
R18 anode leads L6
R4-R6 R7 2.2 nF L3 L2 1T Through
68 7 220 7 Y1 Bead 3.3 MH, 5 A
2.7 M7 0.5 W Ferrite Bead 12 V, 3.75 A
D1 D2 VR1 L4 C10
R4 P6KE T1 Bead C7, C8 C9 100 nF
D1-D4 200 680 MF 220 MF
RL205 2 7, 9 35 V 35 V
2 A, 600 V D7
MBR20100
F1 L1 3 10,12 RTN
R5 C3
L 3.15 A 10 mH C1 4.7 nF
C2
1.4 A 100 MF 20 nF 1 kV
CX1 R1 1 5 U2
90 - 265 400 V 1 kV D5 D6 C6
330 nF 2 M7 LTV817A
X2 UF4005 1N4148 1 MF
VAC 0.5 W 50 V R13
to 4 6 R11 38.3 k7
R6 D LTOPSwitch-GX 1 k7 1%
N RT1 U1
CONTROL
CONTROL
5 72.8 A D3 D4 C TOP247YN
R10
GND 470 7
R9 C11
S X F 6.8 7 47 nF
C4
L5 100 nF
3T Ground Wire R8 R12
Through Ferrite Bead 15 k7 C5
47 MF C12 4.7 k7
10 V 22 MF
25 V U3 R14
TL431 10 k7
1%
PI-3003-100708
Figure 1. TOPSwitch-GX 45 W LCD Monitor Adapter.

80
PI-3004-073102
Transformer Parameters
70
QP Limit Line
EE30 TDK PC40EE30-Z or equivalent, gapped
Core Material
60 for ALG of 1045 nH/t²
Amplitude (dBμV)
AV Limit Line
50 Bobbin E130 12 pin (Yih Hwa YW-016 or equivalent)
40 Shield: 10T, 2 × 28 AWG
Primary: 22T, 25 AWG
30 Winding Details
Bias: 3T, 4 × 28 AWG
20 Secondary: 3T, 5 × 25 AWG T.I.W.
-10 Tape, Shield (2–3), Tape, Primary (4–1), Tape,
Quasi-Peak Scan Winding Order Bias (6–5), Tape, Secondary (7,8,9–10,11,12),
0 (pin numbers)
Average Scan Tape
EN_V_QP
-10 EN_V_AV Primary: 490 μH, 10%
Inductance
-20 Leakage: 6 μH (maximum)
0.15 1 10 30 Primary Resonant 2 MHz (minimum)
Frequency
Frequency (MHz)
Table 1. Transformer Parameters. (AWG = American Wire Gauge,
Figure 2. 115 V Conducted EMI for LCD Monitor Supply. Meets T.I.W. = Triple Insulated Wire)
FCC Part 15 Class B.
80
PI-3005-073102
70
QP Limit Line
60
Amplitude (dBμV)
AV Limit Line
50
40
30
20
-10
Quasi-Peak Scan
0
Average Scan EN_V_QP
-10 EN_V_AV
-20
0.15 1 10 30
Frequency (MHz)
Figure 3. 230 V Conducted EMI for LCD Monitor Supply. Meets
EN55022 EMI spec.
C
10/08 DI-21
DI-41 Design Idea
®
TOPSwitch-GX
43 W, 100/115 VAC Multi-output Set-top Box

Power Supply

Set-top Box TOP247YN 43 W cont, 57 W pk 90 – 132 VAC 3.3 V, 5 V, 12 V, 18 V, Flyback
33 V
Design Highlights and long duration power system surges. Resistor R4 programs the
• Low cost, low component count solution internal current limit of U1 to 80% of nominal, limiting overload
• Excellent output voltage tracking and cross-regulation – no power.
linear regulators required
• High efficiency, >71% at 90 VAC The key performance characteristic of the circuit shown is the
• Line undervoltage detection (UV) and power system surge excellent output voltage tracking and cross-regulation. Two
protection (OV) techniques are used to properly center the output voltages. The
• Meets CISPR22B/EN55022B conducted EMI limits extra voltage drop of the ultra-fast rectifier D10 (used instead of a
• Differential and common mode surge immunity to 4 kV Schottky) centers the 5 V output at precisely 5 V and DC stacking
(EN61000-4-5) is used to improve the regulation of 12 V, 18 V, and 30 V outputs.
• 100 kHz ring wave immunity to 4 kV (IEEE C62.41) Ferrite bead L7 is placed in series with the 12 V, 18 V and 30 V
output windings to improve centering and cross-regulation of these
Operation outputs.
The design in Figure 1 utilizes the TOP247YN and takes advan-
tage of many of the TOPSwitch-GX features. Line UV and OV Frequency jittering provides large EMI margins with simple filtering.
(100 V and 450 V, respectively) are implemented using a single Primary soft-start minimizes component stress during start-up and
2 MΩ resistor (R1). Undervoltage eliminates output glitches and a soft-finish capacitor (C20) eliminates start-up output overshoot.
overvoltage provides protection for both short duration transients
T1 R6 D7 L6
10 7 UF4003 33 MH, 0.2 A 33 V, 0.03 A
14
C7 C8
D8 47 MF L2 10 MF
UF5402 50 V 3.3 MH, 5 A 50 V 18 V, 0.5 A
13
C9 C10
D9 1000 MF L3 220 MF 12 V,
UF5402 25 V 3.3 MH, 5 A 25 V 0.6 A/1.8 A pk
12
L7 C11
8 Bead 390 MF C12 R14
35 V 100 MF
C24 5.6 k7
R15 0.1 MF 25 V 0.5 W
10 7 50 V L4
R2 C5 3.3 MH
68 k7 1 nF C6 5A 5 V, 3.2 A
2 W 1 kV 2.2 nF 9
Y1 C13, C14 L5 C15
D10 1200 MF 3.3 MH 220 MF
1 BYV32-200 35 V 5A 16 V
D1-D4 3.3 V, 3 A
11
RL206 VR1
2 A, 800 V P6KE200 C22 C18
D11 C16, 17
MBR1045 0.1 MF 220 MF
1200 MF 16 V RTN
50 V 35 V
D2 D1 3, 4 10
D5
1N4937
D4 D3 C2 5 R7
150 MF 150 7 C21
7
L1 200 V C3 0.1 MF
D6 1 MF 50 V
20 mH 1N4148 U2
1.3 A R1 50 V LTV817
2 M7 6
C1 1/2 W R10 R12
0.22 MF R8 R13
1 k7 9.53 k7 18 k7 15 k7
X2 1%
TOPSwitch-GX 1%
C19
RV1 D L U1 0.1 MF
275 V TOP247YN
CONTROL 50 V
14 mm C
F1 R9
3.15 A R3 3.3 k7
C3 6.8 7 C20
RT1 R4 S X F
0.1 MF
9.09 k 22 MF
L to 10 7 50 V C5 50 V U3
1% 47 MF TL431CLP R11
90 - 132 3.2 A 10 k7
VAC 16 V
1%
N
PI-3389-101408
Figure 1. TOPSwitch-GX 43 W Continuous, 57 W Peak Set-Top Box Power Supply.

Key Design Points Transformer Parameters
• Use KRP (Ripple-to-peak current ratio) in the range of 0.4–0.6 for
higher efficiency, and tighter cross-regulation. Use VOR (reflect- ERL28, Nippon Ceramic NC-2H material or
Core Material
ed output voltage) of 90 V to 110 V for optimum performance. equivalent, gapped for ALG of 128 nH/t²
• PCB traces which carry high switching currents should be short
ERL28 14 pin, Vertical, Jinbo Industrial JB-0039
and wide to reduce EMI. Bobbin
or equivalent
• Reduce leakage inductance and improve cross-regulation by
filling each winding layer across the entire width of the bobbin. Primary: 30T + 23T, 25 AWG
Shield: 1T, 0.6” × 0.001” Cu foil
• Resistor R14 provides a small amount of pre-load on the
Bias: 7T, 2 × 27 AWG
33 V output to prevent peak charging due to leakage spikes.
3.3 V: 2T, 0.6” × 0.005” Cu foil
• R5 and C5 reduce power dissipation in VR1.
Winding Details 5 V: 1T, 0.6” × 0.005” Cu foil
12 V: 4T, 2 × 27 AWG
18 V: 3T, 2 × 27 AWG
Output Load Cross Regulation (%) 33 V: 6T, 27 AWG
Voltage Range (2 × 27 AWG = Bifilar 27 AWG)
(V) (%) -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3
Apply 3.2 mm tape margin to both sides of
3.3 1-3 bobbin. Primary (4–3), tape, Shield (1–NC), tape,
Winding Order
5 1-3.2 Bias (6–7), 3 × tape, 5 V (9–11), 3.3 V (11–10),
(pin numbers)
tape, 12 V (12–8), 18 V (13–12), 33 V (14–13),
12 0.3-0.6
3 × tape, Primary (3–1), 3 × tape
30 0.01-0.03
Primary: 356 μH
Table 2. Worst Case Output Cross Regulation – Outputs Taken Inductance
Leakage: 11 μH (maximum)
from Minimum to Maximum Load and Line from 85 VAC
to 132 VAC.
Primary Resonant 650 kHz (minimum)
Frequency
Table 1. Transformer Parameters. (AWG = American Wire Gauge,
NC = No Connection)
B
10/08 DI-41
DI-168 Design Idea
®
TOPSwitch-GX
20 W Single Stage Flyback Power Supply With PFC for LED Ballasts

LED Ballast TOP247YN 20 W 85 – 277 VAC 12 V – 18 V, 1.67 A PFC Flyback
Design Highlights circuit and program the average load current to 1.67 A. At no-
• Universal input range allows single design to be used worldwide load, the output voltage is limited to about 18 V by R16 and VR2.
• Single stage PFC based CV/CC power supply
• Meets minimum PF requirement of 0.9 for commercial environ- For high power factor and low harmonic content, U1 must operate
ment (ENERGY STAR SSL VER 1.0) at constant duty cycle over an AC input line frequency cycle. This
• Meets harmonic content limits as specified in IEC 61000-3-2 for is achieved by designing the loop gain crossover to be well below
Class C Equipment (see Figure 2) 100 Hz, the lowest rectified AC frequency. For this design, gain
• High efficiency (~80%) across entire input range crossover occurs at ~30 Hz at low line and ~40 Hz at high line.
• Meets EN55015 B conducted EMI limits with >10 dBμV margin
• Auto-restart provides indefinite output short circuit withstand Capacitor C10 and R6 set the dominant pole at approximately
0.02 Hz, with R7 creating a zero at 200 Hz to improve phase
Operation margin at gain crossover. To isolate C10 from the CONTROL pin,
The isolated flyback converter shown in Figure 1 is a single stage where it would change the startup and auto-restart timing, Q1 is
PFC-based LED ballast power supply. It can deliver an average configured as an emitter follower driven by the output of U2B.
output current of 1.67 A at 12 V, which makes it ideal for driving Looking into the emitter, C10 appears to be larger
high current LED arrays. High power factor is achieved by (C10 × Q1hfe), and R6 appears to be smaller (R6 / Q1hfe). This
operating a flyback converter in discontinuous conduction mode provides an equivalent capacitance value that is large enough to
with minimal input capacitance. This results in a drain current maintain a constant current into the CONTROL pin of U1 and
envelope that follows the incoming AC voltage waveform. As therefore duty cycle over an AC line cycle.
discontinuous conduction mode results in higher primary RMS
currents, a TOP247YN was selected to minimize the RDS(ON) of the The CONTROL pin bypass capacitor (C5) is just large enough to
MOSFET, reduce dissipation and improve overall efficiency. allow proper start-up as well as steady state operation. A larger
value of C5 would increase start-up delay time.
Resistors R11, R12, R23, Q2, Q3, Q4 and their associated
circuitry, together with the LED in U2, form a low-drop CC sense An optional soft-start circuit is formed by D12, C15, C16, R18 to
R21 and Q5. Prior to the output reaching regulation, Q5 is biased
C8 C19
R24 470 pF R22 1 nF
13 k7 250 VAC 27 7 100 V
R1 VR1 R3 C11, C12 C13
L2 47 k7 D5 P6KE 100 k7 1500 MF R10 10 nF
220 MH 1/2 W 1N4007 200 A 2W D10 MBR1060 25 V 10 k7 50 V 12 V, 1.67 A
1 10
C6 9
2.2 nF R14 VR2
D1-D4 1 kV D11 MBR1060 470 7 1N5247B
RL207 17 V
C18 2 D12
150 nF C20 1N4002 Q4
NC NC R29 1 nF
305 VAC R2 7,6 27 7 100 V 2N3906 R16
C3 C4 33 7 R9 200 7
0.5 W C17 C15
220 nF 10 MF 47 MF 150 7
450 V R25 470 pF
630 V 27 7 1 kV R18 25 V R15
D7 100 k7 1 k7
L1 1N4007GP 1/8 W R20 Q2 1/8 W
5 mH D9 1N4002 200 7 2N3904
L3 1/8 W R13
220 MH Q5 1 k7
4 R5 2N3906 1/8 W
C7
330 MF 10 k7 R19
C1 1/8 W R12, 1.8 7 Q3
25 V 10 7
100 nF D6 5 1/8 W R11 2N3904
305 VAC UF5404 0.2 7 R17
T1 C16 1.6 k7
EE28 47 MF
F1 RV1 25 V R23 U2A RTN
TOPSwitch-GX R21 LTV817A
3A 320 VAC Q1 200 7 1.8 7
U1 1/8 W 1W
TOP247YN 2N3904
D L
D8
85 - 277 CONTROL 1N4148 U2B
VAC C LTV817A
R7
24 7
R4 2W
S X F
22 7 R6
1/8 W 300 k7
R31 C14 1/8 W
18.2 k7 100 nF C10
1% C5 33 MF C9
50 V 470 pF
22 MF 25 V
16 V 250 VAC
PI-4882-021408
Figure 1. 20 W Single Stage Power Factor Corrected LED Driver Power Supply, Using a TOP247YN Device.
www.powerint.com February 2008

on while C16 charges to VE(Q5) – VBE(Q5). Current is fed into the increasing the third harmonic content in the input current
CONTROL pin of U1 via U2, which ensures that the output waveform.
reaches regulation without glitching (due to entering auto-restart). • The size of the transformer should be based on thermal
At power down, C16 is reset by discharging via R18. evaluation. Due to higher RMS currents in windings and core
AC flux, a larger transformer is typically required than a standard
The two secondary windings of the transformer are rectified by DC fed flyback.
D10 and D11, filtered by C11 and C12. • Diode D6 must be an ultra-fast type. It prevents reverse
currents from flowing through the TOPSwitch during its off time,
The primary clamp circuit is formed by D7, R2, R3, C6 and VR1. the result of the small input capacitance.
During normal operation, R3 and C6 set the clamping voltage, • The secondary is split into 2 parallel windings and 2 separate
with VR1 defining the maximum clamp voltage during start-up and diodes for improved efficiency.
load transients. Slow glass passivated diode D7 has a reverse
recovery time of 2 μs and helps recover some of the leakage
80
PI-4913-112807
energy thereby improving efficiency. Resistor R2 damps out high
frequency ringing and helps reduce EMI. 70
QP
Key Design Points 60
• On application of AC input, the inductance in the line causes a AV
50
voltage spike. Startup capacitor C4 stabilizes the DC bus voltage
as it charges through diode D5. Once in steady state, the 40
dBµV
capacitor is effectively decoupled from the circuit by D5. Resistor
30
R1 is the bleeder to discharge C4 during power down. This
arrangement also provides protection against differential mode 20
voltage surges.
10
• Use PIXls spreadsheet to design the transformer. Enter the peak
power (33 W), which corresponds to the average power of 0
20 W. Enter a minimum DC voltage equal to the peak of the
-10
minimum input AC voltage to determine the correct value of
primary inductance. -20
• Set the value of KP to 1.0 to ensure critically discontinuous 0.15 1.0 10.0 100.0
mode at the peak of minimum AC input voltage. Ensure that the MHz
converter operates in discontinuous mode (during steady state Figure 3. Worst Case Conducted EMI (230 VAC With Output Grounded)
Measured Against EN55015 Limits.
operation) at all times.
• Ensure that gain crossover occurs below 40 Hz. A higher
bandwidth is undesirable as this degrades power factor by Transformer Parameters
EE28 NC-2H or equivalent, gapped for ALG
250 Core Material
PI-4914-021208
of 452 nH/t²
Bobbin EE28, 10 pin, Vertical
200
Shield: 20T × 2, AWG 33, tape
Input Current (mA)
Primary: 20T × 1, AWG 27, tape

150 Shield: 4T × 4, AWG 25, tape
Winding Details
115 VAC Secondary: 4T × 2, AWG 23 T.I.W.
230 VAC Bias: 7T × 4, AWG 30, tape
100 Primary: 20T × 1, AWG 27, tape
Shield (1–NC), Primary (2–3), Shield (NC–1),
Winding Order
+12 V (9,10–6,7), Bias (4–5), Primary (3–1)
50
Primary Inductance 724 μH, ±10%
Primary Resonant 855 kHz (minimum)
0 Frequency
1 2 3 4 5 6 7 8 9 10 Leakage 10 μH (maximum)
Inductance
Harmonic
Table 1. Transformer Parameters. (NC = No Connection,
Figure 2. Harmonic Content Measured at 115 VAC and 230 VAC. T.I.W. = Triple Insulated Wire)
A
02/08 DI-168

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Design Example Report

20 W Single Output, Power Factor Corrected

Summary and Features

Figure 1 – Populated Circuit Board Photograph.

2 Power Supply Specification

Description Symbol Min Typ Max Units Comment

Figure 3 – PCB Layout.

Detailed descriptions of each function block are given below.

5.1 Input EMI Filtering

5.2 TOPSwitch Primary

To overcome this difficulty, an emitter follower (Q1) was used as an impedance

5.3 Output Rectification

5.4 Output Feedback

5.4.1 Constant Voltage Operation

5.4.2 Constant Current Operation

15 2 C19 1 nF 1 nF, 100 V, Ceramic, COG B37979G1102J0 Epcos

18 1 D6 UF5404 400 V, 3 A, Ultrafast Recovery, 75 ns, UF5404-E3 Vishay

21 2 D9 D12 1N4002 100 V, 1 A, Rectifier, DO-41 1N4002 Vishay

24 1 HS1 HEATSINK HEATSINK, Alum, TO-220 2 hole, 2 Power

27 2 L2 L3 220 µH 220 µH, 0.68 A, 9 x 11.5 mm SBC3-221-681 Tokin

28 3 Q1 Q2 2N3904 NPN, Small Signal BJT, 40 V, 0.2 A, 2N3904RLRAG On

29 2 Q4 Q5 2N3906 PNP, Small Signal BJT, 40 V, 0.2 A, 2N3906 Fairchild

31 1 R2 33 33 R, 5%, 1/2 W, Carbon Film CFR-50JB-33R Yageo

32 1 R3 100 k 100 k, 5%, 2 W, Metal Oxide RSF200JB-100K Yageo

33 1 R4 22 22 R, 5%, 1/8 W, Carbon Film CFR-12JB-22R Yageo

34 2 R5 R10 10 k 10 k, 5%, 1/8 W, Carbon Film CFR-12JB-10K Yageo

35 1 R6 300 k 300 k, 5%, 1/8 W, Carbon Film CFR-12JB-300K Yageo

36 1 R7 24 24 R, 5%, 1/8 W, Carbon Film CFR-12JB-24R Yageo

37 1 R9 150 150 R, 5%, 1/8 W, Carbon Film CFR-12JB-150R Yageo

38 1 R11 0.20 0.20 R, 1%, 1 W 2306 327 52007 Phonex

39 2 R12 1.8 1.8 R, 5%, 1/4 W, Carbon Film CFR-25JB-1R8 Yageo

42 3 R16 200 200 R, 5%, 1/8 W, Carbon Film CFR-12JB-200R Yageo

44 1 R18 100 k 100 k, 5%, 1/8 W, Carbon Film CFR-12JB-100K Yageo

45 1 R19 10 10 R, 5%, 1/8 W, Carbon Film CFR-12JB-10R Yageo

46 3 R22 27 27 R, 5%, 1/4 W, Carbon Film CFR-25JB-27R Yageo

47 1 R24 13 k 13 k, 5%, 1/4 W, Carbon Film CFR-25JB-13K Yageo

48 1 R31 18.2 k 18.2 k, 1%, 1/4 W, Metal Film MFR-25FBF- Yageo

7.1 Electrical Diagram

Figure 4 – Transformer Electrical Diagram.

7.2 Electrical Specifications

7.4 Transformer Build Diagram

WD6: 2nd Half Primary 1

WD1: Cancellation 1 20T x 2 #33

Figure 5 – Transformer Build Diagram.

7.5 Transformer Construction

ENTER TOPSWITCH-GX VARIABLES

ENTER TRANSFORMER CORE/CONSTRUCTION VARIABLES

AE 0.86 cm^2 Core Effective Cross Sectional Area

DC INPUT VOLTAGE PARAMETERS

CURRENT WAVEFORM SHAPE PARAMETERS

TRANSFORMER PRIMARY DESIGN PARAMETERS

TRANSFORMER SECONDARY DESIGN PARAMETERS (SINGLE OUTPUT EQUIVALENT)

Secondary Bare Conductor minimum

VOLTAGE STRESS PARAMETERS

EFFICIENCY Vs LINE VOLTAGE AT FULL LOAD

Line Voltage (AC)

Figure 6 – Efficiency vs Input Voltage, Room Temperature, 60 Hz.

9.2 Line Regulation

LINE REGULATION AT FULL LOAD

Figure 7 – Line Regulation, Room Temperature, Full Load.

9.3 Harmonic Content

Input Current Harmonic Content

Figure 8 – Input Current Harmonic Content at Full Load.