PART – A

Marks
Thinking
Q.
Question Skill
No.
(Bloom’s
Taxonomy)

1. Identify the trigger input required to the 555-timer monostable operation. (R)
A) greater than (2/3)Vcc
B) greater than (1/3)Vcc and less than (2/3)Vcc
C) less than (1/3)Vcc
D) greater than (1/3)Vcc

2. In 555-timer, when upper comparator triggers (+Vsat) then (U)

A) Output resets
B) the timing capacitor started charging
C) Filp-flop set to high
D) the transistor Q1 goes to cutoff region
3. In 555-timer based monostable operation the external timing capacitor charges (U)
through an external resistance R and it discharges through _____________
A) external resistance
B) internal 5KΩ resistance
C) internal and external resistance
D) internal transistor Q1
4. In 555-timer astable operation, Recall the output across the timing capacitor C. (R)
A) Square wave
B) saw tooth wave
C) Rectangular wave
D) Triangular wave
5. To obtain 50% duty cycle , identify the component added to the 555-timer astable (R)
circuit configuration.
A) One more capacitor
B) a resistance in series with Ra
C) a resistance in series with Rb
D) a diode across Rb
6. In 555-timer astable operation, the external timing capacitor charges through (R)
external resistance Ra and Rb and it discharges through _____________
A) external resistance Ra and Rb
B) internal 5KΩ resistance
C) external resistance Rb and internal transistor Q1
D) external resistance Ra
 7. Choose the application of 555-timer based astable operation. (R)
A) detect missing pulse
B) generate FSK
C) divide frequency
D) generate linear ramp
8. Recall the application of 555-timer based monostable operation. (R)
A) detect missing pulse
B) generate FSK
C) modulate pulse-position
D) Schmitt Trigger
9. Schmitt trigger in VCO is designed with an output voltage variation of (R)
A) 0.5Vcc to 0.25Vcc
B) Vcc to 0.5Vcc
C) 0.5Vcc to 0 c
D) Vcc to 0.25Vcc
10. In VCO, point the output across the timing capacitor C. (R)
A) square wave
B) saw tooth wave
C) Rectangular wave
D) Triangular wave
11. When PLL is operating in lock-in range, low pass filter output equals (R)
A) AC signal with a frequency =fo
B) AC signal with a frequency =fo+fs
C) DC signal
D) AC signal with a frequency =fo+2fs
12. Select the suitable statement for PLL. (U)
A) It has an adder circuit
B) It has a Schmitt trigger circuit
C) It has a high pass filter
D) VCO gets an external modulating input
When a modulated input is given to PLL, the demodulated output can be obtained
13. (R)
at
A) PLL output
B) VCO output
C) phase detector output
D) LPF output
14. __________ controls the lock-in range and capture range of PLL. (U)
A) Low pass filter
B) VCO
 C) Phase comparator
D) Amplifier
15. Choose the other name for free running multivibrator. (R)
A) Stable multivibrator
B) Voltage control oscillator
C) Square wave oscillator
D) Pulse stretcher
16. Point out the state of phase-locked loop that tracks any change in input frequency. (An)
A) Free running state
B) Capture state
C) Phase locked state
D) In both capture and free running state
17. Choose the function of low pass filter in phase-locked loop? (R)
A) Improves low frequency noise
B) Removes high frequency noise
C) Tracks the voltage changes
D) Changes the input frequency
18. Identify the conversion ratio of the phase detector in 565 PLL. (R)
A) 0.14
B) 0.35
C) 0.4458
D) 0.7
19. Given fo = 1.2kHz and V = 13v, Compute the lock-in range of monolithic Phase- (Ap)
Locked Loop.
A) ±575Hz
B) ±720Hz
C) ±150Hz
D) ±1kHz
20. A monostable multivibrator has R = 120kΩ and the time delay T = 1000ms, (Ap)
calculate the value of C.
A) 0.9µF
B) 1.32µF
C) 7.5µF
D) 2.49µF
21. How can a monostable multivibrator be modified into a linear ramp generator? (Ap)
A) Connect a constant current source to trigger input
B) Connect a constant current source to trigger output
C) Replace resistor by constant current source
D) Replace capacitor by a constant current source
22. Determine the time period of a monostable 555 multivibrator. (E)
 A) T= 0.33RC
B) T= 1.1RC
C) T= 3RC
D) T= RC
23. Identify the way to overcome mistriggering on the positive pulse edges in the (R)
monostable circuit.
A) Connect a RC network at the input
B) Connect an integrator at the input
C) Connect a differentiator at the input
D) Connect a diode at the input
24. Identify the following that can be used to detect the missing heart beat. (R)
A) Monostable multivibrator
B) Astable multivibrator
C) Schmitt trigger
D) Voltage Controlled Oscillator
25. How does a monostable multivibrator use as frequency divider? (R)
A) Using a square wave generator
B) Using a triangular wave generator
C) Using a sawtooth wave generator
D) Using a sine wave generator

PART – B

Thinking
Skill
Q.
Question (Blooms
No.
Taxono
my)
1. Label the pin details of IC 555 timer. R

2. Identify the need for active filters. R

3. Define free running frequency. R

4. Recall the functional block diagram of the PLL. R

5. Define Lock-in Range. R

6. Analyze the effect of having a large capture range. An

7. Name the main blocks of a PLL. R

8. Recall the Schematic symbol of the Multiplier. R

9. List any four applications of Analog multiplier. R

10. Define Voltage to Frequency conversion factor. R

11. Name the important features of the 555 timer. R

12. Define voltage regulation. R

13. List the three stages through which PLL operates. R

14. Define ripple rejection. R

15. Define Pull time of the PLL. R

Determine the output pulse width of the monostable amplifier using 555 timer if
16. E
R=10 kilo ohm and C=0.01 µF.
17. Recall the block diagram of PLL as frequency multiplier. R

18. Examine the relation between the capture range and lock range in a PLL. An

19. Indicate the reasons for VCO called as voltage to frequency converter. U

20. What is meant by capture range in a PLL? R

PART – C
 Thinkin
g Skill
Marks
Q. No. Question (Blooms
Allotted
Taxonom
y)
1.
Explain about the functional diagram of 555 timer and its Monostable operation. 12 U
2.
Examine the operation of the linear ramp generator in 555 timer. 12 Ap
3.
Explain about astable operation of 555 timer 12 U
Interpret the steps to get the following circuits using 555 timer in monostable
mode.
4.
a) Frequency divider 12 U
b) Pulse width modulation
c) Missing pulse detector
5. Analyze the application of 555 timer in astable mode
a) As a FSK generator
12 An
b) Pulse Position Modulator
c) Schmitt trigger
6. Illustrate the application of PLL as amplitude modulation detector and FSK
12 U
demodulator with neat diagrams.
7. Examine schematically how PLL can be used as
a) Frequency multiplier 12 Ap
b) Frequency translator
8.
Explain the block diagram of PLL and derive the expression for Lock-in range 12 U
9. With a neat functional diagram, explain the operation of the VCO. Also derive an
12 U
expression for fo.
10.
Discuss procedure to get the expression for capture range. 12 U
11.
Explain about analog phase detector used in PLL system. 12 U
12.
Explain about digital phase detector used in PLL system. 12 U
13. With block diagram explain the principle of operation of NE/SE 565 Monolithic
12 U
Phase-Locked loop.
14. Compare the two operating mode of 555 Timer and list the important features of
12 An
555 Timer.
15. Explain about Analog Multipliers and their applications as
a) Voltage Divider 12 U
b) Frequency Doubler
16.
Discuss about analog multiplier IC AD 533 and its role as multiplier and squarer. 12 U
17. Discuss about analog multiplier IC AD 534 and its role as a divider and square
12 U
rooter.
18. Explain the working of a Four quadrant variable transconductance multiplier.
12 U
Derive the expression for its output voltage.
19. Compute the closed loop analysis of PLL and explain any two applications of the
12 U
PLL.
20. Explain the voltage controlled oscillator with a neat block diagram. Give its 12 U
typical connection diagram and its output waveforms.