WHEN EVERYTHING IS IDEAL…..

An ideal op-amp has the following characteristics:

Infinite input resistance Draws no current at input terminals;

Zero output resistance  Acts like a perfect voltage source;
Infinitely large A – open-loop/ differential gain;
Zero common mode gain or, equivalently, infinite CMMR;
Infinite bandwidth;

An Ideal amplifier operation: Vout = A (V+ - V- )

An Op-amp application circuit – A Non-inverting amplifier

Vout = A (V+ - V- )
Vout
(V+ - V- ) = = 0 ® V+ = V- = Vin
A
V
i = in
R1
Vin R
Vout = V- + iR fb = Vin + × R fb = (1+ fb )Vin
R1 R1

Hence, this non-inverting amplification circuit has a closed-loop gain of exactly 2.

Attach a source and a load, and take input and output resistances of the amplifier into
account, the entire circuit can be represented by the following model:

Ri RL
VL = Aclosed-loop Vs
Ri + Rs RL + Ro
And since Ri=infinite and Ro=0;

VL = Aclosed-loop Vs = 2Vs
However, in Practical Situation….
Experimental results from op-amp section 2.2:

Vs=1.37V and VL=2.56V VL » 1.87Vs < 2Vs

The reduction in practical overall gain emerged from the following factors:

An op-amp is made of transistors. (BJTs and MOSFETs)

For a BJT:

If we apply a base voltage: vB (t) = Vb + vb (t)

then the base-emitter voltage is: vBE (t) = Vbe + vbe (t)

the output collector current will be: i C(t) = I C + ic (t) = IC + gm vbe (t)
iC (t) Ic g m vbe (t)
the base current is then: i B(t) = I B+ i b(t) = = +
b b b
gm
small signal part: i b(t) = vbe (t)
b
gm ic (t) = gm vbe (t)
rbe =
b
For Small signal operation, A BJT can therefore be represented by the model below:

Where ro (rce ) models the Early effect.

1) Finite Input resistance

The input stage of a typical op-amp is a

differential amplifier:
gm
There exists a finite input differential resistance Ri = 2rbe = 2
b
which is the total resistance of between the two
bases: gm
Ri = 2rbe = 2
b

When Ri is no longer infinite, only a proportion of

Vs: Ri gets amplified.
Vin = Vs
Ri + Rs
We want Ri as large as possible – A MOSFTE
differential amplifier stage can be used instead.

is typically of the order of 10^14 Ω due to

extremely high resistance of the silicon oxide
layer between gate and channel. 10^16 ohms
m-1.

2) Finite open-loop/differential Gain:

A small signal equivalent circuit for BJT differential amplifier with purely differential inputs -
Vd.

Assume Q 1,2 are identical, then the model is equivalent to two identical CE amplifiers, each
with a gain:

Hence:
Experimental results from op-amp design section 2.2:

The effect of this finite open-loop gain:

Clearly, Ad needs to as large as possible. This can be achieved through the following
methods:
 Taking differential voltage output instead of single-ended output
 Multiple gain stages. With (Darlington pair to reduce loading effect)
 Increase RC – replace it with active load, i.e. current mirror
Calculation the new gain ==
Experimental results ==

3) Non-zero output resistance

Similarly, when Ro is non-zero, the output voltage across the load is only a proportion of
Vout VL = RL Vout
RL + Ro
The output resistance of a differential voltage-gain stage (with current mirror) is:

Typically - A emitter follower is used:

Limited Bandwidth:

IN practical situation, op-amp only have constant gain over a limited bandwidth, then the
gin falls off at -20db-per-decade until unity.

This decrease in gain at higher frequencies end is caused by the capacitive effects internal to
the transistors in the op-amp.

BJT: two pn junctions which have depletion areas that can be modelled using capacitances.
- The BASE-Emitter junction capacitance Cbe
- The collector-Base Junction Capacitance Cbc:

These capacitance value is around the order of picofarads, which means they are short-
circuited at low frequency, and only at high frequency input when they become significant:
For a quick insight of the general high-frequency response, we can replace Cbc with an
equivalent capacitance to the ground, we immediately see that the parallel combination of
Ceq and Cbe foms a first-order low-pass filter with rbe at the input side.

Experimental results