HM40-MV Block Diagram HM40-MV Block Diagram HM40-MV Block Diagram HM40-MV Block Diagram

5 4 3 2 1
Project code: 91.4BW01.001

HM40-MV Block Diagram PCB P/N
REVISION
: 48.4BW01.0SB
: 08242-SB
CLK GEN. Mobile CPU PCB STACKUP
D
ICS 9LPRS365BKLFT (71.09365.A03)
Penryn 479 THERMAL EMC2102 D
SILEGO SLG8SP513VTR(71.08513.003) 32 TOP

3
4, 5 VCC
HOST BUS 667/800/1067MHz@1.05V S
DDR2 DIMM1 SYSTEM DC/DC

S TPS51125 42
667/800 MHz 667/800MHz
Cantiga CRT
GND
INPUTS OUTPUTS
16 AGTL+ CPU I/F BOTTOM
19
DDR Memory I/F
DDR2 DIMM2 INTEGRATED GRAHPICS
LCD
DCBATOUT
5V_S5
3D3V_S5
667/800 MHz 667/800MHz LVDS, CRT I/F 18
17 6,7,8,9,10,11
C X4 DMI SYSTEM DC/DC C
C-Link0
400MHz TPS51124 44
INPUTS OUTPUTS
Codec
ICH9M DCBATOUT
1D05V_S0
AZALIA LAN 1D8V_S3
CX20561 6 PCIe ports PCIex1 TXFM RJ45
PCI/PCI BRIDGE Atheros 25 25
26 AR8114 24 RT9026 43
ACPI 2.0
AR8132 DDR_VREF_S0
MIC In 4 SATA 1D8V_S3
28 12 USB 2.0/1.1 ports DDR_VREF_S3
ETHERNET (10/100/1000MbE)
PCIex1 RT9018A 43
High Definition Audio Mini Card
LPC I/F Kedron a/b/g/n 1D8V_S3 1D5V_S0
28 OP AMP Serial Peripheral I/F

31
G1454 27 CPU DC/DC
B
Matrix Storage Technology(DO) LPC BUS B
INT.SPKR Active Managemnet Technology(DO) ISL6266A 41
INPUTS OUTPUTS
28
BIOS LPC
KBC Winbond
DCBATOUT
VCC_CORE_S0
Line Out KBC773L
W25X16 DEBUG 0.35~1.5V
16M Bits
(NO SPDIF) 33
34 CONN.34
12,13,14,15
CHARGER
USB BQ24745 46
Blue Tooth Camera
Touch INT. INPUTS OUTPUTS
(USB) 22 (USB) 18 Pad 35 KB 33
BT+
HDD SATA
SATA
20 DCBATOUT
DCBATOUT
CardReader MS/MS Pro/xD
USB
A ODD SATA
SATA USB Realtek /MMC/SD 30 UMA Two Phase 2
A
21 2 Port 23 5 in 1
RTS5159 30 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Power Board
BLOCK DIAGRAM
Size Document Number Rev
36 A3
HM40-MV SB
Date: Monday, November 24, 2008 Sheet 1 of 51
5 4 3 2 1
A B C D E
ICH9M Integrated Pull-up Cantiga chipset and ICH9M I/O controller
ICH9M Functional Strap Definitions Hub strapping configuration
ICH9 EDS 642879 Rev.1.5 page 92
and Pull-down Resistors Montevina Platform Design guide 22339
page 218
0.5
Signal Usage/When Sampled Comment ICH9 EDS 642879 Rev.1.5
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 Pin Name Strap Description Configuration
PCIE Port Config1 bit1, pulled low.When TP3 not pulled low at rising edge SIGNAL Resistor Type/Value
Rising Edge of PWROK of PWROK,sets bit1 of RPC.PC(Config Registers: CL_CLK[1:0] PULL-UP 20K CFG[2:0] FSB Frequency 000 = FSB1067
offset 224h). This signal has weak internal pull-down Select 011 = FSB667
CL_DATA[1:0] PULL-UP 20K 010 = FSB800
others = Reserved
4 HDA_SYNC PCIE config1 bit0,
Rising Edge of PWROK.
This signal has a weak internal pull-down.
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
CL_RST0# PULL-UP 20K
CFG[4:3] Reserved
4
DPRSLPVR/GPIO16 PULL-DOWN 20K CFG8
GNT2#/ PCIE config2 bit2, This signal has a weak internal pull-up. CFG[15:14]
GPIO53 Rising Edge of PWROK. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) ENERGY_DETECT PULL-UP 20K CFG[18:17]
GPIO20 Reserved This signal should not be pulled high. HDA_BIT_CLK PULL-DOWN 20K
CFG5 DMI x2 Select 0 = DMI x2
GNT1#/ ESI Strap (Server Only) ESI compatible mode is for server platforms only. HDA_DOCK_EN#/GPIO33 PULL-UP 20K 1 = DMI x4 (Default)
GPIO51 Rising Edge of PWROK This signal should not be pulled low for desttop CFG6 iTPM Host 0= The iTPM Host Interface is enabled(Note2)
and mobile. HDA_RST# PULL-DOWN 20K Interface 1=The iTPM Host Interface is disalbed(default)
HDA_SDIN[3:0] PULL-DOWN 20K 0 = Transport Layer Security (TLS) cipher
Top-Block Sampled low:Top-Block Swap mode(inverts A16 for CFG7 Intel Management suite with no confidentiality
GNT3#/ Swap Override. all cycles targeting FWH BIOS space). HDA_SDOUT PULL-DOWN 20K engine Crypto strap 1 = TLS cipher suite with
GPIO55 Rising Edge of PWROK. Note: Software will not be able to clear the confidentiality (default)
Top-Swap bit until the system is rebooted HDA_SYNC PULL-DOWN 20K
0 = Reverse Lanes,15->0,14->1 ect..
without GNT3# being pulled down. GLAN_DOCK# The pull-up or pull-down active when configured for native CFG9 PCIE Graphics Lane 1= Normal operation(Default):Lane
GLAN_DOCK# functionality and determined by LAN controller
Numbered in order
GNT0#: Boot BIOS Destination Controllable via Boot BIOS Destination bit GNT[3:0]#/GPIO[55,53,51] PULL-UP 20K
SPI_CS1#/ Selection 0:1. (Config Registers:Offset 3410h:bit 11:10). 0 = Enable (Note 3)
GPIO58 Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. GPIO[20] PULL-DOWN 20K CFG10 PCIE Loopback enable 1= Disabled (default)
Integrated TPM Enable, Sample low: the Integrated TPM will be disabled. GPIO[49] PULL-UP 20K 00 = Reserve
Rising Edge of CLPWROK Sample high: the MCH TPM enable strap is sampled CFG[13:12] XOR/ALL 10 = XOR mode Enabled
SPI_MOSI low and the TPM Disable bit is clear, the LDA[3:0]#/FHW[3:0]# PULL-UP 20K 01 = ALLZ mode Enabled (Note 3)
Integrated TPM will be enable. 11 = Disabled (default)
LAN_RXD[2:0] PULL-UP 20K
3 DMI Termination Voltage, The signal is required to be low for desktop LDRQ[0] PULL-UP 20K
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled (Default) 3
Rising Edge of PWROK. applications and required to be high for
GPIO49 mobile applications. LDRQ[1]/GPIO23 PULL-UP 20K 0 = Normal operation(Default):
CFG19 DMI Lane Reversal Lane Numbered in Order
PME# PULL-UP 20K
1 = Reverse Lanes
PCI Express Lane Signal has weak internal pull-up. Sets bit 27 PWRBTN# PULL-UP 20K DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)
SATALED# Reversal. Rising Edge of MPC.LR(Device 28:Function 0:Offset D8) DMI x2 mode[MCH -> ICH]:(3->0,2->1)
of PWROK. SATALED# PULL-UP 15K
SPKR No Reboot. If sampled high, the system is strapped to the SPI_CS1#/GPIO58/CLGPIO6 PULL-UP 20K Digital Display Port 0 = Only Digital Display Port
Rising Edge of PWROK. "No Reboot" mode(ICH9 will disable the TCO Timer (SDVO/DP/iHDMI) or PCIE is operational (Default)
system reboot feature). The status is readable SPI_MOSI PULL-DOWN 20K CFG20 Concurrent with PCIe 1 =Digital display Port and PCIe are
via the NO REBOOT bit. operting simulataneously via the PEG port
SPI_MISO PULL-UP 20K
0 =No SDVO Card Present (Default)
TP3 XOR Chain Entrance. This signal should not be pull low unless using SPKR PULL-DOWN 20K SDVO_CTRLDATA SDVO Present
Rising Edge of PWROK. XOR Chain testing. 1 = SDVO Card Present
TACH_[3:0] PULL-UP 20K
0 = LFP Disabled (Default)
GPIO33/ Flash Descriptor Sampled low:the Flash Descriptor Security will be TP[3] PULL-UP 20K Local Flat Panel
HDA_DOCK Security Override Strap overridden. If high,the security measures will be L_DDC_DATA (LFP) Present 1= LFP Card Present; PCIE disabled
_EN# Rising Edge of PWROK in effect.This should only be enabled in manufacturing USB[11:0][P,N] PULL-DOWN 15K
environments using an external pull-up resister. NOTE:
1. All strap signals are sampled with respect to the leading edge of
the (G)MCH Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the
2 Flash-decriptor section of the Firmware. This 'Soft-Strap' is 2
activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.
SMBus
EMC2102 Thermal
USB Table
KBC
USB
BAT_SCL
Pair Device BATTERY
PCIE Routing 0 USB1
LANE1 LAN Atheros AR8114A
1 NC
LANE2 MiniCard WLAN
2 NC
LANE3 NC
3 MINIC1
LANE4 NC
4 WEBCAM
LANE5 NC
5 NC
LANE6 NC
1 6 NC ICH9M
UMA Two Phase 2
1
7 Bluetooth
Wistron Corporation
8 NC 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
9 USB2(High speed)
Title
10 NC SMBC_ICH 9LPRS365BKLFT
Reference
11 CardReader Size Document Number Rev
A3
DDR HM40-MV SB
A B C D E
1D05V_S0 3D3V_S0 3D3V_S0

3D3V_S0 1015 modify component size of R95 SB DY 1015 modify component size of R87
1124 add R302 1 R302 2 1015 modify component size of R80
1 R95 2 3D3V_48MPW R_S0 Do Not Stuff 3D3V_CLKGEN_S0 1 R87 2
3D3V_S0 3D3V_CLKPLL_S0 1 R80 2
1
0R2J-2-GP C221 C227 C204 C179 C226 C224 C1550R2J-2-GP C205
1
SC1U16V3ZY-GP
DY C165 C149 C176 C156 C196 C173 0R2J-2-GP C152 DY
Do Not Stuff
Do Not Stuff
SC4D7U10V5ZY-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Do Not Stuff
DY DY DY DY
2
4
3
2
1
DY
2
SRN10KJ-6-GP
RN61
4 4
5
6
7
8
3D3V_CLKGEN_S0 0915 add EC34 for EMI demand
RN62
24 PCIE_REQ_LAN# 1 8 PCIE_REQ_LAN#_R CLK_ICH14 PCLK_KBC PCLK_ICH CLK48_ICH CLK48_5159
13 SATACLKREQ# 2 7 PCLKCLK0
1
Do Not Stuff
Do Not Stuff
31 PCIE_REQ_MINI# 3 6 PCIE_REQ_MINI#_R 3D3V_48MPW R_S0 3D3V_CLKPLL_S0
Do Not Stuff
Do Not Stuff
Do Not Stuff
7 CLK_MCH_OE# 4 5 PCLKCLK1 EC31 EC62 EC66 EC33 EC34
SB
2
SRN470J-3-GP 1127 swap the nets of RN61 and RN62 DY DY DY DY DY
SB 1120 add RN61 and RN62
CL=20pF±0.2pF SB 1120 modify RN61 and RN62
16
46
62
23
19
27
43
52
33
56
4
9
U14
C229 SB 1126 modify RN61 and RN62 PCLK_FW H
VDD48
VDDPLL3
VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO
VDDSRC
VDDCPU
VDDPCI
VDDREF
SC33P50V2JN-3GP
1
Do Not Stuff
1 2 GEN_XTAL_IN
61 CLK_CPU_BCLK 4 EC25
X4 R91 CPUT0
60 CLK_CPU_BCLK# 4 CPU
2
CPUC0
1
X-14D31818M-35GP 0R2J-2-GP
82.30005.891 2 1 GEN_XTAL_OUT 3 58 CLK_MCH_BCLK 6
X1 CPUT1_F
2nd = 82.30005.951 2 X2 CPUC1_F 57 CLK_MCH_BCLK# 6 NB DY
2
RN20 CPUT2_ITP/SRCT8 54 CLK_PCIE_LAN 24

GEN_XTAL_OUT_R
1 2 30 CLK48_5159 1
2
4
3 CLK48 17 CPUC2_ITP/SRCC8 53 CLK_PCIE_LAN# 24 LAN
13 CLK48_ICH USB_48MHZ/FSLA
C230
SC33P50V2JN-3GP 4,7 CPU_SEL0 2 SRN22-3-GP
1 SRCT7/CR#_F 51 PCIE_REQ_LAN#_R SB 1126 add the net(PCIE_REQ_LAN#)
R88 2K2R2J-2-GP 50
3 SRCC7/CR#_E 3
13 PM_STPPCI# 45 PCI_STOP#
13 PM_STPCPU# 44 CPU_STOP# SRCT6 48
47
CLK_PCIE_ICH 13 SB DMI
SRCC6 CLK_PCIE_ICH# 13
3D3V_S0
SB 1120 swap these
41
7
SRCT10
42
nets(CLK_MCH_3GPLL,CLK_MCH_3GPLL#,
4,7 CPU_SEL2 3D3V_S0 15,16,17 SMBC_ICH SCLK SRCC10
15,16,17 SMBD_ICH 6 SDATA
CLK_PCIE_MINI1,CLK_PCIE_MINI1#)
SRCT11/CR#_H 40
13 CLK_PW RGD 63 CK_PWRGD/PD# SRCC11/CR#_G 39 PCIE_REQ_MINI#_R SB 1126 add the net(PCIE_REQ_MINI#)
8
7
6
5
2 DY 1
RN28 R89 Do Not Stuff 37 CLK_PCIE_MINI1 31
SRCT9
SRN10KJ-6-GP
PCLKCLK0 8
SRCC9 38 CLK_PCIE_MINI1# 31 MINI1
PCLKCLK1 PCI0/CR#_A
10 PCI1/CR#_B SRCT4 34 CLK_MCH_3GPLL 7
PCLKCLK2
RN23 11 35 CLK_MCH_3GPLL# 7 NB CLK
1
2
3
4
PCLKCLK2 CPU_SEL2_R PCI2/TME SRCC4

13 CLK_ICH14 1 8 12 PCI3
2 7 PCLKCLK3 13 PCI4/27_SELECT SRCT3/CR#_C 31 SB 1120 move these nets
CPU_SEL2_R 33 PCLK_KBC 3 6 PCLKCLK4 14 32
PCLKCLK4 4 5 PCLKCLK5 PCI_F5/ITP_EN SRCC3/CR#_D (CLK_PCIE_MINI1,CLK_PCIE_MINI1#)
13 PCLK_ICH
PCLKCLK5
SRN33J-7-GP 28 CLK_PCIE_SATA 12
SRCT2/SATAT
64
SRCC2/SATAC 29 CLK_PCIE_SATA# 12 SB SATA
4,7 CPU_SEL1 FSLB/TEST_MODE
CPU_SEL2_R 5 REF0/FSLC/TEST_SEL
27MHZ_NONSS/SRCT1/SE1 24 DREFSSCLK 7
34 PCLK_FW H 2 1 PCLKCLK3 55 NC#55 27MHZ_SS/SRCC1/SE2 25 DREFSSCLK# 7
ER5 Do Not Stuff
20
NB CLK
GNDSRC
GNDSRC
GNDSRC
GNDCPU
DREFCLK 7
GNDREF
SRCT0/DOTT_96
GNDPCI
DY 21 NB CLK
GND48
2 SRCC0/DOTC_96 DREFCLK# 7 2
1014 add ER5 for EMI deamnd
GND
GND
GND
(96 MHz)
ICS9LPRS365BKLFT-GP-U
ICS9LPRS365BKLFT setting table
18
15
1
22
30
36
49
59
26
65
71.09365.A03
PIN NAME DESCRIPTION 2nd = 71.08513.003
Byte 5, bit 7
0 = PCI0 enabled (default)
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
PCI0/CR#_A Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default), SEL2 SEL1 SEL0
1= CR#_A controls SRC2 pair CPU FSB
FSC FSB FSA
Byte 5, bit 5
0 = PCI1 enabled (default) PIN NAME DESCRIPTION 100M X
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair 1 0 1
PCI1/CR#_B Byte 5, bit 4 Byte 5, bit 1
133M 533M
0 = CR#_B controls SRC1 pair (default) 0 = SRC3 enabled (default) 0 0 1
1= CR#_B controls SRC4 pair 1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair
SRCC3/CR#_D Byte 5, bit 0 0 1 1 166M 667M
0 = Overclocking of CPU and SRC Allowed 0 = CR#_D controls SRC1 pair (default)
PCI2/TME 1 = Overclocking of CPU and SRC NOT allowed 1= CR#_D controls SRC4 pair 0 1 0 200M 800M
3.3V PCI clock output Byte 6, bit 7 0 0 0 266M 1066M
PCI3 0 = SRC7# enabled (default)
SRCC7/CR#_E 1= CR#_F controls SRC6
0 = Pin24 as SRC-1, Pin25 as SRC-1#, Pin20 as DOT96, Pin21 as DOT96#
1
PCI4/27M_SEL 1 = Pin24 as 27MHz, Pin25 as 27MHz_SS, Pin20 as SRC-0, Pin21 as SRC-0# Byte 6, bit 6
UMA Two Phase 2 1
0 = SRC7 enabled (default)

0 =SRC8/SRC8# SRCT7/CR#_F 1= CR#_F controls SRC8
PCI_F5/ITP_EN 1 = ITP/ITP# Wistron Corporation
Byte 6, bit 5 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Byte 5, bit 3 0 = SRC11# enabled (default) Taipei Hsien 221, Taiwan, R.O.C.
0 = SRC3 enabled (default) SRCC11/CR#_G 1= CR#_G controls SRC9
1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair Title
SRCT3/CR#_C Byte 5, bit 2 Byte 6, bit 4 Clock Generator
0 = CR#_C controls SRC0 pair (default), 0 = SRC11 enabled (default)
1= CR#_C controls SRC2 pair SRCT11/CR#_H 1= CR#_H controls SRC10 Size Document Number Rev
HM40-MV SB
Date: Monday, December 01, 2008 Sheet 3 of 51
A B C D E
A B C D E
H_A#[35..3]
6 H_A#[35..3]
H_DINV#[3..0]
H_DINV#[3..0] 6
U33A 1 OF 4 1 H_DSTBN#[3..0]
H_DSTBN#[3..0] 6
TP11 Do Not Stuff
H_A#3 J4 H1 1D05V_S0 H_DSTBP#[3..0]
A3# ADS# H_ADS# 6 H_DSTBP#[3..0] 6
H_A#4 L5 E2 H_BNR# 6
H_A#5 A4# BNR# H_D#[63..0]
4 L4 A5# BPRI# G5 H_BPRI# 6 H_D#[63..0] 6 4
ADDR GROUP 0
H_A#6 K5 A6#
1
H_A#7 M3 H5 H_DEFER# 6
H_A#8 A7# DEFER# R64 Place testpoint on
N2 F21
CONTROL
A8# DRDY# H_DRDY# 6
H_A#9 J1 E1 56R2J-4-GP H_IERR# with a GND
A9# DBSY# H_DBSY# 6
H_A#10 N3 0.1" away
H_A#11 A10#
P5 F1 H_BREQ#0 6
2
H_A#12 A11# BR0#
P2 A12#
H_A#13 L2 D20 H_IERR#
H_A#14 A13# IERR#
P4 A14# INIT# B3 H_INIT# 12
H_A#15 P1
H_A#16 A15#
R1 A16# LOCK# H4 H_LOCK# 6
M1 H_CPURST# 6,48 U33B 2 OF 4
6 H_ADSTB#0 ADSTB0#
6 H_REQ#[4..0] RESET# C1 H_RS#[2..0] 6
H_REQ#0 K3 F3 H_RS#0 H_D#0 E22 Y22 H_D#32
H_REQ#1 REQ0# RS0# H_RS#1 H_D#1 D0# D32# H_D#33
H2 REQ1# RS1# F4 F24 D1# D33# AB24
H_REQ#2 K2 G3 H_RS#2 H_D#2 E26 V24 H_D#34
H_REQ#3 REQ2# RS2# H_D#3 D2# D34# H_D#35
J3 REQ3# TRDY# G2 H_TRDY# 6 G22 D3# D35# V26
H_REQ#4 L1 H_D#4 F23 V23 H_D#36
REQ4# D4# D36#
DATA GRP0
H_THERMDA H_D#5 H_D#37
DATA GRP2
HIT# G6 H_HIT# 6 G25 D5# D37# T22
H_A#17 Y2 E4 H_HITM# 6 H_D#6 E25 U25 H_D#38
A17# HITM# D6# D38#
1
H_A#18 U5 H_D#7 E23 U23 H_D#39
H_A#19 A18# C438 H_D#8 D7# D39# H_D#40
H_A#20
R3 A19# BPM0# AD4 DY Do Not Stuff H_D#9
K24 D8# D40# Y25
H_D#41
W6 XDP/ITP SIGNALS AD3 G24 W22
2
A20# BPM1# D9# D41#
ADDR GROUP 1
H_A#21 U4 AD1 H_THERMDC H_D#10 J24 Y23 H_D#42

H_A#22 A21# BPM2# H_D#11 D10# D42# H_D#43
Y5 A22# BPM3# AC4 J23 D11# D43# W24
H_A#23 U1 AC2 H_D#12 H22 W25 H_D#44
H_A#24 A23# PRDY# XDP_BPM#5 H_D#13 D12# D44# H_D#45
R4 A24# PREQ# AC1 F26 D13# D45# AA23
H_A#25 T5 AC5 XDP_TCK H_D#14 K22 AA24 H_D#46
3 H_A#26 A25# TCK XDP_TDI 1D05V_S0 H_D#15 D14# D46# H_D#47 3
T3 A26# TDI AA6 H23 D15# D47# AB25
H_A#27 W2 AB3 XDP_TDO J26 Y26 H_DSTBN#2 6
A27# TDO 6 H_DSTBN#0 DSTBN0# DSTBN2#
H_A#28 W5 AB5 XDP_TMS H26 AA26 H_DSTBP#2 6
A28# TMS 6 H_DSTBP#0 DSTBP0# DSTBP2#
1
H_A#29 Y4 AB6 XDP_TRST# H25 U22 H_DINV#2 6
A29# TRST# 6 H_DINV#0 DINV0# DINV2#
H_A#30 XDP_DBRESET# R63
Side Band H_A#31
U2
V4
A30# DBR# C20
68R2-GP
A31#
Non GTL H_A#32
H_A#33
W3 A32#
H_D#16
H_D#17
N22 D16# D48# AE24 H_D#48
H_D#49
AA4 THERMAL K25 AD24
2
H_A#34 A33# H_D#18 D17# D49# H_D#50
H_A#35
AB2 A34# DY P26 D18# D50# AA21
AA3 A35# PROCHOT# D21 CPU_PROCHOT# 1 2 CPU_PROCHOT#_R 41 H_D#19 R23 D19# D51# AB22 H_D#51
V1 A24 H_THERMDA 32 R62 H_D#20 L23 AB21 H_D#52
6 H_ADSTB#1 ADSTB1# THRMDA D20# D52#
B25 H_THERMDC 32 Do Not Stuff H_D#21 M24 AC26 H_D#53
THRMDC D21# D53#
DATA GRP1
DATA GRP3
12 H_A20M# A6 H_D#22 L22 AD20 H_D#54
A20M# H_D#23 D22# D54# H_D#55
12 H_FERR# A5 FERR# THERMTRIP# C7 PM_THRMTRIP-A# 7,12,39 M23 D23# D55# AE22
ICH
12 H_IGNNE# C4 H_D#24 P25 AF23 H_D#56

IGNNE# H_D#25 D24# D56# H_D#57
P23 D25# D57# AC25
12 H_STPCLK# D5 H_D#26 P22 AE21 H_D#58
STPCLK# H_D#27 D26# D58# H_D#59
12 H_INTR C6 LINT0 HCLK BCLK0 A22 CLK_CPU_BCLK 3 1D05V_S0
T24 D27# D59# AD21
12 H_NMI B4 A21 CLK_CPU_BCLK# 3 H_D#28 R24 AC22 H_D#60
LINT1 BCLK1 H_D#29 D28# D60# H_D#61
12 H_SMI# A3 SMI# L25 D29# D61# AD23
PM_THRMTRIP# H_D#30 T25 AF22 H_D#62
D30# D62#
2
M4 should connect to H_D#31 N25 AC23 H_D#63
RSVD#M4 ICH9 and MCH D31# D63#
N5 RSVD#N5 6 H_DSTBN#1 L26 DSTBN1# DSTBN3# AE25 H_DSTBN#3 6
T2 without T-ing R179 M26 AF24
6 H_DSTBP#1 H_DSTBP#3 6
RESERVED
RSVD#T2 ( No stub) 1KR2F-3-GP DSTBP1# DSTBP3#

V3 RSVD#V3 6 H_DINV#1 N24 DINV1# DINV3# AC20 H_DINV#3 6
B2 Layout Note:
1
RSVD#B2 "CPU_GTLREF0" CPU_GTLREF0 COMP0 R53 27D4R2F-L1-GP
C3 RSVD#C3 AD26 GTLREF COMP0 R26 1 2
D2 0.5" max length. TEST1 C23 MISC U26 COMP1 R51 1 2 54D9R2F-L1-GP
RSVD#D2 TEST1 COMP1
1
D22 TEST2 D25 AA1 COMP2 R45 1 2 27D4R2F-L1-GP
RSVD#D22 TEST2 COMP2
1
2 R181 2
D3 RSVD#D3 DY C352 1RSVD_CPU_12 C24 TEST3 COMP3 Y1 COMP3 R44 1 2 54D9R2F-L1-GP
F6 2KR2F-3-GP Do Not Stuff TP18 TEST4 AF26
RSVD#F6 TEST4
Do Not Stuff
1RSVD_CPU_13 AF1 E5 H_DPRSTP# 7,12,41
2
Do Not Stuff TP20 RSVD_CPU_11 Do Not Stuff TP44 TEST5 DPRSTP#
1 B1 1RSVD_CPU_14 A26 B5 H_DPSLP# 12
2
KEY_NC Do Not Stuff TP60 TEST6 DPSLP#
DPWR# D24 H_DPW R# 6
BGA479-SKT6-GPU7 3,7 CPU_SEL0 B22 D6 H_PW RGD 12,39,48
BSEL0 PWRGOOD
62.10079.001 3,7 CPU_SEL1 B23 BSEL1 SLP# D7 H_CPUSLP# 6
3,7 CPU_SEL2 C21 BSEL2 PSI# AE6 PSI# 41
2nd: 62.10053.401
BGA479-SKT6-GPU7
1D05V_S0 62.10079.001
Layout Note:
Follow Demo Circuit Comp0, 2 connect with Zo=27.4 ohm, make
XDP_TMS R50 1 2 54D9R2F-L1-GP trace length shorter than 0.5" .
Net "TEST4" as short as possible, Comp1, 3 connect with Zo=55 ohm, make
XDP_TDI R48 1 2 54D9R2F-L1-GP trace length shorter than 0.5" .
make sure "TEST4" routing is
XDP_BPM#5 R43 1 2 54D9R2F-L1-GP 1 DY 2 TEST1 reference to GND and away other
R65 Do Not Stuff
noisy signals
1 DY 2 TEST2
H_CPURST# R213 1 DY 2 Do Not Stuff R215 Do Not Stuff
2 1 TEST4
XDP_TCK R41 1 2 54D9R2F-L1-GP C343 Do Not Stuff
DY
1 XDP_TRST# R42 1 2 54D9R2F-L1-GP UMA Two Phase 2 1
3D3V_S0
All place within 2" to CPU
XDP_DBRESET# R60 1 DY 2 Do Not Stuff Wistron Corporation
1D05V_S0 Taipei Hsien 221, Taiwan, R.O.C.
Title
XDP_TDO R47 DY 2 Do Not Stuff
1
CPU (1 of 2)
HM40-MV SB
A B C D E
A B C D E
U33D 4 OF 4
A4 VSS VSS P6
A8 VSS VSS P21
VCC_CORE VCC_CORE VCC_CORE A11 P24
VSS VSS
A14 VSS VSS R2
4
VCC_CORE VCC_CORE A16 R5 4
U33C 3 OF 4 VSS VSS
A19 VSS VSS R22
1
4
C54 C97 C91 C53 C59 C93 C96 C52 A23 R25
VSS VSS
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
A7 AB20 TC6 1 AF2 T1
VCC VCC VSS VSS
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
A9 AB7 DY DY DY DY Do Not Stuff TP46 B6 T4
2
VCC VCC ST900U2D5VM-1-GP VSS VSS
A10 VCC VCC AC7 DY DY DY DY B8 VSS VSS T23
A12 AC9 NEC B11 T26
2
3
VCC VCC VSS VSS
A13 VCC VCC AC12 B13 VSS VSS U3
A15 VCC VCC AC13 77.E9071.011 B16 VSS VSS U6
A20 VCC VCC AC18 B24 VSS VSS V2
B7 VCC VCC AD7 C5 VSS VSS V5
B9 AD9 VCC_CORE 1126 add C48,C49,C71,C79... C8 V22
VCC VCC VSS VSS
B10 VCC VCC AD10 SB C11 VSS VSS V25
B12 VCC VCC AD12 C14 VSS VSS W1
1
B15 AD15 C92 C70 C90 C61 C383 C382 C384 C381 C48 C62 C80 C49 C71 C79 C19 W23
VCC VCC VSS VSS
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
B18 AD18 C22 Y3
2
VCC VCC VSS VSS
B20 VCC VCC AE9 CAP CAP CAP CAP CAP CAP C25 VSS VSS Y6
C9 VCC VCC AE10 D1 VSS VSS Y21
C10 VCC VCC AE12 D4 VSS VSS Y24
C12 VCC VCC AE13 D8 VSS VSS AA2
D9 VCC VCC AF9 D23 VSS VSS AA16
3 D10 AF10 D26 AA19 3
VCC VCC VSS VSS
D12 VCC VCC AF12 E3 VSS VSS AA22
D14 VCC VCC AF14 E6 VSS VSS AA25
D15 VCC VCC AF15 E8 VSS VSS AB1
E7 AF20 1D05V_S0 E16 AB11
VCC VCC VSS VSS
E9 VCC E19 VSS VSS AB13
E10 VCC VCCP G21 E21 VSS VSS AB16
E12 VCC VCCP V6 E24 VSS VSS AB19
E13 VCC VCCP J6 F5 VSS VSS AB23
E15 K6 1D05V_S0 F8 AB26
VCC VCCP VSS VSS
E17 VCC VCCP M6 F11 VSS VSS AC3
1
E18 J21 C84 C68 F13 AC6

VCC VCCP VSS VSS
SCD1U10V2KX-4GP
Do Not Stuff
E20 VCC VCCP K21 F16 VSS VSS AC8
1
F7 M21 DY C78 C69 C81 C82 C83 C63 C65 C66 C446 F19 AC11
2
VCC VCCP VSS VSS

F9 VCC VCCP N21 F2 VSS VSS AC14
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Do Not Stuff
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
Do Not Stuff
F10 N6 layout note: "1D5V_VCCA_S0" F22 AC16
2
VCC VCCP VSS VSS
F12 VCC VCCP R21 as short as possible F25 VSS VSS AC19
F14 VCC VCCP R6 DY DY G4 VSS VSS AC21
F15 VCC VCCP T21 G1 VSS VSS AC24
F17 VCC VCCP T6 G23 VSS VSS AD2
F18 V21 1D5V_S0 G26 AD5
VCC VCCP 1D5V_VCCA_S0 VSS VSS
F20 VCC VCCP W21 L10 H3 VSS VSS AD8
AA7 VCC H6 VSS VSS AD11
AA9 VCC VCCA B26 1 2 H21 VSS VSS AD13
AA10 VCC VCCA C26 H24 VSS VSS AD16
1
AA12 H_VID[6..0] 41 C420 C429 PBY160808T-121Y-GP J2 AD19

VCC VSS VSS
Do Not Stuff
SC10U6D3V5MX-3GP
AA13 AD6 H_VID0 68.00206.021 J5 AD22

2 VCC VID0 H_VID1 VCC_CORE VSS VSS 2
AA15 AF5 DY J22 AD25
2
VCC VID1 H_VID2 VSS VSS Do Not Stuff TP45

AA17 VCC VID2 AE5
H_VID3
2nd = 68.00230.041 J25 VSS VSS AE1 1
AA18 VCC VID3 AF4 K1 VSS VSS AE4
1
AA20 AE3 H_VID4 K4 AE8

VCC VID4 H_VID5 R38 VSS VSS
AB9 VCC VID5 AF3 K23 VSS VSS AE11
AC10 AE2 H_VID6 100R2F-L1-GP-U K26 AE14
VCC VID6 VSS VSS
AB10 VCC L3 VSS VSS AE16
AB12 L6 AE19
2
VCC VSS VSS

AB14 VCC VCCSENSE AF7 VCC_SENSE 41 L21 VSS VSS AE23
AB15 L24 AE26 1 Do Not Stuff TP48
VCC VSS VSS Do Not Stuff TP21
AB17 VCC M2 VSS VSS A2 1
AB18 VCC VSSSENSE AE7 VSS_SENSE 41 M5 VSS VSS AF6
M22 VSS VSS AF8
1
Layout Note: M25 AF11

BGA479-SKT6-GPU7 R39 VSS VSS
N1 VSS VSS AF13
62.10079.001 100R2F-L1-GP-U VCCSENSE and VSSSENSE lines N4 AF16
should be of equal length. VSS VSS
N23 VSS VSS AF19
N26 AF21
2
VSS VSS Do Not Stuff TP61

P3 VSS VSS A25 1
Layout Note: AF25 1 Do Not Stuff TP43
Provide a test point (with VSS
no stub) to connect a
differential probe BGA479-SKT6-GPU7
between VCCSENSE and 62.10079.001
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.
1 1
Wistron Corporation
Title
CPU (2 of 2)
HM40-MV SB
A B C D E
5 4 3 2 1
U35A 1 OF 10
H_A#[35..3]
H_A#[35..3] 4
H_D#[63..0] A14 H_A#3
4 H_D#[63..0] H_A#_3
H_D#0 F2 C15 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
G8 H_D#_1 H_A#_5 F16
H_D#2 F8 H13 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
E6 H_D#_3 H_A#_7 C18
H_D#4 G2 M16 H_A#8
H_D#_4 H_A#_8
D H_SWING routing Trace width and 1D05V_S0 H_D#5 H6 H_D#_5 H_A#_9 J13 H_A#9 D
H_D#6 H2 P16 H_A#10
Spacing use 10 / 20 mil H_D#_6 H_A#_10
1
H_D#7 F6 R16 H_A#11
R239 H_D#8 H_D#_7 H_A#_11 H_A#12
D4 H_D#_8 H_A#_12 N17
221R2F-2-GP H_D#9 H3 M13 H_A#13
H_D#_9 H_A#_13
H_SWING Resistors and H_D#10 M9 H_D#_10 H_A#_14 E17 H_A#14
H_D#11 M11 P17 H_A#15
Capacitors close MCH
2
H_D#12 H_D#_11 H_A#_15 H_A#16
J1 H_D#_12 H_A#_16 F17
500 mil ( MAX ) H_SW ING H_D#13 J2 H_D#_13 H_A#_17 G20 H_A#17
H_D#14 N12 B19 H_A#18
H_D#_14 H_A#_18
1
H_D#15 J6 J16 H_A#19
H_D#_15 H_A#_19
C478 1 R238 H_D#16 P2 H_D#_16 H_A#_20 E20 H_A#20
SCD1U10V2KX-4GP 100R2F-L1-GP-U H_D#17 L2 H16 H_A#21
H_D#18 H_D#_17 H_A#_21 H_A#22
R2 J20
2
H_D#19 H_D#_18 H_A#_22 H_A#23

N9 L17
2
H_D#20 H_D#_19 H_A#_23 H_A#24
L6 H_D#_20 H_A#_24 A17
H_D#21 M5 B17 H_A#25
H_D#22 H_D#_21 H_A#_25 H_A#26
J3 H_D#_22 H_A#_26 L16
H_D#23 N2 C21 H_A#27
H_D#24 H_D#_23 H_A#_27 H_A#28
R1 H_D#_24 H_A#_28 J17
H_D#25 N5 H20 H_A#29
H_D#26 H_D#_25 H_A#_29 H_A#30
N6 H_D#_26 H_A#_30 B18
H_D#27 P13 K17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32
N8 H_D#_28 H_A#_32 B20
H_D#29 L7 F21 H_A#33
H_D#30 H_D#_29 H_A#_33 H_A#34
N10 H_D#_30 H_A#_34 K21
H_D#31 M3 L20 H_A#35
H_D#32 H_D#_31 H_A#_35
Y3 H_D#_32
H_D#33 AD14 H12 H_ADS# 4
C H_D#34 H_D#_33 H_ADS# C
Y6 H_D#_34 H_ADSTB#_0 B16 H_ADSTB#0 4
H_D#35 Y10 G17 H_ADSTB#1 4
H_D#36 H_D#_35 H_ADSTB#_1
Y12 H_D#_36 H_BNR# A9 H_BNR# 4
H_D#37 Y14 F11 H_BPRI# 4
H_D#38 H_D#_37 H_BPRI#
Y7 G12
HOST
H_D#_38 H_BREQ# H_BREQ#0 4
H_D#39 W2 E9 H_DEFER# 4
H_D#40 H_D#_39 H_DEFER#
AA8 H_D#_40 H_DBSY# B10 H_DBSY# 4
H_D#41 Y9 AH7 CLK_MCH_BCLK 3
H_D#42 H_D#_41 HPLL_CLK
AA13 H_D#_42 HPLL_CLK# AH6 CLK_MCH_BCLK# 3
H_D#43 AA9 J11 H_DPW R# 4
H_D#44 H_D#_43 H_DPWR#
AA11 H_D#_44 H_DRDY# F9 H_DRDY# 4
H_RCOMP routing Trace width and H_D#45 AD11 H_D#_45 H_HIT# H9 H_HIT# 4
H_D#46 AD10 E12 H_HITM# 4
Spacing use 10 / 20 mil H_D#47 AD13
H_D#_46 H_HITM#
H11
H_D#_47 H_LOCK# H_LOCK# 4
H_D#48 AE12 C9 H_TRDY# 4
H_D#49 H_D#_48 H_TRDY#
AE9 H_D#_49
1 2 H_RCOMP H_D#50 AA2
R226 24D9R2F-L-GP H_D#51 H_D#_50
AD8 H_D#_51
H_D#52 AA3 H_DINV#[3..0]
H_D#_52 H_DINV#[3..0] 4
H_D#53 AD3 J8 H_DINV#0
H_D#54 H_D#_53 H_DINV#_0 H_DINV#1
AD7 H_D#_54 H_DINV#_1 L3
H_D#55 AE14 Y13 H_DINV#2
H_D#56 H_D#_55 H_DINV#_2 H_DINV#3
Place them near to the chip ( < 0.5") H_D#57
AF3
AC1
H_D#_56 H_DINV#_3 Y1
H_DSTBN#[3..0]
H_D#_57 H_DSTBN#[3..0] 4
H_D#58 AE3 L10 H_DSTBN#0
H_D#59 H_D#_58 H_DSTBN#_0 H_DSTBN#1
AC3 H_D#_59 H_DSTBN#_1 M7
H_D#60 AE11 AA5 H_DSTBN#2
H_D#61 H_D#_60 H_DSTBN#_2 H_DSTBN#3
AE8 H_D#_61 H_DSTBN#_3 AE6
H_D#62 AG2 H_DSTBP#[3..0]
B H_D#_62 H_DSTBP#[3..0] 4 B
H_D#63 AD6 L9 H_DSTBP#0
H_D#_63 H_DSTBP#_0 H_DSTBP#1
H_DSTBP#_1 M8
AA6 H_DSTBP#2
H_DSTBP#_2 H_DSTBP#3
H_DSTBP#_3 AE5
H_REQ#[4..0]
H_REQ#[4..0] 4
1D05V_S0 B15 H_REQ#0
H_SW ING H_REQ#_0 H_REQ#1
C5 H_SWING H_REQ#_1 K13
H_RCOMP E3 F13 H_REQ#2
H_RCOMP H_REQ#_2
2
B13 H_REQ#3
R241 H_REQ#_3 H_REQ#4
4,48 H_CPURST# C12 H_CPURST# H_REQ#_4 B14
1KR2F-3-GP E11 H_RS#[2..0]
4 H_CPUSLP# H_CPUSLP# H_RS#[2..0] 4
B6 H_RS#0
H_RS#_0 H_RS#1
F12
1
H_AVREF H_RS#_1 H_RS#2

A11 H_AVREF H_RS#_2 C8
B11 H_DVREF
1
C479
R240 SCD1U16V2ZY-2GP CANTIGA-GM-GP-U-NF
2KR2F-3-GP
2
71.CNTIG.00U
2
A UMA Two Phase 2 A
Wistron Corporation
Title
Cantiga (1 of 6)_HOST
HM40-MV SB
Date: W ednesday, November 26, 2008 Sheet 6 of 51
5 4 3 2 1
5 4 3 2 1
U35B 2 OF 10
U35C 3 OF 10 1D05V_S0
M36
DDR CLK/ CONTROL/COMPENSATION

RESERVED#M36 L_BKLTCTL R99
N36 AP24 M_CLK_DDR0 17 18 L_BKLTCTL L32
1D8V_S3 RESERVED#N36 SA_CK_0 GMCH_BL_ON L_BKLT_CTRL PEG_CMP 2
R33 AT21 M_CLK_DDR1 17 33 GMCH_BL_ON G32 T37 1
RESERVED#R33 SA_CK_1 LCTLA_CLK L_BKLT_EN PEG_COMPI 49D9R2F-GP
T33 AV24 M_CLK_DDR2 16 M32 T36
RESERVED#T33 SB_CK_0 L_CTRL_CLK PEG_COMPO
AH9 AU20 M_CLK_DDR3 16
RESERVED#AH9 SB_CK_1 LCTLB_DATA
AH10 M33
Close to GMCH as 500 mils.
1
RESERVED#AH10 CLK_DDC_EDID L_CTRL_DATA
AH12 AR24 M_CLK_DDR#0 17 18 CLK_DDC_EDID K33 H44
R251 RESERVED#AH12 SA_CK#_0 DAT_DDC_EDID L_DDC_CLK PEG_RX#_0
AH13 AR21 M_CLK_DDR#1 17 18 DAT_DDC_EDID J33 J46
RESERVED#AH13 SA_CK#_1 L_DDC_DATA PEG_RX#_1
1KR2F-3-GP K12 AU24 M_CLK_DDR#2 16 L44
RESERVED#K12 SB_CK#_0 PEG_RX#_2
AL34 AV20 M_CLK_DDR#3 16 L40
RESERVED#AL34 SB_CK#_1 GMCH_LCDVDD_ON PEG_RX#_3
AK34 18 GMCH_LCDVDD_ON M29 N41
2
RESERVED#AK34 LIBG L_VDD_EN PEG_RX#_4
AN35 BC28 M_CKE0 17 C44 P48
SM_RCOMP_VOH RESERVED#AN35 SA_CKE_0 LVDS_IBG PEG_RX#_5
AM35 AY28 M_CKE1 17 1 L_LVBG B43 N44
RESERVED#AM35 SA_CKE_1 TP73 Do Not Stuff LVDS_VBG PEG_RX#_6
T24 AY36 M_CKE2 16 E37 T43
1
1
C489 RESERVED#T24 SB_CKE_0 LVDS_VREFH PEG_RX#_7
D BB36 M_CKE3 16 E38 U43 D
SB_CKE_1 LVDS_VREFL PEG_RX#_8
RSVD
R250 C487 B31 18 GMCH_TXACLK- C41 Y43
SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP RESERVED#B31 LVDSA_CLK# PEG_RX#_9
3K01R2F-3-GP B2 BA17 M_CS0# 17 18 GMCH_TXACLK+ C40 Y48
2
RESERVED#B2 SA_CS#_0 LVDSA_CLK PEG_RX#_10
M1 AY16 M_CS1# 17 B37 Y36
RESERVED#M1 SA_CS#_1 LVDSB_CLK# PEG_RX#_11
AV16 M_CS2# 16 A37 AA43
2
SB_CS#_0 LVDSB_CLK PEG_RX#_12
LVDS
SM_RCOMP_VOL AR13 AD37
SB_CS#_1 M_CS3# 16 PEG_RX#_13
AY21 18 GMCH_TXAOUT0- H47 AC47
1
1
C483 RESERVED#AY21 LVDSA_DATA#_0 PEG_RX#_14
BD17 M_ODT0 17 18 GMCH_TXAOUT1- E46 AD39
R248 C484 SA_ODT_0 LVDSA_DATA#_1 PEG_RX#_15
AY17 M_ODT1 17 18 GMCH_TXAOUT2- G40
SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP SA_ODT_1 LVDSA_DATA#_2
1KR2F-3-GP BF15 M_ODT2 16 A40 H43
2
2
SB_ODT_0 LVDSA_DATA#_3 PEG_RX_0
GRAPHICS
BG23 AY13 M_ODT3 16 J44
RESERVED#BG23 SB_ODT_1 PEG_RX_1
BF23 18 GMCH_TXAOUT0+ H48 L43
2
RESERVED#BF23 M_RCOMPP LVDSA_DATA_0 PEG_RX_2

BH18 BG22 18 GMCH_TXAOUT1+ D45 L41
RESERVED#BH18 SM_RCOMP M_RCOMPN LVDSA_DATA_1 PEG_RX_3
BF18 BH21 18 GMCH_TXAOUT2+ F40 N40
RESERVED#BF18 SM_RCOMP# LVDSA_DATA_2 PEG_RX_4
B40 P47
SM_RCOMP_VOH LVDSA_DATA_3 PEG_RX_5
BF28 N43
SM_RCOMP_VOH DDR_VREF_S3 PEG_RX_6
layout take note SM_RCOMP_VOL
BH28 SM_RCOMP_VOL A41
LVDSB_DATA#_0 PEG_RX_7
T42
H38 U42
LVDSB_DATA#_1 PEG_RX_8
AV42 G37 Y42
SM_VREF LVDSB_DATA#_2 PEG_RX_9
AR36 0912 delete GMCH_TXB* J37 W47
1
SM_PWROK SM_REXT LVDSB_DATA#_3 PEG_RX_10
BF17 1R243 2 C250 Y37
SM_REXT PEG_RX_11
SCD1U10V2KX-4GP
BC36 TP_SM_DRAMRST# 499R2F-2-GP B42 AA42
SM_DRAMRST# TP36Do Not Stuff LVDSB_DATA_0 PEG_RX_12
G38 AD36
2
1D8V_S3 DREFCLK LVDSB_DATA_1 PEG_RX_13
B38 F37 AC48
DPLL_REF_CLK DREFCLK# DREFCLK 3 LVDSB_DATA_2 PEG_RX_14
PCI-EXPRESS
A38 K37 AD40
DPLL_REF_CLK# DREFSSCLK DREFCLK# 3 LVDSB_DATA_3 PEG_RX_15
E41
DPLL_REF_SSCLK DREFSSCLK# DREFSSCLK 3
F41 J41
1
DPLL_REF_SSCLK# DREFSSCLK# 3 PEG_TX#_0

M46
R247 TVA_DAC PEG_TX#_1
F43 F25 M47
CLK
PEG_CLK CLK_MCH_3GPLL 3 TVA_DAC PEG_TX#_2
80D6R2F-L-GP E43 TVB_DAC H25 M40
PEG_CLK# CLK_MCH_3GPLL# 3 TVB_DAC PEG_TX#_3
TVC_DAC K25 M42
TVC_DAC PEG_TX#_4
R48
2
M_RCOMPP PEG_TX#_5
H24 N38
TV_RTN PEG_TX#_6
TV
AE41 DMI_TXN0 T40
DMI_RXN_0 DMI_TXN1 DMI_TXN0 13 PEG_TX#_7
AE37 U37
M_RCOMPN DMI_RXN_1 DMI_TXN2 DMI_TXN1 13 PEG_TX#_8
AE47 U40
DMI_RXN_2 DMI_TXN3 DMI_TXN2 13 PEG_TX#_9
AH39 C31 Y40
1
DMI_RXN_3 DMI_TXN3 13 TV_DCONSEL_0 PEG_TX#_10

E32 AA46
R246 DMI_TXP0 TV_DCONSEL_1 PEG_TX#_11
AE40 AA37
80D6R2F-L-GP DMI_RXP_0 DMI_TXP1 DMI_TXP0 13 PEG_TX#_12
3,4 CPU_SEL0 T25 AE38 AA40
CFG_0 DMI_RXP_1 DMI_TXP2 DMI_TXP1 13 PEG_TX#_13
3,4 CPU_SEL1 R25 AE48 AD43
CFG_1 DMI_RXP_2 DMI_TXP3 DMI_TXP2 13 PEG_TX#_14
C
3,4 CPU_SEL2 P25 AH40 AC46 C
2
CFG_2 DMI_RXP_3 DMI_TXP3 13 PEG_TX#_15

P20
CFG_3 DMI_RXN0 GMCH_BLUE
P24 AE35 19 GMCH_BLUE E28 J42
CFG_4 DMI_TXN_0 DMI_RXN0 13 CRT_BLUE PEG_TX_0
DMI
C25 AE43 DMI_RXN1 L46
CFG_5 DMI_TXN_1 DMI_RXN2 DMI_RXN1 13 GMCH_GREEN PEG_TX_1
N24 AE46 19 GMCH_GREEN G28 M48
CFG_6 DMI_TXN_2 DMI_RXN3 DMI_RXN2 13 CRT_GREEN PEG_TX_2
M24 AH42 M39
CFG_7 DMI_TXN_3 DMI_RXN3 13 PEG_TX_3
CFG
E21 GMCH_RED J28 M43
CFG_8 19 GMCH_RED CRT_RED PEG_TX_4
C23 AD35 DMI_RXP0 R47
CFG_9 DMI_TXP_0 DMI_RXP0 13 PEG_TX_5
VGA
C24 AE44 DMI_RXP1 G29 N37
CFG_10 DMI_TXP_1 DMI_RXP2 DMI_RXP1 13 CRT_IRTN PEG_TX_6
N21 AF46 T39
CFG_11 DMI_TXP_2 DMI_RXP3 DMI_RXP2 13 GMCH_DDCCLK PEG_TX_7
P21 AH43 19 GMCH_DDCCLK H32 U36
CFG_12 DMI_TXP_3 DMI_RXP3 13 GMCH_DDCDATA CRT_DDC_CLK PEG_TX_8
T21 19 GMCH_DDCDATA J32 U39
CFG_13 GMCH_HS CRT_DDC_DATA PEG_TX_9
R20 19 GMCH_HSYNC 2 3 J29 Y39
CFG_14 CRT_HSYNC PEG_TX_10
M20 19 GMCH_VSYNC 1 4 E29 Y46
CFG_15 GMCH_VS CRT_TVO_IREF PEG_TX_11
L21 L29 AA36
CFG_16 CRT_VSYNC PEG_TX_12
GRAPHICS VID
H21 RN21 AA39
CFG_17 SRN33J-5-GP-U PEG_TX_13
P29 AD42
CFG_18 PEG_TX_14
R28 1 2 CRT_IREF AD46
R98 CFG20 T28 CFG_19 PEG_TX_15
3D3V_S0 1 DY 2 Do Not Stuff B33 R253 1K02R2F-1-GP
CFG_20 GFX_VID_0
B32
GFX_VID_1 CANTIGA-GM-GP-U-NF
G33
GFX_VID_2
GFX_VID_3
F33 71.CNTIG.00U
13 PM_SYNC# PM_SYNC# R29 E33
H_DPRSTP# PM_SYNC# GFX_VID_4
4,12,41 H_DPRSTP# B7
PM_DPRSTP#
FOR Cantiga: 1.02k_1% ohm
PM_EXTTS#0 N33 Teenah: 1.3k ohm 0912 add these parts for EMI demand
PM_EXTTS#1 PM_EXT_TS#_0
P32
PM_EXT_TS#_1
PM
2 1 PWROK_GD AT40 C34 CRT_IREF routing Trace 1017 delete these parts(EC208~EC210)
13,39 PWROK PWROK GFX_VR_EN
R110 Do Not Stuff RSTIN# AT11 1D05V_S0
PM_THRMTRIP-A# T20
RSTIN# width use 20 mil
2
PM_DPRSLPVR THERMTRIP#
13,24,30,31,33,34 PLT_RST1# 1 2 R32
R211 100R2J-2-GP DPRSLPVR R93
AH37 1KR2F-3-GP
CL_CLK CL_CLK0 13
1
C147 DY AH36
CL_DATA CLPWROK_MCH 2 R111 CL_DATA0 13
Do Not Stuff BG48 AN36 1
ME
PWROK 13,39
1
NC#BG48 CL_PWROK
BF48 AJ35 Do Not Stuff
CL_RST#0 13 1014 swap these nets
2
NC#BF48 CL_RST# MCH_CLVREF

BD48 AH34
NC#BD48 CL_VREF
BC48 RN14
NC#BC48
1
BH47 GMCH_BLUE 1 8
1
NC#BH47 C231 R92
4,12,39 PM_THRMTRIP-A# BG47 2 7
NC#BG47
SCD1U10V2KX-4GP
BE47 N28 511R2F-2-GP GMCH_GREEN 3 6
13,41 PM_DPRSLPVR NC#BE47 DDPC_CTRLCLK
BH46 M28 1 GMCH_RED 4 5
2
B NC#BH46 DDPC_CTRLDATA Do Not Stuff TP34 B
BF46 G36
2
NC#BF46 SDVO_CTRLCLK
NC
BG45 E36 SRN150F-1-GP

MISC
NC#BG45 SDVO_CTRLDATA
BH44 K36 CLK_MCH_OE# 3
NC#BH44 CLKREQ#
BH43
NC#BH43 ICH_SYNC#
H36 MCH_ICH_SYNC# 13 FOR Cantiga:500 ohm
BH6 R242 Teenah: 392 ohm
NC#BH6
BH5
NC#BH5 MCH_TSATN# 2
BG4 B12 1 1D05V_S0
NC#BG4 TSATN#
BH3
NC#BH3
BF3 RN15
3D3V_S0 NC#BF3 56R2J-4-GP TVA_DAC
BH2 1 8
NC#BH2 TVB_DAC
BG2 B28 2 7
NC#BG2 HDA_BCLK TVC_DAC
BE2 B30 3 6
RN29 NC#BE2 HDA_RST#
BG1 B29 4 5
PM_EXTTS#0 NC#BG1 HDA_SDI
4 1 BF1 C29
PM_EXTTS#1 NC#BF1 HDA_SDO SRN75J-1-GP
3 2 BD1 A28
NC#BD1 HDA_SYNC
HDA
BC1
SRN10KJ-5-GP NC#BC1
F1
NC#F1
A47
NC#A47
CANTIGA-GM-GP-U-NF
3D3V_S0
71.CNTIG.00U
RN32
LCTLB_DATA 5 4
LCTLA_CLK 6 3
CLK_MCH_OE# 7 2
8 1
SRN10KJ-6-GP
RN22
GMCH_LCDVDD_ON
Pin Name Strap Description Configuration GMCH_BL_ON
1
2
8
7
3 6
4 5
A SRN100KJ-8-GP-U A
R103
LIBG
Digital DisplayPort Low = Only digital DisplayPort 1 2
CFG20 (SDVO/DP/HDMI) (SDVO/DP/HDMI) or
2K37R2F-GP
Concurrent with PCIE is operational (default)

PCIE
High = Digital DisplayPort Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
(SDVO/DP/HDMI) and Taipei Hsien 221, Taiwan, R.O.C.
PCIE are operating simultaneously via the PEG port Title
Cantiga (2 of 6)_DMI/PM/CFG
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
U35D 4 OF 10 U35E 5 OF 10
M_A_DQ[63..0] M_B_DQ[63..0]
17 M_A_DQ[63..0] 16 M_B_DQ[63..0]
M_A_DQ0 AJ38 BD21 M_A_BS#0 17 M_B_DQ0 AK47 BC16 M_B_BS#0 16
M_A_DQ1 SA_DQ_0 SA_BS_0 M_B_DQ1 SB_DQ_0 SB_BS_0
AJ41 SA_DQ_1 SA_BS_1 BG18 M_A_BS#1 17 AH46 SB_DQ_1 SB_BS_1 BB17 M_B_BS#1 16
M_A_DQ2 AN38 AT25 M_A_BS#2 17 M_B_DQ2 AP47 BB33 M_B_BS#2 16
M_A_DQ3 SA_DQ_2 SA_BS_2 M_B_DQ3 SB_DQ_2 SB_BS_2
AM38 SA_DQ_3 AP46 SB_DQ_3
M_A_DQ4 AJ36 BB20 M_A_RAS# 17 M_B_DQ4 AJ46
M_A_DQ5 SA_DQ_4 SA_RAS# M_B_DQ5 SB_DQ_4
AJ40 SA_DQ_5 SA_CAS# BD20 M_A_CAS# 17 AJ48 SB_DQ_5 SB_RAS# AU17 M_B_RAS# 16
M_A_DQ6 AM44 AY20 M_A_W E# 17 M_B_DQ6 AM48 BG16 M_B_CAS# 16
M_A_DQ7 SA_DQ_6 SA_WE# M_B_DQ7 SB_DQ_6 SB_CAS#
AM42 SA_DQ_7 AP48 SB_DQ_7 SB_WE# BF14 M_B_W E# 16
D M_A_DQ8 AN43 M_B_DQ8 AU47 D
M_A_DQ9 SA_DQ_8 M_B_DQ9 SB_DQ_8
AN44 SA_DQ_9 AU46 SB_DQ_9
M_A_DQ10 AU40 M_A_DM[7..0] M_B_DQ10 BA48
SA_DQ_10 M_A_DM[7..0] 17 SB_DQ_10
M_A_DQ11 AT38 AM37 M_A_DM0 M_B_DQ11 AY48 M_B_DM[7..0]
SA_DQ_11 SA_DM_0 SB_DQ_11 M_B_DM[7..0] 16
M_A_DQ12 AN41 AT41 M_A_DM1 M_B_DQ12 AT47 AM47 M_B_DM0
M_A_DQ13 SA_DQ_12 SA_DM_1 M_A_DM2 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
M_A_DQ14 AU44 AU39 M_A_DM3 M_B_DQ14 BA47 BD40 M_B_DM2
AU42 SA_DQ_15 SA_DM_4 BB12 BC47 SB_DQ_15 SB_DM_3 BF35
M_A_DQ16 AV39 AY6 M_A_DM5 M_B_DQ16 BC46 BG11 M_B_DM4
AY44 SA_DQ_17 SA_DM_6 AT7 BC44 SB_DQ_17 SB_DM_5 BA3
A
M_A_DQ18 BA40 AJ5 M_A_DM7 M_B_DQ18 BG43 AP1 M_B_DM6
B
M_A_DQ19 SA_DQ_18 SA_DM_7 M_A_DQS[7..0] M_B_DQ19 SB_DQ_18 SB_DM_6 M_B_DM7
BD43 SA_DQ_19 M_A_DQS[7..0] 17 BF43 SB_DQ_19 SB_DM_7 AK2
M_A_DQ20 AV41 AJ44 M_A_DQS0 M_B_DQ20 BE45 M_B_DQS[7..0]
SA_DQ_20 SA_DQS_0 SB_DQ_20 M_B_DQS[7..0] 16
M_A_DQ21 AY43 AT44 M_A_DQS1 M_B_DQ21 BC41 AL47 M_B_DQS0
M_A_DQ22 SA_DQ_21 SA_DQS_1 M_A_DQS2 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1
BB41 BA43 BF40 AV48
MEMORY
MEMORY
BC40 SA_DQ_23 SA_DQS_3 BC37 BF41 SB_DQ_23 SB_DQS_2 BG41
M_A_DQ24 AY37 AW12 M_A_DQS4 M_B_DQ24 BG38 BG37 M_B_DQS3
BD38 SA_DQ_25 SA_DQS_5 BC8 BF38 SB_DQ_25 SB_DQS_4 BH9
M_A_DQ26 AV37 AU8 M_A_DQS6 M_B_DQ26 BH35 BB2 M_B_DQS5
M_A_DQ27 SA_DQ_26 SA_DQS_6 M_A_DQS7 M_A_DQS#[7..0] M_B_DQ27 SB_DQ_26 SB_DQS_5 M_B_DQS6
AT36 SA_DQ_27 SA_DQS_7 AM7 M_A_DQS#[7..0] 17 BG35 SB_DQ_27 SB_DQS_6 AU1
M_A_DQ28 AY38 AJ43 M_A_DQS#0 M_B_DQ28 BH40 AN6 M_B_DQS7 M_B_DQS#[7..0]
SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 M_B_DQS#[7..0] 16
M_A_DQ29 BB38 AT43 M_A_DQS#1 M_B_DQ29 BG39 AL46 M_B_DQS#0
M_A_DQ30 SA_DQ_29 SA_DQS#_1 M_A_DQS#2 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
AV36 SA_DQ_30 SA_DQS#_2 BA44 BG34 SB_DQ_30 SB_DQS#_1 AV47
M_A_DQ31 AW36 BD37 M_A_DQS#3 M_B_DQ31 BH34 BH41 M_B_DQS#2
BD13 SA_DQ_32 SA_DQS#_4 AY12 BH14 SB_DQ_32 SB_DQS#_3 BH37
M_A_DQ33 AU11 BD8 M_A_DQS#5 M_B_DQ33 BG12 BG9 M_B_DQS#4
BC11 SA_DQ_34 SA_DQS#_6 AU9 BH11 SB_DQ_34 SB_DQS#_5 BC2
M_A_DQ35 BA12 AM8 M_A_DQS#7 M_B_DQ35 BG8 AT2 M_B_DQS#6
SYSTEM
M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_A_A[14..0] M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7
SYSTEM
AU13 SA_DQ_36 M_A_A[14..0] 17 BH12 SB_DQ_36 SB_DQS#_7 AN5
C M_A_DQ37 AV13 BA21 M_A_A0 M_B_DQ37 BF11 M_B_A[14..0] C
SA_DQ_37 SA_MA_0 SB_DQ_37 M_B_A[14..0] 16
M_A_DQ38 BD12 BC24 M_A_A1 M_B_DQ38 BF8 AV17 M_B_A0
M_A_DQ39 SA_DQ_38 SA_MA_1 M_A_A2 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
BC12 SA_DQ_39 SA_MA_2 BG24 BG7 SB_DQ_39 SB_MA_1 BA25
M_A_DQ40 BB9 BH24 M_A_A3 M_B_DQ40 BC5 BC25 M_B_A2
BA9 SA_DQ_41 SA_MA_4 BG25 BC6 SB_DQ_41 SB_MA_3 AU25
M_A_DQ42 AU10 BA24 M_A_A5 M_B_DQ42 AY3 AW25 M_B_A4
AV9 SA_DQ_43 SA_MA_6 BD24 AY1 SB_DQ_43 SB_MA_5 BB28
M_A_DQ44 BA11 BG27 M_A_A7 M_B_DQ44 BF6 AU28 M_B_A6
BD9 SA_DQ_45 SA_MA_8 BF25 BF5 SB_DQ_45 SB_MA_7 AW28
M_A_DQ46 AY8 AW24 M_A_A9 M_B_DQ46 BA1 AT33 M_B_A8
BA6 SA_DQ_47 SA_MA_10 BC21 BD3 SB_DQ_47 SB_MA_9 BD33
M_A_DQ48 M_A_A11 M_B_DQ48 M_B_A10
DDR
AV5 SA_DQ_48 SA_MA_11 BG26 AV2 SB_DQ_48 SB_MA_10 BB16
DDR
M_A_DQ49 AV7 BH26 M_A_A12 M_B_DQ49 AU3 AW33 M_B_A11
AT9 SA_DQ_50 SA_MA_13 BH17 AR3 SB_DQ_50 SB_MA_12 AY33
M_A_DQ51 AN8 AY25 M_A_A14 M_B_DQ51 AN2 BH15 M_B_A13
M_A_DQ52 SA_DQ_51 SA_MA_14 M_B_DQ52 SB_DQ_51 SB_MA_13 M_B_A14
AU5 SA_DQ_52 AY2 SB_DQ_52 SB_MA_14 AU33
M_A_DQ53 AU6 M_B_DQ53 AV1
AT5 SA_DQ_54 AP3 SB_DQ_54
M_A_DQ55 AN10 M_B_DQ55 AR1
AM11 SA_DQ_56 AL1 SB_DQ_56
M_A_DQ57 AM5 M_B_DQ57 AL2
AJ9 SA_DQ_58 AJ1 SB_DQ_58
M_A_DQ59 AJ8 M_B_DQ59 AH1
AN12 SA_DQ_60 AM2 SB_DQ_60
M_A_DQ61 AM13 M_B_DQ61 AM3
AJ11 SA_DQ_62 AH3 SB_DQ_62
M_A_DQ63 AJ12 M_B_DQ63 AJ3
SA_DQ_63 SB_DQ_63
B CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF B
71.CNTIG.00U 71.CNTIG.00U
A A
Wistron Corporation
Title
Cantiga (3 of 6)_DDR
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
7 OF 10 1D05V_S0
1D8V_S3 U35G
AP33 W28
VCC_SM VCC_AXG_NCTF
AN33 V28
VCC_SM VCC_AXG_NCTF 1D05V_S0 U35F 6 OF 10
BH32 W26
VCC_SM VCC_AXG_NCTF
BG32 V26
VCC_SM VCC_AXG_NCTF
BF32 W25
VCC_SM VCC_AXG_NCTF
BD32 V25 AG34
VCC_SM VCC_AXG_NCTF VCC
BC32 W24 AC34
667MTS 2400mA BB32
BA32
VCC_SM
VCC_SM
VCC_AXG_NCTF
VCC_AXG_NCTF
V24
W23 C455 C112 C111 C144 C145
AB34
AA34
VCC
VCC
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SCD1U10V2KX-4GP
AY32 V23 Y34
800MTS 3000mA AW32
VCC_SM
VCC_SM
VCC_AXG_NCTF
VCC_AXG_NCTF
AM21 V34
VCC
VCC
AV32 AL21 U34
2
AU32
VCC_SM VCC_AXG_NCTF
AK21 DY DY DY DY AM33
VCC
D AT32 W21 1D05V_S0 AK33 D
AR32 V21 AJ33
POWER
AP32 U21 AG33
AN32 AM20 AF33
BH31 AK20
VCC_SM VCC_AXG_NCTF
BG31 W20 AE33
VCC CORE
BF31 U20 DY C163 C162 C183 C164 C194 C175 C193 C177 AC33
Do Not Stuff
SCD1U10V2KX-4GP
SC1U10V3ZY-6GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BG30 AM19 TC21 Coupling CAP 370 mils from the Edge AA33
Do Not Stuff
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
BH29 AL19 Do Not Stuff DY DY Y33
2
BG29 AK19 W33
BF29 AJ19 V33
BD29 AH19 U33
VCC SM
BC29 AG19 AH28
BB29 AF19 AF28
BA29 AE19 AC28
1
VCC_SM VCC_AXG_NCTF C456 C450 VCC
AY29 AB19 AA28
Do Not Stuff
Do Not Stuff
AW29 AA19 Place on the Edge Coupling CAP AJ26
AV29 Y19 DY DY AG26
2
AU29 W19 AE26
AT29 V19 AC26
AR29 U19 AH25
AP29 AM17 AG25
AK17 AF25
VCC_AXG_NCTF VCC
BA36 AH17 AG24
VCC_SM/NC VCC_AXG_NCTF VCC
POWER
BB24 AG17 AJ23
VCC_SM/NC VCC_AXG_NCTF VCC 1D05V_S0
BD16 AF17 AH23
VCC GFX NCTF
VCC_SM/NC VCC_AXG_NCTF VCC

BB21 AE17 Coupling CAP AF23
VCC_SM/NC VCC_AXG_NCTF G9 VCC
AW16 AC17 AM32
VCC_SM/NC VCC_AXG_NCTF VCC_GMCH_35 VCC_NCTF
AW13 AB17 1 2 T32 AL32
VCC_SM/NC VCC_AXG_NCTF VCC VCC_NCTF
AT13 Y17 AK32
VCC_SM/NC VCC_AXG_NCTF Do Not Stuff VCC_NCTF
W17 AJ32
1D05V_S0 VCC_AXG_NCTF VCC_NCTF
V17 AH32
VCC_AXG_NCTF VCC_NCTF
AM16 AG32
VCC_AXG_NCTF VCC_NCTF
Y26 AL16 AE32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AE25 AK16 AC32
AB25 AJ16 AA32
AA25 AH16 Y32
AE24 AG16 W32
AC24 AF16 U32
AA24 AE16 AM30
Y24 AC16 AL30
C AE23 AB16 AK30 C
AC23 AA16 AH30
AB23 Y16 AG30
AA23 W16 AF30
AJ21 V16 AE30
AG21 U16 AC30
AE21
VCC_AXG
Place CAP where VCC_NCTF
AB30
AC21 LVDS and DDR2 taps AA30
VCC_AXG VCC_NCTF
AA21 Y30
VCC_AXG VCC_NCTF
Y21 W30
VCC_AXG VCC_NCTF
VCC NCTF
AH20
AF20
VCC_AXG FOR VCC SM VCC_NCTF
V30
U30
VCC_AXG 1D8V_S3 VCC_NCTF
AE20 AL29
VCC_AXG VCC_NCTF
AC20 AK29
VCC_AXG VCC_NCTF
AB20 AJ29
VCC_AXG VCC_NCTF
AA20 AH29
1
VCC_AXG VCC_NCTF
T17 AG29
VCC_AXG C207 C203 C225 C202 C208 C210 C211 VCC_NCTF
T16 AE29
VCC_AXG VCC_NCTF
Do Not Stuff
SC10U6D3V5MX-3GP
Do Not Stuff
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Do Not Stuff
SC10U6D3V5MX-3GP
AM15 DY AC29
2
VCC_AXG VCC_NCTF
AL15
VCC_AXG DY DY VCC_NCTF
AA29
AE15 Y29
VCC_AXG VCC_NCTF
AJ15 W29
VCC_AXG VCC_NCTF
AH15 V29
VCC_AXG VCC_NCTF
AG15 AL28
VCC_AXG VCC_NCTF
AF15 AK28
VCC_AXG VCC_NCTF
AB15 AL26
VCC_AXG VCC_NCTF
AA15 AK26
VCC_AXG VCC_NCTF
VCC GFX
Y15 AK25
VCC_AXG VCC_NCTF
V15
VCC_AXG
Place on the Edge VCC_NCTF
AK24
U15 AK23
VCC_AXG VCC_NCTF
AN14
VCC_AXG
AM14
VCC_AXG
U14 AV44 SM_LF1_GMCH CANTIGA-GM-GP-U-NF
VCC_AXG VCC_SM_LF
VCC SM LF
T14 BA37 SM_LF2_GMCH SB 1118 delete TC27

VCC_AXG VCC_SM_LF
AM40 SM_LF3_GMCH
VCC_SM_LF 71.CNTIG.00U
AV21 SM_LF4_GMCH
VCC_SM_LF
AY5 SM_LF5_GMCH
VCC_SM_LF
AM10 SM_LF6_GMCH
VCC_SM_LF
BB13 SM_LF7_GMCH
VCC_SM_LF
1
C153 C140 C136 C172 C246 C235 C253

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD22U10V2KX-1GP
SCD47U16V3ZY-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
B 1 AJ14 B
SCD22U10V2KX-1GP
TP33 Do Not Stuff VCC_AXG_SENSE

1 AH14
2
TP32 Do Not Stuff VSS_AXG_SENSE
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
place near Cantiga
A A
Wistron Corporation
Title
Cantiga (4 of 6)_POWER
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
SB 1120 modify EC78 1015 modify component size of R252

Imax = 300 mA
5V_S0 3D3V_S0_DAC 3D3V_S0_DAC 1D05V_S0
U44
1 R252 2 73mA 3D3V_CRTDAC_S0 U35H 8 OF 10 852mA
1 VIN VOUT 5
1
2 0R2J-2-GP C492 U13 C209 C220 C213 C214 1 C135 C138
GND VTT
1
SCD01U16V2KX-3GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC2D2U6D3V3MX-1-GP
SC4D7U6D3V3KX-GP
Do Not Stuff
3 4 T13 DY Do Not Stuff
EN NC#4 C485 C494 VTT 2
B27 U12 DY
2
SC22U16V0KX-1GP SCD1U10V2KX-4GP VCCA_CRT_DAC VTT
A26 T12
2
VCCA_CRT_DAC VTT
1
1
G9091-330T11U-GP EC77 U11
VTT
Do Not Stuff
74.09091.J3F VTT T11
EC78 M_VCCA_DAC_BG A25
2nd = 74.09198.Q7FDY U10
CRT
2
2
3D3V_S0_DAC VCCA_DAC_BG VTT
D B25 VSSA_DAC_BG VTT T10 D
SC4D7U10V3KX-GP R249
SB 1 2 5mA VTT
VTT
U9
T9
VTT U8
1113 modify 2nd of U19 HFB1608VF-102-GP M_VCCA_DPLLA F47 T8
VCCA_DPLLA VTT
1
68.00331.011 U7
VTT
1D05V_S0 C490 M_VCCA_DPLLB VTT
L48 VCCA_DPLLB VTT T7
SCD1U10V2KX-4GP 1D05V_S0
2nd = 68.00084.A01 U6
2
M_VCCA_HPLL VTT
65mA AD1 T6 D18
PLL
R108 VCCA_HPLL VTT 3D3V_S0 3D3V_HV_S0
VTT U5 1
1 2 M_VCCA_DPLLA 1D8V_TXLVDS_S3 M_VCCA_MPLL AE1 T5 R254
Do Not Stuff VCCA_MPLL VTT 1D05V_HV_S0 1
VTT V3 3 2 2 1
1
C263 C258 U3 Do Not Stuff

VTT
1
SC10U6D3V5MX-3GP
Do Not Stuff 1D8V_TXLVDS_S3 J48 V2 2 R255 C497

VCCA_LVDS VTT
SCD1U10V2KX-4GP
DY 10R2F-L-GP
13.2mAJ47 U2
A LVDS
2
VTT
T2 BAT54-5-GP
2
VSSA_LVDS VTT 83.BAT54.D81
VTT V1
1D5V_S0 U1 2nd = 83.BAT54.X81
VTT 3rd = 83.00054.Z81
R116 65mA AD48 VCCA_PEG_BG
1
1 2 M_VCCA_DPLLB C256
Do Not Stuff SCD1U10V2KX-4GP 1D05V_S0
A PEG
1
C267 C265 1D05V_S0

322mA
2
SC10U6D3V5MX-3GP
Do Not Stuff 1D05V_RUN_PEGPLL AA48

DY 720mA VCCA_PEG_PLL
2
C481 C480
1
SC1U10V3KX-3GP
C169 C161 C157 C160 AR20 Do Not Stuff
VCCA_SM
1
SC10U6D3V5MX-3GP
Do Not Stuff
SC1U10V3KX-3GP
SC1U10V3KX-3GP
DY AP20 VCCA_SM DY
C AN20 C
POWER
2
VCCA_SM
AR17
2
VCCA_SM
AP17 VCCA_SM
AN17 VCCA_SM
1D05V_S0 AT16 VCCA_SM
120ohm 100MHz AR16
A SM
VCCA_SM
AP16 VCCA_SM
L12 24mA 1D05V_S0
1 2 M_VCCA_HPLL 26mA
1
1
SC4D7U6D3V3KX-GP
SBK160808T-121Y-N-GP C464 C469

1
1
Do Not Stuff C178 C184 C180 1D8V_SUS_SM_CK 1D8V_S3
68.00119.101
Do Not Stuff
Do Not Stuff
SCD1U10V2KX-4GP
DY R81
AP28
124mA
2
VCCA_SM_CK
2nd = 68.00217.161 DY AN28 B22 1 2
2
2
VCCA_SM_CK VCC_AXF Do Not Stuff
139.2mA DY AP25 B21
AXF
L13 VCCA_SM_CK VCC_AXF
AN25 VCCA_SM_CK VCC_AXF A21
1
1 2 M_VCCA_MPLL AN24 R82
VCCA_SM_CK 1D8V_SUS_SM_CK_RC
AM28 VCCA_SM_CK_NCTF 1 2 1 2
1
SBK160808T-121Y-N-GP AM26 C166
A CK
2
VCCA_SM_CK_NCTF SCD1U10V2KX-4GP 1R2F-GP C159
68.00119.101 C463
DY AM25 VCCA_SM_CK_NCTF
Do Not Stuff
C468 SC10U6D3V5MX-3GP
79mA AL25 BF21
2
SCD1U10V2KX-4GP VCCA_SM_CK_NCTF VCC_SM_CK

2nd = 68.00217.161 AM24 BH20
SM CK
VCCA_SM_CK_NCTF VCC_SM_CK
3D3V_S0_DAC AL24 VCCA_SM_CK_NCTF VCC_SM_CK BG20
120ohm 100MHz AM23 BF20 1D8V_TXLVDS_S3 1D8V_S3
VCCA_SM_CK_NCTF VCC_SM_CK
1
R104
1D05V_S0 C482
AL23 VCCA_SM_CK_NCTF 119mA 1 2
SCD01U16V2KX-3GP Do Not Stuff
2
1
3D3V_HV_S0
B L5 50mA VCC_TX_LVDS K47
C254 B
1 2 1D05V_RUN_PEGPLL
B24
A24
VCCA_TV_DAC
C35 106mA C262 SC1U10V3KX-3GP
TV
2
VCCA_TV_DAC VCC_HV SC1KP50V2KX-1GP
B35
HV
SBK160808T-221Y-N-GP VCC_HV
50mA VCC_HV A35
1
68.00119.111 C260
SCD1U10V2KX-4GP A32 1D05V_S0
VCC_HDA
HDA
2nd = 68.00217.521 V48
1782mA
2
1D5V_S0 VCC_PEG
VCC_PEG U48
220ohm 100MHz V47
PEG
C181 VCC_PEG
1
C466 C222 C457 C460
35mA U47
D TV/CRT
VCC_PEG
Do Not Stuff
SC22U6D3V5MX-2GP
Do Not Stuff
2 1 M25 U46 Do Not Stuff
SCD1U10V2KX-4GP VCCD_TVDAC VCC_PEG
DY DY
2
1D05V_S0 1D5VRUN_QDAC L28 DY
VCCD_QDAC
157.2mA AF1
VCC_DMI AH48
AF48 1D05V_S0
DMI
VCCD_HPLL VCC_DMI
1D05V_RUN_PEGPLL AA47
VCCD_PEG_PLL
VCC_DMI
VCC_DMI
AH47
AG47 456mA
1
C134
1
1
SCD1U10V2KX-4GP
C261 C218 C198 C462
Do Not Stuff
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP M38 DY SC10U6D3V5MX-3GP
VTTLF
2
1D5V_S0 VCCD_LVDS
LVDS
L37 A8 VTTLF1
2
2
VCCD_LVDS VTTLF VTTLF2
L4 VTTLF L1
AB2 VTTLF3
1D5VRUN_QDAC VTTLF
1 2
PBY160808T-181Y-GP
68.00206.041 CANTIGA-GM-GP-U-NF C133 C139
1
180ohm 100MHz 1D8V_S3 71.CNTIG.00U 1 1 1
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
C201 C467
A 2nd = 68.00214.051 SCD1U10V2KX-4GP 60.3mA SCD47U6D3V2KX-GP 2 2 2 A
2
C239 C244
Wistron Corporation
SCD1U10V2KX-4GP
SC10U6D3V5MX-3GP
2
Title
Cantiga (5 of 6)_POWER
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
U35J 10 OF 10
U35I 9 OF 10 BG21 AH8
VSS VSS
L12 VSS VSS Y8
AU48 VSS VSS AM36 AW21 VSS VSS L8
AR48 VSS VSS AE36 AU21 VSS VSS E8
AL48 VSS VSS P36 AP21 VSS VSS B8
BB47 VSS VSS L36 AN21 VSS VSS AY7
AW47 VSS VSS J36 AH21 VSS VSS AU7
AN47 VSS VSS F36 AF21 VSS VSS AN7
AJ47 VSS VSS B36 AB21 VSS VSS AJ7
D AF47 VSS VSS AH35 R21 VSS VSS AE7 D
AD47 VSS VSS AA35 M21 VSS VSS AA7
AB47 VSS VSS Y35 J21 VSS VSS N7
Y47 VSS VSS U35 G21 VSS VSS J7
T47 VSS VSS T35 BC20 VSS VSS BG6
N47 VSS VSS BF34 BA20 VSS VSS BD6
L47 VSS VSS AM34 AW20 VSS VSS AV6
G47 VSS VSS AJ34 AT20 VSS VSS AT6
BD46 VSS VSS AF34 AJ20 VSS VSS AM6
BA46 VSS VSS AE34 AG20 VSS VSS M6
AY46 VSS VSS W34 Y20 VSS VSS C6
AV46 VSS VSS B34 N20 VSS VSS BA5
AR46 VSS VSS A34 K20 VSS VSS AH5
AM46 VSS VSS BG33 F20 VSS VSS AD5
V46 VSS VSS BC33 C20 VSS VSS Y5
R46 VSS VSS BA33 A20 VSS VSS L5
P46 VSS VSS AV33 BG19 VSS VSS J5
H46 VSS VSS AR33 A18 VSS VSS H5
F46 VSS VSS AL33 BG17 VSS VSS F5
BF44 VSS VSS AH33 BC17 VSS VSS BE4
AH44 VSS VSS AB33 AW17 VSS
AD44 P33 AT17 BC3
AA44
Y44
VSS
VSS
VSS
VSS
VSS
VSS
L33
H33
R17
M17
VSS
VSS
VSS
VSS VSS
VSS
VSS
AV3
AL3
U44 VSS VSS N32 H17 VSS VSS R3
T44 K32 C17 P3
M44
F44
VSS
VSS
VSS
VSS VSS
VSS
VSS
F32
C32 BA16
VSS
VSS
VSS
VSS
VSS
F3
BA2
BC43 VSS VSS A31 VSS AW2
C AV43 AN29 AU16 AU2 C
VSS VSS VSS VSS
AU43 VSS VSS T29 AN16 VSS VSS AR2
AM43 VSS VSS N29 N16 VSS VSS AP2
J43 VSS VSS K29 K16 VSS VSS AJ2
C43 VSS VSS H29 G16 VSS VSS AH2
BG42 VSS VSS F29 E16 VSS VSS AF2
AY42 VSS VSS A29 BG15 VSS VSS AE2
AT42 VSS VSS BG28 AC15 VSS VSS AD2
AN42 VSS VSS BD28 W15 VSS VSS AC2
AJ42 VSS VSS BA28 A15 VSS VSS Y2
AE42 VSS VSS AV28 BG14 VSS VSS M2
N42 VSS VSS AT28 AA14 VSS VSS K2
L42 VSS VSS AR28 C14 VSS VSS AM1
BD41 VSS VSS AJ28 BG13 VSS VSS AA1
AU41 VSS VSS AG28 BC13 VSS VSS P1
AM41 VSS VSS AE28 BA13 VSS VSS H1
AH41 VSS VSS AB28
AD41 VSS VSS Y28 VSS U24
AA41 VSS VSS P28 AN13 VSS VSS U28
Y41 VSS VSS K28 AJ13 VSS VSS U25
U41 VSS VSS H28 AE13 VSS VSS U29
T41 VSS VSS F28 N13 VSS
M41 VSS VSS C28 L13 VSS
G41 VSS VSS BF26 G13 VSS VSS_NCTF AF32
B41 VSS VSS AH26 E13 VSS VSS_NCTF AB32
BG40 VSS VSS AF26 BF12 VSS VSS_NCTF V32
BB40 VSS VSS AB26 AV12 VSS VSS_NCTF AJ30
AV40 VSS VSS AA26 AT12 VSS VSS_NCTF AM29
AN40 VSS VSS C26 AM12 VSS VSS_NCTF AF29
B B
H40 B26 AA12 AB29
VSS NCTF
VSS VSS VSS VSS_NCTF
E40 VSS VSS BH25 J12 VSS VSS_NCTF U26
AT39 VSS VSS BD25 A12 VSS VSS_NCTF U23
AM39 VSS VSS BB25 BD11 VSS VSS_NCTF AL20
AJ39 VSS VSS AV25 BB11 VSS VSS_NCTF V20
AE39 VSS VSS AR25 AY11 VSS VSS_NCTF AC19
N39 VSS VSS AJ25 AN11 VSS VSS_NCTF AL17
L39 VSS VSS AC25 AH11 VSS VSS_NCTF AJ17
B39 VSS VSS Y25 VSS_NCTF AA17
BH38 VSS VSS N25 Y11 VSS VSS_NCTF U17
BC38 VSS VSS L25 N11 VSS
BA38 J25 G11
A3,C1,A48,BH1,BH48
VSS VSS VSS Do Not Stuff TP71
AU38 VSS VSS G25 C11 VSS NCTF_VSS_SCB#BH48 BH48 1
AH38 E25 BG10 BH1 1 Do Not Stuff TP67
NCTF TEST PIN:

VSS SCB
VSS VSS VSS NCTF_VSS_SCB#BH1 Do Not Stuff TP74
AD38 VSS VSS BF24 AV10 VSS NCTF_VSS_SCB#A48 A48 1
AA38 AD12 AT10 C1 1 Do Not Stuff TP65
VSS VSS VSS NCTF_VSS_SCB#C1 Do Not Stuff TP66
Y38 VSS VSS AY24 AJ10 VSS NCTF_VSS_SCB#A3 A3 1
U38 VSS VSS AT24 AE10 VSS
T38 VSS VSS AJ24 AA10 VSS NC#E1 E1
J38 VSS VSS AH24 M10 VSS NC#D2 D2
F38 VSS VSS AF24 BF9 VSS NC#C3 C3
C38 VSS VSS AB24 BC9 VSS NC#B4 B4
BF37 VSS VSS R24 AN9 VSS NC#A5 A5
BB37 VSS VSS L24 AM9 VSS NC#A6 A6
AW37 VSS VSS K24 AD9 VSS NC#A43 A43
AT37 VSS VSS J24 G9 VSS NC#A44 A44
AN37 G24 B9 B45
NC
VSS VSS VSS NC#B45
AJ37 VSS VSS F24 BH8 VSS NC#C46 C46
A H37 VSS VSS E24 BB8 VSS NC#D47 D47 A
C37 VSS VSS BH23 AV8 VSS NC#B47 B47
BG36 VSS VSS AG23 AT8 VSS NC#A46 A46
BD36
AK15
VSS
VSS
VSS
VSS
Y23
B23
NC#F48
NC#E48
F48
E48 Wistron Corporation
AU36 A23 C48 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VSS VSS NC#C48 Taipei Hsien 221, Taiwan, R.O.C.
VSS AJ6 NC#B48 B48
Title
CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF
71.CNTIG.00U 71.CNTIG.00U Cantiga (6 of 6)
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
C76
1 2 RTC_X1
SC12P50V2JN-3GP
1016 modify X2
4
3D3V_AUX_S5 X2
1
X-32D768KHZ-46GP
D16 82.30001.861 R57
D 2 RTC_AUX_S5 2nd = 82.30001.691 10MR2J-L-GP D
2
1
C391
RTC_BAT_R
1 SC1U16V3ZY-GP
1D05V_S0
2
CH715FPT-GP C77 U16A 1 OF 6 LPC_LAD[0..3]
LPC_LAD[0..3] 33,34
83.R0304.B81 1 2
1
2nd = 83.R2004.C81 RN51 C23 K5 LPC_LAD0
RTC1 SRN20KJ-GP-U SC12P50V2JN-3GP RTC_X2 RTCX1 FWH0/LAD0 LPC_LAD1
C24 RTCX2 FWH1/LAD1 K4
R121 LPC_LAD2 R223
RTC_BAT RTC_RST# FWH2/LAD2 L6
LPC_LAD3
DY Do Not Stuff
PWR 1 1 2 2 3 A25 RTCRST# FWH3/LAD3 K2
RTC
LPC
2 1KR2J-1-GP 1 4 SRTC_RST# F20
2
GND INTRUDER# SRTCRST# H_DPSLP#
NP1 NP1 C22 INTRUDER# FWH4/LFRAME# K3 LPC_LFRAME# 33,34
NP2 NP2 1 2
1
DY C281 R193 1MR2J-1-GP INTVRMEN B22 J3 LDRQ0# 1 Do Not Stuff TP58

INTVRMEN LDRQ0#
1
Do Not Stuff C392 LAN100_SLP A22 J1 3D3V_LDRQ1_S0 1 Do Not Stuff TP12
C396 SC1U16V3ZY-GP LAN100_SLP LDRQ1#/GPIO23
2
BAT-CON2-1-GP-U SC1U16V3ZY-GP E25 N7 KA20GATE 33
2
Do Not Stuff GLAN_CLK A20GATE
62.70001.011 A20M# AJ27 H_A20M# 4
1
TP50 LAN_RSTYNCC13
LAN_RSTSYNC H_DPRSTP#
DPRSTP# AJ25 H_DPRSTP# 4,7,41
1119 add G84 and C540 near DIMM door G84
LAN / GLAN
F14 LAN_RXD0 DPSLP# AE23 H_DPSLP# 4
G13 1D05V_S0
Do Not Stuff LAN_RXD1 H_FERR#_R
1124 delete C540 D14 AJ26 RN54
2
LAN_RXD2 FERR# H_THERMTRIP_R 1 8
D13 LAN_TXD0 CPUPWRGD AD22 H_PW RGD 4,39,48 2 7
D12 4 H_FERR# 3 6 H_FERR#_R
LAN_TXD1
GLAN_COMP place within 500 mil of ICH9M 1D5V_S0
E13 LAN_TXD2 IGNNE# AF25 H_IGNNE# 4 4 5
CPU
C C
13 GLAN_DOCK# GLAN_DOCK# B10 AE22 H_INIT# 4 SRN56J-5-GP

GLAN_DOCK#/GPIO56 INIT#
INTR AG25 H_INTR 4
1R207 2 GLAN_COMP B28 GLAN_COMPI RCIN# L3 KBRCIN# 33
24D9R2F-L-GP B27 GLAN_COMPO R222 1D05V_S0
NMI AF23 H_NMI 4
ACZ_BIT_CLK_R AF6 AF24 H_SMI# 4 Do Not Stuff
ACZ_SYNC_R HDA_BIT_CLK SMI# H_PW RGD
AH4 HDA_SYNC 1 DY 2
STPCLK# AH27 H_STPCLK# 4
ACZ_RST#_R AE7 HDA_RST# H_THERMTRIP_R
THRMTRIP# AG26 1 2 PM_THRMTRIP-A# 4,7,39
26 ACZ_SDATAIN0 AF4 HDA_SDIN0 ICH_TP8 TP25 Do Not Stuff
DY R229 Layout note: R373 needs to placed
AG4 HDA_SDIN1 PECI AG27 1
Do Not Stuff within 2" of ICH9, R379 must be
IHDA
AH3 HDA_SDIN2
AE5 placed within 2" of R373 w/o stub
3D3V_S0 HDA_SDIN3
SATA4RXN AH11
ACZ_SDATAOUT_R AG5 AJ11
HDA_SDOUT SATA4RXP
SATA4TXN AG12
1 DY 2 HDA_DOCK_EN# AG7 AF12
TP62 Do Not Stuff HDA_DOCK_RST# R228 Do Not Stuff HDA_DOCK_EN#/GPIO33 SATA4TXP
1 AE8 HDA_DOCK_RST#/GPIO34
SATA5RXN AH9
33,36 MEDIA_LED# AG8 SATALED# SATA5RXP AJ9
SATA5TXN AE10
20 SATA_RXN0 C55 1 2 SCD01U50V2KX-1GP SATA_RXN0_C AJ16 AF10
C56 SCD01U50V2KX-1GP SATA_RXP0_C SATA0RXN SATA5TXP
1 2 AH16
HDD 20 SATA_RXP0
SATA
C58 SCD01U50V2KX-1GP SATA_TXN0_C SATA0RXP
20 SATA_TXN0 1 2 AF17 SATA0TXN SATA_CLKN AH18 CLK_PCIE_SATA# 3
20 SATA_TXP0 C57 1 2 SCD01U50V2KX-1GP SATA_TXP0_C AG17 AJ18 CLK_PCIE_SATA 3
SATA0TXP SATA_CLKP
21 SATA_RXN1 C285 1 2 SCD01U50V2KX-1GP SATA_RXN1_C AH13 AJ7 SATARBIAS

B C286 SCD01U50V2KX-1GP SATA_RXP1_C SATA1RXN SATARBIAS# B
1 2 AJ13 AH7 2 1
ODD 21
21
21
SATA_RXP1
SATA_TXN1
SATA_TXP1
C289
C288
1
1
2
2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SATA_TXN1_C
SATA_TXP1_C
AG14
AF14
SATA1RXP
SATA1TXN
SATA1TXP
SATARBIAS R227
24D9R2F-L-GP
Place within 500 mils of 1D05V_S0 3D3V_S0

ICH9 ball
RTC_AUX_S5 RTC_AUX_S5 ICH9M-GP-NF
2
1
71.ICH9M.00U
DY
1
RN55
R200 R199 Do Not Stuff
330KR2F-L-GP 330KR2F-L-GP
integrated VccSus1_05,VccSus1_5,VccCL1_5 SB
3
4
0915 add EC73 for EMI demand
2
INTVRMEN LAN100_SLP INTVRMEN High=Enable Low=Disable 1117 delete MDC function(R231,R237,R232,R234)

H_INIT#_G
1
integrated VccLan1_05VccCL1_05 SB
DY R197 DY R198
Do Not Stuff Do Not Stuff LAN100_SLP High=Enable Low=Disable 1126 delete R230,R233,R235,R236 and RN63
B
DY
Q24
2
RN63 H_INIT# E C FW H_INIT# 1 TP70 Do Not Stuff

8 1 ACZ_RST#_R
26 ACZ_RST#_AUDIO ACZ_SDATAOUT_R
26 ACZ_SDATAOUT_AUDIO 7 2
6 3 ACZ_SYNC_R Do Not Stuff
26 ACZ_SYNC_AUDIO
26 ACZ_BITCLK_AUDIO 5 4 ACZ_BIT_CLK_R
1
1
SRN47J-4-GP EC73 EC65 UMA Two Phase 2
Do Not Stuff Do Not Stuff
A A
2
2
DY DY
Wistron Corporation
Title
ICH9-M (1 of 4)_SATA/HDA/RTC
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
U16C 3 OF 6
U16B 2 OF 6
G16 AH23 SATA0GP
15 SMB_CLK SMBCLK SATA0GP/GPIO21
D11 F1 PCI_REQ#0 A13 AF19 SATA1GP
AD0 REQ0# 15 SMB_DATA SMBDATA SATA1GP/GPIO19
PCI_GNT#0 SMB_LINK_ALERT# E17 GPIO36
C8 PCI G4 AE21
SATA
AD1 GNT0# LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36
GPIO
SMB
D9 B6 PCI_REQ#1 SMLINK0 C17 AD20 GPIO37
AD2 REQ1#/GPIO50 SMLINK1 SMLINK0 SATA5GP/GPIO37
E12 AD3 GNT1#/GPIO51 A7 B18 SMLINK1
E9 F13 PCI_REQ#2 H1 CLK_ICH14 3
AD4 REQ2#/GPIO52 PM_RI# CLK14
C9 F12 F19 AF3 CLK48_ICH 3
Clocks
AD5 GNT2#/GPIO53 PCI_REQ#3 RI# CLK48
E10 AD6 REQ3#/GPIO54 E6
B7 F6 PCI_GNT#3 1 PM_SUS_STAT# R4 P1 PM_SUS_CLK 32
AD7 GNT3#/GPIO55 Do Not Stuff TP59 DBRESET# SUS_STAT#/LPCPD# SUSCLK
C7 AD8 G19 SYS_RESET#
C5 AD9 C/BE0# D8 SLP_S3# C16 PM_SLP_S3# 33,39,43,44
G11 AD10 C/BE1# B4 7 PM_SYNC# M6 PMSYNC#/GPIO0 SLP_S4# E16 PM_SLP_S4# 33,43,44
F8 D6 G17 SLPS5# 1
D AD11 C/BE2# SMB_ALERT# SLP_S5# TP57 Do Not Stuff D
F11 AD12 C/BE3# A5 A17 SMBALERT#/GPIO11
E7 C10 S4_STATE#1
AD13 PCI_IRDY# S4_STATE#/GPIO26 TP53 Do Not Stuff
A3 AD14 IRDY# D3 3 PM_STPPCI# A14 STP_PCI#
PCI_PAR
SYS GPIO
D2 E3 1 TP55 Do Not Stuff 3 PM_STPCPU# E19 G20 PWROK 7,39
AD15 PAR STP_CPU# PW ROK
F10 AD16 PCIRST# R1
D5 C6 PCI_DEVSEL# L4 M2 PM_DPRSLPVR
AD17 DEVSEL# 33 PM_CLKRUN# CLKRUN# DPRSLPVR/GPIO16 PM_DPRSLPVR 7,41
D10 E4 PCI_PERR# R216 1 DY 2
AD18 PERR#
Power MGT
B3 C2 PCI_LOCK# 24 PCIE_WAKE# E20 B13 PM_BATLOW#_R Do Not Stuff
AD19 PLOCK# W AKE# BATLOW #
2
F7 J4 PCI_SERR# M5 D17
AD20 SERR# 33 INT_SERIRQ SERIRQ
C3 A4 PCI_STOP# DY C405 AJ23 R3 PWRBTN#_ICH 1
AD21 STOP# 3D3V_S0 32 THRM# THRM# PW RBTN# PM_PWRBTN# 33
F3 F5 PCI_TRDY# Do Not Stuff
1
AD22 TRDY# PCI_FRAME#
F4 AD23 FRAME# D7 32,41 VGATE_PWRGD D21 VRMPW RGD LAN_RST# D20 3
C1 R209 83.00016.B11
AD24
G7 AD25 PLTRST# C14 PLT_RST#_R 2 1 PLT_RST1# 7,24,30,31,33,34 1 R194 2 ICH_TP7 A20 SST RSMRST# D22 RSMRST#_SB 2 BAS16-1-GP
1
H7 AD26 PCICLK D4 0R2J-2-GP PCLK_ICH 3 DY Do Not Stuff 2nd = 83.00016.F11
D1 R2 Do Not Stuff TP64 1 SB_GPIO1 AG19 R5
AD27 PME# TACH1/GPIO1 CK_PW RGD CLK_PWRGD 3 3D3V_S0
G5 R225 33 EC_TMR AH21
AD28 ICH_PME# TP22 Do Not Stuff 10KR2J-3-GP TACH2/GPIO6
H6 AD29 1 33 ECSCI#_1 AG21 TACH3/GPIO7 CLPW ROK R6 PWROK 7,39
G1 33 ECSWI# A21
2
AD30 GPIO8
H3 AD31 1 GPIO12 C12 LAN_PHY_PW R_CTRL/GPIO12 SLP_M# B16 PM_SLP_M# 1
1
Do Not Stuff TP52 SB_GPIO13 C21 TP4 Do Not Stuff
PSW_CLR# ENERGY_DETECT/GPIO13 R204
INT_PIRQA# J5
Interrupt I/F H4 INT_PIRQE# SB 1 GPIO18
AE18
K1
TACH0/GPIO17 CL_CLK0 F24
B19
CL_CLK0 7
3K24R2F-GP
INT_PIRQB# PIRQA# PIRQE#/GPIO2 INT_PIRQF# GPIO18 CL_CLK1
E1 PIRQB# PIRQF#/GPIO3 K6 Do Not Stuff TP19 1 GPIO20 AF8 GPIO20
INT_PIRQC# J6 F2 INT_PIRQG# 1120 add the net(SATACLKREQ#) Do Not Stuff TP63 1 GPIO22 AJ22 F22 CL_DATA0 7
2
PIRQC# PIRQG#/GPIO4 SCLOCK/GPIO22 CL_DATA0
2
INT_PIRQD# INT_PIRQH#
Controller Link
C4 G2 Do Not Stuff TP69 A9 C19
GPIO
PIRQD# PIRQH#/GPIO5 G61 GPIO27 CL_DATA1
D19 GPIO28
3 SATACLKREQ# L1 C25 CL_VREF0_ICH
ICH9M-GP-NF SATACLKREQ#/GPIO35 CL_VREF0 CL_VREF1_ICH
AE19 SLOAD/GPIO38 CL_VREF1 A19
71.ICH9M.00U Do Not Stuff AG22
1
SDATAOUT0/GPIO39
1
C RP5 RP4 SDATAOUT1 AF21 F21 3D3V_S5 C390 C
3D3V_S0 3D3V_S0 TP68 Do Not Stuff SDATAOUT1/GPIO48 CL_RST0# CL_RST#0 7
SCD1U10V2KX-4GP
PCI_PERR# 1 10 PCI_REQ#3 1 10 1 GPIO49 AH24 D18 R205
GPIO49 CL_RST1#
1
INT_PIRQE# 2 9 INT_PIRQH# INT_PIRQF# 2 9 INT_PIRQD# GPIO57 A8 453R2F-1-GP
GPIO57/CLGPIO5
1
PCI_LOCK# 3 8 PCI_REQ#0 INT_PIRQG# 3 8 PCI_IRDY# A16 GPIO24 1 Do Not Stuff
INT_PIRQA# INT_PIRQC# PCI_SERR# PCI_TRDY# GPIO24/MEM_LED GPIO10 TP3 R55
4 7 4 7 26 ACZ_SPKR M7 C18
2
INT_PIRQB# ECSCI#_1 SPKR GPIO10/SUS_PW R_ACK GPIO14 Do Not Stuff
3D3V_S0 5 6 3D3V_S0 5 6 7 MCH_ICH_SYNC# AJ24 MCH_SYNC# GPIO14/AC_PRESENT C11
1 ICH_TP3 GPIO9 Do Not Stuff
B21 TP3 GPIO9/W OL_EN C20 1 DY
MISC
SRN8K2J-2-GP-U SRN8K2J-2-GP-U TP51 Do Not Stuff AH20 TP54
2
GPIO49 should be pulled down to PW M0
RP3 3D3V_S0 AJ20
PCI_REQ#2 PW M1
1 10 GND only when using Teenah. When AJ21 PW M2
1
PCI_REQ#1 2 9 INT_SERIRQ using Cantiga, this ball should C75
Do Not Stuff
SDATAOUT1 3 8 PCI_DEVSEL# R56
PM_CLKRUN# PCI_STOP# be left as No Connect. Do Not Stuff
4 7
2
5 6 PCI_FRAME# ICH9M-GP-NF DY DY
3D3V_S0
71.ICH9M.00U
2
SRN8K2J-2-GP-U No Reboot Strap
U16D 4 OF 6 SPKR LOW = Defaule
LAN High=No Reboot USB_OC#1 1
RP1
10
3D3V_S5
N29 V27 PM_BATLOW#_R 2 9 USB_OC#5
24 PCIE_RXN1 PERN1 DMI0RXN DMI_RXN0 7
ECSWI# SMB_LINK_ALERT#
Direct Media Interface
24 PCIE_RXP1 N28 PERP1 DMI0RXP V26 DMI_RXP0 7 RN5 3 8

24 PCIE_TXN1 C425 SCD1U10V2KX-5GP 2 1 TXN1 P27 U29 DMI_TXN0 7 USB_OC#0 4 7 GPIO10
C430 SCD1U10V2KX-5GP 2 TXP1 PETN1 DMI0TXN SMLINK0 SMB_ALERT#
24 PCIE_TXP1 1 P26 PETP1 DMI0TXP U28 DMI_TXP0 7 3D3V_S5 8 1 3D3V_S5 5 6
7 2 SMLINK1
L29 Y27 6 3 RSMRST#_SB SRN10KJ-L3-GP
31 PCIE_RXN2 PERN2 DMI1RXN DMI_RXN1 7
31 PCIE_RXP2 L28 PERP2 DMI1RXP Y26 DMI_RXP1 7 5 4
C418 SCD1U10V2KX-5GP 2 1 TXN2 M27 W 29 RP2 RP6
31 PCIE_TXN2 PETN2 DMI1TXN DMI_TXN1 7 3D3V_S5 3D3V_S5
C416 SCD1U10V2KX-5GP 2 1 TXP2 M26 W 28 USB_OC#2 1 10 USB_OC#8 1 10
31 PCIE_TXP2 PETP2 DMI1TXP DMI_TXP1 7 SRN10KJ-6-GP USB_OC#7 2 9 USB_OC#4 USB_OC#9 2 9 SB_GPIO13
PM_RI# DBRESET# USB_OC#10 GPIO14
MINICARD1 J29
J28
PERN3 DMI2RXN AB27
AB26
DMI_RXN2 7
PCIE_WAKE#
3
4
8
7 USB_OC#3 USB_OC#11
3
4
8
7
PCI-Express
B PERP3 DMI2RXP DMI_RXP2 7 B

K27 AA29 RP7 5 6 USB_OC#6 5 6
PETN3 DMI2TXN DMI_TXN2 7 3D3V_S5 3D3V_S5 GLAN_DOCK# 12
K26 AA28 DMI_TXP2 7 SATA0GP 1 10
PETP3 DMI2TXP SATA1GP PWROK
2 9 SRN10KJ-L3-GP SRN10KJ-L3-GP
G29 AD27 DMI_RXN3 7 GPIO36 3 8
PERN4 DMI3RXN 1D5V_S0 GPIO37
G28 PERP4 DMI3RXP AD26 DMI_RXP3 7 4 7
H27 AC29 5 6 GPIO57
PETN4 DMI3TXN DMI_TXN3 7
H26 PETP4 DMI3TXP AC28 DMI_TXP3 7
1
SRN10KJ-L3-GP
E29 T26 CLK_PCIE_ICH# 3 R224
PERN5 DMI_CLKN 24D9R2F-L-GP
E28 PERP5 DMI_CLKP T25 CLK_PCIE_ICH 3
F27 PETN5
F26 AF29
2
PETP5 DMI_ZCOMP DMI_IRCOMP_R

DMI_IRCOMP AF28
C29 PERN6/GLAN_RXN
C28 AC5 USB DY R195
PERP6/GLAN_RXP USBP0N USBPN0 23
D27 PETN6/GLAN_TXN USBP0P AC4 USBPP0 23 1 2
D26 AD3 Pair Device Do Not Stuff
PETP6/GLAN_TXP USBP1N
USBP1P AD2
D23 SPI_CLK USBP2N AC1 0 USB1
D24 AC2 D15
SPI_CS#1 SPI_CS0# USBP2P RSMRST#_SB
F23 SPI_CS1#/GPIO58/CLGPIO6 USBP3N AA5 USBPN3 31 1 NC 1
USBP3P AA4 USBPP3 31
1
D25 SPI_MOSI USBP4N AB2 USBPN4 18 2 NC 33 RSMRST#_KBC 3
SPI
E23 AB3 USBPP4 18 R196

SPI_MISO USBP4P
USBP5N AA1 3 MINIC1 BOOT BIOS Strap 2 100KR2J-1-GP
USB_OC#0 N4 AA2
23 USB_OC#0 OC0#/GPIO59 USBP5P
USB_OC#1 N5 W5 4 WEBCAM PCI_GNT#0 SPI_CS#1 BOOT BIOS Location BAT54-5-GP
2
USB_OC#2 OC1#/GPIO40 USBP6N 83.BAT54.D81
USB_OC#3
N6
P6
OC2#/GPIO41 USB
USBP6P W4
Y3 5 NC 0 1 SPI 2nd = 83.BAT54.X81
OC3#/GPIO42 USBP7N USBPN7 22
USB_OC#4 M1 Y2 USBPP7 22 1 0 PCI 3rd = 83.00054.Z81
A USB_OC#5 OC4#/GPIO43 USBP7P A
N2 OC5#/GPIO29 USBP8N W1 6 NC 1 1 LPC(Default) UMA Two Phase 2
USB_OC#6 M4 W2 A16 swap override strap
USB_OC#7 OC6#/GPIO30 USBP8P
M3 OC7#/GPIO31 USBP9N V2 USBPN9 23 7 Bluetooth
USB_OC#8 N3 V3 low = A16 swap override enable
USB_OC#9 N1
OC8#/GPIO44
OC9#/GPIO45
USBP9P
USBP10N U5
USBPP9 23
8 NC PCI_GNT#3 high = default Wistron Corporation
USB_OC#10 P5 U4 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
USB_OC#11 OC10#/GPIO46 USBP10P PCI_GNT#0 Do Not
P3 OC11#/GPIO47 USBP11N U1 USBPN11 30 9 USB2(High speed) 1 2 Stuff DY Taipei Hsien 221, Taiwan, R.O.C.
U2 USBPP11 30 R210
R73 USBP11P
USB_RBIAS_PN AG2 10 NC SPI_CS#1 1 Do Not
2 Stuff DY Title
USBRBIAS R212
2 1 AG1 USBRBIAS#
11 CardReader GNT0 and SPI_CS#1 PCI_GNT#3 1 Do Not
2 Stuff DY ICH9-M (2 of 4)_PCIE/USB/DMI
22D6R2F-L1-GP R208 Size Document Number Rev
ICH9M-GP-NF have a weak internal pull up
71.ICH9M.00U 1017 modify USB signal connection HM40-MV SB
5 4 3 2 1
5 4 3 2 1
U16F 6 OF 6
RTC_AUX_S5
6uA in G3 A23
VCCRTC VCC1_05
VCC1_05
A15
B15 1.63A 1D05V_S0
V5REF_S0 A6 C15 Layout Note:Place near ICH9M
V5REF VCC1_05
1
C389 C388 D15
VCC1_05
SCD1U10V2KX-4GP
Do Not Stuff
V5REF_S5 AE1 E15
V5REF_SUS VCC1_05
1
F15 C434 DY C439 DY C422 C441 C423 C395 DY C407 C442 C404
2
VCC1_05
SCD1U10V2KX-4GP
Do Not Stuff
Do Not Stuff
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Do Not Stuff
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY AA24
VCC1_5_B VCC1_05
L11
AA25 L12
2
VCC1_5_B VCC1_05
AB24 L14
VCC1_5_B VCC1_05
AB25 VCC1_5_B VCC1_05 L16
1D5V_S0
646mA AC24
AC25
VCC1_5_B
VCC1_5_B
VCC1_05
VCC1_05
L17
L18
AD24 VCC1_5_B VCC1_05 M11
D AD25 M18 D
VCC1_5_B VCC1_05
1
C414 C459 C415 C443 C453 C461 AE25 P11
VCC1_5_B VCC1_05
Do Not Stuff
Do Not Stuff
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY DY AE26 VCC1_5_B VCC1_05 P18
SC4D7U6D3V3KX-GP
1D5V_DMIPLL_ICH_S0
AE27 T11 L11 23mA
2
2
VCC1_5_B VCC1_05 1D5V_S0
AE28 VCC1_5_B VCC1_05 T18
AE29 VCC1_5_B VCC1_05 U11 1 2
F25 U18 IND-1D2UH-10-GP
CORE
VCC1_5_B VCC1_05
1
G25 VCC1_5_B VCC1_05 V11 DY 68.1R220.10D
H24 V12 C431 C435
VCC1_5_B VCC1_05 SCD01U16V2KX-3GP Do Not Stuff
H25 V14
2
VCC1_5_B VCC1_05
J24 VCC1_5_B VCC1_05 V16
J25 VCC1_5_B VCC1_05 V17
1D05V_S0
K24
K25
VCC1_5_B
VCC1_5_B
VCC1_05 V18
1 R221 2 48mA
1
SCD1U10V2KX-4GP
Do Not Stuff
L23 R29 C444 C447 Do Not Stuff
VCC1_5_B VCCDMIPLL C448
*Within a given well, 5VREF needs to be up before the L24 VCC1_5_B DY
corresponding 3.3V rail L25 W23 1D05V_DMI_ICH_S0 DY Do Not Stuff
2
VCC1_5_B VCCDMI
1015 modify component size of C390,C419 M24 VCC1_5_B VCCDMI Y23
1D05V_S0
M25 VCC1_5_B 2mA
47mA N23
N24
VCC1_5_B
VCC1_5_B
V_CPU_IO
V_CPU_IO
AB23
AC23
3D3V_S0 5V_S0 1D5V_S0 1D5V_APLL_S0 N25 3D3V_S0
L14 VCC1_5_B
1
P24 AG29 C436 C417 C419
VCC1_5_B VCC3_3
SCD1U10V2KX-4GP
Do Not Stuff
1 2 P25 SC4D7U6D3V3KX-GP
A
VCC1_5_B
1
VCCA3GP
IND-1D2UH-10-GP R24 AJ6 C474 C465 DY
2
VCC1_5_B VCC3_3
1
D6 R54 68.1R220.10D R25 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
2
100R2J-2-GP C477 VCC1_5_B
2mA RB751V-40-2-GP R26 VCC1_5_B VCC3_3 AC10
SC1U16V3ZY-GP
83.R2004.B8F C476 R27
VCC3_3=308mA 3D3V_S0
2
2nd = 83.R0304.A8F SC10U6D3V5MX-3GP VCC1_5_B
T24 AD19
K
V5REF_S0 3rd = 83.R3004.A8F VCC1_5_B VCC3_3

T27 VCC1_5_B VCC3_3 AF20
1
C T28 VCC1_5_B VCC3_3 AG24 C
1
C72 T29 AC20 3D3V_S0 C471

SCD1U16V2ZY-2GP VCC1_5_B VCC3_3 SCD1U10V2KX-4GP
U24
VCCP_CORE
2
VCC1_5_B
U25 B9
2
VCC1_5_B VCC3_3
1
C406 C402 C400 C412
V24 VCC1_5_B VCC3_3 F9
11mA
Do Not Stuff
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Do Not Stuff
V25 VCC1_5_B VCC3_3 G3 DY 3D3V_S0
1
U23 G6
2
Layout Note: 3D3V_S5 5V_S5 VCC1_5_B VCC3_3 C475
Place near ICH9
W24
VCC1_5_B VCC3_3
J2 DY SCD1U10V2KX-4GP
W25 J7
2
VCC1_5_B VCC3_3
K23 K7
A
VCC1_5_B VCC3_3
1
Y24
PCI
D7 R72 VCC1_5_B
Y25 AJ4
100R2J-2-GP 1D5V_S0 VCC1_5_B VCCHDA
2mA RB751V-40-2-GP
83.R2004.B8F 1.34A AJ19
VCCSATAPLL VCCSUSHDA
AJ3 11mA 3D3V_S5
1
2nd = 83.R0304.A8F
C403
K
V5REF_S5 3rd = 83.R3004.A8F AC16 AC8 VccSus1_05 C470

VCC1_5_A VCCSUS1_05
1
AD15 F17 1 2 SCD1U10V2KX-4GP
2
VCC1_5_A VCCSUS1_05
1
C117 C452 C440 C413 AD16 VCC1_5_A
ARX
SCD1U16V2ZY-2GP AE15 AD8
2
VCC1_5_A VCCSUS1_5
SC4D7U6D3V3KX-GP
SC1U16V3ZY-GP
Do Not Stuff
DY AF15 SCD1U10V2KX-4GP
2
VCC1_5_A 1D5V_S5
AG15 F18 1D5V_S5
VCC1_5_A VCCSUS1_5
1
AH15 C410
VCC1_5_A SCD1U10V2KX-4GP
AJ15
VCC1_5_A 3D3V_S5
A18
2
VCCSUS3_3
AC11 D16
VCC1_5_A VCCSUS3_3
AD11 D17
VCC1_5_A VCCSUS3_3
AE11 E22
VCCPSUS
VCC1_5_A VCCSUS3_3
1
ATX
AF11 C394 C399 C401
VCC1_5_A
Do Not Stuff
SCD1U10V2KX-4GP
AG10 SCD1U10V2KX-4GP
VCC1_5_A
AG11 AF1 DY
2
VCC1_5_A VCCSUS3_3
B AH10
VCC1_5_A VCCSUS3_3=212mA B
1
C458 C472 AJ10 T1

VCC1_5_A VCCSUS3_3
Do Not Stuff
SCD1U10V2KX-4GP
T2
VCCSUS3_3 3D3V_S5
AC9 T3
2
VCC1_5_A VCCSUS3_3
T4
VCCSUS3_3
DY AC18
VCC1_5_A VCCSUS3_3
T5
AC19 VCC1_5_A VCCSUS3_3 T6
1
U6 C445 C432 C437
VCCSUS3_3
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AC21 U7 Do Not Stuff
VCC1_5_A VCCSUS3_3
V6
2
VCCSUS3_3
G10 V7 DY
VCCPUSB
VCC1_5_A VCCSUS3_3
G9 W6
VCC1_5_A VCCSUS3_3
W7
VCCSUS3_3
AC12 Y6
VCC1_5_A VCCSUS3_3
AC13 Y7
1D5V_S0 VCC1_5_A VCCSUS3_3
USBPLL=11mA AC14 VCC1_5_A VCCSUS3_3 T7
AJ5 G22 VccSus1_05[3] C411

VCCUSBPLL VCCCL1_05
1
DY Do Not Stuff
1
C454 C473 C451 AA7 G23 VccSus1_5[3] 1 TP56 Do Not Stuff

VCC1_5_A VCCCL1_5 3D3V_S0
Do Not Stuff
USB CORE
SCD1U10V2KX-4GP SCD1U10V2KX-4GP AB6
2
VCC1_5_A
DY AB7 A24
2
VCC1_5_A VCCCL3_3
AC6 B24
3D3V_S0 VCC1_5_A VCCCL3_3
AC7
VCC1_5_A
19mA in S0;78mA in S3/S4/S5 VccLan1D05 A10
19mA in S0;73mA in S3/S4/S5
VCCLAN1_05
1
C73 A11
VCCLAN1_05
1
C74 C409 SCD1U10V2KX-4GP

1D5V_S0
Do Not Stuff
SCD1U10V2KX-4GP DY A12
2
VCCLAN3_3
23mA B12
2
VCCLAN3_3
A A
A27
VCCGLANPLL
1
GLAN POWER
C385 1 C421 D28 VCCGLAN1_5

SCD1U10V2KX-4GP
2
DY Do Not Stuff D29
E26
VCCGLAN1_5 Wistron Corporation
2
1D5V_S0 VCCGLAN1_5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

80mA E27
VCCGLAN1_5 Taipei Hsien 221, Taiwan, R.O.C.
A26 VCCGLAN3_3 Title
1
C397 3D3V_S0
SC4D7U6D3V3KX-GP DY C408 1mA ICH9M-GP-NF ICH9-M (3 of 4)_POWER
Do Not Stuff 71.ICH9M.00U Size Document Number Rev
2
HM40-MV SB
5 4 3 2 1
A B C D E
U16E 5 OF 6
AA26 VSS VSS H5

AA27 VSS VSS J23
AA3 VSS VSS J26
AA6 VSS VSS J27
AB1 VSS VSS AC22
AA23 VSS VSS K28
AB28 VSS VSS K29
AB29 VSS VSS L13
AB4 VSS VSS L15
AB5 VSS VSS L2
AC17 VSS VSS L26
4 AC26 VSS VSS L27 4
AC27 VSS VSS L5
AC3 VSS VSS L7
AD1 VSS VSS M12
AD10 VSS VSS M13
AD12 VSS VSS M14
AD13 VSS VSS M15
AD14 VSS VSS M16
AD17 VSS VSS M17
AD18 VSS VSS M23
AD21 VSS VSS M28
AD28 VSS VSS M29
AD29 VSS VSS N11
AD4 VSS VSS N12
AD5 VSS VSS N13
AD6 VSS VSS N14
AD7 VSS VSS N15
AD9 VSS VSS N16
AE12 VSS VSS N17
AE13 VSS VSS N18
AE14 VSS VSS N26
AE16 VSS VSS N27
AE17 VSS VSS P12
AE2 VSS VSS P13
AE20 VSS VSS P14
AE24 VSS VSS P15
AE3 VSS VSS P16
AE4 VSS VSS P17
AE6 VSS VSS P2
3 AE9 P23 3
VSS VSS
AF13 VSS VSS P28
AF16 P29 3D3V_S5 3D3V_S0
VSS VSS
AF18 VSS VSS P4
AF22 VSS VSS P7
AH26 VSS VSS R11
AF26 VSS VSS R12
AF27 VSS VSS R13
8
7
6
5
AF5 VSS VSS R14
AF7 R15 RN50
VSS VSS
AF9 VSS VSS R16 SRN2K2J-2-GP
AG13 VSS VSS R17
AG16 VSS VSS R18
AG18 R28
1
2
3
4
VSS VSS
AG20 VSS VSS T12
AG23 VSS VSS T13
AG3 VSS VSS T14
AG6 VSS VSS T15
AG9 T16 5V_S0
VSS VSS
AH12 VSS VSS T17
AH14 VSS VSS T23
AH17 VSS VSS B26
AH19 VSS VSS U12
AH2 VSS VSS U13 Q7
AH22 VSS VSS U14
AH25 VSS VSS U15
AH28 VSS VSS U16 13 SMB_CLK 3 4 SMBC_ICH 3,16,17
AH5 VSS VSS U17
AH8 VSS VSS AD23 2 5
2 2
AJ12 VSS VSS U26
AJ14 VSS VSS U27 1 6 2N7002DW -1-GP
AJ17 VSS VSS U3
AJ8 VSS VSS V1
B11 VSS VSS V13 13 SMB_DATA
B14 VSS VSS V15 SMBD_ICH 3,16,17
B17 VSS VSS V23
B2 VSS VSS V28
B20 VSS VSS V29
B23 V4
B5
VSS
VSS
VSS
VSS V5 SMBUS
B8 VSS VSS W26
C26 VSS VSS W27
C27 VSS VSS W3
E11 VSS VSS Y1
E14 VSS VSS Y28
E18 VSS VSS Y29
E2 VSS VSS Y4
E21 VSS VSS Y5
E24 VSS VSS AG28
E5 VSS VSS AH6
E8 VSS VSS AF2
F16 VSS VSS B25
F28 VSS
AH1,AJ1,AJ2,AH29,AJ28,AJ29
F29 A1 1 Do Not Stuff TP1

VSS NCTF_VSS#A1 Do Not Stuff TP2
G12 VSS NCTF_VSS#A2 A2 1
G14 B1 1 Do Not Stuff TP10
A1,A2,B1,A28,A29,B29
VSS NCTF_VSS#B1 Do Not Stuff TP8

G18 VSS NCTF_VSS#A29 A29 1
G21 A28 1 Do Not Stuff TP7
NCTF TEST PIN:
1 VSS NCTF_VSS#A28 1
G24 B29 1 Do Not Stuff TP9
VSS NCTF_VSS#B29 Do Not Stuff TP30
G26 VSS NCTF_VSS#AJ1 AJ1 1
Do Not Stuff TP31
G27
G8
VSS
VSS
NCTF_VSS#AJ2
NCTF_VSS#AH1
AJ2
AH1
1
1 Do Not Stuff TP28 Wistron Corporation
H2 AJ28 1 Do Not Stuff TP29 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VSS NCTF_VSS#AJ28 Do Not Stuff TP27 Taipei Hsien 221, Taiwan, R.O.C.
H23 VSS NCTF_VSS#AJ29 AJ29 1
H28 AH29 1 Do Not Stuff TP26
VSS NCTF_VSS#AH29 Title
H29 VSS
ICH9-M (4 of 4)
ICH9M-GP-NF Size Document Number Rev
71.ICH9M.00U HM40-MV SB
A B C D E
A B C D E
DM1
8 M_B_A[14..0] M_B_A0 102 108 M_B_RAS# 8
M_B_A1 A0 RAS#
101 109
DDR_VREF_S3
PARALLEL TERMINATION M_B_A2
M_B_A3
M_B_A4
100
99
A1
A2
A3
WE#
CAS#
113
M_B_WE# 8
M_B_CAS# 8
4 98 110 M_CS2# 7 4
M_B_A5 A4 CS0#
Put decap near power(0.9V) and pull-up resistor 97
A5 CS1#
115 M_CS3# 7
M_B_A6 94
M_B_A7 A6
RN19 92 79 M_CKE2 7
M_B_BS#1 M_B_A8 A7 CKE0
8 1 93 80 M_CKE3 7
M_B_A0 M_B_A9 A8 CKE1
7 2 91
M_B_A2 M_B_A10 A9
6 3 105 30 M_CLK_DDR2 7
M_B_A4 M_B_A11 A10/AP CK0
5 4 90 32 M_CLK_DDR#2 7
M_B_A12 A11 CK0#
89
SRN56J-5-GP M_B_A13 A12
116 164 M_CLK_DDR3 7
M_B_A14 A13 CK1
RN31 86 166 M_CLK_DDR#3 7
M_CKE3 Do Not Stuff TP37 M_B_A15 A14 CK1#
8 1 1 84 M_B_DM[7..0] 8
M_CKE2 A15 M_B_DM0
7 2 8 M_B_BS#2 85 10
M_B_A12 A16/BA2 DM0 M_B_DM1
6 3 26
M_B_BS#2 DM1 M_B_DM2
5 4 8 M_B_BS#0 107 52
BA0 DM2 M_B_DM3
8 M_B_BS#1 106 67
SRN56J-5-GP BA1 DM3 M_B_DM4
130
DM4 M_B_DM5
RN26 147
DM5
8 1 M_B_A6 M_B_DQ0 5 170 M_B_DM6
DQ0 DM6
7 2 M_B_A9 8 M_B_DQ[63..0]
M_B_DQ1 7 185 M_B_DM7
DQ1 DM7
6 3 M_B_A8 M_B_DQ2 17
DQ2
5 4 M_B_A5 M_B_DQ3 19
M_B_DQ4 DQ3
4 195 SMBD_ICH 3,15,17
SRN56J-5-GP M_B_DQ5 DQ4 SDA 3D3V_S0
6 197 SMBC_ICH 3,15,17
M_B_DQ6 DQ5 SCL
RN18 14
DQ6
8 1 M_B_A1 M_B_DQ7 16 199
DQ7 VDDSPD
7 2 M_B_A3 M_B_DQ8 23
DQ8
6 3 M_B_A10 M_B_DQ9 25 198
DQ9 SA0
1
5 4 M_B_WE# M_B_DQ10 35 200 DDRB_SA0 2 1
M_B_DQ11 DQ10 SA1 R220 C428
37
SRN56J-5-GP M_B_DQ12 DQ11 10KR2J-3-GP Do Not Stuff
20 50
2
M_B_DQ13 DQ12 NC#50
22
DQ13 NC#69
69 DY
RN10 M_B_DQ14 36 83
DQ14 NC#83
REVERSE TYPE
8 1 M_B_RAS# M_B_DQ15 38 120
M_CS2# M_B_DQ16 DQ15 NC#120
7 2 43 163
M_ODT2 M_B_DQ17 DQ16 NC#163/TEST
6 3 45
M_B_A13 M_B_DQ18 DQ17
5 4 55
M_B_DQ19 DQ18
57 81
SRN56J-5-GP M_B_DQ20 DQ19 VDD
44 82
M_B_DQ21 DQ20 VDD
46 87
M_B_DQ22 DQ21 VDD
RN27 56 88
M_B_A14 M_B_DQ23 DQ22 VDD
3 8 1 58 95 3
7 2 61 96
6 3 63 103
M_B_DQ26 DQ25 VDD
5 4 73 104
M_B_DQ27 DQ26 VDD
75 111
SRN56J-5-GP M_B_DQ28 DQ27 VDD 1D8V_S3
62 112
M_B_DQ29 DQ28 VDD
64 117
M_B_DQ30 DQ29 VDD
RN13 74 118
M_B_BS#0 M_B_DQ31 DQ30 VDD
8 1 76
M_B_CAS# M_B_DQ32 DQ31
7 2 123 3
M_CS3# M_B_DQ33 DQ32 VSS
6 3 125 8
M_ODT3 M_B_DQ34 DQ33 VSS
5 4 135 9
M_B_DQ35 DQ34 VSS
137 12
SRN56J-5-GP M_B_DQ36 DQ35 VSS
124 15
M_B_DQ37 DQ36 VSS
126 18
M_B_DQ38 DQ37 VSS
134 21
M_B_DQ39 DQ38 VSS
136 24
M_B_DQ40 DQ39 VSS
141 27
M_B_DQ41 DQ40 VSS
143 28
M_B_DQ42 DQ41 VSS
151 33
M_B_DQ43 DQ42 VSS
153 34
M_B_DQ44 DQ43 VSS
140 39
M_B_DQ45 DQ44 VSS
142 40
M_B_DQ46 DQ45 VSS
152 41
M_B_DQ47 DQ46 VSS
154 42
M_B_DQ48 DQ47 VSS
157 47
M_B_DQ49 DQ48 VSS
159 48
M_B_DQ50 DQ49 VSS
173 53
M_B_DQ51 DQ50 VSS
175 54
M_B_DQ52 DQ51 VSS
158 59
M_B_DQ53 DQ52 VSS
160 60
M_B_DQ54 DQ53 VSS
M_B_DQ55
174
176
DQ54 VSS
65
66 1D8V_S3 Place these Caps near DM1
M_B_DQ56 DQ55 VSS
179 71
M_B_DQ57 DQ56 VSS
181 72
M_B_DQ58 DQ57 VSS
189 77
Decoupling Capacitor
1
M_B_DQ59 DQ58 VSS C200 C488 C502 C503 C496
191 78
DQ59 VSS
SC2D2U6D3V3MX-1-GP
Do Not Stuff
SC2D2U6D3V3MX-1-GP
Do Not Stuff
SC2D2U6D3V3MX-1-GP
M_B_DQ60 180 121
M_B_DQ61 DQ60 VSS
Put decap near power(0.9V) 182 122 DY DY
2
M_B_DQ62 DQ61 VSS
192 127
DDR_VREF_S3 M_B_DQ63 DQ62 VSS
2 and pull-up resistor 194
DQ63 VSS
128
132 2
M_B_DQS#0 VSS
11 133
M_B_DQS#1 DQS0# VSS
8 M_B_DQS#[7..0] 29 138
M_B_DQS#2 DQS1# VSS
49 139
DQS2# VSS
1
C219 C234 C190 C154 C237 C191 C243 C206 C171 C223 C217 M_B_DQS#3 68 144
DQS3# VSS
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Do Not Stuff
Do Not Stuff
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Do Not Stuff
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Do Not Stuff
SCD1U16V2ZY-2GP
M_B_DQS#4 129 145

M_B_DQS#5 DQS4# VSS
DY DY DY DY 146 149
2
M_B_DQS#6 DQS5# VSS

167 150
1
M_B_DQS#7 DQS6# VSS C174 C195 C499 C493
186 155
DQS7# VSS
Do Not Stuff
Do Not Stuff
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
156
M_B_DQS0 VSS
13 161 DY DY
2
M_B_DQS1 DQS0 VSS
8 M_B_DQS[7..0] 31 162
M_B_DQS2 DQS1 VSS
51 165
M_B_DQS3 DQS2 VSS
70 168
M_B_DQS4 DQS3 VSS
131 171
M_B_DQS5 DQS4 VSS
148 172
M_B_DQS6 DQS5 VSS
169 177
M_B_DQS7 DQS6 VSS
188 178
DDR_VREF_S3_1 DQS7 VSS
183
VSS
7 M_ODT2 114 184
OTD0 VSS
7 M_ODT3 119 187
OTD1 VSS
190
VSS
1 193
VREF VSS
2 196
VSS VSS
1
C292 DY C290
SCD1U16V2ZY-2GP
Do Not Stuff 202 201

GND GND
2
MH1 MH2
MH1 MH2
DDR2-200P-23-GP-U1
High 9.2mm
62.10017.A71
2nd = 62.10017.B51
3rd = 62.10017.K51
1 1
Wistron Corporation
Title
DDR2 Socket 0 (DM1)

HM40-MV SB
A B C D E
A B C D E
PARALLEL TERMINATION 8 M_A_A[14..0]

M_A_A0
DM2
4 102 108 M_A_RAS# 8 4
DDR_VREF_S3 M_A_A1 A0 /RAS
Put decap near power(0.9V) and pull-up resistor 101
A1 /WE
109 M_A_WE# 8
M_A_A2 100 113
A2 /CAS M_A_CAS# 8
M_A_A3 99
M_A_A4 A3
RN12 98 110 M_CS0# 7
M_A_A13 M_A_A5 A4 /CS0
8 1 97 115 M_CS1# 7
M_CS0# M_A_A6 A5 /CS1
7 2 94
M_ODT0 M_A_A7 A6
6 3 92 79 M_CKE0 7
M_A_RAS# M_A_A8 A7 CKE0
5 4 93 80 M_CKE1 7
M_A_A9 A8 CKE1
91
SRN56J-5-GP M_A_A10 A9
105 30 M_CLK_DDR0 7
M_A_A11 A10/AP CK0
90 32 M_CLK_DDR#0 7
M_A_A12 A11 /CK0
RN24 89
M_A_A5 M_A_A13 A12
8 1 116 164 M_CLK_DDR1 7
M_A_A8 M_A_A14 A13 CK1
7 2 86 166 M_CLK_DDR#1 7
M_A_A9 Do Not Stuff TP38 M_A_A15 A14 /CK1
6 3 1 84 M_A_DM[7..0] 8
M_A_A3 A15 M_A_DM0
5 4 8 M_A_BS#2 85 10
A16/BA2 DM0 M_A_DM1
26
SRN56J-5-GP DM1 M_A_DM2
8 M_A_BS#0 107 52
BA0 DM2 M_A_DM3
8 M_A_BS#1 106 67
BA1 DM3 M_A_DM4
RN11 130
M_A_WE# M_A_DQ0 DM4 M_A_DM5
8 1 5 147
M_A_CAS# M_A_DQ1 DQ0 DM5 M_A_DM6
7 2 8 M_A_DQ[63..0] 7 170
M_CS1# M_A_DQ2 DQ1 DM6 M_A_DM7
6 3 17 185
M_ODT1 M_A_DQ3 DQ2 DM7
5 4 19
M_A_DQ4 DQ3
4 195 SMBD_ICH 3,15,16 3D3V_S0
SRN56J-5-GP M_A_DQ5 DQ4 SDA
6 197 SMBC_ICH 3,15,16
M_A_DQ6 DQ5 SCL
14
M_A_DQ7 DQ6
RN30 16 199
M_A_DQ8 DQ7 VDDSPD
8 1 23
M_CKE0 M_A_DQ9 DQ8
7 2 25 198
DQ9 SA0
1
6 3 M_A_BS#2 M_A_DQ10 35 200
M_A_A12 M_A_DQ11 DQ10 SA1 C433
5 4 37
M_A_DQ12 DQ11 Do Not Stuff
20 50
2
SRN56J-5-GP M_A_DQ13 DQ12 NC#50
22
DQ13 NC#69
69 DY
M_A_DQ14 36 83
M_A_DQ15 DQ14 NC#83
RN25 38 120
M_A_A7 M_A_DQ16 DQ15 NC#120
8 1 43 163
M_A_A11 M_A_DQ17 DQ16 NC#163/TEST
7 2 45
M_A_A14 M_A_DQ18 DQ17
6 3 55
M_CKE1 M_A_DQ19 DQ18
5 4 57 81
M_A_DQ20 DQ19 VDD
3 44 82 3
SRN56J-5-GP M_A_DQ21 DQ20 VDD
46 87
M_A_DQ22 DQ21 VDD
56 88
DQ22 VDD
REVERSE TYPE
RN17 M_A_DQ23 58 95
M_A_A2 M_A_DQ24 DQ23 VDD
8 1 61 96
7 2 63 103
6 3 73 104
5 4 75 111
M_A_DQ28 DQ27 VDD 1D8V_S3
62 112
SRN56J-5-GP M_A_DQ29 DQ28 VDD
64 117
M_A_DQ30 DQ29 VDD
74 118
M_A_DQ31 DQ30 VDD
RN16 76
M_A_A1 M_A_DQ32 DQ31
8 1 123 3
M_A_BS#1 M_A_DQ33 DQ32 VSS
7 2 125 8
M_A_A10 M_A_DQ34 DQ33 VSS
6 3 135 9
M_A_BS#0 M_A_DQ35 DQ34 VSS
5 4 137 12
M_A_DQ36 DQ35 VSS
124 15
SRN56J-5-GP M_A_DQ37 DQ36 VSS
126 18
M_A_DQ38 DQ37 VSS
134 21
M_A_DQ39 DQ38 VSS
136 24
M_A_DQ40 DQ39 VSS
141 27
M_A_DQ41 DQ40 VSS
143 28
M_A_DQ42 DQ41 VSS
151 33
M_A_DQ43 DQ42 VSS
153 34
M_A_DQ44 DQ43 VSS
140 39
M_A_DQ45 DQ44 VSS
142 40
M_A_DQ46 DQ45 VSS
152 41
M_A_DQ47 DQ46 VSS
154 42
Decoupling Capacitor M_A_DQ48
M_A_DQ49
M_A_DQ50
157
159
DQ47
DQ48
DQ49
VSS
VSS
VSS
47
48
173 53
DDR_VREF_S3 M_A_DQ51 DQ50 VSS
Put decap near power(0.9V) M_A_DQ52
175
158
DQ51 VSS
54
59
M_A_DQ53 DQ52 VSS
and pull-up resistor M_A_DQ54
160
174
DQ53 VSS
60
65
M_A_DQ55 DQ54 VSS
176 66
M_A_DQ56 DQ55 VSS
179 71
DQ56 VSS
1
C188 C167 C216 C232 C233 C236 C187 C170 C189 C215 C249 M_A_DQ57 181 72
DQ57 VSS
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SCD1U16V2ZY-2GP
Do Not Stuff
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
M_A_DQ58 189 77
M_A_DQ59 DQ58 VSS
DY DY DY DY DY 191 78
2
M_A_DQ60 DQ59 VSS

180 121
2 M_A_DQ61 DQ60 VSS 2
182 122
M_A_DQ62 DQ61 VSS
192 127
M_A_DQ63 DQ62 VSS
194 128
DQ63 VSS
132
M_A_DQS#0 VSS
11 133
M_A_DQS#1 /DQS0 VSS
8 M_A_DQS#[7..0] 29 138
M_A_DQS#2 /DQS1 VSS
49 139
M_A_DQS#3 /DQS2 VSS
68 144
M_A_DQS#4 /DQS3 VSS
129 145
M_A_DQS#5 /DQS4 VSS
146 149
M_A_DQS#6 /DQS5 VSS
167 150
M_A_DQS#7 /DQS6 VSS
186 155
/DQS7 VSS
156
M_A_DQS0 VSS
13 161
M_A_DQS1 DQS0 VSS
8 M_A_DQS[7..0] 31 162
M_A_DQS2 DQS1 VSS
51 165
M_A_DQS3 DQS2 VSS
70 168
M_A_DQS4 DQS3 VSS
131 171
M_A_DQS5 DQS4 VSS
1D8V_S3 Place these Caps near DM2 M_A_DQS6
148
169
DQS5 VSS
172
177
M_A_DQS7 DQS6 VSS
188 178
DQS7 VSS
183
DDR_VREF_S3_1 VSS
7 M_ODT0 114 184
1
C241 C500 C486 C498 C168 ODT0 VSS

7 M_ODT1 119 187
ODT1 VSS
Do Not Stuff
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
Do Not Stuff
SC2D2U6D3V3MX-1-GP
190
VSS
DY DY 1 193
2
VREF VSS
2 196
1
C291 VSS VSS

DY
C293 202 201
GND GND
SCD1U16V2ZY-2GP
Do Not Stuff
2
SKT-SODIMM20022U2GP
62.10017.691
2nd = 62.10017.891
3rd = 62.10017.K41
High 5.2mm
1
C495 C212 C491 C238

Do Not Stuff
SCD1U16V2ZY-2GP
Do Not Stuff
SCD1U16V2ZY-2GP
DY DY
2
1 1
Wistron Corporation
Title
DDR2 Socket 1 (DM2)
HM40-MV SB
A B C D E
1015 modify F1 CCD Pin
LCD/CCD CONN 1015 modify LCD1 pin define Pin Symbol
LCDVDD 1016 modify LCD1 pin define 1 CCD_PWR
1 1017 modify USB signal connection 2 USB-
1
C302 C304
SC10U10V5ZY-1GP SB 1121 add EC87 for EMI demand 3 USB+
Do Not Stuff
DY C305
SCD1U25V3ZY-1GP
LCD1 SB 1128 modify LCD1 4 GND
2
2
41
40 1 5 GND
USBPN4_R
39 2 USBPN4_R R2 1 2 0R0402-PAD USBPN4 13
38 3 USBPP4_R R1 1 2 0R0402-PAD USBPP4 13 USBPP4_R
37 4
36 5 F1
1
35 6 CCD_PW R 1 2 3D3V_S0
34 7 EC1 EC2
Do Not Stuff
Do Not Stuff
33 8 3D3V_S0 C2 C1 FUSE-1D1A6V-4GP-U
2
SC4D7U10V5ZY-3GP
Do Not Stuff
32 9 DY DY
7 GMCH_TXACLK+ 31 10 CLK_DDC_EDID CLK_DDC_EDID 7 DY 69.50007.691
2
7 GMCH_TXACLK- 30 11 DAT_DDC_EDID DAT_DDC_EDID 7
29 12 2ND = 69.50007.771
7 GMCH_TXAOUT2+ 28 13 BLON_OUT_1 R124 2 1 33R2J-2-GP BLON_OUT
7 GMCH_TXAOUT2- 27 14 BRIGHTNESS_CN
26 15
25 16 DCBATOUT
7 GMCH_TXAOUT1+
7 GMCH_TXAOUT1- 24 17 F2
23 18 PW R_INVERTER 2 1
7 GMCH_TXAOUT0+ 22 19
7 GMCH_TXAOUT0- 21 20 POLYSW -1D1A24V-GP
1
42 EC87 69.50007.A31EC3 C3
2nd = 69.50007.A41
Do Not Stuff
SCD1U50V3ZY-GP
SC10U25V6KX-1GP
ACES-CONN40C-4-GP
2
20.F1296.040 DY
R126
2 1 L_BKLTCTL 7
Do Not Stuff
R125
BRIGHTNESS_CN 2 1 BRIGHTNESS 33
Do Not Stuff
DY
BLON_OUT BLON_OUT 33
1
C309 C308
Do Not Stuff
Do Not Stuff
DY DY
2
SB 1106 modify R125,R126
SB 1125 modify R125,R126
3D3V_S0
1014 swap the part
2
1
RN34
SRN2K2J-1-GP
3
4
CLK_DDC_EDID
DAT_DDC_EDID
Layout 40 mil
LCDVDD 3D3V_S0
U30
7 GMCH_LCDVDD_ON GMCH_LCDVDD_ON 1 5
EN IN#5
2 GND
3 OUT IN#4 4
1
DY C306 SB UMA Two Phase 2

1
1
Do Not Stuff
C307 1015 modify component size of C303,C307

C303 G5285T11U-GP
2
Wistron Corporation
2
2
Do Not Stuff
SC4D7U6D3V3KX-GP
74.05285.07F 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

2nd = 74.09724.09F Taipei Hsien 221, Taiwan, R.O.C.
DY
Title
LCD CONN
HM40-MV SB
Date: Friday, November 28, 2008 Sheet 18 of 51
A B C D E
Layout Note:
Place these resistors
close to the CRT-out
Ferrite bead impedance: 10 ohm@100MHz Hsync & Vsync level shift
connector L3 1016 modify U8
5V_S0
1 2 CRT_R
7 GMCH_RED
SBK160808T-100Y-N-GP
1
68.00119.081 2nd = 68.00230.021
C44
L2 SCD1U16V2ZY-2GP
2
4 1 2 CRT_G 4
7 GMCH_GREEN
SBK160808T-100Y-N-GP
14
1
68.00119.081 2nd = 68.00230.021
L1
2 3 CRT_HSYNC1
CRT_B 7 GMCH_HSYNC
7 GMCH_BLUE 1 2
U8A
1
EC20 EC19 EC18 SBK160808T-100Y-N-GP C46 C42 C38 TSAHCT125PW -GP
14
7
8
7
6
5
4
Do Not Stuff
Do Not Stuff
Do Not Stuff
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
68.00119.081
RN39 2nd = 68.00230.021 73.74125.L13
2
SRN150F-1-GP DY DY DY 5 6 2nd = 73.74125.L12 CRT_VSYNC1
7 GMCH_VSYNC
DY DY
1
U8B
C21 C27 TSAHCT125PW -GP
1
2
3
4
7
Do Not Stuff
Do Not Stuff
2
2
73.74125.L13
1016 modify L1,L2 and L3 2nd = 73.74125.L12
Layout Note:
* Must be a ground return path between this ground and the ground on
3
the VGA connector. 3
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
DDC_CLK & DATA level shift

CRT I/F & CONNECTOR 5V_S0 83.R5003.C8F 3D3V_S0
CRT1 2nd = 83.R5003.H8H
1
2 3D3V_S0 5V_CRT_S0 2
17 SB 1127 modify CRT1 6 3rd = 83.5R003.08F
CH551H-30PT-GP
CRT_R
6 1 D4
1 11
7
2
7 F3
5V_CRT_S0 CRT_G 2 12 DAT_DDC1_5 2 1 2 5V_CRT_DDC 1016 modify D4
3
4
8
8
8
7
6
5
CRT_B 3 13 CRT_HSYNC1 RN38 FUSE-1D1A6V-4GP-U
SRN2K2J-1-GP 69.50007.691 RN37
9
4 14 CRT_VSYNC1 3 2nd = 69.50007.771 SRN10KJ-6-GP
CRT_IN#_R
10
5 15 CLK_DDC1_5
9
Q5
2
1
C39 4
1
2
3
4
16 CRT_IN#_R
SCD01U16V2KX-3GP 10 4 3 CLK_DDC1_5
5 1014 swap these nets

VIDEO-15-75-GP-U 5 2
20.20715.015 6 1
1014 swap these nets
CRT_VSYNC1
2nd = 20.20728.015
7 GMCH_DDCCLK 2N7002DW -1-GP
CRT_HSYNC1
CLK_DDC1_5
7 GMCH_DDCDATA
DAT_DDC1_5
DAT_DDC1_5
5V_S0
1 UMA Two Phase 2 1
1
C30 C23 C20 C26 D3

SC18P50V2JN-1-GP
Do Not Stuff 2
SC18P50V2JN-1-GP
Do Not Stuff
DY DY
Wistron Corporation
2
CRT_IN#_R 3 DY
36 CRT_IN#_R Do Not Stuff 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1 Taipei Hsien 221, Taiwan, R.O.C.
1
C40
Title
SC100P50V2JN-3GP
CRT Connector
2

HM40-MV SB
A B C D E
5 4 3 2 1
D D
SATA Connector
0912 add these parts for EMI demand
1001 delete these parts for EMI demand
1021 modify SATA1
SATA1
23
NP1
1
C C
2
3 SATA_TXP0 12
4 SATA_TXN0 12
5
6 SATA_RXN0 12
7 SATA_RXP0 12
8
9
10
11
12 1021 modify TC5 5V_S0
13
14
15
16 1016 modify D23
K
1
1
17
18 TC5 C50 D5
19 SR24-GP
2
Do Not Stuff
SCD1U16V2ZY-2GP
20 DY
21
A
22
NP2 83.2R004.J8M
24 2nd = 83.2R004.H8M
SKT-SATA22P-47-GP
B B
62.10065.741
A UMA Two Phase 2 A
Wistron Corporation
Title
HDD
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
SATA ODD Connector

5V_S0
D D
1
C273 TC7
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
1001 delete these parts for EMI demand
2
2
ODD1
P2 P1 ODD_DP 1 TP40 Do Not Stuff

+5V DP ODD_MD TP39 Do Not Stuff
P3 +5V MD P4 1
12 SATA_TXP1 S2 A+ GND S1
12 SATA_TXN1 S3 A- GND S4
12 SATA_RXP1 S6 B+ GND S7
12 SATA_RXN1 S5 B- GND P5
GND P6
NP1 NP1 GND 8
NP2 NP2 GND 9
C
SKT-SATA7P+6P-22-GP C
62.10065.351
2nd = 62.10065.521
3rd = 62.10065.421
B B
UMA Two Phase 2
A A
Wistron Corporation
Title
ODD
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
BLUETOOTH MODULE
1.5A / High Active Voltage 2V
D D
3D3V_BT_S0
U48 3D3V_S0 C530
SC4D7U10V5ZY-3GP
3D3V_BT_S0 1 5 1 2
VOUT VIN
2 GND
3 FLG# EN 4
1
EC85 BLUETOOTH_EN 33
SCD1U16V2ZY-2GP
RT9715CGBG-GP
2
74.09715.A7F SB
2nd = 74.05240.A7F
1113 modify U48
EC21 put near
BLUE1 / all
USB put one
choke near BLUE1
connector by 6 R123
Do Not Stuff
C EMI request 4 USB_7- 2 1
C
USBPN7 13
3 USB_7+ 2 1 USBPP7 13
2
R122
1
1 3D3V_BT_S0 EC92 EC93 Do Not Stuff
Do Not Stuff
Do Not Stuff
5
2
DY DY
ETY-CON4-21-GP-U
48 USB_7- USB_7-
48 USB_7+ USB_7+
20.F0984.004 48 3D3V_BT_S0 3D3V_BT_S0
2nd = 20.D0197.104
1017 modify USB signal connection
SB 1125 add EC92 and EC93

0930 modify BLUE1
B 1017 modify BLUE1 B
UMA Two Phase 2
A A
Wistron Corporation
Title
Bluetooth
HM40-MV SB
Date: Wednesday, November 26, 2008 Sheet 22 of 51
5 4 3 2 1
5 4 3 2 1
1017 modify USB signal connection

1021 modify and swap these parts(USB1 and USB2)
D D
5V_USB1_S0
USB2
USB2
6
8
R218 1
Do Not Stuff
2 1 USB_9- 2
13 USBPN9
2 1 USB_9+ 3
13 USBPP9
4
R219 7
Do Not Stuff 5
SKT-USB-177-GP
22.10218.U11
5V_S5 U12 5V_USB1_S0

5V_USB1_S0
USB1 1 GND VOUT 8
USB1 2 7
VIN VOUT
6 3 VIN VOUT 6
8 33 USB_PWR_EN#
4 EN# FLG# 5 USB_OC#0 13
1
C R244 1 C142 C
Do Not Stuff SC4D7U10V3KX-GP EC32
1
2 1 USB_0- 2 RT9715DGF-GP
13 USBPN0
2
2 1 USB_0+ 3 DY Do Not Stuff
13 USBPP0
4 74.09715.079
2
R245 7
Do Not Stuff 5 2nd = 74.00547.A79
SKT-USB-177-GP
22.10218.U11
1021 delete TC23

5V_USB1_S0
0912 add these parts for EMI demand 100 mil
1
EC69 EC74
Do Not Stuff
Do Not Stuff
USB_0- TC22 DY DY
USB_0+ ST150U6D3VBM-2-GP
2
USB_9-
USB_9+
1
80.15715.12L
EC72 EC70 EC76 EC75 2nd = 77.C1571.09L
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2
2
B
DY DY DY DY B
UMA Two Phase 2

A A
Wistron Corporation
Title
USB
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
1015 modify component size of R69

3D3V_S5 3D3V_LAN_S5
R69 0R2J-2-GP
2 1 Close to AR8114 Pin2
1D2V_LAN_S5
1
1
C118 1 C122 SB 1 C119 C116 AR8132 use 0 ohm resiter
1
SCD1U10V2KX-4GP
DY 13 PCIE_TXP1 CLK_PCIE_LAN_1 1 2 CLK_PCIE_LAN 3
Do Not Stuff
Do Not Stuff
SCD1U10V2KX-4GP
2 DY 2 13 PCIE_TXN1 CLK_PCIE_LAN#_1 C127 1 2SCD1U10V2KX-4GP CLK_PCIE_LAN# 3 AR8114A Atheros suggestion change to Bead R71
2
2
C126 SCD1U10V2KX-4GP 0R2J-2-GP
60 ohms/100Mhz 500mA (68.60090.0D1)
AVDDL_REG
2
1D2V_LAN_S5_D
1D2V_LAN_S5_D
1D2V_LAN_S5
AVDDL_REG
2
D D
C128
25 LAN_ACT_LED SCD1U10V2KX-4GP
1
LAN_RXP1 1 2
25 10M/100M_LED# C130 SCD1U10V2KX-4GP PCIE_RXP1 13
LAN_RXN1 1 2
C129 SCD1U10V2KX-4GP PCIE_RXN1 13
LAN_ACT_LED
1
FOR AR8114A LAN_ACT_LED is high enable pin 1016 modify RN53 and U10
R70
49
48
47
46
45
44
43
42
41
40
39
38
37
10KR2J-3-GP U11 C449 3D3V_LAN_S5
3D3V_LAN_S5
LED_10_100#
LED_ACT#
DVDDL
DVDDL
AVDDL/AVDDL_REG
GND
RX_N
REFCLKN
AVDD
TX_N
RX_P
REFCLKP
TX_P
1 2
2
SCD1U10V2KX-4GP
1
2
Close to U13 Pin8
VDD18O 1 36 1D2V_LAN_S5 RN53
VDD18O AVDD 3D3V_LAN_S5 U10 SRN4K7J-8-GP
2 VDD33 NO_CONN 35
LAN_RST 3 34 TP24 Do Not Stuff
PERST# TESTMODE
13 PCIE_W AKE# 4 WAKE# SMDATA 33 1 1 NC#1 VCC 8
1
CTRL12 5 32 1D2V_LAN_S5_D SB 1126 add R303,R304 2 7
4
3
CTR12 VDDL NC#2 WC#
1
C109 AVDDHO 6 31 1 Do Not Stuff R61 3 6 VPD_CLK

VDDHO SMCLK VPD_DATA TP23 E2 SCL VPD_DATA
7 VBG1P18V TWSI_DATA 30 Do Not Stuff 4 VSS SDA 5
SC1KP50V2KX-1GP 1D2V_LAN_S5 8 29 VPD_CLK
2
LANX1 AVDD TWSI_CLK 1D2V_LAN_S5_D

9 28 DY
2
LANX2 XTLO DVDDL R303 1 M24C08-W MN6TP-GP
10 XTLI LED_DUPLEX# 27 2 PCIE_REQ_LAN# 3
11 AVDDL_REG NC#26 26 72.24C08.I01
1
12 25 Do Not Stuff
RBIAS AVDDH
2
C102 C104 AR8132 R304 2nd = 72.24C08.J01

2
C R59 0R2J-2-GP C
AVDDH
AVDDH
AVDDL
TRXN0
TRXN1
TRXP0
TRXP1
NC#20
NC#21
NC#23
NC#24
AVDD
SCD1U10V2KX-4GP SC1KP50V2KX-1GP 2K37R2F-GP AR8114
SB
1
2
82.30020.791
1
AR8114-AL1E-GP 2nd = 82.30020.851 1113 modify C103 and C106
13
14
15
16
17
18
19
20
21
22
23
24
1001 modify RN9 X3
LANX2 1 2 LANX1
1
XTAL-25MHZ-96GP
AVDDH C103 C106
SC15P50V2JN-2-GP SC18P25V2JN-GP
2
1D2V_LAN_S5
1D2V_LAN_S5
RN9 C94
MDI0+
MDI0-
MDI1- 8MDIS1_LAN
MDI1+
1 1 2
MDI1-
MDI1+ 2 7 C95 SCD1U10V2KX-4GP
MDI0- 3 6MDIS0_LAN 1 2 R68
MDI0+ 4 5 SCD1U10V2KX-4GP 25 MDI0+ 7,13,30,31,33,34 PLT_RST1# 2 1 LAN_RST 1D2V_LAN_S5_D
25 MDI0- 0R2J-2-GP DY
1
SRN49D9F-1-GP Close to AR8114 Pin28 1 2
DY C114 C113 Do Not Stuff
Do Not Stuff Close to AR8114 Pin32 1 2
2
25 MDI1+ C107 SCD1U10V2KX-4GP
25 MDI1- Close to AR8114 Pin45 SB 1 2
AR8114 use 0ohm resister C124DY Do Not Stuff
AR8132 Atheros suggest to change 4.7uH choke Close to AR8114 Pin46 1 2
C123 SCD1U10V2KX-4GP
1015 modify component size of R79

1D2V_LAN_S5
B
L19 Do Not Stuff SB DY B
3D3V_LAN_S5 2 R79 1 3D3V_LAN_S5_2 1 2 Close to AR8114 Pin8 SB 1 2
1D8V_LAN_S5 AR8132 1128 Add L19 C101 Do Not Stuff
1
0R2J-2-GP C143 C146 Close to AR8114 Pin16 1 2

R66 SC4D7U6D3V3KX-GP 2 R295 1 VDD18O C125 SCD1U10V2KX-4GP
4K7R2J-2-GP DY Do Not Stuff Close to AR8114 Pin22 1 2
2
0R2J-2-GP C108 SCD1U10V2KX-4GP

3
SB Close to AR8114 Pin36 1 2

AR8114
2
1
CTRL12 1 BCP69-GP C99 SCD1U10V2KX-4GP
2
Q8 C537 C538 Close to AR8114 Pin39 1 2
Do Not Stuff
84.00069.B1B 1D2V_LAN_S5 AR8132 AR8132 C121 C131 Do Not Stuff

2
Do Not Stuff
2nd = 84.DCP69.01B Do Not Stuff SB DY
1
3rd = 84.00069.A1B
DY
1
C115
Do Not Stuff C132 Close to AR8114 Pin1 Close to AR8114 Pin6 AVDDH 1 2
SC10U6D3V5KX-1GP C110 SC1U6D3V2KX-GP
2
SB DY Close to AR8114 Pin15 1 2

1016 modify Q8 C105 SCD1U10V2KX-4GP
Close to AR8114 Pin19 1 2
C98 SCD1U10V2KX-4GP
Close to AR8114 Pin25 1 2
SB C100 Do Not Stuff
DY
1D2V_LAN_S5_D 1D2V_LAN_S5 1D8V_LAN_S5
2 R296 1 AVDDHO 2 R297 1 AVDDH

UMA Two Phase 2
A A
Do Not Stuff 0R2J-2-GP
AR8132 AR8114 Wistron Corporation

1D8V_LAN_S5
2
2 R67 1 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

C539 Taipei Hsien 221, Taiwan, R.O.C.
0R2J-2-GP SC1U6D3V2KX-GP DY
1
AR8114 1 2 Title
Atheros suggestion change to Bead C89 Do Not Stuff
60 ohms/100Mhz 500mA (68.60090.0D1)
Atheros AR8114/8132
SB 1 2 Size Document Number Rev
A3
Close to AR8114 Pin6
C120 SC1KP50V2KX-1GP
HM40-MV SB
5 4 3 2 1
A B C D E
3D3V_LAN_S5
10M/100M_LED# EC67 1
DY Do Not Stuff
LAN Connector
2
R214 1 CONN_PW R_2 EC68 1

DY Do Not Stuff
2 2
510R2F-L-GP DY Do Not Stuff
ACT_LED_B2 EC61 1 2
DY Do Not Stuff RJ1
ACT_LED_B1 EC64 1 2 9 A2(+) A1(-)::GREEN
24 10M/100M_LED# A1
4 SB CONN_PW R_2 A2 A2(+) A3(-):ORANGE 4
A3
RJ45_1 1
RJ45_2 2
SB RJ45_3 3
4
AR8114 RJ45_45 5
RJ45_6 6
R298 1 2 0R2J-2-GP ACT_LED_B1 7
24 LAN_ACT_LED
SB RJ45_78 8
R299 1 2 Do Not Stuff ACT_LED_B2 ACT_LED_B1 B1
3D3V_LAN_S5
AR8132 ACT_LED_B2 B2 B1(+) B2(-):YELLOW
10
AR8132 RJ45-125-GP-U1
R300 1 2 ACT_LED_B1
Do Not Stuff
R301 1 2 ACT_LED_B2
510R2F-L-GP 22.10277.021
AR8114
10/100 Lan Transformer
2nd = 22.10277.081
XF1
1D8V_LAN_S5 1 12 RJ45_6 MCT1
R58 24 MDI1-
MCT2
1 2 XRF_TDC 3 10 MCT2 RJ45_45
3 RJ45_78 3
24 MDI1+ 2 11 RJ45_3
0R2J-2-GP
SB SB 24 MDI0- 5 8 RJ45_2
4
3
2
1
C85 C86 C88 C87
4 9 MCT1 RN6
Do Not Stuff
SCD01U16V2KX-3GP
Do Not Stuff
Do Not Stuff
SRN75J-1-GP
2
2
DY DY DY 24 MDI0+ 6 7 RJ45_1
C64
5
6
7
8
XFORM-271-GP LAN_TERMINAL 1 2
68.HD081.301 SC1KP2KV8KX-GP
2nd = 68.68160.30B
3rd = 68.NS014.301
1016 modify XF1
2 2
1.route on bottom as differential pairs.

2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
RJ11 signal must leave the other signal

or power plane 100mil.
DOC_TIP,DOC_RING,TIP,RING:
W/S : 10/100 @ Surface layers
10/20 @ Inner layers
1 10/100 LAN Transformer RJ45 PIN UMA Two Phase 2 1
TD+ --> TX+ RJ45-1 Wistron Corporation

TD- --> TX- RJ45-2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
RD+ --> RX+ RJ45-3 Title
RD- --> RX- RJ45-6 LAN Connector

A3
HM40-MV SB
A B C D E
5 4 3 2 1
3D3V_S0
VDD_20561
1 R102 2 3VA_S0
Do Not Stuff
DY
1
C242 C248
1
3VA_S0 3D3V_S0
SCD1U10V2KX-4GP
L18
Do Not Stuff
C259 C264 5V_S0 3VA_S0
2
SCD1U10V2KX-4GP 1 2
2
SBK160808T-100Y-N-GP U19 DY
D SB 1118 delete C245 and C270 SCD1U10V2KX-4GP D
1 5
DVDD_1_8
VIN VOUT
68.00119.081 2 GND
3D3V_S0 AUD_AVEE 2nd = 68.00230.021 3 4
EN NC#4
1
C277 C276 1001 Add R107
1
DY Do Not Stuff
SCD1U10V2KX-4GP
1
1
Do Not Stuff
SB 1113 modify 2nd of U19 C274 Do Not Stuff C280
2
C247 Do Not Stuff Do Not Stuff
2nd = 74.09198.G7F
2
0911 add net name(DVDD_1_8) SB 1118 delete R107 and add L18 DY SB DY
2
1113 modify 2nd of U19
SCD1U10V2KX-4GP
44
26
40
36
9
4
3
U18
DVDD_1_8
DVDD_3_3
VDD_IO
DVDD
AVDD
AVDD
AVEE
0911 add net name(ACZ_SDATAIN0_R) 1014 swap these nets
PORTA_L 34 FRONTL 28
12 ACZ_RST#_AUDIO 11 RESET#
5.11K PORTA_R 35 FRONTR 28 1014 modify these nets
12 ACZ_BITCLK_AUDIO 6 BIT_CLK MICBIASB 19
12 ACZ_SYNC_AUDIO 10 SYNC MIC_L 20
12 ACZ_SDATAIN0 R101 1 2 ACZ_SDATAIN0_R 8 21
ACZ_SDATAOUT_AUDIO SDATA_IN MIC_R
12 ACZ_SDATAOUT_AUDIO 5 RN33
47R2J-2-GP SDATA_OUT MICBIASC AUD_MICIN_L
MICBIASC 18 1 4
SB 1126 add C541 and modify R101 PORTC_L 16 2 3 AUD_MICIN_R
ACZ_SDATAOUT_AUDIO 43 DIB_P
20K PORTC_R 17
42 SRN2K2J-1-GP
SC27P50V2JN-2-GP
DIB_N
1
C C541 MIC1-L_PORT-C C251 2 1 SC2D2U10V3KX-1GP AUD_MICIN_L 28

C
RN56 C501 27 MIC1-R_PORT-C C255 2 1 SC2D2U10V3KX-1GP AUD_MICIN_R 28
PORTD_L
33 KBC_BEEP 1 4 AUDIO_BEEP 1 2 AUDIP_PC_BEEP 12 39.2K 28
2
PC_BEEP PORTD_R
13 ACZ_SPKR 2 3
SC1U10V3KX-3GP
SRN1KJ-7-GP 48 14
S/PDIF PORTB_L
10K PORTB_R 15
MONO 29
AUD_GPIO2 45 30 SOUNDL 27
AUD_GPIO1 GPIO2 STEREO_L
46 GPIO1 STEREO_R 31 SOUNDR 27
27 EAPD# 47 EAPD#/GPIO0
CX20561 SENSEA 13 CX_SENSE
1 24 AUD_AVREF
DMIC_CLOCK VREF C271
2 DMIC_1/2
1
39 FLY_P 1 2SC1U10V3KX-3GP C507 C506
PC BEEP GAIN CONTROL FLY_P
37 FLY_N
SCD1U10V2KX-4GP
SC10U10V5ZY-1GP
FLY_N
2
22 VREF_LO
VREF_LO
Default gain is -6dB without populating the VREF_HI 23 VREF_HI
1
DVSS
DVSS
AVSS
AVSS
32
GND
10K-ohms pull-down resistors going to GPIO1 and RESERVED#32 C505 C504

RESERVED#33 33
GPIO2. 0912 add the part for EMI demand
2
SC1U10V3KX-3GP
SC1U10V3KX-3GP
CX20561-15Z-GP
49
7
41
25
38
AUD_GPIO1
AUD_GPIO2
B B
0911 add net name(FLY_P,FLY_N,VREF_LO,VREF_HI)

ACZ_BITCLK_AUDIO
2
EC35
R105 R106
Do Not Stuff
10KR2J-3-GP Do Not Stuff DY 3VA_S0

2
DY
1
2
R257
5K1R2F-2-GP
R256
1
GAIN 10K GPIO RESISTORS

1 5K1R2F-2-GP
2 LINEOUT_JD# 28
R615 R614
CX_SENSE 1 R258 2 MIC_JD# 28
0dB Populate Populate
20KR2F-L-GP
-6dB Omit Omit
1014 modify R258 from 10k to 20k ohm
-12dB Populate Omit
-18dB Omit Populate

A UMA Two Phase 2 A
Wistron Corporation
Title
Azalia codec CX20561
A3
HM40-MV SB
5 4 3 2 1
A B C D E
AUDIO OP AMPLIFIER
5V_S0 5VA_OP_S0
G2
1 2
1
Do Not Stuff
4 C6 4
SC4D7U10V5ZY-3GP
2
AGND
1009 modify net name for GND to AGND

C15 RN2
26 SOUNDL 1 2 L_LINE_IN_1 1 4 L_LINE_IN
LIN+RC 2 3 LIN+
SCD47U16V3ZY-3GP
SRN20KJ-GP-U
C13 RN3
26 SOUNDR 1 2 R_LINE_IN_1 1 4 R_LINE_IN
RIN+RC 2 3 RIN+
SCD47U16V3ZY-3GP
5VA_OP_S0 3D3V_S0
SRN20KJ-GP-U
1
2
5VA_OP_S0 1009 modify net name for GND to AGND RN35
SRN10KJ-5-GP
3 U1 3
C9 SC4D7U6D3V3KX-GP
4
3
2 5 BYPASS 1 2 AGND
VCC BYPASS
11 VCC SHUTDOWN 14
DY
R134
SC4D7U10V5ZY-3GP
SC1U16V3ZY-GP
C7 C8 R_LINE_IN 7 1 SPKR_L- SPKR_L- 28,48 2 1
D
RIN- LVO1 AMP_SHUTDOW N# 33
1
1 2 RIN+RC RIN+ 8 RIN+ LVO2 4 SPKR_L+ SPKR_L+ 28,48 Do Not Stuff

C14 SCD47U16V3ZY-3GP L_LINE_IN 15 12 SPKR_R- SPKR_R- 28,48 Q1
LIN- RVO1
1 2 LIN+RC LIN+ 16 9 SPKR_R+ SPKR_R+ 28,48 R135
2
C16 SCD47U16V3ZY-3GP LIN+ RVO2 EAPD#_R

G 2 1 EAPD# 26
0R2J-2-GP
3 2N7002-11-GP
S
VSS
VSS 10 84.27002.N31
AGND AGND AGND 6 NC#6
13 NC#13 GND 17
1009 modify net name for GND to AGND

G1454R41U-GP AGND
74.01454.013 1009 modify net name for GND to AGND
2 2
AC decopling
RN36
R5 2 1 0R2J-2-GP L_LINE_IN 1 8 SPKR_L-
LIN+ 2 7 SPKR_L+
R_LINE_IN 3 6 SPKR_R-
R4 2 1 Do Not Stuff RIN+ 4 5 SPKR_R+
DY SRN51KJ-GP
AGND
1 UMA Two Phase 2 1
Wistron Corporation
Title
AUDIO AMP
HM40-MV SB
A B C D E
5 4 3 2 1
MIC IN
0930 add 2nd for MIC1
MIC1
D 1015 modify RN57 NP2 D

NP1
26 MIC_JD# 5
RN57 4
1 4 AUD_MIC_R 3
26 AUD_MICIN_R
26 AUD_MICIN_L 2 3 6
AUD_MIC_L 2
SRN100J-3-GP 1
1
1
1
R260
R259
EU3 EU4
SHIELDING
1
DY DY EC80 EC79
PHONE-JK233-GP-U3
Do Not Stuff
Do Not Stuff
Do Not Stuff
2
2
2
Do Not Stuff
DY DY
22.10133.B01
MLVS0603M04-1-GP
2nd = 22.10251.491
2
MLVS0603M04-1-GP
LINE OUT SB 1126 modify EU1,EU2 and add EU3,EU4
0930 modify LOUT1
LOUT1
C C
NP2
NP1
26 LINEOUT_JD# 5
RN58 4
1 4 LOUT_R+1 3
26 FRONTR
26 FRONTL 2 3 6
LOUT_L+1 2
SRN68J-5-GP 1
1
SHIELDING
EU1 EU2
EC81
1
2
EC82 PHONE-JK235-GP-U2
2
ERN1
Do Not Stuff
Do Not Stuff
1014 swap the part DY DY DY
22.10133.B21
Do Not Stuff
MLVS0603M04-1-GP
MLVS0603M04-1-GP
2nd = 22.10251.511
4
3
2
B B
0930 add 2nd for SPK1
Internal Speaker SB 1119 modify SPK1
SPK1
6
27,48 SPKR_L- SPKR_L- ER1 1 2 0R3-0-U-GP SPKR_L-_R 4
27,48 SPKR_L+ SPKR_L+ ER2 1 2 0R3-0-U-GP SPKR_L+_R 3
27,48 SPKR_R- SPKR_R- ER3 1 2 0R3-0-U-GP SPKR_R-_R 2
27,48 SPKR_R+ SPKR_R+ ER4 1 2 0R3-0-U-GP SPKR_R+_R 1

5
ACES-CON4-7-GP-U
1
1
1
1

2
2
2
2
DY DY DY DY
UMA Two Phase 2

EC9
EC8
EC7
EC6
A 20.F0772.004 A
Wistron Corporation
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff

Title
AUDIO JACK
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
D D
MDC 1.5 CONN
0912 add the part for EMI demand
1002 modify MDC1

C C
SB
1112 delete MDC function
B B
UMA Two Phase 2
A A
Wistron Corporation
Title
MDC
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
3D3V_S0 3D3V_D_S0
R84
SD_CLK/XD_D1/MS_CLK
SD_DAT0/XD_D6/MS_D0
SD_DAT7/XD_D2/MS_D2
SD_DAT6/XD_D7/MS_D3
Do Not Stuff
1 2
SD_DAT4/XD_WP#
SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
XD_D4/SD_DAT1
SD_DAT5/XD_D0
XD_D5/MS_BS
XD_D3/MS_D1
D D
MS_INS#
XD_R/B#
XD_CD#
SD_CD#
XD_CE#
XD_CLE
XD_ALE
CARD_3D3V_S0
SD_WP
2
C186
DY Do Not Stuff
1
0910 update footprint of U15
19
20
21
23
25
26
27
28
29
31
34
35
37
38
39
40
41
42
43
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
SP17
SP18
SP19
2
C185
2
SC1U10V3KX-3GP C199
R85 SCD1U16V2ZY-2GP 9 24
1
Do Not Stuff CARD_3V3 MS_D5
22
1
AV_PLL MS_D4
1015 modify component size of C182 1 2 1 AV_PLL
R83 VREG 10
Do Not Stuff VREG
NC#30 30
3D3V_S0 1 2 3V_VBUS_S0 8 U15 7
3V3_IN NC#7
NC#3 3
3D3V_D_S0 33 RTS5159-GR-GP
D3V3
1
C197 11 D3V3
1
C182 Do Not Stuff DY C192
SC4D7U6D3V3KX-GP DY C252 Do Not Stuff
2
SCD1U16V2ZY-2GP
2
MODE_SEL 45
SD_CMD MODE_SEL
36 SD_CMD GND 6
R86 14 12
GPIO0 GND
1 2RREF 2 RREF GND 32
XTAL_CTR
C 44 46 C
6K19R2F-GP RST# GND
1009 add R96
EEDO
EECS
EESK
XTLO
EEDI
XTLI
DM
R96
DP
7,13,24,31,33,34 PLT_RST1# 2 1 RST# 1 R97 2 RST#_CHIP
Do Not Stuff 71.05159.00G
5
4
13
47
48
17
16
15
18
0R2J-2-GP
DY 1015 modify component size of R97
3D3V_D_S0 13 USBPP11
13 USBPN11
1
3D3V_D_S0
R100 MODE_SEL
100KR2J-1-GP 3 CLK48_5159
1
2
RST# R94
C228 0R2J-2-GP 1017 modify USB signal connection
1
C240 Do Not Stuff

2
SC1U10V3KX-3GP DY
2
2
B
5 IN1 CARD-READER (SD/MMC/MS/MS PRO/XD) 1009 modify this net
B
1013 modify card1

CARD1
CARD_3D3V_S0 23 25 SD_DAT0/XD_D6/MS_D0
SD_VCC SD_DAT0 XD_D4/SD_DAT1 SD_DAT0/XD_D6/MS_D0 SD_CLK/XD_D1/MS_CLK
14 MS_VCC SD_DAT1 29
33 10 SD_DAT2/XD_RE# XD_D4/SD_DAT1 SD_CMD
XD_VCC SD_DAT2 SD_DAT3/XD_W E# SD_DAT2/XD_RE# SD_CD#
SD_DAT3 11
SD_DAT3/XD_W E# SD_W P
SD_DAT5/XD_D0 8 12 SD_CMD
XD_D0 SD_CMD
2
SD_CLK/XD_D1/MS_CLK 9 24 SD_CLK/XD_D1/MS_CLK EC42 EC40 EC38 EC39 EC43 EC41 EC36 EC37
SD_DAT7/XD_D2/MS_D2 XD_D1 SD_CLK SD_CD#
26 XD_D2 SD_CD_SW 36
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
XD_D3/MS_D1 27 35 SD_W P
1
XD_D4/SD_DAT1 XD_D3 SD_WP_SW
28 XD_D4 DY DY DY DY
DY DY DY DY
XD_D5/MS_BS 30
SD_DAT0/XD_D6/MS_D0 XD_D5 SD_DAT0/XD_D6/MS_D0
31 XD_D6 MS_DATA0 19
SD_DAT6/XD_D7/MS_D3 32 20 XD_D3/MS_D1
XD_D7 MS_DATA1 SD_DAT7/XD_D2/MS_D2
MS_DATA2 18
XD_R/B# 1 16 SD_DAT6/XD_D7/MS_D3
SD_DAT2/XD_RE# XD_R/B MS_DATA3
2 XD_RE
XD_CE# 3 21 XD_D5/MS_BS
XD_CLE XD_CE MS_BS MS_INS#
4 XD_CLE MS_INS 17
XD_ALE 5 15 SD_CLK/XD_D1/MS_CLK
SD_DAT3/XD_W E# XD_ALE MS_SCLK
6 XD_WE
SD_DAT4/XD_W P# 7 XD_WP CARD_3D3V_S0 UMA Two Phase 2
A XD_CD# 34 13 A
XD_CD_SW 4IN1_GND
4IN1_GND 22
NP2 NP2 GROUND 38 Wistron Corporation

NP1 37 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
NP1 GROUND
1
C275 C279 Taipei Hsien 221, Taiwan, R.O.C.
SC4D7U10V5ZY-3GP Do Not Stuff
2 DY Title
2
CARD-PUSH-36P-GP-U1
CARD READER- RTS5159
20.I0043.001 Size Document Number Rev
HM40-MV SB
5 4 3 2 1
A B C D E
Mini Card Connector(WLAN)

4 4
1D5V_S0 3D3V_MINI 3D3V_MINI
MINIC1
53
NP1
Do Not Stuff TP49 1MINI_W AKE# 1 2
3 4
5 6
3 PCIE_REQ_MINI# 7 8
9 10
3 CLK_PCIE_MINI1# 11 12
3 CLK_PCIE_MINI1 13 14
15 16
33 E51_RxD 17 18
33 E51_TxD 19 20 W IRELESS_EN 33
21 22 PLT_RST1#_W LAN 1 2
R37 PLT_RST1# 7,13,24,30,33,34
13 PCIE_RXN2 23 24
1
25 26 Do Not Stuff 300R2F-GP
13 PCIE_RXP2 C47
27 28 1DY R168 2
29 30 DY Do Not Stuff
2
3 31 32 1017 modify USB signal connection 3
13 PCIE_TXN2
13 PCIE_TXP2 33 34
35 36 USBPN3 13
37 38 USBPP3 13
3D3V_MINI 39 40
41 42 LED_W W AN# 1 TP42 Do Not Stuff
43 44 W LAN_LED#_MC 36
45 46 LED_W PAN# 1
47 48 TP41 Do Not Stuff
49 50
5V_S5 51 52
NP2
54
SKT-MINI52P-20-GP
1015 modify component size of R158,R159
20.F1117.052
3D3V_S0 1 R159 2 3D3V_MINI
2nd = 62.10043.391 0R2J-2-GP
3D3V_S5 1 R158 2
Do Not Stuff
DY
1021 modify TC16 Place near MINIC1

2 3D3V_MINI 2
1D5V_S0
SB
1
TC16 C332 C360 C334 C326

1
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SB SB
Do Not Stuff
SC1U6D3V2KX-GP
Do Not Stuff
DY C333 C330 C356

2
SC1U6D3V2KX-GP
Do Not Stuff
Do Not Stuff
2
DY
DY
DY
Do Not Stuff
2nd = 77.C3371.051
UMA Two Phase 2

1 1
Wistron Corporation
Title
MINI CARD
HM40-MV SB
A B C D E
G7922_FAN_TACH 48
3D3V_S0
G7922_FAN_DRIVE 48
FAN1
R165
5
1 2 G7922_FAN_TACH 3
2 0930 modify FAN1
10KR2J-3-GP 1017 modify FAN1
G7922_FAN_DRIVE 1
*Layout* 15 mil 4
K
1
C346 D11
SC22U6D3V5MX-2GP SSM14PT-GP-U
2
83.1R004.080
MLX-CON3-10-GP-U
A
3rd = 83.1R004.M8M
20.F1000.003
Layout notice : 2nd = 83.1R004.K8M 2nd = 20.F0714.003
Both H_THERMDA and THERMDC routing
10 mil trace width and 10 mil spacing
4 H_THERMDC H_THERMDC THRM# 13

3D3V_S0 33 SMBC_Therm
R188 33 SMBD_Therm
1
C376
SC470P50V2JN-GP 1 2 G7922_VDD_3D3 R177
2 Do Not Stuff
4 H_THERMDA H_THERMDA
49D9R2F-GP 5V_S0 DY
ALERT# 2
1.For CPU Sensor
2
C370
SCD1U16V2KX-3GP
1
C374 must be near Q7 3D3V_S0
1
Layout notice : Both SGND2 and DXP2 routing DY
27
24
22
23
19
1
C373 must be near EMC2102 10 mil trace width and 10 mil spacing C361 C357 U42
SC4D7U10V5ZY-3GP Do Not Stuff
SCL
ALERT#
DVCC
DVCC
VCCS
SDA
2
G7922_SGND2
SCD1U16V2ZY-2GP
SB 1127 modify C377
2
1
SB
E
1
C272 C377 H_THERMDA 3 28 G7922_FAN_TACH R178
MMBT3904-4-GP Do Not Stuff SC470P50V2JN-GP G7922_DXP2 DXP1 FG1 C349
B DY 5 10KR2F-2-GP
1
DXP2
Q14 SB G7922_DXP3 7 25
2
DXP3 FAN1#25 G7922_FAN_DRIVE
84.T3904.C11 26
2
C
G7922_DXP2 FAN1#26
2nd = 84.03904.L06 1124 modify U42
2.System Sensor, Put between CPU and NB. 8 NC#8 TRIP_SET Pin Voltage
9 11 V_DEGREE
10
NC#9 THERM_SET
12 PURE_HW _SHUTDOW N# V_DEGREE
NC#10 THERM#
SCD1U16V2ZY-2GP
15 NC#15 THERMTRIP# 13 =(((Degree-75)/21)
1
17 NC#17
1
21 14 VGATE_PW RGD R180
NC#21 POWER_OK C355 3KR2F-GP
RESET#
Layout notice : Both SGND3 and DXP3 routing
SGND1
SGND2
SGND3
2
DGND
10 mil trace width and 10 mil spacing T8 90 degree
GND
2
CLK
C372 must be near EMC2102
C375 must be near Q8 G7922RV1U-GP
18
16
2
4
6
20
29
G7922_SGND3
Pin 9
THERM_SET
H_THERMDC
E
G7922_SGND2
G7922_SGND3
-->Channel 3 =(Test-75)*(1/32)*(15/33)VCCS
MMBT3904-4-GP B C51 C373
Q6 DY Do Not Stuff SC470P50V2JN-GP
CLK_32K
1
84.T3904.C11 Pin 10
C
2nd = 84.03904.L06
3RD = 84.03904.H11 G7922_DXP3 --> Fan is OFF
3.HW T8 sensor
G7922_PW ROK 39
2
EC60
Do Not Stuff
1
DY
SB 1125 modify RN40 and delete RN42

RUN_POW ER_ON
3D3V_S0 3D3V_AUX_S5
RN40
Q22 5 4 PURE_HW _SHUTDOW N#

G
6 3 RSMRST#
7 2 THRM#
13 PM_SUS_CLK D S CLK_32K_R 8 1 CLK_32K
1
R170 SRN10KJ-6-GP
2N7002-11-GP 240KR3-GP
84.27002.N31
2
32K suspend clock output 3D3V_AUX_S5

3
D10
DY
13,41 VGATE_PW RGD
Do Not Stuff
Do Not Stuff
Q21 UMA Two Phase 2
G
2nd = 83.BAT54.X81
1
3rd = 83.00054.Z81
PURE_HW _SHUTDOW N# RSMRST#
S D RSMRST# 33,39
Wistron Corporation
(dummy, KBC already delay) 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1
2N7002-11-GP C335 DY
84.27002.N31 Do Not Stuff Title
Thermal/Fan Controllor
2

HM40-MV SB
A
3D3V_AUX_S5 3D3V_AUX_S5 3D3V_S0
AVCC 2 R184 1
SB Do Not Stuff
SB
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
1
Do Not Stuff
Do Not Stuff
C366 C363 C374 C353 C354 C386 C380 C359 C362
1
DY
2
DY 1016 modify X1
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
3D3V_S0 82.30001.861
2nd = 82.30001.691
R189 1 2 0R2J-2-GP
7,13,24,30,31,34 PLT_RST1#
1
C359,C362 colse to Pin VDD X-32D768KHZ-46GP
BAT_IN# C60 C67
45 BAT_IN#
Do Not Stuff
1
C368 3 2
1KBC_XO_R 2
2
102
115
DY
80
19
46
76
88
4
1 OF 2 U9A
2
2 R201 1 Do Not Stuff
GPIO41
VDD
AVCC
VCC
VCC
VCC
VCC
VCC
4
4 1 4
DY
33KR2J-3-GP
124 104 X1 U9B 2 OF 2
PLT_RST1#_1 GPIO10/LPCPD# VREF R46
7
LRESET#
3 PCLK_KBC
2
3
LCLK A/D GPI90/AD0
97
98
AD_IA 46
1 2 KBC_XI 77 53 KCOL0
12,34 LPC_LFRAME# TP_LOCK_BN# 36
2
LFRAME# GPI91/AD1 R49 20MR3-GP 32KX1/32KCLKIN KBSOUT0/JENK# KCOL1
12,34 LPC_LAD0 126 99 WIRELESS_BTN# 36 52
LAD0 GPI92/AD2 KBSOUT1/TCK
2
127 100 51 KCOL2

12,34 LPC_LAD1 LAD1 GPI93/AD3 KBSOUT2/TMS
R187 128 108 50 KCOL3
12,34 LPC_LAD2 LAD2 GPIO05 KBC_XO 79 KBSOUT3/TDI KCOL4
DY Do Not Stuff 12,34 LPC_LAD3 1
125
LAD3 LPC GPIO04
96
30
32KX2 KBSOUT4/JEN0#
49
48 KCOL5
13 INT_SERIRQ SERIRQ 27 AMP_SHUTDOWN# GPIO55/CLKOUT KBSOUT5/TDO
Do Not Stuff 8 47 KCOL6
13 PM_CLKRUN#
1
GPIO11/CLKRUN# KBSOUT6/RDY# KCOL7

C371 122 63 43
12 KBRCIN# KBRST# KBC_THERMALTRIP# GPIO14/TB1 KBSOUT7 KCOL8
1 2PCLK_KBC_RC 12 KA20GATE ECSCI#_KBC
121
29
GA20 GPI94
101
105 PCB_VER0
KBC_THERMALTRIP# 39 13 PM_PWRBTN# 117
31
GPIO20/TA2 KBC KBSOUT8
42
41 KCOL9
ECSCI#/GPIO54 GPI95 46 CHG_ON# GPIO56/TA1 KBSOUT9
PCB_VER1 KCOL10
7 GMCH_BL_ON ECSWI#_KBC
9
GPIO65/SMI# D/A GPI96
106 26 KBC_BEEP 32
GPIO15/A_PWM KBSOUT10
40
KCOL11
DY 123
GPIO67/PWUREQ# GPI97
107 CRT_DEC# 36 13 EC_TMR 118
GPIO21/B_PWM KBSOUT11
39
KCOL12
18 BRIGHTNESS 62 38
GPIO13/C_PWM KBSOUT12/GPIO64 KCOL13
37
KBSOUT13/GPIO63 KCOL14
36
KBSOUT14/GPIO62 KCOL15
THERMAL-----> 32 SMBD_Therm 68
GPIO74/SDA2 GPIO01/TB2
64
KBC_PWRBTN#
PM_SLP_S3# 13,39,43,44 KBSOUT15/GPIO61/XOR_OUT
35
KCOL16
32 SMBC_Therm 67
69
GPIO73/SCL2 SMB GPIO03
95
93
KBC_PWRBTN# 36 13
12
GPIO12/PSDAT3 GPIO60/KBSOUT16
34
33 KCOL17
45,46 BAT_SDA GPIO22/SDA1 GPIO06 AC_IN# 46 GPIO25/PSCLK3 GPIO57/KBSOUT17
BATTERY-----> 45,46 BAT_SCL
70
GPIO17/SCL1 GPIO07
94
119 PLATFORM_ID LID_CLOSE# 37 11
10
GPIO27/PSDAT2
GPIO23 TPDATA GPIO26/PSCLK2 KROW0
6 35 TPDATA 71 54
GPIO24 TPCLK GPIO35/PSDAT1 KBSIN0 KROW1
GPIO30
109
Pin 120: MODEL_ID_0
35 TPCLK 72
GPIO37/PSCLK1 PS/2 KBSIN1
55
KROW2
36 NUM_LED 81
GPIO66/G_PWM SP GPIO31
120
65
KBSIN2
56
57 KROW3
GPIO32/D_PWM PWRLED 38 KBSIN3 KROW4
66 STDBY_LED 38 58
GPIO33/H_PWM KBSIN4 KROW5
16 CAP_LED 36 34 SPIDI 86 59
GPIO40/F_PWM AD_OFF F_SDI KBSIN5 KROW6
22 BLUETOOTH_EN 84 17 AD_OFF 45 34 SPIDO 87 60
SHBM GPIO77 GPIO42/TCK RSMRST#_KBC F_SDO KBSIN6 KROW7
83
GPIO76/SHBM SPI GPIO43/TMS
20 RSMRST#_KBC 13 34 SPICS# 90
F_CS0# FIU KBSIN7
61
31 WIRELESS_EN 82
91
GPIO75 GPIO GPIO44/TDI
21
22
PM_SLP_S4# 13,43,44 34 SPICLK 92
F_SCK
36 WLAN_TEST_LED GPIO81 GPIO45/E_PWM CHARGE_LED 38
23 85 ECRST#
GPIO46/TRST# Pin 24: MODEL_ID_1 VCC_POR#
24
GPIO47
25 SPI_WP# 34
E51_TxD GPIO50/TDO
31 E51_TxD 111
GPO83/SOUT_CR/BADDR1 GPIO51
26 TP_LOCK_LED 36 0916 move net(SPI_WP#) from U9 pin120 to pin25
E51_RxD 113 27 BLON_OUT WPCE773LA0DG-GP
31 E51_RxD GPIO87/SIN_CR GPIO52/RDY# BLON_OUT 18
112 28 Pin 28:UMA=NC; DIS=PL
GPO84/BADDR0 GPIO53
3 3
73 RN46
GPIO70
38 DC_BATFULL 114 74
GPIO16 GPIO71 ECRST#
14 75 3D3V_AUX_S5 5 4
S5_ENABLE 2 S5_ENABLE_KBC GPIO34 GPIO72 KBC_THERMALTRIP#
39,42,48 S5_ENABLE 1 15 110 USB_PWR_EN# 23 6 3
2K2R2J-2-GP R192 GPIO36 GPO82/TRIS#
SER/IR 7
8
2
1 LID_CLOSE#
3D3V_S0
RN45
VCORF 44 C378
1
VCORF KA20GATE SRN10KJ-6-GP Q23
8 1
1
SC1U10V3KX-3GP
KBRCIN# 7 2 B
32,39 RSMRST#
AGND
E51_TxD 6 3
GND
GND
GND
GND
GND
GND
2
C387 SHBM 5 4 MMBT3906-3-GP
2
C
SCD1U16V2ZY-2GP 84.03906.R11
WPCE773LA0DG-GP 2ND = 84.03906.F11
103
5
18
45
78
89
116
SRN10KJ-6-GP
3RD = 84.03906.P11
SB
FOR KBC DEBUG 1106 modify net connection of RN46 and RN44
3D3V_AUX_S5 3D3V_S0
R202 0912 add the part for EMI demand
DY
1 2 KCOL2 3D3V_S5
RN48
8
7
6
Do Not Stuff 5 SPIDI EC63 1 2 Do Not Stuff 8 1 RSMRST#_KBC
RN49 7 2 S5_ENABLE_KBC
SRN4K7J-12-GP DY 6 3 BLON_OUT
R203
DY 5 4
1 2 KCOL3 R191
AD_OFF 1 2
1
2
3
4
Do Not Stuff 1KR2J-1-GP SRN10KJ-6-GP

BAT_SCL SMBC_Therm
RN44
BAT_SDA SMBD_Therm
DY: ISP Mode disable C369 DY 3D3V_S0 1 8 PLATFORM_ID
PCLK_KBC 1 2 2 7 WIRELESS_BTN#
3 6 MEDIA_LED#
MEDIA_LED# 12,36
Do Not Stuff 4 5 TP_LOCK_BN#
D14
ECSCI#_KBC SRN10KJ-6-GP
6 1
13 ECSCI#_1
2 2
5 2 3D3V_AUX_S5
RN47
1 4 KBC_PWRBTN#
4 3 ECSWI#_KBC 2 3 BAT_IN#
13 ECSWI#
0930 modify net name for BIOS demand
SRN100KJ-6-GP
CH731UPT-GP
3D3V_AUX_S5
83.R0304.A8H
R174 R175
1
2nd = 83.R2002.B8E
Do Not Stuff
10KR2J-3-GP
3rd = 83.R3004.A8E DY
PlanarID
Internal KeyBoard Connector 48 KCOL17
KCOL17 (0,1)
SA: 0,0
2
KCOL0 PCB_VER0
48 KCOL0
KB1 20.K0326.026 2nd = 20.K0320.026 PCB_VER1
PTWO-CON26-1-GP KCOL16 R176 SB: 0,1
48 KCOL16
1
Do Not Stuff
48 KCOL15
KCOL15
KCOL14 R173
SB SC: 1,0
48 KCOL14
SD: 1,1
10KR2J-3-GP
KCOL13 DY
48 KCOL13
2
2
27
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
28
KCOL8
48 KCOL8
KCOL7
48 KCOL7 KCOL6
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
48 KCOL6 KCOL5
48 KCOL5 1118 modify PCB Ver. from SA to SB
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL4
48 KCOL4
KCOL3
48 KCOL3
KCOL2
48 KCOL2 KCOL1
48 KCOL1
0930 modify KB1 48 KROW0

KROW0
KROW7
1 1
48 KROW7 KROW6
48 KROW6 KROW5
48 KROW5
KROW4
Internal KeyBoard CONN 48
48
48
KROW4
KROW3
KROW2
KROW3
KROW2
UMA Two Phase 2
1 26 48 KROW1
KROW1
Wistron Corporation
........ 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
KCOL12
48 KCOL12 Title
KCOL11
48
48
KCOL11
KCOL10
KCOL10 KBC WPCE773L
KCOL9
48 KCOL9 Size Document Number Rev
CHECK KB SPEC. AND PIN DEFINE
Custom
HM40-MV SB
A
Date: Wednesday, November 26, 2008 Sheet 33 of 51
A B C D E
3D3V_AUX_S5
4 ERN2 4
SPICLK_ROM 1 8 SPICLK 33
SPIDO_ROM 2 7 SPIDO 33
5
6
7
8
SPIDI_ROM 3 6
RN41 SPIDI 33
4 5
1
3D3V_AUX_S5
SRN10KJ-6-GP 16M Bits SRN0J-7-GP EC59
SC4D7P50V2CN-1GP
2
SPI FLASH ROM
4
3
2
1
2
SPI_HOLD# ER6
Do Not Stuff
U40
1
33 SPICS# 1 8 3D3V_AUX_S5_SPI_ROM
SPIDI_ROM CS# VCC SPI_HOLD#
2 DO HOLD# 7
SPI_W P# 3 6 SPICLK_ROM
33 SPI_W P# WP# CLK SPIDO_ROM
4 GND DIO 5
GOLDEN FINGER FOR DEBUG BOARD
1
DY
EC55 W 25X16AVSSIG-GP DY
1
Do Not Stuff EC57 DY
2
EC58
Do Not Stuff
Do Not Stuff
2
72.25X16.A01
2nd = 72.25165.A01
3 3
3D3V_S0
SB
1013 modify U40 from 72.25X16.001 to 72.25X16.A01 GF1
1
0912 add the part for EMI demand 2 LPC_LAD0
3 LPC_LAD1 LPC_LAD[0..3]
LPC_LAD[0..3] 12,33
4 LPC_LAD2
5 LPC_LAD3
6 LPC_LFRAME# LPC_LFRAME# 12,33
7 PLT_RST1#
SPI_HOLD#EC56 1 PLT_RST1# 7,13,24,30,31,33
2 Do Not Stuff 8
9 PCLK_FW H PCLK_FW H 3
DY 10
11 PCLK_FW H
12
1
Do Not Stuff EC26
Do Not Stuff
2
DY Do Not Stuff DY
2 2
1 UMA Two Phase 2 1
Wistron Corporation
Title
BIOS/GOLDEN FINGER
HM40-MV SB
A B C D E
5 4 3 2 1
D 5V_S0 D
TOUCH PAD 1 6 0930 modify TPAD1 1124 modify TPAD1

T/P
1
1013 modify TPAD1
EC28 EC27
Do Not Stuff
Do Not Stuff
1015 modify TPAD1
2
DY DY
TPAD1
7
1
TP_CLK 2
TP_DATA 3
37,48 TP_LEFT 4
37,48 TP_RIGHT 5
6
8
5V_S0 PTW O-CON6-12-GP

20.K0382.006
2nd = 20.K0320.006
1
2
C RN7 C
SRN10KJ-5-GP
4
3
RN8
33 TPDATA 1 4 TP_DATA
TP_DATA 48
33 TPCLK 2 3 TP_CLK
TP_CLK 48
SRN33J-5-GP-U
2
EC29 EC30
1
DY DY
Do Not Stuff
Do Not Stuff
0910 delete RIGHT1 and LEFT1
B B
UMA Two Phase 2
A A
Wistron Corporation
Title
Touch pad
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
SB 1119 modify R130 and R133
5V_S0
Q18 R133 R130 C4 Do Not Stuff 1013 modify these power
R2
2 W LAN_LED#_1 1 2 W LAN_LED# 1 2 W LAN_LED#_R 1 2
1 10R2F-L-GP DY
31 W LAN_LED#_MC R1
15R2J-GP
3
D
EC4 Do Not Stuff
DTA143ZUB-GP Q19 1 2
84.00143.F1K 2N7002-11-GP DY
D
33 W LAN_TEST_LED G PowerCN1 D
EC5 Do Not Stuff
1016 modify Q18 17 1 2
S
1 DY SB
1120 modify PowerCN1 pin3 and remove EC44
2
3
4 W LAN_LED#_R 48
5 W IRELESS_BTN#_1 48
6 TP_LOCK_LED#_R TP_LOCK_LED#_R 48
7 TP_LOCK_BN#_1 48
8 PW RLED#_R PW RLED#_R 48
9 KBC_PW RBTN#_1 KBC_PW RBTN#_1 48
Q17 R132 10 3D3V_S0
3 TP_LOCK_LED# 1 2 TP_LOCK_LED#_R 11 CAP_LED#_R
R1 100R2J-2-GP CAP_LED#_R 48
33 TP_LOCK_LED 1 12 NUM_LED#_R 48
2 13 MEDIA_LED#_R
R2 MEDIA_LED#_R 48
14
DTC143ZUB-GP 15
16
84.00143.G1K 1016 modify Q15,Q16 and Q17
2nd = 84.00143.D1K 18
3rd = 84.00143.E1K SB
Q16 R129 KYO-CON16-GP
3 NUM_LED# 1 2 NUM_LED#_R
1 R1 604R2F-2-GP 20.K0384.016 1112 remove the signal( STDBY_LED#_R)
33 NUM_LED
2 2nd = 20.K0395.016
C R2 C
DTC143ZUB-GP
84.00143.G1K
2nd = 84.00143.D1K 1
3rd = 84.00143.E1K
Q15 R128
3 CAP_LED# 1 2 CAP_LED#_R
1 R1 604R2F-2-GP
33 CAP_LED
R2
2 16
DTC143ZUB-GP
84.00143.G1K
2nd = 84.00143.D1K
3rd = 84.00143.E1K
R3
12,33 MEDIA_LED# 1 2 MEDIA_LED#_R
604R2F-2-GP
R127
1 2 PW RLED#_R
38 PW RLED#_FR 604R2F-2-GP
B B
SB
1112 remove these signals( STDBY_LED#_FR and STDBY_LED#_R) and R131

RN1
KBC_PW RBTN#_1 1 8 KBC_PW RBTN# 33
W IRELESS_BTN#_1 2 7 W IRELESS_BTN# 33
TP_LOCK_BN#_1 3 6 TP_LOCK_BN# 33
4 5 CRT_IN#_R
33 CRT_DEC# CRT_IN#_R 19
SRN470J-3-GP
KBC_PW RBTN#_1
W LAN_LED#_R
TP_LOCK_LED#_R
2
G1 NUM_LED#_R
CAP_LED#_R
Do Not Stuff
1
A EC46 EC45 EC49 EC47 A

UMA Two Phase 2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2
DY DY DY DY
Wistron Corporation
Title
Power Board
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
TP_LEFT
1017 modify RN60
TP_L1 RN60
D
1 3
5
TP_LEFT#_1 1
2
4
3
TP_LEFT 35,48
TP_RIGHT 35,48
Cover Up Switch D
1
2 4 EC84 3D3V_AUX_S5
Do Not Stuff SRN470J-4-GP-U
2
SW -TACT-119-GP DY
1
62.40009.671 R40
DY Do Not Stuff
U4
2nd = 62.40012.101 LID_CLOSE#
2 LID_CLOSE# 33
2
OUT
3 GND
TP_RIGHT
2
1 EC22
VDD Do Not Stuff DY
1
ME268-002-GP
TP_R1
1 3 TP_RIGHT#_1
74.00268.07B
2
EC21
1
5 SCD1U16V2ZY-2GP
EC83
1
2 4 Do Not Stuff
2
DY
SW -TACT-119-GP
1016 modify U4
62.40009.671
1017 modify U4
C
2nd = 62.40012.101 C
1017 add U61,R52,EC24 and EC23

1020 delete U61,R52,EC24 and EC23
B B
A UMA Two Phase 2 A
Wistron Corporation
Title
SWITCHS
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
1015 modify the power from 3D3V_S5 to 5V_S5
SB
1106 modify LED11
D D
PW RLED#_FR 36
Blue 5V_S5
Q27 R291
3 PW RLED#_FR 1 2 PW RLED#_FR_R 3 1
1 R1 604R2F-2-GP
33 PW RLED
2
R2 STDBY_LED#_FR 1 R292 2 STDBY_LED#_FR_R 4 2
DTC143ZUB-GP 100R2J-2-GP
84.00143.G1K
2nd = 84.00143.D1K SB LED11
3rd = 84.00143.E1K Orange
LED-BO-4-GP
Q28 83.00195.G70
3 2nd = 83.19223.A70
1 R1
33 STDBY_LED
2 1112 remove the signal( STDBY_LED#_FR)
R2 1014 modify these LEDs(LED11,LED12)
DTC143ZUB-GP 1017 modify R291 and R293
84.00143.G1K 1015 modify the power from 3D3V_S5 to 5V_S5
2nd = 84.00143.D1K
3rd = 84.00143.E1K
Blue 5V_AUX_S5
SB 1106 modify LED12
Q29 R293
C 3 1 2 DC_BATFULL#_FR 3 1 1106 modify LED power from 5V_S5 to 5V_AUX_S5 C
1 R1 604R2F-2-GP
33 DC_BATFULL
2
R2 4 2
DTC143ZUB-GP
84.00143.G1K
2nd = 84.00143.D1K LED12
3rd = 84.00143.E1K Orange
LED-BO-4-GP
Q30 R294 83.00195.G70
3 1 2 CHARGE_LED_FR 2nd = 83.19223.A70
1 R1 100R2J-2-GP
33 CHARGE_LED
2
R2
DTC143ZUB-GP
84.00143.G1K
2nd = 84.00143.D1K
3rd = 84.00143.E1K
1016 modify Q27~Q30
B B
A UMA Two Phase 2 A
Wistron Corporation
Title
LED
HM40-MV SB
5 4 3 2 1
Aux Power 3D3V_AUX_S5
Run Power
I min = 300 mA
5V_AUX_S5
U43 3D3V_AUX_S5 5V_S0 5V_S5
1 5 U20
VIN VOUT S D
2 GND DY
C269
1
S D
8
3 EN NC#4 4 2 7
1 2 3 S D 6
4 G D 5
Q13
Do Not Stuff
Do Not Stuff
Do Not Stuff DCBATOUT Do Not Stuff
1
1
DY C375 Do Not Stuff NDS0610-NL-GP RUN_POW ER_ON AO4468-GP
C379 R119 84.04468.037
2nd = 74.09198.Q7F Z_12V
DY
3D3V_AUX_S5_EN
1 2 S D
2
2
DY
K
1
1
3D3V_S0 10KR2J-3-GP 1
R115 C278 R120 D9
G
5V_AUX_S5 3D3V_S0
SCD22U25V3KX-GP
SB 3D3V_S5
10KR2J-3-GP
2 PDZ9D1B-GP
330KR2J-L1-GP
R190 R118 U21
Do Not Stuff 1113 modify 2nd of U43 R109 1 2 Z_12V_G3 1 S D 8
A
2 1 Do Not Stuff 2 S D 7
1
330KR2J-L1-GP 83.9R103.C3F S D
DY 3 6
1
R117 2nd = 83.9R103.F3F 4 G D 5
3D3V_runpwr 2
C372 DY 100KR2J-1-GP
Do Not Stuff AO4468-GP
2
Z_12V_D4 1016 modify D9 84.04468.037
2
Q12
Z_12V_D3
Q11
4 3
D
Do Not Stuff
DY
5 2
G Z_12V_D3 6 1
S
2N7002DW -1-GP
84.27002.D3F
PM_SLP_S3# 13,33,43,44
3D3V_S5
Do Not Stuff
U17 C257
G7922_PW ROK 1 1 2
32 G7922_PW ROK B
VCC 5 DY
13,33,43,44 PM_SLP_S3# 2 A
Y 4 PW ROK 7,13
3 GND
74LVC1G08GW -1-GP
73.01G08.L04 1D05V_S0
2nd = 73.7SZ08.AAH
3rd = 73.01G08.L03
1
1D05V_S0 R112
Do Not Stuff
DY
2
2
R113
56R2J-4-GP
C266
1
PM_THRMTRIP-A# 4,7,12 1 2
DY Do Not Stuff
B
R114 DY
1KR2J-1-GP E C
E
KBC_THERMALTRIP# 33
1 2 H_PW RGD# B Q9
4,12,48 H_PW RGD Q10
MMBT2222A-3-GP Do Not Stuff
C
1
84.02222.V11
C268 2nd = 84.02222.R11
SC2D2U16V3KX-GP
2
D8
33,42,48 S5_ENABLE 1
3 RSMRST# 32,33
83.00016.B11
2 BAS16-1-GP
2nd = 83.00016.F11 UMA Two Phase 2
Wistron Corporation
Title
RUN POWER and 3D3V_AUX_S5
HM40-MV SB
5 4 3 2 1
CPU_CORE TPS51125 RT9018A

ISL6266A 5V/3D3V 1D5V_S0
VID Setting Output Signal Input Power Output Power
VID0 1D8V_S3 1D5V_S0 (2.5A)
VID0(I / 3.3V) VGATE_PWRGD DCBATOUT_51125 5V_S5 (6A) VIN 1D5V(O)
PGOOD VIN 5V(O)
D
VID1 D
VID1(I / 3.3V)
VID2 Input Signal 3D3V_S5 (6A) PM_SLP_S3# CPUCORE_ON
VID2(I / 3.3V) S5_ENABLE 3D3V(O) EN PGOOD
EN0
VID3
VID3(I / 3.3V) 5V_AUX_S5
Output Power 5V(O)
VID4 Output Signal RT9026
VID4(I / 3.3V) VCC_CORE(Imax=38A) ALW_PWRGD_3V_5V 0D9V_S0
VCC_CORE_PWR(O) PGOOD 3D3V_AUX_S5 5V_S5
VID5 3D3V(O) VIN
VID5(I / 3.3V)
1D8V_S3 0D9V_S3 (1A)
VID6 VLDOIN VTT
VID6(I / 3.3V)
PM_SLP_S4#
Input Signal S3 0D9V_S3_1
VTTREF
CPUCORE_ON
EN (I / 3.3V) S5
C C
Voltage Sense
VCC_SENSE
VSEN(I / Vcore)
VSS_SENSE
RGND(I / Vcore)
Input Power
DCBATOUT_6266A
VCC(I) Charger BQ24745
5V_S0
VCC(I)
Input Signal Output Signal
3D3V_S0
VCC(I) CHG_ON# AC_IN#
B CHGEN# ACGOOD# B
AD_IA
24750_CELLS SRSET
TPS51124 CELLS
1D8V/1D05V
Input Power Output Power Input Power Output Power
5V_S5
VDD
1D8V_S3 (10A) AD+ BT+
DCBATOUT_51124 1D8V (O) ACN VOUT (O)
VCC
VOUT (O) DCBATOUT
1D05V_S0 (15A) Adapter
Input Signal 1D05V(O)
PM_SLP_S4#
EN1 Input Signal Output Signal
AD_IN# UMA Two Phase 2
PM_SLP_S3# AD_OFF (I) (O)
EN2
A A
Wistron Corporation
CPUCORE_ON Output Signal Input Power Output Power Taipei Hsien 221, Taiwan, R.O.C.
PGOOD1 AD_JK AD+ Title

VCC(I) VCC(O)
PGOOD2 Power Sequence Logic
5V_AUX_S5 Size Document Number Rev
VCC(I) B
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
4,7,12 H_DPRSTP# PM_DPRSLPVR 7,13 DCBATOUT_6266A

DCBATOUT DCBATOUT_6266A DCBATOUT DCBATOUT_6266A
G53 G48 3D3V_S0 CPUCORE_ON 43,44

2008/05/06
1 2 1 2
2
C12 C311 C313 DY
Do Not Stuff
Do Not Stuff
SC10U25V6KX-1GP
Do Not Stuff Do Not Stuff H_VID[6..0] 5 C317
5
6
7
8
G52 TC17 G50 Do Not Stuff
499R2F-2-GP
1
D
D
D
Do Not Stuff
D
1 2 DY 1 2 R141 U38 DY DY
0R2J-2-GP
2
H_VID6
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0
10R3F-GP BSC120N03MS-G-GP
G54 G49
Vcc_core
1 Not Stuff
1 2 1 2
R144 0R2J-2-GP
R143 0R2J-2-GP
R139 0R2J-2-GP
R138 0R2J-2-GP
R146 0R2J-2-GP
R142 0R2J-2-GP
R137 0R2J-2-GP
R136 0R2J-2-GP
D D
G
S
S
S
1 Iomax=38A
1
Do Not Stuff TC18 Do Not Stuff
4
3
2
1
1
1
G51 G47 Cyntec 10*10*4
Do
1
SE100U25VM-L1-GP
6266A_DPRSTP# 2 R140
6266A_DPRSLPVR 2 R145
1 2 1 2 6266A_UGATE1
DCR=1.05+-5%mohm, Irating=30A
2
C314 DY
Do Not Stuff 79.10712.L02 Do Not Stuff
20080930 Isat=60A
R147
R147
2nd = 79.10112.3JL SCD1U10V2KX-4GP VCC_CORE
6266A_VR_ON 2
2
L8
2
6266A_PHASE1 1 2
3D3V_S0
6266A_3V3
6266A_D6
6266A_D5
6266A_D4
6266A_D3
6266A_D2
6266A_D1
6266A_D0
20081117 L-D36UH-1-GP
5
6
7
8
5
6
7
8
1
TC4 TC20 TC2
D
D
D
D
D
D
D
D
U7 U37
Do Not Stuff
SE330U2VDM-L-GP
Do Not Stuff
Id=19.5A BSC057N03MSG-GP 68.R3610.20A CAP CAP
BSC057N03MSG-GP
2
1
U5 2nd = 68.R3610.20C
R148 Qg=21.5~33nC,
49
48
47
46
45
44
43
42
41
40
39
38
37
2
1K91R2F-1-GP Rdson=5.5~6.7mohm
1D05V_S0
G
S
S
S
G
S
S
S
G57
3V3
CLK_EN#
DPRSTP#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
GND
DPRSLPVR
VR_ON
POWER SB Do Not Stuff G58
4
3
2
1
4
3
2
1
Do Not Stuff
20080930 R151
1
1 36 6266A_BOOT1 1 2
13,32 VGATE_PW RGD PGOOD BOOT1
1
0R2J-2-GP 2D2R2J-GP 6266A_BOOT1_R Do Not Stuff

R154 R1491 26266A_PSI# 2 35 6266A_UGATE1 1 Do Not Stuff 2nd = 77.C3371.051
4 PSI# PSI# UGATE1
68R2-GP C320 6266A_ LGATE1 2nd = 77.C3371.051
6266A_PMON_R 1
1 2 2 6266A_PMON3 PMON 34 6266A_PHASE1 2 C321
R150 4K99R2F-L-GP PHASE1 SCD22U25V3KX-GP
2
SCD1U25V3KX-GP 1 26266A_RBIAS4 RBIAS 33

C R152 147KR2F-GP PGND1 C
5 VR_TT# 32 6266A_ LGATE1 6266A_VSUM 1 R33 2 3K65R2F-1-GP 6266A_ISEN1_P1_VCORE
4 CPU_PROCHOT#_R ISL6266AHRZ-GP LGATE1 C327
1 R161 26266A_NTC_R1 R155 2 6266A_NTC 6 NTC 74.06266.073 PVCC 31 5V_S0 1 2 6266A_ISEN1 1 R36 2 10KR2F-2-GP
NTC-470K-8-GP 4K02R2F-GP C328 one phase
C325 1 2 6266A_SOFT 7 30 6266A_LGATE2 SC2D2U16V3KX-GP
SCD015U50V3KX-GP SOFT LGATE2 6266A_VO
1 2 1 R35 2 1R2F-GP 6266A_ISEN2_P1_VCORE
SCD01U25V2KX-3GP 6266A_VO 1 26266A_OCSET
8 29
R157 12KR3F-GP OCSET PGND2 6266A_ISEN2
1013 modify R161 1 R34 2 10KR2F-2-GP
C22 1 2 SC1000P50V3JN-GP 6266A_VW 9 28 6266A_PHASE2 C329 DCBATOUT_6266A
VW PHASE2 2
SCD22U25V3KX-GP
POWER SA 6266A_COMP 6266A_UGATE2 one phase
10 COMP UGATE2 27
R156
1 one phase
1 2
C25 R13 10K5R2F-GP 6266A_FB 11 FB BOOT2 26 6266A_BOOT2 1 26266A_BOOT2_R -1 -1
1 2 2D2R2J-GP
2
SC100P50V2JN-3GP 6266A_FB2 12 one phase DY
FB2 NC#25 25
2008/05/06 C310 C312 C11 C316
Do Not Stuff
SC10U25V6KX-1GP
Do Not Stuff
DROOP
R17 C24 Do Not Stuff
1
1
5
6
7
8
VDIFF
ISEN2
ISEN1
VSUM
VSEN
1 2 6266A_COMP_R 1 2 DY DY
GND
VDD
RTN
DFB
VIN
D
D
D
D
97K6R2F-GP SC270P50V2KX-1GP R14 U34
VO
one phase
1KR2F-3-GP BSC120N03MS-G-GP
one phase
6266A_VDIFF13
6266A_VSEN14
6266A_RTN 15
16
6266A_DFB 17
18
6266A_VSUM 19
6266A_VIN 20
21
22
6266A_ISEN223
24
16266A_DROOP
2
R19 C32 C34
G
S
S
S
1 2 6266A_FB2_R 1 2 6266A_ISEN1 1 26266A_VO
100R2F-L1-GP-U 6266A_VDD Cyntec 10*10*4
6266A_VO
4
3
2
1
1
SC2200P50V2KX-2GP C33 SCD22U10V2KX-1GP

6266A_VDIFF R23 1 2
DCR=1.05+-5%mohm, Irating=30A
B
DCBATOUT_6266A 6266A_UGATE2 Isat=60A B
1KR2F-3-GP
R15 6266A_SOFT 1 2 R18 SCD22U10V2KX-1GP VCC_CORE

2K87R2F-1-GP
1 2 R16 POWER SB one phase L9

2
1KR2F-3-GP Do Not Stuff SB 20081121 R24

R20
6266A_PHASE2 1 2
DY
2
10R3F-GP 1 2 5V_S0 L-D36UH-1-GP
5
6
7
8
5
6
7
8
1
Do Not Stuff TC3 TC1
1
D
D
D
D
D
D
D
D
C37 2 phase U6 U36
one phase
one phase
2
Do Not Stuff
Do Not Stuff
SC180P50V2JN-1GP
C35 68.R3610.20ACAP CAP
BSC057N03MSG-GP
BSC057N03MSG-GP
2
1
SC330P50V2KX-3GP C29 2nd = 68.R3610.20C

2
SCD01U25V2KX-3GP
5V_S0
20080930 R25 SA
2
2
G
S
S
S
G
S
S
S
1 2
1
R21 0R2J-2-GP C41 10R2F-L-GP G60
4
3
2
1
4
3
2
1
1
SCD33U10V3KX-3GP
5 VCC_SENSE 1 2 C31 Do Not Stuff G59

SC1U25V3KX-1-GP Do Not Stuff
2
1
C28
2
1
SC330P50V2KX-3GP Do Not Stuff Do Not Stuff
R22 0R2J-2-GP 2nd = 77.C3371.0512nd = 77.C3371.051
2
5 VSS_SENSE 1 2 6266A_LGATE2
R31
1 2 one phase
1
Do Not Stuff R27

C36 6266A_VSUM 1 2 3K65R2F-1-GP
SCD01U25V2KX-3GP R26 6266A_ISEN2_P2_VCORE
2
SB 6266A_ISEN2 1 2 10KR2F-2-GP
20081121 one phase
6266A_VSUM R29 one phase
6266A_VO 1 2 1R2F-GP 6266A_ISEN1_P2_VCORE
1
A R28 A
UMA Two Phase 2
R30 6266A_ISEN1 1 2 10KR2F-2-GP
1
C45 C43 R32 2K61R2F-1-GP one phase

SCD033U25V3KX-GP
SCD22U50V3ZY-1GP 11KR2F-L-GP
Single Phase Wistron Corporation
2
R47=1.2K, R63=5.6K,R460=0R 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

6266A_VSUM_R_VO Taipei Hsien 221, Taiwan, R.O.C.
C33=47p, C49=0.033u, C52=0.1u
2
R162 Title
NTC-10K-26-GP
DY=U7,U28,U29,L9,R62,R56,R42, ISL6266A_CPU_CORE
R45,R37,R39,R48,C20
2
6266A_VO A3
1013 modify R162 HM40-MV SB
5 4 3 2 1
5 4 3 2 1
POWER SA
DCBATOUT DCBATOUT_51125 3D3V_PW R 3D3V_S5
G73 G30
1 2 1 2 5V_AUX_S5 5V_PW R 5V_S5
G37
Do Not Stuff Do Not Stuff 1 2
G45 G40
3
4
1 2 1 2 Q25 Do Not Stuff
Q26
RN59 G35
Do Not Stuff Do Not Stuff SRN100KJ-6-GP 1 2
G46 G11 51125_ENTIP2 3 4 4 3 51125_ENTIP1
D 1 2 1 2 Do Not Stuff D
33,39,48 S5_ENABLE 2 5 5 2 S5_ENABLE 33,39,48 G83
2
1
G74 G41 1 6 6 1
1 2 1 2 Do Not Stuff
51125_ENTIP2 51125_ENTIP1 G36
1
TC30 Do Not Stuff Do Not Stuff 2N7002DW -1-GP 2N7002DW -1-GP 1 2

SE68U25VM-3-GP G75 G10
1
1 2 1 2 C521 C519 Do Not Stuff
2
1
Do Not Stuff
Do Not Stuff
DY R268 R275 DY G34
Do Not Stuff Do Not Stuff 110KR3F-GP 120KR3F-GP 1 2
79.68612.30L G43 G12
2
2nd = 79.68612.L01 1 2 1 2 Do Not Stuff
2
SB 1121 modify R275 G31
G44 G38
1 2 1 2 Do Not Stuff
G32
1

TC13
2
DY 20081117 1020 delete C537 for Power demand
DCBATOUT_51125 DCBATOUT_51125
DCBATOUT_51125
C533
SCD01U50V2KX-1GP
C301 C299 C294
1
C C298 C508 C295 C
1
SC10U25V6KX-1GP
Do Not Stuff
Do Not Stuff
DY Id=7A
Do Not Stuff
SC10U25V6KX-1GP
Do Not Stuff
Qg=8.7~13nC
2
D Id=7A D DY DY
2
8
7
6
5
5
6
7
8
DY Rdson=23~30mohm Qg=8.7~13nC
D
D
D
D
Cyntec 7*7*3 U22 U28
D
D
D
D
Rdson=23~30mohm
16
SI4800BDY-T1
DCR=30mohm, Irating=6A U47 84.04800.D37
Isat=13.5A 84.04800.D37 2nd = 84.08884.037
VIN
2nd = 84.08884.037 C529 Iomax=5A
SCD1U25V3KX-GP Cyntec 7*7*3
S
S
S
G
G
S
S
S
Iomax=5A C528
G S SI4800BDY-T1
DCR=30mohm, Irating=6A
1
2
3
4
4
3
2
1
68.3R310.20AS 51125_VBST2 51125_VBST1
2nd = 68.3R31A.10E
G 2 1 9 VBST2 VBST1 22 1 2
Isat=13.5A
3D3V_PW R SCD1U25V3KX-GP 51125_DRVH2 10 21 51125_DRVH1 5V_PW R
L15 DRVH2 DRVH1 L6
1 2 51125_LL2 11 20 51125_LL1 1 2
IND-3D3UH-57GP LL2 LL1
51125_DRVL2 51125_DRVL1 IND-3D3UH-57GP
D 12 DRVL2 DRVL1 19
1
8
7
6
5
C287 U23 68.3R310.20A

DY D
5
6
7
8
D
D
D
D
TC8 U29 2nd = 68.3R31A.10E TC11

Do Not Stuff
ST220U6D3VDM-15GP
Do Not Stuff
51125_VO2 7 24 51125_VO1 G39 C283
D
D
D
D
2
VO2 VO1
1
SI4812BDY-T1-E3-GP
SE220U6D3VM-7GP
84.04812.A37
SI4812BDY-T1-E3-GP
Do Not Stuff
Do Not Stuff
2nd = 84.08878.037 51125_FB2 5 2 51125_FB1 DY
VFB2 VFB1
84.04812.A37
2
1
2nd = 84.08878.037
S
S
S
G
2
1 2 51125_EN 13 23 51125_PGOOD
1
2
3
4
G
S
S
S
G42 R280 820KR2F-GP EN0 PGOOD
G S
4
3
2
1
51125_ENTIP2 6 51125_ENTIP1
S G 1
2
B 51125_VREF ENTRIP2 ENTRIP1 B
3 VREF GND 15
77.C2271.00L 79.22710.6AL
1
SCD22U6D3V2KX-1GP
2nd = 77.22271.27L C517 51125_TONSEL 4 25 2nd = 77.92271.021

TONSEL GND
Id=7.7A
1
Id=7.7A Qg=8.5~13nC
2
1
14 18 51125_VCLK R273 DY 1013 modify TC11 and add TC12

Qg=8.5~13nC SKIPSEL VCLK
1
1
R262 51125_SKIPSEL Rdson=16.5~21mohm Do Not Stuff
DY Do Not Stuff Rdson=16.5~21mohm R270
VREG3
VREG5
R265 Do Not Stuff 30KR2F-GP
1 2
6K65R2F-GP TPS51125RGER-GP 51125_FB1_R
1 2
51125_FB2_R 74.51125.073 SB 1118 delete TC12

2
2
C516 C518 DY
8
17
3D3V_S5
DYDo Not Stuff Do Not Stuff
2
3D3V_AUX_S5 5V_AUX_S5
3D3V_AUX_S5_5_51125
G79 G80
2
1
1 2 1 2
1
15V_AUX_S5_51125
R264 R276
R269 Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff R266
10KR2F-2-GP 20KR2F-L-GP
51125_VREF 2 1
DY Close to VFB Pin (pin2)
2
R261
2
3D3V_AUX_S5 2
DY 1
Do Not Stuff
1
C524 C534
R283 SC10U10V5KX-2GP SC10U10V5KX-2GP
51125_VREF 2
DY 1
2
A Do Not Stuff A
UMA Two Phase 2
Close to VFB Pin (pin5) R281

3D3V_AUX_S5 2 1 Wistron Corporation
0R2J-2-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
R282
Title
2
DY 1
Do Not Stuff
DCDC 5V/3D3V (TPS51125)
A3
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
1D5V_S0
1D8V_S3 Iomax=2.5A
D
DY D
1
C151 C150
SC10U10V5KX-2GP
Do Not Stuff
2
G6
1 2
Do Not Stuff
G8
1 2
R76
13,33,39,44 PM_SLP_S3#
PM_SLP_S3# 2 15912_EN_U111 20081001 Vo(cal.)=1.5024V Do Not Stuff
Do Not Stuff G7
1D5V_LDO 1 2
3D3V_S0 1D5V_LDO
Do Not Stuff 1D5V_S0
U13 G5
1 2
1
R78 6 VO GND 9
DY Do Not Stuff
1
2K2R2J-2-GP 3 8 C137 C141
VIN GND R74 C148
5V_S5 4 VPP
SC100P50V2JN-3GP
SC10U10V5KX-2GP
18KR2J-GP
2
Do Not Stuff
R77 2 5
2
5912_POK_U111 VEN NC#5 5912_FB_U111
41,44 CPUCORE_ON 2 1 1 POK ADJ 7
C Do Not Stuff C
1
C158 G966-25ADJF1UF-GP-U R75
SC1U16V3KX-2GP 20K5R2F-GP
2
74.0G966.03D
2nd = 74.09018.A3D
Vo=0.8*(1+(R1/R2))
B B
20081001
Iomax=1A
5V_S5 1D8V_S3 OCP>2A
1
C522 DDR_VREF_PW R DDR_VREF_S3

1
SC10U10V5KX-2GP C523 G78

C520 SCD1U10V2KX-4GP 1 2
2
SC1U10V3KX-3GP 1016 modify U45

2
Do Not Stuff
G77
U45 1 2
R267 10 1 Do Not Stuff

9026_S5 VIN VDDQSNS G76
13,33,44 PM_SLP_S4# 2 1 9 S5# VLDOIN 2
R263 Do Not Stuff 8 3 1 2
9026_S3 GND VTT
2 1 7 S3# PGND 4
DDR_VREF_S3_1 Do Not Stuff 6 5 Do Not Stuff
VTTREF VTTSNS
1
C513 G2997BP71U-GP C509 C512

SC1U10V2KX-1GP SC10U10V5KX-2GP SC10U10V5KX-2GP
2
74.02997.A79
2
2nd = 74.09026.079
UMA Two Phase 2
A A
Wistron Corporation
Title
1D5V & 0D9V

A3
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
1D8V_S3
1D8V_PW R 1D8V_S3
G28
DCBATOUT DCBATOUT_51124 TC26 1 2
1
SB 1128 add TC26
SE390U2D5VM-2GP
G71 Vtrip(mV)=Rtrip(Kohm)*10(uA) Do Not Stuff
1 2 G25
2
Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin)) 79.3971V.6AL 1 2
Do Not Stuff 2nd = 79.3971V.E0L
G69 I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Do Not Stuff
1 2 G21
1 2
1
1
Do Not Stuff TC29 DCBATOUT_51124
D DY TC28 SE68U25VM-3-GP Do Not Stuff
D
G68
Do Not Stuff 1 2 G22
2
2
1 2
2
Do Not Stuff C297
Do Not Stuff
G67 79.68612.30L C511 C515 Do Not Stuff
5
6
7
8
1 2 2nd = 79.68612.L01 U24 SC10U25V6KX-1GP Do Not Stuff DY G19
1
SI4800BDY-T1 DY 1 2
D
D
D
D
Do Not Stuff
G70 84.04800.D37 Do Not Stuff
1 2 20081117 2nd = 84.08884.037 Cyntec 10*10*4 G20
1 2
Do Not Stuff 2008/06/16 Id=7A DCR=4.2mohm, Irating=16A
G
S
S
S
G72
Qg=8.7~13nC Isat=33A Do Not Stuff
4
3
2
1
1 2 R279 G18
Do Not Stuff Rdson=23~30mohm 68.1R510.10J 1D8V_PW R 1 2
L17
Do Not Stuff 2 1 2nd = 68.1R51A.10A
CPUCORE_ON 41,43 Do Not Stuff
1 2
1
DY IND-1D5UH-34-GP G26
1
5V_S5 C531 C535 C282 TC10 1 2
Do Not Stuff
Do Not Stuff R285
5
6
7
8
SE330U2D5VDM-LGP
Do Not Stuff
30KR2F-GP DY Do Not Stuff
DY
2
G29
D
D
D
D
2
1 2
2
51124RGER_PG1
51124RGER_PG2
1
51124_VFB1
1 R274 2 1 U25 Do Not Stuff
1
3D3R3J-L-GP 1D05V_PW R SI4812BDY-T1-E3-GP G27
C525 1D8V_PW R R284 R290 1 2
G
S
S
S
1
SC4D7U10V5KX-1GP 51124_VFB2 Do Not Stuff 84.04812.A37 21K5R3F-GP
2
4
3
2
1
C 51124_VFB1 C532 2nd = 84.08878.037 Do Not Stuff C
SC1000P50V3JN-GP 77.23371.L01 G24
2
1
C300 2nd = 77.C3371.10L 1 2
1D8V Iomax=10A
24
R278
SC1U10V3KX-3GPU46
2
5
1
6
7
Id=7.7A Do Not Stuff
2
1 2 OCP>15A G23
VFB1
VFB2
VO1
VO2
PGOOD1
PGOOD2
13,33,43 PM_SLP_S4# Qg=8.5~13nC 1 2
0R2J-2-GP
DY1 BC2
DRVH1 21 51124_DRVH1 Rdson=16.5~21mohm 1013 modify TC10 and add TC26
51124_LL1 Do Not Stuff
2
Do Not Stuff
51124_V5FILT 15
LL1 20
19 51124_DRVL1
20081117
V5FILT DRVL1
16 V5IN
51124_EN1
20080930 51124_EN2
23
8
EN1 DCBATOUT_51124
EN2
3 1D05V_PW R 1D05V_S0
GND 51124_DRVH2
R277 25 10 G65
GND DRVH2
1
13 11 51124_LL2 1 2
PGND2 LL2
TONSEL
2
1 2 18 12 51124_DRVL2 C510 C296
VBST1
VBST2
13,33,39,43 PM_SLP_S3# PGND1 DRVL2
5
6
7
8
TRIP1
TRIP2
Do Not Stuff
C514 Do Not Stuff
2
D
D
D
D
0R2J-2-GP U26 SC10U25V6KX-1GP Do Not Stuff DY G62
1
AOL1426-GP DY 1 2
TPS51124RGER-GPU1
17
14
22
9
4
DY1 BC1
Do Not Stuff 51124_TRIP1
74.51124.073 84.01426.037
2nd = 84.07686.037
Cyntec 10*10*4 Do Not Stuff
G63
DCR=4.2mohm, Irating=16A
G
S
S
S
2 51124_TRIP2 51124_TONSEL Id=7A 1 2
Qg=8.7~13nC Isat=33A
4
3
2
1
1
Do Not Stuff
B
R271 R272 Rdson=23~30mohm SB 1121 modify L16,R286 1D05V_PW R G64
B
19K6R3F-GP 10KR2F-2-GP L16 1 2
SB 1121 modify R271,R272 20081121 1 2
IND-D88UH-GP Do Not Stuff
2
1
C536 C284 TC9 G17
1
1 2
ST330U2D5VDM-9GP
Do Not Stuff
Do Not Stuff
C527 R286
DY
2
2
5
6
7
8
51124_LL1 2 1 51124_VBST1 11K8R2F-GP DY Do Not Stuff
2
D
D
D
D
DY R287 U27 G16
2
SCD1U16V2KX-3GP Do Not Stuff
DY R288 AOL1712-GP
51124_VFB2
1 2
C526 Do Not Stuff Do Not Stuff

1
1
51124_LL2 2 1 51124_VBST2 84.01712.037 G13
G
S
S
S
Id=7.7A R289 1 2
SCD1U16V2KX-3GP 30KR2F-GP
Qg=8.5~13nC
4
3
2
1
77.23371.13L Do Not Stuff
51124_V5FILT Rdson=16.5~21mohm 2nd = 77.C3371.10L G14
2
1 2
1D05V Iomax=14A Do Not Stuff
SB 1127 modify U27 OCP>24A G15
1 2
GND OPEN V5FILT Do Not Stuff

G66
1D05V_S0
20081117 1 2
TONSEL 240k/CH1 300k/CH1 360k/CH1 TC25 Do Not Stuff

300k/CH2 360k/CH2 420k/CH2
1
UMA Two Phase 2
Do Not Stuff
A A
SB 1128 add TC25
2
Vout=0.758V*(R1+R2)/R2 --> PWM mode DY Wistron Corporation
Vout=0.764V*(R1+R2)/R2 --> Skip Mode Taipei Hsien 221, Taiwan, R.O.C.
1017 add TC25 Title
Do Not Stuff TPS51124_1D8V_1D05V

2nd = 79.3971V.E0L Size Document Number Rev
A3
HM40-MV SB
5 4 3 2 1
A B C D E
DC1 Adaptor in to generate DCBATOUT

GND SB 1121 add the part(EC88) for EMI demand AD+
6
5 AD_JK
4 U2
1 1 S D 8
2 2 S D 7
K
3 3 S D 6
1
4 NP1 EC11 EC88 EC91 C5 D1 AD+_2 4 G D 5 4
SCD1U50V3KX-GP
SCD1U50V3ZY-GP P6SMBJ20A-GP
Do Not Stuff
Do Not Stuff
83.P6SMB.AAG AO4407A-GP
2
DC-JACK131-GP DY DY
A
2nd = 83.P6SBM.AAG R7 C10
22.10037.F11 84.04407.F37
1
200KR2F-L-GP SC1U50V5ZY-1-GP 2nd = 84.04433.A37
1022 modify DC1 Q3
2
R2
2
AD_OFF#_JK 1 R1 1013 modify U2
3
SB 1125 add the part(EC91) for EMI demand
1
DTA124EUB-GP
Q4 84.00124.T1K R6
3 2nd = 84.00124.N1K 100KR2J-1-GP
1 R1 3rd = 84.00124.K1K
33 AD_OFF
2
2
R2 1016 modify Q3
DTC124EUB-GP
1016 modify Q4
3 3
84.00124.S1K
2nd = 84.00124.M1K
3rd = 84.00124.H1K
BATA_SDA_1 48
BATA_SCL_1 48
BAT_IN#_1 48
BATTERY CONNECTOR
SB 1127 modify BAT1

BAT1
2 2
9 GND
8 GND
RN4 7 GND
1 8 6 GND
2 7 BATA_SDA_1 5
33,46 BAT_SDA DAT
3 6 BATA_SCL_1 4
33,46 BAT_SCL CLK
33 BAT_IN# 4 5 BAT_IN#_1 3 BAT_IN
2 BT+2
BT+ SRN33J-7-GP 1 BT+1
1
1
Do Not Stuff
Do Not Stuff
SB SB EL3 EL1 EL2 EC50 EC51

1
1
MLVS0402M04-GP
Do Not Stuff
DY DY DY DY SYN-CON7-40-GP
1
DY DY 20.81171.007
K
Do Not Stuff
EC13 EC14 EC53 EC52
2
2
SCD1U50V3ZY-GP
Do Not Stuff
Do Not Stuff
D2 SCD1U50V3ZY-GP
2
Do Not Stuff UMA Two Phase 2

2
DY
A
1
Wistron Corporation 1
R8
Title
46 BATT_SENSE 1 2
1119 modify EC52 and EL3

Do Not Stuff
Size
AD/BATT CONN
Document Number Rev
HM40-MV SB
A B C D E
5 4 3 2 1
1013 modify U3
DCBATOUT
NEAR
2
AD+
EC54
U3 SCD1U50V3KX-GP
1
8 D
D
S
S
1
DCBATOUT
1013 modify U31 BT+
7 2
6 D S 3
1
5 D G 4
R11 R9 U31
D AO4433-GP 100KR2J-1-GP AD+_TO_SYS 1 2 1 S D 8 D
2 S D 7
D01R2512F-4-GP AD+ 3 S D 6
2
84.04433.A37 4 G D 5
2nd = 84.04407.F37 AD+_G_2
20080605 AO4433-GP
1
2
R12 AD+ C324
1
R10 49K9R2F-L-GP SCD1U25V2ZY-1GP 84.04433.A37
10KR2F-2-GP 1016 modify D13 2nd = 84.04407.F37
1
2 G3 G4
2
2
2
AD+_G_1 D13 R153
1
1SS400GPT-GP 470KR2J-2-GP
83.00400.C1F Do Not Stuff Do Not Stuff
2
K
2nd = 83.1S400.A2F
1
AD+ POWER SB
1
DC_IN_D
Q2 C358
DCBATOUT
SC1U25V5KX-1GP
2N7002DW -1-GP C347
2
C340
6
2 1 BQ24745_CSSP 2 1 1 2
1
R164 SCD1U50V3KX-GP C344 SCD1U25V3KX-GP
309KR3F-GP CHG_AGND SCD1U50V3KX-GP
C315 C331 C17 C319
1
SC10U25V6KX-1GP
Do Not Stuff
Do Not Stuff
AC_OK U41 CHG_AGND Do Not Stuff
2
C C
ICREF
5
6
7
8
BQ24745_DCIN 22 28 U32
2
DCIN CSSP
84.04800.D37 DY DY DY
D
D
D
D
BQ24745_ACIN 2 2nd = 84.08884.037
ACIN BQ24745_CSSN
CSSN 27
3D3V_AUX_S5 11 26 TP47 D12 C367
VDDSMB ICOUT
K A 1 2
G
S
S
S
25 BQ24745_BST CH520S-30PT-GP SC1U10V3KX-3GP SI4800BDY-T1
4
3
2
1
BOOT
1
R183 21 BQ24745_VDDP
R169 AC_OK VDDP
1 2BQ24745_ACOK 13 ACOK
83.R0203.08F
1
49K9R2F-L-GP C342 Do Not Stuff 2nd = 83.R2003.A8M

1
SCD01U50V2KX-1GP C350 24 24745_HIGH_G BT+

SC1U10V3KX-3GP UGATE
10 L7
2
33,45 BAT_SCL SCL R160

1 2
2
23 BQ24745_LX1 C351 1 2 BT+_R 1 2

PHASE SCD1U50V3KX-GP
9 D01R2512F-4-GP
33,45 BAT_SDA SDA 24745_LOW _G IND-5D6UH-32-GP
LGATE 20
5
6
7
8
CHG_AGND U39 68.5R610.10I
2nd = 68.5R610.201 C323 C322 C19 C18 C318
D
D
D
D
1
14 19 G56 G55
NC#14 PGND
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
CHG_AGND
18 84.04800.D37
2
CSOP
Do Not Stuff
Do Not Stuff
C365 2nd = 84.08884.037
1
R172 CHG_AGND 17
G
S
S
S
BQ24745_IINP CSON SI4800BDY-T1
1 2 8 2 1
4
3
2
1
33 AD_IA Do Not Stuff SC150P50V2JN-3GP VICM
C336 R166
B BQ24745_FBO_RC SCD1U50V3KX-GP B
1 2 1 2BQ24745_FBO
R171 4K7R2J-2-GP
1 2 6 FBO
200KR2F-L-GP BQ24745_EAI 5 16
EAI NC#16
1
BQ24745_EAO 4
C348 C337 R167 BQ24745_VREF EAO
3 VREF
SC220P50V2KX-3GP SC2200P50V2KX-2GP 7K5R2F-1-GP BQ24745_CHG_ON 7
2
CE
2 1BQ24745_EAO_RC2 1 12 15 BATT_SENSE
GND
GND VFB BATT_SENSE 45

1
C338 MAX8731A_CSIP
SC1U10V3KX-3GP
1 2 BQ24745RHDR-GP MAX8731A_CSIN
2
29
C341
1
SC56P50V2JN-2GP 74.24745.073 C364

SCD1U25V2ZY-1GP
2
R163
1 2
CHG_AGND Do Not Stuff
CHG_AGND
CHG_AGND
BQ24745_VREF
RN43
1 8 AC_OK
2 7 CHG_ON# Q20
3 6 AC_IN#
3D3V_AUX_S5 4 5 BQ24745_CHG_ON
A BQ24745_CHG_ON 3 4 UMA Two Phase 2 A
SRN100KJ-8-GP-U DY AC_OK 2 5 CHG_ON#

CHG_ON# 33
1
C345
Do Not Stuff 1 6 AC_IN#
AC_IN# 33
Wistron Corporation
AC_IN# to KBC
2
C339 Taipei Hsien 221, Taiwan, R.O.C.

2N7002DW -1-GP SC1U10V3KX-3GP
Title
2
BQ24745 Charger
A3
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
5V_S0 5V_S0 1020 delete TC14,TC15

DCBATOUT
14
10
14
13
SB
1
9 8 12 11 TC24 1117 delete TC19
SE100U25VM-L1-GP
U8C U8D
2
7
7
TSAHCT125PW -GP TSAHCT125PW -GP
D D
73.74125.L13 73.74125.L13
2nd = 73.74125.L12 2nd = 73.74125.L12
79.10712.L02
2nd = 79.10112.3JL
1016 modify U32
1017 add these parts(EC10,EC12,EC15~EC17,EC86) for EMI demand

1020 add the part(EC86) for EMI demand 1125 add the part(EC90) for EMI demand
SB 1121 add the part(EC89) for EMI demand 1128 add EC94,EC95 for EMI demand
DCBATOUT 1D8V_S3
1
EC86
1
1
EC15 EC12 EC10 EC17 EC16 EC89 EC90 EC94 EC95
Do Not Stuff
2
Do Not Stuff
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2
2
DY
C DY DY DY DY DY DY DY C
1016 add GND1 and GND2 for EMI demand

1017 add GND3 and modify GND2 for EMI demand
CPU
HOLE355X355R111-S1-GP
H35 H36 H37 H38 TOP

GND1 GND2 GND3 GND4 GND7 GND8
SPRING-58-GP SPRING-51-GP SPRING-9-GP Do Not Stuff Do Not Stuff Do Not Stuff
1
34.4B312.002 34.4F822.002 34.49U23.001 DY Do Not Stuff DY Do Not Stuff DY Do Not Stuff
1
B B
34.42Y01.011 34.42Y01.011 34.42Y01.011 34.42Y01.011 SB 1128 Add GND4,GND7,GND8
1016 modify H31 and H32
1016 modify H35~H38
1016 delete H9~H12 SB 1120 remove H31and H32
H18 H19 H20 H21 H22 H23 H24 H26 H27 H28 H29 H30
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
1
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
H1 H2 H3 H4 H5 H6 H7 H8 H17 H43
A UMA Two Phase 2 A
Wistron Corporation
1

Title
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
SB 1128 Add H43 EMI/Spring/Boss
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
LED
Speaker
5V_S0 1 Do Not Stuff TP88
1 Do Not Stuff TP244
27,28 SPKR_R+
1 Do Not Stuff TP243 36 WLAN_LED#_R 1 Do Not Stuff TP229
27,28 SPKR_R-
1 Do Not Stuff TP245 36 TP_LOCK_LED#_R 1 Do Not Stuff TP228
27,28 SPKR_L+
1 Do Not Stuff TP246 36 TP_LOCK_BN#_1 1 Do Not Stuff TP230
27,28 SPKR_L-
36 WIRELESS_BTN#_1 1 Do Not Stuff TP231
1 Do Not Stuff TP91
36 CAP_LED#_R Do Not Stuff TP90
1
D 36 NUM_LED#_R Do Not Stuff TP234 D
1
36 MEDIA_LED#_R
3D3V_S0 1 Do Not Stuff TP253

Touch pad 36 PWRLED#_R 1 Do Not Stuff TP252
35 TP_DATA
1 Do Not Stuff TP110 36 KBC_PWRBTN#_1 1 Do Not Stuff TP254
35 TP_CLK
35,37 TP_RIGHT
1 Do Not Stuff TP113 SB
35,37 TP_LEFT
1112 remove the signal( STDBY_LED#_R)
Battery
1 Do Not Stuff TP16
45 BATA_SDA_1
Keyboard 1 Do Not Stuff TP17
45 BATA_SCL_1
1 Do Not Stuff TP15
45 BAT_IN#_1
1 Do Not Stuff TP127 BT+ 1 Do Not Stuff TP14
33 KCOL16
1 Do Not Stuff TP139 BT+ 1 Do Not Stuff TP13
33 KCOL15
33 KCOL14
1 Do Not Stuff TP146 AD_JK 1 Do Not Stuff TP6
33 KCOL13
1 Do Not Stuff TP5
C C
1 Do Not Stuff TP98

33 KCOL8
1 Do Not Stuff TP99
33
33
33
KCOL7
KCOL6
KCOL5
1
1
Do Not Stuff
Do Not Stuff
TP101
TP100 Check test point
3D3V_S0 1 Do Not Stuff TP237
1 Do Not Stuff TP118 3D3V_AUX_S5 1 Do Not Stuff TP240

33 KCOL4
33 KCOL3
1 Do Not Stuff TP122 3D3V_S5 1 Do Not Stuff TP236
33 KCOL2
33 KCOL1

33 KROW0
1 Do Not Stuff TP154 1 Do Not Stuff TP241
33 KROW7 4,12,39 H_PWRGD
33 KROW6
1 Do Not Stuff TP151 1 Do Not Stuff TP242
33 KROW5 33,39,42 S5_ENABLE
4,6 H_CPURST#
1 Do Not Stuff TP94
33 KROW4
B 1 Do Not Stuff TP95 B
33 KROW3
1 Do Not Stuff TP92
33 KROW2
Do Not Stuff TP97
放放Dimm Door打打打打打打
33 KROW1 1
Test Point
33 KCOL12
33 KCOL11
33 KCOL10
33 KCOL9
1 Do Not Stuff TP72

33 KCOL17
1 Do Not Stuff TP87
33 KCOL0
FAN

32 G7922_FAN_TACH
32 G7922_FAN_DRIVE UMA Two Phase 2
Bluetooth
A 1 Do Not Stuff TP134 A
22
22
USB_7-
USB_7+ 1 Do Not Stuff TP136 Wistron Corporation
1 Do Not Stuff TP133 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
22 3D3V_BT_S0
1017 modify USB signal connection Title
AFTE test point

HM40-MV SB
5 4 3 2 1
5 4 3 2 1
0910 delete F4(Page 18)

0910 update footprint of U15(Page 30)
0910 delete RIGHT1 and LEFT1(Page 33)
0910 modify net names of TP_LEFT and TP_RIGHT(Page 36)
0910 modify test points of AFTE and TPAD
D D
0911 modify net name from LPC_RST to PLT_RST1#(Page 24)
0911 add net name(RBIAS,LED_DUPLEX#,SMDATA,SMCLK)(Page 24)
0911 add net name(DVDD_1_8,ACZ_SDATAIN0_R,FLY_P,FLY_N,VREF_LO,VREF_HI)(Page 26)
0911 add net name(EAPD#_R)(Page 27)
0912 modify the schematic of Page 33
0912 delete GMCH_TXB*(Page 7& 18)
0912 add these parts for EMI demand(page 7,18,20,21,23,26,28,29,30,32,33,34,35)
0915 modify net name from 10M/100M/1G_LED# to 10M/100M_LED#(page24,25)
0915 delete these parts for EMI demand(page 30)
0915 add EC34 for EMI demand(page3)
0915 add EC73 for EMI demand(page 12)
0915 modify LEDs port
0916 move net(SPI_WP#) from U9 pin120 to pin25(page33)
0930 modify BLUE1(page22)
C 0930 add 2nd for SPK1, MIC1 and modify LOUT1 (page28) C
0930 modify FAN1(page32)

0930 modify TPAD1(page35)
0930 modify KB1(page33)
0930 modify net name for BIOS demand(page33)
1001 delete these parts for EMI demand(ED1~8)
1009 modify net name for GND to AGND(page27)
1009 add R4,R5 for AC decopling(page27)
1009 add R96(page30)
1013 modify U40 from 72.25X16.001 to 72.25X16.A01(page 34)
1013 modify TC11 and add TC12(page42)
1013 modify TC10 and add TC26(page44)
1013 modify U2(page45)
B
1013 modify U3 and U31(page 46) B
1013 modify R161 and R162(page41)

1013 modify card1(page 30)
1014 modify these LEDs(LED11,LED12)(page38)
1014 modify these nets(page 26)
1014 modify R258 from 10k to 20k ohm(page26)
1014 add ER5 for EMI deamnd(page3)
1015 modify LCD1 pin define(page 18)
1015 modify the power from 3D3V_S5 to 5V_S5(page38)
1015 modify RN57(page28)
1015 modify F1(page18)
UMA Two Phase 2

A A
Wistron Corporation
Title
Change List
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
1016 modify L1,L2 and L3(page 19)

1016 modify XF1(page 25)
1016 modify RN53 and U10(page 24)
1016 modify U8(page19,47)
1016 modify U4(page 37)
1016 modify U23(page 43)
D 1016 modify X2(page12) D
1016 modify X1(page 33)

1016 modify X3(page 3)
1016 modify D13(page 46)
1016 modify Q3 and Q4(page45)
1016 modify Q18(page 36)
1016 modify Q15~Q17(page 36)
1016 modify Q27~Q30(page38)
1016 modify Q6 and Q14(page 32)
1016 modify Q8(PAGE 24)
1016 add GND1 nad GND2 for EMI demand(page 47)
1016 modify LCD1 pin define(page 18)
C C
1016 delete H9~H12 and modify H35~H38,H31,H32(page 47)
1017 add these parts for EMI demand(page 47)
1017 delete these parts(EC208~EC210)(page 7)
1017 modify BLUE1(page 22)
1017 modify FAN1(page 32)
1017 modify R291 and R293(page 38)
1017 add U61,R52,EC23 and EC24(page 37)
1017 modify RN60(page37)
1017 add TC25(page 44)
1017 add GND3 and modify GND2 for EMI demand(page 47)
1017 modify USB signal connection(page13,18,22,23,30,31,48)
1020 delete C537 for Power demand(page42)
1020 add the part(EC86) for EMI demand(page 47)
1020 delete U61,R52,EC24 and EC23(page 37)
B B
1020 delete TC14,TC15(page 47)
1021 modify TC16(page 31)
1021 delete TC23(page 23)
1021 modify TC5(page 20)
1021 modify and swap these parts(USB1 and USB2)(page 23)
1021 modify SATA1(page 20)
1022 modify DC1(page 45)
UMA Two Phase 2

A A
Wistron Corporation
Title
Change List
HM40-MV SB
5 4 3 2 1
5 4 3 2 1
SA to SB
1127 modify C377(page32) for thermal function
1106 modify net connection of RN46 and RN44(page33) for layout demand
1128 Add H43,GND4,GND7,GND8(page47) for EMI demand
1106 modify LED11 and LED12(page38) for fixing issue
1128 modify LCD1(page18) for cost down
1106 modify LED power from 5V_S5 to 5V_AUX_S5(page38) for customer demand
1128 Add L19(page24) for vender demand
1112 remove the signal(STDBY_LED#_FR)page38 for customer demand
1128 add EC94,EC95 for EMI demand(page47)
1112 remove these signals( STDBY_LED#_FR and STDBY_LED#_R) and R131(page36) for customer demand
D D
1112 remove the signal( STDBY_LED#_R)page36 for customer demand
1112 remove the signal( STDBY_LED#_R)and TP253(page48) for customer demand
1113 modify C103 and C106(page24) for crystal issue
1113 modify 2nd of U19(page26)
1113 modify U48(page22)
1117 delete MDC function(R231,R237,R232,R234)(page12)
1117 delete TC19(page 47) for ME deamnd
1118 modify PCB Ver. from SA to SB(page33)
1118 delete TC12(page42) for layout demand
1118 delete TC27(page9) for layout demand
1118 delete R107 and add L18 for cost down
1119 modify R130 and R133(page 36) for LED brightness
C 1119 modify EC52 and EL3(page45) for EMI demand C
1119 modify SPK1(page 28) for ME deamnd

1119 add G84 for RTC reset demand
1120 modify EC78for EMI demand((page10)
1120 modify PowerCN1 pin3 and remove EC44(page36) fro LED function
1120 remove H31 and H32(page47)for ME demand
1120 add RN61 and RN62(page3) for layout demand
1120 swap these nets(CLK_MCH_3GPLL,CLK_MCH_3GPLL#, CLK_PCIE_MINI1,CLK_PCIE_MINI1#)(page3)for CLK REQ demand
1120 add the net( SATACLKREQ#)(page3,13)for CLK REQ demand
1120 move these nets (CLK_PCIE_MINI1,CLK_PCIE_MINI1#)(page3)for CLK REQ demand
1120 modify RN61 and RN62(page3)for CLK REQ demand
1121 add EC87 for EMI demand(page18)
1121 add the part(EC89) for EMI demand(page47)
1121 modify R18,C43(page41) for Power demand
B B
1121 modify R275(page42)for Power demand
1121 modify R271,R272,R286 and L16(page44) for Power demand
1124 modify U42 and delete R182,R185 (page32) for thermal function
1124 modify these names of these nets(G7922_SGND2,G7922_SGND3...) (page32) for thermal function
1124 add R302(page3) for clock gen function
1125 modify R125,R126(page18) for LCD brightness control
1125 modify RN40 and delete RN42(page32) for layout demand
1125 add EC92 and EC93 for EMI demand(page 22)
1126 add these nets (PCIE_REQ_LAN#,PCIE_REQ_MINI#)(page3)for CLK REQ demand
1126 delete R230,R233,R235,R236 and RN63(page12) for removing MDC function
1126 add C541 and modify R101(page26) for codec function
1126 modify RN61 and RN62(page3) for layout demand UMA Two Phase 2
A A
1126 modify EU1,EU2 and add EU3,EU4 for EMI demand(page28)
1127 modify CRT1(page19) for customer demand Wistron Corporation
1127 swap the nets of RN61 and RN62 for layout demand(page3) Taipei Hsien 221, Taiwan, R.O.C.
1127 modify BAT1(page45) for ME demand Title
1127 modify U27(page44) for power demand Change List

HM40-MV SB
5 4 3 2 1

HM40-MV Block Diagram HM40-MV Block Diagram HM40-MV Block Diagram HM40-MV Block Diagram

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HM40-MV Block Diagram HM40-MV Block Diagram HM40-MV Block Diagram HM40-MV Block Diagram

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5 4 3 2 1

Project code: 91.4BW01.001

SILEGO SLG8SP513VTR(71.08513.003) 32 TOP

HOST BUS 667/800/1067MHz@1.05V S

DDR2 DIMM1 SYSTEM DC/DC

28 12 USB 2.0/1.1 ports DDR_VREF_S3

28 OP AMP Serial Peripheral I/F

1D05V_S0 3D3V_S0 3D3V_S0

RN20 CPUT2_ITP/SRCT8 54 CLK_PCIE_LAN 24

PCLKCLK2 CPU_SEL2_R PCI2/TME SRCC4

0 = SRC7 enabled (default)

H_A#21 U4 AD1 H_THERMDC H_D#10 J24 Y23 H_D#42

12 H_IGNNE# C4 H_D#24 P25 AF23 H_D#56

RSVD#T2 ( No stub) 1KR2F-3-GP DSTBP1# DSTBP3#

E18 J21 C84 C68 F13 AC6

E20 VCC VCCP K21 F16 VSS VSS AC8

VCC VCCP VSS VSS

AA12 H_VID[6..0] 41 C420 C429 PBY160808T-121Y-GP J2 AD19

AA13 AD6 H_VID0 68.00206.021 J5 AD22

VCC VID1 H_VID2 VSS VSS Do Not Stuff TP45

AA20 AE3 H_VID4 K4 AE8

VCC VSS VSS

Layout Note: M25 AF11

VSS VSS Do Not Stuff TP61

H_D#19 H_D#_18 H_A#_22 H_A#23

H_AVREF H_RS#_1 H_RS#2

A UMA Two Phase 2 A

DDR CLK/ CONTROL/COMPENSATION

SB_CS#_0 LVDSB_CLK PEG_RX#_12

RESERVED#BF23 M_RCOMPP LVDSA_DATA_0 PEG_RX_2

DPLL_REF_SSCLK# DREFSSCLK# 3 PEG_TX#_0

DMI_RXN_3 DMI_TXN3 13 TV_DCONSEL_0 PEG_TX#_10

CFG_2 DMI_RXP_3 DMI_TXP3 13 PEG_TX#_15

NC#BF48 CL_RST# MCH_CLVREF

BG45 E36 SRN150F-1-GP

Concurrent with PCIE is operational (default)

AV5 SA_DQ_48 SA_MA_11 BG26 AV2 SB_DQ_48 SB_MA_10 BB16

VCC_SM/NC VCC_AXG_NCTF VCC

T14 BA37 SM_LF2_GMCH SB 1118 delete TC27

C153 C140 C136 C172 C246 C235 C253

TP33 Do Not Stuff VCC_AXG_SENSE

TP32 Do Not Stuff VSS_AXG_SENSE

place near Cantiga

SB 1120 modify EC78 1015 modify component size of R252

C263 C258 U3 Do Not Stuff

Do Not Stuff 1D8V_TXLVDS_S3 J48 V2 2 R255 C497

R116 65mA AD48 VCCA_PEG_BG

C267 C265 1D05V_S0

Do Not Stuff 1D05V_RUN_PEGPLL AA48

SBK160808T-121Y-N-GP C464 C469

SBK160808T-121Y-N-GP AM26 C166

SCD1U10V2KX-4GP VCCA_SM_CK_NCTF VCC_SM_CK

C261 C218 C198 C462

180ohm 100MHz 1D8V_S3 71.CNTIG.00U 1 1 1

Taipei Hsien 221, Taiwan, R.O.C.

NCTF TEST PIN:

DY C281 R193 1MR2J-1-GP INTVRMEN B22 J3 LDRQ0# 1 Do Not Stuff TP58

BAT-CON2-1-GP-U SC1U16V3ZY-GP E25 N7 KA20GATE 33

13 GLAN_DOCK# GLAN_DOCK# B10 AE22 H_INIT# 4 SRN56J-5-GP

21 SATA_RXN1 C285 1 2 SCD01U50V2KX-1GP SATA_RXN1_C AH13 AJ7 SATARBIAS

Place within 500 mils of 1D05V_S0 3D3V_S0

INTVRMEN LAN100_SLP INTVRMEN High=Enable Low=Disable 1117 delete MDC function(R231,R237,R232,R234)

RN63 H_INIT# E C FW H_INIT# 1 TP70 Do Not Stuff