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Abstract: Increasing number of levels has always been a major different [2]. While, most of the power is delivered by the
motivation in the research of multi level inverters. This paper highest voltage cell [8], the lower voltage cells deal with only
proposes a level doubling network and use this to almost double a fraction of the same. This is a serious limitation of such
the number of levels of a multilevel inverter topology. While the configurations for applications where, dc busses of the MLI
approach is suitable to almost all the existing configurations, the are obtained by rectification of isolated ac sources.
unit works best for cascaded H-bridge topology. It has been As a result of disadvantages discussed earlier, the
shown that the level doubling network (LDN) does not consume
asymmetric topology is not very attractive for applications in
any power over a complete cycle. The LDN is basically a
capacitor fed half bridge topology where the capacitor voltage is MV drives. However, the symmetric cascaded H-bridge
self regulated. The proposal of the LDN opens up a new (CHB) structure has definite merits in high power applications
topological variation for the existing configurations. Operation of due to its inherent capacitor balancing capability, fault
the circuit is verified by simulation result using tolerance/reliability and modularity. The recent trend is to use
MATLAB/Simulink and experiments from laboratory prototype. symmetric MLI fed by multi-pulse rectifier for high and
Index Terms – Multilevel inverter, power quality, converter medium power applications in industry. References [9]-[17]
topology are few prominent example of such systems.
The paper is organized as follows: Section-I puts forward
I. INTRODUCTION the motivation of the work with a critical review of the
existing techniques to boost up the number of levels. Section-
Multilevel inverters (MLI) are now very popular and globally II explains the operating principle of the topology proposed.
recognized topology for many industrial applications like Section-III and IV report the results from simulation and
medium voltage ac drives, renewable energy, FACTS, traction experimentation respectively. A laboratory prototype is made
and propulsion systems, electric vehicles etc. As a for this purpose. Section-V concludes the work.
consequence, extensive investigations are going on to improve
the performance and efficiency of such converters, and to II. OPERATING PRINCIPLE
reduce the cost. High switching frequency in power converters
is responsible for rapid voltages and current transitions. This The single phase version of the proposed LDN is shown in
leads to several serious problems, such as, generation of Fig.1 along with its operating modes. The LDN is realized by
common-mode currents, EMI, shaft voltages, bearing current adding an extra half bridge with rest of the MLI circuit as
and deterioration of motor and transformer insulation [1]. illustrated in Fig.1.The concept is valid for any MLI topology
Also, high switching frequency at higher voltage results higher reported in literature so far. However, when this circuit is
device stress and device losses. So, it is always desirable to added with cascaded H-bridge, there will be some extra
operate the inverter with higher number of levels. But, the advantages; those will be discussed in later part of this section.
number of switching device increases with number of levels. The dc bus voltage of this LDN is half of other bridges. Fig. 1
This leads to high implementation cost and poor efficiency shows that the LDN network gets connected in series only
due to high device losses. There are many methods reported to when an odd level is required to produce in either half cycle.
increase the number of levels of MLI. References [1]–[4] have LDN is bypassed when an even level is produced in either half
presented several techniques for modulation, control and also cycle. DC bus of this half bridge does not consume any power.
topological reviews. If this delivers a given amount of power in first half cycle, it
Cascaded MLI has several unique advantages and it will absorb the same amount of power in next half cycle. This
achieves high-quality output voltages and input currents and is because the “current-second area” during a positive voltage
also high reliability due to their intrinsic component level is same as current-second area during corresponding
redundancy [2]. One of the techniques to increase the number negative voltage level. In Fig.1, it is assumed that, the MLI
of levels is by introducing asymmetry in voltage ratio of the circuit can generate 2N+1 levels of output voltage without
inverter cells. Asymmetric structure of MLI is introduced in LDN (i.e. -NV to NV in steps of V). When the half bridge
[5]–[7]. For a given topology, the number of levels depends on (LDN) comes in operation, we get N additional levels in the
the configuration of the dc voltage ratio (leading to binary, positive half cycle with corresponding output voltage levels,
trinary and other configurations). Note that in asymmetric such as: V/2, 3V/2, 5V/2... (2N-1)V/2 (by adding the voltage
structure, powers delivered by the various levels are quite
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3. The circuit resistance is non zero (even stray
resistances of the conductors and devices are good Phase voltage (a)
enough for the satisfactory operation).
4. A load with back emf will also have half wave
symmetry in back emf. (This is applicable for a load
with back emf)
LDN Voltage
III. SIMULATION RESULTS
(d)
Voltage
Phase
LDN Current zero
Voltages
power factor
Time in seconds
Fig. 3. Output line voltage and corresponding phase voltage waveforms of the
proposed topology with fundamental frequency switching and nearest voltage
(e)
level control and third harmonic injection .
(a)
Energy in Joule
Time in seconds
(b)
Fig. 5. (a): Thirteen level phase voltage and corresponding LDN voltage.
(b): Current through LDN at unity power factor load (c): Energy
Energy in Joule
Time in seconds This also increases the power quality: this is because of higher
Fig. 4. Energy charge-discharge cycle of LDN with 50Hz and modulation number of line-to-line voltage levels at the output. Note that,
index of unity (a) For any topology other than CHB with any number of similar situation occurs in space vector modulation, where
phases (b) With three phase CHB (common dc bus for LDNs of all phases).
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phase voltage has inherently injected third harmonic
component. Fig. 3 illustrates the 25 level line voltage obtained
from third harmonic injected 13 level phase voltages. This 13
level phase voltages are obtained from symmetric CHB MLI
with only three H-bridge cells per phase along with LDN (this
circuit would have given only 7 levels at output without
LDN).
Energy-Time waveform of the LDN to obtain output
voltage as observed in Fig. 3 is shown in Fig. 4. As the LDN
for the three -phase system shares a common dc bus (for LDN-
CHB combination), there are three charging and discharging
cycles over a complete period of the output voltage as
observed in Fig. 4(b). But, for any other topology this will not
be possible: the energy time waveform in this condition will
be as shown in Fig. 4(a). The capacitor requirement for LDN
will be lower in poly-phase LDN-CHB compare to any other
topology. Fig. 6. Output line voltage and corresponding third harmonic injected phase
voltage waveforms of the proposed topology
Fig. 5(a). illustrates 13 level phase voltage and corresponding
LDN voltage. This may be noted that, the LDN is always
contributing a positive voltage in both positive and negative TABLE I
half cycle whenever the output voltage level is odd. LDN HARDWARE SETUP DETAILS
current with unity power factor load is shown in Fig. 5(b). Experimental Parameters Details
Energy delivered /absorbed by LDN with unity power factor Number of H-Bridge Per Phase 2 with binary
load is shown in Fig. 5(c). LDN current with zero power factor asymmetry
Number of Phases at Output 3
lagging load is simulated next, corresponding current and
Load Connection Δ
energy waveforms are illustrated in Fig. 5(d) and Fig. 5(e) H-Bridge DC-Bus Capacitances 11,000 µF
respectively. Energy time waveform at any power factor can Level Doubling Circuit DC Bus 33,000 µF
be geometrically found out by algebraically summing the Capacitance
waveforms of Fig. 5(c) and 5(e) with proper ratio. This may Load time constant 500 µSec
also be observed that, the energy-time waveforms are absolute IGBT Modules (Semikron Make) SKM75GB12T4
flat, when the LDN output voltage is zero: as the LDN is IGBT Gate Drivers (Semikron SKHI 22AR
bypassed at this instant. Make)
Cooling Forced Air
IV. EXPERIMENTAL RESULTS Heat Sink (P3 type Semikron Make) 0.14ºKelvin/Watt
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Fig. 10. Harmonic spectrum of line current
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negligible voltage dip is observed for short duration. Then, the [10] P. W. Hammond "Medium Voltage PWM Drive and Method," United
States Patent Application 5625545, April 29, 1997.
frequency and modulation index are reduced to nearly 50%
[11] J. Rodriguez, S. Bernet, Bin Wu, J. O. Pontt, and S. Kouro, "Multilevel
from initial condition of unity modulation index and 50Hz Voltage-Source-Converter Topologies for Industrial Medium-Voltage
frequency, as shown in Fig. 12. The reduction was in three Drives," IEEE Trans. Ind. Electron., vol.54, no.6, pp.2930-2945, Dec.
smaller steps. No disturbance of LDN dc bus is observed even 2007.
[12] R. Teodorescu, F. Blaabjerg, J. K. Pedersen, E. Cengelci, and P. N.
in ac coupling as observed in channel-1 of this figure.
Enjeti, "Multilevel inverter by cascading industrial VSI," IEEE
Trans. Ind. Electron., vol.49, no.4, pp. 832- 838, Aug 2002.
V. CONCLUSIONS [13] G. Waltrich and I. Barbi, "Three-Phase Cascaded Multilevel Inverter
Using Power Cells With Two Inverter Legs in Series," IEEE Trans. Ind.
This paper has presented a new concept to increase the Electron., vol.57, no.8, pp.2605-2612, Aug. 2010.
number of levels in MLI. A 3-phase bridge network is used to [14] J. Wen, K. Smedley, and A. Viejo, "Converters for High Power
almost double the number of levels of three phase cascaded Applications," United States Patent Application 7663268 B2, February
16, 2010.
MLI. The proposed concept can be applied to all form of [15] K. Ichikawa, A. Hirata, K. Kawakami, and K. Satoh, "Multiple Inverter
existing MLIs to almost double the number of levels. System," United States Patent Application 6229722 B1, May 8, 2001.
However, when applied with a symmetric CHB-MLI topology [16] P. M. Rinaldi, E. S. Thaxton, and G. Castles, "Modular Transformer
this has not only increased the levels but also maintained Arrangement for Use With Multi-Level Power Converter," United States
Patent Application 6340851 B1, January 22, 2002.
uniform power loading of the individual cells of the CHB- [17] M. Abolhassani, et. al. "Modular Multi-Pulse Transformer Rectifier For
MLI. The dc bus of the LDN remains in self balancing Use in Asymmetric Multi-Level Power Converter," United States Patent
condition. The operating principle of the circuit is explained. Application 7830681 B2, November 9, 2010.
A detail simulation is presented using MATLAB/SIMULINK.
A laboratory prototype is produced in the lab using
dSPACE1104 controller. Simulation results match well with
the corresponding experimental counterpart confirming the
effectiveness of the proposed topology.
REFERENCES
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