Micro Controller & Risc Architectures

MICROCONTROLLER & RISC ARCHITECTURES
8051 ARCHITECTURE
12 marks questions
Unit – I
1. Describe the architecture of 8051 with a neat diagram.
2. Explain the interrupt structure, SFR and timers of 8051.
3. i) Explain the different serial communication modes in 8051.
ii) Explain the memory structure of 8051.
4. Give the PIN details of an 8051 micro controller and explain.
5. i) Explain the internal RAM organization of 8051.
ii) Explain TCON, SCON and TMOD SFRs of 8051.
6. Explain memory organization of 8051
7. Explain timer/counter of 8051 in detail.
8. Give steps to program 8051 for serial data transfer.
9. Explain the ports and circuits of 8051 micro controller
NY
10. Briefly explain the external memory of 8051 microcontroller.
O
IMPORTANCES TWO MARK QUESTIONS & ANSWERS
1. Features of 8051microcontroller.
NT
· 8 bit controller operating on bit and byte.
· 256 bytes internal RAM and 4 kb internal RAM
· 64/60 kb external program memory address space
A
· 64 kb external data memory address space

S.
· 4 numbers of 8 bit parallel ports.

J.
2. Difference between microprocessor and microcontroller.

S.
S.NO Microprocessor Microcontroller

1 It contains ALU, General It contains the circuitry of mp
purpose REG, SP, PC,CLOCK and in addition, it has built in
timing circuit, interrupt circuit ROM, RAM, I/O devices, timer
and counters.
It has many instructions to It has one or two instructions to

2. move data between memory move data between memory
and CPU. and CPU.
3. Access times for memory and Less access time required.

i/o devices are more.
4. Microprocessor based system is Less flexible in design point of

more flexible in design point of view.
S.J.S.ANTO NY. ITC, B.E, M.B.A., ECE/JKKNCET

1
view.
5. Less no of pins are multi More no of pins are

functioned malfunctioned
3. State the functions of RS1 and RS0 bit in the flag register
It is used to select the register banks
RS0 Bank selection
0 0 00 H – 07 H BANK 0
0 1 08H -0F H BANK 1
1 0 10H – 17 H BANK 2
1 1 18 H – 1F H BANK 3
4. Difference between RR A and RRC A instructions in 8051

RR A RRC A
NY
Rotate accumulator right Rotate accumulator right through carry flag
The 8 bits in the accumulator are rotated 1 The 8 bits in the accumulator and the carry
bit to the right.bit 0 is rotated in to the bit 7 flag together rotated 1 bit to the right.bit 0 is
position. No flags are affected. O moves in to the bit carry flag; the original
NT
value of the flag moves in to the bit 7
position. No flags are affected.
A
5. Show the format of PSW register of 8051

S.
B7 B6 B5 B4 B3 B2 B1 B0
J.
CY AC F0 RS1 RS0 OF - P
S.
6. What are the functions of DPTR register?

· The data pointers consist of a high byte (DPH) and a low byte (DPL).
· It functions is to hold a 16 byte address.
· It serves as a base register in indirect jumps, lookup table instructions and external
data transfer.
7. List the interrupt structures of 8051.

· Priority level structure.
· External interrupts.
· Single step operation.
8. List the instruction sets of 8051.

· Data transfer
· Arithmetic
· Logical
· Branching
· Boolean

2
9. List the addressing modes supported by 8051.
· Register addressing
· Direct byte addressing
· Register indirect
· Immediate
· Register specific
· Index
10. What are the operating modes of the timer of 8051?

· The operating modes of the timer are mode 0, mode1, mode2, mode3.
· In mode 0, timer will function as 13 bit timer, in mode1 will function as 16 bit timer,
in mode2, function as 8 bit with auto reload feature.
11. List the interrupts of 8051 microcontroller.

It has
· External interrupt -0
· Timer-0 interrupt
NY
· External interrupt-1
· Serial port interrupts.
O
12. What are the dedicated address pointers in 8051?
NT
· Program counter
· Data pointer.
· The PC is used as address pointer for program and DPTR is used as address pointer
A
for data.
S.
13. What are the register banks in 8051?

J.
· The Reg banks are internal RAM locations of 8051 which can be used as general
purpose Reg or scratch pad reg.
S.
· The first 32 bytes of internal RAM of 8051 and organise as 4 Reg banks with each
bank consisting 8 locations.
· At any one time the processor can work with only one Reg bank depending on the
value of bits RS0 and RS1.
14. How stack is imple mented in 8051?
· The 8051 LIFO .Stack can reside anywhere in the internal RAM
· It has 8 bit stack pointer to indicate the top if stack. This can be accessed by PUSH and
POP instructions.
· During PUSH the SP is incremented by 1 and during POP the SP is decremented by 1.
15. Explain the inte rrupts of 8051 microcontroller.

The interrupts are:
Vector address
• External interrupt 0 : IE0 : 0003H

3
• Timer interrupt 0 : TF0 : 000BH
• Timer Interrupt 1 : TF1 : 001BH
• Serial Interrupt
Receive interrupt : RI : 0023H
Trans mit interrupt: TI : 0023H
16. Define stack.
Stack is a sequence of RAM memory locations defined by the Programmer.
17. What is program counter? How it will be useful in program execution?
The program counter keeps track of program execution. To execute a program the starting
NY
address of the program is loaded in program counter. The PC sends out an address to fetch a
byte of instruction from memory and increments its content automatically.
O
NT
************************************************
A
S.
J.
S.

4
UNIT-1
THE 8051 ARCHITECTURE (Extra two marks)
1. What is microcontroller?
Microcontrollers are single-chip microcomputers, more suited for control and
automation of machines and processes. With the help of microcontroller it is possible to
carry out simple arithmetic and logical operations.
2. What are the constituents of microcontrolle r?
Microcontrollers consists of central processing unit(CPU), memory,
input/output(I/O) ports, timers and counters ,analog-to-digital converters(ADC),digital-to-
analog converters(DAC),serial ports, interrupt logic, oscillator circuitry and many more
functional blocks on chip.
3. Write about pin details of 8051.
8051 has four 8-bit I/O ports that are used either as four 8-bit ports or each of the
port pins could be addressed individually. There are pins for crystal connections, program
store enable, address latch enable and for external access.
4. Write about me mory organisation of 8051.
NY
It has 64k external data memory, 64k program memory and 256 bytes of internal data
memory. The 64k program memory space of 8051 is divided in to external and internal
memory.
5. Define interrupt. O
NT
Interrupt is an input to the processor that indicates the occurrence of an event.
6. What are the vectored interrupt sources of 8051?

A
8051 supports five vectored interrupt sources. They are

· External interrupt 0
S.
· External interrupt 1
· Timer/counter 0 interrupt
J.
· Timer/counter 1 interrupt
· Serial port interrupts
S.
7. Time rs and counters – 8051:

8051 has two 16-bit timers/counters. The timer counts machine cycles. A machine cycle of
8051 consists of 12 oscillator periods or the counting rate is 1/12 of oscillator frequency. For
counting function, 8051 takes 2 machine cycles or 24oscillator periods to detect a 1 or 0 transition.
8. What are the timer modes of 8051 and how they are determined?
There are 4 timer modes in 8051. The pins M1, M0 determine these modes.
9. M1 10. M0 11. Modes
12. 0 13. 0 14. Mode 0
15. 0 16. 1 17. Mode 1
18. 1 19. 0 20. Mode 2
21. 1 22. 1 23. Mode 3
9. Where serial communication is used and what is its advantage?

Serial data transmission is very commonly used for digital data communication. Its main
advantage is that the number of wires needed is reduced as compared to that in parallel
communication.

5
10. What are the serial communication modes of 8051?
§ Mode 0(shift register mode)
§ Mode 1
§ Mode 2
§ Mode 3
11)Give an example for 8-bit & 16-bit micro controlle rs.

v Mcs-51 is an 8-bit micro controller.
v Mcs-96 is a 16-bit micro controller.
12) Write some of the features of 8051.

· 8051 is an 8-bit micro controller.
· Its operating frequency is 12 MHZ
· It has separate 64k program and 64k data memory
· Multiply and divide instructions available
13) Write about s pecial function registers (SFRS).

The special function registers are used for control or to show the status of various
NY
functions done by 8051.some of the SFRs are
· Program status word
· Data pointer(DPTR)
· Timer registers O
NT
· Control registers
· Capture registers
A
14) What are the program control statements available in 8051?

v Jumps
S.
v Calls
v Return
J.
15) What are the registers available in 8051?

S.
· General purpose registers

18. Accumulator
19. B-register
20. 8 scratch pad register
· Stack pointer
· Program counter
· Special function register
16) What are the different trans mission format and baud rate to serial port modes?
Mode Transmission format Baud Rate

0 8-data bits 1/12 oscillator frequency
1 10-bit (start bit +8data bits+ stop bit) variable
2 11-bit (start bit+8-data bits Programmable to either 1/32
+programmable 9th data bit+ stop bit) or 1/64 oscillator frequency
3 11-bit(start bit+8 data bit+ variable
programmable 9th data bit+ stop bit)

6
17) What are the constituents in CPU of 8051?
The CPU of 8051 consists of eight bit arithmetic and logic unit with associated
registers like A, B, PSW, sp the sixteen bit program counter and data pointer (DPTR) registers.
18) Features of 8051microcontroller.

· 8 bit controller operating on bit and byte.
· 256 bytes internal RAM and 4 kb internal RAM
· 64/60 kb external program memory address space
· 64 kb external data memory address space
· 4 numbers of 8 bit parallel ports.
19)Difference between microprocessor and microcontrolle r.

S.NO Microprocessor Microcontroller
1 It contains ALU, General It contains the circuitry
purpose REG, SP,PC, clock of mp and in addition, it
timing circuit, interrupt has built in ROM, RAM,
circuit I/O devices, timer and
counters.
NY
It has many instructions to It has one or two
2. move data between memory instructions to move data
and CPU. between memory and
CPU. O
NT
3. Access times for memory and Less access time
i/o devices are more. required.
A
4. Microprocessor based system Less flexible in design

S.
is more flexible in design point of view.

point of view.
J.
5. Less no of pins are multi More no of pins are

S.
functioned malfunctioned
20) State the functions of RS1 and RS0 bit in the flag register
It is used to select the register banks
RS1 RS0 Bank selection
0 0 00 H – 07 H BANK 0
0 1 08H -0F H BANK 1
1 0 10H – 17 H BANK 2
1 1 19 – 1F H BANK 3
21) Difference between RR A and RRC A instructions in 8051

RR A RRC A
Rotate accumulator right Rotate accumulator right through carry flag
The 8 bits in the accumulator are rotated 1 The 8 bits in the accumulator and the carry
bit to the right.bit 0 is rotated in to the bit 7 flag together rotated 1 bit to the right.bit 0 is
position. No flags are affected. moves in to the bit carry flag; the original
value of the flag moves in to the bit 7
position. No flags are affected.
7
22) Show the format of PSW register of 8051
B7 B6 B5 B4 B3 B2 B1 B0
CY AC F0 RS1 RS0 OF - P
23) What are the functions of DPTR register?

· The data pointers consist of a high byte (DPH) and a low byte (DPL).
· It functions is to hold a 16 byte address.
· It serves as a base register in indirect jumps, lookup table instructions and external
data transfer.
· List the interrupt structures of 8051.

· Priority level structure.
· External interrupts.
· Single step operation.
· List the instruction sets of 8051.
NY
· Data transfer
· Arithmetic
· Logical
· Branching O
NT
· Boolean
· List the addressing modes supported by 8051.

A
· Register addressing
· Direct byte addressing
S.
· Register indirect
· Immediate
J.
· Register specific
S.
· Index
· What are the operating modes of the timer of 8051?

· The operating modes of the timer are mode 0, mode1, mode2, mode3.
· In mode 0, timer will function as 13 bit timer, in mode1 will function as 16 bit timer,
in mode2, function as 8 bit with auto reload feature.
· List the interrupts of 8051 microcontroller.

It has
· External interrupt -0
· External interrupt-1
· Serial port interrupts.
· What are the dedicated address pointers in 8051?

· Program counter
· Data pointer.

8
· The PC is used as address pointer for program and DPTR is used as address pointer
for data.
· What are the register banks in 8051?

· The Reg banks are internal RAM locations of 8051 which can be used as general
purpose reg or scratch pad reg.
· The first 32 bytes of internal RAM of 8051 and organise as 4 Reg banks with each
bank consisting 8 locations.
· At any one time the processor can work with only one Reg bank depending on the
value of bits RS0 and RS1.
· How stack is imple mented in 8051.

· The 8051 LIFO .Stack can reside anywhere in the internal RAM
· it has 8 bit stack pointer to indicate the top if stack. This can be accessed by PUSH and
POP instructions.
· During PUSH the SP is incremented by 1 and during POP the SP is decremented by 1.
32. Explain the inte rrupts of 8051 microcontroller.
NY
The interrupts are:
Vector address
• External interrupt 0 : IE0 O : 0003H

NT
• Timer interrupt 0 : TF0 : 000BH

A
• Timer Interrupt 1 : TF1 : 001BH

S.
• Serial Interrupt
J.
Receive interrupt : RI : 0023H

S.
Trans mit interrupt: TI : 0023H
33. Define stack.

Stack is a sequence of RAM memory locations defined by the Programmer
34. What is program counter? How it will be useful in program execution?

The program counter keeps track of program execution. To execute a program the starting
address of the program is loaded in program counter. The PC sends out an address to fetch a
byte of instruction from memory and increments its content automatically.
************************ THE END************************

9
Unit – II
THE 8051 INSTRUCTION SET AND PROGRAMMING
12 marks questions
1. Explain the addressing modes of 8051 microcontroller with suitable example.
2. List the various instructions available in 8051 microcontroller.
3. i. Explain addition and subtraction instruction of 8051
ii. Explain various types of jump instructions.
4. Explain the logical instruction of 8051 microcontroller.
5. Explain single bit instructions and give example.
6. Write a program using 8051 micro controller for the following
a. Program to generate 50 ms delay.
b. Find the average of 10 numbers.
7. Give steps to program 8051 for serial data transfer.
8. Write an ALP for serial receptions and transmission in interrupt driven mode.
NY
9. Write an 8051 ALP to find Fibonacci series of N given numbers.
10. Write an ALP to find the average of given N numbers.
O
NT
1. How the baud rate is decided in mode1 and mode3 in the serial trans mission of 8051
· The baud rate depends on SMOD bit of PCON Reg and the yimer-1 overflow
A
rate shown below.

· The baud rate in mode 1 or 3= 2 / 32 (timer – 1 overflow rate).
S.
2. How to estimate the time taken to execute the instruction in 8031/8051 controller
J.
• It is obtained by multiplying the time to execute machine cycle by the number of

machine cycles of the instruction. The time to execute a machine time is 12 clock periods.
S.
• Time to execute an instruction=C *12* T=C *12 *1/F.
3. List the various machine cycle of 8031/8051 controlle r.
· External program memory fetch cycle.

· External data memory read cycle.
· External data memory write cycle.
· Port operation cycle.
4. List the instruction of 8051 that all the flag of 8051

The 8051 instruction that affect all the flag are ADD, ADDC, and SUBB
5. List the instruction of 8051 that affect overflow flag in 8051.

The 8051 instruction that affect overflag are ADD, ADDC, DIV, MUL, and SUBB.
6. List the instruction of 8051 that always clear carry flag.
The instruction that always clear carry flag are CLR C, DIV, MUL.

10
7. What are the operations performe d by Boolean variable instruction of 8051?
The Boolean variable instructions can carry or complement or move a particular bit
8. Write a program to perform multiplication of 2 no’s using 8051.
MOV A, #data 1
MOV B, #data 2
MUL AB
MOV DPTR, #5000
MOV @DPTR, A(lower value)

INC DPTR
MOV A,B
MOVX @ DPTR, A
SJMP
NY
9. Write a program to mask the 0th &7th bit using 8051.
MOV A, #data
ANL A,#81 O
NT
MOV DPTR, #4500
MOVX @DPTR, A LOOP SJMP LOOP

A
10. List the addressing modes of 8051.

S.
1. Direct addressing
J.
2. Register addressing
3. Register indirect addressing.
S.
4. Implicit addressing
5. Immediate addressing
6. Index addressing
7. Bit addressing
11. Write about CALL statement in 8051.
There are two subroutine CALL instructions. They are *LCALL(Long

CALL)
*ACALL(Absolute CALL)
Each increments the PC to the 1 st byte of the instruction & pushes them in to the
stack.

11
12. Write about the jump statement.
There are three forms of jump. They are

22. LJMP(Long jump)-address 16
23. AJMP(Absolute Jump)-address 11
24. SJMP(Short Jump)-relative address
13. Write program to load accumulator , DPH,&DPL using 8051.
MOV A,#30
MOV DPH,A
MOV DPL,A
14. Write a program to find the 2’s comple ment using 8051.
MOV A,R0
CPL A
NY
INC A
O
15. Write a program to add 2 8-bit numbe rs using 8051.
NT
MOV A,#30H
ADD A,#50H
A
16. Explain the operating mode0 of 8051 serial ports.

S.
In this mode serial enters &exits through RXD, TXD outputs the shift clock.8 bits
J.
are transmitted/received: 8 data bits (LSB first).The baud rate is fixed at 1/12 the oscillator
frequency.
S.
In this mode 11 bits are transmitted(through TXD)or received (through RXD):a start
bit(0), 8 data bits(LSB first),a programmable 9th data bit ,& a stop bit(1).ON transmit the 9th data
bit (TB* in SCON)can be assigned the value of 0 or 1.Or for eg:, the parity bit(P, in the PSW)could
be moved into TB8.On receive the 9th data bit go in to the RB8 in Special
Function Register SCON, while the stop bit is ignored. The baud rate is programmable to either
1/32or1/64 the oscillator frequency.
18. Explain the mode3 of 8051 serial ports.
In this mode,11 bits are transmitted(through TXD)or received(through RXD):a start

bit(0), 8 data bits(LSB first),a programmable 9th data bit ,& a stop bit(1).In fact ,Mode3 is the same
as Mode2 in all respects except the baud rate. The baud rate in Mode3 is variable.
12
In all the four modes, transmission is initiated by any instruction that uses SBUF as a
destination register. Reception is initiated in Mode0 by the condition RI=0&REN=1.Reception is
initiated in other modes by the incoming start bit if REN=1.
19. Write a program to s wap two numbe rs using 8051.
MOV A, #data
SWAP A
20. Write a program to subtract two 8-bit numbe rs &exchange the digits using 8051.
MOV A,#9F
MOV R0,#40
SUBB A,R0
SWAP A
NY
21. Write a program to subtract the contents of R1 of Bank 0from the contents of R0 of
Bank 2 using 8051.
MOV PSW,#10 O
NT
MOV A,R0
MOV PSW,#00
A
SUBB A,R1
S.
************************************************
J.
S.

13
Unit – II
THE 8051 INSTRUCTION SET AND PROGRAMMING
(Extra two marks)
1. List the programme rs model of Intel 8051
*Memory,
*Special function registers,
*Program status word.
2. What are the discussions of inte rnal data RAM?
1) 32 bytes for 4 banks of registers R0-R7
2) 16 bytes of direct addressing bits
3) 80 bytes as general purpose RAM
3. Define SFR?
SFR - Special Function Registers
Using the SFRs , the different resources of the 8051 , link timer / counters , serial
ports , interrupts ,may be programmed and controlled .
NY
4. Write about PSW ?
PSW – Program Status word
Program Status Word contains several status bits that reflect the current state
O
of the CPU. The PSW is one of the special function registers and contain the carry bit ,
NT
the auxiliary bit , two registers select bits , the overflow flag bit , the parity bit and two user
definable status flag bits .
5. What are the types of operand addressing?
A
OR
S.
What are the five ways of addressing operands?

* Register addressing
J.
* Direct addressing
* Register – indirect addressing
S.
* Immediate addressing
* Base register plus index register indirect addressing .
6. Define register addressing?
Register addressing permits access to eight registers (R0 –R7) of register
band . There are four banks of eight registers . One of the four banks is selected by a 2 – bit
field in PSW . other registers used are A,B,AB and DPTR.
7. What are the operand types of 8051?
* Bytes ,
* Short integers ,
* Bits .
8. Where does direct byte addressing provides operation ?
Direct byte addressing provides operation on one of the following .
1) Lower 128 bytes of internal data RAM ,
2) Special function registers .
9. Where does direct bit addressing provides operation ?
Direct bit addressing provides operation on one of the following .

14
128 bits subset of internal data RAM 128 bits subset of special function register
address space
10. What is indirect addressing ?
In this addressing , the address of the operand is not specified directly .
Instead, The address of the operand is specified as the contents of register mentioned in
Instruction .
11. What is immediate addressing ?
In this case the operand on which the operation has to be performed
according to the instruction is specified in the instruction itself
E . g : ADD A , # data.
12. Define base register plus index register indirect addressing?
This is an indirect instruction used to access the program memory. In this,
the summation of contents of base register and index register determines the operand address.
13. What are the instructions in 8051 ?
* Data transfer instructions ,
* Arithmetic instructions ,
NY
* Logical instructions ,
* Control transfer instructions.
14 . What are the four addition operations in 8051 ?
ADD O
NT
ADDC
DA
A
INC
15. What are the two subtraction operations ?
S.
* SUBB
* DEC
J.
16. What are the two types of operation in logic instructions ?

* Single – operand operations ,
S.
* Two - operations .
17. List the single – operand logical operations ?
CLR, SETB , CPL , RL , RLC , RR , RRC , SWAP.
18. List the three classes of control transfer operations ?
1) Unconditional calls , returns and jumps ,
2) Conditional jumps ,
3) Interrupts .
19. How does the 8051 know whether a timer / counter is functioning as a time r
or as an event counter ?
There is a bit in the TMOD SFR that specifies whether it is a timer or a
counter .If this bit is set , the timer / counter will work as a counter and if this bit is reset ,
The timer/ counter will work as a timer .
20. What are 5the four modes in serial port of 8051 ?

Mode 0 ,
Mode 1 ,
15
Mode 2 ,
Mode 3.
21. List the five interrupt sources of 8051 ?
* INTO
* Timer 0
*INT 1
* Timer 1
* Serial port .
22. How the baud rate is decided in mode1 and mode3 in the serial trans mission of 8051
· The baud rate depends on SMOD bit of PCON reg and the yimer-1 overflow rate
shown below.
· The baud rate in mode 1 or 3= 2 / 32 (timer – 1 overflow rate).
23. How to estimate the time taken to execute the instruction in 8031/8051 controller
• It is obtained by multiplying the time to execute machine cycle by the number of
machine cycles of the instruction. The time to execute a machine time is 12 clock periods.
NY
• Time to execute an instruction=C *12* T=C *12 *1/F.
24. List the various machine cycle of 8031/8051 controlle r.
·
O
External program memory fetch cycle.
NT
· External data memory read cycle.
· External data memory write cycle.
A
· Port operation cycle.

S.
25. List the instruction of 8051 that all the flag of 8051
The 8051 instruction that affect all the flag are ADD, ADDC, and SUBB
J.
26. List the instruction of 8051 that affect overflow flag in 8051.
S.
The 8051 instruction that affect overflag are ADD, ADDC, DIV, MUL, and SUBB.
27. List the instruction of 8051 that always clear carry flag.
The instruction that always clear carry flag are CLR C, DIV, MUL.
28. What are the operations performe d by Boolean variable instruction of 8051?
The Boolean variable instructions can carry or complement or move a particular bit.
29. Write a program to perform multiplication of 2 no’s using 8051.
MOV A, #data 1
MOV B, #data 2
MUL AB
MOV DPTR, #5000
MOV @DPTR,A(lower value)

16
INC DPTR
MOV A,B
MOVX @ DPTR,A
SJMP
30. Write a program to mask the 0th &7th bit using 8051.
MOV A, #data
ANL A,#81
MOV DPTR,#4500
MOVX @DPTR,A LOOP SJMP LOOP
31. List the addressing modes of 8051.

8. Direct addressing
NY
9. Register addressing
10. Register indirect addressing.
O
11. Implicit addressing
NT
12. Immediate addressing
13. Index addressing
A
14. Bit addressing

S.
32. Write about CALL statement in 8051.

J.
There are two subroutine CALL instructions. They are

S.
*LCALL(Long CALL)
*ACALL(Absolute CALL)
Each increments the PC to the 1 st byte of the instruction & pushes them in to the
stack.
33. Write about the jump statement.
There are three forms of jump. They are

LJMP(Long jump)-address 16
AJMP(Absolute Jump)-address 11
SJMP(Short Jump)-relative address
34. Write program to load Accumulator , DPH,&DPL using 8051.
MOV A,#30
MOV DPH,A

17
MOV DPL,A
35. Write a program to find the 2’s comple ment using 8051.
MOV A,R0
CPL A
INC A
36. Write a program to add 2 8-bit numbe rs using 8051.
MOV A, #30H
ADD A, #50H
In this mode serial enters &exits through RXD, TXD outputs the shift clock.8 bits
are transmitted/received: 8 data bits (LSB first).The baud rate is fixed at 1/12 the oscillator
frequency.
NY
In this mode 11 bits are transmitted(through TXD)or received (through RXD):a start
O
bit(0), 8 data bits(LSB first),a programmable 9th data bit ,& a stop bit(1).ON transmit the 9th data
NT
bit (TB* in SCON)can be assigned the value of 0 or 1.Or for eg:, the parity bit(P, in the PSW)could
be moved into TB8.On receive the 9th data bit go in to the RB8 in Special
A
Function Register SCON, while the stop bit is ignored. The baud rate is programmable to either
1/32or1/64 the oscillator frequency.
S.
J.
39. Explain the mode3 of 8051 serial ports.
In this mode,11 bits are transmitted(through TXD)or received(through RXD):a start

S.
bit(0), 8 data bits(LSB first),a programmable 9th data bit ,& a stop bit(1).In fact ,Mode3 is the same
as Mode2 in all respects except the baud rate. The baud rate in Mode3 is variable.
In all the four modes, transmission is initiated by any instruction that uses SBUF as a
destination register. Reception is initiated in Mode0 by the condition RI=0&REN=1.Reception is
initiated in other modes by the incoming start bit if REN=1.
40. Write a program to s wap two numbe rs using 8051.
MOV A, #data
SWAP A

18
41. Write a program to subtract two 8-bit numbe rs &exchange the digits using 8051.
MOV A,#9F
MOV R0,#40
SUBB A,R0
SWAP A
42. Write a program to subtract the contents of R1 of Bank 0from the contents of R0 of
Bank 2 using 8051.
MOV PSW,#10
MOV A,R0
MOV PSW,#00
SUBB A,R1
**************************THE END**********************
O NY
NT
A
S.
J.
S.

19
Unit – III
THE 8051-REAL WORLD INTERFACING
12 marks questions
1. With neat sketch explain the function of A/D convertor.
2. With neat sketch explain the function of D/A convertor.
3. Explain stepper motor interfacing with 8051.
4. With near sketch explain the function of keyboard and display controller.
5. Explain the interface LCD module with 8051 microcontroller.
6. Draw the schematic for interfacing a stepper motor with 8051 microcontroller and
write the program to changing speed and direction of motor.
7. Explain the 8051 microcontroller interfacing to external memory.
8. Explain the 8051 interfacing to 8255.

1. Give the M/IO used for interfacing technique.
NY
M/IO=1; microprocessor communicating with memory system.
M/IO=0; microprocessor communicating with IO system.
2. Give the two methods for interfacing IO device. (Nov 2007)
1. Input/output Mapped I/O. O
NT
2. Memory Mapped I/O.
3. Describe programmed I/O.

A
The transfer of data is completely under the control of microprocessor program. The data
transfer takes place only when I/O transfer instruction executed.
S.
J.
4. What is the input device used in I/O interfacing?

The Input device used in I/O interfacing is buffer. The data transferred to output need to be
S.
latched so that it will be available for checking or displaying.
5. What is the output device used in I/O interfacing?

The output device used in I/O interfacing is latch. When microprocessor wants to read data
from input device it will enable the buffer so data so data will be transferred on to data bus of
microprocessor
6. What is cycle stealing?

The refresh cycles are accomplished by doing a write; a read .The refresh cycle is totally
internal to the DRAM and is accomplished while other memory components in the system operate.
This type of refresh is known as cycle stealing or hidden refresh.
.
7. What is the range of IO in inte rfacing?
IO devices can be mapped in the specified IO range as 255 or 65535.
8. What are the two ways to address the IO?

The two ways to address the IO are
20
1. Direct Addressing
2. Indirect Addressing
9. What are the parameters needed to interface me mory?

Address to output delay (tACC)
CE to output delay (tCE)
Output enable to output delay (tOE).
10. What is meant by SRAM and its applications?
Static RAM or SRAM is a type of RAM that uses a flip-flop as its basic storage element.
Application: To avoid inserting WAIT states, most high speed micro computer systems
require a cache memory subsystem. These systems are normally designed using SRAM.
11. What are the inte rnal devices of 8255 ?

The internal devices of 8255 are port-A, port-B and port-C. The ports can be programmed
for either input or output function in different operating modes.
12. What are the inte rnal devices of a typical DAC?
NY
The internal devices of a DAC are R/2R resistive network, an internal latch and current to
voltage converting amplifier.
O
13. What do you meant by settling or conversion time in DAC?
NT
The time taken by the DAC to convert a given digital data to corresponding analog signal is
called conversion time.
A
14. What are the different types of ADC?

The different types of ADC are successive approximation ADC, counter type ADC flash type
S.
ADC, integrator converters and voltage-to-frequency converters.

J.
15. What are the tasks involved in keyboard inte rface?

The task involved in keyboard interfacing are sensing a key actuation, Debouncing the key
S.
and Generating key codes (Decoding the key). These task are performed software if the
keyboard is interfaced through ports and they are performed by hardware if the keyboard is
interfaced.
16. Give some examples of input devices to microcontroller based system.

The input devices used in the microcontroller-based system are Keyboards, DIP switches,
ADC, Floppy disc, etc.

21
UNIT-3
THE 8051-REAL WORLD INTERFACING
(Extra two marks)
1. What is meant by semiconductor me mory?
The memory that the CPU first asks for information (code & data) is called as
semiconductor memory. Semiconductor memories are directly connected to CPU & are sometimes
referred to as primary memory.
Most widely used semiconductor memories are RAM & ROM.
2. What are the characte ristics of semiconductor me mory?

1.Memory capacity
2.Memory organisation
3.Speed
3. Define MEMORY CAPACITY?

The number of bits that a semiconductor memory chip can store is called as chip capacity or
memory capacity.
It can be in units of Kbits(kilo bits), Mbits (Mega bits) and so on.
NY
4. Define ROM.
ROM-Read Only Memory
O
Rom is a type of memory that does not lose its contents when the power is turned off. For this
reason ROM is also called as non- volatile memory.
NT
5. What are the different types of ROM?
1. PROM
A
2. EPROM
3. EEPROM
S.
4. Flash EPROM
5. Mask ROM
J.
6. Define PROM.
S.
PROM-Programmable Read Only Memory

PROM is a user programmable memory that the user can burn the information into & can be
programmed by blowing the fuses.
7. Why prom is called as ONE TIME PROGRAMMABLE (OTP)?

If the information burned into PROM is wrong, that PROM must be discarded since its
internal fuses are blown permanently.
For this reason PROM is referred to as OTP.
8. Define EPROM.
EPROM-Erasable Programmable Read Only Memory
EPROM in which one can program the memory chip & erase it thousands of times.
A widely used EPROM is called UV-EPROM.
9. What are the advantages of EEPROM over EPROM?

1.The method of erasure is electrical & therefore instant, as opposed to the 20- minute
erasure time required for UV-EPROM.
2.In addition, in EEPROM one can select which byte to be erased, in contrast to UV-
EPROM.
22
10. Define FLASH MEMORY EPROM.
The memory in which the erasure of the entire contents take less than a second,
or one might say in a flash is called as flash memory.
11. Define MASK ROM.
Mask ROM refers to a kind of ROM in which the contents are programmed
by the IC manufacturer. Mask ROM is not a user programmable memory.
12. Define RAM.

RAM-Random Access Memory
RAM memory is called volatile memory since cutting off power to the IC
results in the loss of data.RAM is also known as RAWM (Read and Write Memory).
13. What are the types of RAM?

1. SRAM(Static RAM)
2. NV-RAM(Non Volatile RAM)
3. DRAM(Dynamic RAM).
NY
14. What are the factors to be considered while connecting a me mory chip to CPU.
1)Data bus of the CPU is connected directly to the data pins of the memory chip.
2)Control signals RD and WR from the CPU are connected to the OE and WE pins of the
memory chip.
O
NT
15. What is EA PIN?
For 8751/89c51/ds5000 based systems, we connect EA pin to VCC to indicate that
the program code is stored in the micro-controller ‘s on chip ROM.EA pin connected to GND to
A
indicate that program code is stored in external ROM.

S.
16. What is PSEN?

PSEN-Program Store Enable Signal.
J.
PSEN is an output signal for the 8031/51 micro controller and must be connected
to OE pin of a ROM containing the program code.
S.
17. What is the reason for wide spread of LCD?

1) Declining prices of LCDs
2) The ability to display numbers, characters and graphics
3) Ease of programming for characters and graphics.
18. Define transducer.

A physical quality is converted to electrical (voltage, current) signals using a device
called transducers.
19. Give the equation for determining the clock frequency.

f=1/1.1RC
Where, f-> frequency
R->Resistance
C->Capacitance
20. How can the output voltage calculated?
Output voltage can be calculated using the voltage,
Dout = Vin/step size
*******************THE END**********************
23
Unit – IV
THE ARM RISC ARCHITECTURE
12 marks questions
1. Explain the architecture and memory organization of ARM processor.
2. Explain the data operation and flow control of ARM processor.
3. Explain the design of low power consumption in ARM.
4. Explain the ARM programmer’s module in ARM.
5. Explain ARM organization and implementation of 3 stage pipe line.
6. Explain ARM organization and implementation of 5 stage pipe line.
7. Give the notes on reduced instruction set computer.
8. Explain the ARM7 TDMI with its organization with the necessary diagram and applications.

1. Give the diffe rence between RISC and CISC processor
NY
• A fixed (32-bit) instruction size with few formats; CISC processors typically had
Variable length instruction sets with many formats.
• A load-store architecture where instructions that process data operate only on registers and are
O
separate from instructions that access memory; CISC processors typically allowed values in
memory to be used as operands in data processing instructions.
NT
• A large register bank of thirty-two 32-bit registers, all of which could be used for
any purpose, to allow the load-store architecture to operate efficiently; CISC
register sets were getting larger, but none was this large and most had different
A
registers for different purposes (for example, the data and address registers on the
Motorola MC68000)
S.
2. What are the advantages of RISC?

J.
· A smaller die size.

S.
· A shorter development time

· Higher performance
3. How the earlie r RISC performance was improved.
· The earlier performance improved by two factors Pipelining
· A high clock rate with single cycle execution
4. What are the drawback of RISC processor?
· RISCs generally have poor code density compared with CISCs.
· RISCs don't execute x86 code.
5.What are the factors determine the CMOS circuit powe r consumption?
• Switching power
• Short circuit power
• Leakage current
6.What are the various approaches or low powe r design?
• Minimize the power supply voltage, Vdd.
• Minimize the circuit activity, A.
• Minimize the number of gates.
• Minimize the clock frequency, f.

24
7.What are the features used in the ARM processor?
1. a load-store architecture;
2. fixed- length 32-bit instructions;
3. 3-address instruction formats.
8.What are the features rejected in the ARM processor?
– Register windows.
– Delayed branches
– Single cycle execution of all instruction
9.What are the various registers used in Arm processor?
When writing user- level programs, only the 15 general-purpose 32-bit registers (r0
to r!4), the program counter (r15) and the current program status register (CPSR)
need be considered. The remaining registers are used only for system- level programming
and for handling exceptions
10. Give the CPSR format for ARM.
NY
• N: Negative; the last ALU operation which changed the flags produced a negative
result (the top bit of the 32-bit result was a one).
• Z: Zero; the last ALU operation which changed the flags produced a zero result
(every bit of the 32-bit result was zero). O
NT
• C: Carry; the last ALU operation which changed the flags generated a carry-out,
either as a result of an arithmetic operation in the ALU or from the shifter.
• V: overflow; the last arithmetic ALU operation which changed the flags generated
A
an overflow into the sign bit

S.
11. Explain about the me mory organisation of ARM.

Memory may be viewed as a linear array of bytes numbered from zero up to 232- l.
J.
Data items may be 8-bit bytes, 16-bit half- words or 32-bit words. Words are always
aligned on 4-byte boundaries (that is, the two least significant address bits are zero)
S.
and half- words are aligned on even byte boundaries.
12. What are the principal components of 3 stage pipeline?

Register bank,, ALU, Barrel shifter ,Address register, Data register, Instruction decoder
13. What are the operations done by 3 stage pipeline?

• Fetch;
The instruction is fetched from memory and placed in the instruction pipeline.
• Decode;
The instruction is decoded and the datapath control signals prepared for the next
Cycle. In this stage the instruction 'owns' the decode logic but not the datapath.
• Execute;
The instruction 'owns' the datapath; the register bank is read, an operand shifted,
the ALU result generated and written back into a destination register.
14. What are the ways to find the breaks in the pipeline?
The simplest way to view breaks in the ARM pipeline is to observe that:
25
• All instructions occupy the data path for one or more adjacent cycles.
• For each cycle that an instruction occupies the data path, it occupies the decode
logic in the immediately preceding cycle.
• During the first data path cycle each instruction issues a fetch for the next instruction but one.
• Branch instructions flush and refill the instruction pipeline.
15. What are the ways to improve the performance of 5 stage pipeline?
Increase the clock rate, fclk.
• Reduce the average number of clock cycles per instruction, CPI.
16. What are the stages available in the 5 stage pipeline?
• Fetch; The instruction is fetched from memory and placed in the instruction pipeline.
• Decode; The instruction is decoded and register operands read from the register file. There are
three operand read ports in the register file, so most ARM instructions can source all their operands
in one cycle.
• Execute; An operand is shifted and the ALU result generated. If the instruction is a load or store
the memory address is computed in the ALU.
NY
• Buffer/data; Data memory is accessed if required. Otherwise the ALU result is simply buffered
for one clock cycle to give the same pipeline flow for all instructions.
• Write-back; The results generated by the instruction are written back to the register file,
including any data loaded from memory. O
NT
17. What are the factors determines the minimum cycle time?
The minimum data path cycle time is therefore the sum of:
A
• The register read time;

• The shifter delay;
S.
• The ALU delay;

• The register write set- up time;
J.
• The phase 2 to phase 1 non-overlap time.

S.
18. What the features are of ARM 7processor?

• The ARM7, a 3 volt compatible rework of the ARM6 32-bit integer core, with the Thumb 16-bit
compressed instruction set;
• On-chip Debug support, enabling the processor to halt in response to a debug request;
• An enhanced Multiplier, with higher performance than its predecessors and yielding a full 64-bit
result;
• Embeddable hardware to give on-chip breakpoint and watch point support.
19. What are the additional features provided by ARM 9 TDMI?

• Hardware single-stepping is supported.
• Breakpoints can be set on exceptions in addition to the address/data/control conditions supported
by ARM7TDMI
20. How the ARM 9 TDMI supports the co-processor support?

The ARM9TDMI has a coprocessor interface which allows on-chip coprocessors for floating-point,
digital signal processing or other special-purpose hardware acceleration requirements to be
supported.
*************************************************

26
Unit – IV
THE ARM RISC ARCHITECTURE
(Extra two marks)
1. Define ARM 7TDMI processor.

The ARM7TDMI processor is a member of the Advanced RISC machine family of general purpose
32-bit microprocessor.
2. What are the two operating states in ARM7TDMI?

– ARM state which executes 32-bit, word aligned ARM instructions
– THUMB state which can execute 16-bit, half word aligned THUMB instructions
3. List the seven modes of operation of ARM7TDMI.

– User (USR)
– FIQ (FIQ)
– IRQ (IRQ)
– Supervisor (SVC)
– Abort mode (ABT)
NY
– System (SYS)
– Undefined (UND)
4. How many registers are available in ARM7TDMI?

There are totally 4. O
NT
There are totally 37 registers.
• 31 general-purpose 32-bit registers
• 6 status registers
A
•
5. What is a load instruction?
S.
A load instruction provides a way to branch anywhere in the 4Gbyte address

space. A 32-bit value is loaded directly from memory into the PC, causing a branch.
J.
6. What are the two classes of multiply instruction in ARM?

S.
• normal, 32-bit result

• long, 64-bit result
7. What are the types of load and store instructions .

*Load or store the value of a single register
*Load and store multiple Load and Store multiple instructions perform a block transfer of any
number of the general purpose registers to or from memory Location.
8. What are the addressing modes provided in ARM7TDM1?

• pre-increment
• post-increment
• pre-decrement
• post-decrement
•
9.DEFINE THUMB INSTRUCTION SET?
The Thumb instruction set is a subset of the ARM instruction set, optimized for code
density.

27
10. What are the advantages of ARM instruction set?
• All instructions are 32 bits long.
• Most instructions are executed in one single cycle.
• Every instruction can be conditionally executed.
11. What are the advantages of Thumb instruction set?

• All instructions are exactly 16 bits long to improve code density over other 32-bit
architectures
• Long branch range
• Powerful arithmetic operations
• Large address space
12. List the Arithmetic operations?

• ADD
• ADC
• SUB
• SBC
• RSB
NY
• RSC
13. What is the use of barrel shifter in ARM?

•
• O
The ARM does not have actual shift instruction.
Instead it has a barrel shifter which provides a mechanism to carry out shifts as a part of other
NT
instructions.
14. Why ARM Architecture is a load or store Architecture?

A
1. Because it does not support memory to memory data processing operations.

2. Also it must move data values into registers before using them.
S.
15. Mention three sets of instructions which interact with main me mory?
J.
1. Single register data transfer(LDR/SDR)

2. Block data transfer (LDM/STM).
S.
3. Single Data Swap(SWP).
***********************THE END************************

28
UNIT V
ARM INSTRUCTION AND ASSEMBLY LANGUAGE

PROGRAMMING
12 marks questions
1. Explain the data processing instruction of ARM processor with an example.
2. Explain the data transfer instruction of ARM processor with an example.
3. Explain the control flow instruction of ARM processor with an example.
4. Explain the half word and signed bite data transfer instructions.
5. Explain the single word and unsigned bite data transfer instructions.
6. Explain the Thumb instruction set of ARM processor.
7. Explain the Thumb implementation and applications.
8. Explain the branch and branch with link and exchange with examples.
9. Explain the software interrupts in ARM processor.
NY
1. What are the data types accepted by ARM processor?
ARM processors support six data types:
• 8-bit signed and unsigned bytes.
O
• 16-bit signed and unsigned half-words; these are aligned on 2-byte boundaries.
NT
• 32-bit signed and unsigned words; these are aligned on 4-byte boundaries.
2. What do you meant by exception?

A
Exceptions are usually used to handle unexpected events which arise during the execution of a
program, such as interrupts or memory faults
S.
3. What are the types of exception?

J.
Exceptions generated as the direct effect of executing an instruction.

Exceptions generated as a side-effect of an instruction.
S.
Exceptions generated externally, unrelated to the instruction flow.
4. Explain the priorities for exception.

Since multiple exceptions can arise at the same time it is necessary to define a priority
order to determine the order in which the exceptions are handled. On ARM this is:
1. Reset (highest priority);
2. Data abort;
3. FIQ;
4. IRQ;
5. Prefect abort;
6. SWI, undefined instruction (including absent coprocessor). These are mutually exclusive
instruction encodings and therefore cannot occur simultaneously.
5. Explain about the conditional execution.

An unusual feature of the ARM instruction set is that every instruction (with the exception of
certain v5T instructions) is conditionally executed. Conditional branches are a standard feature of
most instruction sets, but ARM extends the conditional execution to all of its instructions, including
supervisor calls and coprocessor instructions. The condition field occupies the top four bits of the
32-bit instruction field.
29
6. Explain about the branch instruction.
Branch and Branch with Link instructions are the standard way to cause a switch in the sequence of
instruction execution. The ARM normally executes instructions from sequential word addresses in
memory, using conditional execution to skip over individual instructions where required.
7. Explain about the Branch, Branch with Link and exchange.

These instructions are available on ARM chips which support the Thumb (16-bit) instruction set,
and are a mechanism for switching the processor to execute Thumb instructions or for returning
symmetrically to ARM and Thumb calling routines.
8. Explain about software interrupt.

The software interrupt instruction is used for calls to the operating system and is often called a
'supervisor call'. It puts the processor into supervisor mode and begins executing instructions from
address 0x08.
9. Explain the processor ope rations for the execution of software interrupt
If the condition is passed the instruction enters supervisor mode using the standard ARM exception
NY
entry sequence. In detail, the processor actions are:
1. Save the address of the instruction after the SWI in r14 svc.
2. Save the CPSR in SPSR svc.
O
3. Enter supervisor mode and disable IRQs (but not FIQs) by setting CPSR [4:0] to
100112 and CPSR [7to l].
NT
4. Set the PC to 08 and begin executing the instructions there.
10. What is the use of data processing instruction?

A
The ARM data processing instructions are used to modify data values in registers. The operations
that are supported include arithmetic and bit-wise logical combinations of 32-bit data types. One
S.
operand may be shifted or rotated en route to the ALU, allowing, for example, shift and add in a
single instruction
J.
11. Explain about single word and unsigned byte data transfer instruction.
S.
These instructions are the most flexible way to transfer single bytes or words of data between
ARM's registers and memory. Transferring large blocks of data is usually better done using the
multiple register transfer instructions, and recent ARM processors also support instructions for
transferring half-words and signed bytes.
12. Explain about half word and signed byte data transfer.
These instructions are not supported by some early ARM processors. As a result of their late
addition to the architecture they are somewhat 'shoe- horned' into the instruction space as indicated
by the split immediate field.
13. Explain about multiple register transfer instruction.

The ARM multiple register transfer instructions allow any subset (or all) of the 16 registers visible
in the current operating mode to be loaded from or stored to memory. A form of the instruction also
allows the operating system to load or store the user-mode registers to save or restore the user
process state, and another form allows the CPSR to be restored from the SPSR as part of a return
from an exception handler.
14. Explain about the swap instruction.

Swap instructions combine a load and a store of a word or an unsigned byte in a single instruction.
30
15. What are the data types supported by ARM?
• Signed and unsigned characters of at least eight bits.
• Signed and unsigned short integers of at least 16 bits.
• Signed and unsigned integers of at least 16 bits.
• Signed and unsigned long integers of at least 32 bits.
• Floating-point, double and long double floating-point numbers.
• Enumerated types.
• Bit fields.
The ARM C compiler adopts the minimum sizes for each of these types except the standard integer.
16. Explain about the thumb instruction.

The Thumb instruction set can be incorporated into a 3-stage pipeline ARM processor macro cell
with relatively minor changes to most of the processor logic (the 5-stage pipeline implementations
are trickier). The biggest addition is the Thumb instruction decompressor in the instruction pipeline;
this logic translates a Thumb instruction into its equivalent ARM instruction.
17. Give the properties of thumb instruction.
NY
• The Thumb code requires 70% of the space of the ARM code.
• The Thumb code uses 40% more instructions than the ARM code.
• With 32-bit memory, the ARM code is 40% faster than the Thumb code.
O
• With 16-bit memory, the Thumb code is 45% faster than the ARM code.
• Thumb code uses 30% less external memory power than ARM code.
NT
18. What is the application of thumb instruction.
• A high-end 32-bit ARM system may use Thumb code for certain non-critical routines to save
A
power or memory requirements.

• A low-end 16-bit system may have a small amount of on-chip 32-bit RAM for critical routines
S.
running ARM code, but use off-chip Thumb code for all non-critical routines.
J.
S.
***********************ALL THE BEST**********************

31

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MICROCONTROLLER & RISC ARCHITECTURES

· 64 kb external data memory address space

· 4 numbers of 8 bit parallel ports.

2. Difference between microprocessor and microcontroller.

S.NO Microprocessor Microcontroller

It has many instructions to It has one or two instructions to

3. Access times for memory and Less access time required.

4. Microprocessor based system is Less flexible in design point of

S.J.S.ANTO NY. ITC, B.E, M.B.A., ECE/JKKNCET

5. Less no of pins are multi More no of pins are

4. Difference between RR A and RRC A instructions in 8051

5. Show the format of PSW register of 8051

6. What are the functions of DPTR register?

7. List the interrupt structures of 8051.

8. List the instruction sets of 8051.

S.J.S.ANTO NY. ITC, B.E, M.B.A., ECE/JKKNCET

10. What are the operating modes of the timer of 8051?

11. List the interrupts of 8051 microcontroller.

13. What are the register banks in 8051?

14. How stack is imple mented in 8051?

15. Explain the inte rrupts of 8051 microcontroller.

• External interrupt 0 : IE0 : 0003H

S.J.S.ANTO NY. ITC, B.E, M.B.A., ECE/JKKNCET

• External interrupt 1 : IE1 : 0013H

• Timer Interrupt 1 : TF1 : 001BH

Receive interrupt : RI : 0023H

Trans mit interrupt: TI : 0023H

16. Define stack.

Stack is a sequence of RAM memory locations defined by the Programmer.

17. What is program counter? How it will be useful in program execution?

S.J.S.ANTO NY. ITC, B.E, M.B.A., ECE/JKKNCET

6. What are the vectored interrupt sources of 8051?

8051 supports five vectored interrupt sources. They are

7. Time rs and counters – 8051:

9. Where serial communication is used and what is its advantage?

S.J.S.ANTO NY. ITC, B.E, M.B.A., ECE/JKKNCET

11)Give an example for 8-bit & 16-bit micro controlle rs.

12) Write some of the features of 8051.

13) Write about s pecial function registers (SFRS).

14) What are the program control statements available in 8051?

15) What are the registers available in 8051?

· General purpose registers

Mode Transmission format Baud Rate

S.J.S.ANTO NY. ITC, B.E, M.B.A., ECE/JKKNCET

18) Features of 8051microcontroller.

19)Difference between microprocessor and microcontrolle r.

4. Microprocessor based system Less flexible in design

is more flexible in design point of view.

5. Less no of pins are multi More no of pins are

21) Difference between RR A and RRC A instructions in 8051

23) What are the functions of DPTR register?

· List the interrupt structures of 8051.

· List the instruction sets of 8051.

· List the addressing modes supported by 8051.

· What are the operating modes of the timer of 8051?

· List the interrupts of 8051 microcontroller.

· What are the dedicated address pointers in 8051?

S.J.S.ANTO NY. ITC, B.E, M.B.A., ECE/JKKNCET

· What are the register banks in 8051?

· How stack is imple mented in 8051.

32. Explain the inte rrupts of 8051 microcontroller.

• External interrupt 0 : IE0 O : 0003H

• External interrupt 1 : IE1 : 0013H

Micro Controller & Risc Architectures

Micro Controller & Risc Architectures

THE END

• Time to execute an instruction=C 12 T=C 12 1/F.