Novel Design Of Soft Switching For Multi-Level Inverters
V.Suresh, M.Ramasamy
PG Scholar, Assistant Professor
Department of Electrical and Electronics Engineering,
K.S.R College Of Engineering,
Tiruchengode, India
Abstract — A modular soft-switching scheme is proposed
for three-level inverters. The mirror symmetrical pair of
resonant link modules is key for soft switching of three-
level inverters. The dc-link voltages are pinched to a
neutral point when PWM pattern changes. The circuit is
also designed as an optional module that can be attached
to a standard inverter bridge and converted into a soft-
switched inverter.
Index Terms—Mirror symmetrical pair of dc-link resonant
circuits, negative-bus auxiliary resonant circuit (NBARC),
positive-bus auxiliary resonant circuit (PBARC), pinched
link zero-voltage switching (ZVS).
I. INTRODUCTION
Soft switching techniques have been proposed in
recent years for power converters to achieve high switching
frequency, low switching losses and improved electromagnetic
compatibility [1-7]. An early proposed resonant circuit [1],[2]
has only passive power components of inductors and
capacitors on dc-link, but it provides high voltage stresses on
inverter’s switching power devices. It also lacks
synchronization with discrete pulse-width modulation (PWM).
Quasi-resonant circuits [2]-[5], [10], such as the active
clamped resonant (ACR) dc-link circuit, use additional active
clamping switches and capacitors, thus being able to
synchronize dc-link resonance with the inverter’s PWM
operation and meeting the requirement of a system’s
modulation. However, their peak dc-link voltage is still high,
i.e., 1.5 ~ 1.8 times of nominal bus voltage. An auxiliary
resonant- commutated pole (ARCP) circuit [6] can minimize
the device voltage stresses through placing two auxiliary
switches in series with a resonant inductor at each inverter
phase pole. The downside of this circuit is it requires six
auxiliary power switches for a three-phase inverter bridge and
complicated control logic. In this paper, we propose a mirror -
symmetrical resonant circuit modules for zero-voltage
switching (ZVS) of three level inverters [9]. Moreover, new
resonant circuits can be designed as optional modules for a
standard inverter product unit. By attaching such a resonant
module on the dc-link, the conventional hard-switched
inverter can be converted to a ZVS inverter
II. SOFT-SWITCHING TOPOLOGY
The proposed pinched-link soft-switching circuit is
shown in Fig. 1. The three-level inverter is fed from a diode
bridge or a controlled rectifier bridge. The original dc-link of
the hard-switched inverter consists of large electrolytic
capacitor banks. Two quasi resonant circuit banks form a
mirror-symmetric module in the dc-link, where one circuit
bank is at the positive bus rail and another is at the negative
bus rail, as shown in the shaded blocks. Further in Fig. 1, SCl
and SC2 are the clamping switches. When they are in the on-
state, both positive and negative bus are clamped at the full
dc-link voltage levels, that is the normal steady state
operation. In a commutation period, SCl and SC2 are in their
off-state and release the inverter buses from the dc-link
capacitor banks. This frees the voltages on the inverter input-
terminals, P and M, to descend to zero for a soft-switched
transient. While is the second auxiliary switch Sa1 and Sa2 that
activates or deactivates the resonance circuit by controlling the
starting and ending time point of the resonance. Cr1 and Cr2 are
resonant capacitors, and their values are very small. These
capacitors, along with the inductors and auxiliary switches,
form the dc-link soft switching module as shown in Fig. 1.
The values of the resonant capacitors and inductors in each
bank are the same, i.e., Crl=Cr2 and L1=L2.
Since the upper and lower resonant banks are
complementary, they work with the same operating principle
and share a commonly designed circuit with minor connection
changes. When a commutation is required, the upper resonant
bank brings the positive bus voltage down to the neutral and
the lower resonant bank brings the negative bus voltage up to
the neutral, thus pinching the entire dc bus voltage at the input
terminals of the main inverter bridge to zero. This creates a
transient at zero voltage or very low voltage during which a
soft switching can be achieved for the main switching devices,
T1-T12.
An equivalent circuit of the lower soft-commutation
bank is given in Fig. 2 (a) for an analysis of the resonant
transient. Figure 2 (b) shows the waveforms of the negative
bus voltage and resonant current. In the figure, the
commutation current, Io2, is assumed zero. The peak resonant
current, Ap, and one half resonant period, T0, are defined as
(1)
(2)
 Device A B C1 C2 D E
Sc On Off Off Off Off On
Sa Off On On Off Off Off
Dc DOC Off Off Off Off DOC
Da Off Off Off On On Off

DOC: Depend on the current direction in motoring or

regeneration.

Fig. 2. Equivalent circuit and resonant waveforms of the

lower soft switched bank.

A. Operating Modes and Equivalent Circuit Analysis

The soft-commutation stages are shown in Fig. 3.

Fig. 1. Circuit diagram of a pinched-link soft-switched
The resonant current flowing in -the different paths has been
three-level inverter
indicated in each stage.

Stage A: The resonant capacitor, Cr2, has been charged up to

one-half of the normal bus voltage. The clamping switch, Sc2,
is in the on-state, and the negative bus voltage is clamped to
the capacitor's level, which is equal to –Vdc/2.

Stage B: The clamping switch, Sc2, turns off so that the

negative bus terminal is released from the capacitor bank. By
turning on the auxiliary switch, Sa2, a resonant path is formed
with Lr2 and Cr2. The energy stored in Cr2 is transferred to the
large capacitor bank through the inductor, and the voltage
across Cr2, is decreasing. The peak resonant current and
resonant period are defined in (1) and (2).

a) Equivalent circuit for analysis of resonant transient Stage C: At t=To, the end of one-half resonant cycle, the
voltage across Cr2 has been discharged to zero. Any excess
current in the inductor will flow through the anti parallel
diodes of the inverter switches, as the voltage remains at zero.
During this time, the negative bus, V m, is in the same potential
as the neutral line. If the positive bus has also swung to the
neutral line at that time, all the inverter switches will
experience zero crossing-voltage, and they are ready to safely
turn on and off according to the new PWM gating patterns.

Stage D: As the inductor current reverses, the anti parallel

diode of the auxiliary switch, Da2, will conduct and provide a
path to charge Cr2. As a result, another resonance occurs
between Lr2 and Cr2, with an opposite direction current. The
resonant energy is being transferred back to Cr2.

b). Negative bus voltage and resonant current.
Stage E: When the voltage across Cr2 reaches its peak value,
the clamping switch, Sc2, is turned on at zero voltage, and the
negative bus is clamped to the capacitor bank again. Thus, the
entire soft switching is completed. The circuit returns back to
the steady state as shown in Stage A, and is ready for the next
switching period
 A. Key Features of modular soft-switching Circuit

Key features of the modular soft-switching circuit topology

are summarized as follows.
• No main power flows through the auxiliary resonant devices
in contrary with the ACR topology, thus requiring less current
ratings and thermal management.
• Use four auxiliary switches and two set of components
instead of six auxiliary switches and three sets of components
compared with the ARCP topology.
• Voltage rating of the clamping switch, Sc1 and Sc2, is the
same as the dc-link voltage.
• Voltage stress of the auxiliary switch, Sa1 and Sa2, is rated
one half of the dc-link voltage.
• Zero voltage turn-on for the inverter switches and clamping
switch, Sc1 and Sc2.
• Zero current turn-off for the auxiliary switch, Sa1 and Sa2.
• No requirement for increasing the voltage and current ratings
of inverter’s main power devices.
• Circuit can be applied to an existing hard-switched inverter
as an optional add-on module.

III. CONTROL AND SYNCHRONIZATION FOR PWM

PATTERN

A block diagram of electronic control circuit for the

proposed modular soft-switch circuit is shown in Fig. 4(a).
The control circuit receives incoming PWM patterns generated
by a microprocessor or DSP based regular PWM controller
using space-voltage modulation approach.
The incoming PWM pattern, for a three-phase bridge
is also given to control block as shown in Fig. 4(a) and 4(b)
shows the three phase three level inverter. Fig. 5 presents the
PWM pattern changes and the control signals which activate
the resonant circuit in the dc-link to achieve ZVS
commutation. The detection of the new PWM pattern is
accomplished by performing the exclusive operation. A
positive result of such an exclusive or operation produces
control signal which activate the resonant circuit

(a)

Fig. 3. Resonance stages for soft-switching

 (b)

Fig 4. (a) Block diagram of ZVS control. (b) Three-phase

three level inverter

Fig. 6. Equivalent circuit and waveform of pinched dc-link

using mirror resonant circuit pair of PBARC and NBARC.
(a) Equivalent circuit of pinched-link stage for three-level
inverter. (b) Voltage waveforms of positive and negative
bus during pitched mirror resonant transient.
.

Fig. 5. logic waveforms, and control signals derived from

PWM pattern

IV. SIMULATION RESULTS

Simulation work has been done in MATLAB to

verify the operation principle of the proposed soft-switching
scheme. In our initial simulation, the dc supply voltage is
given at 220 V, 50 Hz. The resonant parameters are Crl= Cr2=
0.094µF. and Lrl= Lr2= 10µH. The design parameters are
suitable for higher voltage ratings.
Fig. 6 shows the transient waveforms of the positive and
negative bus voltages in a three-level inverter. The inverter
bus voltages are pinched to zero or nearly zero by mirror-
symmetrical resonant modules. At the moment Vpm=0, the
inverter main switches can triggered at reduced voltage
stresses. In the simulation, the synchronization controls are
employed by triggering PBARC and NBARC in a proper
sequence and delay time to force the positive and negative bus Fig.7. Gate pulse of Sc1, Sc2 and Sa1, Sa2.
voltages to reach the neutral point at the same time.

Fig. 8. Bus voltages and resonant currents at soft switching
transient under light load current.
Fig. 9. Inverter output voltage
Fig. 10.Inverter output voltage and Bus voltages at soft
commutation transient under light load current.
V. CONCLUSION
This paper presents a modular soft-switching topology for
three-level inverters. The positive and negative bus voltages
can be pinched to the neutral potential point so that the main
switching devices can turn on and off under zero voltage
condition. The main advantages of the proposed topology are
fewer components in the auxiliary resonant circuit which is
located at dc link, modularity design, and the main devices
have the same voltage and current ratings of as a conventional
inverter. The control logic and operating principle have been
verified by simulation in MATLAB. The resonant-link
modules can be designed and implemented as an optional
module to a standard inverter bridge to achieve ZVS.
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