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II. PARASITIC MODEL OF BOOST CONVERTER
2
COMPONENTS L 1 p a r a s i t i Dc 5 p a r a s i t i c
1 2 1 2 1 2
Fig 1 shows the simulation circuit in PSPICE for Boost
PFC. Diodes used here are MUR140; the input is ac 220V, D 1 D 3
50 Hz. The MOSFET used here is IRPF450.The gate driving M 1
p a r a s i t i c
3
V 1 2 0 C 1
i.e., MOSFET is turned ON, resulting in an increase in the
inductor current; thereby energy is stored in the inductor.In 2
1
the Off-state, i.e., MOSFET is turned OFF, and the only path p a r a s i t i c
D 1 1
The hardware implementation of the converter is far
L 1
1 2 more complex than its schematic. For the purpose of
3 2 0 u conducted EMI modeling the circuit diagram must be
M U R 1 4 0
V+
converted into a far more complex and detailed simulation
D 6 D 7
circuit that can cover the essential EMI characteristics of the
M U MR U1 4R 0 1 4 0
real hardware up to 30MHz. (F.C.Lee, W.G.Odendaal -2004)
C 1
6 . 8 k
6 7 .5 k L 5
L 1R L 2 1 L 8 L 6 L D 7 1 5 2
12 12 12 12 12
6 5 n
3 .8 u R 6
3 70 5 u.0 4 4 1 1 9 9 .5 n n1 M4 . U1 Rn 1 4 0
DD 31 L 1 2
L 1 7 C1 2 2 R 1 17 5 0 m
12 M M U U R R 1 1 4 4 0 0
9 1p . 2 u
R 1 1 13 L0 15 0m
5 0 u
C 1 C 2 1 2 1C 1 5 R 8 RV 2 + 1 0
Fig 7. LISN model 3 L 14 0 . 6 n
1 0 u 0 .1 u L 1 1 M 4 12 6 . 1 2 5 m 0
1 1 .1 8 p
III PREDICTION OF R 1CONDUCTED
R4 1 4 1 12 R R EMI 8 8 9 1 .9 6 n IN BOOST PFC
M 3 L 32 2
5 5 0 CIRCUIT 4 7 . 6 n 2 3 6 0 .2 5 m m V -
C I R 1 C F 1 1 P 1 0 4 5 C0 1 4
Figure 8 shows the detailed L simulation 1 5 7 2 n circuit, considering
all the parasitic parameters. V V 2 1 1= 2 I 1 R 20 F 2 P . 2 7 2 4 L p .7 L 5 3 p 3 0 1 C 2 8 7 9 u
Input is 220V ac supply with V 2 = 0a0 frequency 0 of 50 Hz. The
2 6 n
diodes used in the simulation T D are = R 0 1 MUR140.The 2 7 9 n .9 2 0 6 .9 n 2 n inductor and
the capacitor is considered
V 1 withT R = parasitic 0 . 0 1 u C models. 9 2
The MOSFET circuit V O 0 F used F = 0 T in F = the 0 9 .0 1 simulationu is IRPF450.the
V A M P L = P 2 2W 0 = 5 u 2 2 1 2 5 . 9 n
gate drain parasitic F parameters
R E Q = D D5 40 P 2 E R = L 1 1 0 3 u C C 9 9 1
also modeled. The gate drive
circuit used here is a square pulse1 2generator with a frequency Fig 9. FFT of EMI spectra in log scale
of 100 KHz R 1R 5 1 M 5M U 1U R R 1 1 4 4 0 0 1 0 2 .9 5 .9 2 n n From the simulation output, the maximum
3 9 . 5 n
frequency at which the maximum conducted EMI is
5 5 0
predicted as 10 KHZ and the maximum voltage is about
1 11.093 mV. But this is not matches exactly with the
C L 1 1C 8 3 1 3 1
12 L 9 measured results (F.C.Lee, W.G.Odendaal -2004), because of
1 0 u 0 .1 u the variation in the MOSFET model.
5 0 u
R 98 . 5 n The conducted EMI is reduced using EMI filters.
R L 11 36 L 1 4 L 1 9 The following chapter explains power line filter
1 2 1 21 0 0 0 k 12
2
0 . 9 1 .9 n 2 . 07 n 1 0 . 9 n
4
V CONCLUSION
Table I shows the comparison of the predicted EMI
without EMI filter and with EMI filter for the five
configurations simulated in the previous sections.