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Motorola Sensor
Motorola, Inc. 1997 Device Data 1
AN1525
SENSOR’S FULL–SCALE
VOLTAGE SPAN
ZERO PRESSURE
OFFSET VOLTAGE
Figure 1. Positioning the Sensor’s Full–Scale Span within the A/D’s or Amplifier’s Dynamic Range
A similar requirement that warrants the use of a dc level THE TWO OP–AMP GAIN STAGE
shift is the prevention of the pressure sensor’s voltage from TRANSFER FUNCTION
extending into the saturation regions of the operational
The transfer function of the two op–amp signal–conditioning
amplifiers. This also would cause a nonlinearity in the sensor
stage, shown in Figure 2, can be determined using nodal
output measurements. For example, if an op–amp powered
analysis at nodes 1 and 2. The analysis can be simplified by
with a single–ended 5 V supply saturates near the low rail of
calculating the transfer function for each of the signals with the
the supply at 0.2 V, a positive dc level shift may be required
other two signals grounded (set to zero), and then employing
to position the zero pressure offset voltage at or above 0.2 V. superposition to realize the overall transfer function. As shown
Likewise, if the same op–amp saturates near the high rail of in Figure 2, VIN2 and VIN1 are the differential amplifier input
the supply at 4.8 V, a negative dc level shift may be required signals (with VIN2 > VIN1), and VREF is the positive dc level
to position the full–scale pressure voltage at or below 4.8 V. adjust point. For a sensor with a small zero pressure offset
It should be obvious that if the gain of the amplifiers is too and operational amplifiers powered from a single–ended
large, the span may be too large to be positioned within the supply, it may be necessary to add a positive dc level shift to
4.6 V window (regardless of ability to level shift dc offset). In keep the operational amplifiers from saturating near zero
such a case, the gain must be decreased to reduce the span. volts.
VCC
NODE 1 R2
R4
R1 NODE 2
VREF U1
VIN1 VO
R3
VO′ U1
VIN2
ǒ Ǔ
R4 R1
=
results, Equation (3) is established: R3 R2
)1
ǒ Ǔ
R2 R3 Through this simplification, Equation (7) simplifies to
VIN1 = – VO(3)
R1 R4
ǒ Ǔ
)1
R4
Solving for VO yields VO = ( S+ – S–) + VREF (8)
R3
)1
R 4 R2 By examining Equation (8), the differential gain of the
VO1 = – VIN1 (4)
R 3 R1 signal– conditioning stage is:
ǒ Ǔ
To determine the transfer function for VIN2, VIN1 and VREF G= +1 (9)
R3
are grounded, and a similar analysis is used, yielding
Also, since the differential voltage between S+ and S– is the
ǒ Ǔ
)1
R4 pressure sensor’s actual differential output voltage
VO2 = VIN2 (5) (VSENSOR), the following equation is obtained for VO:
R3
)1
where VO2 represents the part of VO that VIN2 contributes. R4
Finally, to calculate the transfer function between VO and VO = VSENSOR + VREF (10)
R3
VREF, VIN1 and VIN2 are grounded to obtain the following
transfer function: Finally, the term VREF is the positive offset voltage added to
R 4R 2 the amplified sensor output voltage. VREF can only be positive
VOREF = VREF (6) when using a positive single–ended supply. This offset (dc
R 3R 1 level shift) allows the user to adjust the absolute range that the
where VOREF represents the part of VO that VREF sensor voltage spans. For example, if the gain established by
contributes. R4 and R3 creates a span of four volts and this signal swing
Using superposition for the contributions of VIN1, VIN2, and is superimposed upon a dc level shift (offset) of 0.5 volts, then
VREF gives the overall transfer function for the signal– a signal range from 0.5 V to 4.5 V results.
conditioning stage. VREF is typically adjusted by a resistor divider as shown in
ǒ Ǔ ǒ Ǔ
Figure 3. A few design constraints are required when
VO = VO1 + VO2 + VOREF designing the resistor divider to set the voltage at VREF.
• To establish a stable positive dc level shift (VREF), VCC
)1 )1
R4 R2 R4 should be regulated; otherwise, VREF will vary as VCC va-
VO = – VIN1 + VIN2
R3 R1 R3 ries.
R 4R 2 • When “looking” into the resistor divider from R1, the effec-
+ VREF (7) tive resistance of the parallel combination of the resistors,
R 3R 1
RREF1 and RREF2, should be at least an order of magni-
Equation (7) is the general transfer function for the tude smaller than R1’s resistance. If the resistance of the
signal–conditioning stage. However, the general form is not parallel combination is not small in comparison to R1, R1’s
only cumbersome, but also if no care is taken to match certain value will be significantly affected by the parallel combina-
resistance ratios, poor common mode rejection results. A tion’s resistance. This effect on R1 will consequently affect
simplified form of this equation that provides good common the amplifier’s gain and reduce the common mode rejec-
mode rejection is shown in the next section. tion.
R1 R 2 = R3
VREF
ǒ Ǔ
TO U1 Defining the voltage differential between VIN2 and VIN1 as
VSENSOR, the simplified transfer function is
) 2R 4)1
RREF2 R4
VO = (VSENSOR) + VREF (12)
R3 R
G
Thus, the gain is
Figure 3. A Resistor Divider to Create VREF R4 2R 4
G= + +1 (13)
R3 R
G
THE TWO OP–AMP GAIN STAGE WITH and VREF is the positive dc level shift (offset).
VARIABLE GAIN
Use the following guidelines when determining the value for
Varying the gain of the two op–amp stage is desirable for RG :
fine–tuning the sensor’s signal–conditioned output span.
• By examining the gain equation, RG’s resistance should
However, to adjust the gain in the two op–amp gain circuit in
be comparable to R4’s resistance. This will allow fine tun-
Figure 2 and to simultaneously preserve the common mode
ing of the gain established by R4 and R3. If RG is too large
rejection, two resistors must be adjusted. To adjust the gain,
(e.g., RG approaches ∞), it will have a negligible effect on
it is more desirable to change one resistor. By adding an
the gain. If RG is too small (e.g., RG approaches zero), the
additional feedback resistor, RG, the gain can be adjusted with
RG term will dominate the gain expression, thus prohibit-
this one resistor while preserving the common mode rejection.
ing fine adjustment of the gain established via the ratio of
Figure 4 shows the two op–amp gain stage with the added
R4 and R3.
resistor, RG.
• Use a potentiometer for RG that has a resistance range on
the order of R4 (perhaps with a maximum resistance equal
RG VCC to the value of R4). If a fixed resistor is preferable to a poten-
tiometer, use the potentiometer to adjust the gain, measure
R2 the potentiometer’s resistance, and replace the potentiom-
NODE 1 R4
NODE 2
eter with the closest 1% resistor value.
R1
VREF U1 • To maintain good common mode rejection while varying
VIN1 R3
VO the gain, RG should be the only resistor that is varied. RG
VO′
U1 equally modifies both of the resistor ratios which need to be
VIN2 well–matched for good common mode rejection, thus pre-
serving the common mode rejection.
Figure 4. Two Operational–Amplifier Gain Stage with THE TWO OP–AMP GAIN STAGE WITH VARIABLE
Variable Gain GAIN AND NEGATIVE DC LEVEL SHIFT
As with the two op–amp gain stage, nodal analysis and The last two op–amp circuits both incorporate positive dc
ǒ Ǔ
superposition are used to derive the general transfer function level shift capability. Recall that a positive dc level shift is
for the variable gain stage. required to keep the operational amplifiers from saturating
near the low rail of the supply or to keep the zero pressure
ǒ Ǔ
) RR4 ) RR2RR4 ) 1
R4 offset above (or equal to) the low reference voltage of an A/D.
VO = VIN2 This two op–amp stage incorporates an additional resistor,
R3 3 G
G ROFF, to provide a negative dc level shift. A negative dc level
ǒ Ǔ
–
R4
R3
) RR4 ) R R ) RR2RR4
R 2R 4
VIN1
shift is useful when the zero pressure offset voltage of the
sensor is too high. In this case, the user may be required to
G 3 G 1 3 level shift the zero pressure offset voltage down (toward zero
R 2R 4 volts). Now, for a specified amount of gain, the full–scale
+ VREF (11) pressure output voltage does not saturate the amplifier at the
R 1R 3
high rail of the voltage supply, nor is it greater than the A/D’s
This general transfer function also is quite cumbersome high reference voltage. Figure 5 shows the schematic for this
and is susceptible to producing poor common mode rejection amplifier circuit.
ROFF
RG
NODE 1 R2
R4
R1 NODE 2
VREF U1
VIN1 VO
R3
VO′ U1
VIN2
Figure 5. Two Op–Amp Signal–Conditioning Stage with Variable Gain and Negative Dc Level Shift Adjust
To derive the general transfer function, nodal analysis and • To establish a stable negative dc level shift, VCC should be
ǒ Ǔ
superposition are used: regulated; otherwise, the amount of negative level shift will
vary as VCC varies.
• ROFF should be the only resistor varied to adjust the
ǒ Ǔ
VO =
R4
R3
) RR4 ) RR2RR4 ) 1 VIN2 negative level shift. Varying R4 will change the gain of the
two op–amp circuit and reduce the common mode rejec-
G 3 G
tion.
ǒ Ǔ
–
R4
R3
) RR4 ) R R ) RR2RR4
R 2R 4
VIN1 • To determine the value of ROFF:
G 1 3 3 G 1. Determine the amount of negative dc level shifting re-
R 2R 4 R4 quired (defined here as V–shift).
+ VREF + (VIN2 – VCC) (14) 2. R4 already should have been determined to set the gain
R 1R 3 R
OFF for the desired signal–conditioned sensor output.
3. Although V–shift is dependent on S+, S+ changes only
As before, defining the sensor’s differential output as slightly over the entire pressure range. With Motorola’s
VSENSOR, defining VIN2 as S+ for pressure sensor MPX10 powered at a 5 V supply, S+ will have a value of
applications, and using the simplification that approximately 2.51 V at zero pressure and will increase
as high as 2.53 V at full–scale pressure. This error over
R 1 = R4 the full–scale pressure span of the device is negligible
when considering that many applications use an 8–bit
and A/D converter to segment the pressure range. Using an
R 2 = R3 8–bit A/D, the 20 mV (0.02 V) error corresponds to only
ǒ Ǔ
1 bit of error over the entire pressure range (1 bit / 255
obtains the following simplified transfer function: bits x 100% = 0.4% error).
4. ROFF is then calculated by the following equation:
VO =
R4
R3
) 2R
R
4)1 (VSENSOR) + VREF
S+ – V
G CC R
ROFF = 4 (18)
R4 V
–shift
+ (S+ – VCC) (15)
R
OFF
An alternative to using this equation is to use a
The gain is potentiometer for ROFF that has a resistance range on the
order of R4 (perhaps 1 to 5 times the value of R4). Use the
R4 2R 4 potentiometer to fine tune the negative dc level shift, while
G= + +1 (16)
R3 R monitoring the zero pressure offset output voltage, VO. As
G
before, if a fixed resistor is preferable, then measure the
To adjust the gain, refer to the guidelines presented in the potentiometer’s resistance and replace the potentiometer
section on Two Op–Amp Gain Stage with Variable Gain. with the closest 1% resistor value.
VREF is the positive dc level shift, and the negative dc level
shift is: Important note: The common mode rejection of this amplifier
topology will be low and perhaps unacceptable in some
R4 applications. (A SPICE model of this amplifier topology
V–shift = (S+ – VCC) (17) showed the common mode rejection to be 28 dB.) However,
R
OFF this circuit is presented as a solution for applications where
The following guidelines will help design the circuitry for the only two operational amplifiers are available and the common
negative dc voltage level shift: mode rejection is not critical when considering the required
ƪ ƫ ƪǒ
FOR NEGATIVE DC LEVEL SHIFTING
Ǔǒ
Defining the voltage differential between VIN2 and VIN1 as
VSENSOR , the simplified transfer function is
This circuit adds a third op–amp to the output of the two
op–amp gain block (see Figure 6). This op–amp has a dual
function in the overall amplifier circuit:
• Its non–inverting configuration provides gain via the ratio
VO = 1 ) RR6
5
R4
R3
) 2R
R
4)1
G
V
SENSOR
Ǔ
of R6 and R5.
• It has negative dc voltage level shifting capability typically R6
created by a resistor divider at V–shift, as discussed in the + VREF – V (20)
R 5 –shift
ƪ ƫƪ ƫ
section on Application to Pressure Sensor Circuits. Al-
though this configuration requires a third op–amp for the The gain is
negative dc level shift, it has no intrinsic error nor low com-
mon mode rejection associated with the negative level shift
(as does the previous two op–amp stage). Depending on G= 1 ) RR6 R4
R3
) 2R
R
4)1 (21)
5 G
the application’s accuracy requirement, this may be a more
desirable configuration for providing the negative dc level VREF is the positive dc level shift (offset), and V–shift is the
shift. negative dc level shift.
RG VCC
R5 R6
V–SHIFT
R2
R4
R1
VREF U1 U1
VIN1 VO
R3
VO′ U1
VO″
VIN2
Figure 6. Three Op–Amp Gain Stage with Variable Gain and Negative Dc Level Shift
The transfer function for this stage will be similar to the The preceding simplifications have been performed in the
chosen two op–amp gain stage configuration (either the fixed previous sections, but by examining Equation 20, notice that
gain with positive dc level shift circuit or the variable gain with the third op–amp’s gain term also amplifies the positive and
positive dc level shift circuit) with additional terms for the negative dc voltage level shifts, VREF and V–shift. If R6 and R5
negative level shift and gain. As an example, the variable–gain are chosen to make an arbitrary contribution to the overall
two op–amp gain circuit is used here. All of the design system gain, designing an appropriate amount of positive and
ƪ ǒ Ǔǒ ƫ
considerations and explanations for the variable gain two negative dc level shift can be difficult. To simplify the transfer
op–amp circuit apply. function, set R5 = R6, and the following equation for VO results:
ƪ ƫ ƪǒ Ǔ
The transfer function may be derived with nodal analysis
and superposition.
)R R6 R4
)R )RR4 R 2R 4
)1
VO = 2
R4
) 2R 4)1 V
SENSOR
Ǔ) V
REF
ǒ Ǔ
R3 R
VO = 1 VIN2 G
5 R3 3R G
G
ǒ Ǔ ƫ
–
R4
R3
) RR4 ) RR2RR4 ) RR2RR4 VIN1 – V –shift (22)
G 3 G 1 3
R 2R 4 R6 Now the third op–amp’s contribution to the overall system
+ V – V–shift (19) gain is a factor of two. When designing the overall system gain
R 1R 3 REF R5
and the positive dc level shift, use the following guidelines:
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8 ◊ AN1525/D
Motorola Sensor Device Data