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Received 19 June 2009; received in revised form 13 December 2009; accepted 3 January 2010
Available online 21 February 2010
Abstract
This paper presents a high-efficiency grid-connected photovoltaic (PV) module integrated converter (MIC) system with reduced PV
current variation. The proposed PV MIC system consists of a high-efficiency step-up DC–DC converter and a single-phase full-bridge
DC–AC inverter. An active-clamping flyback converter with a voltage-doubler rectifier is proposed for the step-up DC–DC converter.
The proposed step-up DC–DC converter reduces the switching losses by eliminating the reverse-recovery current of the output rectifying
diodes. To reduce the PV current variation introduced by the grid-connected inverter, a PV current variation reduction method is also
suggested. The suggested PV current variation reduction method reduces the PV current variation without any additional components.
Moreover, for centralized power control of distributed PV MIC systems, a PV power control scheme with both a central control level and
a local control level is presented. The central PV power control level controls the whole power production by sending out reference power
signals to each individual PV MIC system. The proposed step-up DC–DC converter achieves a high-efficiency of 97.5% at 260 W output
power to generate the DC-link voltage of 350 V from the PV voltage of 36.1 V. The PV MIC system including the DC–DC converter and
the DC–AC inverter achieves a high-efficiency of 95% with the PV current ripple less than 3% variation of the rated PV current.
Ó 2010 Elsevier Ltd. All rights reserved.
Keywords: Photovoltaic (PV); Module integrated converter (MIC); Step-up DC–DC converter; Full-bridge inverter; High-efficiency
0038-092X/$ - see front matter Ó 2010 Elsevier Ltd. All rights reserved.
doi:10.1016/j.solener.2010.01.004
W.-Y. Choi, Jih-Sheng (Jason) Lai / Solar Energy 84 (2010) 636–649 637
output of the DC–DC converter should be about 350 V. As shown in Fig. 1, since the DC–AC inverter injects the
Thus, a step-up DC–DC converter with a high voltage gain active power into a single-phase grid, the power variation
should be required in order to boost the low PV module at double grid-frequency is superimposed to the DC-link
voltage into high DC-link voltage. Up to now, various voltage. Thus, the DC-link voltage variation occurs, which
step-up DC–DC converters have been studied for PV introduces the PV current variation (Casadei et al., 2006).
MIC system applications. As a current-fed step-up DC– Because the PV current variation decreases the MPPT effi-
DC converter, the current-fed two-inductor boost convert- ciency, the PV current variation should be as small as pos-
ers (Li and Wolfs, 2006, 2007) ware proposed. The conduc- sible in order to maximize the power extracted from the PV
tion losses of the power switches at the PV module side are module. The PV current variation can be reduced through
reduced by using two input inductors. However, current- the addition of the electrolytic capacitor to the input side of
fed two-inductor boost converters are difficult to imple- the step-up DC–DC converter (Schenck et al., 2005). Also,
ment in the PV MIC system. This is predominantly due a large DC-link capacitor can be used to reduce the PV cur-
to the large inductor size required to meet the high output rent variation (Brekken et al., 2002). However, the addition
current of the PV module, which increases the overall size of the electrolytic capacitor (Schenck et al., 2005) or the
and cost of the PV MIC system. To reduce the size and cost large DC-link capacitor (Brekken et al., 2002) increases
of the PV MIC system, the flyback converter has been uti- the overall size and cost of the PV MIC system. As different
lized for the step-up DC–DC converter (Martins and alternatives, the active ripple compensation methods with
Demonti, 2002). As a simple power circuit topology, the external DC–DC converter have been suggested: a ripple
flyback converter is suitable for a wide voltage variation power port (Krein and Balog, 2009), an active power filter
of the PV module. However, the conventional flyback (Mazumder et al., 2007), and a DC power smoothing cir-
converter suffers from high switching losses of the power cuit (Shimizu et al., 2002). However, all these methods
switches. To reduce the switching losses, the active-clamp- require additional power conversion circuits, which
ing flyback converters (Boeke et al., 2006; Tseng et al., increase the manufacturing cost and decrease the power
2007) have been studied. The active-clamping flyback con- conversion efficiency of the PV MIC system.
verters reduce the switching losses by clamping the volt- To cope with all these problems, this paper presents a
age stress of the power switches. However, the output high-efficiency grid-connected PV MIC system with
rectifying diode in the active-clamping flyback converter reduced PV current variation. For a high-efficiency step-
still has the reverse-recovery problems. The output rectify- up DC–DC converter, an active-clamping flyback con-
ing diode operating in high DC-link voltage produces verter with a voltage-doubler rectifier is proposed. As
large reverse-recovery current during its turn-off instant shown in Fig. 2, a boost type of active-clamping circuit is
(Karadzinov and Hamill, 2000). The diode reverse-recov- used at the PV module side. At the DC-link voltage side,
ery current causes a significant increase of the switching a voltage-doubler rectifier using one resonant capacitor is
losses at the output rectifying diode, including a large used. The voltage-doubler rectifier provides a series-reso-
amount of electromagnetic interference (EMI) noises nant circuit consisting of the transformer leakage inductor
and additional thermal management problems in the PV and the resonant capacitor. Zero-current switching of the
MIC system. output rectifying diodes is achieved (Choi et al., 2007),
638 W.-Y. Choi, Jih-Sheng (Jason) Lai / Solar Energy 84 (2010) 636–649
which can effectively eliminate the reverse-recovery current inverter (S3 S6, Lo) is controlled to supply the electrical
of the output rectifying diodes. In order to reduce the PV power to the grid with a unity power factor, performing
current variation, a practical PV current variation reduc- the MPPT function (Kim, 2007). The switches S3 S6 are
tion method is also suggested. By adding the PV current the insulated gate bipolar transistors (IGBTs).
variation cancellation duty ratio to the control duty ratio
of the proposed step-up DC–DC converter, the low fre- 3. Step-up DC–DC converter
quency PV current variation can be reduced without any
additional components. The overall system configuration Fig. 3 shows the simplified circuit model of the proposed
is briefly described. The operation of the proposed step- step-up DC–DC converter, which shows the reference
up DC–DC converter is presented with the PV current var- directions of currents and voltages. The capacitors Cpv
iation reduction control. Moreover, for centralized power and Cc are the input capacitor and clamping capacitor,
control of distributed PV MIC systems, a PV power con- respectively. The capacitor Cd is the DC-link capacitor.
trol scheme with both a central control level and a local The capacitors Cpv, Cc, and Cd are large enough so that
control level is presented. The central PV power control the PV module voltage Vpv, clamping capacitor voltage
level controls the whole power production by sending out Vc, and DC-link capacitor voltage Vd are constant. The
reference power signals to each individual PV MIC system. active-clamping circuit is of boost type so that Vc > Vpv.
The local PV power control level ensures that the reference The diodes DS1 and DS2 are the body diodes of S1 and
power signal from the central control level is reached. S2, respectively. The capacitors CS1 and CS2 are the output
Experimental results based on 260 W prototype of the pro- capacitors of S1 and S2, respectively. The turns ratio n of
posed PV MIC system are discussed. The proposed step-up the transformer T is defined as n = Ns/Np. Lm is the magne-
DC–DC converter achieves an efficiency of 97.5% at 260 W tizing inductor of T at the primary side. Llk is the leakage
power to generate the DC-link voltage of 350 V from the inductor of T at the secondary side. Cr is the resonant
PV voltage of 36.1 V. The overall PV MIC system includ- capacitor in the voltage-doubler rectifier. Do1 and Do2 are
ing the DC–DC converter and the DC–AC inverter the output rectifying diodes. The proposed step-up DC–
achieves a high efficiency of 95% with the PV current ripple DC converter has six operating modes during one switch-
less than 3% variation of the rated PV current. The central- ing period Ts. Fig. 4 shows the corresponding circuit dia-
ized PV power control scheme is also evaluated through gram of the proposed step-up DC–DC converter for each
two sets of proposed PV MIC systems. operating mode. Fig. 5 shows the theoretical waveforms
of the proposed step-up DC–DC converter during Ts.
2. Overall system configuration The duty ratio D is referred to S1 turn-on duty.
Mode 1 [t0, t1]: At t = t0, S1 is turned on. Since
Fig. 2 shows the circuit diagram of the proposed PV MIC vLm = Vpv, the magnetizing inductor current iLm increases
system. The PV MIC system consists of an active-clamping linearly as
flyback converter with a voltage-doubler rectifier and a sin- V pv
gle-phase full-bridge DC–AC inverter. The step-up DC–DC iLm ðtÞ ¼ ip ðt0 Þ þ ðt t0 Þ: ð1Þ
Lm
converter consists of a boost type of an active-clamping cir-
cuit (Cc, S1, S2), a transformer (T), and a voltage-doubler When nVpv is applied across the secondary winding of T,
rectifier (Llk, Cr, Do1, Do2). The switches S1 and S2 are the the output rectifying diode Do1 is turned on. A series-reso-
metal–oxide-semiconductor field effect transistors (MOS- nant circuit consisting of Llk and Cr is formed at the sec-
FETs), which are driven complementarily. The full-bridge ondary side. By the series-resonance between Llk and Cr,
W.-Y. Choi, Jih-Sheng (Jason) Lai / Solar Energy 84 (2010) 636–649 639
the energy stored in the resonant capacitor Cr is transferred nant capacitor Cr by the series-resonance between Llk
to the DC-link capacitor Cd. The angular resonant fre- and Cr. By referring the output rectifying diode current
quency xr of the series-resonant circuit is iDo2 to the primary side, the primary current ip is expressed
as
1
xr ¼ 2pfr ¼ pffiffiffiffiffiffiffiffiffiffiffi ; ð2Þ
Llk C r V pv V c
iP ðtÞ ¼ ip ðt3 Þ þ ðt t3 Þ niDo2;peak sin xr ðt t3 Þ;
Lm
where fr is the resonant frequency. By referring the output
ð5Þ
rectifying diode current iDo1 to the primary side, the pri-
mary current ip is expressed as where iDo2,peak is the peak value of the output rectifying
V pv diode current iDo2.
ip ðtÞ ¼ ip ðt0 Þ þ ðt t0 Þ þ niDo1;peak sin xr ðt t0 Þ; ð3Þ
Lm Mode 5 [t4, t5]: At t = t4, the half-resonant period of the
output rectifying diode current iDo2 is finished. The output
where iDo1,peak is the peak value of the output rectifying rectifying diode current iDo2 is zero before Do2 is turned off.
diode current iDo1. Zero-current switching of Do2 is achieved without any
Mode 2 [t1, t2]: At t = t1, the half-resonant period of the diode reverse-recovery current at the end of Mode 5.
output rectifying diode current iDo1 is finished. The output Mode 6 [t5, t6]: At t = t5, S2 is turned off. The current ip
rectifying diode current iDo1 is zero before Do1 is turned off. discharges CS1 and charges CS2. The voltage vS1 across S1
Zero-current switching of Do1 is achieved without any decreases from the clamping voltage Vc to zero. The time
diode reverse-recovery current at the end of Mode 2. interval during this mode is considered negligible as Mode
Mode 3 [t2, t3]: At t = t2, S1 is turned off. The primary 3. The next switching cycle begins when S1 is turned on
current ip charges CS1 and discharges CS2. The voltage vS1 again.
across S1 increases from zero to the clamping capacitor From the volt-second balance on the primary winding of
voltage Vc. Since the capacitor CS (CS = CS1 = CS2) is very T, the clamping capacitor voltage Vc is obtained as
small, the time interval during this mode is considered neg- Vc = Vpv/(1 D). From the volt-second balance on the sec-
ligible compared to Ts. ondary winding of T, the resonant capacitor voltage VCr is
Mode 4 [t3, t4]: At t = t3, the voltage vS2 across S2 is obtained as VCr = (1 D)Vd. During Ts, the PV module
zero. The voltage vS1 across S1 is clamped at Vc. The pri- power is directly transferred to the DC-link capacitor in
mary current ip begins to flow the body diode DS2 of S2. two steps. The power Pd1 transferred by the first series-res-
S2 is turned on at zero-voltage. Since vLm = (Vc Vpv), onance during Mode 1 is expressed as
the magnetizing inductor current iLm decreases linearly as Z t1
1
V pv V c P d1 ¼ nV pv iDo1;peak sin½xr ðt t0 Þ dt
iLm ðtÞ ¼ ip ðt3 Þ þ ðt t3 Þ: ð4Þ T s t0
Lm
nV pv xs iDo1;peak
When n(Vpv Vc) is applied reversely across the second- ¼ ; ð6Þ
pxr
ary winding of T, the output rectifying diode Do2 is turned
on. The series-resonant circuit consisting of Llk and Cr is where xs is the angular switching frequency as xs = 2pfs,
formed again. The input power is transferred to the reso- and fs is the switching frequency as fs = 1/Ts. The power
640 W.-Y. Choi, Jih-Sheng (Jason) Lai / Solar Energy 84 (2010) 636–649
Fig. 4. Corresponding circuit diagram of the proposed step-up DC–DC converter for each operating mode during Ts.
Pd2 transferred by the second series-resonance during Mode Since the same components using Llk and Cr are used
4 is expressed as for both series-resonant circuits, we assume that iS,peak =
Z t4 iDo1,peak = iDo2,peak. By rearranging (8), we have
1
P d2 ¼ nðV c V pv Þ iDo2;peak sin½xr ðt t3 Þ dt
T s t3 pxr ð1 DÞP d
iS;peak ¼ ð9Þ
nV pv Dxs iDo2;peak nxs V pv
¼ : ð7Þ
pxr ð1 DÞ
The average DC-link current Id during Ts is expressed as
Since the DC-link power Pd is supplied by the sum of Z t1
Pd1 and Pd2 during Ts, we have the following relation: 1
Id ¼ iS;peak sin½xr ðt to Þ dt ð10Þ
T s t0
nV pv xs iDo1;peak nV pv Dxs iDo2;peak
Pd ¼ þ ð8Þ
pxr pxr ð1 DÞ By simplifying (10), we have
W.-Y. Choi, Jih-Sheng (Jason) Lai / Solar Energy 84 (2010) 636–649 641
Fig. 6. Relationship between the PV voltage and the duty ratio to generate the DC-link voltage of 350 V for different turns ratios of T.
From (17)–(19), the instantaneous current iCd of the From (22) and (24), the PV current variation cancella-
DC-link capacitor is expressed as tion duty ratio Dvar is given by
V oI o Dvar ¼ k var V pv I o sin 2xt ð25Þ
iCd ¼ cos 2xt: ð20Þ
Vd
where
From the instantaneous current iCd of the DC-link nV o
capacitor, the instantaneous DC-link voltage vd can be k var ¼ : ð26Þ
2xC d V 3d
obtained as follows:
Z Fig. 7 shows the block diagram of the PV current vari-
1 V oI o
vd ¼ V d þ iCd dt ¼ V d þ sin 2xt: ð21Þ ation reduction controller where Vd,ref is the reference value
Cd 2xC d V d
for the average DC-link voltage Vd.
The instantaneous DC-link voltage vd consists of the
average DC-link voltage Vd and its voltage variation. The 5. Simulation results
DC-link voltage variation introduces the PV current varia-
tion followed by the step-up DC–DC converter. In order to The suggested PV current variation reduction control is
reduce the PV current variation for the instantaneous DC- simulated by using PSIM for the proposed system. PSIM is
link voltage vd, the duty ratio in (12) should be a simulation software package especially designed for
vd n power electronics and motor control (Veerachary, 2006).
¼ ð22Þ The electrical system parameters for the simulation are
V pv 1 ðDctrl þ Dvar Þ
the DC-link voltage Vd = 350 V, output voltage Vo = 60
where Dctrl is the control duty ratio to regulate the average Hz/220 V, and the output power Po = 260 W. A circuit-
DC-link voltage Vd, and Dvar is the PV current variation
cancellation duty ratio. Using (21), the relation between
vd and Vpv in (22) can be rewritten as
V pv V pv
¼
vd V d 1 þ 2xCo I oV 2 sin 2xt
V
d d
V pv V oI o
ffi 1 sin 2xt : ð23Þ
Vd 2xC d V 2d
Using the relation of Vd/Vpv = n/(1– Dctrl) in (12), (23)
can be rewritten as
V pv 1 nV pv V o I o
¼ ð1 Dctrl sin 2xtÞ: ð24Þ
vd n 2xC d V 3d Fig. 7. Block diagram of the PV current variation reduction controller.
W.-Y. Choi, Jih-Sheng (Jason) Lai / Solar Energy 84 (2010) 636–649 643
based solar module model is formed, using the photovol- reduction control is implemented in the DC–DC converter
taic array model in Villalva et al. (2009). The electrical controller. The simulation results shows that the low fre-
characteristics of the PV module are shown in Fig. 8. The quency PV current variation in the grid-connected PV
variable parameters such as solar insolation and module MIC system can be reduced by the suggested PV current
surface temperature are included in the external dynamic variation reduction control. By adding only the PV current
linked library (DLL) block, which allows users to write variation cancellation duty ratio to the steady-state control
code in C/C++ and link it with PSIM. The PV module duty ratio of the DC–DC converter, the low frequency PV
produces the maximum power of 260 W at the PV voltage current is reduced without using any additional circuit
of 36.1 V. Fig. 9 shows the overall simulation schematic components.
diagram of the proposed system. The controllers for the
proposed step-up DC–DC converter and the full-bridge 6. Experimental results
DC–AC inverter are implemented using two DLL blocks,
respectively. In the DC–DC converter controller, the sug- To evaluate the performance of the proposed PV MIC
gested PV current variation reduction control in Fig. 7 is system, a 260 W prototype system was built and tested.
implemented. The PV module voltage Vpv, the DC-link Table 1 shows the major components and parameters of
voltage Vd, and the output current Io are measured in order the PV MIC system. For the minimum PV voltage of
to generate the DC-link voltage of 350 V and to reduce the Vpv = 22 V and the selected turns ratio of n = 6, the maxi-
PV current variation. In the DC–AC inverter controller, mum duty ratio Dmax is determined as about Dmax = 0.62.
the maximum power point tracking (MPPT) control and For fs = 50 kHz, the critical resonant frequency fcr is deter-
unity power factor control are implemented. The conven- mined as fcr = 65 kHz by (14). For the leakage inductor of
tional incremental and conductance method (Liu et al., Llk = 0.8 lH, the resonant capacitor Cr is selected as Cr = 7
2008) is adopted for MPPT control, which can track the lF in order to ensure zero-current switching of the output
maximum power point of the PV module and generate rectifying diodes by (16). The resonant frequency fr is
the current reference for the power factor correction of determined as about fr = 67 kHz, which is slightly higher
the DC–AC inverter. The PV module voltage Vpv, the PV than fcr. The full-bridge DC–AC inverter is implemented
module current Ipv, the output voltage Vo, and the output with a sinusoidal pulse-width modulation (SPWM) method
current Io are measured for MPPT and grid-connection (Lee et al., 2008) at 20 kHz switching frequency to generate
of the PV MIC system. 60 Hz/220 V output voltage. The control function is imple-
Fig. 10 shows the simulated results of the PV MIC sys- mented by using a single-chip microcontroller,
tem when it supplies 260 W power to the grid. Fig. 10(a) dsPIC30F4011 (Microchip), which has 9-channel 10-bit
shows the PV module current and grid voltage when the A/D converter, one controller area network (CAN), and
suggested PV current variation reduction control is not 6-PWM channels.
used in the DC–DC converter. A large ripple current of Fig. 11 shows the experimental waveforms of the step-
the double grid-frequency of 120 Hz appears on the PV up DC–DC converter at the maximum PV power of
module side. Fig. 10(b) shows the PV module current and 260 W for the PV voltage of 36.1 V. Fig. 11(a) shows the
grid voltage when the suggested PV current variation voltage and current waveforms of S2. When S2 is turned
Fig. 10. Simulation results: (a) PV module current and grid voltage when the suggested PV current variation reduction control is not used. (b) PV module
current and grid voltage when the suggested PV current variation reduction control is used.
W.-Y. Choi, Jih-Sheng (Jason) Lai / Solar Energy 84 (2010) 636–649 645
Table 1
Major components and parameters of the PV MIC system.
System parameters Value
Major components and system parameters
DC-link voltage Vd 350 V
Output voltage Vo 60 Hz/220 V
Switching frequency fs 50 kHz
Input filter capacitor Cpv 1200 lF/100 V
DC-link capacitor Cd 220 lF/450 V
Clamping capacitor Cc 680 lF/100 V
Resonant capacitor Cr 7 lF/450 V
Output capacitor Cs1, CS2 540 pF/100 V
Trans fomier turns ratio n = 6 (N = 4, Ns = 24)
Magnetizing inductor 10 lH
Leakage inductor 0.8 lH
Output filter inductor 1 mH
MOSFET S1, S2 IRFB4310{100 V/4 A)
IGBT S3 S6 FGP7N60RUFD (600 V/7 A)
Diode Dol Do2 FFPF15U40S (400 V/15 A)
by 0.7%, which translates into approximately 22% reduc- 7. Extension for distributed generation units
tion of the power losses compared to the flyback converter.
The efficiency improvement is prominent at the maximum The PV MIC system operates always on maximum
output power condition where the reverse-recovery current power point, extracting the maximum power available
of the output rectifying diode is the most significant. from the panels, while the storage unit operation is ruled
Fig. 13(c) shows the measured efficiency of the overall PV by energy prices. The PV MIC system charges the storage
MIC system including the DC–DC converter and the unit when prices are low and discharges when energy prices
DC–AC inverter when the suggested PV current variation are high. As the storage unit is a flexible unit for providing
reduction control is used. Fig. 13(d) shows the measured and consuming energy, its output power can also be con-
efficiency of the overall PV MIC system when the suggested trolled by the central supervisory controller for meeting
PV current variation reduction control is not used. The different requirements in the grid. With the central supervi-
proposed PV MIC system achieves an efficiency of 95% sory control, the PV MIC systems have the various remote
at the maximum output power and shows an efficiency control options like monitoring, local voltage control, com-
improvement by 0.2% at the maximum output power when pensating for the error in generation and load forecast.
the suggested PV current variation reduction control is An important feature that the supervisory control of the
applied to the system. modern distributed power generation units should have is
Fig. 14. Block diagram of the global system using the proposed PV MIC system.
648 W.-Y. Choi, Jih-Sheng (Jason) Lai / Solar Energy 84 (2010) 636–649
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