International Journal of Computer and Electrical Engineering, Vol. 2, No.
3, June, 2010
1793-8163
Modeling and Digital Simulation of Interline
Power Flow Controller System
A. P.Usha Rani and B. S.Rama Reddy
Abstract—The Interline Power Flow Controller (IPFC) is a
voltage source converter based Flexible AC Transmission
System (FACTS) controller for series compensation with the
unique capability of power flow management among the
multiline transmission systems of a substation. The reactive
voltage injected by individual Voltage Source Converter (VSC)
can be controlled to regulate active power flow in the
respective line. While one VSC regulates the DC voltage, the
other one controls the reactive power flows in the lines by
injecting series active voltage. In this paper, a circuit model
for IPFC is developed and simulation of interline power flow
controller is done using the proposed circuit model. Simulation
is done using MATLAB simulink and PSPICE. The results
obtained by MATLAB are compared with the results
obtained by PSPICE.
Index Terms—Flexible AC Transmission System (FACTS),
Interline Power Flow Controller (IPFC), Voltage Source
Converter (VSC), Static Synchronous Series Compensator
(SSSC).
I. INTRODUCTION
The power systems of today are mechanically controlled
and as a result there is no high-speed control. Also, such
mechanical controls cannot be initiated frequently because
mechanical device tend to wear out very quickly compared
to static electronic devices. The FACTS technology is
essential to alleviate some but not all of these difficulties by
enabling utilities to get the most service from their
transmission facilities and enhance grid reliability. The
possibility that current through a line can be controlled at a
reasonable cost enables a large potential of increasing the
capacity of existing lines with larger conductors, and use of
one of the FACTS controllers to enable corresponding
power to flow through such lines under normal and
contingency conditions. FACTS controllers can enable a
line to carry power closer to its thermal rating. Interline
Power Flow Controller (IPFC) is an extension of static
synchronous series compensator (SSSC). A mathematical
model of the IPFC in steady state operation has been
developed in [1]. In [2], the basic principle of the IPFC is
discussed in detail and simulation results are shown to
demonstrate the capability of the IPFC to realize power
balance between transmission systems with two identical
parallel lines. The basic characteristics of the IPFC are
discussed and two basic control systems for the IPFC are
F.A. Department of Electrical and Electronics Engineering, Jerusalem
College of Engineering, Centre for collaborative research with Anna
University, Chennai, India. (e-mail: pusharani71@yahoo.com)
S.B. Department of Electrical and Electronics Engineering, Jerusalem
College of Engineering, Centre for collaborative research with Anna
University, Chennai, India. (e-mail: srr_victory@yahoo.com)
441
proposed to realize the power flow control in [3].
Flexible AC Transmission System (FACTS) controllers
such as thyristor-based controllers are described in [4].
IPFC employs a number of VSCs linked at the same DC
terminal, each of which can provide series compensation for
its own line. In this way, the power optimization of the
overall system can be realized in the form of appropriate
power transfer through the common DC link from over-
loaded lines to under-loaded lines [2] - [4]. The
performance of a Generalized Interline Power Flow
Controller (GIPFC) controlling two balanced independent
AC systems is analyzed and evaluated in [5]. Literature [6]
describes a combination of fuzzy scheme and Radial Basis
Function Neural Network adopted for nonlinear control of
Thyristor Controlled Series Capacitor (TCSC) and IPFC.
The power flow control design for IPFC is proposed and
transfer functions are analyzed in [7]. Paper [8] proposes a
powerful tool applied on 3 machine 9 bus test system with
two IPFCs, with one loop and optimal power flow method.
Mathematical models of IPFC and Generalized UPFC and
their implementation in power flow have been presented in
[9]. Paper [10] presents IPFC with 12 pulse three level
converters and investigates the sub synchronous resonance
characteristics. The circuit model for IPFC is not available
in the literature [1] to [10]. An attempt is made in the
present work to develop circuit model for four bus system
with IPFC.
II. BASIC PRINCIPLE OF INTERLINE POWER FLOW
CONTROLLER
In its general form the interline power flow controller
employs number of DC to AC inverters each providing
series compensation for a different line as shown in Fig.1.
IPFC is designed as a power flow controller with two or
more independently controllable static synchronous series
compensators (SSSC) which are solid state voltage source
converters injecting an almost sinusoidal voltage at variable
magnitude and are linked via a common DC capacitor.
SSSC is employed to increase the transferable active power
on a given line and to balance the loading of a transmission
network.
In addition, active power can be exchanged through these
series converters via the common DC link in IPFC. It is
noted that the sum of the active powers outputted from
VSCs to transmission lines should be zero when the losses
of the converter circuits can be ignored. A combination of
the series connected VSC can inject a voltage with
controllable magnitude and phase angle at the fundamental
frequency while DC link voltage can be maintained at a
desired level. The common DC link is represented by a
bidirectional link for active power exchange between
 International Journal of Computer and Electrical Engineering, Vol. 2, No. 3, June, 2010
1793-8163

voltage sources. represented by a dependent voltage source. By providing

converters between two transmission lines, the reactive
power can be transferred from under loaded line to the over
loaded line.
Continuous
pow ergui
1

Gain I12
i
+
-

z2 z3

+
I

-
i
z1
V
PQ
I

primary load P,Q Scope

primary line
+
v
-
V

0.6

I n1
C onn1
C onn2
C onn3
C onn4
CVS
Subsystem1

s
-
z2' z3'

+
I1
V

-
i
z1' PQ
I

P1,Q1 Scope1

+
v
-
secondary line
secondary load V1

Fig.1. Schematic representation of IPFC

The equivalent circuit of the IPFC is shown in Fig.2.

Fig.3. Matlab Circuit model of IPFC system

Rectifier-Inverter subsystem used in the IPFC model is
shown in Fig.4. Scopes are connected to measure the real
and reactive powers in the loads.

Fig.2. Equivalent circuit of IPFC

The power flow equations are as follows:

n
Pi = Vi2 gii − ∑V V (g
j =1, j ≠ i
i j ij ( ) (
cos θ j − θi + bij sin θ j − θi ))
(1)
n
− ∑V Vse (g
j =1, j ≠ i
i ij ij ( ) (
cos θi − θseij + bij sin θi − θseij ))

n
Qi = Vi2bii − ∑V V (g sin(θ
j =1, j ≠i
i j ij j ) (
−θi + bij sin θ j −θi ))
(2)
n
− ∑V Vse (g sin(θ −θse )+ b sin(θ −θse ))
j =1, j ≠i
i ij ij i ij ij i ij Fig.4. Rectifier-Inverter subsystem
A reference signal is compared with a ramp signal and its
output is given as pulse to the switches of the converter. The
where V : bus voltage magnitude reactive power of secondary load is 7.094MVAR with
θ : bus angle primary line operating at 120kV and the secondary line at
Vse : magnitude of injected voltage 110kV. The plot of reactive power with unequal voltages is
θse : angle of injected voltage shown in Fig.5.

III. MATLAB SIMULATION

Digital Simulation of IPFC system is done using
MATLAB simulink and the results are presented.
A. model for ipfc system
Fig.5. Reactive power of secondary load with unequal voltages
The single phase model of four bus system with IPFC is
shown in Fig.3. The transformer between the lines is

442
 International Journal of Computer and Electrical Engineering, Vol. 2, No. 3, June, 2010
1793-8163

The reactive power of secondary load is 7.0955MVAR Continuous

when both lines are operating at 110kV. The plot of reactive pow ergui
1
power with equal voltages is shown in Fig.6. Gain I12
i
+
-

z2 z3

+
I

-
i
z1 V
R1 PQ
I

P,Q Scope
primary load
+
v Conn1
-
Out1
R2 V
primary line Conn2

Subsystem3
Fig.6. Reactive power of secondary load with equal voltages

Simulation was done with equal voltages on the input

sides and different phase angles [Primary input source
voltage with phase angle 15o and secondary source voltage

+
CVS

In1
onn1
onn2
onn3
onn4
with 30o]. Due to the difference in phase angle, there is an

s
-

C
C
C
C
Sub1

increase in the real power of the secondary load when Out1 In1

compared to the primary load. The real powers in primary Subsystem4

and secondary loads are 8.8MW and 9.47MW respectively

as shown in Fig.7. z2' z3'

+
I1

-
i
6
x 10 Real power of primary load V
10 z1'
PQ
I

R1' P1,Q1 Scope1

+
v
P 1(W)

-
5 V1
secondary load
secondary line
Conn1
R2' Out1
0 Conn2
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Subsystem2
6
x 10 Real power of secondary load
10
Fig.8. Circuit model of Closed loop IPFC system

With unequal voltages on the input sides ie. primary line

P 2(W)

5
input of 120kV and the secondary line input of 110kV, the
reactive power of secondary load is 7.108MVAR as shown
0 in Fig.9. The reactive power is increased from 7.094MVAR
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time
in open loop to 7.108MVAR in closed loop system.
Fig.7. Real power of primary load and secondary load
B. Model of closed loop ipfc SYSTEM

The Matlab circuit model of closed loop IPFC system

with primary and the secondary loads is shown in Fig.8.
Load voltage is sensed and it is rectified. It is compared
with a reference signal. The output of pulse generator is
used to drive the switches of the inverter. Subsystem 2 Fig.9. Reactive power of secondary load with unequal voltages
senses the voltage across secondary load. Subsystem 3
senses the voltage across primary load. Subsystem 4 The reactive power of secondary load is 7.109MVAR
represents the pulse generation module. when both lines are operating at 110kV. as shown in Fig.10.
The reactive power is increased from 7.0955MVAR in open
loop to 7.109MVAR in closed loop system.

Fig.10. Reactive power of secondary load with equal voltages

443
 International Journal of Computer and Electrical Engineering, Vol. 2, No. 3, June, 2010
1793-8163

sources. Line impedance is divided into two parts as shown.

The simulation results of reactive power of secondary
load are given in Table. I. H3

+-
R2 L2 H R3 L3
1 2 1 2
TABLE. I. REACTIVE POWER OF SECONDARY LOAD R1 59 .346H GAIN = 2 59 .346H
2 R4
Primary line Secondary line Reactive power of secondary .0001
2 432
voltage voltage (kV) load (MVAR) L1
L4
.0001mH
(kV) Open loop Closed loop 1.03H
110 110 7.0955 7.109 1
V1 1

120 110 7.094 7.108 VAMPL = 169706V

FREQ = 50Hz
VOFF = 0V

The real power of primary load is 8.8MW and the

secondary load is 9.51MW with primary line operating
at 110∠15o kV and secondary line operating at 110∠30o S31 VON = 1.0V S32
TD = 14ms VOFF = 0.0V +
+ +
S311 S322
+ + TF = 1ns + + +
kV as shown in Fig.11. Thus, in closed loop system, the real - - TR = 1ns
PW = 10ms V22
- -
V221
- -
TD = 16ms
- -

V21 S S S TF = 1ns V222 S

power of secondary load increases to 9.51MW from PER = 20ms
V1 = 0
V1 = 0
PW = 10ms
VOFF = 0.0V
VON = 1.0V
9.47MW in open loop system. This is possible by providing V2 = 10V
C1 0
PER = 20ms
TR = 1ns
0 0 0
converters between two transmission lines. By controlling 2000uf
V2 = 10V

the phase angle of the input voltages, the flow of real power
between lines having equal input voltages can be controlled. 0 S33 VON = 1.0V S34 + +
S333 S344
+ + E5

-
+
VOFF = 0.0V + + - -
VOFF = 0.0V - - R6 L6 R7 L7
+ +

+-
V233 VON = 1.0V 1 2 E 1 2
- - - -
S S
V24 S 59 .346H GAIN = 2 59 0.346H
x 10
6
Real power of primary load V23 S V244 R8
10
TD = 4ms TD = 6ms R5 345.6 2
TF = 1ns TF = 1ns 2
PW = 10ms 0 TR = 1ns .0001 L8
0 PER = 20ms 0 PER = 20ms 0 L5
P1(W)

5 V1 = 0 PW = 10ms .824H
TR = 1ns V1 = 0 .0001mH
V2 = 10V V2 = 10V
1
1
0 0 0 VAMPL = 155563V V2
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 VOFF = 0V
FREQ = 50Hz
6
x 10 Real power of secondary load
10 0

Fig.12. PSPICE Circuit model of IPFC system

P2(W)

With unequal voltages on the input sides ie. primary line

0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
input of 120kV and the secondary line input of 110kV, the
Timesecs) reactive power in secondary load is 7.07MVAR as shown in
Fig.11. Real power of primary load and secondary load Fig.13.

The simulation results of real power in primary load and

secondary load are given in Table. II.

TABLE. II. REAL POWER OF PRIMARY AND SECONDARY LOADS

Type of Real power (MW)
system
Primary load Secondary
load
Open loop 8.8 9.47

Closed loop 8.8 9.51

Fig.13. Reactive power of secondary load with unequal voltages

There is an increase in the real power of secondary load The reactive power in secondary load is 7.072MVAR
due to the closed loop operation of Interline Power Flow with equal voltages on primary line and secondary line
Controller. operating at 110kV as shown in Fig.14.

IV. PSPICE SIMULATION

The IPFC system is also simulated using PSPICE and the
details are presented here. IPFC system is modeled using
the elements of PSPICE.
A. Model of IPFC system
The Pspice model of IPFC system is shown in Fig.12. Fig.14. Reactive power of secondary load with equal voltages
Series transformers are represented as voltage dependent
444
 International Journal of Computer and Electrical Engineering, Vol. 2, No. 3, June, 2010
1793-8163

Simulation is done with equal voltages on the input sides R2 L2 R3 L3

1 2 1 2
and different phase angles [Primary line operating at 110kV
TX1 D1 D3
with phase angle 15o and secondary line operating at 110kV R4 R12
R1 R10
with phase angle 30o]. There is an increase in the real power 2
2 R34
of the secondary load. The real powers in primary and L4 C2
L1
secondary loads are 8.8MW and 9.42MW respectively. The S2
0 R31
real power output of secondary load is 9.42MW as shown in + +
- - 1 0
Fig.15. 1 R11 D2 D4
R9

R35
V1 0
0
R37
+ R32
0
R36 OUT

S31 S35 S311 S322 - OPAMP

V21 + + + + + + + +
- -
V22 - -
V221 - -
V222 - - 0
R33
S S S
Fig.15. Real power of secondary load 0 S33 S34
0 C1 0 S333 0S344
+ + + +
B. Model of Closed loop System Using Pspice V23 - -
V24
- -
V233
+ +
- -
V244
+ +
- -
S S
The PSPICE based closed loop controlled IPFC circuit S S

for reactive power compensation is shown in Fig.16. The 0

0
0 0
D21 D23
converter can function as a phase controlled rectifier or R6 L6 R7 L7 R212
1 2 0 10 2
inverter. AC output of primary and secondary lines is
R8
rectified and attenuated. The outputs of attenuator are given R5 R13 C22
2 TX2 2
to the comparator. The difference in input voltages makes
L5 L8 R231
the comparator output high and the switch gets closed. This
allows power exchange between the transmission lines D22 D24
through the AC to AC converter system. 1 1
R14
V2
0

0
Fig.16. closed loop controlled IPFC system using pspice

The reactive power in secondary load is 7.073MVAR

with unequal voltages on the input sides ie. primary line
operating at 120kV and the secondary line operating at
110kV as shown in Fig.17. The reactive power increases
from 7.07MVAR in open loop to 7.073MVAR in closed
loop system.

Fig.17. Reactive power of secondary load with unequal voltages

With equal voltages on the input sides ie. primary line

and secondary line inputs are 110kV, the reactive power in
secondary load is 7.0728MVAR as shown in Fig.18.

Fig.18. Reactive power of secondary load with equal voltages

445
 International Journal of Computer and Electrical Engineering, Vol. 2, No. 3, June, 2010
1793-8163

The simulation results of reactive power in secondary [2] Yankui Zhang, Yan Zhang, and Chen Chen, “A Novel Power
Injection Model of IPFC for Power Flow Analysis Inclusive of
load are given in Table III. Practical Constraints”, IEEE Transactions on Power Systems, Vol 21,
No 4, November 2006, pp. 1550-1556.
TABLE. III. REACTIVE POWER IN SECONDARY LOAD USING PSPICE [3] Jianhong Chen, Tjing T.Lie, D.M. Vilathgamuwa, “Basic Control of
Interline Power Flow Controller”, IEEE 2002, pp. 521-525.
Primary line Secondary line Reactive power in [4] R.L. Vasquez Arnez, L. Cera Zanetta Jr., “Steady state Multi-Line
voltage voltage (kV) secondary load (MVAR) Power Flow through the Generalized IPFC ”, IEEE/PES
(kV) Open loop Closed loop Transmission & Distribution conference, 2004, pp. 28-33.
110 110 7.072 7.0728 [5] A.Kazemi, E.Karimi, “The Effect of Interline Power Flow Controller
(IPFC) on Demanding Inter-area Oscillations in the Interconnected
120 110 7.07 7.073 Power systems”, IEEE ISIE 2006, July 9-12, 2006, Montreal, Quebec,
Canada.
[6] S.Teerathana, A. Yokoyama, Y. Nakachi, M. Yasumatsu, “An
Optimal Power Flow Control Method of Power System by Interline
The real power of primary load is 8.8MW and the Power Flow Controller ”, IEEE 2004, pp. 343-346.
secondary load is 9.47MW with primary line operating [7] R. Leon Vasquez-Arnez, Lulz Cera Zanetta, “A Novel Approach for
Modeling the Steady-State VSC-Based Multiline FACTS Controllers
at 110∠15o kV and secondary line operating at 110∠30o kV and Their Operational Constraints”, IEEE Transactions on Power
as shown in Fig.19. Thus, in closed loop system, the real Delivery, 2007, pp. 1-8.
[8] Jun Zhang, Akihiko Yokoyama, “Optimal Power Flow Control for
power of secondary load increases to 9.47MW from Congestion Management by Interline Power Flow Controller (IPFC)”,
9.42MW in open loop system. This is possible by providing International Conference on Power System Technology, 2006, pp. 1-
converters between two transmission lines. By controlling 6.
[9] V. Diez-Valencia, U.D. Annakage, D. Jacobson, “Interline Power
the phase angle of the injected voltage, the flow of real Flow Controller (IPFC) Steady State Operation”, IEEE Canadian
power between lines having equal input voltages can be Conference on Electrical & Computer Engineering, 2002, pp. 280-
controlled. 284.
[10] Power Engineers Handbook by Tamil Nadu Electricity Board
Engineering Association, Sixth edition, 2002.

First A. P. Usha Rani is an Associate

Professor in Electrical and Electronics
Engineering Department, Jerusalem College
Fig.19.Real power of secondary load of Engineering, Chennai, India. She received
her B.E. degree in Electrical & Electronics
The simulation results of real power in primary load and Engineering from the Government College
secondary load are given in Table. IV. of Technology, Coimbatore, India in 1991,
M.E. degree in Power Systems from College
of Engineering, Anna University, Chennai,
TABLE. IV. REAL POWER OF PRIMARY LOAD AND SECONDARY LOAD India in 2001. Her earlier industrial experience was with Chemin Controls,
USING PSPICE Pondicherry, India. She has 13 years of teaching experience. Her research
interests include FACTS and application of power electronics to power
Type of system Real power (MW) quality problems.

Second B. S. Rama Reddy is Professor and Dean

Primary load Secondary load
Open loop 8.8
Closed loop 8.8
V. CONCLUSION
IPFC is capable of balancing the power through the lines.
The power quality is improved since IPFC permits
additional power. The circuit models for IPFC system are
developed using matlab and pspice. These models are used
for simulating a four bus system. The simulation results
using matlab and PSPICE are presented. The simulation
results of Matlab closely agree with the results of Pspice
system. IPFC increases the real power transfer and
improves the voltage profile.
of Electrical & Electronics Engineering
9.42 Department, Jerusalem College of Engineering,
Chennai, India. He obtained his D.E.E. from
9.47 S.M.V.M. polytechnic, Tanuku, A.P., A.M.I.E. in
Electrical Engineering from Institution of
Engineers (India), M.E. in Power Systems from
Anna University, Chennai and Ph.D in the area of
Power Electronics from Anna University, Chennai,
India. He has published over 20 technical papers
in national and international conferences
proceedings / journals. He has secured A.M.I.E. institution gold medal for
obtaining highest marks. He has secured AIMO best project award and
Vijaya Ratna Award. He has worked in Tata Consulting Engineers,
Bangalore and Anna University, Chennai. He has 18 years of teaching
experience. His research interests include the areas of resonant converters
and FACTS. He is life member of Institution of Engineers (India), Indian
Society for Technical Education, Systems Society of India, Society of
Power Engineers and Institution of Electronics and Telecommunication
Engineers (India). He has published text books on Power Electronics,
Solid State Circuits and Electronic circuits.

REFERENCES
[1] K. R. Padiyar , Nagesh Prabhu , “Analysis of SSR With Three-Level
Twelve-Pulse VSC-Based Interline Power-Flow Controller”, IEEE
Transactions on Power Delivery, vol 22, No 3, July 2007.

446