LECTURE - 1: OPERATIONAL AMPLIFIERS

Operational Amplifiers:

The operational amplifier is a direct-coupled high gain amplifier usable from 0 to over 1MH Z to
which feedback is added to control its overall response characteristic i.e. gain and bandwidth.
The op-amp exhibits the gain down to zero frequency.

Such direct coupled (dc) amplifiers do not use blocking (coupling and by pass) capacitors since
these would reduce the amplification to zero at zero frequency. Large by pass capacitors may be
used but it is not possible to fabricate large capacitors on a IC chip. The capacitors fabricated are
usually less than 20 pf. Transistor, diodes and resistors are also fabricated on the same chip.

Differential Amplifiers:

Differential amplifier is a basic building block of an op-amp. The function of a differential

amplifier is to amplify the difference between two input signals.

How the differential amplifier is developed? Let us consider two emitter-biased circuits as shown
in fig. 1.

Fig. 1

The two transistors Q1 and Q2 have identical characteristics. The resistances of the circuits are
equal, i.e. RE1 = R E2, RC1 = R C2 and the magnitude of +VCC is equal to the magnitude of –VEE.
These voltages are measured with respect to ground.

To make a differential amplifier, the two circuits are connected as shown in fig. 1. The two +VCC
and –VEE supply terminals are made common because they are same. The two emitters are also
connected and the parallel combination of R E1 and RE2 is replaced by a resistance RE. The two
input signals v1 & v2 are applied at the base of Q 1 and at the base of Q2. The output voltage is
taken between two collectors. The collector resistances are equal and therefore denoted by R C =
RC1 = RC2.

Ideally, the output voltage is zero when the two inputs are equal. When v1 is greater then v2 the
output voltage with the polarity shown appears. When v1 is less than v2, the output voltage has
the opposite polarity.

The differential amplifiers are of different configurations.

The four differential amplifier configurations are following:

1. Dual input, balanced output differential amplifier.

2. Dual input, unbalanced output differential amplifier.
3. Single input balanced output differential amplifier.
4. Single input unbalanced output differential amplifier.

Fig. 2
These configurations are shown in fig. 2, and are defined by number of input signals used and
the way an output voltage is measured. If use two input signals, the configuration is said to be
dual input, otherwise it is a single input configuration. On the other hand, if the output voltage is
measured between two collectors, it is referred to as a balanced output because both the
collectors are at the same dc potential w.r.t. ground. If the output is measured at one of the
collectors w.r.t. ground, the configuration is called an unbalanced output.

A multistage amplifier with a desired gain can be obtained using direct connection between
successive stages of differential amplifiers. The advantage of direct coupling is that it removes
the lower cut off frequency imposed by the coupling capacitors, and they are therefore, capable
of amplifying dc as well as ac input signals.

LECTURE - 2: OPERATIONAL AMPLIFIERS

Dual Input, Balanced Output Difference Amplifier:

The circuit is shown in fig. 1 v1 and v2 are the two inputs, applied to the bases of Q1 and Q2
transistors. The output voltage is measured between the two collectors C 1 and C2, which are at
same dc potentials.

Fig. 1

A.C. Analysis :

In previous lecture dc analysis has been done to obtain the operatiing point of the two transistors.

To find the voltage gain Ad and the input resistance Ri of the differential amplifier, the ac
equivalent circuit is drawn using r-parameters as shown in fig. 2. The dc voltages are reduced to
zero and the ac equivalent of CE configuration is used.
Fig. 2

Since the two dc emitter currents are equal. Therefore, resistance r' e1 and r'e2 are also equal and
designated by r'e . This voltage across each collector resistance is shown 180° out of phase with
respect to the input voltages v1 and v2. This is same as in CE configuration. The polarity of the
output voltage is shown in Figure. The collector C2 is assumed to be more positive with respect
to collector C1 even though both are negative with respect to to ground.

Applying KVL in two loops 1 & 2.

Substituting current relations,

Again, assuming RS1 / b and RS2 / b are very small in comparison with RE and re' and therefore
neglecting these terms,
Solving these two equations, ie1 and ie2 can be calculated.

The output voltage VO is given by

VO = VC2 - VC1

= -RC iC2 - (-RC iC1)

= RC (iC1 - iC2)

= RC (ie1 - ie2)

Substituting ie1, & ie2 in the above expression

Thus a differential amplifier amplifies the difference between two input signals. Defining the
difference of input signals as vd = v1 – v2 the voltage gain of the dual input balanced output
differential amplifier can be given by

(E-2)

LECTURE - 3: DIFFERENCE AMPLIFIERS

A dual input, balanced output difference amplifier circuit is shown in fig. 1.

Fig. 1

Inverting & Non – inverting Inputs:

In differential amplifier the output voltage vO is given by

VO = Ad (v1 – v2)
When v2 = 0, vO = Ad v1
& when v1 = 0, vO = - Ad v2

Therefore the input voltage v1 is called the non inventing input because a positive voltage v1
acting alone produces a positive output voltage vO. Similarly, the positive voltage v2 acting alone
produces a negative output voltage hence v2 is called inverting input. Consequently B1 is called
noninverting input terminal and B2 is called inverting input terminal.

Common mode Gain:

A common mode signal is one that drives both inputs of a differential amplifier equally. The
common mode signal is interference, static and other kinds of undesirable pickup etc.

The connecting wires on the input bases act like small antennas. If a differential amplifier is
operating in an environment with lot of electromagnetic interference, each base picks up an
unwanted interference voltage. If both the transistors were matched in all respects then the
balanced output would be theoretically zero. This is the important characteristic of a differential
amplifier. It discriminates against common mode input signals. In other words, it refuses to
amplify the common mode signals.

The practical effectiveness of rejecting the common signal depends on the degree of matching
between the two CE stages forming the differential amplifier. In other words, more closely are
the currents in the input transistors, the better is the common mode signal rejection e.g. If v1 and
v2 are the two input signals, then the output of a practical op-amp cannot be described by simply

v0 = Ad (v1 – v2 )

In practical differential amplifier, the output depends not only on difference signal but also upon
the common mode signal (average).

vd = (v1 – vd )

and vC = ½ (v1 + v2 )

The output voltage, therefore can be expressed as

vO = A1 v1 + A2 v2

Where A1 & A2 are the voltage amplification from input 1(2) to output under the condition that
input 2 (1) is grounded.

The voltage gain for the difference signal is Ad and for the common mode signal is AC.

The ability of a differential amplifier to reject a common mode signal is expressed by its
common mode rejection ratio (CMRR). It is the ratio of differential gain A d to the common mode
gain AC.

Date sheet always specify CMRR in decibels CMRR = 20 log CMRR.

Therefore, the differential amplifier should be designed so that r is large compared with the ratio
of the common mode signal to the difference signal. If r = 1000, vC = 1mV, vd = 1 m V, then
It is equal to first term. Hence for an amplifier with r = 1000, a 1m V difference of potential
between two inputs gives the same output as 1mV signal applied with the same polarity to both
inputs.

LECTURE - 4: BIASING OF DIFFERENTIAL AMPLIFIERS

Constant Current Bias:

In the dc analysis of differential amplifier, we have seen that the emitter current I E depends upon
the value of bdc. To make operating point stable I E current should be constant irrespective value
of bdc.

For constant IE, RE should be very large. This also increases the value of CMRR but if R E value
is increased to very large value, IE (quiescent operating current) decreases. To maintain same
value of IE, the emitter supply V EE must be increased. To get very high value of resistance RE
and constant IE, current, current bias is used.

Figure 5.1

Fig. 1, shows the dual input balanced output differential amplifier using a constant current bias.
The resistance RE is replace by constant current transistor Q3. The dc collector current in Q3 is
established by R1, R2, & RE.

Applying the voltage divider rule, the voltage at the base of Q 3 is

Because the two halves of the differential amplifiers are symmetrical, each has half of the current
IC3.

The collector current, IC3 in transistor Q3 is fixed because no signal is injected into either the
emitter or the base of Q3.

Besides supplying constant emitter current, the constant current bias also provides a very high
source resistance since the ac equivalent or the dc source is ideally an open circuit. Therefore, all
the performance equations obtained for differential amplifier using emitter bias are also valid.

As seen in IE expressions, the current depends upon VBE3. If temperature changes, VBE changes
and current IE also changes. To improve thermal stability, a diode is placed in series with
resistance R1as shown in fig. 2.

Fig. 2
This helps to hold the current IE3 constant even though the temperature changes. Applying KVL
to the base circuit of Q3.

Therefore, the current IE3 is constant and independent of temperature because of the added diode
D. Without D the current would vary with temperature because V BE3 decreases approximately by
2mV/° C. The diode has same temperature dependence and hence the two variations cancel each
other and IE3 does not vary appreciably with temperature. Since the cut – in voltage VD of diode
approximately the same value as the base to emitter voltage V BE3 of a transistor the above
condition cannot be satisfied with one diode. Hence two diodes are used in series for V D. In this
case the common mode gain reduces to zero.

LECTURE - 5: THE OPERATIONAL AMPLIFIERS

The operation amplifier:

An operational amplifier is a direct coupled high gain amplifier consisting of one or more
differential (OPAMP) amplifiers and followed by a level translator and an output stage. An
operational amplifier is available as a single integrated circuit package.

The block diagram of OPAMP is shown in fig. 1.

Fig. 1

The input stage is a dual input balanced output differential amplifier. This stage provides most of
the voltage gain of the amplifier and also establishes the input resistance of the OPAMP.The
intermediate stage of OPAMP is another differential amplifier which is driven by the output of
the first stage. This is usually dual input unbalanced output.

Because direct coupling is used, the dc voltage level at the output of intermediate stage is well
above ground potential. Therefore level shifting circuit is used to shift the dc level at the output
downward to zero with respect to ground. The output stage is generally a push pull
complementary amplifier. The output stage increases the output voltage swing and raises the
current supplying capability of the OPAMP. It also provides low output resistance.

Level Translator:

Because of the direct coupling the dc level at the emitter

rises from stages to stage. This increase in dc level tends
to shift the operating point of the succeeding stages and
therefore limits the output voltage swing and may even
distort the output signal.

To shift the output dc level to zero, level translator

circuits are used. An emitter follower with voltage
divider is the simplest form of level translator as shown
in fig. 2.

Thus a dc voltage at the base of Q produces 0V dc at the

output. It is decided by R1 and R2. Instead of voltage
divider emitter follower either with diode current bias or
current mirror bias as shown in fig. 3 may be used to get
better results.
Fig. 2
In this case, level shifter, which is common collector
amplifier, shifts the level by 0.7V. If this shift is not
sufficient, the output may be taken at the junction of two
resistors in the emitter leg.

Fig. 3

Fig. 4, shows a complete OPAMP circuit having input different amplifiers with balanced output,
intermediate stage with unbalanced output, level shifter and an output amplifier.
Fig. 4

LECTURE - 6: PRACTICAL OPERATIONAL AMPLIFIER

The symbolic diagram of an OPAMP is shown in fig. 1.

741c is most commonly used OPAMP available in IC package. It is an 8-pin DIP chip.

Parameters of OPAMP:

The various important parameters of OPAMP are follows:

1.Input Offset Voltage:

 Input offset voltage is defined as the
voltage that must be applied between
the two input terminals of an OPAMP
to null or zero the output fig. 2, shows
that two dc voltages are applied to
input terminals to make the output
zero.

Vio = Vdc1 – Vdc2

Vdc1 and Vdc2 are dc voltages and RS

represents the source resistance. Vio is
the difference of Vdc1 and Vdc2. It may
be positive or negative. For a 741C
OPAMP the maximum value of Vio is
6mV. It means a voltage ± 6 mV is
Fig. 2
required to one of the input to reduce
the output offset voltage to zero. The
smaller the input offset voltage the
better the differential amplifier,
because its transistors are more closely
matched.

2. Input offset Current:

The input offset current Iio is the difference between the currents into inverting and non-inverting
terminals of a balanced amplifier.

Iio = | IB1 – IB2 |

The Iio for the 741C is 200nA maximum. As the matching between two input terminals is
improved, the difference between IB1 and IB2 becomes smaller, i.e. the Iio value decreases
further.For a precision OPAMP 741C, Iio is 6 nA

3.Input Bias Current:

The input bias current IB is the average of the current entering the input terminals of a balanced
amplifier i.e.

IB = (IB1 + IB2 ) / 2

For 741C IB(max) = 700 nA and for precision 741C IB = ± 7 nA

4. Differential Input Resistance: (Ri)

Ri is the equivalent resistance that can be measured at either the inverting or non-inverting input
terminal with the other terminal grounded. For the 741C the input resistance is relatively high 2
MΩ. For some OPAMP it may be up to 1000 G ohm.

5. Input Capacitance: (Ci)

Ci is the equivalent capacitance that can be measured at either the inverting and noninverting
terminal with the other terminal connected to ground. A typical value of C i is 1.4 pf for the 741C.

6. Offset Voltage Adjustment Range:

741 OPAMP have offset voltage null capability. Pins 1 and 5 are marked offset null for this
purpose. It can be done by connecting 10 K ohm pot between 1 and 5 as shown in fig. 3.

Fig. 3

By varying the potentiometer, output offset voltage (with inputs grounded) can be reduced to
zero volts. Thus the offset voltage adjustment range is the range through which the input offset
voltage can be adjusted by varying 10 K pot. For the 741C the offset voltage adjustment range is
± 15 mV.

LECTURE - 7: PARAMETERS OF AN OPAMP

Example - 1

A 100 PF capacitor has a maximum charging current of 150 µA. What is the slew rate?

Solution:

C = 100 PF=100 x 10-12 F

I = 150 µA = 150 x 10-6 A
Slew rate is 1.5 V / µs.

Example - 2

An operational amplifier has a slew rate of 2 V / µs. If the peak output is 12 V, what is the power
bandwidth?

Solution:

The slew rate of an operational amplifier is

As for output free of distribution, the slews determines the maximum frequency of operation
fmax for a desired output swing.

so
So bandwidth = 26.5 kHz.

Example - 3

For the given circuit in fig. 1. Iin(off) = 20 nA. If Vin(off) = 0, what is the differential input voltage?.
If A = 105, what does the output offset voltage equal?
Fig. 1

Solutin:

Iin(off) = 20 nA
Vin(off) = 0

(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20µ V

(ii) If A = 105 then the output offset voltage Vin(off) = 20 µ V x 105 = 2 volt

Output offset voltage = 2 volts.

LECTURE - 8: OPEN LOOP OPAMP CONFIGURATION

Open loop OPAMP Configuration:

In the case of amplifiers the term open loop indicates that no connection, exists between input
and output terminals of any type. That is, the output signal is not fedback in any form as part of
the input signal.

In open loop configuration, The OPAMP functions as a high gain amplifier. There are three open
loop OPAMP configurations.

The Differential Amplifier:

Fig. 1, shows the open loop differential amplifier in which input signals v in1 and vin2 are applied
to the positive and negative input terminals.

Fig. 1

Since the OPAMP amplifies the difference the between the two input signals, this configuration
is called the differential amplifier. The OPAMP amplifies both ac and dc input signals. The
source resistance Rin1 and Rin2 are normally negligible compared to the input resistance Ri.
Therefore voltage drop across these resistances can be assumed to be zero.

Therefore

v1 = vin1 and v2 = vin2.

vo = Ad (vin1 – vin2 )

where, Ad is the open loop gain.

The Inverting Amplifier:

If the input is applied to only inverting terminal and non-inverting terminal is grounded then it is
called inverting amplifier.This configuration is shown in fig. 2.

v1= 0, v2 = vin.

vo = -Ad vin

Fig. 2

The negative sign indicates that the output voltage is out of phase with respect to input 180 ° or
is of opposite polarity. Thus the input signal is amplified and inverted also.

The non-inverting amplifier:

In this configuration, the input voltage is applied to non-inverting terminals and inverting
terminal is ground as shown in fig. 3.

v1 = +vin v2 = 0

vo = +Ad vin
This means that the input voltage is amplified by Ad and there is no phase reversal at the output.

Fig. 3

In all there configurations any input signal slightly greater than zero drive the output to
saturation level. This is because of very high gain. Thus when operated in open-loop, the output
of the OPAMP is either negative or positive saturation or switches between positive and negative
saturation levels. Therefore open loop op-amp is not used in linear applications.

LECTURE - 9: CLOSED LOOP AMPLIFIER

Input Resistance with Feedback:

fig. 1, shows a voltage series feedback with the OPAMP equivalent circuit.

Fig. 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the input resistance
of the feedback amplifier. The input resistance with feedback is defined as
Since AB is much larger than 1, which means that Rif is much larger that Ri. Thus Rif approaches
infinity and therefore, this amplifier approximates an ideal voltage amplifier.

Output Resistance with Feedback:

Output resistance is the resistance determined looking back into the feedback amplifier from the
output terminal. To find output resistance with feedback R f, input vin is reduced to zero, an
external voltage Vo is applied as shown in fig. 2.

Fig. 2

The output resistance (Rof ) is defined as

This shows that the output resistance of the voltage series feedback amplifier is ( 1 / 1+AB )
times the output resistance Ro of the op-amp. It is very small because (1+AB) is very large. It
approaches to zero for an ideal voltage amplifier.

LECTURE - 10: VOLTAGE SHUNT FEEDBACK

Voltage shunt Feedback:

Fig. 1, shows the voltage shunt feedback amplifier using OPAMP.

Fig. 1
The input voltage drives the inverting terminal, and the amplified as well as inverted output
signal is also applied to the inverting input via the feedback resistor Rf. This arrangement forms a
negative feedback because any increase in the output signal results in a feedback signal into the
inverting input signal causing a decrease in the output signal. The non-inverting terminal is
grounded. Resistor R1 is connected in series with the source.

The closed loop voltage gain can be obtained by, writing Kirchoff's current equation at the input
node V2.

The negative sign in equation indicates that the input and output signals are out of phase by 180.
Therefore it is called inverting amplifier. The gain can be selected by selecting Rf and R1 (even <
1).

Inverting Input at Virtual Ground:

In the fig. 1, shown earlier, the noninverting terminal is grounded and the- input signal is applied
to the inverting terminal via resistor R1. The difference input voltage vd is ideally zero, (vd= vO/
A) is the voltage at the inverting terminals (v2) is approximately equal to that of the noninverting
terminal (v1). In other words, the inverting terminal voltage (v1) is approximately at ground
potential. Therefore, it is said to be at virtual ground.
LECTURE - 11: APPLICATIONS OF OPERATIONAL AMPLIFIERS

Analog Inverter and Scale Changer:

The circuit of analog inverter is shown in fig. 1. It is same as inverting voltage amplifier.

Assuming OPAMP to be an ideal one, the

differential input voltage is zero.

i.e. vd = 0
Therefore, v1 = v2 = 0

Since input impedance is very high, therefore,

input current is zero. OPAMP do not sink any
current.

\ iin= if
vin / R = - vO / Rf
vo = - (Rf / R) vin

If R = Rf then vO = -vin, the circuit behaves

like an inverter. Fig. 1

If Rf / R = K (a constant) then the circuit is

called inverting amplifier or scale changer
voltages.

Inverting summer:

The configuration is shown in fig. 2. With three input voltages va, vb & vc. Depending upon the
value of Rf and the input resistors Ra, Rb, Rc the circuit can be used as a summing amplifier,
scaling amplifier, or averaging amplifier.
Again, for an ideal OPAMP, v1 =
v2. The current drawn by OPAMP
is zero. Thus, applying KCL at v2
node

This means that the output voltage

is equal to the negative sum of all
the inputs times the gain of the
circuit Rf/ R; hence the circuit is
called a summing amplifier. When Fig. 2
Rf= R then the output voltage is
equal to the negative sum of all
inputs.

vo= -(va+ vb+ vc)

If each input voltage is amplified by a different factor in other words weighted differently at the
output, the circuit is called then scaling amplifier.

The circuit can be used as an averaging circuit, in which the output voltage is equal to the
average of all the input voltages.

In this case, Ra= Rb= Rc = R and Rf / R = 1 / n where n is the number of inputs. Here R f / R = 1 /
3.

vo = -(va+ vb + vc) / 3

In all these applications input could be either ac or dc.

LECTURE - 12: APPLICATIONS OF OPERATIONAL AMPLIFIERS

Differential Amplifier:

The basic differential amplifier is shown in fig. 1.

Fig. 1

Since there are two inputs superposition theorem can be used to find the output voltage. When
Vb= 0, then the circuit becomes inverting amplifier, hence the output due to Va only is

Vo(a) = -(Rf / R1) Va

Similarly when, Va = 0, the configuration is a inverting amplifier having a voltage divided

network at the noninverting input
LECTURE - 13: APPLICATIONS OF OPERATIONAL AMPLIFIERS

Differentator:

A circuit in which the output voltage waveform is the differentiation of input voltage is called
differentiator.as shown in fig. 1.

Fig. 1

The expression for the output voltage can be obtained from the Kirchoff's current equation
written at node v2.

Thus the output vo is equal to the RC times

the negative instantaneous rate of change
of the input voltage vin with time. A cosine
wave input produces sine output. fig. 1
also shows the output waveform for
different input voltages.

The input signal will be differentiated

properly if the time period T of the input
signal is larger than or equal to Rf C.

T ³ Rf C

As the frequency changes, the gain

changes. Also at higher frequencies the Fig. 2
circuit is highly susceptible at high
frequency noise and noise gets amplified.
Both the high frequency noise and problem
can be corrected by additing, few
components. as shown in fig. 2.
LECTURE - 14: APPLICATIONS

Current to voltage converter:

The circuit shown in fig. 1, is a current to voltage converter.

Fig. 1

Due to virtual ground the current through R is zero and the input current flows through R f.
Therefore,

vout =-Rf * iin

The lower limit on current measure with this circuit is set by the bias current of the inverting
input.

Example –1:

For the current to current converter shown in fig. 2, prove that

Fig. 2

Solution:

The current through R1 can be obtained from the current divider circuit.

Since, the input impedance of OPAMP is very large, the input current of OPAMP is negligible.

Thus,

LECTURE - 15: APPLICATIONS

Filters:

A filter is a frequency selective circuit that, passes a specified band of frequencies and blocks or
attenuates signals of frequencies out side this band. Filter may be classified on a number of ways.

1. Analog or digital
2. Passive or active
3. Audio or radio frequency

Analog filters are designed to process only signals while digital filters process analog signals
using digital technique. Depending on the type of elements used in their consideration, filters
may be classified as passive or active.

Elements used in passive filters are resistors, capacitors and inductors. Active filters, on the other
hand, employ transistors or OPAMPs, in addition to the resistor and capacitors. Depending upon
the elements the frequency range is decided.
RC filters are used for audio or low frequency operation. LC filters are employed at RF or high
frequencies.

The most commonly used filters are these:

1. Low pass filters

2. High pass filter
3. Band pass filter
4. Band reject filter.
5. All pass filter

Fig. 1, shows the frequency response characteristics of the five types of filter. The ideal response
is shown by dashed line. While the solid lines indicates the practical filter response.

Fig. 1
A low pass filter has a constant gain from 0 Hz to a high cutoff frequency fH. Therefore, the
bandwidth is fH. At fH the gain is down by 3db. After that the gain decreases as frequency
increases. The frequency range 0 to fH Hz is called pass band and beyond fH is called stop band.

Similarly, a high pass filter has a constant gain from very high frequency to a low cutoff
frequency fL. below fL the gain decreases as frequency decreases. At fL the gain is down by 3db.
The frequency range fL Hz to ∞ is called pass band and bleow fL is called stop band.

LECTURE - 16: FILTERS AND PRECISION DIODE

Second Order Low-Pass Butterworth filter:

A stop-band response having a 40-dB/decade at the cut-off frequency is obtained with the
second-order low-pass filter. A first order low-pass filter can be converted into a second-order
low-pass filter by using an additional RC network as shown in fig. 1.

Fig. 1 Fig. 2

The gain of the second order filter is set by R1 and RF, while the high cut-ff frequency fH is
determined by R2, C2, R3 and C3 as follows:

Furthermore, for a second-order low pass Butterworth response, the voltage gain magnitude is
given by
where,

Except for having the different cut off frequency, the frequency response of the second order low
pass filter is identical to that of the first order type as shown in fig. 2.

Filter Design:

The design steps of the second order filter are identical to those of the first order filter as given
bellow:

1. Choose a value of high cutoff frequency fH.

2. To simplify the design calculations, set R2 = R3 = R and C2 = C3 = C. Then
choose a value of C less than 1 µF.

3. Calculate the value of R using .

4. Finally, because of the equal resistor (R2 = R3) and capacitor (C2 = C3) values, the
pass band voltage gain AF has to be equal to 1.586. This gain is necessary to
guarantee Butterworth response. Therefore, RF = 0.586 R1. Hence choose a value
of R1= 100 kΩ and calculate the value of RF.

First Order High Pass Butterworth filter:

Fig. 3, shows the circuit of first order high pass filter.This is formed by interchanging R and C in
low pass filter.

The lower cut off frequency is fL. This is the frequency at which the magnitude of the gain is
0.707 times its pass band value. All frequencies higher than fL are pass band frequencies with the
highest frequency determined by the closed loop bandwidth of the OPAMP.

The magnitude of the gain of the filter is Fig. 3

If the two filters (high and low) band pass are connected in series it becomes wide band filter
whose gain frequency response is shown in fig. 4.

Fig. 4

LECTURE - 17: APPLICATIONS OF OPERATIONAL AMPLIFIERS

Active Full Wave Rectifier:

Method 1:

A full wave rectifier, or magnitude operator, produces an output which is the absolute value, or
magnitude, of the input signal waveform. One method of accomplishing full wave rectification is
to use two half wave rectifiers. One of these operates on the positive portion of the input and the
second operates on the negative portion. The outputs are summed with proper polarites. Fig. 1
illustrates one such configuration. Note that the resistive network attached to the ouput summing
opamp is composed of resistors of higher value than those attached to the opamp that generates
v1. This is necessary since for negative vin, v2 follows the curve shown above the node labled v2.
That is, as the input increases in a negative direction, v2 increases in a positive direction. Since
the input impedance to the non-inverting terminal of the summing opamp is high, the voltage, v+
is simply one half of v2 (i.e., the two 100KΩ resistors form a voltage divider). The voltage at the
negative summing terminal, v-, is the same as v+, and therefore is equal to v2 / 2. Now when vin
is negative, D2 is open, and the node v1 is connected to the inverting input of the first opamp
through a 5 KΩ resistor. The inverting input is a virtual ground since the non-inverting input is
tied to ground through a resistor. The result is that the voltage divider formed by the 100 KΩ and
5KΩ resistors. In order to achive a characteristic resembling that shown in the figure, this voltage
divider must have a small ratio, on the order of 1 to 20.

Fig. 1

Method 2:

The method of full wave rectification discussed above requires three separate amplifiers. One
simpler circuit or active full wave rectifier, which makes use of only two OPAMPs, is shown in
fig. 2. It rectifies the input with a gain of R / R1, controllable by one resistor R1.

Fig. 2
When v in is positive then v' = negative, D1 is ON and D2 is virtual ground at the input to (l).
Because D2 is non-conducting, and since there is no current in the R which is connected to the
non-inverting input to (2), therefore, V1 =0.

Hence, the system consists of two OPAMP in cascade with the gain of A1 equal to (-R / R1) and
the gain of A2 equal to (-R / R) = -1.

The resultant at voltage output is

vo = (R / R1 ) vin > 0 (for vin > 0 voltage output of (1) )

Consider now next half cycle when v in is negative. The v' is positive D 1 is OFF and D2 is ON.
Because of the virtually ground at the input to (2) V2 = V1 = V

Since the input terminals of (2) are at the same (ground) potential, the current coming to the
inverting terminal of (1) is as indicated in fig. 2.

The output voltage is vo = i R + v where i = v / 2R (because input impedance of OPAMP is very

high).

The sign of vo is again positive because vin is negative in this half cycle. Therefore, outputs
during two half cycles are same; and full wave rectified output voltage is obtained also shown in
fig. 2.

LECTURE - 18: APPLICATIONS OF OPERATIONAL AMPLIFIERS

Schmitt Trigger:

If the input to a comparator contains noise, the output may be erractive when vin is near a trip
point. For instance, with a zero crossing, the output is low when vin is positive and high when vin
is negative. If the input contains a noise voltage with a peak of 1mV or more, then the
comparator will detect the zero crossing produced by the noise. Fig. 1, shows the output of zero
crossing detection if the input contains noise.
Fig. 1 Figure 19.2

This can be avoided by using a Schmitt trigger, circuit which is basically a comparator with
positive feedback. Fig. 2, shows an inverting Schmitt trigger circuit using OPAMP.

Because of the voltage divider circuit, there is a positive feedback voltage. When OPAMP is
positively saturated, a positive voltage is feedback to the non-inverting input, this positive
voltage holds the output in high stage. (vin< vf). When the output voltage is negatively saturated,
a negative voltage feedback to the inverting input, holding the output in low state.

When the output is +V sat then reference voltage Vref is given by

If Vin is less than Vref output will remain +Vsat.

When input vin exceeds Vref = +Vsat the output switches from +V sat to –Vsat. Then the reference
voltage is given by

The output will remain –Vsat as long as vin > Vref.

Fig. 3 Fig. 4
If vin < Vref i.e. vin becomes more negative than –Vsat then again output switches to +Vsat and so
on. The transfer characteristic of Schmitt trigger circuit is shown in fig. 3. The output is also
shown in fig. 4 for a sinusoidal wave. If the input is different than sine even then the output will
be determined in a same way.

LECTURE - 19: SCHMITT TRIGGER AND RELAXATION OSCILLATOR

Example - 1

The Schmitt trigger circuit of fig. 1 uses 6V zener diodes with VD = 0.7 V. if the threshold
voltage V1 is zero and the hysteresis is VH = 0.2V. Calculate R1 / R2 and VR.

Fig. 1

Solution:

The normal output voltage of Schmitt trigger circuit will be either +V O or –VO,
Where, VO = VZ + VD
= 6.7 V

Let the output voltage be +VO. The voltage V1 can be obtained from the voltage divider circuit
consisting of R1 and R2.

When vin > V1 then vo = -VO

Therefore, upper trigger point voltage will be given by,
Similarly, the lower trigger point voltage will be given by,

Therefore, the hysteresis voltage is

Since, the threshold voltage v1 is zero,

Therefore,

Relaxation Oscillator:

With positive feedback it is also possible to build relaxation oscillator which produces
rectangular wave. The circuit is shown in fig. 2.

Fig. 2
In this circuit a fraction R2/ (R1 +R2) = b of the output is feedback to the non-inverting input
terminal. The operation of the circuit can be explained as follows:

Assume that the output voltage is +V sat. The capacitor will charge exponentially toward +V sat.
The feedback voltage is +bV sat. When capacitor voltage exceeds +bV sat the output switches from
+Vsat to -Vsat. The feedback voltage becomes -Vsat and the output will remain –Vsat. Now the
capacitor charges in the reverse direction. When capacitor voltage decreases below –bVsat (more
negative than –bVsat ) the output again switches to +Vsat.This process continues and it produces a
square wave. Under steady state conditions, the output voltage and capacitor voltage are shown
in fig. 2. The frequency of the output can be obtained as follows:

The capacitor charges from -β Vsat to +β Vsat during time period T/2. The capacitor charging
voltage expression is given by

This square wave generator is useful in the frequency range of 10Hz to 10KHz. At higher
frequencies, the slew rate of the OPAMP limits the slope of the output square wave.

LECTURE - 20: APPLICATIONS OF OPERATIONAL AMPLIFIERS

Triangular Wave Generator:

In the relaxation oscillator discussed in the previous lecture, capacitor voltage V C has a near
triangular wave shape but the sides of the triangles are exponentials rather than straight line. To
linear size the triangles, it is required that C be charged with a constant current rather that the
exponential current through R. The improved circuit is shown in fig. 1.

Figure 21.1

In this circuit an OPAMP integrator is used to supply a constant current to C so that the output is
linear. Because of inversion through the integrator, this voltage is fedback to the non-inverting
terminal of the comparator rather than to the inverting terminal. The inverter behaves as a non-
inverting schmitt trigger. The voltage vR is used to shift the dc level of the triangular wave and
voltage vs is used to change the slopes of the triangular wave form is shown in fig. 2.

Fig. 2

To find the maximum value of the triangular waveform assume that the square wave voltage v Ois
at its negative value = -Vsat. With a negative input, the output v (t) of the integrator is an
increasing ramp. The voltage at the non-inverting comparator input v1 is given by
When v1 rises to VR, the comparator changes state from - Vsat to +Vsat and v(t) starts decreasing
linearly similarly, when v1 falls below vR the comparator output changes from +vsat to -vsat.
Hence the minimum value of triangular vmin occurs for v1 = vR. Hence the peak value Vmax of the
triangular waveform occurs for v1 = VR.

Therefore,

The peak to peak swing is given by

The average output voltage is given by .

If VR = 0, the waveform extends between -Vsat (R2 / R1 ) and +Vsat (R2 /R1).
The sweep times T1 and T2 for Vs = 0 can be calculated as follows:
The capacitor charging current is given by

where, vc = -vout is the capacitor voltage.

For vout = -Vsat, . Therefore,

When the output voltage of first OPAMP is +Vsat, then, the voltage v1 is given by