A Low Cost Approach1 to Improve the Performance of an Adjustable Speed Drive (ASD) under Voltage Sags arid Short-Term

Power Interruptions.

*Jest L. DurAn G6mez, Student Member IEEE, h a s a d N.Enjeti, Senior Member IEEE,
*PowerQuality Laboratory Department of Electrical Engineering Texas A&M University College Station, TX. 77843-3128 Tel: (409) 845-7466. Fax: (409) 845-6259
**

* I

Byeong Ok Woo

Power Electronics Laboratory LG Industrial Systems 533 Hogae-dong Anyang-shi Kyongki-do Korea email: bowoo@tamu.edu

http://powerquality.tamu.edu
Email: enjeti@tamu.edu

Abstract Voltage sags are a common occurrence in industrial power distribution systems. Although a typical sag may last only 520 cycles and voltage magnitude Power than 20% of its rated value can trip an adjustable speed ac drive (ASD). Such a riuisance tripping of a continuous industrial process can be very costly. In this paper, a low cost approach to improve the performance of an ASD under voltage sag and short term interruptions is presented. The approach consists of a low cost modification (addition of three diodes, D,, Ds, Ds and an inductor L, Fig. 4) to the front end diode rectifier topology. This modification d o n g with the dynamic braking IGB'I' (Qdb) control (standard component in a ASD) is shown to provide ride-through capability for voltage sags. Further, it is shown that with the addition of the diode Dlo and battery E (Fig. 4) the ridethrough capability can be extended to shortterm power interruptions also. The IGBT Qat, is suitably controlled in the event of a sag to maintain rated dc-link voltage in closed loop, thus avoiding any nuisance tripping o r momentary speed fluctuations. A 460 V, 10 hp commercially available ASD is modified with the proposed approach. Analysis, design and simulation results are discussed. Experimental results illustrating the performance of the ASD with the proposed ride-through topology for a wide range of voltage sag conditions are presented.

1. INTRODUCTION. A voltage sag, or voltage dip is a reduction of the voltage (e& Fig. 1) at a customer position with a duration of between one cycle and a few seconds. Voltage sags are caused by motor starting, short circuits and fast reclosing of circuit breakers. Voltage sags normally do not cause equipment damage but can easily disrupt the operation of sensitive loads such as electronic adjustable speed drives (ASDs) [l]. A sever voltage sag can be defined as one that falls below 85% of rated voltage. Power quality surveys are a common practice and frequently appear in the literature [1,2,5]. According to these surveys, voltage sags are the main cause of disturbances.

Time

Fig. 1 (a) Typical voltage sag on one phase, (b) dc-link voltage

vo.

For example, in the survey reported in [3], 68% of

the disturbances registered were voltage sags, and were the only cause of production loss. This loss w s caused by voltage drops of more than 13% of a

0-7803-5006-5/98/$10.00@1!>98 IEEE.

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rated voltage and a durai.ion of more than 8.3ms (112 cycle). Reference [2i states that a little more than 62% of the disturbances recorded were voltage sags with a duration of less than half a second (30 cycles). A recent study (17-month period) [l] conducted at two industrial site!; with ASDs, it was concluded that voltage sags with a duration of 12 cycles or more and lower than 20% voltage drop will trip out the ASD irivo1vt:d in a continuous process. comparingdata with the this curve" published in [1,4] estatilishes that modern ASDs appear to be more sensitive than data processing equipment. In textile and paper mills brief voltage sag may potentially cause an ASD to introduce speed fluctuations which can damage the end product. Further a brief voltage sag also causes a momentary decrease in dc-link voltage biggering an under voltage trip or result in an over current trip. Such nuisance tripping of ASD equbment employed in continuous-process industries contributes to loss in revenue and can incur othcr costs. Fig, I(a) shows a typical voltage sag (one phase) and Fig. l(b) shows the corresponding dclink voltage. The drop in dc-link voltage exceeds the trip-level in most ASDs and is the frequent cause for nuisance tripping. Fig. 2 shows a boost topology to maintain tht: dc-l ink voltage under voltage sags [8]. Upon thc occurrence of a voltage sag the IGBT (Fig. 2) is iurned ordoff to maintain the dc-link voltage Vo at near rated condition. The disadvantages of this approach (Fig. 2) are, (a) Diode 'D' is in the series path of power flow. (b) Inductor 'L'is essential. is bulky and is in the series path of power flow. Also L carries high frequency current during the boost mode when voltage sags occur. Other methods to pro\ ide ride-through consists of , (a) Motor generator sets, [ l 7 l I]. (b) Flywheel energy storage I . 0 711 (c) Super conductor magnetic energy storage (SMES) [7,10]. A 1 of the above options are prohibitively 1 expensive. In response to thest: concerns, this paper examines a low cost approach to improve the performance of an ASD under voltage sags and short-term power interruptions.

Fig. ! Conventional boost topology design to provide ridethro'lgh for "Itage sags 18]'

''he integrated boost converter approach (Fig.

4) c-mploys three additional diodes, inductor L

along with the existing dynamic braking IGBT harcware, (a standard component in a ASD) to prolide for ride-through. Upon detection of a voltige sag, the IGBT Qdb (Fig. 4) is suitably controlled. Diodes D4 , Dg, D2 and D7, Ds, Dg and IGBT Qdb now operate in boost mode and the dclink voltage is maintained at its rated value. This metitod of control provides ride-through for most common voltage sag conditions. Fig. 4 also shows an option to the proposed topology with the addition of Dlo and E. This enables ride-through undc:r short-term power interruptions also. '('he proposed approach has the following advi mtages: (i) I ow cost, due to minimal additional hardware i nd control. (ii) Yo power semiconductor components in the inain power flow path of the ASD. (iii) The proposed modification can be easily integrated into a standard ASD. The proposed integrated boost converter appioach [12] is connected in shunt and its VA ratirg is a Fraction of the ASD rating. Analysis, design and simulation results are discussed in the pap1.r. Experimental results on a 460V, 10 hp ASD equipment subjected to a variety of voltage sags in a 1.1boratory is presented to demonstrate the effe,:tiveness of the proposed system.

2.

INTEGRATED BOOST CONVERTER APPROACH TO IMPROVE RIDETHROlJGH PERFORMANCE. The integrated boost converter approach consists of a low cost modification (addition of threib diodes. D7, Dg, Ds, and an inductor L, Fig. 4) to ti e front-end rectifier topology in a commercial ASK). These diodes supply a rectified output voltirge to the boost converter consisting of the induztor (L). IGBT (Qdb) and diode Ddb.As it was

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pointed out earlier, IGBT (Qdb) ;tnd diode (Ddb) are already available in a commerci;il ASD as a part of the dynamic braking feature. ?'he IGBT (Qdb) is turned o d o f f at a constant switcl ling frequency (fJ. The switch duty cycle is varied in the event of a voltage sag via feedback. During the off time energy stored in the inductor (I.) is transferred to the dc-link. Further, in Fig. 4 diode and an energy source E such as batteries, call be added as an option to provide ride-through of the connected load under short-term power interruptions. The main advantage of the integratcd boost converter approach is the absence of additional power semiconductor in the main powe c flow path and its low cost features. Further, the ratings of the

additional components are only a fraction of ASD rating.

Fig,

adjustable speed drive (ASD)

Three-phase electric utility

Three-phase diode rectifier

DC-Link Proposed ride-through topology for voltage srgslshort term interruptions.

PWM Inverter

Induction Motor Load

Input voltage sense for sags and short term interruptions

feedback

Fig. 4 Proposed Integrated Boost Converer approach with an optional diode Dlo and energy storage E for short-term power interruptions

WI.
3. ANALYSIS OF THE PROPOSED APPROACH.
Fig. 4 illustrates the proposal approach. In Fig. 4, diodes D7, D8, D9 and D4, D6, D2 form an additional three-phase rectifier bi idge. The inductor L along with Qdb and Ddb form a boost converter. Upon the detection of an input voltage sag, control of IGBT Qdb is initiated. Hence. during a sag the dc-link power is supplied by the I ectifier diodes D7, D8, D9, D4, Dg, D2 and the boosi converter (L, Qdb and Ddb). In this section, analy:.is is presented to limit the peak inductor currcnt and calculate component ratings.

3.1 Peak Inductor Current.

Under voltage sag the IGBT Qdbis turned odoff with a duty ratio 'D' adjusted in closed loop. Assuming high switching frequency, discontinuous operation of the boost stage

L IL L
ton

Jz* vu*,

(1)

Where, VIL,sss- RMS line to line voltage under voltage sag condition. IL,peakPeak inductor current of L. ". - On time of IGBT Qdb. ,t

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Equation (1) can be modified a:;

voltage: at the required dc-level. Fig. ,5 (c) to (e) show the input line currents. Line current magnitude in phase b and c increase as phase A is experiencing a sag.
50~);

and

L= fi*vu,sag
f T

*Dmm

*Lprtrk

(3)

Voltage sag ma ni tude = 50 R of rated line neutral voltaae

10

I
I

Where,

D ,
switch.

- Maximum duty cj.cle of the boost

f, - Switching frequency of the boost

stage. For a given , D,,,, f, and ILpeak, the inductor Lvalue can be computed. Also IL,peak is the peak current rating of the IGB?Qdb and Ddb.

3.2 Design Example. In this section a design example is illustrated for a 460 V, 10 kW, ASD system. Assuming:

vu,,,,,, to line rms voltage) = 46QV (line

4, (output power) = l o k w .

v, (dc-link voltage) = 1.35*v,

I , (dc-linkcurrent)

= 620v

- P -17 v,,
0

39Amp

I, (input line current rms) =

Assuming I L,peal = 2 * I = ~ O A and a switching frequency

t o

- * I = 15A
of

I&
U

1.55

1.65

0.75
(1 1

1.15

1.95

1.85

I(LI)

line

f, = 1 O.OkHz, Dmax 0.5 , = W: i equation (3) L = 0.542mH

have

from

Fig. 5 Simulation results of the proposed approach (Fig. 4), (a) voltage sag on phase a line to neutral voltage, (b) dc-link voltage, 1.c) line current i,, (d) line current ib, (e) line current i,.

(4)

4. SIMULATION RESULTS Simulation of the ASD system with the integrated boost converter approa:h is performed on PSPICE. An ideal switch was used in place of the IGBT, Qdb. Fig. 5 shows the results. Fig. 5 fa) illustrates the occurrence of the sag on phase A line to neutral voltage at 0.5 sec. A reduction in voltage magnitude of 50 T lasting 30 cycles is shown. Fig. o 5 (b) shows the dc-link voltage before and during the occurrence of the sag. Notice that the boost module is successful in maintaining the dc-link

5. EXPERIMENTAL RESULTS. A 10 hp, 460 V commercially ASD was modified with the integrated boost converter approach (Fig, 4). Fortunately, sufficient room was available on the heat sink for the placement of diQdes D7, D8, D .The dynamic braking IGBT Qdb g gating signals were re-routed to a sag correction control hardware shown in Fig. 4. A three phase programmable ac power source (480V, 54 kVA) was employed to create a sag on phase A when the ASD was powered. Figs. 6(a) and 6(b) show the experimental performance of the ASD under voltage sag when the proposed boost module was dis-enabled. Notice

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the reduction in the dc-link vo1t;ige during the sag. Also from Fig. 6(b), notice the line current i, collapses to zero during the sag an phase A due to the reverse bias of the diodes in phase a. Fig. 7 shows experimental results for the performance of the ASD under a 50 % voltage sag. The top trace in Fig. 7 shows thz compensation of the dc-link voltage on the event 13f the voltage sag, (middle trace in Fig. 7), with a duration of 0.500 sec (30 cycles). The dc-link voltage was compensated by the ride-through approach by operating the integrated boost c(Inverter during the sag. That is, the IGBT (Qdb) is switched at a switching frequency of 10 kHz t.)operate the boost module in Fig. 4. Also, the 1ou;er trace in Fig. 7 shows the boost inductor current IL on the turn o d o f fconditions.
Tek p I l.OOkS/s Iw
I.

1*

Fig. 7 Experimental results for a 50 % voltage sag magnitude voltage sag with the integrated boost converter approach 1 on phase a, 2.1 dc-link voltage with an increased IGBT duty cycle 4 -+boost inductor current iL,

..,....,.,.., ...,....,..,.,.

E.,-

178 Acqs

-T--

___. . _ _ . _

,-

6. CONCLUSIONS. In this paper a low cost approach to improve the performance of an ASD under voltage sag and short-term power interruptions has been proposed. The approach requires the addition of only three additional diodes and minimal control modifications. Simulations and experimental results demonstrate performance improvements.

AKNOWLEGMENT The author, J.L. DurhG6mez would like to recognize to CONACYT (Consejo Nacional de Ciencia y Tecnologia ) Mexico and ITCH (Instituto Tecnoldgico de Chihuahua) Mexico for the support given during his doctoral studies and research at Texas A&M University. Also ASD equipment donation from Toshiba industrial drives, Houston, TX is acknowledged. REFERENCES [l] H. G. Sarmiento, E. Estrada, A voltage sag
study in an industry with adjustable speed drives, IEEE Industry Applications Magazine, JanuaryEebruary 1996. [2] Wandell W. Carter, Control ofpower quality in modern industry, IEEE Annual Textile Industry Technical Conference, Cat. #89CH2697-1, 1989, pp. 11/1-4. [3] J. E. Flory, et al, The electrical utilityindustrial user partnership in solving power quality problems, IEEE Transactions on Power Systems, vol. 5, no. 3 (August 1990), pp 878886.

(b) Fig. 6 Experimental results on an ASI.? for a voltage sag on phase a without the integrated boost converter approach. (a) 1 voltage sag on phase a, 2 3 dc-link voltage, (b) 1 -+

line current i,, 2 4 line current it,. 3

+I .ne current i,.

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[4] V..E..Wagner, IEEE Recomme ided practice for

.>I,..

emergency 3&d itindby power for commercial and industrial applications (LiNSVIEEE Std. 446- 1987). [ 5 ] V. E Wagner, A. A. Andreshak and J. P. Staniak, Power qualicy and factory automation, IEEE Iransaztions on Industry Applications, July/Aup. 1990. [6] M. H. J. Bollen, Voliagc: sags: effects, mitigation and predict ion, Power Engineering Journal, Juns 1996. [7] A. Braz, P. ::lofmann, R. Miiuro, C. J. Melhorn, An evaluation of energy storage technique for improving ride-through capibi ity for sensitive customers on underground networks, Industrial and Commercial Power Systems Technical Conference, IEEE 1996. [8] EPRI Powcr Electronics Application Center, Brief No. 34, Performance of an ASD ridethrough device during voltag: sags, PQTN Power Quality Testing Network, May 1996.

[9] EPRI Power Electronics Application Center, Power quality considerations for adjustable peed drives, Part 2: Nuisance Tripping I Zoncern:;, 1991. [lo N. S . , Tunaboylu, E. R. , Collins, Jr. and S . Y., Middlekauff, Ride-through issues for dc aotors drives during voltage sags, roceedings IEEE Southeastcon 95, Visualize I he Future, March 1995, pp. 26-29. [I 1 A. Van Zyl, R. SpeC, A. Faveluke and S. <howmil<, Voltage sag ride-through for idjustable speed drives with active rectiJiers, EEE Industry Applications Society, Annual deeting, 1997. [ 12 Method and System for an Adjustable Speed >rive under voltage sags and short-term power nterrupt .oris", US. patent pending, Texas \&M University System.
( .

I.

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