Design Methodology for Shunt Active Filters

Fabio Ronchi, Andrea Tilli

Department of Electronics, Computer and System Sciences (DEIS), University of Bologna Viale Risorgimento 2, 40136 Bologna, ITALY phone: +39 051 2093069, fax: +39 051 2093073 e-mail: fronchi, atilli @deis.unibo.it

Keywords
Active lter, design, harmonics, three-phase systems.

Abstract
This article deals with the design of a three-wire shunt active lter based on a AC/DC converter. A methodology to select suitable values of the components is presented for two design objectives. The rst one is to select components values strictly dependant on the level of current distortion imposed by the load. The second goal is to nd the minimum capacitor value necessary to compensate all the possible loads compatible with a specic current size of the switches. Both the algorithms are based on a model inversion and are control-oriented.

Introduction
Nonlinear loads produce current harmonics that pollute the network mains and can disturb all the devices expected to work with sinusoidal voltages and currents. This fact increases costs and reduces performances for both energy consumers and providers. Several schemes and control techniques have been proposed in the past years, often assuming that all the components are well sized, or at least that they do not affect the control algorithm performance [1], [2], [3], [4]. The rst step in designing an active lter is to select suitable components values. This allows to reduce costs and avoids a lot of control problems. The aim of this paper is to present an algorithm to properly select the hardware components of a very simple and usual scheme of shunt active lter. The rst design methodology presented is based on the knowledge of the harmonic spectrum of the load currents. It allows to select the minimum hardware components values that make the lter capable to compensate for the distorted currents. The second design algorithm is related to the peak current of the bridge switches. It permits to nd the minimum hardware component values that make the lter capable to compensate for all the loads which have distorted currents smaller than the maximum currents allowed for the switches. Both the design procedures can be iterated to improve performances, for example considering if a higher sample frequency and a higher capacitor voltage can be chosen. In the rst paragraph some hypothesis and basic design considerations are presented. In the second one the model of the shunt active lter is shown. In the third one the choice of the inductance value is discussed. The other two paragraphs present the two design methodologies, the rst one is indicated as load-based, the second one as switches-based. Conclusions summarize the contents of the article.

1 Preliminaries
In this section some denitions, assumptions and preliminary design considerations are presented.

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2. The mains voltages and equilibrated.

are co-sinusoidal of frequency

where M is equal to innity according to the Fourier analysis. However, only a reduced number of harmonics is considered for the compensation, owing to limited bandwidth of the controlled inverter. 5. Inductors are modelled as pure inductances L. 6. The six-switches-bridge is supposed ideal. 7. The maximum current of the devices implementing the bridge switches is . It is worth underlining that several shunt active lters can be parallel connected to the same load, providing a suitable coordinating strategy to increase the compensated current. 8. The steady-state capacitor voltage must be kept inside the range . The upper bound depends on the kind of capacitor chosen and on the number of series connected capacitor banks. Hence, it can be assumed chosen before starting the design procedure. The lower bound depends on the controllability constraints, as explained in section 4. 9. The shunt active lter has to produce currents opposite to the load distorted ones. It will be assumed that the control techniques implemented are able to assure this behavior.
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It is useful to write the model also in a d-q reference frame, aligned to the mains voltage vector. In this frame mains voltages and load currents can be written as

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can assume only 7 values at the time , which correspond to the vertexes of the hexagon of Fig. 2. The region included in this hexagon corresponds to the that can be obtained as mean values in a PWM period. The status equations of the lter are:

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Let

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From the sum of the three scalar equations above, it can be found that

2 Shunt active lter model

and the status equations (1), (2) become

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Figure 3: current ripple worst case

3 Minimum value of inductance

The minimum value of inductance is calculated in a way that does not depends on the loads, so that it is the same for both the design objectives and can be previously calculated. causes current ripple, that must be kept less than a The use of PWM techniques to obtain the reference values maximum value in order to bound high frequency distortion.
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The ripple worst case is in the middle of an hexagon side, as illustrated in Fig. 3. In this situation the peak to peak current ripple is, assuming that the capacitor voltage is constant in a PWM-period,
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4 Load-based approach
Currents that have to be compensated can be written as in (3). In order to reach an unitary power factor, the only load current component that the lter must not compensate for is because
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Therefore the lter currents that should be tracked are

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Figure 4: currents hexagon These currents can be effectively imposed by the active lter if
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An easy way to check this condition is to consider the inscribed circle in the hexagon of Fig. 4, which is obtained . If there is a considering that each projection of the current vector on the three-phase axes must be less than current that can not be obtained, then the number of harmonics to be compensated by the shunt active lter must be reduced, or the opportunity to connect two active shunt lters to the same load can be considered. Choosing an inductance value , the voltages at the input of the six-switches-bridge can be calculated.
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These voltages must be feasible, that is always inside the hexagon of Fig. 2. This implies that the inductance value must be as low as possible (that is ) and it can also be useful to determine the lower bound of the capacitor voltage. Hence, approximating the hexagon of Fig. 2 with the inscribed circle and imposing that
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a design equation for

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If the inequalities above can not be adequately satised, one of the following actions must be considered: Change the type of capacitor in order to adopt a higher Reduce the number of harmonics considered. Reduce the inductance value, tolerating a higher current ripple. .

The reference instantaneous power at the input of the six-switches-bridge can now be calculated. According to the hypothesis that the bridge is ideal, it must be equal to the one of the capacitor.
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An interesting example of application of this methodology is the following. Considering a six pulse diode bridge rectier with a resistance of as load; assuming , a capacitance is obtained.

5 Switches-based approach
The aim of this section is to nd the capacitor value that makes the lter able to compensate for the worst load, compatible with the maximum current allowed by the switches. If this value is not very expensive, a shunt active lter can be designed only knowing the amount of current that have to be compensated. In order to make the load currents the only varying parameters during the optimization procedure, the other values must be xed. The inductance value is chosen equal to the minimum one calculated with (4). The minimum capacitor is chosen sufciently low to make simple the capacitor voltage control and feasible the capacitor value voltage resulting from the optimization procedure. For instance, if a reasonable value can be . The maximum harmonic number M to be compensated is chosen according to the sampling frequency and to the performances that the lter is expected to have. In order to simplify the algorithm, the lter current spectrum are expressed in d-q, so that
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This value must be calculated with the following constraints

switches currents must be less than the maximum allowed, that is the current vector must be inside the hexagon of Fig. 4. This can be easily checked approximating the hexagon with its circumscribed circle; output controls must be valid, that is the vector must be inside the hexagon of Fig. 2. This can be easily checked approximating the hexagon with its circumscribed circle;
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The array z of the parameters that the algorithm changes in order to nd the worst magnitudes and the phases, so there are degrees of freedom. The goal is to nd
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Figure 5: Worst case power and worst case energy, 7 harmonics This algorithm can be applied using the Matlab Optimization Toolbox (fmincon) [5], and the result is that the is an approximately square wave. worst For example, assuming , , , and considering the worst power prole and the related energy are presented in Fig. 5. The resulting capacitor value is . Increasing the number of harmonics considered, becomes more similar to a square wave, and the related capacitor value increases, reaching considering 16 harmonics.

6 Distorted mains voltages

If the mains voltages are distorted, then the capacitor has to provide more energy to the load and its value must be bigger than the one calculated. If the mains voltages are sinusoidal, balanced and equilibrated, then the load instant power is the one calculated in (5) , which mean value is equal to zero. and the only power that the lter must deliver is If the mains voltages are distorted, then
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and load power becomes

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The above equation shows that the shunt active lter has to provide more power to the load, which mean value can also be different from zero in a PWM period. Hence, also assuming that the power mean value becomes zero in a larger time, the capacitor value must be increased in order to accumulate more energy.

Conclusions
Two design methodologies for an usual shunt active lter scheme have been presented. The rst considers the particular load that has to be compensated and allows to nd suitable values for the hardware components of the lter. The second one considers the peak current allowed by the bridge switches and nds the capacitor value that makes the lter capable to compensate for all the loads compatible with the system constraints.

References
[1] S.Saadate J.H.XU, C.Lott and B.Davat. Simulation and Experimentation of a Voltage Source Active Filter Compensating Current Harmonics and Power Factor. Ind. Electron., Control and Instrument., IECON94, Volume 1: Page(s) 411415, 1994. [2] Kamal Al-Haddad Bhim Singh and Ambrish Chandra. A Review of Active Filters for Power Quality Improvement. IEEE Tran. on Ind. Electron., Volume 46: Pages 960971, 1999.

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[3] A.H.Noyola W.M.Grady, M.J.Samotyj. Survey of Active Power Line Conditioning Methodologies. IEEE Tran. on Power Deliv., Volume 5: Page(s) 15361542, 1990. [4] J.W.Dixon L.A.Moran, L.Fernandez and R.Wallace. A Simple and Low-Cost Control Strategy for Active Power Filters Connected in Cascade. IEEE Tran. on Ind. Electron., Volume 44: Page(s) 621629, 1997. [5] A.Grace T.Coleman, M.A.Branch. Matlab Optimization Toolbox Users Guide. The MathWorks Inc., 1999.