3-Phase AC Induction Motor

ACI3-1 System Documentation
Variable Speed Control of 3-Phase AC Induction Motor
Digital Control Systems (DCS) Group
SPRU438 September 2000
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Contents
Contents
1 2 System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Hardware and Software Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Loading and Building CC Project for Assembly Case . . . . . . . . . . . . . . . . . . . . . . . 5 2.3 Loading and building CC Project for C Case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Incremental System Build Phase 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 Phase 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Incremental System Build Phase 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1 Incremental System Build Phase 2a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2 Incremental System Build Phase 2b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Incremental System Build Phase 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1 Incremental System Build Phase 3a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3 4
Module Documents BC_CALC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CAP_EVENT_DRV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DATA_LOG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FC_PWM_DRV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FC_PWM_O_DRV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RAMP_CNTL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SPEED_PRD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SVGEN_MF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V_HZ_PROFILE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21 26 30 35 39 43 48 55 66
Figures
Figures
1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 3-Phase ACI Motor Drive System Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Software Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Phase 1 Incremental Build for ACI1-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 CC Window for Phase 1 Incremental Build of ACI3-1 Showing Line to Neutral Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 CC Window for Phase 1 Incremental Build of ACI3-1 Showing Line to Neutral (Ta or Van) and Line-to-line Waveform (Vab) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Phase 2a Software Block Diagram for ACI3-1 System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 CC Display Window With dlog_iptr1=Mfunc_c1, dlog_iptr2=Mfunc_c2, direction=0 (wave 1 leads wave 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 CC Display Window With dlog_iptr1=Mfunc_c1, dlog_iptr2=Mfunc_c2, direction=1 (wave 1 lags wave 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Complete Hardware Setup for Phase 2b Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Software Block Diagram for Phase 3a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 CC Window for Phase 3a Commanded Speed is 1800RPM, Open-loop speed is 1777RPM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Software Block Diagram of Phase1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Software Block Diagram of Phase2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Software Block Diagram of Phase3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
ii
ACI31 Variable Speed Control of Phase AC Induction Motor

The ACI3-1 offers the following:
- Open-loop V/Hz control - Space Vector PWM - Closed-loop speed control
Topic
1 2 3 4 5
Page
System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Hardware and Software Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Incremental System Build Phase 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Incremental System Build Phase 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Incremental System Build Phase 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
System Overview
System Overview
Figure 1 shows the complete system diagram for a three-phase ACI motor drive. A three phase voltage source inverter is utilized to operate a three pahse ACI motor. Six PWM channels from DSP controller regulates the motor phase voltages by controlling the six power devices. One capture input is utilized to measure the motor speed.
Figure 1. 3-Phase ACI Motor Drive System Diagram
PWM1 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6
PWM3
PWM5
ACI 3 phase
x24xx DSP
PWM2
PWM4
PWM6 CAP1
CAP1
Tacho
This document describes the 3-phase ACI ac induction motor using TMS320F240t/TMS320F243/ TMS320F2407 DSPs. The system implemented here is called ACI3-1 and uses the following software modules:
-
BOX_CAR CAP_EVENT_DRV DATA_LOG FC_PWM_DRV RAMP_CNTL SVGEN_MF SINTB60 SPEED_PRD SYS_INIT V_Hz_PROFILE
The ACI3-1 System has the following properties: ASM Program Memory ASM Data Memory C Program Memory C Data Memory Development/Emulation Target controller H/W Power Inverter H/W Motor Type 1700 words 224 words 1692 words* 164 words* Code Composer 4.1 (or above) with real-time debug Spectrum Digital F240/F243/F2407 EVMs Spectrum Digital DMC1000/DMC1500 Three-Phase AC Induction (4 pole)
SPRU438
System Overview
PWM frequency PWM mode Interrupts Main sampling loop Peripheral Resources Used
20 kHz (Timer T1 based) Symmetrical with Dead band 1 (Timer 1 underflow) 20 kHz Timer 1, PWM 1/2/3/4/5/6, 2 ADC Channels
*Note: The C version of the software at this time excludes the modules DATA_LOG RAMP_CNTL, and BOX_CAR.
Figure 2. Software Flowchart
_c_int0
INT2 interrupt
Initialize software modules
Save contexts and clear interrupt flags
Initialize timer T1 and realtime monitor
Execute the selected incremental build
Enable T1 underflow interrupt and core interrupt INT2
Execute DATA_LOG module
Initialize other system parameters and incremental build options
Restore contexts
Return
Background loop
INT2
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Hardware and Software Configuration
2.1
Hardware
The experimental system consists of the following hardware components:
- Spectrum Digital DMC1000 or DMC1500 drive platform; - TMS320F240, TMS320F243, or TMS320F2407 EVM platform - Spectrum Digital DMC to EVM Interface board; - Three Phase AC Induction(ACI) motor - IBM compatible development environment including an IBM compatible PC with Code
Composer 4.1 or higher installed and XDS510pp emulator. Refer to the Users Guides and or Manuals for configuration of the above items and their connection to the system. Table 1, Table 2, and Table 3 show some of the other system level choices that must be made.
Table 1.
Configuration for DMC1000

Jumper Number P19P20 P16P18 Jumper Setting Connect these for ac input neutral connection Connect these for full bridge rectifier front-end configuration only Connect these for voltage doubler front-end configuration only Install all jumpers Remove jumper Install jumper on pins 23 Donot use DMC1000/1500 boards in voltage doubler mode with 220VAC input. Use 3-Phase power inverter configuration Use DC bus current sense resistor R5. Use DC bus overcurrent condition to generate PDPINT. Use the potentiometer resistor R19 to adjust the signal Vtrip. This will set the maximum DC bus current. Disable PFC circuit Vccp=Vcc Use s/w to enable/disable DMC1000 PWM signals Comments
P16P17
JP1, JP2, JP3 JP4 JP17
JP19 JP20 JP22
Install jumper on pins 12 Install jumper on pins 23 Install jumper on pins 12
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Table 2.
Configuration for DMC1500

Jumper Number P21P22 P15P17 Jumper Setting Connect these for ac input neutral connection Connect these for full bridge rectifier front-end configuration only Connect these for voltage doubler front-end configuration only Install all jumpers Remove jumper Install jumper on pins 12 Install jumper on pins 12 Donot use DMC1000/1500 boards in voltage doubler mode with 220VAC input. Use 3-Phase power inverter configuration Use DC bus current sense resistor R6 Disable PFC circuit Use s/w to enable/disable PWM signals on DMC1500 Comments
P15P16
JP1, JP2, JP3 JP4 JP17 JP27
Table 3.
Configuration for DMC to EVM Interface Board

Jumper Number JP1 JP2 Jumper Setting Remove jumper Install jumper Comments
2.2
Loading and Building CC Project for Assembly Case

In order to use the CC workspace file in C:\TI\DCS\ACI3_1 directory, all the assembly modules in the modular library must be copied into C:\TI\DCS\ACI3_1 directory. The assembly files needed for this system are Box_car, Cap_drv, data_log, PID_ID, pwmodrv, rmp_cntl, SINTB60, speed_pr, svgen_mf, sys_init, vhz_prof. The other files in this directory are:
- The ACI system assembly file ACI31_x1.asm; - The linker command file, ACI31_x1.cmd, that defines memory map and specifies
memory allocation;
- Two header files rtvecs.h and x24x_app.h - CC real time monitor related files c200mnrt.i and c200mnrt.obj - CC project file ACI3_10.mak - CC workspace files (aci3_1_phase1, aci3_2_phase2) which contain the setup infor-
mation for the whole project and debugging environment. It is also assumed that the emulator used is XDS510pp. Once the directory C:\TI\DCS\ACI3_1 contains all the necessary files (as mentioned above), the next step
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ACI31
is to provide the supply voltage(+5V DC) to the F243/LF2407 EVM and RESET the emulator. Then start the Code Composer and open the project ACI3_10.mak. Now load the workspace file aci3_1_phase1.wks. Loading the workspace will automatically open up the project file ACI3_10.mak and show all the files relevant to the project. The following shows the expanded project view as part of CC environment aci3_1_phase1wks is loaded:
Note that the same project can be built from scratch easily if the workspace file, aci3_1_phase1wks, cant be loaded directly because of differences in CC setup and or emulator used. Refer to CC tutorial for information on a building project. The variables in the Watch Window can be added manually according to CC tutorial. From the PROGRAM LOAD OPTIONS in CC select Load Program After Build for automatic loading of the program to the target once the program is compiled.
2.3
Loading and building CC Project for C Case

The process for loading and building the C version of the ACI31 system is same as the assembly case with the following exceptions:
- Modules: The modules DATA_LOG, RMP_CNTL, and BOX_CAR are excluded at
this time. The variable outputs that are directed to the DATA_LOG module in ASM are directed to the EVMDAC. The EVMDAC has pointers to the variables that must be set to the variables that are to be output.
SPRU438
For instance suppose a variable alpha, that is in the SVGEN structure svgen, is to be output to the DAC Channel 3. The following code is used to set the pointer:
dac.qptr3=&vhz.svgen.alpha;
( Since the structure SVGEN itself is a member of the structure vhz , the full variable name is vhz.svgen.alpha )
- Incremental Build Control: The build level is set in build.h in the C infrastructure.
This header file is in the aci31\aci31_010\include\ directory. To set the build level set the BUILDLEVEL symbol to one of the available choices.
/* Following is the list of the Build Level choices. */ #define LEVEL1 1 #define LEVEL2 2 #define LEVEL3 3 /* This line sets the BUILDLEVEL to one of the available choices. */ #define BUILDLEVEL LEVEL3
[This is also included in by the system and algorithm source files, and so is visible in the include folder in the Code Composer project window.] To set the build level to 2, use the following
#define BUILDLEVEL LEVEL2
- The target processor selection is in the file TARGET.H. This file appears in the
code composer project as well, or can be found in the directory

aci31\aci31_010\include\
To change the selection of the processor set the TARGET macro to a different available choice.
/* Following is the selection list of the target choices. Note that the F241 is represented by the F243 and the LF2407 represents the LF2406 and the LF2402. */ #define F240 1 #define F243 2 #define F2407 4 #define UNKNOWN 8 /*
This line sets the target to one of the available choices.

*/ #define TARGET F243 - The Object vhz is implemented in the vhz.h. This has many subobjects such as pid
etc. To watch/modify variables such as pid coefficients etc watch

J J
The entire object vhz, and watch/modify vhz.pid.K0. An alternative is to watch vhz.pid and watch/modify pid.K0.
Watching smaller objects in the watch window has the advantage of lowering the amount of data that must be uploaded to the debug tool.
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ACI31
Incremental System Build Phase 1

Assuming section 1.0 is completed successfully, this section describes the steps for a minimum system check-out which confirms operation of system interrupts, some peripheral and target independent modules and one peripheral dependent module. In the SYSTEM OPTIONS section of the code, select phase 1 incremental build option by setting the constant phase1_commissioning to 1. Save the program, compile it and load it to the target.
3.1
Phase 1
- In this phase, line to neutral voltage waveforms are generated based on the user
speed input as shown in Figure 3. Three software modules are utilized in this phase to generate two sine wave forms.
- Set phase1_commissioning = 1 in ACI31_x1.asm as shown below:
phase1_commissioning phase2_commissioning phase3_commissioning
.set .set .set
1 0 0
- The software modules utilized in this phase are RAMP_CNTL, V_Hz_PROFILE,
SVGEN_MF
- RAMP_CNTL is utilized to avoid sudden change in speed command. - V_Hz_PROFILE generates a voltage command v_out. V_Hz_PROFILE also main-
tains a fixed ratio between the input frequency and voltage command.
- The module SVGEN_MF generates three line-to-neutral waveforms. These wave-
forms are generated by space vector PWM technique and contain fundamental frequency as well as a third harmonic component to maximize the utilization DC bus voltage.
- Although line to neutral waveform contains third harmonic, the actual line to line volt-
age seen by the load will not have any third harmonic component. This line to line wave form is also generated by taking the appropriate difference between the line to neutral voltages. For example, line to line wave form between phases A and B can be calculated as Van Vbn, where, Van = waveform between phase A and neutral and Vbn = waveform between phase B and neutral.
- The generated waveforms can be watched using the software module DATA_LOG. - In order to watch line to neutral waveforms in real time initialize dlog_iptr1 = Ta (line
to neutral waveform for phase A) and dlog_iptr2 = Tb (line to neutral waveform for phase A) (Figure 4)
- In order to watch line to neutral and line to line waveform in real-time initialize
dlog_iptr1 = Ta and dlog_iptr2 = Vab (Figure 5)

- Figure 12 shows the complete software block diagram of Phase 1.
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Figure 3. Phase 1 Incremental Build for ACI1-1

rpm_scaler
Ta speed_setpt RAMP_CNTL x V_Hz_ PROFILE SVGEN_MF Tb Tc
DATA_LOG
Graph Window1 Graph Window2
Figure 4. CC Window for Phase 1 Incremental Build of ACI3-1 Showing Line to Neutral Waveforms
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ACI31
Figure 5. CC Window for Phase 1 Incremental Build of ACI3-1 Showing Line to Neutral (Ta or Van) and Line-to-line Waveform (Vab)
10
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Successful completion of this phase will enable one to operate a three-phase AC induction motor with open loop speed control. In Phase 2 of incremental system build, a three phase AC induction motor will be operated using DMC1000 board (www.spectrumdigital.com) and EVM board from TI. In Phase 2a little software checks are made and then in Phase 2b an inverter and motor is used to operate a three phase ac induction motor with variable speed control.
4.1
Incremental System Build Phase 2a

.set .set .set
0 1 0
- The software block diagram of Phase 2a is shown in Figure 6. - The additional software module added in this Phase 2a are FC_PWM_DRV. - FC_PWM_DRV configures PWM module of the DSP controller. It also provides the
required dead band through avoid shoot thorough faults.

- The variable direction can be set to 1 or 0 to change the direction of rotation of
the motor. When direction is equal to 1, The phase sequence is a-b-c. If direction is equal to 0 than the opposite will happen. The available graph display in CC can be utilized to observe this. Put dlog_iptr1 = Mfunc_c1 and dlog_iptr2 = Mfunc_c2. Figure 7 and Figure 8 show how phase to neutral waveforms lead or lag each other depending on the value of direction.
Figure 6. Phase 2a Software Block Diagram for ACI3-1 System

RPM_SCALER
speed_setpt
RAMP_CNTL
V_Hz_PROFILE
SVGEN_MF Ta Tb Tc CC GRAPH DISPLAY 1 CC GRAPH DISPLAY 2 direction
CC GRAPH DISPLAY 1 CC GRAPH DISPLAY 1 PWM 1 PWM 2 PWM 3 PWM 4 PWM 5 PWM 6
Mfunc_c1 Mfunc_c2
FC_PWM_DRV
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Figure 7. CC Display Window With dlog_iptr1=Mfunc_c1, dlog_iptr2=Mfunc_c2, direction=0 (wave 1 leads wave 2)
Figure 8. CC Display Window With dlog_iptr1=Mfunc_c1, dlog_iptr2=Mfunc_c2, direction=1 (wave 1 lags wave 2)
Note:
Motor rotational direction in Figure 8 will be opposite of rotational direction in Figure 7.
12
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4.2
Incremental System Build Phase 2b

In this phase a three phase AC induction motor is connected with a voltage source inverter and the above mentioned software is utilized to implement a variable speed drive. A 243EVM is interfaced with DMC1000 board to setup the controller and power stage of the drive. The following steps are needed for proper setup:
- P1 (I/O) terminal of 243EVM connects to P4 (I/O) terminal of DMC to EVM interface
board (use the supplied ribbon cable).

- P2 (Analog) terminal of 243EVM connects to P3 (I/O) terminal of DMC to EVM inter-
face board (use the supplied ribbon cable).

- JTAG connector of XDS510PP connects to the JTAG connector available in 243EVM
board.
- DMC1000 board is supplied 24VDC in P15. - 243EVM is supplied 5VDC in J1. - DMC1000 is supplied from a variac between LINE(P24) and NEUTRAL (P25). - P19 and P20 are connected on DMC1000. - P16 and P17 are connected on DMC1000. - JP19 on DMC1000 should be between 1 and 2 (disables power factor correction cir-
cuit).
- Motor phase 1 connects to P2 on DMC1000. - Motor phase 2 connects to P3 on DMC1000. - Motor phase 3 connects to P5 on DMC1000. - Turn the variac all the CCW to zero voltage position. - Connect the variac to 120V wall socket. - Connect a current probe with any motor phase. - Power ON EVM and DMC1000 boards. - Start CC and load the software. - Once the software is running, apply DC bus voltage by rotating the variac. At this time
the current probe should show sinusoidal phase current and after sufficient DC bus voltage, the motor will start rotating.
- The direction of rotation will depend on two variables First the motor phase connec-
tions and second the value of the variable direction.

- Changing the value of direction as mentioned in the previous section (Phase 2a) can
change the rotational direction.

- Modifying the variable speed_setpt can vary the motor speed. The maximum speed
is fixed at 2500RPM. However, user can change that by modifying V_Hz_PROFILE software module.
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13
- Figure 9 shows the hardware setup. - Figure 13 shows the complete software block diagram of Phase 2.
Figure 9. Complete Hardware Setup for Phase 2b Implementation
3-phase ACI XDS510PP
DMC1000 inverter F243 EVM
Variac
14
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Successful completion of this phase will enable one to operate a three-phase AC induction motor with closed loop speed control. Closed loop speed control is not implemented in Phase 4.0a, however, software block is utilized to measure the speed. This will verify the proper operation of speed measuring hardware (sprocket and hall effect sensor). In phase 3.0b, the speed loop is closed. Figure 10 shows the software block diagram for phase 3.0a.
Figure 10. Software Block Diagram for Phase 3a

RPM_SCALER
speed_setpt X
RAMP_CNTL V_Hz_PROFILE SVGEN_MF CC GRAPH DISPLAY 1 CC GRAPH DISPLAY 2 direction CC GRAPH DISPLAY 1 CC GRAPH DISPLAY 1 PWM 1 PWM 2 PWM 3 PWM 4 PWM 5 PWM 6
FC_PWM_DRV
SPEED_PRD
CAP_EVENT_DRV
5.1
Incremental System Build Phase 3a

In this phase the same three phase AC induction motor is operated in variable speed mode. However, in this phase, the speed of the motor is measured using a hall effect sensor and hardware capture module of the DSP controller. In order to measure speed the following assembly files are utilized: - CAP_DRV.asm : configures the capture module - SPEED_PR.asm : calculates speed from captured values - Box_car : calculates the average of the calculated speed. : This eliminates jitters in speed sensing hardware. The following steps will ensure proper operation of Phase 3a:
.set .set .set
0 0 1
- The Hall effect speed sensor output is connected to P27 of DMC1000. P27 has
ground, power and capture input. The available ground and power from P27 can be utilized as sensor ground and power. The voltage output at P27 can be set at various level to match the sensor requirement.
- The remaining hardware setup is similar to Phase 2b. - After starting the software, the motor will start rotating as the DC bus voltage is applied
by rotating the variac from zero to higher voltages.
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15
- The measured speed can be watched by adding the variable speed_rpm in the
watch window.
- Figure 11 shows CC window when the motor is operating in Phase 3a. The following
observations can be made from Figure 11.

- Line to neutral voltages contain fundamental and third harmonics - Speed command, speed_setpt = 1800RPM. - Measured speed, speed_rpm = 1777RPM. Since this is an induction motor, the mea-
sured speed equals to command speed minus the slip speed.

- Figure 14 shows the complete software block diagram of Phase 3.
Figure 11. CC Window for Phase 3a Commanded Speed is 1800RPM, Open-loop speed is 1777RPM
16
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17
18 SPRU438
Software Block Diagrams
Figure 12. Software Block Diagram of Phase1

rpm_scaler
target_value speed_setpt RAMP_CNTL setpt_value X freq_in vhz_freq V_Hz_PROFILE v_out
Ta Tb Tc SVGEN_MF
sv_freq sv_gain
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rpm_scaler
target_value speed_setpt RAMP_CNTL setpt_value freq_in vhz_freq V_Hz_PROFILE v_out
Mfunc_c1
Ta Tb Tc SVGEN_MF
sv_freq sv_gain
FC_PWM_DRV
Mfunc_c2 Tb/Tc Mfunc_c3 Tc/Tb
EV Hardware
direction PWM1 PWM2 PWM3 PWM4 PWM5 PWM6
20 SPRU438

rpm_scaler speed_setpt target_value setpt_value RAMP_CNTL closed_loop_flag
FIFO1
time_stamp SPEED_PRD
speed_rpm
BC_IN BOX_CAR
BC_OUT
D_fb D_out D_PID_REG D_ref
speed_setpt
freq_in
vhz_freq V_Hz_PROFILE
v_out
Mfunc_c1
Ta Tb Tc SVGEN_MF
sv_freq sv_gain
FC_PWM_DRV
Mfunc_c2 Mfunc_c3
Tb/Tc Tc/Tb
EV hardware PWM1 PWM2 PWM3 PWM4 PWM5 PWM6
direction
BC_CALC Description
Averaging Box Car

This software module calculates the average value of a s/w variable. The output can be rescaled and the size of buffer used for storing the averaging data is selectable.
BC_IN
BC_CALC Q15/Q15
BC_OUT
Availability
This module is available in two interface formats: 1) The direct-mode assembly-only interface (Direct ASM) 2) The C-callable interface version
Module Properties
Type: Target Independent, Application Dependent Target Devices: x24x/x24xx Asembly File Name: box_car.asm ASM Routines: BC_CALC, BC_INIT C-Callable ASM File Names: box_car.asm, box_car.h
Item Code size Data RAM xDAIS ready xDAIS component Multiple instances ASM Only 47 words 69 words No No No C-Callable ASM 46 words 69 words Yes No Yes IALG layer not implemented Comments
For 64-word buffer size. Each pre-initialized BOXCAR structure occupies (5+BC_SIZE) words in the data memory and (7+BC_SIZE) words in the .cinit section.
BC_CALC
21
Direct ASM Interface

Table 1. Module Terminal Variables/Functions
Name Input Output Init / Config BC_IN BC_OUT BC_SIZE bc_scaler Description Input to be averaged Averaged output with the selectable buffer size The buffer size The scaling factor Format Q15 Q15 Q0 Q15 Range 1 > 0.999 1 > 0.999 2, 4, 8, 16, 1 > 0.999
Routine names and calling limitation: There are two routines involved: BC_CALC, the main routine; and BC_INIT, the initialization routine. The initialization routine must be called during program initialization. The BC_CALC routine must be called in the control loop. Variable Declaration: In the system file, including the following statements before calling the subroutines:
.ref .ref BC_INIT, BC_CALC BC_IN, BC_OUT ;function call ;Inputs/Outputs
Memory map: All variables are mapped to an uninitialized named section, bc, which can be allocated to any one data page. However, the buffer data is mapped to an uninitialized named section, farmem. Example: In the interrupt service routine call the module and read results as follows:
LDP #BC_IN BLDD #input_var1,BC_IN CALL BC_CALC LDP #output_var1 BLDD #BC_OUT, output_var1 ; Set DP for module output ; Pass output to other variables ; Set DP for module inputs ; Pass input variables to module inputs
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SPRU470
C/CCallable ASM Interface
C/C-Callable ASM Interface Object Definition

#define BC_SIZE 64 /* /* /* /* /* /* Input: BoxCar input (Q15) */ Variable: Boxcar buffer pointer */ Variable: Boxcar buffer (Q15) */ Output: Boxcar output (Q15) */ Parameter: Boxcar scaler (Q15) */ Pointer to calculation function */
The structure of the BOXCAR object is defined in the header file, box_car.h, as seen in the following:
typedef struct { int BC_IN; int BC_PTR; int BC_BUFFER[BC_SIZE]; int BC_OUT; int bc_scaler; int (*calc)(); } BOXCAR;
Special Constants and Datatypes

BOXCAR The module definition itself is created as a data type. This makes it convenient to instance a BOXCAR object. To create multiple instances of the module simply declare variables of type BOXCAR. BOXCAR_DEFAULTS Initializer for the BOXCAR object. This provides the initial values to the terminal variables, internal variables, as well as method pointers. This is initialized in the header file, box_car.h.
Methods
void calc(BOXCAR *); This default definition of the object implements just one method the runtime compute function for averaging. This is implemented by means of a function pointer, and the default initializer sets this to bc_calc function. The argument to this function is the address of the BOXCAR object. Again, this statement is written in the header file, box_car.h. Instantiation: The following example instances two such objects:
BOXCAR bc1, bc2;
Module Usage
Initialization: To instance a pre-initialized object:

BOXCAR bc1 = BOXCAR_DEFAULTS; BOXCAR bc2 = BOXCAR_DEFAULTS;
Invoking the compute function:

bc1.calc(&bc1); bc2.calc(&bc2);
BC_CALC
23
Example: Lets instance two BOXCAR objects, otherwise identical, and compute the averaging values of two different s/w variables. The following example is the c source code for the system file.
BOXCAR bc1= BOXCAR_DEFAULTS; BOXCAR bc2= BOXCAR_DEFAULTS; main() { bc1.BC_IN = input1; bc2.BC_IN = input2; } void interrupt periodic_interrupt_isr() { bc1.calc(&bc1); bc2.calc(&bc2); output1 = bc1.BC_OUT; output2 = bc2.BC_OUT; } /* Call compute function for bc1 */ /* Call compute function for bc2 */ /* Access the outputs of bc1 */ /* Access the outputs of bc2 */ /* Pass inputs to bc1 */ /* Pass inputs to bc2 */ /* instance the first object */ /* instance the second object */
24
SPRU470
Background Information
This s/w module computes the average of the runtime values of the selected input variable. The size of the buffer used to keep the data is selectable with the power of two, i.e., 2, 4, 8, 16, 32, 64, . The default buffer size is 64. For different buffer size modify the code (valid for both ASM and CcA versions) as required. The following instruction is added or deleted, according to the buffer size, at the location indicated in the code. This divides the number in accumulator by two.
SFR ; Number of times SFR need to be executed ; is, log2(BC_SIZE)
BC_CALC
25
CAP_EVENT_DRV Description
Capture Input Event Driver

This module provides the instantaneous value of the selected time base (GP Timer) captured on the occurrence of an event. Such events can be any specified transition of a signal applied at the event manager (EV) capture input pins of 24x/24xx devices.
CAPn_FIFO
CAP_EVENT_ DRV Q15
EV HW
CAPn
Availability
Module Properties
Type: Target Dependent, Application Dependent Target Devices: x24x/x24xx Direct ASM Version File Name: cap_drv.asm C-Callable Version File Names: F2407CAP.H, CAPTURE.H
Item Code size ASM Only 32 words
F243CAP.h,
F243CAPx.c,
F2407CAPx.c,
C-Callable ASM 54 words (49 words .text, 5 words .cinit) 6 words Yes
Comments
Data RAM Multiple instances
1 words No
Multiple instances must be initialized to point to different capture pin routines.
Creating multiple instances pointing to the same capture pin can cause undefined results.
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SPRU450

Name H/W Inputs Outputs Init / Config CAPn (n=1,2,3,4) CAPnFIFO (n=1,2,3,4) 24x/24xx Description Capture input signals to 24x/24xx device Capture unit FIFO registers. Format Range N/A N/A N/A N/A N/A 07
Select appropriate 24x/24xx device N/A in the x24x_app.h file. Q0
CLK_prescaler_bits Initialize this clock prescaler variable. The default value is set to 4. To use this value call the CAP_EVENT_DRV_INIT routine only. For a different value modify this variable and also call the other initialization routine CAP_EVENT_DRV_CLKPS_INIT. The correct value for this parameter is calculated in the Excel file with the user input of the desired clock prescaler (1,2,4,8,16,32,64,128).
Variable Declaration: In the system file include the following statements:

.ref .ref .ref CAP_EVENT_DRV, CAP_EVENT_DRV _INIT CAP_EVENT_DRV_CLKPS_INIT CLK_prescaler_bits ;function call ;function call ;parameter
Memory map: Not required. Example:

CALL CAP_EVENT_DRV_INIT ldp #CLK_prescaler_bits splk #7, CLK_prescaler_bits ;To specify a prescaler of 128 CALL CAP_EVENT_DRV_CLKPS_INIT ldp #output_var1 ;Set DP for output variable bldd #CAP1FIFO,output_var1 ;Pass module o/ps to output vars bldd # CAP2FIFO, output_var2 bldd # CAP3FIFO, output_var3
CAP_EVENT_DRV
27

The structure of the CAPTURE object is defined by the following struct
/* Define the structure of the Capture Driver Object */ typedef struct { int time_stamp; int (*init)(); /*Pointer to the init function */ int (*read)(); /*Pointer to the init function */ } CAPTURE;

Name H/W Input Pins Output Description Format Range Inputs are logic levels on hardware pins. Q0 32768 to 32767
Time_stamp
An Integer value read from timer assigned to the capture unit.

CAPTURE The module definition itself is created as a data type. This makes it convenient to instance an interface to the CAPTURE pin(s). CAPTURE_DEFAULTS Initializer for the CAPTURE Object. This provides the initial values to the terminal variables as well as method pointers. CAPTURE_handle This is typedefed to CAPTURE *.
Methods
void init(CAPTURE_handle) Initializes the CAPTURE unit on the device to activate the capture function. int read(CAPTURE_handle) Reads a time stamp value from the timer associated with the capture unit. Note that the time stamp is placed in the capture object. The return value of the function is either 0 or 1. If the function read a value from the hardware, i.e. if a capture event has occurred, then the function returns 0. Otherwise the return value is 1.
Module Usage
Instantiation: The interface to the Capture unit on the device is instanced thus:
CAPTURE cap1;
Initialization: To instance a pre-initialized object

CAPTURE cap1=CAP1_DEFAULTS;
Invoking the initialization function:

cap1.init(&cap1);
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SPRU450
Reading a time stamp from the capture unit:

cap1.read(&cap1);
Example: Lets instance one CAPTURE object, init it and invoke the read function to fetch a time stamp.
CAPTURE cap1 CAP1_DEFAULTS; /*Instance the Capture interface object main() { cap1.init(&cap1); } void interrupt periodic_interrupt_isr() { int status; int time_of_event; status=cap1.read(&cap1); /* if status==1 then a time stamp was not read, if status==0 then a time stamp was read. if(status==0) { time_of_event=cap1.time_stamp; } } */
CAP_EVENT_DRV
29
DATA_LOG Description
2-Channel Data Logging Utility Module

This module stores the realtime values of two user selectable s/w variables in the external data RAM provided on the 24x/24xx EVM. Two s/w variables are selected by configuring two module inputs, dlog_iptr1 and dlog_iptr2, point to the address of the two variables. The starting addresses of the two RAM locations, where the data values are stored, are set to 8000h and 8400h. Each section allows logging of 400 data values.
dlog_iptr1 dlog_itpr2 DATA_LOG EXT DATA RAM
Availability
Module Properties
Type: Target Independent, Application Independent Target Devices: x24x/x24xx Assembly File Name: data_log.asm ASM Routines: DATA_LOG, DATA_LOG_INIT C-Callable ASM File Names: data_log1.c, data_log2.asm, data_log.h
Each pre-initialized DATALOG structure instance consumes 14 words in the data memory and 16 words in the .cinit section.
30
SPRU471

Name Inputs Outputs Init / Config dlog_iptrx (x=1,2) none dlog_iptrx (x=1,2) Initialize these inputs with the addresses of the desired variables. However, this initialization is optional, since these input variables can also be loaded with the addresses of any s/w variables from the Code Composer watch window. Description These inputs contain the addresses of the desired variables. Format N/A Range N/A

.ref .ref DATA_LOG, DATA_LOG _INIT dlog_iptr1, dlog_iptr2 ;function call ;inputs
Memory map: All variables are mapped to an uninitialized named section data_log Example: During the initialization part of the user code, initialize the module inputs with the address of the desired variables as shown below:
CALL DATA_LOG_INIT ;Initializes DAC parameters
ldp #dlog_iptr1 ;Set DP for module inputs splk #input_var1, dlog_iptr1 ;Pass input variables to module inputs splk #input_var2, dlog_iptr2
Then in the interrupt routine just call the module to store the values of the intended variables in the external RAM.
CALL DATA_LOG
Note: This module does not have any user configurable s/w outputs and, therefore, does not need any output parameter passing.
DATA_LOG
31

The structure of the DATALOG object is defined in the header file, data_log.h, as shown in the following:
/* /* /* /* /* /* /* /* /* /* /* /* /* /* Input: First input pointer (Q15) */ Input: Second input pointer (Q15) */ Input: Trigger point (Q15) */ Variable: First graph address */ Variable: Second graph address */ Variable: Data log skip counter */ Variable: Data log counter */ Variable: Task address */ Parameter: Data log prescale */ Parameter: Maximum data buffer */ Parameter: Buffer starting address 1 */ Parameter: Buffer starting address 2 */ Pointer to init function */ Pointer to update function */
typedef struct { int *dlog_iptr1; int *dlog_iptr2; int trig_value; int graph_ptr1; int graph_ptr2; int dlog_skip_cntr; int dlog_cntr; int task_ptr; int dlog_prescale; int dlog_cntr_max; int dl_buffer1_adr; int dl_buffer2_adr; int (*init)(); int (*update)(); } DATALOG;

DATALOG The module definition itself is created as a data type. This makes it convenient to instance a DATALOG object. To create multiple instances of the module simply declare variables of type DATALOG. DATALOG_DEFAULTS Initializer for the DATALOG object. This provides the initial values to the terminal variables, internal variables, as well as method pointers. This is initialized in the header file, data_log.h.
Methods
void init(DATALOG *); void update(DATALOG *); This default definition of the object implements two methods the initialization and runtime update function for data logging. This is implemented by means of a function pointer, and the default initializer sets these to data_log_init and data_log_update functions. The argument to these functions is the address of the DATALOG object. Again, this statement is written in the header file, data_log.h. Instantiation: The following example instances two such objects:
DATALOG dlog1, dlog2;
Module Usage

DATALOG dlog1 = DATALOG_DEFAULTS; DATALOG dlog2 = DATALOG_DEFAULTS;

dlog1.update(&dlog1); dlog2.update(&dlog2);
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SPRU471
Example: Lets instance two DATALOG objects, otherwise identical, and run four data logging variables. The following example is the c source code for the system file.
DATALOG dlog1= DATALOG_DEFAULTS; DATALOG dlog2 = DATALOG_DEFAULTS; main() { dlog1.init(&dlog1); dlog2.init(&dlog2); /* Initialize the data_log function for dlog1 */ /* Initialize the data_log function for dlog2 */ /* instance the first object */ /* instance the second object */
/* Since dlog1 already occupied the data buffer addressed (by default) from 0x8000 to 0x87FF, the starting buffer address for dlog2 need to set to other empty space of memory */ dlog2.dl_buffer1_adr = 0x08800; dlog2.dl_buffer2_adr = 0x08C00; dlog1.dlog_iptr1 = &input1; dlog1.dlog_iptr2 = &input2; dlog2.dlog_iptr1 = &input3; dlog2.dlog_iptr2 = &input4; } void interrupt periodic_interrupt_isr() { dlog1.update(&dlog1); dlog2.update(&dlog2); /* Call update function for dlog1 */ /* Call update function for dlog2 */ /* Set new starting buffer address of dlog2 */ /* Set new starting buffer address of dlog2 */ /* Pass inputs to dlog1 */ /* Pass inputs to dlog1 */ /* Pass inputs to dlog2 */ /* Pass inputs to dlog2 */
/* This module does not have any user configurable s/w outputs and, therefore, does not need any output parameter passing. */ }
DATA_LOG
33
This s/w module stores 400 realtime values of each of the selected input variables in the data RAM as illustrated in the following figures. The starting addresses of two RAM sections, where the data values are stored, are set to 8000h and 8400h.
dlog_iptr1 input_var1 8000h DATA RAM 83FFh input_var2 dlog_iptr2 8400h DATA RAM 87FFh
34
SPRU471
FC_PWM_DRV Description
Full Compare PWM Driver

This module uses the duty ratio information and calculates the compare values for generating PWM outputs. The compare values are used in the full compare unit in 24x/24xx event manager(EV). This also allows PWM period modulation.
mfunc_c1 mfunc_c2 FC_PWM_DRV mfunc_c3 mfunc_p Q0 EV HW PWM1 PWM2 PWM3 PWM4 PWM5 PWM6
Availability
This module is available in two interface formats: 1) The direct-mode assembly-only interface (Direct ASM) 2) The C-callable interface version.
Module Properties
Type: Target Dependent, Application Dependent Target Devices: x24x/x24xx Direct ASM Version File Name: pwm_drv.asm C-Callable Version File Names: F243PWM1.C, F243PWM2.ASM, F243PWM.H, F2407PWM1.C, F2407PWM2.C, F2407PWM3.ASM, F2407PWM4.ASM, F2407PWM.H, PWM.H
Item Code size Data RAM Multiple instances ASM Only 52 words 6 words No C-Callable ASM 88 words 0 words
Yes
Comments
Multiple instances must point to distinct interfaces on the target device. Multiple instances pointing to the same PWM interface in hardware may produce undefined results. So the number of interfaces on the F241/3 is limited to one, while there can be upto two such interfaces on the LF2407. If, on the 2407, there are two interfaces concurrently linked in, then the code size will be 176 words + .cinit space + data memory space. Each pre-initialized PWMGEN structure instance consumes 6 words in data memory and 8 words in the .cinit section.
FC_PWM_DRV
35

Name Inputs mfunc_cx (x=1,2,3) mfunc_p Outputs Init / Config PWMx (x=1,2,3,4,5,6) 24x/24xx FPERIOD Description Duty ratios for full compare unit 1, 2 and 3 PWM period modulation function Full compare PWM outputs from 24x/24xx device. Select appropriate 24x/24xx device from the x24x_app.h file. PWM frequency select constant. Default value is set for 20kHz. Modify this constant for different PWM frequency. Format Q15 Q15 N/A N/A Q0 Range 80007FFF 80007FFF N/A N/A Application dependent

.ref .ref FC_PWM_DRV, FC_PWM _DRV _INIT mfunc_c1, mfunc_c2, mfunc_c3, mfunc_p ;function call ;inputs
Memory map: All variables are mapped to an uninitialized named section pwm_drv Example:
ldp #mfunc_c1 ;Set DP for module inputs bldd #input_var1, mfunc_c1 ;Pass input variables ;to module inputs bldd #input_var2, mfunc_c2 bldd #input_var3, mfunc_c3 bldd #input_var4, mfunc_p CALL FC_PWM_DRV
Note: Since this is an output driver module it does not have any user configurable s/w outputs and, therefore, does not need any output parameter passing. This s/w module calculates the compare values, which are used in the full compare unit internal to 24x/24xx device. From the compare values the device generates the PWM outputs.
36
SPRU448

The structure of the PWMGEN Interface Object is defined by the following structure definition
typedef struct { int period_max; /* PWM Period in CPU clock cycles. Q0Input */ int mfunc_p; /* Period scaler. Q15 Input int mfunc_c1; /* PWM 1&2 Duty cycle ratio. Q15, Input int mfunc_c2; /* PWM 3&4 Duty cycle ratio. Q15, Input int mfunc_c3; /* PWM 5&6 Duty cycle ratio. Q15, Input int (*init)(); /* Pointer to the init function int (*update)(); /* Pointer to the update function } PWMGEN ;
*/ */ */ */ */ */

Name Inputs mfunc_cx (x=1,2,3) mfunc_p Outputs Init / Config PWMx (x=1,2,3,4,5,6) 24x/24xx period_max Description Duty ratios for full compare unit 1, 2 and 3 PWM period modulation function Full compare PWM outputs from 24x/24xx device. Select appropriate 24x/24xx device from the x24x_app.h file. PWM period setting. Modify this constant for different PWM frequency. Format Q15 Q15 N/A N/A Q0 Range 80007FFF 80007FFF N/A N/A Application dependent

PWMGEN
The module definition itself is created as a data type. This makes it convenient to instance an interface to the PWM Generator module.
PWMGEN _DEFAULTS Initializer for the PWMGEN Object. This provides the initial values to the termi-
nal variables as well as method pointers.

PWMGEN_handle Typedefed to PWMGEN * F243_FC_PWM_GEN Constant initializer for the F243 PWM Interface. F2407_EV1_FC_PWM_GEN Constant initializer for the F2407 PWM Interface, EV1.
FC_PWM_DRV
37
F2407_EV2_FC_PWM_GEN Constant initializer for the F2407 PWM Interface, EV2.
Methods
void init (PWMGEN *) Initializes the PWM Gen unit hardware. void update(PWMGEN *) Updates the PWM Generation hardware with the data from the PWM Structure.
Module Usage
Instantiation: The interface to the PWM Generation Unit is instanced thus:

PWMGEN gen;

PWMGEN gen =PWMGEN_DEFAULTS
Hardware Initialization:
gen.init(&gen);
Invoking the update function:

gen.update(&gen);
Example: Lets instance one PWMGEN object and one SVGENMF object, (For details on SVGENMF see the SVGEN_MF.DOC.). The outputs of SVGENMF are output via the PWMGEN.
SVGENMF svgen= SVGEN_DEFAULTS; /*Instance the space vector gen object */ PWMGEN gen = F243_FC_PWM_GEN; /*Instance the PWM interface object */ main() { svgen.freq=1200; gen.period_max=500; gen.init(&gen);
/* Set properties for svgen */ /*Sets the prd reg for the Timer to 500 cycles*/ /* Call the hardware initialization function */
} void interrupt periodic_interrupt_isr() { sv1.calc(&sv1); /* Call compute function for sv1 */ /* Lets output sv1.va,sv1.vb, and sv1.vc */ gen.mfunc_c1= svgen.va; /*Connect the output of svgen to gen inputs*/ gen.mfunc_c2= svgen.vb; gen.mfunc_c3= svgen.vc; gen.update(&gen); } /* Call the hardware update function */
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SPRU448
FC_PWM_O_DRV Description
Full-Compare PWM Driver with Over-modulation

The module implements over-modulation technique to increase DC bus voltage utilization for a voltage source inverter. The input limit sets the extent of over-modulation. For example, limit = 0 means no over-modulation and limit = (timer period)/2 means maximum over-modulation.
mfunc_c1 mfunc_c2 mfunc_c3 mfunc_p limit FC_PWM_ O_DRV Q0 EV HW PWM1 PWM2 PWM3 PWM4 PWM5 PWM6
Availability
Module Properties
This module is available in the direct-mode assembly-only interface (Direct ASM). Type: Target Dependent, Application Dependent Target Devices: x24x/x24xx Assembly File Name: pwmodrv.asm
Item Code size Data RAM xDAIS module xDAIS component ASM Only 133 words 11 words No No IALG layer not implemented Comments
FC_PWM_O_DRV
39

Name Inputs limit Description Defines the level of over modulation. This is related to the PWM timer period. Duty ratio for PWM1/PWM2 Duty ratio for PWM3/PWM4 Duty ratio for PWM5/PWM6 PWM period modulation function Full compare PWM outputs from 24x/24xx device. Initial limit is set to 0 so that the system starts without any over-modulation. Specify limit for overmodulation. PWM frequency select constant. Default value is set for 20kHz. Modify this constant for different PWM frequency. Select appropriate 24x/24xx device from the x24x_app.h file. Format Q0 Range 0timer_ period/2 08000h 7FFFh 08000h 7FFFh 08000h 7FFFh 08000h 7FFFh N/A 0 T1PER/2
Mfunc_c1 Mfunc_c2 Mfunc_c3 mfunc_p H/W Outputs PWMx (x=1,2,3,4,5,6) Init / Config limit
Q15 Q15 Q15 Q15 N/A Q0
FPERIOD
Q0
Application dependent
24x/24xx
N/A
N/A

.ref .ref .ref FC_PWM_O_DRV FC_PWM_O_DRV_INIT Mfunc_c1, Mfunc_c2, Mfunc_c3, Mfunc_p ;function call ;Inputs
Memory map: All variables are mapped to an uninitialized named section pwmodrv Example:
ldp #mfunc_c1 bldd #input_var1, bldd #input_var2, bldd #input_var3, bldd #input_var4, CALL FC_PWM_O_DRV mfunc_c1 mfunc_c2 mfunc_c3 mfunc_p ;Set DP for module inputs ;Pass input variables to module inputs
40
SPRU449
For high performance motor drive systems, full utilization of the dc bus voltage is an important factor to achieve maximum output torque under any operating conditions, and to extend the field weakening range of the motor. However, for a pulse-width modulated voltage source inverter (PWMVSI), the maximum voltage is 78% of the sixstep waveform value. Therefore, in general, a standard motor supplied from an inverter can not utilize the full DC bus voltage capability. To obtain higher DC bus voltage utilization, operating the inverter in over-modulation region is required. This software module implements a simple but effective over-modulation scheme for PWM inverters. This module can be applied both for three phase drive (using Space Vector PWM or regular Sine PWM strategies) as well as single phase drive. The level of over-modulation is controller by a variable called limit. Whenever, the ouptut waveform is within limit, the Compare values for PWM channels are saturated to the maximum value during the positive half of the waveform and to the minimum value during the negative half of the waveform. Figure 1 shows the effect of various values of limit.
FC_PWM_O_DRV
41
(a)
(b)
(c)
Figure 1. Implementation of Over-modulation Using the Software Module (a) No over-modulation, (b) Over-modulation with limit = T1PER/4, (c) Maximum over-modulation (square wave) with limit = T1PER/2
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SPRU449
RAMP_CNTL Description
Ramp Control Module

This module implements a ramp up and ramp down function. The output flag variable s_eq_t_flg is set to 7FFFh when the output variable setpt_value equals the input variable target_value.
setpt_value target_value RAMP_CNTL s_eq_t_flg
Availability
Module Properties
Type: Target Independent, Application Dependent Target Devices: x24x/x24xx Assembly File Name: rmp_cntl.asm C-Callable ASM File Names: rmp_cntl.asm, rmp_cntl.h
Each pre-initialized RMPCNTL structure instance consumes 8 words in the data memory and 10 words in the .cinit section.
RAMP_CNTL
43

Name Input target_value Description Desired value of the ramp Format Q0 Range rmp_lo_limit rmp_hi_limit rmp_lo_limit rmp_hi_limit 0 or 7FFF 07FFF 07FFF 07FFF
Outputs
setpt_value
Ramp output value
Q0
s_eq_t_flg Init / Config rmp_dly_max rmp_hi_limit rmp_lo_limit
Ramp output status flag Ramp step delay in number of sampling cycles Maximum value of ramp Minimum value of ramp
Q0 Q0 Q0 Q0
From the system file, initialize these variables as required by the application. From the Real-Time Code Composer window, specify target_value to vary the output signal setpt_value.

.ref .ref .ref .ref .ref RAMP_CNTL, RAMP_CNTL_INIT target_value rmp_dly_max, rmp_lo_limit rmp_hi_limit setpt_value, s_eq_t_flg ; ; ; ; ; function call Inputs Input Parameters Input Parameter Outputs
Memory map: All variables are mapped to an uninitialized named section rmp_cntl Example:
ldp #target_value ;Set DP for module input bldd #input_var1, target_value ;Pass input variable to module input CALL RAMP_CNTL ldp #output_var1 ;Set DP for output variable bldd #setpt_value, output_var1 ;Pass module output to output variable
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SPRU472

The structure of the RMPCNTL object is defined in the header file, rmp_cntl.h, as seen in the following:
/* /* /* /* /* /* /* /* Input: Target input (Q15) */ Parameter: Maximum delay rate */ Parameter: Minimum limit (Q15) */ Parameter: Maximum limit (Q15) */ Variable: Incremental delay */ Output: Target output (Q15) */ Output: Flag output */ Pointer to calculation function */
typedef struct { int target_value; int rmp_dly_max; int rmp_lo_limit; int rmp_hi_limit; int rmp_delay_cntl; int setpt_value; int s_eq_t_flg; int (*calc)(); } RMPCNTL;

RMPCNTL The module definition itself is created as a data type. This makes it convenient to instance a RMPCNTL object. To create multiple instances of the module simply declare variables of type RMPCNTL. RMPCNTL_DEFAULTS Initializer for the RMPCNTL object. This provides the initial values to the terminal variables, internal variables, as well as method pointers. This is initialized in the header file, rmp_cntl.h.
Methods
void calc(RMPCNTL *); This default definition of the object implements just one method the runtime compute function for ramp control. This is implemented by means of a function pointer, and the default initializer sets this to rmp_cntl_calc function. The argument to these functions is the address of the RMPCNTL object. Again, this statement is written in the header file, rmp_cntl.h. Instantiation: The following example instances two such objects
RMPCNTL rmpc1, rmpc2;
Module Usage

RMPCNTL rmpc1 = RMPCNTL_DEFAULTS; RMPCNTL rmpc2 = RMPCNTL_DEFAULTS;

rmpc1.calc(&rmpc1); rmpc2.calc(&rmpc2);
RAMP_CNTL
45
Example: Lets instance two RMPCNTL objects, otherwise identical, and run two ramp controlling variables. The following example is the c source code for the system file.
RMPCNTL rmpc1= RMPCNTL_DEFAULTS; RMPCNTL rmpc2 = RMPCNTL_DEFAULTS; main() { rmpc1.target_value = input1; rmpc2.target_value = input2; } void interrupt periodic_interrupt_isr() { rmpc1.calc(&rmpc1); rmpc2.calc(&rmpc2); output1 = rmpc1.setpt_value; output2 = rmpc2.setpt_value; } /* Call compute function for rmpc1 */ /* Call compute function for rmpc2 */ /* Access the outputs of rmpc1 */ /* Access the outputs of rmpc2 */ /* Pass inputs to rmpc1 */ /* Pass inputs to rmpc2 */ /* instance the first object */ /* instance the second object */
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SPRU472
Implements the following equations: Case 1: When target_value > setpt_value setpt_value = setpt_value + 1,for t = n . Td, n = 1, 2, 3 and (setpt_value + 1) < rmp_hi_limit = rmp_hi_limit , for (setpt_value + 1) > rmp_hi_limit where, Td = rmp_dly_max . Ts Ts = Sampling time period Case 2: When target_value < setpt_value setpt_value = setpt_value 1, for t = n . Td, n = 1, 2, 3.. and (setpt_value 1) > rmp_lo_limit = rmp_lo_limit , for (setpt_value 1) < rmp_lo_limit where, Td = rmp_dly_max . Ts Ts = Sampling time period
setpt_value rmp_hi_limit
Td 1
rmp_lo_limit target_value> setpt_value target_value < setpt_value t
target_value > setpt_value
Example: setpt_value = 0 (initial value), target_value = 1000 (user specified), rmp_dly_max = 500 (user specified), sampling loop time period Ts = 0.000025 Sec. This means that the time delay for each ramp step is Td = 500x0.000025 = 0.0125 Sec. Therefore, the total ramp time will be Tramp = 1000x0.0125 Sec = 12.5 Sec
RAMP_CNTL
47
SPEED_PRD Description
Speed Calculator Based on Period Measurement

This module calculates the motor speed based on a signals period measurement. Such a signal, for which the period is measured, can be the periodic output pulses from a motor speed sensor.
speed_prd time_stamp SPEED_PRD Q0/Q15 speed_rpm
Availability
Module Properties
Type: Target Dependent, Application Dependent Target Devices: x24x/x24xx Direct ASM Version File Name: speed_pr.asm C-Callable Version File Names: speed_pr.asm, speed_pr.h
Item Code size Data RAM xDAIS module xDAIS component ASM Only 55 words 13 words No No C-Callable ASM 64 words 0 words Yes No IALG layer not implemented Comments
Each pre-initialized SPEED_MEAS structure instance consumes 9 words in the data memory and 11 words in the .cinit section.
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SPRU451

Name Inputs time_stamp Description Captured base timer counter value corresponding to the periodic edges of the sensed signal. Normalized motor speed Motor speed in revolution per minute Speed of normalization. The value chosen should be equal to or greater than the maximum motor speed. Scaling constant. Use the Excel file to calculate this. Number of left shift less 1 required for max accuracy of 32bit/16bit division used for speed calculation. Use the Excel file to calculate this. When speed_scaler is calculated as 1, shift will be 1. In that case do not apply any left shift on the result of the 32bit/16bit division. Format Q0 Range 0FFFF
Outputs
speed_prd speed_rpm
Q15 Q0 Q0
07FFF 0rpm_max Specified by user
Init / Config
rpm_max
speed_scaler shift
Q0 Q0
System dependent System dependent

.ref .ref .ref SPEED_PRD, SPEED_PRD _INIT time_stamp, rpm_max, speed_scaler, shift speed_prd, speed_rpm ;function call ;input ;output
Memory map: All variables are mapped to an uninitialized named section speedprd Example:
ldp # time_stamp bldd #input_var1, time_stamp CALL SPEED_PRD ldp #output_var1 bldd #speed_prd, output_var1 bldd #speed_rpm, output_var2 ;Set DP for module input ;Pass input to module input ;Set DP for output variables ;Pass module outputs to output ;variables
SPEED_PRD
49
C/C-Callable ASM Interface
Object Definition
The structure of the SPEED_MEAS object is defined by the following structure definition
typedef struct { int time_stamp_new; int time_stamp_old; int time_stamp; int shift; int speed_scaler; int speed_prd; int rpm_max; int speed_rpm; int (*calc) (); } SPEED_MEAS;
/*Variable: New Timestamp corresponding to a capture event*/ /*Variable: Old Timestamp corresponding to a capture event*/ /*Input: Current Timestamp corresponding to a capture event*/ /*Parameter: For maximum accuracy of 32bit/16bit division*/ /*Parameter: Scaler converting 1/N cycles to a Q15 speed*/ /*Output: speed in perunit /*Parameter: Scaler converting Q15 speed to rpm (Q0) speed*/ /*Output: speed in r.p.m. /*Pointer to the calculation function*/ /*Data type created*/
Table 10. Module Terminal Variables

Name Inputs time_stamp Description Captured base timer counter value corresponding to the periodic edges of the sensed signal. Normalized motor speed Motor speed in revolution per minute Speed of normalization. The value chosen should be equal to or greater than the maximum motor speed. Scaling constant. Use the Excel file to calculate this. Number of left shift less 1 required for max accuracy of 32bit/16bit division used for speed calculation. Use the Excel file to calculate this. When speed_scaler is calculated as 1, shift will be 1. In that case, do not apply any left shift on the result of the 32 bit/16 bit division. Format Q0 Range 0FFFF
Outputs
speed_prd speed_rpm
Q15 Q0 Q0
07FFF 0rpm_max Specified by user
Init / Config
rpm_max
speed_scaler shift
Q0 Q0
System dependent System dependent

SPEED_MEAS The module definition itself is created as a data type. This makes it convenient to instance a Space Vector Generation module. To create multiple instances of the module simply declare variables of type SVGENMF.
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SPEED_PR_MEAS_DEFAULTS Initializer for the SVGENMF Object. This provides the initial values to the terminal variables, internal variables, as well as method pointers.
Methods
void calc(SPEED_MEAS *) Pointer to the speed calculation function. Instantiation:

SPEED_MEAS shaftSpeed;
Module Usage

SPEED_MEAS shaftSpeed=SPEED_PR_MEAS_DEFAULTS;

shaftSpeed.calc(&shaftSpeed);
Example:
/* Pre initialized declaration for the speed measurement object. */ SPEED_MEAS shaftSpeed=SPEED_PR_MEAS_DEFAULTS; /* Declaration for the capture driver. For more details see the CAP_DRV document. */ CAPTURE cap=CAPTURE_DEFAULTS; main() { /* Initialize the capture interface */ cap.init(&cap); } void periodic_interrupt_isr() { /* Call the capture driver read function. Note, that this func returns the status, as the return value, NOT the time_stamp. The time_stamp is returned directly into the CAPTURE object structure. */ if((cap.read(&cap))==0) /* Call the capture read function */ { shaftSpeed.time_stamp=cap.time_stamp; /* Read out new time stamp */ shaftSpeed.calc(&shaftSpeed); /* Call the speed calulator */ } }
SPEED_PRD
51
A low cost shaft sprocket with n teeth and a Hall effect gear tooth sensor is used to measure the motor speed. Figure 2 shows the physical details associated with the sprocket. The Hall effect sensor outputs a square wave pulse every time a tooth rotates within its proximity. The resultant pulse rate is n pulses per revolution. The Hall effect sensor output is fed directly to the 24x/24xx Capture input pin. The capture unit will capture (the value of its base timer counter) on either the rising or the falling edges(whichever is specified) of the Hall effect sensor output. The captured value is passed to this s/w module through the variable called time_stamp. In this module, every time a new input time_stamp becomes available it is compared with the previous time_stamp. Thus, the tooth-to-tooth period (t2t1) value is calculated. In order to reduce jitter or period fluctuation, an average of the most recent n period measurements can be performed each time a new pulse is detected.
t1 Dt t2 q q + 360 = 14.4 25 Dt + t 2 * t 1 sec
w 25 teeth
w+
2p 25 n+1 Dt n
rad sec
Figure 2. Speed Measurement With a Sprocket From the two consecutive time_stamp values the difference between the captured values are calculated as, = time_stamp(new) time_stamp(old) Then the time period in sec is given by, Dt + t 2 * t 1 + K p where, KP = Prescaler value for the Capture unit time base TCLK = CPU clock period in sec From Figure 2, the angle in radian is given by, q + 2p n where, n = number of teeth in the sprocket, i.e., the number of pulses per revolution Then the speed in radian/sec and the normalized speed N are calculated as, T CLK D
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w + q + 2p + Dt nDt n w N + ww +
max
Kp w
2p T CLK
2p
1 n KP T CLK
+1 D
Where, max is the maximum value of which occurs when =1. Therefore, w max + 2p nK PT CLK
For, n=25, KP=32 and TCLK=50x109 sec (20MHz CPU clock), the normalized speed N is given by, wN + w +1 D 2p(25000)
The system parameters chosen above allows maximum speed measurement of 1500,000 rpm. Now, in any practical implementation the maximum motor speed will be significantly lower than this maximum measurable speed. So, for example, if the motor used has a maximum operating speed of 23000 rpm, then the calculated speed can be expressed as a normalized value with a base value of normalization of at least 23000 RPM. If we choose this base value of normalization as 23438 rpm, then the corresponding base value of normalization, in rad/sec, is, w max1 + 23438 2p [ 2p(390) 60 Therefore, the scaled normalized speed is calculated as, w N1 + w [ 64 + 64 D 2p(390) w N + speed_scaler wN
This shows that in this case the scaling factor is 64. The speed, in rpm, is calculated as, N 1 + 23438 w N1 + 23438 64 + rpm_max D w N1
The capture unit in 24x/24xx allows accurate time measurement (in multiples of clock cycles and defined by a prescaler selection) between events. In this case the events are selected to be the rising edge of the incoming pulse train. What we are interested in is the delta time between events and hence for this implementation Timer 1 is al-
SPEED_PRD
53
lowed to free run with a prescale of 32 (1.6uS resolution for 20MHz CPU clock) and the delta time , in scaled clock counts, is calculated as shown in Figure 3.
f(t) FFFFh 1 2 Case 2 T Case 1 f (t 2) w f (t 1) D + f (t 2) * f (t 1)
f (t 2) v f (t 1) D + 1 ) f (t 2) * f (t 1)
0 t t1 t2 t1 t2
Note: only true if t 2 * t 1 t T
Figure 3. Calculation of Speed In Figure 3, the vertical axis f(t) represents the value of the Timer counter which is running in continuous up count mode and resetting when the period register = FFFFh. Note that two cases need to be accounted for: the simple case where the Timer has not wrapped around and where it has wrapped around. By keeping the current and previous capture values it is easy to test for each of these cases. Once a robust period measurement is extracted from the averaging algorithm, the speed is calculated using the appropriate equations explained before. In order to maintain high precision in the calculation for the full range of motor speeds, a 32-bit/16-bit division is performed as shown in Figure 4 in the following.
1 + 7FFFFFFF(Q31) + speed(Q31 32bit) period period(Q0) Q31 31 30 s i i i i
Speed =
...
16 15 i f f
...
1 f
0 f
fraction sign
Figure 4. 32-Bit/16-Bit Division Once complete the result is a 32-bit value in Q31 format. This value is subsequently scaled to a 16 bit, Q15 format value for later calculation of the speed error (see Figure 4). Table 11. Variable Cross Ref Table
Variables in the Equations N N1 N1 Variables in the Code event_period speed_prd_max speed_prd speed_rpm
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SVGEN_MF Description
Space Vector Generator (Magnitude/Frequency Method)

This module calculates the appropriate duty ratios needed to generate a given stator reference voltage using space vector PWM technique. The stator reference voltage is described by its magnitude and frequency.
sv_freq sv_offset sv_gain SVGEN_MF Q15/Q15 Ta Tb Tc
Availability
Module Properties
Type: Target Independent, Application Dependent Target Devices: x24x/x24xx Direct ASM Version File Name: svgen_mf.asm C-Callable Version File Name: svgen_mf.asm
Each pre-initialized SVGENMF structure consumes 11 words in the .cinit section instance and 9 words in data memory.
SVGEN_MF
55

Name Inputs sv_freq sv_gain sv_offset Outputs Ta Description Normalized frequency of reference voltage vector. Normalized gain of the reference voltage vector. Normalized offset in the reference voltage vector Duty ratio of PWM1(CMPR1 register value as a fraction of associated period register, TxPR, value). Duty ratio of PWM3(CMPR2 register value as a fraction of associated period register, TxPR, value). Duty ratio of PWM5(CMPR3 register value as a fraction of associated period register, TxPR, value). Format Q15 Q15 Q15 Q15 Range 80007FFF 80007FFF 80007FFF 80007FFF
Tb
Q15
80007FFF
Tc
Q15
80007FFF
Init / Config
none

.ref .ref SVGEN_MF, SVGEN_MF _INIT sv_freq, sv_gain, sv_offset, Ta, Tb, Tc ;function call ;input/output
Memory map: All variables are mapped to an uninitialized named section svgen_mf Example:
ldp #sv_freq ;Set DP for module input bldd #input_var1, sv_freq ;Pass input variables to module inputs bldd #input_var2, sv_gain bldd #input_var2, sv_offset CALL SVGEN_MF ldp #output_var1 bldd #Ta, output_var1 bldd #Tb, output_var2 bldd #Tc, output_var3 ;Set DP for output variable ;Pass module outputs to output variables
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The structure of the SVGENMF object is defined by the following structure definition
/* Define the structure of the SVGENMF (Magnitude and angular velocity based Space Vector Waveform Generator) */ typedef struct { int int int int int int int int int gain; freq; freq_max; alpha; sector; va; vb; vc; (*calc)(); /* /* /* /* /* /* /* /* /* Waveform amplitude Q15 Input Frequency setting Q15 Input Frequency setting Q0 Input Internal var Sector angle history Internal var Sector number history Phase A output Q15 Phase B output Q15 Phase C output Q15 Pointer to calculation function */ */ */ */ */ */ */ */ */
} SVGENMF;

Name Inputs freq freq_max gain Outputs va Description Fraction of Frequency of reference voltage vector. Frequency of reference voltage vector. Required gain for the desired reference voltage vector. Duty ratio of PWM1(CMPR2 register value as a fraction of associated period register, TxPR, value). Duty ratio of PWM3(CMPR2 register value as a fraction of associated period register, TxPR, value). Duty ratio of PWM5(CMPR3 register value as a fraction of associated period register, TxPR, value). Format Q15 Q0 Q15 Q15 Range 80007FFF 80007FFF 80007FFF 80007FFF
vb
Q15
80007FFF
vc
Q15
80007FFF

SVGENMF The module definition itself is created as a data type. This makes it convenient to instance a Space Vector Generation module. To create multiple instances of the module simply declare variables of type SVGENMF. SVGENDQ_handle Typedefed to SVGENMF *
SVGEN_MF
57
SVGENMF_DEFAULTS Initializer for the SVGENMF Object. This provides the initial values to the terminal variables, internal variables, as well as method pointers.
Methods
void calc(SVGENMF_handle) The default definition of the object implements just one method the runtime compute function for the generation of the space vector modulation functions. This is implemented by means of a function pointer, and the default initializer sets this to svgenmf_calc. The argument to this function is the address of the SVGENMF object. Instantiation: The following example instances two such objects:
SVGENMF sv1,sv2;
Module Usage

SVGENMF sv1=SVGEN_DEFAULTS,sv2=SVGEN_DEFAULTS;

sv1.calc(&sv1);
Example: Lets instance two SVGENMF objects, otherwise identical, but running with different freq values.
SVGENMF sv1=SVGEN_DEFAULTS; /* Instance the first object */ SVGENMF sv2=SVGEN_DEFAULTS; /* Instance the second object*/ main() { sv1.freq=1200; /* Set properties for sv1 */ sv2.freq=1800; /* Set properties for sv2 */ } void interrupt periodic_interrupt_isr() { sv1.calc(&sv1); /* Call compute function for sv1 */ sv2.calc(&sv2); /* Call compute function for sv2 */ x=sv1.va; y=sv1.vb; z=sv1.vc; p=sv2.va; q=sv2.vb; r=sv2.vc; /* Access the outputs of sv1 */
/* Access the outputs of sv2 */
/* Do something with the outputs */ }
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The Space Vector Pulse Width Modulation (SVPWM) refers to a special switching sequence of the upper three power devices of a three-phase voltage source inverters (VSI) used in application such as AC induction and permanent magnet synchronous motor drives. This special switching scheme for the power devices results in 3 pseudosinusoidal currents in the stator phases.
Q1 a VDC + Q2 a b Q4 c Q6 b Q3 c Q5
VA
VB motor phases
VC
Figure 5. Power Circuit Topology for a Three-Phase VSI It has been shown that SVPWM generates less harmonic distortion in the output voltages or currents in the windings of the motor load and provides more efficient use of DC supply voltage, in comparison to direct sinusoidal modulation technique.
a A VDC
c Z Z Z N C c ACI or PMSM
Figure 6. Power Bridge for a Three-Phase VSI For the three phase power inverter configurations shown in Figure 5 and Figure 6, there are eight possible combinations of on and off states of the upper power transistors. These combinations and the resulting instantaneous output line-to-line and phase voltages, for a dc bus voltage of VDC, are shown in Table 14.
SVGEN_MF
59
Table 14. Device On/Off Patterns and Resulting Instantaneous Voltages of a 3-Phase Power Inverter
c 0 0 0 0 1 1 1 1 b 0 0 1 1 0 0 1 1 a 0 1 0 1 0 1 0 1 VAN 0 2VDC/3 VDC/3 VDC/3 VDC/3 VDC/3 2VDC/3 0 VBN 0 VDC/3 2VDC/3 VDC/3 VDC/3 2VDC/3 VDC/3 0 VCN 0 VDC/3 VDC/3 2VDC/3 2VDC/3 VDC/3 VDC/3 0 VAB 0 VDC VDC 0 0 VDC VDC 0 VBC 0 0 VDC VDC VDC VDC 0 0 VCA 0 VDC 0 VDC VDC 0 VDC 0
The quadrature quantities (in dq frame) corresponding to these 3 phase voltages are given by the general Clarke transform equation: V ds + V AN V qs + (2V BN ) V AN) 3
In matrix from the above equation is also expressed as, 1 V 1 1 * * AN V ds 2 2 2 V BN V qs + 3 3 3 * V CN 0 2 2 Due to the fact that only 8 combinations are possible for the power switches, Vds and Vqs can also take only a finite number of values in the (dq) frame according to the status of the transistor command signals (c,b,a). These values of Vds and Vqs for the corresponding instantaneous values of the phase voltages (VAN, VBN, VCN) are listed in Table 15. Table 15. Switching Patterns, Corresponding Space Vectors, and their (dq) Components
c 0 0 0 0 1 1 1 1 b 0 0 1 1 0 0 1 1 a 0 1 0 1 0 1 0 1 Vds 0 2V DC 3 V * DC 3 V DC 3 V * DC 3 V DC 3 2V DC * 3 0 Vqs 0 0 V DC 3 V DC * * 3 V DC 3 V DC 3 0 0 Vector O0 U0 U120 U60 U240 U300 U180 O111
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These values of Vds and Vqs, listed in Table 15, are called the (dq) components of the basic space vectors corresponding to the appropriate transistor command signal (c,b,a). The space vectors corresponding to the signal (c,b,a) are listed in the last column in Table 15. For example, (c,b,a)=001 indicates that the space vector is U0.The eight basic space vectors defined by the combination of the switches are also shown in Figure 7.
U 120(010) q U 60(011)
U 180(110)
O 111(111)
O 0(000)
U 0(001)
U 240(100)
U 300(101)
Figure 7. Basic Space Vectors In Figure 7, vectors corresponding to states 0 (000) and 7 (111) of the switching variables are called the zero vectors. Decomposing the reference voltage vector V* The objective of Space Vector PWM technique is to approximate a given stator reference voltage vector V* by combination of the switching pattern corresponding to the basic space vectors. The reference voltage vector V* is obtained by mapping the desired three phase output voltages(line to neutral) in the (dq) frame through the Clarke transform defined earlier. When the desired output phase voltages are balanced three phase sinusoidal voltages, V* becomes a vector rotating around the origin of the (dq) plane with a frequency corresponding to that of the desired three phase voltages. The magnitude of each basic space vector, as shown in Figure 8, is normalized by the maximum value of the phase voltages. Therefore, when the maximum bus voltage is VDC, the maximum line to line voltage is also VDC, and so the maximum phase voltage(line to neutral) is VDC/3. From Table 15, the magnitude of the basic space vectors is 2VDC/3. When this is normalized by the maximum phase voltage(VDC/3), the magnitude of the basic space vectors becomes 2/3. These magnitudes of the basic space vectors are indicated in Figure 8.
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61
q
U120 (010) Uy w V*
U60 (011) Ux V *+ MV max e ja
S3 U180 (110) * 2 3 dyUy a
dxUx
Sector S1 2 U0 3 0000 (001) FFFF
S4 S6 S5 0000 Integrator 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 FFFF U300 (101) 8-bit sine table lookup
U240 (100)
Figure 8. Projection of the Reference Voltage Vector Representing the reference vector V* with the basic space vectors requires precise control of both the vector magnitude M (also called the modulation index) and the angle . The aim here is to rotate V* in the dq plane at a given angular speed (frequency) . The vector magnitude M controls the resultant peak phase voltage generated by the inverter. In order to generate the reference vector V*, a time average of the associated basic space vectors is required, i.e. the desired voltage vector V* located in a given sector, can be synthesized as a linear combination of the two adjacent space vectors, Ux and Uy which frame the sector, and either one of the two zero vectors. Therefore, V *+ dxUx ) dyUy ) dzUz where Uz is the zero vector, and dx, dy and dz are the duty ratios of the states X, Y and Z within the PWM switching interval. The duty ratios must add to 100% of the PWM period, i.e: dx + dy + dz = 1. Vector V* in Figure 8 can also be written as: V *+ MV max e ja + dxUx ) dyUy ) dzUz where M is the modulation index and Vmax is the maximum value of the desired phase voltage. By projecting V* along the two adjacent space vectors Ux and Uy, we have, MV max cos a + dx| Ux | ) dy| Uy | cos 60 MV max sin a + dy| Uy | sin 60
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SPRU447
Since the voltages are normalized by the maximum phase voltage, Vmax=1. Then by knowing |Ux| = |Uy| = 2/3 (when normalized by maximum phase voltage), the duty ratios can be derived as, dx + M sin(60 * a) dy + M sin(a) These same equations apply to any sector, since the dq reference frame, which has here no specific orientation in the physical space, can be aligned with any space vector. Implementation of sin function In this implementation the angular speed is controlled by a precision frequency generation algorithm which relies on the modulo nature (i.e. wrap-around) of a finite length register, called Integrator in Figure 8. The upper 8 bits of this integrator (a data memory location in 24x/24xx) is used as a pointer to a 256 word Sine lookup table. By adding a fixed value (step size) to this register, causes the 8 bit pointer to cycle at a constant rate through the Sine table. In effect we are integrating angular velocity to give angular position. At the end limit the pointer simply wraps around and continues at the next modulo value given by the step size. The rate of cycling through the table is very easily and accurately controlled by the value of step size. As shown in Figure 8, sine of is needed to decompose the reference voltage vector onto the basic space vectors of the sector the voltage vector is in. Since this decomposition is identical among the six sectors, only a 60_ sine lookup table is needed. In order to complete one revolution (360o) the sine table must be cycled through 6 times. For a given step size the angular frequency (in cycles/sec) of V* is given by: w+ where fs = sampling frequency (i.e. PWM frequency) STEP = angle stepping increment m = # bits in the integration register. For example, if fs = 24KHz, m=16 bits & STEP ranges from 02048 then the resulting angular frequencies will be as shown in Table 16. Table 16. Frequency Mapping
STEP 1 20 40 60 80 100 Freq (Hz) 0.061 1.22 2.44 3.66 4.88 6.10 STEP 600 700 800 900 1000 1100 Freq (Hz) 36.62 42.72 48.83 54.93 61.04 67.14 STEP 1700 1800 1900 2000 2100 2200 Freq (Hz) 103.76 109.86 115.97 122.07 128.17 134.28
STEP f s 6 2m
From the table it is clear that a STEP value of 1 gives a frequency of 0.061Hz, this defines the frequency setting resolution, i.e. the actual line voltage frequency delivered to the AC motor can be controlled to better than 0.1 Hz.
SVGEN_MF
63
For a given fs the frequency setting resolution is determined by m the number of bits in the integration register. Table 17 shows the theoretical resolution which results from various sizes of m. Table 17. Resolution of Frequency Mapping
m (# bits) 8 12 14 16 Freq res (Hz) 15.6250 0.9766 0.2441 0.0610 m (# bits) 17 18 19 20 Freq res (Hz) 0.0305 0.0153 0.0076 0.0038
Another important parameter is the size of the lookup table. This directly effects the harmonic distortion produced in the resulting synthesized sine wave. As mentioned previously a 256 entry sine table is used which has a range of 60. This gives an angle lookup resolution of 60 / 256 = 0.23. The table entries are given in Q15 format and a summarized version is shown below.
; ;No. Samples: 256, Angle Range: 60, Format: Q15 ; ; SINVAL ; Index Angle Sin(Angle) ; STABLE .word 0 ; 0 0 0.00 .word 134 ; 1 0.23 0.00 .word 268 ; 2 0.47 0.01 .word 402 ; 3 0.70 0.01 .word 536 ; 4 0.94 0.02 .word 670 ; 5 1.17 0.02 .word 28106 ; 252 59.06 0.86 .word 28175 ; 253 59.30 0.86 .word 28243 ; 254 59.53 0.86 .word 28311 ; 255 59.77 0.86
Realization of the PWM Switching Pattern Once the PWM duty ratios dx, dy and dz are calculated, the appropriate compare values for the compare registers in 24x/24xx can be determined. The switching pattern in Figure 9 is adopted here and is implemented with the Full Compare Units of 24x/24xx. A set of 3 new compare values, Ta, Tb and Tc, need to be calculated every PWM period to generate this switching pattern.
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SPRU447
d0 Ta dx dv d7 d0 dx
Tb
Tc
T = 1 PWM period
Note: d0 + d7 + dz
Figure 9. PWM Output Switching Pattern From Figure 9, it can be seen: Ta + (T * dx * dy) 2
Tb + dx ) Ta Tc + T * Ta If we define an intermediate variable T1 using the following equation: T1 + T * dx * dy 2
Then for different sectors Ta, Tb and Tc can be expressed in terms of T1. Table 18 depicts this determination. Table 18. Calculation of Duty Cycle for Different Sectors
Sector Ta Tb Tc U0, U60 T1 dx+Ta TTa U60, U120 dy+Tb T1 TTb U120, U180 U180, U240 U240, U300 TTb T1 dx+Tb TTc dy+Tc T1 dx+Tc TTc T1 U300, U0 T1 TTa dy+Ta
The switching pattern shown in Figure 9 is an asymmetric PWM implementation. However, 24x/24xx devices can also generate symmetric PWM. Little change to the above implementation is needed to accommodate for this change. The choice between the symmetrical and asymmetrical case depends on the other care-about in the final implementation.
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65
V_HZ_PROFILE Description
Volts/Hertz Profile for AC Induction Motor

This module generates an output command voltage for a specific input command frequency according to the specified volts/hertz profile. This is used for variable speed implementation of AC induction motor drives.
V_Hz_PROFILE vhz_freq v_out
Availability
Module Properties
Type: Target Independent/Application Dependent Target Devices: x24x/x24xx Direct ASM Version File Name: vhz_prof.asm C-Callable Version File Names: vhzprof.asm, vhzprof.h
Item Code size Data RAM xDAIS module xDAIS component ASM Only 42 words 9 words No No C-Callable ASM 48 words 0 words Yes No IALG layer not implemented Comments
Each pre-initialized VHZPROFILE struction consumes 10 words in the .cinit section instance and 8 words in data memory.
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Name Inputs Outputs Init / Config vhz_freq v_out FL FH Fmax vf_slope Vmax Vmin Description Command frequency of the stator voltage Command stator output voltage Format Q15 Q15 Range 07FFF 07FFF Application dependent Application dependent Application dependent Application dependent Application dependent Application dependent
Low frequency point on v/f profile. Q15 High frequency point on v/f profile. Maximum frequency Slope of the v/f profile Voltage corresponding to FH Voltage corresponding to FL Q15 Q15 Q12 Q15 Q15
These parameters are initialized to some default values in the module initialization routine. Initialize these from the system file if the default values are not used.

.ref .ref V_Hz_PROFILE, V_Hz_PROFILE _INIT vhz_freq, v_out ;function call ;input/output
Memory map: All variables are mapped to an uninitialized named section vhz_prof Example:
ldp #vhz_freq bldd #input_var1, vhz_freq ;Set DP for module input ;Pass input variable to module ;input
CALL V_Hz_PROFILE ldp #output_var1 bldd #v_out, output_var1 ;Set DP for output variable ;Pass module output to output ; variable
V_HZ_PROFILE
67

The object is defined as
Frequency input Q15 */ Freq below which vout=vmin:Q15 Input Freq above which vout=vmax Q15 Input Slope of the Vhz profile: Q15 Input Voltage output above fmax Q15 Input Voltage output below fmin Q15 Input Computed output voltage Q15 Output /* Ptr to the calculation function */ */ */ */ */ */ */
typedef struct { int freq; /* int fl; /* int fh; /* int slope; /* int vmax; /* int vmin; /* int vout; /* int (*calc)(); } VHZPROFILE;

Name Inputs Outputs Init / Config freq vout fl fh slope vmax vmin Description Command frequency of the stator voltage Command stator output voltage Format Q15 Q15 Range 07FFF 07FFF Application dependent Application dependent Application dependent Application dependent Application dependent
Low frequency point on v/f profile. Q15 High frequency point on v/f profile. Slope of the v/f profile Voltage corresponding to fl Voltage corresponding to fh Q15 Q12 Q15 Q15
These parameters are initialized to some default values in the module initialization routine. Initialize these from the system file if the default values are not used.

VHZPROFILE The module definition itself is created as a data type. This makes it convenient to instance a VHZ Profile module. To create multiple instances of the module simply declare variables of type VHZPROFILE. DEFAULT_PROFILE Initializer for the SVGENMF Object. This provides the initial values to the terminal variables, internal variables, as well as method pointers.
Methods
void calc(VHZPROFILE *) The only method implemented for this object is the runtime compute function for the calculation of the vout value depending on the object parameters. The argument to this function is the address of the VHZPROFILE object. Instantiation: The following example instances two such objects:
VHZPROFILE vhz1,vhz2;
Module Usage
68
SPRU446

VHZPROFILE vhz1=DEFAULT_PROFILE;

vhz1.calc(&vhz1);
Example: Lets instance two SVGENMF objects, otherwise identical, but running with different freq values. These SVGENMF objects need the computed value of the envelope for the SVGEN waveforms, and this is computed by the VHZPROFILE objects.
SVGENMF sv1=SVGEN_DEFAULTS; SVGENMF sv2=SVGEN_DEFAULTS; /* Instance the first object */ /* Instance the second object*/
VHZPROFILE vhz1=DEFAULT_PROFILE; VHZPROFILE vhz2=DEFAULT_PROFILE; main() { sv1.freq=1200; sv2.freq=1800; }
/* Set properties for sv1 */ /* Set properties for sv2 */
void interrupt periodic_interrupt_isr() { vhz1.freq=sv1.freq; /* Connect the sv1, sv2 freq to vhz1 and vhz2 */ vhz1.freq=sv1.freq; vhz2.calc(&vhz1); vhz2.calc(&vhz1); sv1.gain=vhz1.gain; sv2.gain=vhz2.gain; sv1.calc(&sv1); sv2.calc(&sv2); x=sv1.va; y=sv1.vb; z=sv1.vc; p=sv2.va; q=sv2.vb; r=sv2.vc; /* Call compute function for sv1 */ /* Call compute function for sv2 */ /* Access the outputs of sv1 */ /* Call the compute functions */
/* Pass the computed output voltages back to the svgens */
/* Access the outputs of sv2 */
/* Do something with the outputs. Something is probably modulate PWMs to drive motors with. */ }
V_HZ_PROFILE
69
If the voltage applied to a three phase AC Induction motor is sinusoidal, then by neglecting the small voltage drop across the stator resistor, we have, at steady state, V [ jw L i.e., V[w L where V and L are the phasor representations of stator voltage and stator flux, and V and L are their magnitude, respectively. Thus, we get V L+w+ 1 V 2p f From the last equation, it follows that if the ratio V/f remains constant for any change in f, then flux remains constant and the torque becomes independent of the supply frequency. In actual implementation, the ratio of the magnitude to frequency is usually based on the rated values of these parameters, i.e., the motor rated parameters. However, when the frequency, and hence the voltage, is low, the voltage drop across the stator resistor cannot be neglected and must be compensated for. At frequencies higher than the rated value, maintaining constant V/Hz means exceeding rated stator voltage and thereby causing the possibility of insulation break down. To avoid this, constant V/Hz principle is also violated at such frequencies. This principle is illustrated in Figure 10.
Vrate Voltage
^ ^ ^ ^
f rate
Frequency
Figure 10. Voltage Versus Frequency Under the Constant V/Hz Principle Since the stator flux is maintained constant (independent of the change in supply frequency), the torque developed depends only on the slip speed. This is shown in Figure 11. So by regulating the slip speed, the torque and speed of an AC Induction motor can be controlled with the constant V/Hz principle.
Torque
Slip speed
Figure 11. Toque Versus Slip Speed of an Induction Motor With Constant Stator Flux
70
SPRU446
Both open and closed-loop control of the speed of an AC induction motor can be implemented based on the constant V/Hz principle. Open-loop speed control is used when accuracy in speed response is not a concern such as in HVAC (heating, ventilation and air conditioning), fan or blower applications. In this case, the supply frequency is determined based on the desired speed and the assumption that the motor will roughly follow its synchronous speed. The error in speed resulted from slip of the motor is considered acceptable. In this implementation, the profile in Figure 10 is modified by imposing a lower limit on frequency. This is shown in Figure 12. This approach is acceptable to applications such as fan and blower drives where the speed response at low end is not critical. Since the rated voltage, which is also the maximum voltage, is applied to the motor at rated frequency, only the rated minimum and maximum frequency information is needed to implement the profile.
Vrate Vmin f min Voltage
f rate
Frequency
Figure 12. Modified V/Hz Profile The command frequency is allowed to go below the minimum frequency, fmin, with the output voltage saturating at a minimum value, Vmin . Also, when the command frequency is higher than the maximum frequency, fmax, the output voltage is saturated at a maximum value, Vmax.
V_HZ_PROFILE
71

3-Phase AC Induction Motor

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ACI3-1 System Documentation

Variable Speed Control of 3-Phase AC Induction Motor

Digital Control Systems (DCS) Group

SPRU438 September 2000

Copyright 2001, Texas Instruments Incorporated

ACI31 Variable Speed Control of Phase AC Induction Motor

Figure 1. 3-Phase ACI Motor Drive System Diagram

PWM1 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6

Figure 2. Software Flowchart

Initialize software modules

Save contexts and clear interrupt flags

Initialize timer T1 and realtime monitor

Execute the selected incremental build

Enable T1 underflow interrupt and core interrupt INT2

Execute DATA_LOG module

Initialize other system parameters and incremental build options

Hardware and Software Configuration

Hardware and Software Configuration

Configuration for DMC1000

JP1, JP2, JP3 JP4 JP17

JP19 JP20 JP22

Install jumper on pins 12 Install jumper on pins 23 Install jumper on pins 12

Hardware and Software Configuration

Configuration for DMC1500

JP1, JP2, JP3 JP4 JP17 JP27

Configuration for DMC to EVM Interface Board

Loading and Building CC Project for Assembly Case

Hardware and Software Configuration

Loading and building CC Project for C Case

Hardware and Software Configuration

code composer project as well, or can be found in the directory

This line sets the target to one of the available choices.

etc. To watch/modify variables such as pid coefficients etc watch

Incremental System Build Phase 1

Incremental System Build Phase 1

phase1_commissioning phase2_commissioning phase3_commissioning

.set .set .set

- The software modules utilized in this phase are RAMP_CNTL, V_Hz_PROFILE,

dlog_iptr1 = Ta and dlog_iptr2 = Vab (Figure 5)

Incremental System Build Phase 1

Figure 3. Phase 1 Incremental Build for ACI1-1

Ta speed_setpt RAMP_CNTL x V_Hz_ PROFILE SVGEN_MF Tb Tc

Graph Window1 Graph Window2

Incremental System Build Phase 1

Incremental System Build Phase 2

Incremental System Build Phase 2

Incremental System Build Phase 2a

phase1_commissioning phase2_commissioning phase3_commissioning

.set .set .set

required dead band through avoid shoot thorough faults.

Figure 6. Phase 2a Software Block Diagram for ACI3-1 System

SVGEN_MF Ta Tb Tc CC GRAPH DISPLAY 1 CC GRAPH DISPLAY 2 direction

Incremental System Build Phase 2

Motor rotational direction in Figure 8 will be opposite of rotational direction in Figure 7.

Incremental System Build Phase 2

Incremental System Build Phase 2b

board (use the supplied ribbon cable).

face board (use the supplied ribbon cable).

tions and second the value of the variable direction.

change the rotational direction.

Incremental System Build Phase 2

Figure 9. Complete Hardware Setup for Phase 2b Implementation

3-phase ACI XDS510PP