JawaharlalNehruEngineeringCollage

LaboratoryManual
EDC-I For Second Year Students

Manual made by Prof. Neeta Pingle Author JNEC, Aurangabad

JawaharlalNehruEngineeringCollege

TechnicalDocument
This technical document is a series of Laboratory manuals of Electronics and Telecommunication Department and is a certified document of Jawaharlal Nehru engineering College. The care has been taken to make the document error-free. But still if any error is found, kindly bring it to the notice of subject teacher and HOD.

Recommended by. HOD

Approved by. Principal

FOREWORD

Itismygreatpleasuretopresentthis laboratorymanualforsecondyearengineeringstudentsforthesubjectof ElectronicDevices&circuitsItounderstandandvisualizethebasicconceptsofvariouscircuitsusingICs.Electronic Devices&circuitsIcoversbasicconceptsofelectronics.Thisbeingacoresubject,itbecomesveryessentialtohave cleartheoreticalanddesigningaspects. Thislabmanualprovidesaplatformtothestudentsforunderstandingthebasicconceptsofelectronicdevicesand circuits.Thispracticalbackgroundwill helpstudentstogainconfidenceinqualitativeandquantitativeapproachto electroniccircuits. GoodLuckforyourEnjoyableLaboratorySessions.

H.O.D ECTDept

LABORATORYMANUALCONTENTS

This manual is intended for the Second Year students of ECT/IE branches in the subject of Electronic Devices & Circuits-I. This manual typically contains practical/ Lab Sessions related to Electronic Devices & Circuits covering various aspects related to the subject for enhanced understanding. Students are advised to thoroughly go through this manual rather than only topics mentioned in the syllabus as practical aspects are the key to understanding and conceptual visualization of theoretical aspects covered in the books. Good Luck for your enjoyable Laboratory Sessions.

Prof. Neeta Pingle

SUBJECTINDEX:

1. Dos & Donts in Laboratory. 2. Lab Exercises 1. To plot forward characteristics of pn junction diode (If vs. Vf) 2. To plot Input & output characteristics of BJT in CE configuration 3. To plot output characteristics of JFET. i) Plot of transfer characteristics from the output characteristics 4. To study JFET CS as an amplifier .To find performance for JFET amplifier Av ,Ri, Ro. 5. To study BJT fixed bias with & without emitter resistor.. 6. To plot Frequency Response of RC coupled amplifier 7. To study class c amplifier as a Tuned Amplifier 8. To study JFET self bias circuit arrangement & to find 'Q' point with graphical method 3. Quiz 4. Conduction of viva voce examination 5. Evaluation & marking scheme

DosandDontsinLaboratory:
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1.

Do not handle any equipment before reading the instructions /Instruction manuals.

2. Read carefully the power ratings of the equipment before it is switched ON, whether ratings 230 V/50 Hz or 115V/60 Hz. For Indian equipment, the power ratings are normally 230V/50Hz. If you have equipment with 115/60 Hz ratings, do not insert power plug, as our normal supply is 230V/50Hz., which will damage the equipment. 3. Observe type of sockets of equipment power to avoid mechanical damage. 4. Do not forcefully place connectors to avoid the damage. 5. Strictly observe the instructions given by the Teacher/ Lab Instructor. Instruction for Laboratory Teachers:1. Submission related to whatever lab work has been completed should be done during the next lab session.

2. Students should be instructed to switch on the power supply after getting the checked by the lab assistant / teacher. After the experiment is over, the students must hand over the circuit board, wires, CRO probe to the lab assistant/teacher. 3. The promptness of submission should be encouraged by way of marking and evaluation patterns that will benefit the sincere students.

Exercise No.1:(2 Hours):- 1 Practical Aim :- To plot forward characteristics of pn junction diode (If vs. Vf) Apparatus :- D.C.regulated power supply (0-30V) , Diode(1N4007),
Resistance (820 ), voltmeter, ammeter (0-25mA) Connecting wires

Circuit Diagram :-

R1 1k Vf 30V D1 DIODE
A a

+ 10V

Procedure:1. Connect the circuit as shown in fig. 2. By varying applied voltage measure corresponding reading for voltage & current. 3. Plot the graph of voltage & forward current.

Observations:- 7

Input voltage (Vdc) = -------V

Applied voltage Vdc ( V)

O/P Voltage Vf ( V)

Current If ( mA)

Result:- Current increases exponentially with respect to voltage after cut

in voltage as seen from the graph

Exercise No.2:(2 Hours):- 1 Practical Aim :- To plot Input & output characteristics of BJT in CE configuration Apparatus
:- D.C.regulated power supply , BJT- NPN(BC148), PNP(BC157), Ammeter(0-10A)&(0-25mA),Voltmeter (0-12V)& (0-15V)

Circuit Diagram :-

R1 1k R2 1k

Q1 NPN

Procedure:1. Make the circuit for CE configuration. Connect all the voltmeters & Ammeters. 2. Input characteristics:a. Keep VCE constant, change P1 note IB & VBE . b. Repeat the same procedure for different values of VCE. b. Plot the input curve between IB & VBE for different values of VCE. c. Find out the dynamic input resistance from curve plotted. 3. Output characteristics:a. Keep IB constant (by setting P1) change P2 note IC & VCE . b. Repeat the same procedure for different values of IB. c. Plot the output curve between IC & VCE for different values of IB. d. Find out the dynamic output resistance ,DC current gain & AC current gain using the formulae given below.

Formulae:Input characteristics:i) Dynamic input resistance (ri) = VBE IB Output characteristics:i) Dynamic ouput resistance (ro) = VCE Ic

ii) DC current gain dc = IC IB ii) AC current gain = IC IB

Observations :i) ri = --------- ii) ro = --------- iii) dc = --------iv) = ---------

For Input characteristics:-

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VCE = 2V VBE (V) IB (mA)

VCE = 6V VBE (V) IB (mA) VBE (V)

VCE = 10V IB (mA)

For output characteristics:-

IB=10A VCE(V) IC(mA)

IB=20A

IB=40A VCE(V) IC(mA)

VCE(V)

IC(mA)

Result :- Thus we have plotted the input output characteristics of BJT

in CE mode.

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Exercise No.3:(2 Hours):- 1 Practical Aim :- To plot drain characteristics of JFET.

i) Plot the transfer characteristics from the drain characteristics

Apparatus :- Digital multimeter (DMM) or Voltmeter (0-25V),

Ammeter(0-10mA), JFET (BFW10), Rg=1K , RD=100

Circuit Diagram :-

RD 1k RG 1K NJFET Q1 VGG 012V + + VDD 012V

Procedure:For output characteristics: 1. Study the circuit provided on the front panel of the kit. 2. Connect the milliammeter & voltmeters at the respective places. 3. Keep the VGG & VDD at minimum positions. 4. Switch on the power supply. 5. Keep the VGS at fixed value say VGS=0V 6. Now increase the VDD in steps & note down the readings of ID &VDS. with the 0.5V interval of VDS 7. Plot the graph with VDS along x axis & ID along y axis. 8. Repeat the steps from 6 to 8 for different values of VGS

For transfer characteristics: 1. Keep the VDS at constant voltage say VDS =1V 2. Now increase the VGG in steps & note down the readings of ID &VGS. with the 1V interval of VGS

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3. Plot the graph with VGS along x axis & ID along y axis. 4. Repeat the steps from 1 to 3 for different values of VDS

Observations :For output characteristics:VGS=0V ,VGS=-1V, VGS=-2V, VGS =-3V ,VGS =-4V Sr.No. VDS(V) ID(mA)

For transfer characteristics:VDS(V) = ----------V Sr.No. VGS(V) ID(mA)

Result

:- The Drain & Transfer characteristics of JFET has been

studied. From the experiment it can be conclude that the depletion layer increases & decreases as the gate to source voltage is reduced & increased respectively.

Exercise No.4:(2 Hours):- 1 Practical

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Aim :- To study JFET CS as an amplifier .To find performance for

JFET amplifier Av, Ri, Ro.

Apparatus

:- CRO, Function generator, Patch chords,

JFET -BFW10, Resistors- 360, 62 ,4.87K, 1M, C=0.1f,1f

Circuit Diagram :-

Vcc 12V

R1 1k C1 1uF

RD 1k

Q1 BFW10 V0 R2 1k RS 1k CS 1uF

Procedure :1. Study the circuit provided on the front panel of the kit. 2. Connect the function generator at the input terminals. 3. Connect the CRO at the output terminals. 4. Apply a sine wave I/P Vi of 1KHz, Adjust the amplitude so that transistor should not enter in saturation 5. Switch on the power supply 6. Now increase I/P frequency Fi from 100 Hz to 200 KHz in suitable steps, by keeping the input voltage constant. Observe & note the corresponding amplified output voltage VO on the CRO which should be 1800 out of phase with respect to input. Determine its gain. 7. Plot the graph, of I/P frequency Fi VS Gain Vo /Vi . Determine its bandwidth.

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Formulae :1. AV = VO/ Vi 2. Ri = 3. Ro =

Observations:Input voltage (Vi) = -------V(constant)

I/P Frequncy Fi 100 Hz

O/P Voltage VO (V)

Gain AV = VO/ Vi

100 KHz

Result :- JFET in common source mode work as an amplifier. The bandwidth is found to be
----------- Hz

Exercise No.5:(2 Hours):- 1 Practical

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Aim :- To study BJT fixed bias with & without emitter resistor.
.

Apparatus :- Transistor BC148, =173 approx, resistors RB1 =100k,

RB2=180k, RC=470, RE=180 , bulb , Supply voltage :+12V, Ammeter (0-100A)(0-25mA), Voltmeter(0-15V)

Circuit Diagram :-

V1 10V +V RC 470

RB1 100k

RB2 180K

2 Q1 NPN

RE 180K

Procedure:1. Study the circuit provided on the front panel of the kit & connect the

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ammeter voltmeter as shown in circuit diagram. 2. Connect Base of transistor to base resistor RB1 and Emitter to point 2 (ground) , by using patch cords the circuit becomes Fixed Bias. Calculate the theoretical value of currents & voltages and note the corresponding values as per observation table , by observing ammeter & voltmeter readings.

Repeat the above procedure for R=RB1. 3. Now , connect the Emitter resistor RE in the circuit & select R=R B1,the circuit becomes Fixed Bias with Emitter Resistor .Repeat the above procedure & note the ammeter voltmeter reading as per observation table. Repeat the above procedure for R=RB2 4. Draw the DC load line .

Observations:For Fixed Bias:- =173 Base Resistor IB=VCC/R

B

IB (PR)

IC= IB (TH)

IC (PR)

VCE = VCC + ICRC (TH)

VCE (PR)

(TH) RB =RB1 =--------RB =RB2 =---------

-----mA

-----mA

-----mA

-----mA

-----mA

-----mA

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Stability factor= S=1+ For Fixed Bias with Emitter Resistor : =173 , RB1 =---------- , RC =---------- , RE =---------- , RB2 =---------- . IB = VCC RB VC= VCC - IC RC ,
,

IC (sat) =

VCC RE +RC

Actual IC =

VCC RE +RB/

VE=

IE RE

IE R E ,

VCE=

VC - VE

S=

1+ RE RE +RC

1+
,

RB

IB (TH)

IB (PR)

ICsat (TH)

VC (TH)

VC (PR)

VE (TH)

VE (PR)

VCE (TH)

VCE (PR)

RB =RB1 =------RB =RB2 =-------

Result:- The stability factor for fixed bias & fixed bias with emitter resistor is found to be
-----------&----------- respectively.

Exercise No.6:(2 Hours):- 1 Practical Aim :- To study Frequency Response of two stage RC coupled amplifier

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Apparatus :- Signal Generator, CRO dual channel, Patch chords.

Resistors:- R1=1K, R2=1K, RC1= 2K , RE1= 100K , RE2=5.6K,RC2=1K , R3=47K , R4 =1K Capacitors:- C1= C3=100F, C2=1F, C=100F Transistors Q1, Q2 =BC548

Circuit Diagram :Vcc 12V

R1 1k

Rc1 1k C2 1uF

R3 1k

Rc2 1k C3 1uF

C1 1uF

Q1 NPN

Q2 NPN

+ Vs1 10V

R2 1k

Re1 1k

Ce1 1uF

R4 1k

Ce2 Re2 1uF 1k

Rf 1k

Cf 1uF

S1

Procedure:1. Study the circuit provided on the front panel of the kit. 2. Connect the signal generator at the input terminal of the circuit. 3. Connect the CRO at the output terminal of the first stage. 4. Switch ON the power supply. 5. Apply a sine wave input. Keep the input signal amplitude Vi constant so that transistor should not enter in saturation. 6. Now vary Input frequency Fi from 100 Hz to 200 KHz in suitable steps, Observe & note the

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corresponding O/P voltage VO. Determine the gain AV = VO/ Vi 7. Plot the graph, frequency of I/P Fi VS gain. Determine its bandwidth. 8. Also observe & note the output voltage (VO1) at collector of Q1 .Calculate the gain of first stage AV1 = VO1/ Vi 9. Also observe & note the output voltage (VO2) at collector of Q2 .Calculate the gain of second stage AV2 = VO2/ Vi. Calculate the overall gain AV= AV1 .AV2

Formulae:Bandwidth BW = fH - fL

Observations:Input voltage (Vi) = -------(constant) I/P Frequncy Fi 100 Hz O/P Voltage VO Gain AV = VO/ Vi Gain in dB

100 KHz

Result :- The output signal of a two stage RC coupled amplifier is in phase with the input signal . It
is because of the fact that its phase has been reversed twice by the transistor amplifier .By using two stages the overall gain increases.

Exercise No.7:(2 Hours):- 1 Practical

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Aim :- To study class c amplifier as a Tuned Amplifier Apparatus

:- Signal Generator, CRO dual channel, Patch chords, digital multimeter

Circuit Diagram :Vcc 6V +V

T1 10TO1 R1 1k R4 1k

C1 1uF Q1 NPN

+Vi 10V R2 1k R3 1k Ce 1uf

Procedure :1. Study the circuit provided on the front panel of the kit. 2. Apply a RF signal at input. 3. Switch ON the power supply. 4. Connect the CRO at the output terminals. 5. Keeping the input signal amplitude Vi constant, vary the Input signal frequency Fi from 1 KHz to 100 KHz in regular steps. 6. Observe & note the corresponding O/P voltage VO. Determine the voltage gain AV = VO/ Vi 7. Note the values of inductor & capacitor. Determine theoretical values of resonant frequency F0= 0.159 Hz LC 8. Plot the graph, of voltage gain AV VS Input signal frequency Fi. Determine its bandwidth. 9.Note 3dB bandwidth & resonant frequency F0 (Fr) from graph. Calculate Q factor of tuned circuit which is given by F0 / BW .

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Formulae:F0 = 0.159 LC Hz

Bandwidth BW = fH - fL

Observations :Input voltage (Vin) = -------(constant)

I/P Frequncy Fi 1KHz

O/P Voltage VO

Gain AV = VO/ Vin

100 KHz

Result :- For class-C amplifier resonant frequency F0 is ----------- Hz .The bandwidth is found to
be ----------- Hz & Q factor is -----------.

Exercise No.8:(2 Hours):- 1 Practical

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Aim :- To study JFET self bias circuit arrangement & to find 'Q' point with
graphical method.

Apparatus :- Signal Generator, CRO, Patch chords, JFET Circuit Diagram :-

RD V NJFET Q1 RG RS

Procedure:Setting a Q point:1.The Q point for a self biased JFET is established by determining the value of drain current (ID) for a desired gate to source voltage.(VGS) 2.Ii is desirable to set the point near the midpoint of transfer characteristics curve of JFET 3.The midpoint bias allows a maximum amount of drain current swing betweeen the values of IDS 4. If we want to design a self bias circuit ,then any of the following method is used : 1)Analytical method 2)Graphical method Graphical method:1.Draw a self bias line in such a way that it intersect the transfer charactristic curve near its midpoint. 2.The point of intersection of the self bias line & the transfer characteristic curve gives us the required 'Q' point. 3.The value of source resistor (Rs) is given by the ratio of source voltage (VGS) to the drain

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current(ID).

Formulae:Rs=VGS/ID

Result:- Thus we have found out the 'Q' point with graphical method.

3.Quiz on the subject:24

Q:1 When a pn-junction is forward biased (a) electrons in the n region enter into the p region (b) holes in the p region enter into the n region (c) both a and b (d) none of these Q:2 under normaloperating voltage , the reverse current in a silicon diode is about (a) 10mA (b) 1A (c) 1000 A (d) none of these Q:3 The most commonly used transistor circuit arrangement is (a) CB (b) CE (c) CC (d) none of these Q:4 The emitter of transistor is doped (a) heavily (b) lightly (c) moderately (d) none of these Q:5 The biasing circuit which gives best stability to the Q point is (a) base resistor biasing (b) feedback resistor biasing (c) potential divider biasing (d) emitter resistor biasing Q:6 The ideal value of stability factor is (a) 1 (b) 5 (c) 10 (d) 100 Q:7 A practical constant current source should have internal resistance as (a) zero (b) low (c) high (d) none of these

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4.ConductionofVivaVoceExaminations:
Teacher should conduct oral exams of the students with full preparation. Normally, the objective questions with guess are to be avoided. To make it meaningful, the questions should be such that

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depth of the students in the subject is tested. Oral examinations are to be conducted in cordial environment amongst the teachers taking the examination. Teachers taking such examinations should not have ill thoughts about each other and courtesies should be offered to each other in case of difference of opinion, which should be critically suppressed in front of the students.

5.Evaluationandmarkingsystem:
Basic honesty in the evaluation and marking system is absolutely essential and in the process impartial nature of the evaluator is required in the examination system to become. It is a primary responsibility of the teacher to see that right students who are really putting up lot of hard work with right kind of intelligence are correctly awarded. The marking patterns should be justifiable to the students without any ambiguity and teacher should see that students are faced with just circumstances.

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