Jpn. J. Appl. Phys. Vol. 42 (2003) pp. 20732076 Part 1, No.

4B, April 2003 #2003 The Japan Society of Applied Physics

Investigation of Gate-Induced Drain Leakage (GIDL) Current in Thin Body Devices: Single-Gate Ultra-Thin Body, Symmetrical Double-Gate, and Asymmetrical Double-Gate MOSFETs
Yang-Kyu C HOI, Daewon H A, Tsu-Jae K ING and Jerey BOKOR
Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA 94720, USA (Received September 19, 2002; revised manuscript received November 5, 2002; accepted for publication November 30, 2002)

Gate-induced drain leakage (GIDL) current is investigated in single-gate (SG) ultra-thin body eld eect transistor (FET), symmetrical double-gate (DG) FinFET, and asymmetrical DG metal oxide semiconductor eld eect transistor (MOSFET) devices. Measured reductions in GIDL current for SG and DG thin-body devices are reported for the rst time. The thin-body devices exhibit much lower GIDL current than bulk-Si MOSFETs, and the GIDL is found to decrease with decreasing body thickness. These results can be explained by the reduction in transverse electric eld at the surface of the drain and the increase in transverse eective mass with decreasing body thickness. [DOI: 10.1143/JJAP.42.2073]
KEYWORDS: gate-induced drain leakage (GIDL), ultra-thin body, silicon-on-insulator (SOI), FinFET, symmetrical double gate, asymmetrical double gate

1.

Introduction

As the metal oxide transistor eld eect transistor (MOSFET) channel length is scaled down to 50 nm and below, suppression of o-state leakage current becomes an increasingly dicult technological challenge, one that will ultimately limit the scalability of the conventional MOSFET structure. Thin-body silicon on insulator (SOI) transistor structures such as the single-gate (SG) ultra-thin body (UTB) FET1,2) and the double-gate (DG) FinFET3) are attractive for scaling CMOS into the nanoscale regime because of their excellent suppression of o-state leakage current. These advanced structures rely on a thin silicon channel to control short-channel eects, by eliminating any leakage paths far from the gate electrode. A thinner body allows for more aggressive scaling, so that such structures can be easier to scale to sub-50 nm gate lengths as compared to the classic bulk-Si MOSFET structure. It also allows for lower channel doping concentrations to be used, so long as gate-workfunction engineering techniques are available for adjusting the transistor threshold voltage. The advantages of low channel doping include improved eld-eect mobility for improved transconductance and drive current, and immunity to threshold-voltage variations caused by statistical dopant uctuations. Minimization of transistor o-state leakage current is an especially important issue for low-power circuit applications. A large component of o-state leakage current is gateinduced drain leakage (GIDL) current, caused by band-toband tunneling in the drain region underneath the gate:47) when there is a large gate-to-drain bias, there can be sucient energy-band bending near the interface between silicon and the gate dielectric for valence-band electrons to tunnel into the conduction band. GIDL imposes a constraint for gate-oxide thickness scaling because the voltage required to cause this band-to-band tunneling leakage current decreases with decreasing gate oxide thickness, and GIDL can pose a lower limit for standby power in memory devices. GIDL current becomes less signicant for digital logic applications as the power-supply voltage is reduced to below 1.1 V (corresponding to the energy band gap of silicon); however, it is still an important consideration for applica

tions such as dynamic random access memory (DRAM), for which data retention time is signicantly degraded by GIDL current.8) High-density (e.g. 1 Gb) DRAM must utilize transistors with high threshold voltage in order to suppress sub-threshold leakage current, for adequate data-retention time. This presents a signicant challenge for scaling down the transistor size. Since a relatively high substrate doping concentration (1:0 1018 cm3 or higher)9) is needed to achieve high threshold voltage, pn junction leakage and capacitance will be high, resulting in degraded retention characteristics. In order to circumvent these diculties, a negative word-line scheme was recently demonstrated10) and has received much attention for future generations of DRAM technology. GIDL current will be increased for this negative word-line scheme, however. In this work, the advantage of thin-body transistor structures for reducing GIDL current is investigated for dierent drain doping concentrations. SG-UTBFET, symmetrical DG-FinFET, and asymmetrical DG-FET devices are characterized and the dependence of GIDL current on body thickness is shown. The results indicate that GIDL is signicantly lower in thin-body transistors as compared with conventional bulk-Si MOSFETs. 2. GIDL Current Model

Band-to-band tunneling can be estimated using the WKB approximation and assumption of direct band-gap and uniform electric eld,11) although silicon is an indirect-gap semiconductor. The GIDL current density can then be simply modeled for the bulk-Si MOSFET4) by the equation J A Es expB=Es 1

where A is a pre-exponential parameter, B (typically 23 70 MV/cm7,12)) is a physically-based exponential parameter and the transverse electric eld Es at the surface is given by Vdg VFB 1:2 2 Es 3Tox The model for an indirect-gap semiconductor has the same electric eld dependence (expB=Es )) except that the energy band gap Eg is increased by the phonon energy, in deriving the value for the exponential parameter B.6) The measured GIDL is dependent on the drain doping prole (which results in a non-uniform electric eld), a transverse

E-mail address: ykchoi@eecs.berkeley.edu

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electric eld, and also the eective mass of tunneling electrons, each of which is dicult to determine accurately. B was an empirical parameter, therefore used practically as a tting parameter to match the model with measured data.4,7,15,18) 3. Device Simulation Study

Normalized Potential, s [V]

0.3 0.2 0.1 0.0

Bulk-MOSFET SG-UTBFET (TSi=5nm) DG-MOSFET (TSi=10nm) 0 2 4 6 Z [nm] 8 10

Equation (2) is not directly applicable to thin-body transistor structures because of the electric eld dependence on the body thickness. Figures 1 and 2 show that the transverse electric eld and potential in the drain region are lower in thin-body MOSFETs as compared to the bulk-Si MOSFET. This reduction is greater for the DG structure than for the SG structure, and the reduction in transverse electric eld increases as the body thickness decreases.13) There is no analytical equation available to describe the electric eld strength dependence on the body thickness, so we investigated the electric eld distribution using a 2-D device simulator (MEDICI). To be consistent with Kanes assumption of a uniform electric eld, uniform drain doping (ND 1 1018 cm3 ) was used. Figure 3 shows that the electric eld at the surface is signicantly lower in the thinbody devices (SG and symmetrical DG) than in the bulkMOSFET. (To rst-order approximation, the o-state performance of a SG-MOSFET is comparable to that of a symmetrical DG-MOSFET with twice the body thickness, which is why TSi is 2 thicker for the DG-MOSFET than for the SG-MOSFET in these simulations.) Figure 4 shows how the peak electric eld decreases with body thickness. The peak electric eld is higher in the higher drain doping concentration (ND 1 1019 cm3 ) than in the lower drain doping concentration (ND 1 1018 cm3 ) for the bulkMOSFET, SG-UTBFET, symmetrical DG-FinFET, and asymmetrical DG-FET. Figure 4 shows the same trend that the peak electric eld decreases as the body thickness decreases in the thin body devices. From Figs. 3 and 4, it is clear that the electric eld in a DG-MOSFET is lower than in

Fig. 2. Comparison of simulated (MEDICI) 2-D potential proles in bulkSi MOSFET, SG-UTBFET, and symmetrical DG-MOSFET (Vg 1 V, Vd 1 V, Tox 2:0 nm, N+ doping concentration = 1:0 1018 cm3 ).

a SG-MOSFET of half the body thickness. A challenge for thin-body MOSFET technology is threshold-voltage adjustment, if channel doping is not used. The asymmetrical double-gate structure14,15) has been proposed to address this issue. Its threshold voltage can be tuned over a wide range by adjusting the gate-oxide and body thicknesses, to meet requirements for various applications. Thus, 2-D device simulations were also performed for the asymmetrical DG-MOSFET structure (Figs. 3 and 4). The electric eld is much higher in the asymmetrical DGMOSFET than in the symmetrical DG-MOSFET because of large potential drop between the P+ bottom gate and N+ junction in the overlapped drain region. Thus, the asymmetrical DG-MOSFET should show worse GIDL than the SGUTBFET.12) 4. Device Measurement Results and Discussion

Figure 5 shows the measured subthreshold IV characteristics for fabricated SG-UTBFETs, showing that GIDL current is reduced as the body thickness is decreased, for

N+Gate

Ec Ev Gate

Si Substrate

Eg

Ec Ev z

TSi

Buried oxide (BOX)

Ev Gate

Eg z

N+Gate

N+Gate

Symmetrical DG MOSFET
Drain N+ Ec Ev Body N+ Gate Eg N+ Gate z Ec Ev z 2TSi Source N+

Asymmetrical DG MOSFET
Drain N+ Ec Ev Body N+ Gate P+ Gate Eg z

Source N+

BOX

N+

N+

Ec

Body

Source

Drain

Substrate

N+Gate

Bulk-Si
Source N+

SG-UTBFET
Drain N+

Ec Ev

N+Gate

2TSi

Fig. 1. Transistor structures and energy-band diagrams for bulk-Si MOSFET, SG-UTBFET, symmetrical DG-MOSFET, and asymmetrical DG-MOSFET.

P+Gate

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N+ Gate
TSi =10nm

N+ Gate
Tox
1.3x106 1.0x106

1.2x106 3x105 5x105 9x105

Tox n+ Drain

n+ Drain

5x105

BOX
(a) (b)

N+ Gate
TSi =20nm
TSi =20nm

N+ Gate
1.1x106

Tox n+ Drain Tox

1x105

1.0x106

Tox n+ Drain

2x105

9.0x105

1.0x106 1.3x106

Tox P+ Gate

N+ Gate
(c)

(d)

Fig. 3. Simulated 2-D electric eld proles in the drain region: (a) bulk-Si MOSFET; (b) SG-UTBFET; (c) symmetrical DG-MOSFET; and d) asymmetrical DG-MOSFET (Vg 1 V, Vd 1 V, Tox 2:0 nm, N+ doping concentration = 1:0 1018 cm3 ).

Peak E-field, Es [MV/cm]

ND=1x10 cm

19

-3

Drain Current, I d [A/um]

3.0 2.5 2.0 1.5 1.0 0.5 0.0 0

10 10 10 10 10 10 10 10 10

-2 -4 -6 -8

T Si=20.1nm T Si=18.8nm T Si=18.2nm

B=50MV/cm B=60MV/cm B=70MV/cm

ND=1x10 cm

18

-3

-10 -12 -14 -16

Bulk-MOSFET SG-UTBFET Sym. DG-FinFET Asym. DG-FinFET

NMOS Single-Gate UTBFET

Tox=2.5nm

5 10 15 20 25 30 Body Thickness, TSi [nm]

35
10 10 10 10
-2

-2.4 -1.6 -0.8 0.0 0.8 1.6 2.4 Gate Voltage, V g [V]

(a)
PMOS Single-Gate UTBFET T Si=8.2nm T Si=5.9nm T Si=4.4nm

Drain Current, I d [A/um]

Fig. 4. Comparison of peak electric eld at the drain surface (obtained from 2-D simulations) for the bulk-Si MOSFET, SG-UTBFET, symmetrical DG-MOSFET, and asymmetrical DG-MOSFET (Tox 2 nm, Vdg 2 V, and ND 1 1018 cm3 versus 1 1019 cm3 ).

-4

-6

-8

both n-channel and p-channel devices. Curves corresponding to bulk-Si MOSFET GIDL current, calculated using eq. (1) for typical values of B, are shown in Fig. 5(a) to show the reduction in GIDL achieved with the SG-UTBFET structure. This reduction can be primarily attributed due to the reduction in Es , which becomes more signicant with decreasing body thickness. A secondary eect is an increase in the parameter B (ref. eq. (1)), which is a function of the tunneling eective electron mass:16) B
3=2 m1=2 Eg r

10 10 10

-10

-12

Tox =2.1nm
-1.2 -0.6 0.0 0.6 1.2 1.8 2.4 3.0 3.6

-14

Gate Voltage, V g [V]

(b)
Fig. 5. Measured subthreshold Id Vg characteristics of SG-UTBFETs, for Vd 1 V: (a) n-channel devices; (b) p-channel devices. A thinner body yields lower GIDL current. Reference GIDL current curves obtained using Equations 1 and 2 are plotted for various values of the tting parameter B (B 21:3 MV/cm,4) 36.2 MV/cm,7) 43 MV/cm,18) and 50 70 MV/cm15)). The dose for source/drain implantation was 5 1015 cm2 .

2qh

Sub-band splitting (of the 2-fold degenerate valleys and 4fold degenerate valleys) occurs when the body is thinned

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Drain Current, I d [A/um]

10 10 10 10

-2

-4

-6

NMOS Double-Gate FinFET

Acknowledgement This research is supported under MARCO contract 2001MT-887 and SRC contract 2000-NJ-850.
1) Y.-K. Choi, K. Asano, N. Lindert, V. Subramanian, T.-J. King, J. Bokor and C. Hu: IEEE Electron Device Lett. 21 (2000) 254. 2) Y.-K. Choi, D. Ha, T.-J. King and C. Hu: IEEE Electron Device Lett. 22 (2001) 447. 3) Y.-K. Choi, N. Lindert, P. Xuan, S. Tang, D. Ha, E. Anderson, T.-J. King, J. Bokor and C. Hu: IEEE Int. Electron Device Meet. Tech. Dig. (2001) p. 421. 4) J. Chen, T. Y. Chan, I. C. Chen, P. K. Ko and C. Hu: IEEE Electron Device Lett. 8 (1987) 515. 5) S. Banerjee, J. Coleman, W. Richardson and A. Shah: Proc. Symp. VLSI Technology (1987) p. 97. 6) M. Takayanagi and S. Iwabuchi: IEEE Trans. Electron Devices 38 (1991) 1425. 7) S. A. Parke, J. E. Moon, H.-j. C. Wann, P. K. Ko and C. Hu: IEEE Trans. Electron Devices 39 (1992) 1694. 8) K. Saino, S. Horiba, S. Uchiyama, Y. Takaishi, M. Takenaka, T. Uchida, Y. Takada, K. Koyama, H. Miyake and C. Hu: IEEE Int. Electron Device Meet. Tech. Dig. (2000) p. 837. 9) K. Kim, C.-G. Hwang and J. G. Lee: IEEE Trans. Electron Devices 45 (1998) 598. 10) H. Tanaka, M. Aoki, T. Sakata, S. Kiruma, N. Skashita, H. Hidaka, T. Tachibana and K. Kimura: IEEE J. Solid-State Circuits 34 (1999) 1084. 11) E. O. Kane: J. Appl. Phys. 32 (1961) 83. 12) J. G. Fossum, K. Kim and Y. Chong: IEEE Trans. Electron Devices 46 (1999) 2195. 13) L. Chang, K. J. Yang, Y.-C. Yeo, Y.-K. Choi, T.-J. King and C. Hu: IEEE Int. Electron Device Meet. Tech. Dig. (2001) p. 99. 14) T. Tanaka, K. Suzuki, H. Horie and T. Sigii: IEEE Electron Device Lett. 15 (1994) 386. 15) K. Kim and J. G. Fossum: IEEE Trans. Electron Devices 48 (2001) 294. 16) A. Bouhdada, S. Bakkali and A. Touhami: Microelectron. & Reliability 37 (1997) 649. 17) S.-I. Takagi, J. Koga and A. Toriumi: IEEE Int. Electron Device Meet. Tech. Dig. (1997) p. 219. 18) J. Jomaah, G. Ghibaudo and F. Balestra: Electron. Lett. 32 (1996) 767.

-8

10 10

-10

Wfin=42nm Wfin=34nm Wfin=26nm Tox=2.1nm -2 -1 0 Gate Voltage, Vg [V] 1

-12

10

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-3

Fig. 6. Measured subthreshold Id Vg characteristics of symmetrical DGFinFETs. (Vd 1 V) Lower GIDL current is obtained with a thinner body. The dose for source/drain implantation was 5 1015 cm2 .

aggressively,17) so that the population of electrons in the 2fold valleys (vs. the 4-fold valleys) increases as the body thickness decreases. A main component of the electron eective mass is mz in the direct band-gap approximation, where z is the direction perpendicular to silicon surface. Because mz is higher for the 2-fold valleys than the 4-fold valleys, the factor B increases as the body thickness decreases. Measured subthreshold IV characteristics of fabricated symmetrical DG-MOSFETs (FinFETs) are shown in Fig. 6, indicating no GIDL current when jVg j < 2V. A signicant benet of the symmetrical DG MOSFET structure is the elimination of GIDL essentially. 5. Conclusions

GIDL current is investigated in thin-body transistors, and found to be signicantly lower than in typical bulk-Si MOSFETs. Measured data show that GIDL decreases with decreasing body thickness. This behavior is attributed to a reduction in transverse electric eld and an increase in tunneling eective mass in the drain region.