Digital Design

CSCIO8CO2

Final Examination 2010 / 2011

Module Code: CSCI08C01
Module Leader : Prof. Ahmed Mohamed Hamad Prof. Ayman El-Naggar Equipment allowed calculator Title : Digital Design Semester : two

Instructions to Students

The exam paper is 2 pages long, and is in Two sections. Answer All Questions of Section A Select TWO Questions from Section B. The approximate allocation of marks is shown in brackets by the questions.

This examination is 2 hours long.

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Digital Design

CSCIO8CO2

Section A (Answer ALL Questions)

QA1- Perform the following:

abc-

Binary subtraction : (1 0 0 0) - (1 0 0 0 0 0) Binary multiplication : ( 1 1 1) x (1 0 1 1 1 1 1) Find a simplified algebraic expression of Boolean function given as : F (w,x,y,z) = (0,2,5,7,8,10,13,15)

[4 marks] [4 marks]

[6 marks]

d-

The new car-plates have three letters (3 out of 26) and three decimal digits. If we replace this new code by Hexadecimal code, what will be its length? [6 marks] [Total 20]

QA2- a- What are the effects of shifting the binary point one step to left or one step to right for

the binary number 110.11 ? b- Simplify the given function F in product of sum terms (POS) : F = (w y z) +(y z) + (x y z)+ (w x y)+ (w x y) +(w x y z ) c-

[3 marks]

[12 marks]

How many chips of 8 M x 16 bits RAM are required to obtain 32M x 32 bit RAM? Size the required decoder and show the connection. [5 marks] [Total 20]

QA3- A synchronous connection has three JK-FFs, as shown in the logic-diagram.

Find the expression of J and K controls of each FF [6 marks] Tabulate the state-table [6 marks] Build up the state-diagram and find the repeated sequence [4 marks] What will be the frequency of repeated sequence if clock frequency = 300 KHz [4 marks] [Total 20]

Cp

K A'

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Digital Design

CSCIO8CO2

Section B (Select Two Questions ONLY)

QB1- a- Tabulate the truth table for 8 x 4 ROM that implements the Boolean fucntions : A ( x,y,z) = (0,3,4,6 ) , B ( x,y,z) = (0,1,3,7) C ( x,y,z) = (1,5 ) , D ( x,y,z) = (0,1,4,5,7) Considering now the ROM as a memory. Specify the memory contents at addresses 1 and 4. [10 marks] b- Digital clock contains many digital circuits, mention at least three of them and explain theri functions [10 marks] [Total 20]
QB2a- How to differentiate between synchronous and ripple binary counters ? [3 marks] b- Design a synchronous circuit that generates the following sequence using 3 T-FFs.

- Find the state table with T-controls. - Find the expressions of T- controls. - Complete the state diagram with the missing states.
001 000 010 111 011 101

[8 marks] [6 marks] [3 marks] [Total 20]

QB3 - a- What is the importance of clocking in the digital circuits ? [3 marks] b- Using the following counter-modules with the given function table. - Count the number of modules required to build a frequency divider by 137 - Show the connection through load control in synchronous counting. [10 marks]
A4 A3 A2 A1
Carry output

Clear Count Clear Cp Load 0 1 1 1

Cp Load Count x x x 0 1 1 x 0 x 1

Function Clear all 0 No change Load input Count

4-bit binary Counter with parallel load

I4 I3 I2 I1

c- Propose a scheme of a digital system that records the student-attendance in a class of 30 students capacity . [7 marks] [Total 20]

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Digital Design

CSCIO8CO2

Model Answers
QA1- a- Binary subtraction 1000 - 1 0 0 0 0 0 to 2c as and + 001000 100000 0 1 0 0 0 0 its 2c is 1 1 0 0 0 0 110000 [4 marks]

there is no carry, so The final result is b- Binary multiplication : 1011111 x 111 1011111 + 1011111 10001110 1 1011111 101001100 1

multiplication of the first digit (1) multiplication of the second digit (1) multiplication of the third digit (1) [4 marks]

Sub result Final result

c- F (w,x,y,z) = (0,2,5,7,8,10,13,15) , in the K-Map, we put (1) in the corresponding

minterms as shown :

y 1 1 1 w 1 1 1 1 x 1

z The function will be expressed as : F(w,x,y,z) = xz + xz [6 marks]

d- Possible combinations of car-plate numbers = 26 x 26 x 26 x 1000 = 17, 576,000 cars For 6 Hexadecimal characters , the combinations = 16 6 = 16, 777, 216 cars So the length of Hexadecimal code = 7 that will cover 16 7 = 268, 435, 456 cars [6 marks]

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Digital Design
QA2 Solutions:

CSCIO8CO2

a- The effect of shifting the binary point one step to left is dividing by 2 and Shifting to right is multiplying by 2 whatever the binary number is. [3 marks]
b- From the K-Map : y 1 1 1 w 1 1 1 1 1 1 1 x

z we find expression of F as : F = ( 1,2,5,6,9,10,12,13,14,15 ) , then Then F = (0,3,4,7,8,11) = wyz + wy z + xyz + xy z F= (w + y + z)(w + y + z)(x + y + z)(x + y+z) as POS

With DeMorgans law :

c- (32M x 32) / (8 M x 16) = (4 rows, each has 2 chips ) the required decoder : 2x4 8 M x 16 RAM 8 M x 16 RAM

MSB MSB-1

Decoder 2x4

8 M x 16 RAM

8 M x 16 RAM

8 M x 16 RAM 8 M x 16 RAM

8 M x 16 RAM 8 M x 16 RAM

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Digital Design

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QA3- A synchronous connection has three JK-FFs, as shown in the logic-diagram. - Find the expression of J and K controls of each FF [6 marks] - Tabulate the state-table [6 marks] - Build up the state-diagram and find the repeated sequence [4 marks] - What will be the frequency of repeated sequence if clock frequency = 300 KHz [4 marks]

[Total 20]
C

Cp JA = C , decimal

K A' k KA = C , JB = C , KB = 1 , JC = B

, KC = 1

k , the state diagram: Next states A 1 0 1 0 1 0 1 0 B 0 1 0 0 0 1 0 0 C 1 0 0 0 1 0 0 0 5 2 4 0 5 2 4 0 decimal

Present states A B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1

A controls JA 1 0 1 0 1 0 1 0 KA 0 1 0 1 0 1 0 1

B controls JB 0 1 0 1 0 1 0 1 KB 1 1 1 1 1 1 1 1

C controls JC 1 1 0 0 1 1 0 0 KC 1 1 1 1 1 1 1 1

0 1 2 3 4 5 6 7

0 0 0 0 1 1 1 1

State Diagram : 3 0 5 2 1

The repeated sequence is : 2 to 4 to 5 then to 2 completed in three states, the frequency of this repeated sequence = 300 KHz / 3 = 100 KHz

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Digital Design

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Section B
QB1- Solutions :
a- The 3 variables x,y and z have 8 possible combinations, so the address word will be of 3 bits as x,y and z. the required 4 functions A,B,C and D each has one output m so the output word will be 4 bits , each bit represents one function . the truth-table or the programming table of the ROM will be as follows : (6 marks) Address word address 0 1 2 3 4 5 6 7 x 0 0 0 0 1 1 1 1 y 0 0 1 1 0 0 1 1 z 0 1 0 1 0 1 0 1 A 1 0 0 1 1 0 1 0 Output word B 1 1 0 1 0 0 0 1 C 0 1 0 0 0 1 0 0 (2 marks) (2 marks) D 1 1 0 0 1 1 0 1

For the address : 1 the output word content is : 0111 For the address : 4 the output word content is : 1001 b- Digital clock has many digital circuits : -

Internal master oscillator with crystal controlled with typical frequency 10 MHz as the reference timing signal. The reference frequency must be divided to be of 1 Hz, this requires frequency cascaded dividers by 1000000. There are counters for seconds, minutes and hours as decimal counters. There are decimal to 7 segments decoders and 7 segments displays . There are the possibilities of setting and adjustment. (10 marks , each item 2 marks)

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Digital Design

CSCIO8CO2

QB2 : a- Synchronous counter has a common clock signal for each Flip-Flop , while the ripple

counter has no common clock signal

[3marks]

b-The design of a synchronous circuit that generates the following sequence using 3 T-FFs.
001 000 010 111 011 101

- the excitation table with T-controls.

Present states A 0 0 0 0 1 1 1 1 B x 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 A 0 0 0 1 x 1 x 0 Next states B 0 1 1 0 x 1 x 0 C 1 0 1 1 x 1 x 0 TA 0 0 0 1 x 0 x 1

[8 marks]
Controls TB 0 1 0 1 x 1 x 1 TC 1 1 1 0 x 0 x 1

-T control expression : B 0 A x 0 1 1 1 0 x A B

[6 marks] B

0 x

1 1

1 1

0 x A

1 x

1 0

0 1

1 x

C TA = A + BC TB = C

C TC = AB + AB + C

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Digital Design
Missing states : 100 and 110 State 100 , TA = 1, TB = 0 , TC = 1 then next state will be 0 0 1 State 110 , TA = 1, TB = 0 , TC = 1 then next state will be 0 1 1 - The complete state diagram : 100 001 000 010 111 110 011 101

CSCIO8CO2

[6 marks]

QB3 - Solutions : a- Importance of clocking in digital circuits : - Synchronizing all the processes - Control the sequence of operations - Manage and avoid hazard effects

[[3marks]

b- 137 will be obtined by 2 modules of 4 bits binary counter . The programmable counter shwon on the figure has carry out each 16 counts . Four two modules the second carry output will be each 256 counts. Difference between 256 and 137 is (256-137) = 119. 119 is represented in binary number as : 01110111 [5 marks] The connection will be as shown in the figure : [5 marks]
A4 A3 A2 A1
Carry output

A4 A3 A2 A1

4-bit binary Counter with parallel load

Count Clear Cp Load

Carry output

4-bit binary Counter with parallel load

Count Clear Cp Load

0 1 1 1

0 1 1 1

CP c- Proposal for a student-attendance system in class of 30-students. The student will propose the essential components from his point of view as (for example) : - Monitoring the entrance by suitable sensor ( digital camera, photo-cell, ID reader ) - Capturing and recording the input and the suitable storage capacity - Displaying the records or reporting the attendance to the system admin - Etc. [7 marks]

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