International Journal of Information Technology Convergence and Services (IJITCS) Vol.1, No.

4, August 2011

IMPLEMENTATION OF USER INTERFACE FOR MICROPROCESSOR TRAINER

Tin Mar Kyi
Computer University (Mandalay)
tinmarkyi@gmail.com

ABSTRACT
This paper aims to design and construct the microcontroller-based user interface system and to study input, computation, and output for microprocessor trainer. The other two activities beyond computation: input and output or I/O. This paper also aims to do high quality research in the area of file systems, as well as develop a good implementation on at least one computer system. A computer system's I/O performance must be commensurate (equal) with its CPU performance if the I/O system is not to limit the system's total throughput. When hundreds to thousands of such high performance micro-processors are closely connected in scalable array architecture, the enormous CPU performance of the multi-computer requires an I/O system with correspondingly high performance. A well balanced computer requires I/O performance commensurate with its CPU performance. High performance computers, access large numbers of disks in parallel to achieve the very appreciable I/O performance .

KEYWORDS
I/O unit, Microprocessor Trainer, PIC16F877A microcontrolle , 7-segments , 74ALS573BS , 74LS244, two ULN 2004A .

1. INTRODUCTION
A microcontroller is a complete computer system, including a CPU, memory, a clock oscillator, and I/O on a single integrated circuit chip. The parts of any computer are: - A central processor unit (CPU) - Memory for instructions and data - Inputs to get information into the computer system - Outputs to get information out of the computer system - A program to make the computer do something useful I/O is one of the basic principles in computer science data is given to a processing unit, which processes the data end gives out the results. Usually memory chips are used to buffer that data, so in most cases the data is copied from the sensors into a buffer, than processed and then copied back into another buffer. Furthermore, data is exchanged between the components of an embedded system via buses. Inputs can only process digital input signals at the same voltage levels as the main logic power source. The 0-volt ground level is called VSS and the positive power source (VDD) is typically 5 Vdc (direct current). A level of approximately 0 volts indicates a logic 0 signal and a voltage approximately equal to the positive power source indicates a logic 1 signal. Output devices are used to communicate information or actions from the trainer system to the outside world. In trainer system outputs are logic level digital signals that are used to drive display LED (LightEmitting diodes). [15]
DOI : 10.5121/ijitcs.2011.1405 45

International Journal of Information Technology Convergence and Services (IJITCS) Vol.1, No.4, August 2011

Most Microcontrollers are general purpose Microprocessors which have additional parts that allow them to control external devices. We often use the terms Microcontroller and Microprocessor interchangeably.[3] The key difference between a microprocessor and a microcontroller is that a microprocessor contains only a central processing unit (CPU) while a microcontroller has memory and I/O on the chip in addition to a CPU. Microcontrollers are generally used for dedicated tasks. Microcomputer is a general term that applies to complete computer systems implemented with either a microprocessor or microcontroller.[8]

2. RELATED WORK
PICs are popular with developers due to their low cost, wide availability, large user base, extensive collection of application notes, availability of low cost or free development tools, and serial programming (and re-programming with flash memory) capability [2]. Developing a PIC microcontroller-based project simply takes no more than five or six steps. - Type the program into a PC - Assemble (or compile) the program - Optionally simulate the program on a PC - Load the program into PICs program memory - Design and construct the hardware - Test the project. [2] The purpose of this trainer is to provide students with experience in the following techniques: - writing of assembly language programs - assembling, downloading and running of programs - programming to output characters to 7-segment displays - programming to read key-pad characters - generation of waveforms for display on an oscilloscope - uses of interrupt facilities - implementation of timing routines using the on-chip hardware timer The machine is a free-standing piece of training equipment, incorporating its own power supply, input key-pad and output digital display. [20, 21] The design of computers,covers the overall design,or architecture and internal details or organization[22].The communication between a computer and its human users,a means of translating information between human and binary formats is necessary.The inputoutput equipment can perform this task[23].

3. CONTRIBUTION
The main contribution of this thesis is to design and construct the general purpose of instrumentation and user interface module. The executed programs of this thesis are the technical features, the hardware design and the control software of user interface (I/O) system. A useful step forward from the simple switch is given by the keypad, as seen in the photocopier interface and the Derbot hand controllers. The keypad allows numeric or alphanumeric information to be entered. It is widely used in photocopiers, burglar alarms, and central heating controllers and so on. A keypad is based on switches, yet it would be extremely resource-intensive if each of these switches were allocated to a port bit. Instead, to make good use of resource, each switch is connected in a matrix. The electrical connections for the keypad have 24 keys. It can be seen that these are arranged in a 4 6 matrix, with four rows and six columns. Whenever a key is pressed, it connects its row with its column. A 24 key keypad is arranged in a 4 6 format
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International Journal of Information Technology Convergence and Services (IJITCS) Vol.1, No.4, August 2011

requiring 10 connections. Consider the 24-key keypad, this is arranged in 6 columns and 4 rows as shown in. Table 1. There are 10 connections to the keypad C1, C2, C3, C4, C5, C6, R1, R2, R3 and R4. [13]. Column C1 Column C2 Column Column Column Column C6 C3 C4 C5 Row, R1 Row, R2 Row, R3 Row, R4 INC DEC FUNCTION ENTER MEMRD MEMWR I/ORD I/OWR 0 4 8 C 1 / RUN 5 9 D 2 6 A E 3 / RESET 7 B F

Table 1. (26) Key Keypad

4. HARDWARE AND DESIGN INTERFACE (I/O) SYSTEM

OF THE

MICROCONTROLLER-BASED USER

The main part which involved in the User Interface (I/O) module are the microcontroller PIC 16F877A, three octal transparent latch 74ALS573BS, the octal buffer line driver 74LS244, two ULN 2004A, eight 7-segments and 24 key pad switch. PIC 16F877A is used as the user interface controller, 74ALS573BS are used to latch the address output from either the main CPU or from the DMA controller, 74LS 244 is used to drive the control bus signals. The hardware configuration of the experimental setup and the software organization will be summarized. In the Microprocessor Trainer system, the program debugger, a kind of DMA (Direct Memory Access) controller, is contained in one of the hardware module. There are totally six modules (Processor module, Memory module, User Interface module, DMA (Direct Memory Access) module, PIO (Parallel Input/Output) module and Power Supply module) in the Trainer system and all modules are provided as separate chip, linked together via bus connections on a printed circuit board and supplied 5V DC power. The block diagram of the system is shown in figure (5.1). The Microprocessor Trainer used the 16-bit wide address bus (A [015]) and data bus (D [015]) and four control signals such as MEMWR, MEMRD, IOWR and IORD. The system buses are used by the main processor and the DMA controller alternatively. The main part which involved in the User Interface (I/O) module are the microcontroller PIC 16F877A, three octal transparent latch 74ALS573BS, the octal buffer line driver 74LS244, two ULN 2004A, eight 7-segments and 24 key pad switch. PIC 16F877A is used as the user interface controller, 74ALS573BS are used to latch the address output from either the main CPU or from the DMA controller, 74LS 244 is used to drive the control bus signals. All parts of the module are controlled by ALE (address Latch Enable) pin from the main CPU. By passing the DMK ACK pin is going to low level, the main CPU gives the bus service to the DMA goes low.The PIC16F877A is connected to LEDs in a similar fashion to the user interface system PORT B is used as the LSB and is connected to LEDs. PORT D is used as the MSB and is connected to LEDs. The interrupt pin from the user interface system is tied to the capture input pin of the PIC16F877A (RC1/CCP2) and is pulled high using a 1k resistor (R98). The I/O address pins
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International Journal of Information Technology Convergence and Services (IJITCS) Vol.1, No.4, August 2011

are connected to switch S2. This is done for testing purposes to allow change of addresses using the switch. These pins can be tied permanently high or low. The I2C pins (SDA and SCL) from all devices (U1 and U2) are connected together to form the I2C bus. Both SDA and SCL are pulled high using 4.7 k resistors.

Figure 1. Complete Block Diagram of Microprocessor Trainer

Figure 2. Circuit Diagram of I/O Module

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International Journal of Information Technology Convergence and Services (IJITCS) Vol.1, No.4, August 2011
VDD GND R1 4 1 S6 4 R2 8 1 20 LATB VDD U8 74LS244 1 2 4 6 8 19 11 13 15 17 R3 R1 R2 R3 R4 R4 R5 R6 C 1 S14 4 3 4 2 1 S15 3 4 D 2 1 S16 3 4 E 2 1 S17 3 F 2 S10 4 3 4 2 1 S11 3 4 9 2 1 S12 3 4 A 2 1 S13 3 B 2 3 4 2 1 S7 3 4 5 2 1 S8 3 4 6 2 1 S9 3 7 2 C21 47uF + 1 S2 4 3 4 2 1 S3 3 4 2 1 S4 3 4 2 1 S5 3 2 C22 10n VDD 0 1 2 3

VCC GND

DIO018 DIO116 DIO214 DIO312 DIO4 DIO5 DIO6 DIO7 DIO[0..7] DIO[0..7] 9 7 5 3

1Y 1 1Y 2 1Y 3 1Y 4 2Y 1 2Y 2 2Y 3 2Y 4

1G 1A1 1A2 1A3 1A4 2G 2A1 2A2 2A3 2A4

10

ADD INC R7 R8 R9 R10 R11 R12 1 4.7k 4.7k 4.7k 4.7k 4.7k 4.7k S18 4 R5 BUSREQ 1 S22 4 R6 3 4 2 1 3 4 2 1

ADD DEC 2 S19 3 RUN 2 S23 3 4 1 4 1

MEMRD 2 S20 3 IORD 2 S24 3 4 1 4 1

MEMWR 2 S21 3 IOWR 2 S25 3

C1 C2 C3 C4 R49 4.7k R50 4.7k R51 4.7k R52 4.7k

Figure 3. Circuit Diagram of Keypad Module

VDD GND R3 4.7k Q2SA733 R4 4.7k Q2SA733 R5 4.7k Q2SA733 R6 4.7k Q2SA733 R7 4.7k Q2SA733 R8 4.7k Q2SA733 R9 4.7k Q2SA733 R10 4.7k Q2SA733

R11 4.7k

Q1

Q2 R12 4.7k

Q3 R13 4.7k

Q4 R14 4.7k

Q5 R15 4.7k

Q6 R16 4.7k

Q7 R17 4.7k

Q8 R18 4.7k

Dg Df

Da Db

Dg Df

Da Db

Dg Df

Da Db

Dg Df LED8 VDD 9

1 2 3 4 5

1 2 3 4 5

1 2 3 4 5

1 2 3 4 5

1 2 3 4 5

1 2 3 4 5

1 2 3 4 5

LED1

LED2

LED3

LED4

LED5

LED6

LED7

Ae10 Ad 9 8 Ac 7 6

Ae10 Ad 9 8 Ac 7 6

Ae10 Ad 9 8 Ac 7 6

Ae10 Ad 9 8 Ac 7 6

De10 Dd 9 8 Dc 7 6

De10 Dd 9 8 Dc 7 6

De10 Dd 9 8 Dc 7 6

20

U4 74LS573 GND LATC DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7 1 11 2 3 4 5 6 7 8 9 OC C D1 D2 D3 D4 D5 D6 D7 D8

VDD R19 4.7k Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 19 C1 18 C2 17 C3 16 C4 15 14 13 12 Q9 Q2SC945 R20 4.7k Q10 Q2SC945 R21 4.7k Q11 Q2SC945 R22 4.7k Q12 Q2SC945

VCC

20

GND

VCC

C1 C2 C3 C4

C1 C2 C3 C4

GND

GND

GND

10

10

DIO[0..15] LATD LATA

DIO[0..8]

Figure 4. Circuit Diagram of LED Display Module

GND

DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7

OC C D1 D2 D3 D4 D5 D6 D7 D8

10

4.7k 1C 2C 3C 4C 5C 6C 7C 16 15 14 13 12 11 10 R23 R25 R27 R29 R31 R33 R35 Aa Ab Ac Ad Ae Af Ag DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7

Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8

19 18 17 16 15 14 13 12

1 2 3 4 5 6 7

1B 2B 3B 4B 5B 6B 7B

OC C D1 D2 D3 D4 D5 D6 D7 D8

VCC

GND

1 11 2 3 4 5 6 7 8 9

U6 ULN2004A

20

U2 74LS573

VDD

VDD

U3 74LS573 GND 1 11 2 3 4 5 6 7 8 9

VDD

U8 ULN2004A 47 1C 2C 3C 4C 5C 6C 7C 16 15 14 13 12 11 10 R24 R26 R28 R30 R32 R34 R36 Da Db Dc Dd De Df Dg

Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8

19 18 17 16 15 14 13 12

1 2 3 4 5 6 7

COM

1B 2B 3B 4B 5B 6B 7B

COM

De10 Dd 9 8 Dc 7 6

1 2 3 4 5

Da Db

Ag Af

Aa Ab

Ag Af

Aa Ab

Ag Af

Aa Ab

Ag Af

Aa Ab

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International Journal of Information Technology Convergence and Services (IJITCS) Vol.1, No.4, August 2011
VDD VD D + C25 47uF GND C26 10n VDD 2 6 D[ 0.. 15] D0 D1 D2 D3 D4 D5 D6 D7 U26 34 33 32 31 30 29 28 27 5 36 9 8 35 6 VDD 1 6 R64 1k 6 A4 A5 A6 1 2 3 4 5 G1 A B C G2A G2B 8 U19 74LS138 VC C Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 15 14 13 12 11 10 9 7 D0 D1 D2 D3 D4 D5 D6 D7 RD WR A0 A1 RESET CS U27 34 33 32 31 30 29 28 27 5 36 9 8 35 6 D0 D1 D2 D3 D4 D5 D6 D7 RD WR A0 A1 RESET CS VDD 2 6 VDD R61 2.2k IOR D IOW R R62 2.2k R63 2. 2k R65 2.2k PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 4 3 2 1 40 39 38 37 18 19 20 21 22 23 24 25 14 15 16 17 13 12 11 10 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PA[0. .7] D0 D1 D2 D3 D4 D5 D6 D7 I ORD I OWR PB[0. .7] PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 4 3 2 1 40 39 38 37 18 19 20 21 22 23 24 25 14 15 16 17 13 12 11 10 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 PF 0 PF 1 PF 2 PF 3 PF 4 PF 5 PF 6 PF 7 VC C VC C PD[ 0.. 7]

IORD IOWR RESET

PE[0..7]

PC[0..7] GD N

PF [0..7]

A[0..15]

A0 A1

GD N

Figure 5. Circuit diagram of I/O port

5.

Controlling with PIC 16F877 Assembly Software

5.1 Flow of the Main Routine

Before entering the Main Loop the software initializes peripheral modules. In the main loop, the program checks for three flags. New key Flag, DMA message Flag and Error Flag. If new key flag is found; it performs decoding operation. If DMA message is set it will displays message code ON the LED display and if error flag is set it will display error code.
Main

Initialize Peripheral Modules (Init)

Clear Data & Address Display YES Is New Key Flag Set? NO YES Decode Key (Check Key)

Has DMA Message been Received? NO

Display Message

YES Is Error Flag Set? NO Display Error

Figure 6. The Flow Chart of the Main Routine

5.2 Flow of Initialization Routine Firstly, initialize LAT A, LAT C and LAT D are cleared and LAT D is set. Digital input and output are configuring at Port A and parallel slave module is enabling. Then
50

8255

GD N

8255

International Journal of Information Technology Convergence and Services (IJITCS) Vol.1, No.4, August 2011

CCP1 module is interrupted setup at every 5ms and timer 1 module is turned on.The Figure 7 is shows flow chart of the initialization sub routine.
Init

Clear LAT A, LAT C, LAT D Set LAT D

Configure Port- A as Digital IO

Enable Parallel Slave Module

Setup CCP1 Module to interrupt at every 5ms

Turn ON Timer 1 Module Clear Variables

Figure 7. The Flow Chart of the Initialization Sub Routine

Interrupt Save Context Variable Do keyboard and Display services (CCP1 service)

CCP1 Module Interrupt?

YES NO YES NO

PSP Module Interrupt?

Receive Message from PSP (PSP service)

Restore Context Variable

Return
Figure 8. The Flow Chart of the Interrupt Subroutine 51

International Journal of Information Technology Convergence and Services (IJITCS) Vol.1, No.4, August 2011

5.3 Flow of the Key decoding subroutine

Before the key decoding, key value is read from the look-up table. If it is a function key, the function will check. Then new key flag is cleared, shift data to display register and return to main loop. This process is shown as a flow chart in Figure 9.
Decode Key

Read Key Value from the Lookup table

YES Is it a Function Key? Check Function

NO Clear New Key Flag

Shift Data Display Register

Return

Fgure 9. The Flow Chart of the Key Decoding Subroutine

6. Controlling with PIC16F877A Assembly Software

6.1 Software Implementation
The firmware program for the microcontroller is complied with the Assembly Language. The source code is written in the MPLAB IDE version 8 from Microchip Corporation. To implement the actual algorithm in the PIC 16F877A, the assembler is used with debugger. There are two main parts in the software implementation. They are the software implementation of master controller module and the software implementation of eight channels digital I/O STIM. The complete block diagram of Microprocessor Trainer is shown in Figure 10.

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International Journal of Information Technology Convergence and Services (IJITCS) Vol.1, No.4, August 2011

Start

Initiallization

Main Instruction Decode

Return
Figure 10. Block diagram of Microprocessor Trainer

7. Conclusions
A microcontroller-based user interface system is designed and constructed using LED display unit. At first, PIC 16F877A controlled input and output has been tested. It can display any characters on the 7-segment LED. There are eight 7-segments display is implement. Four 7segments are display address and other four 7-segments display data and controlled with PIC 16F877A. This system has covered the design and implementation of moving message user interface systems, which are contrast to the types commonly seen in shop windows, airports, and other public buildings. In this research PIC microcontroller is used MPASM Assembler language and programmed with a PIC start plus PIC programmer. The source code is written in the MPLAB IDE version 8 from Microchip Corporation. This microcontroller based system has various advantages; the electronic circuit used are less and cheaper than that of a commercial one, portable hardware components, low power consumption rate and operation. This system is intended to use in marketing, advertising and communication purpose. This design can be improved by allowing the system to be programmed from a computer via the serial port through RS 232 since PIC 16F877A contains I2C as a built in module. This paper will support the introductory level beginners to understand the characteristics of computer architectures and their operations. All modules are working perfectly according to their characteristics. Once they are ready, it will be a good tool for beginners to learn basics of microprocessor Architecture programming skill. Therefore it will be very helpful to beginners who are familiar with PIC to appreciate the internal operations of a processor. However the interfacing units keypad and a display have to be designed and connected to the board. This processor can be improved further by 32-bit instruction execution. 7-segment display is convenient but the slow of the amount of data is less. It is better to put LCD (Liquid Crystal Display) instead of the 7-segment display.

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International Journal of Information Technology Convergence and Services (IJITCS) Vol.1, No.4, August 2011

Acknowledgements
First of all, I would like to thank to His Excellency Minister U Thauung, Ministry of Science and Technology for the opening of Doctor of Philosophy Degree courses. I am very much indebted to Dr. Ni Lar Thein, Rector of University of Computer Studies Yangon, for her enthusiastic support and permission to carry out this thesis. I would like to profoundly grateful to U Kyaw Swa Soe, Pro-rector, University of Computer Studies, Yangon for his invaluable advice, guidance and encouragement on this thesis. Thanks are also extended to Professor Daw New Ni, Head of Computer Hardware Technology Department, University of Computer Studies, Yangon. I would like to express my gratitude and deep appreciation to Dr. Mie Mie Thet Thwin, Pro-rector, University of Computer Studies, Mandalay for her valuable supporting to complete the whole thesis. Her Sincere thanks go to her Supervisor, Professor Dr. Win Aye, Material Science and Material Engineering Research Centre for her invaluable guidance, advance, and encouragement for this thesis. I am very thankful to U Win Khaing Moe, Deputy Director General, Myanmar Science and Technological Research Department for his kind advice and guidance to complete this thesis. I would also like to express my sincere thanks to Lecturer Daw Yee Yee Mon, Head of the Department of English, University of Computer Studies, Mandalay, for giving me advices on usage of English in this thesis. I also wish to express my deepest gratitude my parents, my sisters and my brother for their encouragement, understanding and support through out the period of this painstaking research.

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