Geh-6421 - Vol - II MK Vi System Guide

GE Energy
Mark* VI Control
System Guide, Volume II
GEH-6421M
These instructions do not purport to cover all details or variations in equipment, nor to provide for every possible contingency to be met during installation, operation, and maintenance. The information is supplied for informational purposes only, and GE makes no warranty as to the accuracy of the information included herein. Changes, modifications and/or improvements to equipment and specifications are made periodically and these changes may or may not be reflected herein. It is understood that GE may make changes, modifications, or improvements to the equipment referenced herein or to the document itself at any time. This document is intended for trained personnel familiar with the GE products referenced herein. GE may have patents or pending patent applications covering subject matter in this document. The furnishing of this document does not provide any license whatsoever to any of these patents. This document contains proprietary information of General Electric Company, USA and is furnished to its customer solely to assist that customer in the installation, testing, operation, and/or maintenance of the equipment described. This document shall not be reproduced in whole or in part nor shall its contents be disclosed to any third party without the written approval of GE Energy. GE provides the following document and the information included therein as is and without warranty of any kind, expressed or implied, including but not limited to any implied statutory warranty of merchantability or fitness for particular purpose. If further assistance or technical information is desired, contact the nearest GE Sales or Service Office, or an authorized GE Sales Representative.
2004 - 2008 General Electric Company, USA. All rights reserved. Revised: 080314 Issued : 040120
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Contents
I/O Overview 5
Relay Board Summary ................................................................................................................................. 8 Trip Terminal Board Summary .................................................................................................................... 9 Simplex DIN-Rail Mounted Terminal Board Summary............................................................................... 9
UCV Controller
13
Controller Overview................................................................................................................................... 13 UCVG Controller ....................................................................................................................................... 15 UCVF Controller........................................................................................................................................ 18 UCVE Controllers ...................................................................................................................................... 20 UCVD Controller ....................................................................................................................................... 27 UCVB Controller ....................................................................................................................................... 29 Alarms ........................................................................................................................................................ 31 UCV Board UCVD Controller Runtime Errors.......................................................................................... 32
VAIC Analog Input/Output
35
VAIC Analog Input/Output........................................................................................................................ 35 TBAI Analog Input/Output ........................................................................................................................ 48 DTAI Simplex Analog Input/Output.......................................................................................................... 54
VAMA Acoustic Monitoring
59
VAMA Acoustic Monitoring ..................................................................................................................... 59 DDPT Simplex Dynamic Pressure Transducer Input................................................................................. 73
VAMB Acoustic Monitoring Input
79
VAMB Acoustic Monitoring...................................................................................................................... 79
VAOC Analog Output
97
VAOC Analog Output................................................................................................................................ 97 TBAO Analog Output .............................................................................................................................. 103 DTAO Simplex Analog Output................................................................................................................ 107
VCCC/VCRC Discrete Input/Output
111
VCCC/VCRC Discrete Input/Output ....................................................................................................... 111 TBCI Contact Input with Group Isolation................................................................................................ 118 TICI Contact Input with Point Isolation ................................................................................................... 123 DTCI Simplex Contact Input with Group Isolation ................................................................................. 127 TRLYH1B Relay Output with Coil Sensing ............................................................................................ 131 TRLYH1C Relay Output with Contact Sensing....................................................................................... 136 TRLYH1D Relay Output with Servo Integrity Sensing........................................................................... 141 TRLYH1E Solid-State Relay Output ....................................................................................................... 147 TRLYH1F Relay Output with TMR Contact Voting ............................................................................... 153 DRLY Simplex Relay Output .................................................................................................................. 160
GEH-6421M Mark VI Turbine Control System Guide Volume II
Contents I
VCMI Bus Master Controller
165
VCMI Bus Master Controller ................................................................................................................... 165
VGEN Generator Monitor and Trip
175
VGEN Generator Monitor and Trip ......................................................................................................... 175 TGEN Generator Monitor ........................................................................................................................ 183 TRLYH1B Relay Output with Coil Sensing ............................................................................................ 187 TRLYH1F Relay Output with TMR Contact Voting ............................................................................... 193
VPRO Turbine Protection Board
201
VPRO Emergency Turbine Protection ..................................................................................................... 201 TPRO Emergency Protection ................................................................................................................... 219 TREG Turbine Emergency Trip ............................................................................................................... 226 TRES Turbine Emergency Trip................................................................................................................ 233 TREL Turbine Emergency Trip ............................................................................................................... 239
VPYR Pyrometer Board
245
VPYR Pyrometer Input ............................................................................................................................ 245 TPYR Pyrometer Input............................................................................................................................. 261
VRTD RTD Input
265
VRTD RTD Input..................................................................................................................................... 265 TRTD RTD Input ..................................................................................................................................... 273 DRTD Simplex RTD Input ...................................................................................................................... 279
VSVA Servo Control
285
VSVA Servo Control................................................................................................................................ 285
VSCA Serial Communication Input/Output
317
VSCA Serial Communication Input/Output............................................................................................. 317 DSCB Simplex Serial Communication Input/Output............................................................................... 326 DPWA Transducer Power Distribution .................................................................................................... 329
VSVO Servo Control
333
VSVO Servo Control................................................................................................................................ 333 TSVO Servo Input/Output........................................................................................................................ 369 DSVO Simplex Servo Input/Output ......................................................................................................... 377
VTCC Thermocouple Input
385
VTCC Thermocouple Input...................................................................................................................... 385 TBTC Thermocouple Input ...................................................................................................................... 395 DTTC Simplex Thermocouple Input........................................................................................................ 399
VTUR Turbine Specific Primary Trip
403
VTUR Primary Turbine Protection .......................................................................................................... 403 TTURH1B Primary Turbine Protection Input .......................................................................................... 419 TRPG Turbine Primary Trip..................................................................................................................... 426
II Contents
TRPL Turbine Primary Trip..................................................................................................................... 431 TRPS Turbine Primary Trip ..................................................................................................................... 434 TTSA Trip Servo Interface....................................................................................................................... 438 DTUR Simplex Pulse Rate Input ............................................................................................................. 441 DTRT Simplex Primary Trip Relay Interface .......................................................................................... 444 DRLY Simplex Relay Output .................................................................................................................. 447
VVIB Vibration Monitor Board
451
VVIB Vibration Monitor.......................................................................................................................... 451 TVIB Vibration Input............................................................................................................................... 472 DVIB Simplex Vibration Input ................................................................................................................ 477
TTPW Power Conditioning Board
483
TTPW Power Conditioning...................................................................................................................... 483
VME Rack Power Supply
491
VME Rack Power Supply ........................................................................................................................ 491
VME Redundant Power Supply
507
Redundant Power Supply ......................................................................................................................... 507
Power Distribution Modules
517
PDM Power Distribution Modules........................................................................................................... 517 PPDA Power Distribution System Feedback ........................................................................................... 527 DS2020DACAG2 ac-dc Power Conversion............................................................................................. 531
Replacement/Warranty
537
Pack/Board Replacement ......................................................................................................................... 537 Renewal/Warranty.................................................................................................................................... 540
Glossary of Terms
541
Contents III
Notes
IV Contents
I/O Overview
The following table lists all the I/O processor boards, the number of I/O per processor that they support, and their associated standard terminal boards. Some standard terminal boards have simplex and TMR versions (in addition to simplex DIN-rail mounted ones). Refer to the section, simplex DIN-rail mounted terminal board summary for simplex DIN-rail mounted terminal board information.
I/O Processor Boards and Standard Terminal Boards I/O Processor Board VAIC VAOC VCCC I/O Signal Type Analog inputs, 0-1 mA, 4-20 mA, voltage Analog outputs, 4-20 mA, 0-200 mA Analog outputs, 4-20 mA Contact inputs Solenoid outputs Dry contact relay outputs VCRC Contact inputs Solenoid outputs Dry contact relays outputs VGEN Analog inputs, 4-20 mA Potential transformers, gen (1) bus (1) Current transformers on generator Relay outputs (optional) VPRO Pulse rate inputs Potential transformers, gen (1), bus (1) Thermocouple inputs Analog inputs, 4-20 mA Trip solenoid drivers Trip interlock inputs Emergency-stop input (hardwired) Economizing relays Trip solenoid drivers Emergency-stop input (hardwired) Economizing relays VPYR VRTD VSCA VSVO Pyrometer temperature inputs (4/probe) Keyphasor shaft position inputs Resistance temperature device (RTD) Serial I/O communications Servo outputs to hydraulic servo valve LVDT inputs from valve position LVDT excitation outputs Pulse rate inputs for flow monitoring Pulse rate probe excitation VTCC VAMA Thermocouple inputs Acoustic monitoring (Simplex only)
Number of I/O per Processor 20 4 16 48 12 12 48 12 12 4 2 3 12 3 2 3 3 3 7 1 3 3 1 3 2 2 16 6 4 12 8 2 2 24 2
Associated Terminal Boards TBAI TBAI TBAO TBCI, TICI TRLY TRLY TBCI TRLY TRLY TGEN TGEN TGEN TRLY TPRO TPRO TPRO TPRO TREG (through J3) TREG (through J3) TREG (through J3) TREG (through J3) TREG (2nd board through J4) TREG (2nd board through J4) TREG (2nd board through J4) TPYR TPYR TRTD DSCB TSVO TSVO TSVO TSVO TSVO TBTC DDPT
I/O Overview 5
I/O Processor Board VAMB VTURH1B
I/O Signal Type Acoustic monitoring (Simplex only) Pulse rate magnetic speed pickups Potential transformers, generator and bus Shaft current and voltage monitor Breaker Interface Flame detectors (Geiger-Mueller) Trip solenoid drivers for ETDs
Number of I/O per Processor 18 4 2 2 1 8 3
Associated Terminal Boards TAMB TTUR TTUR TTUR TTUR TRPG (through J4) TRPG (through J4) TRPG (2nd board through J4A)
VTURH2B VVIB
Same as above, plus 3 trip solenoid drivers Shaft Proximitor /seismic probes (Vib/Displ/Accel) Shaft proximity probes (displacement) Shaft proximity reference (Keyphasor)
16 8 2
TVIB TVIB TVIB
Terminal Board Terminal Block Features

Many of the terminal boards in the Mark VI use a 24-position pluggable barrier terminal block (179C9123BB). These terminal blocks have the following features: Made from a polyester resin material with 130C (266 F) rating Terminal rating is 300 V, 10 A, UL class C general industry, 0.375 in creepage, 0.250 in strike UL and CSA code approved Screws finished in zinc clear chromate and contacts in tin Each block screw is number labeled 1 through 24 or 25 through 48 in white Recommended screw tightening torque is 8 in lbs
Terminal Board Disconnect Switch (TBSW)

The Mark VI Terminal Board Disconnect Switch (TBSW) provides an individual disconnect switch for each of the 48 customer I/O points on Mark VI terminal boards in the following figure. This facilitates such procedures as continuity checking, isolation for test, and others. Two TBSW assemblies are required for each terminal board, one numbered 1-24, the other numbered 25-48 (GE part numbers 336A4940CHG1 and 336A4940CHG2 respectively). The TBSW fits and connects into the terminal boards 24-point pluggable barrier terminal block receptacles. The TBSW is designed for continuous 5 A rms current at 300 V rms and complies with EN61010-1 clearance specifications. The NEMA power/voltage class rating (A, E, F, G) for the TBSW is dependant on the terminal board the TBSW is mounted upon see the following table.
Top View
Front View
TBSW Mounted to Terminal Block
Side View
6 I/O Overview
The TBSW is not to be used for live circuit interruption. The circuit must be de-energized before the circuit is either closed or opened by the TBSW.
TBSW/Terminal Board Applications Summary

In the following table lists the TBSW/terminal board applications for the Mark VI. An OK indicated in the TBSW applications column indicates an approved application of the TBSW for terminal board specifications for voltage and current. Those board points that require limiting the terminal boards application are indicated with a note number (corresponding notes follow the table).
TBSW/Terminal Board Applications Board TBTC TRTD TBAI TBAO TBCI TICI TRLY TSVO TTUR TRPG TREG TRPL TREL TRPS TRES TPRO TVIB TGEN TPYR Type Thermocouples RTDs Analog inputs Analog outputs Contact inputs Contact inputs Contact outputs Servo I/O Turbine I/O Flame I/O TBSW Applications CSA NEMA OK OK OK OK OK Note 1 Note 1 OK OK Note 3 OK OK OK OK OK OK OK OK OK OK OK OK OK OK Note 2 Note 2 OK OK Note 3 OK OK OK OK OK OK OK OK OK
Table Notes: 1. The inputs on the TICI and TRLY boards are high voltage isolated inputs. The TBSW is classified by CSA for use up to 300 V rms. Circuits applied to the TICI or TRLY terminal board with the TBSW installed must be externally limited to 300 V rms. Care must also be taken to assure that no adjacent circuits, that when both are operating, do not exceed 300 V rms between them. 2. NEMA ratings are given according to the power and voltage limiting abilities of the circuit. The TICI and TRLY terminal boards carry no components that are designed to limit voltage or current. For this reason, the TBSW application limitations for these two terminal boards will depend on the customers ability to install voltage and current limiting devices on the TBSW circuits according to NEMA guidelines. The following chart indicates the NEMA class and the voltage it must be limited too before it can be applied to the TBSW. Voltages are for circuit voltage, and circuit to adjacent circuit voltage.
I/O Overview 7
Class A
Voltage 50 V peak 225 V peak 300 V rms 300 V rms
Description All circuits which cannot be otherwise classified. Use this rating when no external current and voltage limiting devices are present. Known and controlled transient voltages without sufficient current limiting impedance. Known and controlled voltages with short-circuit power 10 kVA or less. Known and controlled voltages with short-circuit power 500VA or less.
E F G
3. The TRPG flame detectors require a 335 V dc circuit. The TBSW is classified by CSA and NEMA for use up to 300 V rms. Circuits applied to the TRPG terminal board flame detectors with the TBSW installed must be must be limited to 300 V rms, disallowing the use of the TBSW when the flame detectors are operational.
Relay Board Summary

Mark VI Relay Board Features DRLYH1A DRLYH1B 0 12 Mechanica l Form C Simplex 0 TRLYH1C TRLYH2C 6 5 Mechanical Form C Simplex and TMR 1 TRLYH1E TRLYH2E TRLYH3E 0 12 Solid-State Form A Simplex and TMR 0 TRLYH1F TRLYH2F 12 (with WPDF) 12 (without WPDF) Mechanical H1F = Form A H2F = Form B TMR Only 0
Feature Fused solenoid driver relays # Dry circuit relays Relay Type
TRLYH1B 6 5 Mechanica l Form C Simplex and TMR 1
TRLYH1D 6 0 Mechanica l Form C Simplex and TMR 0
Control # Ignition transformer outputs Relay suppression Solenoid relay sensing type/quantity Other relay sensing type/quantity Solenoid fuse sense Operating voltage V ac Operating voltage V dc Internal switching power supply Daughterboards Terminal type
No No
MOV Relay coil current/6 Relay coil current/6 6 120/240 24/125 No
MOV and RC Relay NO contact voltage/6 Relay NO contact voltage/6 6 H1=120/ 240 H2=No H1=125 H2=24 No
MOV Solenoid resistance /6 N/A
No No
No Relay coil current /12 (WPDF) Relay coil current /12 (no WPDF) 12 (WPDF) 120 28/125 No
No
Relay NO contact voltage/ 12 N/A H3= 120/240 H2=28 H3=125 No
N/A 120/240 28/125 No
6 No 24/ 110/ 125 Yes
None Euro-box
None Barrier
18 Barrier
None Barrier
None Barrier
WPDF Barrier
8 I/O Overview
Trip Terminal Board Summary

Mark VI Trip Terminal Board Features Output Contacts, 125 V dc, 1 Amp Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Output Contacts, 24 V dc, 3 Amp No Yes No Yes No Yes Yes Yes Yes Yes Yes Yes Yes Input Contacts, Dry, 125 V dc No No No No Yes Yes No No Yes No No Yes No Input Contacts, Dry, 24 V dc No No No No No No Yes No No Yes No No Yes
Board TRPGH1A* TRPGH1B TRPGH2A* TRPGH2B TREGH1A* TREGH1B TREGH2B TRPLH1A TRELH1A TRELH2A TRPSH1A TRESH1A TRESH2A
TMR Yes Yes No No Yes Yes Yes Yes Yes Yes Yes Yes Yes
Simplex No No Yes Yes No No No No No No Yes Yes Yes
ESTOP No No No No Yes Yes Yes Yes No No Yes No No
Economy Resistor No No No No Yes Yes Yes No No No No No No
*These boards will become obsolete.
Simplex DIN-Rail Mounted Terminal Board Summary

Speed control systems for small turbines require a simplified system architecture. Simplex control is used to reduce cost and save space. Compact DIN-rail mounted terminal boards are available instead of the larger T-type terminal boards used on TMR systems. IONet is not used since the D-type terminal boards cable directly into the control chassis to interface with the I/O boards. In the VME rack, a VCMI board provides two-way communication between the controller and the I/O processor boards. The controller Ethernet port is used to communicate with other system components, such as an operator interface or PLC. Additional PLC I/O can be tied into the system using the controller Genius port. A typical system is illustrated in the following figure. The system is powered by 24 V dc, and uses a low voltage version of the standard VME rack power supply. The board designations and functions along with the corresponding I/O processor boards are listed in the following table. In all cases, the signal conditioning on the DIN-type terminal boards is the same as on the T-type boards, and the I/O specifications described apply. However, the number of inputs and outputs, and the grounding provisions differ, and the boards do not support TMR. Permanently mounted high-density Euro-Block terminal blocks are used to save space. The blocks have terminals accepting wire sizes up to one #12 wire, or two #14 wires. The typical wire size used is #18 AWG.
I/O Overview 9
Fan To sequencer & operator interface Serial Modbus communication

x x x x x x x x
Ethernet V C M I U C V B V T U R V T U R V V V T A A C I I C C C V S V O
COM2
V V V S S R C P V T R A O D C R E
Power Supply
10 11 12 13
24 V dc power
DTUR Turbine Control
DTRT Transit -ion Bd. DRLY Relay Output
DTCI Contact Inputs DTUR Turbine Control
DTCI Contact Inputs
DRLY Relay Outputs
DRLY Relay Outputs
DTTC Thermo -couples
DTTC Thermo -couples
DTAI Analog Inputs
DTAI Analog Inputs
DRTD RTD Inputs
DRTD RTD Inputs
DSVO Servo Outputs DTAI Analog Inputs DTAI Analog Inputs
DSVO Servo Outputs
DSVO Servo Outputs

Small Simplex System Rack, Boards, and Cabling
DSVO Servo Outputs
10 I/O Overview
Simplex DIN-Rail Mounted Terminal Boards DIN Euro Size Terminal board Number of Points Description of I/O I/O Processor Board
DTTC DRTD DTAI
12 8 10 2
Thermocouple temperature inputs with one cold junction reference RTD temperature inputs Analog current or voltage inputs with on-board 24 V dc power supply Analog current outputs, with choice of 20 mA or 200 mA Analog current outputs, 0-20 mA Contact Inputs with external 24 V dc excitation Form-C relay outputs, dry contacts, customer powered Transition board between VTUR and DRLY for solenoid trip functions Magnetic (passive) pulse rate pickups for speed and fuel flow measurement Servo valve outputs with choice of coil currents from 10 mA to 120 mA LVDT valve position sensors with on-board excitation Active pulse rate probes for flow measurement, with 24 V dc excitation provided Shaft Proximitor/seismic probes (Vib/Displ/Accel) Shaft proximity probes (displacement) Shaft proximity reference (Keyphasor)
VTCC VRTD VAIC
DTAO DTCI DRLY DTRT DTUR DSVO
8 24 12 -------4 2 6 2
VAOC VCRC (or VCCC) VCRC (or VCCC) VTUR VTUR VSVO
DVIB
8 4 1
VVIB
Grounding
During panel design, provisions for grounding the terminal board and wiring shields must be made. These connections should be as short as possible. A metal grounding strip can be firmly mounted to the panel on the right hand side of the terminal board. Shields and the SCOM connection can be conveniently made to this strip. Note that only the thermocouple board has screws for the shield wires. The VME rack is grounded to the mounting panel by the metal-to-metal contact under the mounting screws. No wiring to the ground terminal is required. For more grounding information, refer to Volume I, Chapter 5.
I/O Overview 11
Notes
12 I/O Overview
UCV Controller
Controller Overview
The Mark* VI UCV_ controller is a 6U high, single or double slot, single board computer (SBC) that operates the turbine application code. The controller mounts in a VME rack called the control module and communicates with the turbine I/O boards through the VME bus. The controller operating system is QNX , a real time, multitasking OS designed for high-speed, high-reliability industrial applications. Three communication ports provide links to operator and engineering interfaces as follows: Ethernet connections to the UDH for communication with HMIs, and other control equipment RS-232C connection for setup using the COM1 port RS-232C connection for communication with distributed control systems (DCS) using the COM2 port (such as Modbus slave)
Operation
The controller is loaded with software specific to its application to steam, gas, and land-marine aeroderivative (LM), or balance of plant (BOP) products. It can execute up to 100,000 rungs or blocks per second, assuming a typical collection of average size blocks. An external clock interrupt permits the controller to synchronize to the clock on the VCMI communication board to within 100 microseconds. External data is transferred to and from the control system database (CSDB) in the controller over the VME bus by the VCMI communication board. In a simplex system, the data consists of the process inputs and outputs from the I/O boards. In a TMR system, the data consists of the voted inputs from the input boards, singular inputs from simplex boards, computed outputs to be voted by the output hardware, and the internal state values that must be exchanged between the controllers. Note Application software can be modified online without requiring a restart.
Controller Versions
Five controller versions are in use: The single-slot UCVE is the current generation controller used in most new systems. The double-slot UCVF is the high-end current generation controller used in only the systems that require it. The single-slot UCVG features performance between the UCVE and the UCVF and may be used as a direct replacement for any previous controller version without necessitating a backplane upgrade. Note The double-slot UCVB and UCVD are no longer shipped with new systems, but are still in use in older systems.
UCV Controller 13
The UCVE and UCVF may also be used to replace earlier revision controllers, but require a backplane upgrade. If replacing a UCVB, an Ethernet cabling upgrade from 10Base2 to 10Base-T is also required.
Diagnostics
If a failure occurs in the Mark VI controller while it is running application code, the rotating status LEDs (if supported) on the front panel stop and an internal fault code is generated. If a failure occurs in the Mark VI controller, a diagnostic alarm is generated that can be read from the toolbox. In the UCVB and UCVD, these diagnostics are also encoded by flashing LEDs on the front panel. The error numbers and descriptions are available on the toolbox help screen. Additional information can also be obtained from the controller COM1 serial port. For further information, refer to GEH-6421, Vol. I Mark VI System Guide, Chapter 7, Troubleshooting and Diagnostics.
Installation
A control module contains (at a minimum) the controller and a VCMI. Three rack types can be used: the GE Fanuc integrators rack shown in the following figure and two sizes of Mark VI racks shown in the section, VCMI - Bus Master Controller. The GE Fanuc rack is shorter and is used for stand-alone modules with remote I/O only. The Mark VI racks are longer and can be used for local or remote I/O. Whichever rack is used, a cooling fan is mounted either above or below the controller. The stand-alone control module implemented with a GE Fanuc integrators rack also requires a VDSK board to supply fan power and provide the rack identification through an ID plug.
VCMIH2 Communication Board with Three IONet Ports (VCMIH1 with One IONet is for Simplex systems) Controller UCVX Interface Board VDSK
VME Rack
POWER SUPPLY
Power Supply
Cooling Fan behind Panel
Fan 24 Vdc Power
Typical Controller Mounted in Rack with Communication Board
14 UCV Controller
UCVG Controller
The UCVG is a single-slot board using an Intel Ultra Low Voltage Celeron 650 MHz processor with 128 MB of flash memory and 128 MB of SDRAM. Two 10BaseT/100BaseTX (RJ-45 connector) Ethernet ports provide connectivity. The first Ethernet port allows connectivity to the UDH for configuration and peer-to-peer communication. The second Ethernet port is for use on a separate IP logical subnet and can be used for Modbus or private Ethernet Global Data (EGD) network. This Ethernet port is configured through the toolbox. The controller validates its toolbox configuration against the existing hardware each time the rack is powered up. Note A separate subnet address allows the controller to uniquely identify an Ethernet port. IP subnet addresses are obtained from the Ethernet network administrator (for example, 192.168.1.0, 192.168.2.0).
Mark VI Controller UCVGH1
x
Reset Switch (allows the system to be reset from the front panel)
S V G A
RS T
Monitor port for GE use
COM1 RS-232C port for initial controller setup COM2 RS-232C port for serial communication ETHERNET 1 Primary Ethernet port for Unit Data Highway (UDH) communication (toolbox) ETHERNET 2 Secondary Ethernet port for expansion I/O communication Status LEDs
2 C O M 2:1 L A N 1 L A N 2 USB
M [ / K 1
Keyboard/mouse port for GE use Ethernet Status LEDs Active (Blinking = Active) (Solid = Inactive) Link (Yellow = 10BaseT) (Green = 100BaseTX) Active (Blinking = Active) (Solid = Inactive) Link (Yellow = 10BaseT) (Green = 100BaseTX) Two individual USB connectors
P M C
Status LEDs B: Booting. BIOS boot in progress. (red) I: IDE activity is occurring. (yellow) P: Power is present. (green) R: Board reset. (red)
UCVG H1
x
UCVG Controller
UCV Controller 15
Note The factory setting of the battery is in the disabled position. To enable the battery, set SW10 to the closed position as shown in the following drawing.
(SW10 shown in closed position)
(Do not change 2-3 setting)

AS Shipped Setting
UCVG Controller Side View
16 UCV Controller
UCVG Controller Specifications Item Specification
Microprocessor Memory
Intel Ultra Low Voltage Celeron 650 MHz 128 MB SDRAM 128 MB Compact Flash Module 256 KB Advanced Transfer Cache
Operating System Programming
QNX Control block language with analog and discrete blocks; Boolean logic represented in relay ladder diagram format. Supported data types include: Boolean 16-bit signed integer 32-bit signed integer 32-bit floating point 64-bit long floating point
Primary Ethernet Interface (Ethernet 1)
Twisted pair 10BaseT/100BaseTX, RJ-45 connector: TCP/IP protocol used for communication between controller and toolbox EGD protocol for communication with CIMPLICITY HMI, and Series 90-70 programmable logic controllers (PLCs) Ethernet Modbus protocol supported for communication between controller and third-party DCS
Secondary Ethernet Interface (Ethernet 2)
Twisted pair 10BaseT/100BaseTX, RJ-45 connector: EGD protocol Ethernet Modbus protocol supported for communication between controller and third-party DCS
COM Ports
Two micro-miniature 9-pin D connectors: COM1 Reserved for diagnostics, 9600 baud, 8 data bits, no parity, 1 stop bit COM2 Used for serial Modbus communication, 9600 or 19200 baud
Power Requirements UCVGH1
+5 V dc, 4 A typical, 5.4 A maximum +12 V dc, less than 1 mA typical - 12 V dc, less than 1 mA typical PMC expansion site available, IEEE 1386.1 5V PCI Operating temperature: 0C to 70C (32 F to 158 F) Storage temperature: -40C to 80C (-40 F to 176 F)
Expansion site Environment
Note The UCVG controller contains a Type 1 Lithium battery. Replace only with equivalent battery type, rated 3.3 V, 200 mA.
UCV Controller 17
UCVF Controller
The UCVF is a double-slot board using an 850 MHz Intel Pentium III processor with 16 or 128 MB of flash memory and 32 MB of DRAM. Two 10BaseT/100BaseTX (RJ-45 connector) Ethernet ports provide connectivity. The first Ethernet port allows connectivity to the UDH for configuration and peer-to-peer communication. The second Ethernet port is for use on a separate IP logical subnet. This Ethernet port is configured through the toolbox. The controller validates its toolbox configuration against the existing hardware each time the rack is powered up. Note A separate subnet address allows the controller to uniquely identify an Ethernet port. IP subnet addresses are obtained from the Ethernet network administrator (for example, 192.168.1.0, 192.168.2.0).
Mark VI Controller UCVFH2
x x
ETHERNET 1 Primary Ethernet port for Unit Data Highway (UDH) communication (toolbox) ETHERNET 2 Secondary Ethernet port for expansion I/O communication COM1 RS-232C port for initial controller setup COM2 RS-232C port for serial communication Keyboard/mouse port for GE use
L A N 1 L A N 2 STATUS C O M 1:2 U S B RST M / K
Ethernet Status LEDs Active (Blinking = Active) (Solid = Inactive) Link (Yellow = 10BaseT) (Green = 100BaseTX) Active (Blinking = Active) (Solid = Inactive) Link (Yellow = 10BaseT) (Green = 100BaseTX) Status LEDs VMEbus SYSFAIL Flash Activity Power Status CPU Throttle Indicator
S V G A
M E Z Z A N I N E
Note: To connect the batteries that enable NVRAM and CMOS, set jumper E8 to pins 7-8 ("IN") and jumper E10 to ("IN").
UCVF H2
x x
UCVF Controller
18 UCV Controller
UCVF Controller Specifications Item Specification
Intel Pentium III 850 MHz 32 MB DRAM 16 or 128 MB Compact Flash Module 256 KB Advanced Transfer Cache Battery-backed SRAM - 8K allocated as NVRAM for controller functions
Twisted pair 10BaseT/100BaseTX, RJ-45 connector: TCP/IP protocol used for communication between controller and toolbox EGD protocol for communication with CIMPLICITY HMI, and Series 90-70 PLCs Ethernet Modbus protocol supported for communication between controller and thirdparty DCS
Twisted pair 10BaseT/100BaseTX, RJ-45 connector: EGD protocol Ethernet Modbus protocol supported for communication between controller and thirdparty DCS
COM Ports
Power Requirements UCVFH2
+5 V dc, 6 A typical, 7 A maximum +12 V dc, 200 mA typical, 400 mA maximum -12 V dc, 2.5 mA typical
UCV Controller 19
UCVE Controllers
The UCVE is available in multiple forms: UCVEH2 and UCVEM01 to UCVMEM05. The UCVEH2 is the standard Mark VI controller. It is a single-slot board using a 300 MHz Intel Celeron processor with 16 or 128 MB of flash memory and 32 MB of DRAM. A single 10BaseT/100BaseTX (RJ-45) Ethernet port provides connectivity to the UDH. The UCVEM_ _ modules have all the features of the UCVEH2 with the addition of supporting additional Ethernet ports and Profibus. Some UCVEM_ _ modules support secondary 10BaseT/100BaseTX Ethernet ports for use on a separate IP logical subnet. The secondary Ethernet port is configured through the toolbox. The controller validates its toolbox configuration against the existing hardware each time the rack is powered up. A separate subnet address allows the controller to uniquely identify an Ethernet port.
Mark VI Controller UCVEH2

x
Status LEDs
STATUS

S V G A M / K C O M 1:2 L A N
VME bus SYSFAIL Flash Activity Power Status
Keyboard/mouse port for GE use COM1 RS-232C port for initial controller setup COM2 RS-232C port for serial communication
Ethernet Status LEDs Active (Blinking = Active) (Solid = Inactive)

RST P C M I P
ETHERNET 1 Ethernet port for UDH communication
Link (Yellow = 10BaseT) (Green = 100BaseTX) Note: To connect the batteries that enable NVRAM and CMOS, set jumper E8 to pins 7-8 ("IN") and jumper E10 to ("IN").
M E Z Z A N I N E
UCVE H2
x
UCVE Controller
20 UCV Controller
UCVE Controller Specifications Item Specification
Intel Celeron 300 MHz 32 MB DRAM 16 or 128 MB Compact Flash Module 128 KB L2 cache Battery-backed SRAM - 8K allocated as NVRAM for controller functions
Twisted pair 10BaseT/100BaseTX, RJ-45 connector: TCP/IP protocol used for communication between controller and toolbox EGD protocol for communication with CIMPLICITY HMI and Series 90-70 PLCs Ethernet Modbus protocol supported for communication between controller and thirdparty DCS
COM Ports
Power Requirements UCVEH2
+5 V dc, 6 A typical, 8 A maximum +12 V dc, 180 mA typical, 250 mA maximum -12 V dc, 180 mA typical, 250 mA maximum
UCVEM01 Controller Specifications

Item Specification
Twisted pair 10BaseT/100BaseTX, RJ-45 connector: EGD protocol Ethernet Modbus protocol supported for communication between controller and third party DCS
Power Requirements
+5 V dc, 6.2 A typical, 8.2 A maximum +12 V dc, 180 mA typical, 250 mA maximum -12 V dc, 180 mA typical, 250 mA maximum
UCV Controller 21
Note For specifications common to all UCVE modules, refer to UCVEH2 Controller Specifications.
Mark VI Controller UCVEM01
x
Status LEDs
STATUS

S V G A M / K C O M 1:2 L A N RST
SPEED LINK/ ACT
Keyboard/mouse port for GE use COM1 RS-232C port for initial controller setup COM2 RS-232C port for serial communication ETHERNET 1 Primary Ethernet port for UDH communication (toolbox) ETHERNET 2 Secondary Ethernet port for expansion I/O communication
Ethernet Status LEDs Active (Blinking = Active) (Solid = Inactive) Link (Yellow = 10BaseT) (Green = 100BaseTX) Speed (Off = 10BaseT) (On = 100BaseTX) Link/Active
P C M I P
Note: UCVEMxx modules are shipped with the batteries enabled.
M E Z Z A N I N E
UCVE M01
x
UCVEM01 Front Panel

Item Specification
Secondary Ethernet Interfaces (Ethernet 2-4)
Twisted pair 10BaseT/100BaseTX, RJ-45 connector: EGD protocol Ethernet Modbus protocol supported for communication between controller and third-party DCS
Power Requirements
+5 V dc, 8.3 A typical, 10.3 A maximum +12 V dc, 180 mA typical, 250 mA maximum -12 V dc, 180 mA typical, 250 mA maximum
22 UCV Controller
x
Status LEDs
STATUS

S V G A M / K C O M 1:2 L A N RST P C M I P
PMC
0
Keyboard/mouse port for GE use COM1 RS-232C port for initial controller setup COM2 RS-232C port for serial communication ETHERNET 1 Primary Ethernet port for UDH communication (toolbox)
Ethernet Status LEDs Active (Blinking = Active) (Solid = Inactive) Link (Yellow = 10BaseT) (Green = 100BaseTX)
Secondary Ethernet ports for expansion I/O communication: ETHERNET 2 Not used ETHERNET 3 ETHERNET 4
M E Z Z A N I N E
610
UCVE M02
x
UCVEM02 Front Panel

Item Specification
PROFIBUS Interface (PROFIBUS 1-2) Power Requirements
PROFIBUS DP master class 1 +5 V dc, 8.2 A typical, 10.2 A maximum +12 V dc, 180 mA typical, 250 mA maximum -12 V dc, 180 mA typical, 250 mA maximum
UCV Controller 23
x x
STATUS

Status LEDs Left: Power Status Middle: Flash Activity Right: VME bus SYSFAIL
PCI MEZZANINE CARD 0
Keyboard/mouse port for GE use COM1 RS-232C port for initial controller setup COM2 RS-232C port for serial communication ETHERNET 1 Primary Ethernet port for UDH communication (toolbox) Ethernet Status LEDs Top: Active (Blinking = Active) (Solild = Inactive) Bottom: Link (Yellow = 10BaseT) (Green = 100BaseTX)
PROFIBUS 1 PROFIBUS Serial Interface Transmit Active LED
PCI MEZZANINE CARD 1 PCI MEZZANINE CARD 2
M E Z Z A N I N E
UCVE M03
x x
UCVEM03 Front Panel

Item Specification
PROFIBUS Interface (PROFIBUS 1-3) Power Requirements
24 UCV Controller
x x
Monitor port for GE use Keyboard/mouse port for GE use
STATUS
Status LEDs Left: Power Status Middle: Flash Activity Right: VMEbus SYSFAIL
PCI MEZZANINE CARD 0
COM1 RS-232C port for initial controller setup COM2 RS-232C port for serial communication ETHERNET 1 Primary Ethernet port for UDH communication (toolbox) Ethernet Status LEDs Top: Active (Blinking = Active) (Solild = Inactive) Bottom: Link (Yellow = 10BaseT) (Green = 100BaseTX)
PCI MEZZANINE CARD 1 PCI MEZZANINE CARD 2

UCVE M04
x
M E Z Z A N I N E
UCVEM04 Front Panel

Item Specification
Twisted pair 10BaseT/100BaseTX, RJ-45 connector: EGD protocol Ethernet Modbus protocol supported for communication between controller and thirdparty DCS
PROFIBUS Interface (PROFIBUS 1) Power Requirements
UCV Controller 25
x
Status LEDs
STATUS
S V G A M / K C O M 1:2 L A N RST
SPEED LINK/ ACT
VMEbus SYSFAIL Flash Activity Power Status
Keyboard/mouse port for GE use COM1 RS-232C port for initial controller setup COM2 RS-232C port for serial communication ETHERNET 1 Primary Ethernet port for UDH communication (toolbox)
Ethernet Status LEDs Active (Blinking = Active) (Solid = Inactive) Link (Yellow = 10BaseT) (Green = 100BaseTX) Speed (Off = 10BaseT) (On = 100BaseTX) Link / Active
P C M I P
ETHERNET 2 Secondary Ethernet port for expansion I/O communication
M E Z Z A N I N E
UCVE M05
x
UCVEM05 Front Panel
26 UCV Controller
UCVD Controller
The UCVD is a double-slot board using a 300 MHz AMD K6 processor with 8 MB of flash memory and 16 MB of DRAM. A single 10BaseT (RJ-45 connector) Ethernet port provides connectivity to the UDH. The UCVD contains a double column of eight status LEDs. These LEDs are sequentially turned on in a rotating pattern when the controller is operating normally. When an error condition occurs, the LEDs display a flashing error code that identifies the problem. For more information, refer to GEH-6410, Innovation Series Controller System Manual.
Mark VI Controller UCVDH1, H2
x x
Ethernet port for UDH communication Controller and communication status LEDs
ETHERNET
ACTIVE SLOT1 BMAS ENET SYS BSLV RESET FLSH GENA
H L
Status LEDs showing Runtime Error Codes resulting from startup, configuration, or download problems
MONITOR
Monitor port for GE Use Only COM1 RS-232C port for initial controller setup
COM2 RS-232C port for serial communications

LPT1
COM1
COM2
HARD DISK
Hard disk connector for GE use
ISBus drive LAN (Not Used)

KEYBOARD
Special ports for GE Use, printer, keyboard, and mouse
MOUSE
GENIUS
Receptacle for Genius cable plug
UCVD H2 x x
UCVD Controller Front Panel
UCV Controller 27
UCVD Controller Specification Item Specification
AMD-K6 300 MHz 16 MB DRAM 8 MB Flash Memory in UCVD 256 KB of level 2 cache
Operating System LEDs
QNX LEDs on the faceplate provide status information as follows: ACTIVE BMAS ENET BSLV STATUS FLSH GENX Processor is active VME master access is occurring Ethernet activity VME slave access is occurring Display rotating LED pattern when OK Display flashing error code when faulted Writing to Flash memory Genius I/O is active SLOT 1 Controller configured as slot 1 controller in VME rack
Programming
Control block language with analog and discrete blocks; Boolean logic represented in relay ladder diagram format. Supported data types include: Boolean 16-bit signed integer 32-bit signed integer 32-bit floating point 64-bit floating point
Ethernet Interface
Twisted pair 10BaseT, RJ-45 connector TCP/IP protocol used for communication between controller and toolbox Serial Request Transfer Protocol (SRTP) interface between controller and HMI EGD protocol for communication with CIMPLICITY HMI, and Series 90-70 PLCs Ethernet Modbus protocol supported for communication between controller and third-party DCS
COM Ports
Power Requirements
+5 V dc, 6 A +12 V dc, 200 mA -12 V dc, 200 mA
28 UCV Controller
UCVB Controller
The UCVB is a double-slot board using a 133 MHz Intel Pentium processor with 4 MB of flash memory and 16 MB of DRAM. A single 10Base2 (BNC connector) Ethernet port provides connectivity to the UDH. The UCVB contains a double column of eight status LEDs. These LEDs are sequentially turned on in a rotating pattern when the controller is operating normally. When an error condition occurs, the LEDs display a flashing error code that identifies the problem. For more information, refer to GEH-6410, Innovation Series Controller System Manual.
Mark VI Controller UCVBG1
x x DLAN DROP 1 0 8 ETHERNET
Ethernet port for UDH communication Controller and communication status LEDs
DLAN network drop number configuration dip switches (Not Used) Status LEDs showing Runtime Error Codes resulting from startup, configuration, or download problems
1 ACTIVE H L SLOT1 BMAS ENET SYS BSLV RESET FLSH GENA
MONITOR
Monitor port for GE Use Only COM1 RS-232C port for initial controller setup COM2 RS-232C port for serial communications
HARD DISK
Hard disk connector for GE use
LPT1
COM1
COM2
DLAN network connection (Not Used)

DLAN
KEYBOARD
Special ports for GE use, printer, keyboard, and mouse
GENIUS
MOUSE
Receptacle for Genius cable plug
UCVB G1 x x
UCVB Controller Front Panel
UCV Controller 29
UCVB Controller Specification Item Specification
Intel Pentium 133 MHz 16 MB DRAM 4 MB Flash Memory in UCVB 256 KB of level 2 cache
Operating System LEDs
QNX LEDs on the faceplate provide status information as follows: ACTIVE Processor is active SLOT 1 BMAS ENET BSLV STATUS FLSH GENX Controller configured as slot 1 controller in VME rack VME master access is occurring Ethernet activity VME slave access is occurring Display rotating LED pattern when OK Display flashing error code when faulted Writing to Flash memory Genius I/O is active
Programming
Control block language with analog and discrete blocks; Boolean logic represented in relay ladder diagram format. Supported data types include: Boolean 16-bit signed integer 32-bit signed integer 32-bit floating point 64-bit long floating point
Ethernet Interface
Thinwire
10Base2, BNC connector:
TCP/IP protocol used for communication between controller and toolbox SRTP interface between controller and HMI EGD protocol for communication with CIMPLICITY HMI, and Series 90-70 PLCs Ethernet Modbus protocol supported for communication between controller and third-party DCS COM Ports Two micro-miniature 9-pin D connectors: COM1 Reserved for diagnostics, 9600 baud, 8 data bits, no parity, 1 stop bit COM2 Used for serial Modbus communication, 9600 or 19200 baud DLAN+ Interface Power Requirements Interface to DLAN+, a high speed multidrop network based on ARCNET , using a token passing, peer to peer protocol +5 V dc, 5.64 A +12 V dc, 900 mA -12 V dc, 200 mA
30 UCV Controller
Alarms
Fault Fault Description Possible Cause
31 32 33 34 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 68 70 71 72 74 75 76 77 78 79 80 81 82
I/O Compatibility Code Mismatch Diagnostic Queue Overflow Foreground Process Background Process Idle Process Ambient Air Overt temperature Warning. The rack is beginning to overheat. CPU Over temperature Fault. The controller CPU has overheated and may fail at any time. Genius I/O Driver Process Register I/O Process Modbus Driver Process Ser Process Rcvr Process Trans Process Mapper Process SRTP Process Heartbeat Process Alarm Process Queue Manager Process EGD Driver Process ADL Dispatcher Process ADL Queue Process DPM Manager Process Genius IOCHRDY Hangup Genius Lock Retry Genius Application Code Online Load Failure Application Code Startup Load Failure Application Code Expansion Failure ADL/BMS Communication Failure with the VCMI NTP Process Outdated Controller Topology Outdated VCMI Topology No VCMI Topology Platform Process Hardware Configuration Error
Outdated configuration in the VCMI Too many diagnostics are occurring simultaneously Outdated runtime version Outdated runtime version Outdated runtime version The rack fan has failed or the filters are clogged. The rack fan has failed or the filters are clogged. Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Outdated runtime version Application code error Application code error Application code error The VCMI firmware version is too old to work with this controller runtime version. Outdated runtime version Download application code and reboot Download configuration to VCMI and reboot Old VCMI firmware doesnt support controller/VCMI topology checking. Upgrade VCMI firmware. Outdated runtime version The controller hardware doesnt match the configuration specified by the toolbox. Use the toolbox to view the errors in the controller trace buffer (for example: View General Dump the trace buffer). Verify that the total command rate of all Modbus interfaces does not exceed the maximum. Verify that all three controllers are executing the same application code. The application code is using too many Boolean variables. Move some functions to other controllers.
83 84 85
Register I/O Write/Command Limit Exceeded State Exchange Voter Packet Mismatch Maximum Number of Boolean State Variables Exceeded
UCV Controller 31
Fault
Fault Description
Possible Cause
86
Too Many EGD Producers Configured for Fault Tolerant Support Too Many EGD Points Configured for Fault Tolerant Support Producing Fault Tolerant EGD Data Requesting Fault Tolerant EGD Data Process Alarm Queue Is Full Hold List Queue Is Full Data Initialization Failure
The controller can redirect data over the IONET from a maximum of 16 EGD producers. Data from subsequent producers will be lost in the event of an Ethernet failure. The controller can redirect a maximum of 1400 bytes of data over the IONET. Subsequent EGD points will be lost in the event of an Ethernet failure. The controller is redirecting data from the Ethernet to another controller over the IONET. The controller is requesting that Ethernet data be redirected to it over the IONET from another controller. Subsequent process alarms will be lost unless the current alarms are acknowledged and cleared by the operator. Subsequent hold alarms will be lost unless the current alarms are acknowledged and cleared by the operator. Verify that all controllers are executing the same application code. If no VCMI is used (simulation mode), verify that the clock source is set to internal. If a VCMI is used, verify that the clock source is set to external. Download the same application code to all three controllers Outdated runtime version - download runtime and restart. Revalidate the application code and then select the Update Dynamic Data Recorder button from the toolbox toolbar Outdated runtime version - download runtime and restart
87
88 89 90 91 92
93 94 95 96
Pcode mismatch between TMR controllers Unable to start up Dynamic Data Recorder Dynamic Data Recorder Configuration Fault Dynamic Data Recorder Process
UCV Board UCVD Controller Runtime Errors

In addition to generating diagnostic alarms, the UCVB and the UCVD controller boards display status information on front panel LEDs. The Status LED group on these controllers contains eight segments in a two vertical column layout as shown in the following figure. These LEDs display controller errors if a problem occurs. The right-most column makes up the lower hexadecimal digit and the left-most column makes up the upper digit (the least significant bits on the bottom). Numerical conversions are provided with the fault code definitions. Note For all controllers, refer to the stats line in the toolbox.
Controller front panel ACTIVE SLOT1 BMAS ENET SYS BSLV H S T A T U S L
For example, flashing F in this pattern:
F F F
FLSH GENA
is error 0x43, decimal 67
Flashing Controller Status LEDs Indicate Error Codes
32 UCV Controller
If the controller detects certain system errors (typically during boot-up or download), it displays flashing and non-flashing codes on these green status LEDs. These codes correspond to runtime errors listed in the toolbox help file. The following table describes the types of errors displayed by the LEDs.
Controller Runtime Errors Controller Condition Status LED Display
Controller successfully completes its boot-up sequence and begins to execute application code Error occurs during the BIOS phase of the boot-up sequence Error occurs during the application code load Error occurs while the controller is running
Displays a walking ones pattern consisting of a single lighted green LED rotating through the bank of LEDs. Non-flashing error code is displayed Flashing error codes are displayed until the error has been corrected and either the application code is downloaded again, or the controller is rebooted. May freeze with only a single LED lighted. No useful information can be interpreted from the LED position. Fault codes are generated internally.
UCV Controller 33
Notes
34 UCV Controller

Functional Description
The Analog Input/Output (VAIC) board accepts 20 analog inputs and controls 4 analog outputs. Each terminal board accepts 10 inputs and 2 outputs. Cables connect the terminal board to the VME rack where the VAIC processor board is located. VAIC converts the inputs to digital values and transfers them over the VME backplane to the VCMI board, and then to the controller. For outputs, the VAIC converts digital values to analog currents and drives these through the terminal board into the customer circuit. VAIC supports both simplex and triple modular redundant (TMR) applications. When used in a TMR configuration, input signals on the terminal board are fanned out to three VME board racks R, S, and T, each containing a VAIC. Output signals are driven with a proprietary circuit that creates the desired current using all three VAICs. In the event of a hardware failure, the bad VAIC is removed from the output and the remaining two boards continue to produce the correct current. When used in a simplex configuration, the terminal board provides input signals to a single VAIC, which provides all of the current for outputs.
Compatibility
There are two generations of the VAIC board with corresponding terminal boards. The original VAIC includes all versions prior to and including VAICH1C. VAICH1B is included in this generation. When driving 20 mA outputs these boards support up to 500 load resistance at the end of 1000 ft of #18 wire. This generation of board requires terminal board TBAIH1B or earlier for proper operation. They also work properly with all revisions of DTAI terminal boards. The newest VAICH1D and any subsequent releases are designed to support higher load resistance for 20 mA outputs drive voltage: up to 18 V is available at the terminal board screw terminals. This permits operation into loads of 800 with 1000 ft of #18 wire with margin. This generation of the board requires TBAIH1C or later, or any revision of STAI.
VAIC Analog Input/Output 35
VME Rack R VAIC Board
RUN FAIL STAT
TBAI Terminal Board

x x x x x x x x x x x x x
TBAI Terminal Board

x
x x x x x x x x x x x x
JT1
JS1
x x x x x x x x x x x x x x
To Rack T
JT1
VME bus to VCMI
JS1
Cable to VME Rack T
JR1
To Rack S
JR1
Cable to VME Rack S
VAIC x
J3
J4
VAIC, Analog Input Terminal Boards, and Cabling (TMR System)
Installation
To install the V-type board 1 2 3 Power down the VME processor rack Slide in the board and push the top and bottom levers in with your hands to seat its edge connectors Tighten the captive screws at the top and bottom of the front panel Note Cable connections to the terminal boards are made at the J3 and J4 connectors on the lower portion of the VME rack. These are latching type connectors to secure the cables. Power up the VME rack and check the diagnostic lights at the top of the front panel. For details, refer to the section on diagnostics in this document.
36 VAIC Analog Input/Output
Operation
The VAIC board accepts 20 analog inputs, controls 4 analog outputs, and contains signal conditioning, an analog MUX, A/D converter, and D/A converter. The type of analog input, either voltage, 4-20 mA, or 1 mA, is selected by jumpers on the terminal board. Two of the four analog output circuits are 4-20 mA and the other two can be configured for 4-20 mA or 0-200 mA. Inputs and outputs have noise suppression circuitry to protect against surge and high frequency noise. The following table displays the analog I/O capacity of VAIC, using two TBAI terminal boards.
Quantity Analog Input Types 16 4 4-20 mA, or 1 mA Quantity Analog Output Types 0-20 mA or 0-200 mA 0-20 mA 2
10 V dc, or 5 V dc, or 4-20 mA 2
Analog Input Terminal Board TBAI 8 circuits per terminal board

Noise Suppression
Current Limit
<R> Module Controller Application Software
Typical transmitter, Mark VI powered +24 V dc T +/-5,10 Vdc 4-20 ma Return
P28V Analog Input Board VAIC
N S
Vdc
J#A 20 ma
250 ohms
A/D
D/A
Open
J#B Return Connectors at bottom of VME rack

P28V
PCOM
2 circuits per terminal board +24 V dc +/-1 ma 4-20 ma Return N S

Current Limit
Excitation
JR1 J3/4
1 ma
250 ohm
J#A
20 ma 5k ohms
Open
J#B Return
Current Regulator/ Power Supply
Jump select on one circuit only; #2 Circuit is 4-20 ma only

Signal
Two output circuits

200 ma 20 ma
JO
N S
Return SCOM
ID
VAIC and Analog Input Terminal Board, Simplex System
In a TMR system, analog inputs fan out to the three control racks from JR1, JS1, and JT1. The 24 V dc power to the transducers comes from all three VME racks and is diode OR selected on the terminal board. Each analog current output is fed by currents from all three VAICs. The actual output current is measured with a series resistor, which feeds a voltage back to each VAIC. The resulting output is the voted middle value (median) of the three currents. The following figure shows VAIC in a TMR arrangement.
Terminal Board TBAI Typical transmitter, Noise Mark VI powered +24 V dc T +/-5,10 Vdc 4-20 ma Return
Open
<R> Module Controller Application Software

P28V<T> P28V<S>
8 circuits per termination board P28VR

Current Limit
Suppression
N S
Vdc
J#A 20 ma
Analog Input Board VAIC
250 ohms
A/D
D/A
J#B Return
PCOM
2 circuits per termination board
Connectors at bottom of VME rack Excitation JR1 J3/J4

Filter 2 Pole
+24 Vdc +/-1 ma 4-20 ma Return N S
P28VR
Current Limit
1 ma J#A 20 ma
250 ohm
5k ohms
Open
PCOM
J#B Return
S T ID Current Regulator/ Power Supply
Two output circuits #2 circuit is 4-20 mA only

Signal
200 ma 20 ma
JO
N S
Return
S T
JS1
SCOM
ID
JT1
To rack<S> To rack<T>
ID
VAIC and Analog Input Terminal Board, TMR System
Note With the noise suppression and filtering, the input ac common mode rejection (CMR) is 60 dB, and the dc CMR is 80 dB.
Transmitters/transducers can be powered by the 24 V dc source in the control system, or can be powered independently. Diagnostics monitor each output and a suicide relay disconnects the corresponding output if a fault cannot be cleared by a command from the processor. Hardware filters on the terminal board suppress high frequency noise. Additional software filters on VAIC provide configurable low pass filtering.
Compressor Stall Detection

VAIC firmware includes gas turbine compressor stall detection, executed at 200 Hz. Two stall algorithms can be selected. Both use the first four analog inputs, scanned at 200 Hz. One algorithm is for small LM gas turbines and uses two pressure transducers (refer to the figure, Small (LM) Gas Turbine Compressor Stall Detection Algorithm). The other algorithm is for heavy-duty gas turbines and uses three pressure transducers (refer to the figure, Heavy Duty Gas Turbine Compressor Stall Detection Algorithm). Real-time inputs are separated from the configured parameters for clarity. The parameter CompStalType selects the type of algorithm required, either two transducers or three. PS3 is the compressor discharge pressure. A drop in this pressure (PS3 drop) indicates possible compressor stall. The algorithm also calculates the rate of change of discharge pressure, dPS3dt, and compares these values with configured stall parameters (KPS3 constants). The compressor stall trip is initiated by VAIC, which sends the signal to the controller where it is used to initiate a shutdown. The shutdown signal can be used to set all the fuel shut-off valves (FSOV) through any relay output.
Input, cctx* Low_Input, Low_Value, High_Input, High Value SysLim1Enabl, Enabl SysLim1Latch, Latch SysLim1Type, >= SysLimit1, xxxx ResetSys, VCMI, Mstr SysLim2Enabl, Enabl SysLim2Latch, Latch SysLim2Type, <= SysLimit2, xxxx CompStalType
Input Config param.
VAIC, 200 Hz scan rate

Scaling 4 4 Sys Lim Chk #1
*Note: where x, y, represent any two of the input circuits 1 thru 4.
Signal Space Inputs AnalogInx*
SysLimit1_x*
Sys Lim Chk #2 4 SysLimit2_x* AnalogIny* SysLimit1_y* SysLimit2_y* Validation & Stall Detection two_xducer Input Circuit Selection OR PS3A_Fail PS3A PS3B_Fail PS3B
OR
InputForPS3A InputForPS3B
eg. AnalogIn2 eg. AnalogIn4 PS3A A |A-B| PS3B B PS3A_Fail PS3_Fail PS3B_Fail AND DeltaFault PS3Sel Selection Definition
If PS3B_Fail & not PS3A_Fail then PS3Sel = PS3A; ElseIf PS3A_Fail & not PS3B_Fail then PS3Sel = PS3B; ElseIf DeltaFault then PS3Sel = Max (PS3A, PS3B) ElseIf SelMode = Avg then PS3Sel = Avg (PS3A, PS3B) ElseIf SelMode = Max then PS3Sel = Max (PS3A, PS3B) Else then PS3SEL = old value of PS3SEL
PressDelta SelMode
A A>B B
Max PS3A PS3B PS3A_Fail PS3B_Fail
PS3Sel
PressSel
d __ DPS3DTSel dt PressRateSel -1 X -DPS3DTSel
TimeDelay KPS3_Drop_Mx KPS3_Drop_Mn KPS3_Drop_I KPS3_Drop_S

z-1
-DPS3DTSel Mid
TD
PS3_Fail
A B
A+B
A>B
AND
PS3Sel KPS3_Delta_S KPS3_Delta_I KPS3_Delta_Mx KPS3_Drop_L CompStalPerm
PS3i
stall_timeout
X
A
A+B
B
stall_set S AND delta_ref Latch MIN A R stall_delta

delta AB AND PS3i_Hold B
PS3Sel BA-B
stall_permissive
MasterReset, VCMI, Mstr
Small (LM) Gas Turbine Compressor Stall Detection Algorithm
Scaling Input, cctx* Low_Input, Low_Value, High_Input, High Value 4 SysLim1Enabl, Enabl 4 SysLim1Latch, Latch SysLim1Type, >= SysLimit1, xxxx ResetSys, VCMI, Mstr 4 SysLim2Enabl, Enabl SysLim2Latch, Latch SysLim2Type, <= SysLimit2, xxxx
Input Config. param.
VAIC, 200 Hz scan rate
*Note: where x, y, z, represent any three of the input circuits 1 thru 4.
Signal Space inputs AnalogInx*
Sys Lim Chk #1
SysLimit1_x*
Sys Lim Chk #2
SysLimit2_x* AnalogIny* SysLimit1_y* SysLimit2_y* AnalogInz* SysLimit1_z* SysLimit2_z*
Stall Detection CompStalType three_xducer Input Circuit Selection InputForPS3A InputForPS3B InputForPS3C eg. AnalogIn1 eg. AnalogIn2 eg. AnalogIn4 not used not used PS3C PS3B MID PS3Sel, or CPD PressSel PS3A SEL d __ DPS3DTSel dt PressRateSel -1 -DPS3DTSel
TD
not used
DeltaFault
PressDelta SelMode TimeDelay KPS3_Drop_Mx KPS3_Drop_Mn KPS3_Drop_I KPS3_Drop_S
-DPS3DTSel
MID
X z-1
A+B
A>B
B
PS3Sel KPS3_Delta_S KPS3_Delta_I KPS3_Delta_Mx

-DPS3DTSel
A
PS3i
stall_timeout X
A
stall_set A+B
B
MIN
delta_ref
A
AND stall_ delta
Latch
R
CompStall
delta AB
B
AND
PS3i_Hold PS3Sel
A-B
B
stall_permissive
Heavy Duty Gas Turbine Compressor Stall Detection Algorithm
200 0 180 0 Rate of Change of Pressure- dPS3dt, psia/sec A. B. C. D. KPS3_Drop_S KPS3_Drop_I KPS3_Drop_Mn KPS3_Drop_Mx A 25 0 B. Delta PS3 drop (PS3 initial - PS3 actual) , DPS3, psid
140 0 120 0 100 0 80 0 60 0 40 0 20 C 0 B 0 F -200 0
20 0
15 0
10 0 G E
5 0 E. KPS3_Delta_S F. KPS3_Delta_I G. KPS3_Delta_Mx 100 200 300 400 500 600 0 700
Initial Compressor Discharge Pressure PS3

Configurable Compressor Stall Detection Parameters
The variables used by the stall detection algorithm are defined as follows:
Variable PS3 PS3I KPS3_Drop_S KPS3_Drop_I KPS3_Drop_Mn KPS3_Drop_Mx KPS3_Delta_S KPS3_Delta_I KPS3_Delta_Mx Variable Description Compressor discharge pressure Initial PS3 Slope of line for PS3I versus dPS3dt Intercept of line for PS3I versus dPS3dt Minimum value for PS3I versus dPS3dt Maximum value for PS3I versus dPS3dt Slope of line for PS3I versus Delta PS3 drop Intercept of line for PS3I versus Delta PS3 drop Maximum value for PS3I versus Delta PS3 drop
Specifications
Item Number of channels Input span Input Impedance Specification 24 channels per VAIC board (20 AI, 4 AO) with two terminal boards 4-20 mA, 1 mA, 5 V dc, 10 V dc 250 at 4-20 mA 5,000 at 1 mA 500,00 at voltage input 16-bit A/D converter with 14-bit resolution Normal scan 10 ms (100 Hz) Inputs 1 through 4 available for scan at 200 Hz Measurement accuracy Noise suppression on inputs Better than 0.1% full scale The first 10 circuits (J3) have a hardware filter with single pole down break at 500 rad/sec The second 10 circuits (J4) have a hardware filter with a two pole down break at 72 and 500 rad/sec A software filter, using a two pole low pass filter, is configurable for 0, .75, 1.5 Hz, 3 Hz, 6 Hz, 12 Hz Common mode rejection Common mode voltage range Output converter Output load Ac CMR 60 dB @ 60 Hz, with up to 5 V common mode voltage Dc CMR 80 dB with -5 to +7 peak volt common mode voltage 5 V (2 V CMR for the 10 V inputs) 12-bit D/A converter with 0.5% accuracy 500 for 4-20 mA output board revisions prior to and including VAICH1C (requires TBAIH1B or DTAI) 800 for 4-20 mA output, board revisions VAICH1D and later (requires TBAIH1C or STAI) 50 for 200 mA output Power consumption Compressor stall detection Fault detection Less than 31 MW Detection and relay operation within 30 ms Analog input out of limits Monitor D/A outputs, output currents, and total current Monitor suicide relay and 20/200 mA scaling relays Compare input signals with the voted value and check difference against the TMR limit Failed I/O chip
Input converter resolution Scan time
Physical
Temperature Size 0 to 60C (32 to 140 F) 26.04 cm high x 1.99 cm wide x 18.73 cm deep (10.26 in x 0.782 in x 7.375 in )
Diagnostics
Three LEDs at the top of the VAIC front panel provide status information. The normal RUN condition is a flashing green, and FAIL is a solid red. The third LED displays STATUS and is normally off, but displays a steady orange if a diagnostic alarm condition exists in the board. Diagnostic checks include the following: Each analog input has hardware limit checking based on preset (nonconfigurable) high and low levels set near the ends of the operating range. If this limit is exceeded a logic signal is set and the input is no longer scanned. If any one of the inputs hardware limits is set, it creates a composite diagnostic alarm, L3DIAG_VAIC, which refers to the entire board. Details of the individual diagnostics are available from the toolbox. The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal. Each input has system limit checking based on configurable high and low levels. These limits can be used to generate alarms, and can be configured for enable/disable, and as latching/non-latching. RESET_SYS resets the out of limits. In TMR systems, if one signal varies from the voted value (median value) by more than a predetermined limit, that signal is identified and a fault is created. This can provide early indication of a problem developing in one channel. Monitor D/A outputs, output currents, total current, suicide relays and 20/200 mA scaling relays; these are checked for reasonability and can create a fault. TBAI has its own ID device that is interrogated by VAIC. The board ID is coded into a read-only chip containing the terminal board serial number, board type, revision number, and the JR, JS, JT connector location. When the chip is read by the I/O processor and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
Parameter Description Enable or disable system limits Select type of output voting Select minimum current for healthy 4-20 mA input Select maximum current for healthy 4-20 mA input Select compressor stall algorithm (# of transducers) Select analog input circuit for PS3A Select analog input circuit for PS3B Select analog input circuit for PS3C Select mode for excessive difference pressure Excessive difference pressure threshold Time delay on stall detection, in milliseconds Minimum pressure rate Pressure rate intercept Pressure rate slope Pressure delta slope Pressure delta intercept Pressure delta maximum Threshold pressure rate Max pressure rate Terminal board connected to VAIC through J3 First of 10 analog inputs - board point Current or voltage input type Value of current at the low end of scale Value of input in engineering units at low end of scale Value of current at the high end of scale Bandwidth of input signal filter Input fault check Input fault latch Input fault type Input limit in engineering units Input fault check Input fault latch Input fault type Input limit in engineering units First of two analog outputs - board point Type of output current Output mA at low value Output in engineering units at low mA Output mA at high value Output value in engineering units at high mA Choices Enable, disable Simplex, simplex TMR 0 to 21 mA 0 to 21 mA 0, 2, or 3 Analog in 1, 2, 3, or 4 Analog in 1, 2, 3, or 4 Analog in 1, 2, 3, or 4 Maximum, average 5 to 500 10 to 40 10 to 2000 10 to 100 0.05 to 10 0.05 to 10 10 to 100 10 to 100 10 to 2000 10 to 2000 Connected, not connected Point edit (input FLOAT) Unused, 4-20 mA, 5 V, 10 V -10 to +20 -3.4082e + 038 to 3.4028e + 038 -10 to +20 Unused, 0.75, 1.5 Hz, 3 Hz, 6 Hz, 12 Hz Enable, disable Latch, unlatch Greater than or equal Less than or equal Sys_Lim_1 Sys_Lim_2_Enable Sys_Lim_2_Latch Sys_Lim_2_Type Sys_Lim_2 -3.4082e + 038 to 3.4028e + 038 Enable, disable Latch, unlatch Greater than or equal Less than or equal -3.4082e + 038 to 3.4028e + 038 Point edit (output FLOAT) Unused, 0-20 mA, 0-200 mA 0 to 200 mA -3.4082e + 038 to 3.4028e + 038 0 to 200 mA -3.4082e + 038 to 3.4028e + 038
Configuration
System limits Output voting Min_ MA_Input Max_ MA_Input CompStalType InputForPS3A InputForPS3B InputForPS3C SelMode PressDelta TimeDelay KPS3_Drop_Min KPS3_Drop_I KPS3_Drop_S KPS3_Delta_S KPS3_Delta_I KPS3_Delta_Mx KPS3_Drop_L KPS3_Drop_Mx
J3:IS200TBAIH1A AnalogIn1
Input type Low_Input Low_Value High_Input High_Value Input _Filter TMR_Diff_Limit Sys_Lim_1_Enable Sys_Lim_1_Latch Sys_Lim_1_Type
Value of input in engineering units at high end of scale -3.4082e + 038 to 3.4028e + 038 Difference limit for voted inputs in % of high-low values 0 to 100
AnalogOut1
Output_MA Low_MA Low_Value High_MA High_Value
Parameter TMR Suicide Diff Limit D/A Err Limit
Description Suicide for faulty output current, TMR only Current difference for suicide, TMR only
Choices Enable, disable 0 to 200 mA
Difference between D/A reference and output, in % for 0 to 100 % suicide, TMR only Terminal board connected to VAIC via J4 First of 10 analog inputs - board point First of two analog outputs - board point Connected, not connected Point edit (input FLOAT) Point edit (output FLOAT)
J4:IS200TBAIH1A AnalogIn11 AnalogOut3
Board Points (Signals) Description - Point Edit (Enter Signal Connection) L3DIAG_VAIC1 L3DIAG_VAIC2 L3DIAG_VAIC3 SysLimit1_1 : SysLimit1_20 SysLimit2_1 : SysLimit2_20 OutSuicide1 : OutSuicide4 DeltaFault CompStall : Out4MA CompPressSel PressRate Sel CompStallPerm Board diagnostic Board diagnostic Board diagnostic System limit 1 : System limit 1 System limit 2 : System limit 2 Status of suicide relay for output 1 : Status of suicide relay for output 4 Excessive difference pressure Compressor stall : Feedback, total output current, mA Selected compressor press, by stall Algor. Selected compressor press rate, by stall Algor. Compressor stall permissive
Direction Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Output
Type BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT BIT
Alarms
Fault 2 3 16 17 18 19 24 Fault Description Flash memory CRC failure CRC failure override is active System limit checking is disabled Board ID failure J3 ID failure J4 ID failure Firmware/hardware incompatibility. The firmware on this board cannot handle the terminal board it is connected to ConfigCompatCode mismatch. Firmware: [ ] ; Tre: [ ] The configuration compatibility code that the firmware is expecting is different than what is in the tre file for this board IOCompatCode mismatch. Firmware: [ ]; Tre: [ ] The I/O compatibility code that the firmware is expecting is different than what is in the tre file for this board Analog input [ ] unhealthy Output [ ] individual current too high relative to total current. An individual current is N mA more than half the total current, where N is the configurable TMR_Diff Limit Output [ ] total current varies from reference current. Total current is N mA different than the reference current, where N is the configurable TMR_Diff Limit Output [ ] reference current error. The difference between the output reference and the input feedback of the output reference is greater than the configured DA_Err Limit measured in percent Output [ ] individual current unhealthy. Simplex mode only alarm if current out of bounds Output [ ] suicide relay non-functional. The shutdown relay is not responding to commands Output [ ] 20/200 mA selection non-functional. feedback from the relay indicates incorrect 20/200 mA relay selection (not berg jumper selection) Output [ ] 20/20 mA suicide active. One output of the three has suicided, the other two boards have picked up current J3 terminal board and configuration incompatible J4 terminal board and configuration incompatible Logic Signal [ ] voting mismatch. The identified signal from this board disagrees with the voted value Input Signal # voting mismatch, Local [ ], Voted [ ]. The specified input signal varies from the voted value of the signal by more than the TMR Diff Limit A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable Possible Cause Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online) System checking was disabled by configuration Failed ID chip on the VME I/O board Failed ID chip on connector J3, or cable problem Failed ID chip on connector J4, or cable problem Invalid terminal board connected to VME I/O boardcheck the connectors and call the factory A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory Excitation to transducer, bad transducer, open or short-circuit Board failure
30
31
32-65 66-69
70-73
Board failure or open circuit
74-77
Board failure (D/A converter)
78-81 82-85 86-89
Board failure Board failure (relay or driver) Configured output type does not match the jumper selection, or VAIC board failure (relay) Board failure
90-93
94 95 128-223
224-249
TBAI Analog Input/Output

The Analog Input/Output (TBAI) terminal board supports 10 analog inputs and 2 outputs. The 10 analog inputs accommodate two-wire, three-wire, four-wire, or externally powered transmitters. The analog outputs can be set up for 0-20 mA or 0200 mA current. Inputs and outputs have noise suppression circuitry to protect against surge and high frequency noise. TBAI has three DC-37 pin connectors provided on TBAI for connection to the I/O processors. Simplex applications are supported using a single connector (JR1). TMR applications are supported using all three connectors. In TMR applications, the input signals are fanned to the three connectors for the R, S, and T controls. TMR outputs combine the current of the three connected output drivers and determine the total current with a measuring shunt. TBAI then presents the total current signal to the I/O processors for regulation to the commanded setpoint.
Mark VI Systems
In the Mark* VI system, TBAI works with VAIC processor and supports simplex and TMR applications. One or two TBAIs can be connected to the VAIC. In TMR systems, TBAI is cabled to three VAIC boards.
Mark VIe Systems

In the Mark VIe system, TBAI works with the PAIC I/O pack and supports simplex and TMR applications. In TMR systems, three PAICs plug directly into the TBAI.
x
10 Analog Inputs 2 Analog Outputs
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
JT1
J ports conections:
JS1 Plug in PAIC I/O Pack for Mark VIe system or Cables to VAIC boards for Mark VI system; JR1 The number and location depends on the level of redundancy required.
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47 x
Shield bar
Barrier type terminal blocks can be unplugged from board for maintenance
TBAI Input Terminal board
Installation
Connect the input and output wires directly to two I/O terminal blocks mounted on the terminal board. Each block is held down with two screws and has 24 terminals accepting up to #12 AWG wires. A shield terminal attachment point is located adjacent to each terminal block. TBAI can accommodate the following analog I/O types: Analog input, two-wire transmitter Analog input, three-wire transmitter Analog input, four-wire transmitter Analog input, externally powered transmitter Analog input, voltage 5 V, 10 V dc Analog output, 0-20 mA Analog output, 0-200 mA
The following diagram shows the wiring connections, jumper positions, and cable connections for TBAI.
Analog Input Terminal Board TBAI
x
Circuit
Input 1 Input 1 Input 2 Input 2 Input 3 Input 3 Input 4 Input 4 Input 5 Input 5 Input 6 Input 6
(20ma) (Ret) (20ma) (Ret) (20ma) (Ret) (20ma) (Ret) (20ma) (Ret) (20ma) (Ret)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
(24V) ( Vdc) (24V) ( Vdc) (24V) ( Vdc) (24V) ( Vdc) (24V) ( Vdc) (24V) ( Vdc)
Board Jumpers Jumpers 20mA/V dc Open/Ret Input 1 J1A J1B Input 2 Input 3 Input 4 Input 5 J2A J3A J4A J5A J6A J2B J3B J4B J5B J6B
JT1
JS1
J ports connections:
Plug in PAIC I/O Pack for Mark VIe or Cable(s) to VAIC board(s) for Mark VI; The number and location depends on the level of redundancy required.
Input 6
Input 7 (20ma) Input 7 (Ret) Input 8 (20ma) Input 8 (Ret) Input 9 (20ma) Input 9 (Ret) Input 10 (20ma) Input 10 (Ret) PCOM PCOM Output 1 (Ret) Output 2 (Ret)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
Input 7 (24V) Input 7 ( Vdc) Input 8 (24V) Input 8 ( Vdc) Input 9 (24V) Input 9 (1ma) Input 10 (24V) Input 10 (1ma) PCOM PCOM Output 1 ( Sig) Output 2 ( Sig)
Input 7 Input 8 Input 9 Input 10
J7A J8A 20mA/1 mA J9A J10A
J7B J8B Open/Ret J9B J10B
JR1
Output 1 Output 2
20mA/200mA J0 No Jumper (0-20mA)
Two-wire transmitter wiring 4-20mA
+24 V dc T Voltage input 4-20 ma Return

Open
VDC J#A 20 ma
Three-wire transmitter wiring 4-20 mA

T
+24 V dc Voltage input 4-20 ma Return VDC J#A 20 ma
J#B
Open
J#B
PCOM
Externally powered transmitter wiring 4-20 mA

Power Supply + T + -
+24 V dc Voltage input 4-20 ma Return

Open
VDC J#A 20 ma
Four-wire transmitter wiring 5 V dc

T
+24 V dc Voltage input 4-20 ma Signal Return VDC J#A 20 ma
J#B
Max. common mode voltage is 7.0 V dc
Open
J#B
PCOM
Misc return to PCOM

PCOM
TBAI Terminal Board Wiring
Operation
TBAI provides a 24 V dc power source for all the transducers. The inputs can be configured as current or voltage inputs using jumpers (J#A and J#B). One of the two analog output circuits is 4-20 mA and the other can be configured as 4-20 mA or 0200 mA. The following table displays the analog I/O capacity of TBAI.
Quantity
Analog Input Types

10 V dc, or 5 V dc, or 4-20 mA
Quantity Analog Output Types
8 2
1 1
0-20 mA or 0-200 mA 0-20 mA
4-20 mA, or 1 mA
Note With the noise suppression and filtering, the input ac CMR is 60 dB, and the dc CMR is 80 dB. Each 24 V dc power output is rated to deliver 21 mA continuously and is protected against operation into a short circuit. Transmitters/transducers can be powered by the 24 V dc source in the control system, or can be independently powered. Jumper JO selects the type of current output. Diagnostics monitor each output and a suicide relay in the I/O controller disconnects the corresponding output if a fault cannot be cleared by a command from the processor.
Terminal Board TBAI 8 circuits per terminal board SYSTEM POWERED +24 V dc T +/-5,10 Vdc 4-20 ma Return Open
Noise Suppression
Current Limit
I/O CONTROLLER Application Software
P28V
N S
Vdc
J#A 20 ma
250 ohms
J#B Return
R PROCESSOR
PCOM
2 circuits per termination board +24 V dc +/-1 ma 4-20 ma Return N S

P28V
Current Limit
A/D
Excitation
JR1
D/A
1 ma
250 ohm
J#A
20 ma 5k ohms
Open
J#B Return
Current Regulator/ Power Supply
Jump select on one circuit only; #2 Circuit is 4-20 ma only

Signal
Two output circuits

200 ma 20 ma
JO
N S
Return SCOM
ID
Simplex Analog Inputs and Outputs
In a TMR system, analog inputs fan out to the three I/O controllers (VAIC or PAIC). The 24 V dc power to the transducers comes from all three controllers and is diode shared on TBAI. Each analog current output is fed by currents from all three controllers. The actual output current is measured with a series resistor, which feeds a voltage back to each I/O controller. The resulting output is the voted middle value (median) of the three currents. The following figure shows TBAI in a TMR system.
Terminal Board TBAI SYSTEM POWERED +24 V dc T +/-5,10 Vdc 4-20 ma Return
Open
I/O CONTROLLER Application Software
Noise Suppression
8 circuits per Terminal board P28VR

Current Limit
P28V<T> P28V<S>
N S
Vdc
J#A 20 ma
250 ohms
J#B Return
PCOM
R PROCESSOR
2 circuits per terminal board
A/D
Excitation JR1
D/A
+24 Vdc +/-1 ma 4-20 ma Return N S
P28VR
Current Limit
1 ma J#A 20 ma
250 ohm
5k ohms
Open
PCOM
J#B Return
S T ID Current Regulator/ Power Supply
Two output circuits, #2 circuit is 4-20 mA only

Signal
200 ma 20 ma
JO
Return
N S
SCOM
S T
JS1 To S PROCESSOR
ID
JT1 To T PROCESSOR
ID
Analog Inputs and Outputs, TMR
Specifications
Item Number of channels Input span, transmitters Outputs Output load Specification 12 channels (10 AI, 2 AO) 1-5 V dc from 4-20 mA current input 24 V outputs provide 21 mA each connection 500 for 4-20 mA output, TBAIH1B with VAICH1C 800 for 4-20 mA output, TBAIH1C with VAICH1D 800 for 4-20 mA output, TBAIH1C with PAIC 50 for 200 mA Physical Fault detection Temperature Size Monitor total output current Check connector ID chip for hardware incompatibility -30 to 65C (-22 to +149 F) 10.16 cm wide x 33.02 cm high ( 4.0 in x 13 in)
Maximum lead resistance 15 maximum two-way cable resistance, cable length up to 300 m (984 ft)
Diagnostics
Diagnostic tests are made on the terminal board as follows: The board provides the voltage drop across a series resistor to indicate the output current. The I/O processor creates a diagnostic alarm (fault) if any one of the two outputs goes unhealthy. Each cable connector on the terminal board has its own ID device that is interrogated by the I/O controller. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the JR, JS, JT connector location. When this chip is read by the I/O controller and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
The terminal board is configured by jumpers. For the location of these jumpers, refer to the installation diagram. The jumper choices are as follows: Jumpers J1A through J8A select either current input or voltage input. Jumpers J1B through J8B select whether the return is connected to common or is left open. Jumpers J9A and J10A select either 1 mA or 20 mA input current. Jumpers J9B and J10B select whether the return is connected to common or is left open. Jumper J0 sets output 1 to either 20 mA or 200 mA.
DTAI Simplex Analog Input/Output

The Simplex Analog Input/Output (DTAI) terminal board is a compact analog input terminal board designed for DIN-rail mounting. The board has 10 analog inputs and 2 analog outputs and connects to the VAIC processor board with a single cable. This cable is identical to those used on the larger TBAI terminal board. The terminal boards can be stacked vertically on the DIN-rail to conserve cabinet space. The 10 analog inputs accommodate two-wire, three-wire, four-wire, or externally powered transmitters. The two analog outputs are 0-20 mA, but one can be jumper configured to a 0-200 mA current. Two DTAI boards can be connected to VAIC for a total of 20 analog inputs and 4 analog outputs. Only a simplex version of the board is available. The functions and on-board noise suppression are the same as those on the TBAI. High-density euro-block type terminal blocks are permanently mounted to the board, with two screw connections for the ground connection (SCOM). An on-board ID chip identifies the board to the VAIC for system diagnostic purposes.
Installation
Mount the plastic holder on the DIN-rail and slide the DTAI board into place. Connect the RTD wires directly to the terminal block. The Euro-block type terminal block has 48 terminals and is permanently mounted on the board. Typically, #18 AWG wires (shielded twisted pair) are used. Two screws, 43 and 44, are provided for the SCOM (ground) connection, which should be as short a distance as possible. Note There is no shield terminal strip with this design. DTAI accommodates the following analog I/O types: Analog input, two-wire transmitter Analog input, three-wire transmitter Analog input, four-wire transmitter Analog input, externally powered transmitter Analog input, voltage 5 V, 10 V dc Analog output, 0-20 mA current Analog output, 0-200 mA current Wiring, jumper positions, and cable connections appear on the wiring diagram Note SCOM, terminal 43, must be connected to chassis ground.
DTAI
Jumpers 37-pin "D" shell connector with latching fasteners

JP1B JP1A
Screw Connections 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48
TB1 Screw Connections Circuit 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 Input 1 (24V) Input 1 (Vdc) Input 2 (24V) Input 2 (Vdc) Input 3 (24V) Input 3 (Vdc) Input 4 (24V) Input 4 (Vdc) Input 5 (24V) Input 5 (Vdc) Input 6 (24V) Input 6 (Vdc) Input 7 (24V) Input 7 (Vdc) Input 8 (24V) Input 8 (Vdc) Input 9 (24V) Input 9 (1mA) Input 10 (24V) Input 10 (1mA) PCOM Chassis Ground Output 1 (Signal) Output 2 (Signal) Input 1 Input 2 Input 3 Input 4 Input 5 Input 6 Input 7 Input 8 Input 9 Input 10 Output 1 Output 2
Jumpers Open/Return 20mA/ V dc J1B J2B J3B J4B J5B J6B J7B J8B J9B J10B J1A J2A J3A J4A J5A J6A J7A J8A 20mA/1mA J9A J10A J0 No jumper
JR1
Cable to J3 connector in I/O rack for VAIC board
Input 1 (20mA) JP2B JP2A Input 1 (Return) Input 2 (20mA) JP3B JP3A Input 2 (Return) Input 3 (20mA) JP4B JP4A Input 3 (Return) Input 4 (20mA) JP5B JP5A Input 4 (Return) Input 5 (20mA) JP6B JP6A Input 5 (Return) Input 6 (20mA) JP7B JP7A Input 6 (Return) Input 7 (20mA) JP8B JP8A Input 7 (Return Input 8 (20mA) JP9B JP9A Input 8 (Return Input 9 (20mA) JP10B JP10A Input 9 (Return) Input 10 (20mA) Input 10 (Ret) JP0 PCOM Chassis Ground Output 1 (Return) Output 2 (Return)
SCOM
DIN-rail mounting
Two-wire transmitter wiring 4-20mA
+24 V dc T Voltage input 4-20 ma Return
Open
VDC J#A 20 ma
Three-wire transmitter wiring 4-20 mA

T
+24 V dc Voltage input 4-20 ma Return VDC J#A 20 ma
J#B
Open
J#B
PCOM
Externally powered transmitter wiring 4-20 mA

Power Supply + T + -
+24 V dc Voltage input 4-20 ma Return

Open
VDC J#A 20 ma
Four-wire transmitter wiring 5 V dc

T
+24 V dc Voltage input 4-20 ma Signal Return VDC J#A 20 ma
J#B
Max. common mode voltage is 7.0 V dc
Open
J#B
PCOM
Misc return to PCOM

PCOM
DTAI Wiring, Cabling, and Jumper Positions
Operation
24 V dc power is available on DTAI for all the transducers and the inputs can be configured as current or voltage inputs using jumpers. One of the two analog output circuits is 4-20 mA, and the other can be jumper configured for 4-20 mA or 0-200 mA. DTAI has only one cable connection so it cannot be used for TMR applications as with TBAI.
<R> Module DTAI Board Typical transmitter, Mark VI powered +24 V dc Voltage input 8 circuits per terminal board Noise 1 3
suppression
Current Limit
Controller Application Software
P28V Analog Input Board VAIC
(+/-5,10 V dc)
N 4-20 mA 2 S Return 4 Open 41 43 PCOM
Vdc
J1A 20 ma
250 ohms
A/D
D/A
J1B Return
PCOM
SCOM 2 circuits per terminal board P28V 33 +24 V dc Current Limit N 4-20 mA 34 S Return 36
Open
Connectors at bottom of VME rack Excitation

JR1 J3/4
+/-1 mA 35
1 ma
250 ohm
J9A
20 mA 5k ohms
J9B
Return PCOM Current Regulator/ Power Supply
Jump select on one circuit only; #2 Circuit is 4-20 mA only
Two output circuits 200 mA JO

20 mA
Signal 45
N 46 S
Return
SCOM
ID
DTAI Terminal Board and VAIC I/O Processor
The following table displays the analog I/O capacity of DTAI.

Quantity Analog Input Types
8 2
10 V dc, or 5 V dc, or 4-20 mA
Quantity Analog Output Types

1 1 0-20 mA or 0-200 mA 0-20 mA
4-20 mA, or 1 mA
Specifications
Item
Number of channels Input span, transmitters Maximum lead resistance to transmitters Outputs Maximum lead resistance Output load Fault detection
Specification
12 channels (10 AI, 2 AO) 1 - 5 V dc from 4-20 mA current input 15 maximum two-way cable resistance, cable length up to 300m (984 ft) 24 V outputs provide 21 mA for each connection 15 maximum two-way cable resistance, cable length up to 300m (984 ft). 500 for 4-20 mA output. 50 for 200 mA output with VAICH1C Monitor output current Check ID chip on connector 0 to 60C (32 to 140 F) 8.6 cm wide x 16.2 cm high (3.4 in x 6.37 in)
Physical
Temperature Size, with support plate
Diagnostics
Configuration
The terminal board is configured by jumpers. For the location of these jumpers, refer to the installation diagram. The jumper choices are as follows: Jumpers J1A through J8A select either current input or voltage input. Jumpers J1B through J8B select whether the return is connected to common or is left open. Jumpers J9A and J10A select either 1 mA or 20 mA input current. Jumpers J9B and J10B select whether the return is connected to common or is left open. Jumper J0 sets output 1 to either 20 mA or 200 mA.
Notes

The Acoustic Monitoring (VAMA) board monitors acoustic or pressure waves in the turbine combustion chamber. Inputs are wired to the DIN-rail mounted DDPT terminal board. DDPT supports the simplex mode only and connects to VAMA through the J3 connector on the VME rack where VAMA is located. The VAMA/DDPT meets environment rating for hazardous gases of Class I, Division 2 and provides suppression at all points of signal entry or exit. Each cable has a unique ID chip. The VAMA provides two point calibration, based on a reference offset and gain signal. Gas turbine combustion chambers can experience pressure oscillations that cause noise in the audible hearing range. The H1A version of the VAMA offers signal conditioning and software that allows the turbine control to monitor the pressure/acoustic waves by reading the conditioned signals from a dynamic pressure transducer. The VAMA provides two channels to read the pressure/acoustic wave signals from third party equipment from Vibro-Meter or Bently-Nevada*. VAMA provides two dedicated signal conditioning paths to remove the dc component of the signal, modify the gain, and provide an eighth order or better low-pass filter for antialiasing.
Installation
To install the V-type board 1 2 3 Power down the VME processor rack. Slide in the board and push the top and bottom levers in with your hands to seat its edge connectors. Tighten the captive screws at the top and bottom of the front panel. These screws serve to hold the board firmly in place and enhance the board front ground integrity. The screws should not be used to actually seat the board. Note Cable connections to the terminal board are made at the J3 connector on the lower portion of the VME rack, and the J5 connector on the front of the board. These are latching type connectors to secure the cables. Power up the VME rack and check the diagnostic lights at the top of the front panel. For details, refer to Diagnostics section in this document. It may be necessary to update the VAMA firmware to the latest level. For instructions, refer to GEH-6403, Control System Toolbox for Configuring the Mark VI Turbine Controller.
VAMA Acoustic Monitoring 59
Operation
Pressure/Acoustic Wave Signal Conditioning
VAMA provides signal conditioning for two pressure/acoustic wave inputs and can supply either 24 V dc to power the pressure sensing equipment. VAMA supports the following third party vendor equipment: Vibro-Meter Galvanic Separation Unit types GSI 1_ _ Bently-Nevada 86517 with modifications 142533 or 159840 charge amplifier Bently-Nevada dynamic pressure charge amplifier 350500 Note The Vibro-Meter GSI 1_ _ unit prevents problems due to voltage differences between the measuring point and signal processing (such as ground loops). The Vibro-Meter setup conditions a pico-coulomb output from a dynamic pressure transducer (Vibro-Meter CP216 or CP231) through a charge amplifier (Vibro-Meter IPC 704) with a current output representing approximately 125 A/psi. The GSI unit outputs an ac signal (approx. 2 V peak) that represents the dynamic pressure (gain expressed in mV/psi ) riding on top of a dc bias voltage of approximately +7 V dc. The Vibro-Meter GSI unit requires a +24 V dc power supply. Normally, the power supply return for the GSI is grounded externally and the PCOM on the terminal board is not used. PCOM should only be used when the external return ground is not used. The Bently-Nevada 86517 interface module converts the dynamic pressure transducer charge signal from pico-coulombs to milli-volts, which represents the pressure in psi. The interface module outputs ac signal (approx. 1.2 V peak) riding on top of a negative dc bias voltage of approximately -10 V dc. The Bently-Nevada unit requires a -24 V dc power supply.
VAMA/DDPT Vendor Equipment Power Supply Specifications
Vendor
Vibro-Meter
Power Supply
Positive 24 V dc
Nominal Voltage
+24 V dc (5%) -24 V dc (5%)
Nominal Current
0.04 A (0.02 A) 0.02 A (0.01 A)
Bently-Nevada Negative 24 V dc
The pressure/acoustic signal is read differentially by connecting the DDPT inputs, Pressure Wave Channel A High (ASIG) and Pressure Wave Channel A Low (ARET). Voltage clamping and high frequency suppression is applied on the DDPT before the signal is routed to the VAMA through the 37-pin cable to the J3 connector on the VME rack. The jumpers, JP1A/B and JP2A/B, are used to add a bias corresponding to the dc bias provided by the third party interface unit to detect open circuit conditions. Therefore, a +28 V dc bias is added for the Vibro-Meter connection and a -28 V dc bias is added for the Bently-Nevada system. The DDPT pressure wave outputs are ASIG/ARET for the output pair for channel A, and BSIG/BRET for the output pair for channel B.
Signal Conditioning for Fast Fourier Transform (FFT) Input

Note The FFT signal conditioning provides open-wire detection circuitry and any dc bias monitoring circuitry, if needed. The output from channel A and channel B feeds into a high-speed multiplexed A/D section.
60 VAMA Acoustic Monitoring
VAMA provides differential inputs for both channel A and B pressure wave signals. The signal conditioning includes a high pass filter, gain adjustment, and a low pass filter with adjustable break frequencies. The high-pass filter is a single pole filter (6 dB/octave) with a break at 1.5 Hz. The gain block provides two gain options, 2.25 or 4.5 V/V. The low pass filter is an eight-pole (48 dB/octave) Butterworth filter with three selectable break frequencies, 600, 1000, and 3600 Hz. The gain options and the low-pass filter break frequency adjustments are selectable through software.
Signal Conditioning for the RMS Circuit

VAMA provides an RMS rectifier circuit for both channel A and channel B pressure waves. Each circuit includes a high pass filter, a low pass filter, and the RMS detector. The band-pass filters are 260 to 970 Hz , before the detector and the RMS detector. The input signal range is from 0 to 10 psi peak-to-peak, which is represented by an ac signal with the scaling of 0.1 V/psi. The rms detector output from channel A and channel B feeds into a multiplexed A/D section.
BNC Signal Conditioning

VAMA provides a buffered signal conditioning circuit for each BNC output on the DDPT terminal board. The BNC buffered circuit takes its input from the ac pressure wave input without the dc bias signal. The gain of the buffer is 1. The signal for the buffered BNC output ranges from 0 to 40 psi peak-to-peak, which is represented by an ac signal with the scaling of 0.1 V/psi.
26 27 30 31 1
+24V
BNCASIG BNCARET BNCBSIG BNCBRET
DDPT
Channel A
AP24V S
Vout
Current P28 Limiter
Vibro-meter GSI 1XX

0V
Normally the Vibro-meter or B-N will have pwr supply return gnded externally. If DDPT PCOM is used, make sure that ext. gnd is removed.
JR1 P28 N28 ATBJMPRPOS BTBJMPRPOS 1,18 20 15 3
ASIG S
External Gnd Bently-Nevada

N24 Sig. N24 Com
ARET S
RET
JP2
OPEN
NC JP_A
P28 N28 B_N V_M
PCOM 4 AN24V S
Current N28 Limiter
86517 w Modxxx or 350500 External Gnd
2,17, PCOM 21 SIGCOMR 36 BRD_IDR1 37 38 39
SCOM Serial EPROM

B_N P28 N28
Channel B
9
+24V
JP_B
Current Limiter P28
V_M
BP24V S
Serial EPROM CBLJ5_ID JR5 SIGCOMR 4 5 1 9 3 11 6 13 8 15 16 17
Vibro-meter
Vout
GSI 1XX
0V
10
BSIG S
External Gnd Bently-Nevada

N24 Sig. N24 Com
11
BRET S
RET
JP4
OPEN
ASIG ARET NC BNC_A BSIG BRET BNCASIG BNCARET BNCBSIG BNCBRET S S
PCOM 12 BN24V S
Current Limiter
86517 w Modxxx or 350500
BNC_B S S
N28 19, 21, 37, 39, 41 20, 22, 38, 40, 42 SCOM
SCOM
DDPT Board Block Diagram
DDPT Hardware Configuration Constants
VAMA Hardware
VAMA Firmware for FFT
Signal Space
P W F A H
P28
N28
HighValue HighInput LowValue LowInput

Fc Table Lookup
FFTFreqRange WindowSelect BinReject
Signal Cond. for FFT Calc. of Input Gpw = 1, 2.25 or 4.5 F_lp = 600, 1k or 3.6k hz Slope >= -48 dB / oct F_hp = 1.5 hz, 6 dB/oct. FAST A/D Fs Table Lookup Magnitude & Frequency F F T CALC. for each FFT Element 8192 Samples (Used by FFT Calc.)
mV to Eng. Units Conv.
FminFrqband1 FmaxFrqband1 FminFrqband2 FmaxFrqband2 FminFrqband3 FmaxFrqband3
PW1MagFb1ChA PW2MagFb1ChA PW3MagFb1ChA PW1FrqFb1ChA PW2FrqFb1ChA PW3FrqFb1ChA
P W F A L
P28
N28
Fs Table Lookup
A P 2 4 V
True RMS Detector Grms = 2.25 F_hp = 260 hz, 36 dB/oct F_lp = 970 hz, -36 dB/oct D M A 8192 Samples (DMA updating)
SORT by Magnitude of Spectrum defined by Freq. Band (3 largest Pressure Wave Mags. & Freqs for 3 ranges) RMS Calc. per FFT Output Data
PW1MagFb2ChA PW2MagFb2ChA PW3MagFb2ChA PW1FrqFb2ChA PW2FrqFb2ChA PW3FrqFb2ChA
I Lim Input DC Bias Monitor

P 2 8
S e L 1 2 3 4 5 6 7
Windowing Function Default Value for Rejected Type Side Bins Rectangular 3 Hamming 3 Hanning 3 Triangular 3 Blackman 3 Blackman-Harris 3 Flat Top 4
PW1MagFb3ChA PW2MagFb3ChA PW3MagFb3ChA PW1FrqFb3ChA PW2FrqFb3ChA PW3FrqFb3ChA PW_RMStotChA PW_RMSFb1ChA PW_RMSFb2ChA PW_RMSFb3ChA RMS Calc. per FFT Input Data PW_RMSBB_ChA ASIG BSIG RMS Calc. per FFT Input Data PW_RMSBB_ChB RMS Calc. per FFT Output Data SORT PW_RMStotChB PW_RMSFb1ChB PW_RMSFb2ChB PW_RMSFb3ChB Magnitude & Frequency
B P 2 4 V
+ Open Wire Detection

Open Wire Detection & Input DC Bias Monitor for Pressure Wave Signals

- Open Wire Detection M U X A/ D
From True RMS Detector mV to Eng. Units Conv.
S L O W
HighValue2 HighInput2 LowValue2 LowInput2 Configuration Constants
- Open Wire Detection
VAMA/DDPT Block Diagram

+ Open Wire Detection Input DC Bias Monitor
N 2 8
A N 2 4 V
I Lim True RMS Detector Grms = 2.25 F_hp = 260 hz, 36 dB/oct F_lp = 970 hz, -36 dB/oct D M A
B N 2 4 V
8192 Samples (Used by FFT Calc.) 8192 Samples (DMA updating)
mV to Eng. Units Conv.
F F T
CALC. for each FFT Element Fs Table Lookup
by Magnitude of Spectrum defined by Freq. Band (3 largest Pressure Wave Mags. & Freqs for 3 ranges)
S e L 1 2 3 4 5 6 7 FAST A/D Fs Table Lookup Fc Table Lookup
Windowing Function Default Value for Rejected Type Side Bins Rectangular 3 Hamming 3 Hanning 3 Triangular 3 Blackman 3 Blackman-Harris 3 Flat Top 4
PW1MagFb1ChB PW2MagFb1ChB PW3MagFb1ChB PW1FrqFb1ChB PW2FrqFb1ChB PW3FrqFb1ChB
P28
N28
P W F B L
Signal Cond. for FFT Calc. of Input Gpw = 1, 2.25 or 4.5 F_lp = 600, 1k or 3.6k hz Slope >= -48 dB / oct F_hp = 1.5 hz, 6 dB/oct.
WindowSelect BinReject
P W F B H
P28
N28
FminFrqband1 FmaxFrqband1 FFTFreqRange FminFrqband2 FmaxFrqband2 FminFrqband3 FmaxFrqband3 HighValue HighInput LowValue LowInput
Configuration Constants
PW1MagFb2ChB PW2MagFb2ChB PW3MagFb2ChB PW1FrqFb2ChB PW2FrqFb2ChB PW3FrqFb2ChB PW1MagFb3ChB PW2MagFb3ChB PW3MagFb3ChB PW1FrqFb3ChB PW2FrqFb3ChB PW3FrqFb3ChB
Pressure/Acoustic Wave FFT Algorithms

The firmware performs a spectral analysis of the pressure wave to determine the spectral components with the largest magnitude and the frequency associated with each magnitude. The local sort function sorts the three largest magnitudes for a given frequency band. The FFT algorithm supports three frequency bands. Note The magnitude and frequency information for each spectral component that meets the criteria of the sorts is stored in Signal Space for the VAMA memory space. Discontinuities at the beginning and end of the 8192 collected data points of the pressure wave produce high frequency components that alias down into the spectrum of interest. Using a Windowing function on the data attenuates the high frequency components. The user can select from seven different windowing functions that affect spectral content of these high frequency components. An FFT is performed on the windowed data to determine the spectral components magnitude and the frequency associated with it. A Global Sort function ranks the spectral components from the largest in magnitude to the smallest. Then a Local Sort function selects the three largest magnitudes and their associated frequencies for a frequency band defined by the user. The composite pressure wave signal that includes both the ac and dc offset component of the signal is read by the slow A/D on VAMA. Firmware monitors this signal to perform continuity and out of range checks. The pressure wave has a normal operating range of 1 psi with the trip level set at 2 psi. The FFT magnitude is significantly attenuated when spectral content is off the bin center. Attenuation factor (approx. 0.6 to 0.9) is determined by the Windowing technique used.
Functions
Windowing Function The Windowing function provides a way to reduce the false spectral components caused by the beginning and ending points of the 8192 data points collected. The discontinuities caused by the end point data produces high frequency components that alias down into the frequency spectrum of interest. Each windowing function affects the magnitude and spectral leakage. Seven windowing techniques are provided, as follows: Rectangular Hamming Hanning Triangular Blackman Blackman-Harris Flat Top
The configuration constant, WindowSelect, is the window select control for both channel A and channel B pressure waves. The configuration constant, BinReject, determines the number of side bins rejected from a spectral peak found in the FFT analysis. BinReject controls the number of side bins removed from the FFT analysis for both channel A and B. An FFT is performed on the windowed data to determine the spectral content of the pressure wave. The power is calculated for each FFT element and the magnitude and frequency are calculated from the power. The windowing type and the associated sideband rejection are shown in the following table.
Windowing Selections and Parameters
Selection
Function
Rejected Sidebands (Default)
1 2 3 4 5 6 7
Rectangular Hamming Hanning Triangular Blackman Blackman-Harris Flat Top
3 3 3 3 3 3 4
Sort Function
The Sort function tests for the three largest FFT element magnitudes in a user specified frequency band. The user can specify up to three frequency bands with three magnitudes and associated frequency for each stored in signal space. The following table defines the user defined configuration constants, FminFrqbandx and FmaxFrqbandx, that are supported by the Sort function. The firmware provides separate scaling for channel A and B and defines the transfer function from two given points.
Signal Space Variables to Support Pressure Wave FFT Algorithm
Variable
Description
Units
Min.
Max.
PW1MagFb1ChA PW2MagFb1ChA PW3MagFb1ChA PW1MagFb2ChA PW2MagFb2ChA PW3MagFb2ChA PW1MagFb3ChA PW2MagFb3ChA PW3MagFb3ChA PW1MagFb1ChB PW2MagFb1ChB PW3MagFb1ChB PW1MagFb2ChB PW2MagFb2ChB PW3MagFb2ChB PW1MagFb3ChB PW2MagFb3ChB PW3MagFb3ChB
Pressure wave 1 magnitude in frequency band 1 of ChA Pressure wave 2 magnitude in frequency band 1 of ChA Pressure wave 3 magnitude in frequency band 1 of ChA Pressure wave 1 magnitude in frequency band 2 of ChA Pressure wave 2 magnitude in frequency band 2 of ChA Pressure wave 3 magnitude in frequency band 2 of ChA Pressure wave 1 magnitude in frequency band 3 of ChA Pressure wave 2 magnitude in frequency band 3 of ChA Pressure wave 3 magnitude in frequency band 3 of ChA Pressure wave 1 magnitude in frequency band 1 of ChB Pressure wave 2 magnitude in frequency band 1 of ChB Pressure wave 3 magnitude in frequency band 1 of ChB Pressure wave 1 magnitude in frequency band 2 of ChB Pressure wave 2 magnitude in frequency band 2 of ChB Pressure wave 3 magnitude in frequency band 2 of ChB Pressure wave 1 magnitude in frequency band 3 of ChB Pressure wave 2 magnitude in frequency band 3 of ChB Pressure wave 3 magnitude in frequency band 3 of ChB
EU EU EU EU EU EU EU EU EU EU EU EU EU EU EU EU EU EU
-3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38
-3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38 -3.4e+38
Determination of Fc and Fs
The following table is used to determine the filter break frequency for the eighth order Butterworth filter for each channel of the pressure wave signal conditioning (ac out). It is also used to derive the sample frequency for the fast A/D and the FFT algorithm sample frequency. The configuration constant used as the input to the lookup table is the constant FFTFrqRngChA for channel A and FFTFrqRngChB for channel B.
Fc and Fs Determination
FFTFrqRngChA or FFTFrqRngChB
FFT Frequency Range of Interest (Hz)
Sample Frequency, Fs (Hz)
Bin Resolution (Hz)
Update Rate (seconds)
260_970HzBPF 600Hz_LPF 1000Hz_LPF 3600Hz_LPF 260/970HzDBP
260 970 1.5 600 1.5 1000 1.5 3600 260 970
12000 12000 12000 12000 12000
1.46 1.46 1.46 1.46 1.46
0.68 0.68 0.68 0.68 0.68
Display Format of the Data Through TelNet

The following figure shows a portion of the TelNet display for pressure wave channels 1 and 2. The display shows the bin center frequency with the magnitude of the spectral content in peak voltage and psi.
TelNet Display Example of FFT Magnitudes over Frequency Range
VAMA Card's Power Spectrum Screen
Frequency
Transducer 1
MAGN (Vpk) MAGN (PSI) 0.0015481 0.0018366 0.0009238 0.0007519 0.0006848 0.0004188 | v
Transducer 2
MAGN (Vpk) 0.0119116 0.0106850 0.0037215 0.0025366 0.0021200 0.0013643 | v MAGN (PSI) 0.1191164 0.1068505 0.0372151 0.0253656 0.0212001 0.0136432 | v
0.000 1.465 2.930 4.930 5.860 7.325 | v
0.0001548 0.0001836 0.0000924 0.0000752 0.0000685 0.0000419 | v
The following figure shows the TelNet screen for transducer channels A and B. The display provides up to three frequency bands defined by configuration constants and outputs the three largest peaks in each frequency band.
TelNet Display Example of FFT Magnitudes over Frequency Range
Signal Space Input
Transducer Channel
CH A MAG (PSI) 5 <= FREQ BAND1 <= 500Hz 1st Highest Peak 2nd Highest Peak 3rd Highest Peak 500 <= FREQ BAND2 <= 1000Hz 1st Highest Peak 2nd Highest Peak 3rd Highest Peak 0.534 0.214 0.102 FREQ (HZ) 58.6 102.55 139.18
CH B MAG (PSI) 0.521 0.204 0.112 FREQ (HZ) 60.07 101.09 137.71
0.211 0.142 0.087
586 732.5 879
0.227 0.135 0.079
586 733.97 879
1000 <= FREQ BAND1 <= 3000Hz 1st Highest Peak 0.334 2nd Highest Peak 0.134 3rd Highest Peak 0.076
1465 1611.5 2197.75
0.317 0.128 0.055
1465 1612.96 2199.22
RMS Peak-to-Peak Calculator

The VAMA firmware includes an rms peak-to-peak calculator for both channel A and channel B signals from the true rms detector. The calculator multiplies the dc rms value read in by 2.828 to convert the A/D reading back to a peak-to-peak value.
Signal Space Variables to Support Pressure Wave FFT
Variable
Description
Units
Min.
Max.
PW_RMStotChA PW_RMSFb1ChA PW_RMSFb2ChA PW_RMSFb3ChA PW_RMStotChB PW_RMSFb1ChB PW_RMSFb2ChB PW_RMSFb3ChB
Channel A pressure wave total rms value Channel A pressure wave rms value in frequency band 1 Channel A pressure wave rms value in frequency band 2 Channel A pressure wave rms value in frequency band 3 Channel B pressure wave total rms value Channel B pressure wave rms value in frequency band 1 Channel B pressure wave rms value in frequency band 2 Channel B pressure wave rms value in frequency band 3
psi psi psi psi psi psi psi psi
0 0 0 0 0 0 0 0
3.54 3.54 3.54 3.54 3.54 3.54 3.54 3.54
Specification
Item Specification
Number of Transducers
Two, either: Vibro-Meter Galvanic separation Unit types GSI 1_ _ Bentley-Nevada 86517, 142533, or 159840 charge amplifier Bentley-Nevada 350500 dynamic pressure charge amplifier
Transducer Power Supply Buffered signal outputs Pressure wave magnitude range Pressure wave frequency range Maximum FFT sampling frequency FFT record length
Vibro-Meter:
Positive 24 V dc, current of 0.04 A nominal
Bentley-Nevada: Negative 24 V dc, current of 0.02 A nominal Two channels with ac component only, 0.1 V/psi, available at BNC outputs on DDPT Mag.min = -14 psi Mag.max = +14 psi Fmin = 1.5 Hz Fmax = 3600 Hz F = 12000 Hz 8192 (3) (3) (3) (3) (4)
Windowing techniques Rectangular supported (side-band rejection) Hamming Hanning (3) Triangular Blackman Flat Top Format for magnitudes and associated frequencies. Display of full FFT spectrum results
Blackman-Harris (3) Configurable frequency bands with three peaks per band Telnet display
Diagnostics
Three LEDs at the top of the VAMA front panel provide status information. The normal RUN condition is a flashing green, FAIL is a solid red. The third LED is STATUS and is normally off but shows a steady orange if a diagnostic alarm condition exists in the board. VAMA runs continuous diagnostic tests on the signals and hardware. Variables checked include transducer open wire, DAC bias voltage, differential amplifier output voltage, FFT ac gain corrections, FFT LPF, gain and frequency settings, FFT and RMS frequency ranges, gain and frequency settings, and FFT A/D bit integrity (peak bin counts). If any of these go outside of configured limits, VAMA creates a fault. Refer to the Alarms section for a complete list of faults (diagnostic alarms).
Configuration
Like all I/O boards, VAMA is configured using the toolbox. This software usually runs on a data-highway connected CIMPLICITY station or workstation. The following tables summarize the configuration choices and defaults. For details, refer to GEH-6403, Control System Toolbox for the Mark VI Turbine Controller.
Configuration Constant Name Description Units Min. Max.
High_Input2
Defines the X-axis value in millivolts for point 2 that is used in calculating the gain and offset for the conversion to engineering units for channel A for the rms circuit Defines the Y-axis value in engineering units for point 2 that is used in calculating the gain and offset for the conversion from millivolts to engineering units for rms circuit channel A Defines the X-axis value in millivolts for point 1 that is used in calculating the gain and offset for the conversion to engineering units for rms circuit channel A Defines the Y-axis value in engineering units for point 1 that is used in calculating the gain and offset for the conversion from millivolts to engineering units for rms circuit channel A
mV
-10000
10000
High_Value2
E.U.
-3.4e+38
3.4e+38
Low_Input2
mV
-10000
10000
Low_Value2
E.U.
-3.4e+38
3.4e+38
Configuration Constants to Support Pressure Wave FFT Algorithm
Configuration Constant Name
Description
Units
Min.
Max.
BinReject FFTFreqRange
Defines the number of side bins that will be rejected for the FFT results for both channel A and B. 0 = no bins rejected FFT frequency range (3db points) for both channel A and B. The selections are: 260_970HzBPF (0.0) - 260 to 970 Hz analog band pass filter 600Hz_LPF (600.0) - 600 Hz analog Low Pass filter 1000Hz_LPF (1000.0) - 1000 Hz analog Low Pass filter 3600Hz_LPF (3600.0) - 3600 Hz analog Low Pass filter 260/970HzDBP (260) - 260 to 970 Hz Digital Band pass filter
None None
0 600 Hz
5 3600 Hz
FminFrqband1 FmaxFrqband1 FminFrqband2 FmaxFrqband2
Minimum frequency for frequency band 1 in both channel A and B Maximum frequency for frequency band 1 in both channel A and B Minimum frequency for frequency band 2 in both channel A and B Maximum frequency for frequency band 2 in both channel A and B
Hz Hz Hz Hz
0 0 0 0
3600 3600 3600 3600
Configuration Constant Name
Description
Units
Min.
Max.
FminFrqband3 FmaxFrqband3 High_Input
Minimum frequency for frequency band 3 in both channel A and B Maximum frequency for frequency band 3 in both channel A and B Defines the X-axis value in millivolts for point 2 that is used in calculating the gain and offset for the conversion to engineering units for channel A and B Defines the Y-axis value in engineering units for point 2 that is used in calculating the gain and offset for the conversion from millivolts to engineering units for channel A and B Defines the X-axis value in millivolts for point 1 that is used in calculating the gain and offset for the conversion to engineering units for ch A and B Defines the Y-axis value in engineering units for point 1 that is used in calculating the gain and offset for the conversion from millivolts to engineering units for channel A and B Minimum millivolts that defines the lower out of range point for the pressure wave input Maximum millivolts that defines the upper out of range point for the pressure wave input Selects the Windowing function to be used on the sampled data for both Channel A and B: 1 = Rectangular 2 = Hamming 3 = Hanning 4 = Triangular 5 = Blackman 6 = Blackman-Harris 7 = Flat Top
Hz Hz mV
0 0 -10000
3600 3600 10000
High_Value
E.U.
-3.4 e+038
3.4 e+038
Low_Input
mV
-10000
10000
Low_Value
E.U.
-3.4 e+038
3.4 e+038
Min_mV_Input Max_mV_Input WindowSelect
mV mV None
-10000 -10000 1
10000 10000 7
Alarms
Fault Description Possible Cause
ASIG Open Wire Detection V dc ARET Open Wire Detection V dc Possible Cause BSIG Open Wire Detection V dc BRET Open Wire Detection V dc Chan A DAC Bias V dc Chan B DAC Bias V dc Chan A Diff Amp Out V dc Chan B Diff Amp Out V dc Chan A FFT Filtered Null Counts Chan B FFT Filtered Null Counts Chan A FFT Filtered Reference Counts Chan B FFT Filtered Reference Counts Chan A (Slow) Filtered RMS Null Counts Chan B (Slow) Filtered RMS Null Counts Chan A (Slow) Filtered RMS Reference Counts Chan B (Slow) Filtered RMS Reference Counts Chan A FFT Null Chan B FFT Null Counts Chan A FFT Reference Counts Chan B FFT Reference Counts Chan A (Slow) RMS Null Counts Chan B (Slow) RMS Null Counts
Terminal board or cable problem Terminal board or cable problem Terminal board or cable problem Terminal board or cable problem Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure
Fault Description
Possible Cause
Chan A (Slow) RMS Reference Counts Chan B (Slow) RMS Reference Counts Ch A FFT AC Gain Corr LPF=600 Hz Gain=4.5 Freq=300 Ch B FFT AC Gain Corr LPF=600 Hz Gain=4.5 Freq=300 Ch A FFT AC Gain Corr LPF=1 kHz Gain=4.5 Freq=600 Ch B FFT AC Gain Corr LPF=1 kHz Gain=4.5 Freq=600 Ch A FFT AC Gain Corr LPF=3.6 kHz Gain=4.5 Freq=2160 Ch B FFT AC Gain Corr LPF=3.6 kHz Gain=4.5 Freq=2160 Ch A FFT AC Gain Corr 260_970 Hz Gain=2.25 Freq=600 Ch B FFT AC Gain Corr 260_970 Hz Gain=2.25 Freq=600 Slow Ch A RMS Gain Corr 270_970 Hz Gain=4.5 Freq=600 Slow Ch B RMS Gain Corr 270_970 Hz Gain=4.5 Freq=600 CHAN A FFT LPF=3.6 kHz Gain=4.5 Freq=0 CHAN B FFT LPF=3.6 kHz Gain=4.5 Freq=0 CHAN A FFT LPF=600 Hz Gain=1.0 Freq=300 CHAN B FFT LPF=600 Hz Gain=1.0 Freq=300 CHAN A FFT LPF=600 Hz Gain=2.25 Freq=300 CHAN B FFT LPF=600 Hz Gain=2.25 Freq=300 CHAN A FFT LPF=600 Hz Gain=4.5 Freq=300 CHAN B FFT LPF=600 Hz Gain=4.5 Freq=300 CHAN A FFT LPF=1 kHz Gain=4.5 Freq=600 CHAN B FFT LPF=1 kHz Gain=4.5 Freq=600 CHAN A FFT LPF=3.6 kHz Gain=4.5 Freq=2160 CHAN B FFT LPF=3.6 kHz Gain=4.5 Freq=2160 CHAN A FFT LPF=3.6 kHz Gain=4.5 Freq=600 CHAN B FFT LPF=3.6 kHz Gain=4.5 Freq=600 CHAN A FFT LPF=600 Hz Gain=4.5 Freq=706 12db CHAN B FFT LPF=600 Hz Gain=4.5 Freq=706 12db CHAN A FFT LPF=1 kHz Gain=4.5 Freq=1192 12db CHAN B FFT LPF=1 kHz Gain=4.5 Freq=1192 12db CHAN A FFT LPF=3.6 kHz Gain=4.5 Freq=3854 6db CHAN B FFT LPF=3.6 kHz Gain=4.5 Freq=3854 6db CHAN A FFT LPF=600 Hz Gain=4.5 Freq=5 3db CHAN B FFT LPF=600 Hz Gain=4.5 Freq=5 3db CHAN A FFT LPF=600 Hz Gain=2.25 Freq=600 3db CHAN B FFT LPF=600 Hz Gain=2.25 Freq=600 3db CHAN A FFT LPF=1 kHz Gain=2.25 Freq=1000 3db CHAN B FFT LPF=1 kHz Gain=2.25 Freq=1000 3db CHAN A FFT LPF=3.6 kHz Gain=2.25 Freq=3600 3db CHAN B FFT LPF=3.6 kHz Gain=2.25 Freq=3600 3db CHAN A FFT 260-970 Hz Gain=2.25 Freq=400 CHAN A RMS 260-970 Hz Gain=2.25 Freq=400 CHAN B FFT 260-970Hz Gain=2.25 Freq=400 CHAN B RMS 260-970 Hz Gain=2.25 Freq=400 CHAN A FFT 260-970 Hz Gain=2.25 Freq=600 CHAN A RMS 260-970 Hz Gain=2.25 Freq=600 CHAN B FFT 260-970 Hz Gain=2.25 Freq=600 CHAN B RMS 260-970 Hz Gain=2.25 Freq=600
Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure
Fault Description
Possible Cause
CHAN A FFT 260-970 Hz Gain=2.25 Freq=235 3db CHAN A RMS 260-970 Hz Gain=2.25 Freq=235 3db CHAN B FFT 260-970 Hz Gain=2.25 Freq=235 3db CHAN B RMS 260-970 Hz Gain=2.25 Freq=235 3db CHAN A FFT 260-970 Hz Gain=2.25 Freq=220 9db CHAN A RMS 260-970 Hz Gain=2.25 Freq=220 9db CHAN B FFT 260-970 Hz Gain=2.25 Freq=220 9db CHAN B RMS 260-970 Hz Gain=2.25 Freq=220 9db CHAN A FFT 260-970 Hz Gain=2.25 Freq=205 15db CHAN A RMS 260-970 Hz Gain=2.25 Freq=205 15db CHAN B FFT 260-970 Hz Gain=2.25 Freq=205 15db CHAN B RMS 260-970 Hz Gain=2.25 Freq=205 15db CHAN A FFT 260-970 Hz Gain=2.25 Freq=1065 3db CHAN A RMS 260-970 Hz Gain=2.25 Freq=1065 3db CHAN B FFT 260-970 Hz Gain=2.25 Freq=1065 3db CHAN B RMS 260-970 Hz Gain=2.25 Freq=1065 3db CHAN A FFT 260-970 Hz Gain=2.25 Freq=1150 9db CHAN A RMS 260-970 Hz Gain=2.25 Freq=1150 9db CHAN B FFT 260-970 Hz Gain=2.25 Freq=1150 9db CHAN B RMS 260-970 Hz Gain=2.25 Freq=1150 9db CHAN A FFT 260-970 Hz Gain=2.25 Freq=1235 15db CHAN A RMS 260-970 Hz Gain=2.25 Freq=1235 15db CHAN B FFT 260-970 Hz Gain=2.25 Freq=1235 15db CHAN B RMS 260-970 Hz Gain=2.25 Freq=1235 15db CHAN A FFT 260-970 Hz Gain=2.25 Freq=130 <36db CHAN A RMS 260-970 Hz Gain=2.25 Freq=130 <36db CHAN B FFT 260-970 Hz Gain=2.25 Freq=130 <36db CHAN B RMS 260-970 Hz Gain=2.25 Freq=130 <36db CHAN A FFT 260-970 Hz Gain=2.25 Freq=250 CHAN A RMS 260-970 Hz Gain=2.25 Freq=250 CHAN B FFT 260-970 Hz Gain=2.25 Freq=250 CHAN B RMS 260-970 Hz Gain=2.25 Freq=250 CHAN A FFT 260-970 Hz Gain=2.25 Freq=260 CHAN A RMS 260-970 Hz Gain=2.25 Freq=260 CHAN B FFT 260-970 Hz Gain=2.25 Freq=260 CHAN B RMS 260-970 Hz Gain=2.25 Freq=260 CHAN A FFT 260-970 Hz Gain=2.25 Freq=270 CHAN A RMS 260-970 Hz Gain=2.25 Freq=270 CHAN B FFT 260-970 Hz Gain=2.25 Freq=270 CHAN B RMS 260-970 Hz Gain=2.25 Freq=270 CHAN A FFT 260-970 Hz Gain=2.25 Freq=930 CHAN A RMS 260-970 Hz Gain=2.25 Freq=930 CHAN B FFT 260-970 Hz Gain=2.25 Freq=930 CHAN B RMS 260-970 Hz Gain=2.25 Freq=930 CHAN A FFT 260-970 Hz Gain=2.25 Freq=950 CHAN A RMS 260-970 Hz Gain=2.25 Freq=950 CHAN B FFT 260-970 Hz Gain=2.25 Freq=950 CHAN B RMS 260-970 Hz Gain=2.25 Freq=950
Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure
Fault Description
Possible Cause
CHAN A FFT 260-970 Hz Gain=2.25 Freq=970 CHAN A RMS 260-970 Hz Gain=2.25 Freq=970 CHAN B FFT 260-970 Hz Gain=2.25 Freq=970 CHAN B RMS 260-970 Hz Gain=2.25 Freq=970 CHAN A FFT 260-970 Hz Gain=2.25 Freq=990 CHAN A RMS 260-970 Hz Gain=2.25 Freq=990 CHAN B FFT 260-970 Hz Gain=2.25 Freq=990 CHAN B RMS 260-970 Hz Gain=2.25 Freq=990 CHAN A FFT 260-970 Hz Gain=2.25 Freq=1000 CHAN A RMS 260-970 Hz Gain=2.25 Freq=1000 CHAN B FFT 260-970 Hz Gain=2.25 Freq=1000 CHAN B RMS 260-970 Hz Gain=2.25 Freq=1000 CHAN A FFT 260-970 Hz Gain=2.25 Freq=1940 <36db CHAN A RMS 260-970 Hz Gain=2.25 Freq=1940 <36db CHAN B FFT 260-970 Hz Gain=2.25 Freq=1940 <36db CHAN B RMS 260-970 Hz Gain=2.25 Freq=1940 <36db CHAN A FFT 260-970 Hz Gain=2.25 Freq=600 50% CHAN A RMS 260-970 Hz Gain=2.25 Freq=600 50% CHAN B FFT 260-970 Hz Gain=2.25 Freq=600 50% CHAN B RMS 260-970 Hz Gain=2.25 Freq=600 50% CHAN A FFT 260-970 Hz Gain=2.25 Freq=600 25% CHAN A RMS 260-970 Hz Gain=2.25 Freq=600 25% CHAN B FFT 260-970 Hz Gain=2.25 Freq=600 25% CHAN B RMS 260-970 Hz Gain=2.25 Freq=600 25% CHAN A FFT 260-970 Hz Gain=2.25 Freq=600 12.5% CHAN A RMS 260-970 Hz Gain=2.25 Freq=600 12.5% CHAN B FFT 260-970 Hz Gain=2.25 Freq=600 12.5% CHAN B RMS 260-970 Hz Gain=2.25 Freq=600 12.5% CHAN A FFT 260-970 Hz Gain=2.25 Freq=0 0% CHAN A RMS 260-970 Hz Gain=2.25 Freq=0 0% CHAN B FFT 260-970 Hz Gain=2.25 Freq=0 0% CHAN B RMS 260-970 Hz Gain=2.25 Freq=0 0% Chan A Dac Bias V dc Set to 0.0V dc Chan B Dac Bias V dc Set to 0.0V dc Chan A Dac Bias V dc Set to 1.0V dc Chan B Dac Bias V dc Set to 1.0V dc Chan A Dac Bias V dc Set to 1.0V dc Chan B Dac Bias V dc Set to 1.0V dc FFT Chan A A/D Bit Integrity - Peak bin cnts 80-100Hz FFT Chan B A/D Bit Integrity - Peak bin cnts 80-100Hz
Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure Board failure
DDPT Simplex Dynamic Pressure Transducer Input

The Simplex Dynamic Pressure Transducer Input (DDPT) terminal board is a compact acoustic terminal board for DIN-rail mounting. The board accepts two pressure transducers for monitoring pressure waves in gas turbine combustion chambers, using either Vibro-Meter or Bently Nevada* transducers. It connects to the VAMA with two cables, and is designed to meet Class 1, Division 2 environmental requirements for hazardous gases. Note DDPT is only available in a simplex version.
Installation
Mount the plastic holder on the DIN-rail and slide the DDPT board into place. Connect the wires for the pressure transducers to the permanently mounted EuroBlock type terminal block, which has 42 terminals. Typically #18 AWG shielded twisted triplet wiring is used. Ten screws are provided for the SCOM (ground) connection.
Connect cables from the DDPT JR1 connector to the VAMA J3 connector on the lower portion of the VME rack, and from DDPT JR5 connector to the J5 connector on the front panel of the VAMA. These are latching type connectors to secure the cables.
37-pin "D" shell connector with latching fasteners JR1
DDPT Terminal Board
Cable to J3 connector in I/O rack for VAMA board or Plug in PAMA I/O Pack
Cable to J5 connector on front panel of VAMA board
Screw Connections TB1 1 2 ASIG JP2 3 AN24V 4 RET 5 6 7 OPEN 8 9 BSIG 10 11 BN24V 12 13 JP4 14 15 RET 16 17 18 OPEN 19 SCOM 20 21 SCOM 22 23 24 25 BNCASIG 26 27 28 JR5 29 BNCBSIG 30 JPA 31 32 V_M 33 34 35 B_N 36 37 SCOM 38 39 JPB SCOM 40 41 V_M SCOM 42
B_N
Screw Connections AP24 ARET PCOM BP24V BRET PCOM
SCOM SCOM BNCARET BNCBRET
SCOM SCOM SCOM Euro-Block type terminal block
SCOM BNC B BNC A
Plastic mounting holder DIN-rail mounting

DDPT Wiring and Cabling
Buffered outputs from transducers A and B
Operation
VAMA supplies a 24 V dc to the DDPT to power the pressure sensing equipment. VAMA/DDPT supports the following third party vendor equipment: Vibro-Meter Galvanic Separation Unit types GSI 1_ Bently-Nevada 86517 with modifications 142533 or 159840 charge amplifier Bently-Nevada dynamic pressure charge amplifier 350500.
Note The Vibro-Meter GSI 1_ _ unit prevents problems due to voltage differences between the measuring point and signal processing (such as ground loops).
The Vibro-Meter GSI setup conditions a pico-coulomb output from a dynamic pressure transducer (Vibro-Meter CP216 or CP231) through a charge amplifier (Vibro-Meter IPC 704) with a current output representing approximately 125 A/psi. The GSI unit provides an output ac signal (approx. 2 V peak) that represents the dynamic pressure (gain expressed in mV/psi ) riding on top of a dc bias voltage of approximately +7 V dc. The GSI unit requires a +24 V dc power supply. Normally, the power supply return for the GSI is grounded externally and the PCOM on the terminal board is not used. PCOM should only be used when the external return ground is not used. The Bently-Nevada 86517 interface module converts the dynamic pressure transducer charge signal from pico-coulombs to milli-volts which represents the pressure in psi. The interface module outputs an ac signal (approx. 1.2 V peak) riding on top of a negative dc bias voltage of approximately 10 V dc. The BentlyNevada unit requires a -24 V dc power supply.
DDPT Vendor Equipment Power Supply Specifications
Vendor
Power Supply
Nominal Voltage
Nominal Current
Vibro-Meter Bently-Nevada
Positive 24 V dc Negative 24 V dc
+24 V dc (5%) -24 V dc (5%)
0.04 A (0.02 A) 0.02 A (0.01 A)
The pressure/acoustic signal is read differentially by connecting Pressure Wave Channel A High (ASIG) and Pressure Wave Channel A Low (ARET) to the DDPT inputs. Voltage clamping and high frequency suppression is applied on the DDPT before the signal is routed to VAMA. The jumpers, JPA and JPB, are used to add a bias corresponding to the dc bias provided by the third party interface unit to detect open circuit conditions. Therefore, a +28 V dc bias is added for the Vibro-Meter connection and a -28 V dc bias is added for the Bently-Nevada system. The DDPT board pressure wave outputs are ASIG/ARET for the output pair for channel A and BSIG/BRET for the output pair for channel B. VAMA provides a buffered signal conditioning circuit for each BNC output on the DDPT terminal board. The BNC buffered circuit takes its input from the ac pressure wave input without the dc bias signal. The gain of the buffer is 1. The signal for the buffered BNC output ranges from 0 to 40 psi peak-to-peak, which is represented by an ac signal with the scaling of 0.1 V/psi.
26 27 30 31 1
+24V
BNCASIG BNCARET BNCBSIG BNCBRET
DDPT
Channel A
AP24V S
Vout
Current P28 Limiter
Vibro-meter GSI 1XX

0V
External Gnd Bently-Nevada 86517 w Modxxx or 350500 External Gnd

N24 Sig. N24 Com
Normally the Vibro-meter or B-N will have pwr supply return gnded P28 externally. If DDPT PCOM is used, make sure that ext. gnd is removed. N28 ASIG ATBJMPRPOS S BTBJMPRPOS
ARET S
RET
JR1
1,18 20 15 3
JP2
OPEN
NC JP_A
P28 N28 B_N V_M
PCOM 4 AN24V S
Current N28 Limiter
2,17, PCOM 21 SIGCOMR 36 BRD_IDR1 37 38 39
SCOM Serial EPROM

B_N P28 N28
Channel B
9
+24V
JP_B
Current Limiter P28
V_M
BP24V S
Serial EPROM CBLJ5_ID
Vibro-meter
Vout
GSI 1XX
0V
10
BSIG
JR5
SIGCOMR ASIG ARET 4 5 1 9 3 11 6 13 8 15 16 17
S External Gnd Bently-Nevada 86517 w Modxxx or 350500

N24 Sig. N24 Com
11
BRET S
RET
JP4
OPEN
NC BNC_A
BSIG BRET BNCASIG BNCARET BNCBSIG BNCBRET S S
PCOM 12 BN24V S
Current Limiter
BNC_B S S
19, 21, 37, 39, 41 20, 22, 38, 40, 42 SCOM
N28
SCOM
DDPT Board Block Diagram
Specifications
Item Specification
Number of Transducers
Two, either: Vibro-Meter Galvanic separation Unit types GSI 1_ _, or Bentley-Nevada 86517, 142533, or 159840 charge amplifier, or Bentley-Nevada 350500 dynamic pressure charge amplifier
Transducer Power Supply Buffered signal outputs Pressure wave magnitude range Pressure wave frequency range Environment Temperature Technology
Vibro-Meter: Positive 24 V dc, current of 0.04 A nominal from I/O board Bentley-Nevada: Negative 24 V dc, current of 0.02 A nominal from I/O board Two channels with ac component only, 0.1 V/psi, available at BNC outputs Mag.min = -14 psi Mag.max = +14 psi Fmin = 1.5 Hz Fmax = 3600 Hz For use in Class 1, Division 2 environments (hazardous gases) Operating: -30 to 65C (-22 to 149 F) Surface mount
Diagnostics
VAMA runs continuous diagnostic tests on the signals and hardware. Conditions such as open-wire on the transducers is checked. If any signals go outside of configured limits, VAMA creates a fault. The cable connectors on DDPT have their own ID device that is interrogated by VAMA. The ID device is a read-only chip coded with the terminal board serial number, board type, and revision number. If a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
Two jumpers set the bias voltage for the transducers, and two jumpers set the power return from the transducers: JPA and JPB apply either a +28 V bias or 28 V bias to the transducer signals. JP2 and JP4 connect the transducer power return to PCOM or to Open.
Refer to the Installation and Operation sections for further details.
Notes
VAMB Acoustic Monitoring Input

VAMB Acoustic Monitoring
The Acoustic Monitoring (VAMB) board provides 18 channels of signal conditioning through two nine channel acoustic monitoring terminal boards IS200TAMB (TAMB) and one 18 channel I/O acoustic monitoring sub-assembly IS215VAMB (VAMB). The TAMB supports third party vendors such as, Bentley Nevada , Vibro-meter , GE/Reuter-Stokes , and others.
Galvanic Separation Cable (twisted and shield)
Signal+ SignalShield Pwr Ret

GE Industrial Cntrl Systems
Low noise cable

Pressur e Sensor
Charge Amplifier
G E
Isolator
Tu rbine C om bustor
Non-GE Instrumentation Option 1 Cable (twisted and Return shield)

2 4 6
3 1 2
VAMB H1A
JR2
JR2
JR2
JR2
JR2
Pressur e Sensor Pressur e Sensor
JR 2
JR 2
JR 2
JR 2
JR 2
1 3 5 7 9 11 13 15 17 19 21 23
Ckt. 1 Ckt. 2 Ckt. 3 Ckt. 4 Ckt. 5

JR1
1 3 5 7 9 11 13 15 17 19 21 23
8 10 12
2 4 6 8 10 12 14 16 18 20
14 16 18
Charge Converter Signal Amplifier (CCSA)
Ckt. 1 Ckt. 2 Ckt. 3 Ckt. 4 Ckt. 5

JR 1
20 22 24
IS200TAMBH1A
26 28 25 27 29 31 33 35 37 39 41 43 45 47
1 1
1 0
Ckt. 6 Ckt. 7 Ckt. 8 Ckt. 9

JR 5
22 24
1 2
30 32 34
1 3
IS200TAMBH1A
26 28 30 32 34 36 38 40 25 27 29 31 33 35 37 39 41 43 45 47
1 4
36
Ckt. 8 Ckt. 9
48
Non-GE Instrumentation Option 2
42 44 46 48
System Overview
VAMB Acoustic Monitoring Input 79
JR5
1 8
Low noise cable Pressur

e Sensor
38 40
Ckt. 6 Ckt. 7
42 44 46
1 8 1 7
GE Mark VI Terminal Board(s) and VME I/O Rack
1 6
1 5
JR 2
Low noise cable
Signal+
Shield
JR2
The selected product combination determines the system requirements as follows: 18 channels of signal conditioning for sensing dynamic pressure output from third party charge amplifiers Bentley-Nevada, Vibro-meter, PCB Piezotronics, GE PS CCSA and GE/Reuter-Stokes vendors are supported Differential inputs and adjustable gains Fast synchronous-sampled analog/digital with 8x over-sampling capability to minimize analog filtering Field Programmable Gate Array (FPGA) pre-processor with Finite Impulse Response (FIR) filters Open wire detection Proprietary functions RMS value for the ac input signal Alarm detection if peak amplitude exceeds configurable level List captures capability for all 18-channels if an alarm is detected
Analysis capability per channel
The acoustic monitoring function for the frame 6, 7, or 9 size gas turbines is supported by the VAMB and either one or two TAMB terminal boards. The TAMB receives an mV output from the CCSA or a third party charge amplifier. Power for the charge amplifier is supplied by the TAMB using a current limited +24V or -24V supply or from an external source. Other than electro-magnetic transient suppression, the differential input signal is routed directly to the VAMB through a cable with 18 twisted-pairs to the Versa Module Eurocard (VME) card front edge.
Gas Turbine Frame Size No. of Combustors No. of Flame Detectors No. of VAMB I/O No. of TAMB Max. No. of channels supported
6FA 7EA 7FA, 7FB 9FA
6 10 14 18
4 8 4 4
1 1 1 1
1 2 2 2
9 18 18 18
Installation
Note A GE field service technician should install the VAMB. Technicians should refer to GII-100014, VAMB Acoustic Monitoring Module, for complete installation instructions.
The figure TAMB Acoustic Monitoring Terminal Board shows the functionality of one of the nine channels supported on the TAMB. Each channel provides current limited +24 V dc and +24 V dc power supply outputs. A constant current source is connected to the SIGx line for the PCB sensors. The input signal, CCSELx, is False when the signal is a logic-level low through an output on the VAMB. At power-up, the output must be False (logic-level low), leaving the constant current output deselected until the configuration parameters are loaded. Each channel provides a hardware jumper, JPx, where x equals an even number, which selects a current input, I_IN, or a voltage input, V_IN. The current input provides a 250 W burden resistor for any 4-20 mA circuits connected to that channel.
80 VAMB Acoustic Monitoring Input
Each channel has a jumper, JPx, where x equals an odd number, which checks whether the return line, RETx, is tied to the terminal boards power common, PCOM. If JPx= PCOM, then the RETx line is tied to PCOM. If JPx= OPEN, then the RETx line is not tied to PCOM. A high impedance dc bias allows the VAMB to detect an open connection between the charge amplifier or sensor and the TAMB. The dc bias control provides three options: 28 V bias or ground applied to the signal line SIGx and return line RETx
These inputs are activated or the signal select is True if the Mark* VI I/O board outputs a logic-level low signal from the TTL output. The table shows the selections:
BIASxP BIASxN SIGx/RETx Biased to
True True False False
True False True False
Illegal combination. Bias circuit protects power supplies from shorting +28 V bias selected -28 V bias selected No bias selected, but both SIGx and RETx are pulled to ground to keep the unused input electrically quiet.
The sensor or charge amplifier signal output is connected to the terminal board point, SIGx, and the Kelvin or low-current return is connected to RETx. The terminal board provides signal suppression and EMI protection and passes the signal on to the VAMB through a 37-pin connector. Each channel provides a buffered BNC output. The buffered signal is the input signal minus the dc bias.
Channel 1 2 1 P24V1 S PCOM S SIG1 S

Current Reg. Diode
TAMB BNC_1
Current Limiter
Buffered S S JA1 CCSEL1 26
P28
Atten.
I_IN V_IN NC
J1A 25 0 oh ms
Atten.
To other chnls
J1B
PCOM OPEN NC
Bias Circuit
Bias1P False False True True Bias1N Sig1/Ret1 False no bias,gnd True -28V bias False +28V bias True N/A
5 4
RET1 S N24V1 S
Current Limiter
PCOM
P28 N28 BIAS1P BIAS1N PCOM DCOM SigComR

Brd_IDR1
N28
P28
TAMB provides the following I/O points: Channel Number ------------1 Signal Name -------PCOM P24V1 SIG1 N24V1 RET1 PCOM P24V2 SIG2 N24V2 RET2 PCOM P24V3 SIG3 N24V3 RET3 PCOM P24V4 SIG4 N24V4 RET4 SIG5 P24V5 RET5 N24V5 PCOM P24V6 SIG6 N24V6 RET6 PCOM SIG7 P24V7 RET7 N24V7 PCOM P24V8 SIG8 N24V8 RET8 PCOM P24V9 SIG9 N24V9 RET9 PCOM DIAG DIAGRET TB Pt. ---1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 JB1 Pt. ----BNC Signal --------Diag. Signal -----BIAS1P CCSEL1 BIAS1N JA1 Pt. --------3 26 4
1,18 20 3 4 2,17, 21 19,36 35 37 38 39
SCOM Serial EPROM Serial EPROM CBLJ5_ID
3 22
BNC_1
5 24
BNC_2
BIAS2P CCSEL2 BIAS2N BIAS3P CCSEL3 BIAS3N
5 27 6 7 28 8
DCOM POVRVP NOVRVP SIG1 RET1 PCOM
7 26
BNC_3
9 28 11 30
BNC_4
BIAS4P CCSEL4 BIAS4N CCSEL5 BIAS5P BIAS5N BIAS6P CCSEL6 BIAS6N
9 29 10 30 11 12 13 31 14
BNC_5
JB1 18 37 6 2 4 1 20 21,23 38 39
13 32 15 34
BNC_6
SCOM
BNC_7
CCSEL7 BIAS7P BIAS7N BIAS8P CCSEL8 BIAS8N
32 15 16 22 33 23
16 35
BNC_8
17 35
BNC_9
BIAS9P CCSEL9 BIAS9N
24 34 25
48 SCOM
TAMB Acoustic Monitoring Terminal Board
Terminal Point Definitions
Signal Name Pin # Description of 48-pin Customer Terminal Points
PCOM P24V1 SIG1 N24V1 RET1 PCOM P24V2 SIG2 N24V2 RET2 PCOM P24V3 SIG3 N24V3 RET3 PCOM P24V4 SIG4 N24V4 RET4 SIG5 P24V5 RET5 N24V5 PCOM P24V6 SIG6 N24V6 RET6 PCOM SIG7 P24V7 RET7 N24V7 PCOM P24V8 SIG8 N24V8 RET8 PCOM P24V9 SIG9 N24V9 RET9
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
Power supply returns for either the P24 V or N24 V supply +24 V output feed for input #1s charge amplifier (used with Vibro-meter equipment) Dynamic pressure differential voltage input #1 signal side -24 V output feed for input #1s charge amplifier (used with Bently-Nevada equipment). Dynamic pressure differential voltage input #1 return Power supply returns for either the P24 V or N24 V supply +24 V output feed for input #2s charge amplifier (used with Vibro-meter equipment) Dynamic pressure differential voltage input #2 signal side. -24 V output feed for input #2s charge amplifier. (used with Bently-Nevada equipment) Dynamic pressure differential voltage input #2 return Power supply returns for either the P24 V or N24 V supply. +24 V output feed for input #3s charge amplifier (used with Vibro-meter equipment) Dynamic pressure differential voltage input #3 signal side. -24 V output feed for input #3s charge amplifier. (used with Bently-Nevada equipment) Dynamic pressure differential voltage input #3 return Power supply returns for either the P24 V or N24 V supply +24 V output feed for input #4s charge amplifier (used with Vibro-meter equipment) Dynamic pressure differential voltage input #4 signal side -24 V output feed for input #4s charge amplifier (used with Bently-Nevada equipment) Dynamic pressure differential voltage input #4 return Dynamic pressure differential voltage input #5 signal side +24 V output feed for input #5s charge amplifier (used with Vibro-meter equipment) Dynamic pressure differential voltage input #5 return -24 V output feed for input #5s charge amplifier. (used with Bently-Nevada equipment) Power supply returns for either the P24 V or N24 V supply +24 V output feed for input #6s charge amplifier (used with Vibro-meter equipment) Dynamic pressure differential voltage input #6 signal side -24 V output feed for input #6s charge amplifier (used with Bently-Nevada equipment) Dynamic pressure differential voltage input #6 return Power supply returns for either the P24 V or N24 V supply Dynamic pressure differential voltage input #7 signal side +24 V output feed for input #7s charge amplifier (used with Vibro-meter equipment) Dynamic pressure differential voltage input #7 return -24 V output feed for input #7s charge amplifier (used with Bently-Nevada equipment) Power supply returns for either the P24 V or N24 V supply +24 V output feed for input #8s charge amplifier (used with Vibro-meter equipment) Dynamic pressure differential voltage input #8 signal side -24 V output feed for input #8s charge amplifier (used with Bently-Nevada equipment) Dynamic pressure differential voltage input #8 return Power supply returns for either the P24 V or N24 V supply +24 V output feed for input #9s charge amplifier (used with Vibro-meter equipment) Dynamic Pressure differential voltage input #9 signal side -24 V output feed for input #9s charge amplifier (used with Bently-Nevada equipment) Dynamic pressure differential voltage input #9 return
Signal Name Pin # Description of 48-pin Customer Terminal Points
PCOM DIAG DIAGRET SCOM
45 46 47 48
Power supply returns for either the P24 V or N24 V supply Diagnostic DAC output Return for diagnostic DAC output Shield ground
Acoustic Monitor Terminal Board, TAMB (Simplex only)

TB1
x
P24V1 N24V1 PCOM P24V2 N24V2 P24V3 N24V3 PCOM P24V4 N24V4 P24V5 N24V5
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
PCOM SIG1 RET1 SIG2 RET2 PCOM SIG3 RET3 SIG4 RET4 SIG5 RET5 BNC1 BNC2 Board Jumpers BNC3 V_IN / I_IN JP2 JP4 JP6 JP8 JP10 JP12 JP14 JP16 JP18 BNC9 BNC8 BNC5 JB1 BNC6 BNC7 BNC4 To I/O rack R, S or T header slot for VAMB JA1
TB2
x
Circuit PCOM SIG6 RET6 SIG7 RET7 PCOM SIG8 RET8 SIG9 RET9 PCOM DIAGRET SIG1 SIG2 SIG3 SIG4 SIG5 SIG6 SIG7 SIG8 SIG9
Jumpers Open / Pcom JP1 JP3 JP5 JP7 JP9 JP11 JP13 JP15 JP17
P24V6 N24V6 PCOM P24V7 N24V7 P24V8 N24V8 PCOM P24V9 N24V9 DIAG SCOM
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
To VAMB card front in I/O rack R, S or T
Acoustic Monitor Terminal Board, TAMB
TAMB Jumper Settings
Vendor
Vendor Model
Vendor TAMB Terminal I/O Conn. Point (x=1 to 9)
TAMB Jpn (n=even TAMB Jpn (n=odd number) Position number) Position
Bently-Nevada
350500 3-wire method
NC OUT COM VT NC
P24Vx SIGx RETx N24Vx PCOM P24Vx SIGx RETx N24Vx PCOM P24Vx SIGx RETx N24Vx PCOM P24Vx SIGx RETx N24Vx PCOM P24Vx SIGx RETx N24Vx PCOM P24Vx SIGx RETx N24Vx PCOM P24Vx SIGx RETx N24Vx PCOM
V_IN
PCOM
Bently-Nevada
350500
NC
V_IN
Open
OUT 4-wire method (better COM than 3-wire) VT COM Vibro-meter IPC 620 or IPC 704 with GSI 122 or 130 3-wire method +24V VOUT 0V NC NC Vibro-meter IPC 620 or IPC 704 with GSI 122 or 130 4-wire method +24V VOUT 0V NC 0V GE Power Systems Charge Converter Signal Amp (CCSA) PCB Piezotronics 111A21, 102A05, 102M43, 102M158, 102M170, 102M174 GE / ReuterStokes Flame Tracker RSFS -9001 & -9002 CCSA NC OUT+ OUTNC NC NC Signal Ground NC NC + conn. - conn.
V_IN
PCOM
V_IN
Open
V_IN
Open
V_IN
PCOM
I_IN
PCOM
NC -9004, -9005 & -9006 NC NC
Operation
The VAMB software features include: 18 channels of acoustic monitoring with Synchronous sampling of all 18 channels of data Configuration of TAMB terminal board controlling open circuit test voltage and constant current mode A/D gain and offset adjustment Dc bias removal from dynamic pressure signal to maximize SNR Proprietary firmware functions RMS calculation of the sampled AC signal data.
Milli-volt to engineering unit's conversion of RMS value Configuration constants can be changed through Mark VI toolbox 40 ms frame rate updates for signal space variables used by the application software Offline and online diagnostics to check the hardware
A/D Compensation
The A/D compensation function nulls any gain or offset error due to initial component variances. The firmware has an auto-calibration function built in for the A/Ds it controls. The auto-calibration function compares each of the 18 analog channels against a gold standard A/D channel. The gold standard A/D channel is calibrated using a standard high-precision voltage reference and the A/D common.
Note Refer to the figure, Channel x Acoustic Monitoring Block Diagram, where x equals 1-18.
Input Units to Engineering Value Conversion

The Acoustic Monitoring function provides a conversion from the hardware input units to the engineering units needed for the system calculation. For the mV to psi conversion, the range is 20 to 600 mV per psi. The firmware will be given four configuration parameters per channel to define the equation for the transfer function. Value (engineering units in counts) = GUnitConversion * Input (milli-volts in counts) + Offset where GUnitConversion = (High_Value Low_Value) / (High_Input Low_Input) Offset = High_Value - GUnitConversion * High_Input where High_Value, Low_Value, High_Input + Low Input are the configuration parameters.
A/D Gain Adjust

The configuration parameter, Gain defined for each channel controls the channel gain in the hardware. This allows for the amplification of low level signals to provide better resolution in the analog to digital conversion hardware. The gain options are 1, 2, 4 and 8. The channel control writes the gain set up to the FPGA VSPA input amplifier 4x and 2x gain control registers. The signal level calculated by the VAMB firmware will not change with a change in the Gain parameter because the signal is divided by the Gain factor in the firmware to result in a net gain of 1 for the signal regardless of the gain factor used. The maximum expected signal level should not exceed 10 V (saturation) after the gain is applied as indicated in the following table.
Rules for selecting proper value for Gain
Gainx
Maximum magnitude of input signal after dc bias is removed (volts)
1 2 4 8
10 5 2.5 1.25
Rms Calculation and Rolling Average

The root-mean-square (rms) calculation performs an rms calculation on the ac acoustic information sampled for a given scan. The rms is defined as follows: rms_Chx = SQRT ( (AC_Input(0)**2 + AC_Input(1)**2 + + AC_Input(Buffer_Length)**2) / Buffer_Length) Where x is the channel number. The rolling average provides a smoothing function to reduce the vibration in the signal.
I/O Card Configuration Constants (common to all channels)
Sample_Rate ScanPrAvgRMS
Ch. x Acoustic Monitoring Function

Anti-aliasing Dig. Filter Support
To FPGA Gain Registers

Buffer A/D Comp RMS Calculation Rolling Average Buffer Input Units to Eng. Value Conv. TAMB Terminal Board Control DC Bias Select Charge Amp PS Constant Current Select Slow A/D Sample Group Gain Adjust Bias1P & Bias1N to Pre-Processing FPGA CCSel1 to Pre-Processing FPGA AI1x2, AI1x4 to Pre-Processing FPGA DC Bias Comp
Signal Space SIGx
Channel x Acoustic Monitoring Block Diagram

ADGain ADOffset
From FPGA via DMA cntrl
To FPGA
InputUse
CCSel BiasLevel Gain I/O Card Configuration Constants (per channel)
Low_Input, High_Input Low_Value, High_Value
Control Constants (per channel)
Specifications
Signal Input Accuracy
Requirement
Limits
RMS Calculation Accuracy for Gain = 1, 2, 4 or 8 volts / volt Peak-to-Peak FFT Calculation Accuracy for Gains = 1, 2, 4 or 8 volts / volt
2.0% full scale 0.5% full scale from 0 to 1600 Hz 1.5% full scale from 1601 to 3200 Hz
Power Supply
Requirement
Limits
Number of P24 dual-mode outputs (one current-limit output, P24 Vx and one constant current output tied to SIGx selectable through CCSELx) P24 V (current-limit mode selected) P24 nominal current (current-limit mode selected) (due to standing current of IPC 704 on GSI 122/130) P24 minimum/maximum peak current range (current-limit mode selected) (due to 5 mA ac signal component plus some over range riding on top of standing current of IPC 704 connected to GSI 122/130 from Vibro-meter) P24 V (constant current mode selected with supply tied to SIGx) P24 nominal current (constant current mode selected) Constant current input type Constant current selection logic level for TRUE state. (TAMB ckt. provides a pull-up for the input.) Number of N24 current-limited outputs N24 V N24 nominal current N24 maximum load current
Jumper Selections
9 (one per channel) +22.8 to +25.2 V dc 44 mA 10% 20 60 mA
+20 to +30 V dc 3.5 mA 10% TTL High 9 (one per channel) -18.85 to -26 V dc 20 mA 30 mA
Requirement
Limits
Number of JPx (even) 3-pin jumpers with one side tied to the signal line, SIGx and the opposite side left open with the center pin tied to the 250 W burden resistor. Silk screen label for connection from signal line, SIGx to the 250 W burden resistor. Silk screen label for connection from the 250 burden resistor to no-connect pin (open). Number of JPx (odd)3-pin jumpers with one side tied to the return signal, RETx , and the opposite side left open with the center pin tied to PCOM. Silk screen label for connection from signal return, RETx to PCOM Silk screen label for connection from PCOM to no connect pin.
9 (one per channel) I_IN V_IN 9 (one per channel) PCOM OPEN
Bias Control
Requirement
Limits
Number of TAMB channels with bias control. Control input signal type Bias control input true state Dc error to dynamic signal channel produced by the bias control.
Constant Current Select for P24
9 (one per channel) TTL Logic high < 0.5 %
Requirement
Limits
Number of constant current control inputs Control input signal type

Buffered BNC Outputs
9 (one per channel) TTL
Requirement
Limits
Number of buffered BNC outputs Dc gain (Dc bias is removed from signal) Allowable offset Output impedance J6 connector type for QC
9 (one per channel) 1 0.5 % 30 mV 10% 40 50% 25-pin D shell
Diagnostics
Three LEDs at the top of the VAMB front panel provide status information. The normal RUN condition is a flashing green, and FAIL is a solid red. The third LED is normally off but displays a steady orange if a diagnostic alarm exists in the board. Each input has system limit checking based on two configurable levels. These limits can be configured for enable/disable, >= or <=, and as latching/nonlatching. RESET_SYS resets the out of limits. If this limit is exceeded a system limit logic signal is set. Each input has sensor limit checking, open circuit detection, and dc bias autonulling and excessive dc bias detection. Alarms will be generated for these diagnostics. Refer to I/O Board Alarms and Point Configuration. RESET_SYS resets these alarms. The TAMB terminal board has its own ID device, which is interrogated by the I/O board. The board is coded into a read-only chip containing the terminal board serial number, board type, revision number, and the JR, JS, JT connector location. This ID is checked as part of the power-up diagnostics.
Configuration
Note The following information is extracted from the ToolboxST application and represents a sample of the configuration information for this board. Refer to the actual configuration file within the ToolboxST application for specific information.
Module Parameter Description Choices
BinReject
Defines the number of side bins that will be rejected when the search function is applied to the FFT results for channels 1 through 18. 0 = no bins rejected Defines the source of the currently active configuration. The Toolbox allows only mode Toolbox as a selection. The remote gateway configurator forces mode to tuning configurator without user control. Defines the number of samples that will be used in the FFT calculation. Selections are: 1024, 2048, 4096, 8192, 16382, and 32768..
0 to 6
Config_Mode
Toolbox only
FFT_Length
1024 to 32768
FFT_TF_SelA EventLstSel
Boolean that selects the internal test file as the input to all the acoustic HW_Input to File monitoring channels instead of the actual analog input signals. Defines the sample site for the event capture list. Disable: list not used FFT_Out; fft output scaled in volts TC_Out: fft output after transducer compensation PSI_Out: fft outputs scaled in PSI Avg_Out: PSI_Out after averaging filter Disable to Avg_Out
HiB_Limit HiScrchBrkPt LoLoB_Limit LowB_Limit LowLow_EndPt LowLowStrtPt LowMid_BrkPt Low_StrtPt MidB_Limit MidHi_BrkPt NumEventScns
Defines the limit level for the maximum peak-peak amplitude signal in the high frequency band. Defines the frequency boundary between the high and screech frequency bands. Defines the limit level for the maximum amplitude signal in the low-low frequency band. Defines the limit level for the maximum amplitude signal in the low frequency band. Defines the ending frequency of the low-low frequency band. Defines the starting frequency of the low-low frequency band. Defines the frequency boundary between the low and mid frequency bands. Defines the starting frequency of the low band. Defines the limit level for the maximum amplitude signal in the mid frequency band Defines the frequency boundary between the mid and high frequency bands. Defines the number of scans an event buffer will contain. *note if the sample location is set to Raw_Input the maximum scan allowed is 1.
0 to 50 Psi 0 to 3200 Hz 0 to 50 Psi 0 to 50 Psi 0 to 3200 Hz 0 to 3200 Hz 0 to 3200 Hz 0 to 3200 Hz 0 to 50 Psi 0 to 3200 Hz 1 to 32 Scans
OpLstSel
Defines the sample site for the spectrum on demand capture or diagnostic list. Selections are: Disable: list not used Raw_Input: input time domain data FFT_Out; fft output scaled in volts TC_Out: fft output after transducer compensation PSI_Out: fft outputs scaled in PSI Avg_Out: PSI_Out after averaging filter
Disable to Avg_Out Bool
Module Parameter Description
Choices
PL_Fil_Freq
Defines the power line frequency that the notch filter will remove from the spectral content of the FFT output. Selections are 50 or 60 Hz. Tolerance for power line filter signature calculated vs theoretical. Ten percent tolerance is 0.1.
50_Hz to 60_Hz
PL_Fil_Tol PL_Fil_Width
0 to 1.0
Defines the bandwidth of the power line notch filter. The bandwidth will 0 to 100 Hz be value entered centered about the configured power line frequency. Sample rate defines the FFT sample rate for all the acoustic monitoring 12,877 Hz only channels 118. Selections are: 12,887 Hz only. Number of scans per average in the acoustic monitoring filtered FFT output. Selections are: integers 132 Number of scans per average in the RMS calculation. Selections are: integers 132 Selects whether the sort function for the pk-pk amplitudes uses the present scan only or uses an averaged value Scheduled time for temporary configuration mode. This time is forced to zero in the Toolbox. This value shall be set to the user-selected time in the temporary gateway remote configurator. 1 to32 scans 1 to32 scans No average, Average 0 to 480 minutes
SampleRate
ScanPrAvgFFT ScanPrAvgRMS SearchInAvg(1) SearchInAvg(6) Session_Time
ScrchB_Limit Scrch_EndPt SysLimitDis T_FilWidth
Defines the limit level for the maximum amplitude signal in the screech 0 to 50 Psi frequency band. Defines the ending frequency of the screech frequency band. Enable all system limit checking. Width (Hz) of the filter that excludes the transverse frequency fft coefficients and all fft coefficients designated by this filter from the screech band search. Transducer mounting compensation gain values for 30 points to characterize the gain response. Frequency corresponding to the gain value entered. Each of the 30 gain points has a corresponding frequency value. Defines the limit level for the maximum amplitude signal in the transverse frequency band. Enable calculations associated with the transverse band and excludes its FFT coefficients from the screech band. Defines the ending frequency of the transverse frequency band. Defines the starting frequency of the transverse frequency band. Selects the windowing function to be used on the sampled data for both Channel A and B. Rectangular Hamming Hanning Triangular Blackman Blackman-Har(ris) Flat Top 0 to 3200 Hz Disable, Enable 0 to 100 Hz
TMC_Gain(1) TMC_Gain(30) TMC_Freq(1) TMC_Freq(30) TrnsB_Limit Trns_Bnd_Enb Trns_EndPt Trns_StrtPt WindowSelect
0 to 10 0 to 3200 Hz 0 to 50 Psi Disable, Enable 0 to 3200 Hz 0 to 3200 Hz Rectangular to Flat Top
ZoomCanSel
Selects one of the 18 acoustic monitoring cans to zoom in on. Selections are: None Can_1 through Can_18
0 to 18
ZoomFFTLngth
Defines the Zoom FFT Length of the input buffer.
1024, 2048, 4096, 8192, 16384, 32768
Module Parameter Description
Choices
ZmEvntLstSel ZmOpLstSel
Defines the sample site for the zoom event capture list. Selections are: Disable, FFT_Out, TC_Out, PSI_OUT, and Avg_Out Defines the sample site for the zoom operator capture list. Selections are: Disable: list not used Raw_Input: input time domain data FFT_Out; fft output scaled in volts TC_Out: fft output after transducer compensation PSI_Out: fft outputs scaled in PSI Avg_Out: PSI_Out after averaging filter
Terminal Point Configuration
Disable to Avg_Out Disable to Avg_Out
Module Parameter Sig1 Description First of 9 analog inputs - board point
Choices Point volts RMS
Gain
Analog Input resolution adjustment used to amplify signal before digital 1,2,4, 8 Volts / Volt conversion. Gain factor * (maximum signal peak voltage) must be less than 10 volts to prevent saturation. Selections: 1, 2, 4, and 8 BiasLevel is a dc bias voltage subtracted from the analog signal inputted for the dc bias compensation and used by the TAMB dc bias select. Only used when InputUse is either custom or file. Combustor can be wired to this terminal board signal. This normally corresponds to the signal number to avoid confusion; wire terminal board signal 1 to can 1. If constant current select is equal to 1 then the P24 voltage supply is configured as a constant current supply providing a 4 mA output. Only used when InputUse is set to custom. -11.6 to + 11.6 V dc
BiasLevel
Can_Id
1 to 18
CCSel
False, True .
High_Input
Defines point 2 x-axis value in milli-volts for TAMB terminal point that is 0 to 9998.8 mV used in calculating the gain and offset for the conversion to engineering units. Defines point 2 Y-axis value in engineering units for TAMB terminal point that is used in calculating the gain and offset for the conversion from milli-volts to engineering units. Selects the sensor type used on the signal. Selections are: Unused, Bently-Nevada, Vibro-meter, VibromA(current), 4 CCSA, PCB, GE/RS (Reuter Stokes), Custom, File(test data stored in VAMB) 0 to 99999 PSI
High_Value
InputUse
Unused To File
Low_Input
Defines point 1 x-axis value in milli-volts for TAMB terminal point that is 0 to 9998.8 mV used in calculating the gain and offset for the conversion to engineering units. Defines point 1 Y-axis value in engineering units for TAMB terminal point that is used in calculating the gain and offset for the conversion from milli-volts to engineering units. Enables the power line notch filter. Enables high input sensor limit diagnostics. Enables low input sensor limit diagnostics. Enables bias for open circuits. Enables automatic dc bias nulling. Enables open sensor error diagnostic test. Enables excessive dc bias diagnostic test. Enables signal saturation diagnostic test. Enables system limit 1 fault check. Selects whether a fault is latching. Selects how the test values are compared. Value to use for system limit comparison. 0 to 99999 PSI
Low_Value
PL_Fil_En DiagHighEnab DiagLowEnab OcBiasEnab BiasNullEnab DiagOCChk DiagBiasNull DiagSigSat SysLim1Enabl SysLim1Latch SysLim1Type SysLimit1
Disable, Enable Disable, Enable Disable, Enable Disable, Enable Disable, Enable Disable, Enable Disable, Enable Disable, Enable Disable, Enable NotLatch, Latch <=, >= -1000 to 1000 Psi
Module Parameter Sig1 Description First of 9 analog inputs - board point
Choices Point volts RMS
SysLim2Enabl SysLim2Latch SysLim2Type SysLimit2
Enables system limit 2 fault check. Selects whether a fault is latching. Selects how the test values are compared. Value to use for system limit comparison.
VAMB Board Points
Disable, Enable Not Latch, Latch <=, >= -1000 to 1000 Psi
Board Points (Signals) Description Point Edit(Enter Signal Connection)
Direction
Type
L3DIAG_VAMB1 L3DIAG_VAMB2 L3DIAG_VAMB3 Can1_Health : Can18_Health Sig1_SysLim1 : Sig18_SyslLim1 Sig1_SysLim2 : Sig18_SyslLim2 Test_Config Test_Mode TripCapList UserCapList VambBool_1 : VambBool_6 VambPt_0 : VambPt_263 Num_Of_Scans Num_Avg_Scns Session_Tmr Trip_Cap_Req
Board Diagnostic Board Diagnostic Board Diagnostic Combustor can 1 signal health : Combustor can 18 signal health Terminal board signal 1 outside of system limits 1 : Terminal board signal 18 outside of system limits 1 Terminal board signal 1 outside of system limits 2 : Terminal board signal 18 outside of system limits 2 Card is temporarily remotely configured Signals are from internal test sources, not from terminal board A capture list triggered by TripCapReq is available A capture list manually requested by a user is available General Electric Proprietary Information : General Electric Proprietary Information General Electric Proprietary Information : General Electric Proprietary Information Scan (block of FFT data) number of this data (1-32) Number of scans (block of FFT data) averaged (1-32) Time remaining for remote tuning session Request for trip capture buffer collection
Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input
BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT INTEGER INTEGER INTEGER INTEGER INTEGER BIT
Alarms
I/O Board Diagnostic Alarms
Fault
Fault Description
Possible Cause
2 3 16 18 19 20
Flash Memory CRC Failure CRC Failure Override is Active System Limit Checking is Disabled Incorrect J3 Terminal Board ID Incorrect J4 Terminal Board ID Incorrect J6 Terminal Board ID
Board firmware programming error (board will not go online) Board firmware programming error (board will not go online) System limit checking was disabled by configuration Cable to J3 connector not properly connected to a TAMB terminal board or terminal board defective. Cable to J4 connector not properly connected to a TAMB terminal board or terminal board defective. Cable to J6 connector not properly connected to a TAMB terminal board or terminal board defective.
Fault
Fault Description
Possible Cause
21 30
Incorrect J7 Terminal Board ID ConfigCompatCode Mismatch;Firmware:#.Tre:#. IOCompatCode Mismatch;Firmware:# Tre:#
Cable to J7 connector not properly connected to a TAMB terminal board or terminal board defective. A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory.
31
38 39 40 41-58 61-78
Flashdisk error: Unable to revert to flash Permanent configuration data on card is corrupted. Download configuration after remote access firmware to card or replace card. JA1-JB1 TB IDs do no match: Check for Terminal board cables are not properly connected. Check for crosscross-cabling cabling. VAMB A/Ds not calibrated, Run Self Test Sig x: Open Ckt Test Failed. Check Wires and Sensor. Sig x: Bias Nulling Error. Check InputUse Config. Sig x: Input Signal Saturated Check Gain Config Sig x: Sensor Limit Exceeded Contact factory for instructions to run self test. Open circuit detected for terminal board signal Sig x, where x is the identified point. Check wiring and sensor. Dc bias designated for sensor type is outside of range detected for sensor. Check sensor type in configuration parameter InputUse, or check dc bias voltage on signal. Peak input voltage is saturating input. Decrease configuration parameter Gain for designated signal, or check for sensor problem. Peak input voltage exceeds limit for selected sensor type. Check sensor type in configuration parameter InputUse, or check for sensor problem.
81-98 101- 118
Notes
VAOC Analog Output

VAOC Analog Output
The Analog Output (VAOC) board controls 16 analog, 20 mA outputs. Outputs are wired to analog output terminal board(s) (TBAO or DTAO). Cables with molded plugs connect the terminal board to the VME rack where the VAOC processor board is located. VAOC receives digital values from the controller over the VME backplane from the VCMI, converts these to analog output currents, and sends them to the terminal board. The actual output current is measured on the terminal board and fed back to VAOC where it is controlled. In triple modular redundant (TMR) applications, control signals are fanned to the same terminal board from three VME board racks R, S, and T, as shown in the following figure. Six cables are required to support all 16 outputs. Each final current output is the median selection of the three currents in the three VAOCs. This median select circuit is in each VAOC.
VME Rack R VAOC Board
x
RUN FAIL STAT
TBAO Terminal Board

x x x x x x x x x x x x x x x x x x x x x x x x x
JT1 JT2
VME bus to VCMI
JS1 JS2
Cables to VME Rack T
JR1 JR2
Cables to VME Rack S
VAOC x
J3
J4
VAOC Board, TBAO Terminal Board, and Cabling
VAOC Analog Output 97
Compatibility
There are two generations of the VAOC board with corresponding terminal boards. The original VAOC includes all versions prior to and including VAOCH1B. When driving 20 mA outputs, these boards support up to a 500 load resistance at the end of 1000 ft (304.8 m) of #18 wire. This generation requires terminal board TBAOH1B or earlier for proper operation, or any revision of DTAI. The newest VAOC board, VAOCH1C, and any subsequent releases, support higher load resistance on the first eight output circuits. For 20 mA outputs, a drive voltage up to 18 V is available at the terminal board screw terminals. This permits operation with a 800 load resistance with 1000 ft (304.8 m) of #18 wire with margin. The second set of eight output circuits retains the 500 rating of the original VAOC. VAOCH1C requires TBAOH1C or later.
Installation
To install the V-type board 1 2 3 4
Power down the VME I/O processor rack Slide in the board and push the top and bottom levers in with your hands to seat its edge connectors Tighten the captive screws at the top and bottom of the front panel Power up the VME rack and check the diagnostic lights at the top of the front panel
Note Cable connections to the terminal boards are made at the J3 and J4 connectors on the lower portion of the VME rack. These are latching type connectors to secure the cables.
98 VAOC Analog Output
Operation
VAOC supports 16 analog 0-20 mA outputs. The VAOC contains the D/A converter and driver that generates the controlled currents, as shown in the following figure. The output current is measured by the voltage drop across a resistor on the terminal board. Terminal board outputs have noise suppression circuitry to protect against surge and high frequency noise. The following figure shows VAOC circuitry in a simplex arrangement.
<R> Module Analog Output Board VAOC TBAO Terminal Board
Suicide
100 Relay ohms
D/A
From controller
Current Regulator/ Power Driver

Current Sensing
J3
JR1
50 ohms
Noise suppression 01 NS 02 03 04 05 06 07 08
Maximum load 4-20 mA, 500 ohms

Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return
Circuit #1 Circuit #2 Circuit #3 Circuit #4 Circuit #5 Circuit #6 Circuit #7 Circuit #8 Circuit #9 Circuit #10 Circuit #11 Circuit #12 Circuit #13 Circuit #14 Circuit #15 Circuit #16
Output Current
Sensing
First group of 8 analog 0-20 mA outputs

ID
Group 1
09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
D/A
From controller
Current Regulator/ Power Driver

Current
100 ohms
Suicide Relay
J4
JR2
50 ohms
NS
Sensing
Output Current Sensing
Second group of 8 analog 0-20 mA outputs

ID
Group 2
Connectors at bottom of VME rack

Analog Output Current Circuits, Simplex System
In a TMR system, each analog current output is fed by the sum of the currents from the three VAOCs. The total output current is measured with a series resistor that feeds a voltage back to each VAOC. The resulting output is the voted middle value (median) of the three currents. If one output fails, the other two pick up the current to the correct value. In the event of a circuit malfunction that cannot be cleared by a command from the processor, the circuit is disconnected by opening the shutdown relay contacts. This isolation function is only operational when configured for TMR operation.
Specifications
Item Number of channels Analog outputs D/A converter resolution/accuracy Frame rate Fault detection Specification 16 current output channels, single ended (one side connected to common) 0-20 mA, with up to 500 burden Response better than 50 rad/sec 12 bit resolution with 0.5% accuracy 100 Hz on all 16 outputs Output current out of limits Outer total (TMR) current D/A converter output Suicide relay operation Failed ID chip
Diagnostics
Three LEDs at the top of the I/O board front panel provide status information. The normal RUN condition is a flashing green, and FAIL is a solid red. The third LED shows STATUS and is normally off but displays a steady orange if a diagnostic alarm condition exists in the board. The diagnostics include the following: Each output is monitored by diagnostics. Voltage drops across the local and outer loop current sense resistors, the D/A outputs, and at the shutdown relay contacts are sampled and digitized. Standard diagnostic information is available on the outputs, including high and low limit checks, and high and low system limit checks (configurable). If any one of the outputs goes unhealthy a composite diagnostic alarm, L3DIAG_xxxx, occurs. Details of the individual diagnostics are available from the toolbox. The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal if they go healthy. Each cable connector on the terminal board has its own ID device that is interrogated by the I/O processor. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the JR, JS, and JT connector location. When the ID chip is read by the I/O processor and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
Note The following information is extracted from the toolbox and represents a sample of the configuration information for this board. Refer to the actual configuration file within the toolbox for specific information.
Parameter VAOC Configuration Output Voting J3:IS200TBAOH1A AnalogOut1 Output_MA Low_MA Low_Value High_MA High_Value TMR_ Suicide TMR_Diff Limit D/A_Err Limit J4:IS200TBAOH1A AnalogOut9 Board Points Signals L3DIAG_VAOC1 L3DIAG_VAOC2 L3DIAG_VAOC3 OutSuicide1 : OutSuicide16 Out1MA : Out16MA : Status of suicide relay for output 16 Measure total output current in mA : Measure total output current in mA Select type of output voting Terminal board connected to VAOC through J3 Analog output 1 board point (first set of 8 analog outputs) Type of output current Output mA at low value Output in engineering units at low mA Output mA at high value Output value in engineering units at high mA Enable suicide for faulty output current, TMR only Current difference in mA for suicide, TMR only Difference between D/A reference and output, in % for suicide, TMR only Terminal board connected to VAOC though J4 Analog output 9 - board point (second set of 8 analog outputs) Description - Point Edit (Enter Signal Connection) Board diagnostic Board diagnostic Status of suicide relay for output 1 Simplex, Simplex TMR Connected, not connected Point edit (output FLOAT) Unused, 0-20 mA 0 to 20 mA -3.4028e + 038 to 3.4028e + 038 0 to 20 mA -3.4028e + 038 to 3.4028e + 038 Enable, disable 0 to 20 mA 0 to 100 % Connected, not connected Point edit (output FLOAT) Direction Input Input Input Input Input Input Input Input Input Type BIT BIT BIT BIT BIT BIT Float Float Float Description Choices
Alarms
Fault 2 3 16 17 18 19 24 30 Fault Description Flash memory CRC failure CRC failure override is active System limit checking is disabled Board ID failure J3 ID failure J4 ID failure Firmware/hardware Incompatibility Possible Cause Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online) System checking was disabled by configuration Failed ID chip on the VME I/O board Failed ID chip on connector J3, or cable problem Failed ID chip on connector J4, or cable problem Invalid terminal board connected to VME I/O board
ConfigCompatCode mismatch; Firmware: [ ]; Tre: A tre file has been installed that is incompatible with the [ ]The configuration compatibility code that the firmware on the I/O board. Either the tre file or firmware firmware is expecting is different than what is in the must change. Contact the factory tre file for this board IOCompatCode mismatch; Firmware: [ ]; Tre: [ ]The A tre file has been installed that is incompatible with the I/O compatibility code that the firmware is expecting firmware on the I/O board. Either the tre file or firmware is different than what is in the tre file for this board must change. Contact the factory Output [ ] Total current too high relative to total current. An individual current is N mA more than half the total current, where N is the configurable TMR_Diff Limit Output [ ] Total current varies from reference current. Total current is N mA different than the reference current, where N is the configurable TMR_Diff Limit Board failure
31
82-97
98-113
Board failure or open circuit
114-129
Output [ ] Reference Current Error. The difference Board failure (D/A converter) between the output reference and the input feedback of the output reference is greater than the configured DA_Err Limit measured in percent Output [ ] Individual Current Unhealthy. Simplex Board failure mode alarm indicating current is too high or too low Output [ ] Suicide Relay Non-Functional. The suicide relay is not responding to commands Output [ ] Suicide Active. One output of three has suicided, the other two boards have picked up the current Board failure (relay or driver) Board failure
130-145 146-161 162-177
TBAO Analog Output

The Analog Output (TBAO) terminal board supports 16 analog outputs with a current range of 0-20 mA. Current outputs are generated by the I/O processor, which can be local (Mark* VIe control) or remote (Mark VI control). The outputs have noise suppression circuitry to protect against surge and high-frequency noise. TBAO has two barrier-type terminal blocks for customer wiring and six D-type cable connectors.
Mark VI Systems
In Mark VI systems, TBAO works with VAOC processor and supports simplex and TMR applications. Cables with molded plugs connect TBAO to the VME rack where the VAOC board is located. In TMR systems, TBAO is cabled to three VOAC boards.
Mark VIe Systems

In Mark VIe systems, TBAO works with the PAOC I/O pack and supports simplex applications only. The I/O packs plug into the D-type connectors and communicate over Ethernet with the controller. Refer to GEI-100577 Mark VIe Analog Input for board compatibility.
x
x
Eight Analog Outputs
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
JT1 JT2
DC-37 pin connectors with latching fasteners
J ports conections: JS1 JS2 Plug in PAOC I/O Pack(s) for Mark VIe system or Cables to VAOC I/O boards for Mark VI; The number and location depends on the level of redundancy required.
Eight Analog Outputs
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
JR1 JR2
Shield Bar
Barrier Type Terminal Blocks can be unplugged from board for maintenance
TBAO Analog Output Terminal Board
Installation
Attach TBAO to a vertical mounting plate. Connect the wires for the 16 analog outputs directly to the two I/O terminal blocks mounted on the left of the board. Each point can accept two 3.0 mm (#12AWG) wires with 300 V insulation per point using spade or ring type lugs. Each block is held down with two screws and has 24 terminals. A shield terminal strip attached to chassis ground is located immediately to the left of each terminal block. Make cable connections to TBAO follows: In Mark VI systems, connect cables with molded plugs to the D-type connectors on the TBAO and to the VME rack where the VAOC processor is located. Use two cables for simplex or six cables for TMR. In Mark VIe systems, plug the PAOC I/O packs directly into selected D-type connectors. Special side mounting brackets support the packs.
The following figure shows details of TBAO wiring and cabling.

For Mark VIe control, use I/O Packs For Mark VI control, use cables as follows: To J4 on I/O rack T JS1 JS2 To J3 on I/O rack T
Analog Output Termination Board TBAO
JT1
JT2
Output 1 (Return) x Output 2 (Return) x Output 3 (Return) x Output 4 (Return) x Output 5 (Return) x Output 6 (Return) x Output 7 (Return) x Output 8 (Return) x Output 9 (Return) x Output 10(Return) x Output 11(Return) x Output 12(Return) x
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
Output 1 (Signal) Output 2 (Signal) Output 3 (Signal) Output 4 (Signal) Output 5 (Signal) Output 6 (Signal) Output 7 (Signal) Output 8 (Signal) Output 9 (Signal) Output 10(Signal) Output 11(Signal) Output 12(Signal)
Output 13(Return) x Output 14(Return) x Output 15(Return) x Output 16(Return) x

x x x x x x x x
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
Output 13 (Signal) Output 14 (Signal) Output 15 (Signal) Output 16 (Signal)
To J4 on I/O rack S JR1 JR2 To J3 on I/O rack S
To J4 on I/O rack R To J3 on I/O rack R
I/O Terminal block with barrier terminals Terminal blocks can be unplugged from terminal board for maintenance Up to two #12 AWG wires per point with 300 volt insulation
TBAO Terminal Board Wiring
Operation
TBAO supports 16 analog control outputs. Driven devices should not exceed a resistance of 500 (900 if using I/O packs) and can be located up to 300 m (984 ft) from the turbine control cabinet. The VAOC or PAOC contains the D/A converter and drivers that generate the controlled currents. The output current is measured by the voltage drop across a resistor on the terminal board. Filters reduce high-frequency noise and suppress surge on each output near the point of signal exit. The following figure shows TBAO in a simplex system.
TBAO Terminal Board Current output JR1
Noise suppression
50 ohms
01 NS 02 03 04 05 06 07 08
Signal
Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return
Circuit #1 Circuit #2 Circuit #3 Circuit #4 Circuit #5 Circuit #6 Circuit #7 Circuit #8 Circuit #9 Circuit #10 Circuit #11 Circuit #12 Circuit #13 Circuit #14 Circuit #15 Circuit #16
Current feedback Current feedback return Group 1 (8)
ID
09 10 11 12 13 14 15
To I/O Processors
JR2
50 ohms
16 NS 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Group 2 (8)
ID
Analog Outputs, Simplex
In a TMR system, each analog current output is fed by the sum of the currents from the three I/O processors, as shown in the drawing below. The total output current is measured with a series resistor that feeds a voltage back to each I/O processor. The resulting output is the voted middle value (median) of the three currents.
TBAO Terminal Board Current output JR1
50 ohms Noise Suppression
01 NS 02 03 04 05 06 07 08
Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return
Circuit #1 Circuit #2 Circuit #3 Circuit #4 Circuit #5 Circuit #6 Circuit #7 Circuit #8
Current feedback Current feedback Return JS1

ID
Group 1 (8)
09 10 11 12
ID
13 14 15 16
To I/O processors
JT1
JR2
ID
17 18 19 20 21 22 23 24
Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return Signal Return
Circuit #9 Circuit #10 Circuit #11 Circuit #12 Circuit #13 Circuit #14 Circuit #15 Circuit #16
ID
JS2 Group 2 (8) To I/O processors

ID
25 26 27 28 29 30 31
JT2
ID
32
Analog Output, TMR
Specifications
Item Number of channels Customer load resistance Physical Size Temperature 10.16 cm wide x 33.02 cm high (4.0 in x 13.0 in) -30 to +65C (-22 to +149 F) Specification 16 current output channels, single-ended (one side connected to common) Up to 500 burden with VOACH1B and TBAOH1B and 900 burden (18 V compliance) with PAOC and TBAOH1C
Analog output current 0-20 mA
Diagnostics
Configuration
There are no jumpers or hardware settings on the board.
DTAO Simplex Analog Output

The Simplex Analog Output (DTAO) terminal board is a compact analog output terminal board designed for DIN-rail mounting. DTAO has eight analog outputs driven by the VAOC I/O board over a single cable. This board is designed for simplex-only applications and only works with the VAOC. A single cable with 37pin D-type connector connects DTAO to the VAOC rack. This cable is identical to those used on the larger TBAO terminal board. Two DTAO boards can be connected to the VAOC for a total of 16 analog outputs.
Note The DTAO board does not work with the PAOC I/O pack.
The on-board circuits and noise suppression are the same as those on TBAO. Highdensity Euro-block type terminal blocks are permanently mounted to the board, with two screw connections for the ground connection (SCOM). An on-board ID chip identifies the board to the VAOC for system diagnostic purposes.
Installation
Mount the plastic holder on the DIN-rail and slide the DTAO board into place. Connect the wires for the eight analog outputs directly to the terminal block as shown in the following figure. Driven devices should not exceed a resistance of 500 and can be located up to 300 m (984 ft) from the turbine control cabinet. The Euro-block type terminal block has 36 terminals and is permanently mounted on the terminal board. Typically #18 AWG wires (shielded twisted pair) are used. Two screws, 17 and 18, are provided for the SCOM (ground) connection, which should be as short a distance as possible. DIN-type terminal boards can be stacked vertically on the DIN-rail to conserve cabinet space.
Note There is no shield terminal strip on DTAO.
DTAO
Screw Connections Output 1 (Return) Output 2 (Return) Output 3 (Return) Output 4 (Return) Output 5 (Return) Output 6 (Return) Output 7 (Return) Output 8 (Return) Chassis Ground
SCOM
Screw Connections 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 Output 1 (Signal) Output 2 (Signal) Output 3 (Signal) Output 4 (Signal) Output 5 (Signal) Output 6 (Signal) Output 7 (Signal) Output 8 (Signal) Chassis Ground
37-pin "D" shell connector with latching fasteners
JR1
Cable to J3 or J4 connector in I/O rack for VAOC board
Euro-Block type terminal block

DTAO Wiring and Cabling
Operation
DTAO supports eight analog control outputs. On each output the voltage drop across the local loop current sense resistor is measured and the signal is fed back to the VAOC processor, which controls the current. Filters reduce high-frequency noise and suppress surge on each output near the point of signal exit. VAOC contains the D/A converter and drivers that generate the controlled currents.
DTAO Terminal Board Cable from VAOC Current from VAOC JR1
50 ohms Noise Suppresion 01 02 SCOM 03 04 05 06 07 08 09 10 11
Analog Outputs Maximum Load 4-20 mA, 500 ohms

Signal Return Signal
Circuit #1
Current Feedback Current Feedback Current Return
Return Circuit #2 Signal Return Circuit #3 Signal Return Circuit #4 Signal Return Circuit #5 Signal Return Circuit #6 Signal Return Circuit #7 Signal Return Circuit #8
ID Eight analog outputs
12 13 14 15 16
DTAO Terminal Board
Specifications
Item Number of channels Analog output current Customer load resistance Physical Size Temperature 8.6 cm wide x 16.2 cm high (3.4 in x 6.37 in) 0 to 60C (32 to 149 F) Specification 8 current output channels, single ended (one side connected to common) 0-20 mA Up to 500 burden
Diagnostics
Configuration

Note VCRC is a single slot version of VCCC with the same functionality, but contact input cables plug into the front of the board.
The Discrete Input/Output (VCCC) board with its associated daughterboard accepts 48 discrete inputs and controls 24 relay outputs from four terminal boards. VCCC is a double width module and mounts in the VME I/O rack. This rack has two sets of J3/J4 plugs for cables to the TBCI and TRLY terminal boards. VCRC is a narrower, single slot board and can be used instead of the VCCC.
VCCC Board
x RUN FAIL STAT
VCRC Board
x RUN FAIL STAT
VME bus to VCMI
VME bus to VCMI
J33
J44 To Contact Input boards (2)

VCCC x VCRC x
Connectors on VME rack
J3
J3
Connectors on VME rack
J3
J4 To Relay Output boards (2) To Contact Input boards (2)
J4
J4
To Relay Output boards (2)
VCCC and VCRC Boards and Cable Connections
VCCC/VCRC Discrete Input/Output 111
VCRC Option
The VCRC board has the same functionality as the VCCC board but takes up only one VME slot because no daughter board is required. Two front panel connectors, J33 and J44, accept the contact inputs from the TBCI terminal boards. Relay outputs on TRLY use the J3 and J4 ports on the VME rack, the same as for VCCC. If locating cables on the front panel is undesirable, VCCC can be used instead.
Note VCRC does not support the TICI contact voltage sensing board.
Installation
Cable connections to the terminal boards are made at the J3 and J4 connectors (right hand set) on the lower portion of the VME rack. These are latching type connectors to secure the cables. Cable connections to the TRLY terminal boards are made to the left hand set of J3 and J4 connectors.
Note With the VCRC, both TBCI cables connect to J33 and J44 on the front panel, not to connectors under the rack.
Operation
VCCC passes the input voltages through optical isolators and samples the signals at the frame rate for control functions, and at 1 ms for sequence of events (SOE) reporting. VCCC transfers the signals over the VME backplane to the VCMI, which sends them to the controller. The contact input processing is shown in the figure, VCCC and I/O Terminal Boards, Simplex System.
Contact Inputs
The first 24 dry contact inputs are wired to a contact input terminal board. A second terminal board is required for inputs 25 - 48. Dc power is provided for the contacts. Cables with molded plugs connect the terminal board to the VME rack where the VCCC processor board is located. High speed scanning and recording at 1 ms rate is available for inputs monitoring important turbine variables. The SOE recorder reports all contact openings and closures with a time resolution of 1 ms. Contact chatter and pulse widths down to 6 ms are reported. The dry-contact inputs are powered from a floating 125 V dc (100 - 145 V dc) supply (TBCIH1) or from a floating 24 V dc (18.5 32 V dc) supply (TBCIH2). Filters reduce high frequency noise and suppress surge on each input near the point of signal exit. Noise and contact bounce is filtered with a 4 ms filter. Ac voltage rejection (50/60 Hz) is 60 V rms with 125 V dc excitation.
112 VCCC/VCRC Discrete Input/Output
For triple modular redundant (TMR) applications, contact input voltages are fanned out to three VME board racks R, S, and T through plugs JR1, JS1, and JT1. The signals are processed by the three VCCCs and the results voted by the VCMI board in each controller rack.
Relay Outputs
TRLYH1B holds 12 plug-in magnetic relays. The first six relay circuits can be jumpers configured for either dry, Form-C contact outputs, or to drive external solenoids. A standard 125 V dc or 115 V ac source, or an optional 24 V dc source, with individual jumper selectable fuses and on-board suppression can be provided for field solenoid power. The next five relays (7-11) are un-powered isolated Form-C contacts. Output 12 is an isolated Form-C contact, used for special applications such as ignition transformers. Cables carry relay control signals and monitor feedback voltages between VCCC and TRLY. Relay drivers, fuses, and jumpers are mounted on the relay board. Several types of relay boards can be driven, including TRLY, DRLY, and SRLY. The relay outputs have failsafe features so that when a cable is unplugged, the inputs vote to de-energize the corresponding relays. Similarly, if communication with the associated VME board is lost, the relays de-energize.
Terminal Board TBCI
<R> Rack Contact Input /Relay Output Board VCCC
JE1 (+) Floating (-) 125 V dc or 24 V dc JE2 (+) (-)

Noise Suppression N S
Total of 48 circuits: P5
Gate Gate
JR1
J3A
Gate Gate
(+) (-)
Ref. ID
Field Contact
(+) (-)
N S
Gate Gate Gate
BCOM
J4A
Optical isolation
Field Contact
(+)
24 contact inputs per board Contact inputs from second TBCI terminal board Relay Terminal Board TRLY NC
25
Total of 24 circuits:
K#
Com
26
Powered or Dry Contacts
JA1
J3
Relay command signals
NO
27
K#
K# P28V JR1
J4
K# Coil Relay RD
Driver
JS1 To second relay terminal board JT1
Monitor
12 relay outputs per board
Connect JR1, JS1, and JT1 to 3 VCCCs in TMR system, and leave JA1 open
VCCC and I/O Terminal Boards, Simplex System
Specifications
Item Number of channels Input contact excitation voltage Input isolation Input filter Ac voltage rejection Input frame rate Rated voltage on relays Max relay load current Specification 48 dry contact voltage input channels (24 per terminal board) 24 relay output channels (12 relays per terminal board) H1 nominal 125 V dc, floating, ranging from 100 to 145 V dc H2 nominal 24 V dc, floating, ranging from 18.5 to 32 V dc Optical isolation to 1500 V on all inputs Hardware filter, 4 ms 60 V rms @ 50/60 Hz at 125 V dc excitation System dependent scan rate for control purposes 1,000 Hz scan rate for SOE monitoring a: b: a: b: c: Max response time on Max response time off Relay contact material Relay contact life Fault detection 25 ms 25 ms Silver cad-oxide Electrical operations: Mechanical operations: 100,000 10,000,000 Nominal 125 V dc or 24 V dc Nominal 120 V ac or 240 V ac 0.6 A for 125 V dc operation 3.0 A for 24 V dc operation 3.0 A for 120/240 V ac, 50/60 Hz operation
Loss of contact input excitation voltage Non-responding contact input in test mode Loss of user solenoid power (blown fuse) Coil current disagreement with command Relay contact voltage monitoring indicates problem Unplugged cable or loss of communication with I/O board; relays de-energize if communication with associated I/O board is lost Failed ID chip
Physical
Size - VCRC - VCCC Temperature 26.04 cm high x 1.99 cm wide x 18.73 cm deep (10.25 in x 0.782 in x 7.375 in) 26.04 cm high x 3.98 cm wide x 18.73 cm deep (10.25 in x 1.564 in x 7.375 in) 0 to 60C (32 to 140 F)
Diagnostics
Three LEDs at the top of the I/O board front panel provide status information. The normal RUN condition is a flashing green, and FAIL is a solid red. The third LED shows STATUS and is normally off but displays a steady orange if a diagnostic alarm condition exists in the board. The diagnostics include the following: Each output is monitored by diagnostics. Voltage drops across the local and outer loop current sense resistors, the D/A outputs, and at the shutdown relay contacts are sampled and digitized. Standard diagnostic information is available on the outputs, including high and low limit checks, and high and low system limit checks (configurable). If any one of the outputs goes unhealthy a composite diagnostic alarm, L3DIAG_xxxx, occurs. Details of the individual diagnostics are available from the toolbox. The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal if they go healthy. Each cable connector on the terminal board has its own ID device that is interrogated by the I/O processor. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the JR, JS, and JT connector location. When the ID chip is read by the I/O processor and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
Parameter Configuration System Limits J3:IC200TRLYH1B Relay01 Relay Output FuseDiag Relay01Fdbk ContactInput SignalInvert SignalFilter J4:IC200TRLYH1B Relay01 Relay01Fdbk J3A:IS200TBCIH1A Contact01 Contact input Signal invert Sequence of events Signal filter J4A:IS200TBCIH1A Enable all system limit checking Terminal board 1 connected to VCCC through J3 First relay output (from first set of 12 relays) - card point Select relay output Enable fuse diagnostic Relay 01 contact voltage (first set of 12 relays) - card point Configurable Item:slot# Inversion makes signal true if contact is open Contact Input filter in msec Terminal board 2 connected to VCCC through J4 Relay output 1 (second set of 12 relays) - card point Relay 1 contact voltage (second set of 12 relays) - card point Terminal board connected to VCCC from J3 Select contact input Inversion makes signal true if contact open Select input for sequence of events scanning Contact input filter in milliseconds Terminal board connected to VCCC from J4 Enable, disable Connected, not connected Point edit Used, unused Enable, disable Point edit Used, unused Normal, invert 0, 10, 20, 50 Connected, not connected Point edit Point edit (Output BIT) (Input BIT) (Input BIT) (Output BIT) Description Choices
Connected, not connected (input BIT) Used, unused Normal, invert Enable, disable 0, 10, 20, 50 Connected, not connected
First contact of 24 on first terminal board - board point Point edit
Parameter Contact01 Board point Signals L3DIAG_VCCC1 L3DIAG_VCCC2 L3DIAG_VCCC3
Description First contact of 24 on second terminal board - board point Description-Enter Signal Connection Name Board diagnostic Board diagnostic Board diagnostic
Choices Point edit Direction Input Input Input (input BIT) Type BIT BIT BIT
Alarms
Fault 1 2 3 16 17 18 19 22 23 24 Fault Description SOE Overrun. Sequence of events data overrun Flash memory CRC failure CRC failure override is active System limit checking is disabled. System limit checking has been disabled Board ID failure J3 ID failure J4 ID failure J33/J3A ID failure J44/J4A ID failure Possible Cause Communication problem on IONet Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online) System checking was disabled by configuration Failed ID chip on the VME I/O board Failed ID chip on connector J3, or cable problem Failed ID chip on connector J4, or cable problem Failed ID chip on connector J33 or J3A, or cable problem Failed ID chip on connector J44 or J4A, or cable problem
Firmware/hardware incompatibility. The firmware on Invalid terminal board connected to VME I/O board. this board cannot handle the terminal board it is Check the connections and call the factory. connected to ConfigCompatCode mismatch; Firmware: [ ] ; Tre: [ A tre file has been installed that is incompatible with the ] The configuration compatibility code that the firmware on the I/O board. Either the tre file or firmware firmware is expecting is different than what is in the must change. Contact the factory. tre file for this board IOCompatCode mismatch; Firmware: [ ]; Tre: [ ] The A tre file has been installed that is incompatible with the I/O compatibility code that the firmware is expecting firmware on the I/O board. Either the tre file or firmware is different than what is in the tre file for this board must change. Contact the factory. TBCI J33/J3A/J44/J4A contact input [ ] not Normally a VCCC problem, or the battery reference responding to Test Mode. A single contact or group voltage is missing to the TBCI terminal board, or a bad of contacts could not be forced high or low during cable. VCCC self-check TRLY J3/J4 relay output coil [ ] does not match requested state. A relay coil monitor shows that current is flowing or not flowing in the relay coil, so the relay is not responding to VCCC commands TRLY J3/J4 relay driver [ ] does not match requested state. The relay is not responding to VCCC commands TRLY J3/J4 fuse [ ] blown. The fuse monitor requires the jumpers to be set and to drive a load, or it will not respond correctly The relay terminal board may not exist, or there may be a problem with this relay, or, if TMR, one VCCC may have been out-voted by the other two VCCC boards. The relay terminal board may not exist and the relay is still configured as used, or there may be a problem with this relay driver. The relay terminal board may not exist, or the jumpers are not set and there is no load, or the fuse is blown.
30
31
33-56/ 65-88
129-140/ 145-156
161-172/ 177-188 97-102/ 113-118 240/241
TBCI J3/J4 excitation voltage not valid, TBCI The contact input terminal board may not exist, or the J33/J3A/J44/J4A contact inputs not valid. The contact excitation may not be on, or be unplugged, or the VCCC monitors the excitation on all TBCI and DTCI excitation may be below the 125 V level. boards, and the contact input requires this voltage to operate properly Logic signal voting mismatch. The identified signal from this board disagrees with the voted value A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable.
256-415
TBCI Contact Input with Group Isolation

The Contact Input with Group Isolation (TBCI) terminal board accepts 24 dry contact inputs wired to two barrier-type terminal blocks. Dc power is wired to TBCI for contact excitation. The contact inputs have noise suppression circuitry to protect against surge and high-frequency noise.
Mark VI Systems
In the Mark* VI system, TBCI works with VTCC/VCRC and supports simplex and TMR applications. Cables with molded plugs connect TBCI to VME rack where the VCCC or VCRC processor board is located. Both board versions TBCIH_B and TBCIH_C work correctly with Mark VI and are functionally identical.
Mark VIe Systems

In the Mark VIe system, the TBCI works with the PDIA I/O pack and supports simplex, dual, and TMR applications. One, two, or three PDIAs can be plugged directly into the TBCI. Mark VIe requires the C version of this board for correct mechanical alignment of connector JT1 with I/O pack mechanical support.
Board Versions
Three versions of TBCI are available as follows:
Terminal Board TBCIH1C TBCIH2C TBCIH3C Contact Inputs Excitation Voltage 24 24 24 Nominal 125 V dc, floating, ranging from 100 to 145 V dc Nominal 24 V dc, floating, ranging from 16 to 32 V dc Nominal 48 V dc, floating, ranging from 32 to 64 V dc
x
12 Contact Inputs
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 JE1 JE2 9 11 13 15 17 19 JS1 21 23
JT1
DC-37 pin connectors with latching fasteners
J - Port Connections: Plug in PDIA I/O Pack(s) for Mark VIe system or Cables to VCCC/VCRC boards for Mark VI;
x x x
12 Contact Inputs
x x x x x x x x x x
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47 x
JR1
The number and location depends on the level of redundancy required.
Shield Bar
TBCI Contact Input Terminal Board
Installation
Wiring
Connect the wires for the 24 dry contact inputs directly to two I/O terminal blocks on the terminal board. These blocks are held down with two screws and can be unplugged from the board for maintenance. Each block has 24 terminals accepting up to #12 AWG wires. A shield terminal strip attached to chassis ground is located immediately to the left of each terminal block.
Power Connection
Connect TBCI to the contact excitation voltage source using plugs JE1 and JE2, as shown in following figure.
Cabling Connections
In a simplex system, connect TBCI to the I/O processor using connector JR1. In a TMR system, connect TBCI to the I/O processors using connectors JR1, JS1, and JT1. Cables or I/O packs are plugged in depending on the type of Mark VI or Mark VIe system, and the level of redundancy.
Note For a Mark VIe system, the I/O packs plug into TBCI and attach to sidemounting brackets. One or two Ethernet cables plug into the pack. Firmware may need to be downloaded. Refer to GEH-6700, ToolboxST for Mark VIe Control.
Contact Input Terminal Board TBCI
1 JT1 3 JE2
3
Input 1 (Return) Input 2 (Return) Input 3 (Return) Input 4 (Return) Input 5 (Return) Input 6 (Return) Input 7 (Return) Input 8 (Return) Input 9 (Return) Input 10(Return) Input 11(Return) Input 12(Return)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
Input 1 (Positive) Input 2 (Positive) Input 3 (Positive) Input 4 (Positive) Input 5 (Positive) Input 6 (Positive) Input 7 (Positive) Input 8 (Positive) Input 9 (Positive) Input 10 (Positive) Input 11 (Positive) Input 12 (Positive)
JE1
Contact Excitation Source, 125 Vdc
J - Port Connections: JS1 Plug in PDIA I/O Pack(s) for Mark VIe system or Cables to VCCC/VCRC boards for Mark VI;
Input 13 (Return) Input 14 (Return) Input 15 (Return) Input 16 (Return) Input 17 (Return) Input 18 (Return) Input 19 (Return) Input 20 (Return) Input 21 (Return) Input 22 (Return) Input 23 (Return) Input 24 (Return)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
(Positive) (Positive) (Positive) (Positive) JR1 (Positive) (Positive) (Positive) (Positive) (Positive) (Positive) Inputs 22, 23, 24 (Positive) are 10 mA, all (Positive) others are 2.5 mA
Terminal Blocks can be unplugged from terminal board for maintenance
Up to two #12 AWG wires per point with 300 volt insulation
TBCIH1C Terminal Board Wiring and Cabling
Operation
Filters reduce high-frequency noise and suppress surge on each input near the point of signal entry. The dry contact inputs on H1 are powered from a floating 125 V dc (100-145 V dc) supply from the turbine control. The 125 V dc bus is current limited in the power distribution module prior to feeding each contact input. H2 and H3 versions use lower voltages as shown in the specification table. The discrete input voltage signals pass to the I/O processor, which sends them through optical isolators providing group isolation and transfers the signals to the system controller. The reference voltage in the isolation circuits sets a transition threshold that is equal to 50% of the applied floating power supply voltage. The tracking is clamped to go no less than 13% of the nominal rated supply voltage to force all contacts to indicate open when voltage dips below this level.
Terminal Board TBCIH1C JE1 (+) Floating (-) From 125 V dc Power Source JE2 (+) (-)
(+) (-)
Noise Suppression N S
I/O Processor
Gate
Total of 48 circuits JR1
Gate
P5
Gate Gate
Field Contact (+) (-) Field Contact (+) (-) Field Contact (+) (-) Field Contact (+) (-) Field Contact (+) (-) Field Contact
ID
BCOM
Ref.
Gate Gate
Optical Isolation
N S
JS1
Gate
N S
ID
BCOM
JT1 To I/O Processor
N S
N S
ID
BCOM
N S
BCOM
24 Contact Inputs per Terminal Board. Each contact input terminates on one point and is fanned to <R>, <S>, and <T>
Contact Input Circuits
A pair of terminal points is provided for each input, with one point (screw) providing the positive dc source and the second point providing the return (input) to the board. The current loading is 2.5 mA per point for the first 21 inputs on each terminal board. The last three have a 10 mA load to support interface with remote solid-state output electronics. Contact input circuitry is designed for NEMA Class G creepage and clearance.
Specifications
Item Excitation voltage Specification H1: Nominal 125 V dc, floating, ranging from 100 to 145 V dc H2: Nominal 24 V dc, floating, ranging from 18.5 to 32 V dc H3: Nominal 48 V dc, floating, ranging from 32 to 64 V dc Input current H1: For 125 V dc applications: First 21 circuits draw 2.5 mA (50 k) Last three circuits draw 10 mA (12.5 k) H2: For 24 V dc applications: First 21 circuits draw 2.5 mA (10 k) Last three circuits draw 9.9 mA (2.42 k) H3: For 48 V dc applications: First 21 circuits draw 2.5 mA Last three circuits draw 10 mA Input filter Hardware filter, 4 ms Power consumption 20.6 W on the terminal board Temperature rating 0 to 60C (32 to 140 F) Fault detection Loss of contact input excitation voltage Non-responding contact input in test mode Unplugged cable Physical Size Temperature 33.02 cm high x 10.16 cm wide (13.0 in. x 4.0 in) Operating: -30 to 65C (-22 to 149 F) Number of channels 24 contact voltage input channels
Diagnostics
Diagnostic tests to components on the terminal boards are as follows: The excitation voltage is monitored. If the excitation drops to below 40% of the nominal voltage, a diagnostic alarm is set and latched by the I/O pack/board. As a test, all inputs associated with this terminal board are forced to the open contact (fail safe) state. Any input that fails the diagnostic test is forced to the failsafe state and a fault is created. If the input from this board does not match the TMR voted value from all three boards, a fault is created. Each terminal board connector has its own ID device that is interrogated by the I/O pack/board. The connector ID is coded into a read-only chip containing the board serial number, board type, revision number, and the JR1/JS1/JT1 connector location. When the chip is read by the controller and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
TICI Contact Input with Point Isolation

The Contact Input with Point Isolation (TICI) terminal board provides 24 point isolated voltage detection circuits to sense a range of voltages across relay contacts, fuses, and switches.
Mark VI Systems
In the Mark* VI system, the TICI is controlled by the VCCC board and supports simplex and TMR applications. Cables with molded plugs connect TICI to the VME rack where the I/O boards are mounted.
Note The VCRC J3 and J4 front connectors do not support TICI.
Mark VIe Systems

In the Mark VIe system, the TICI works with the PDIA I/O pack and supports simplex, dual, and TMR applications. One, two, or three PDIAs plug into the TICI to support a variety of system configurations.
Installation
Wiring
Connect the wires for the 24 isolated digital inputs directly to two I/O terminal blocks on the terminal board. These blocks are held down with two screws and can be unplugged from the board for maintenance. Each block has 24 terminals accepting up to #12 AWG wires. A shield terminal strip attached to chassis ground is located immediately to the left of each terminal block.
Cabling Connections
In a simplex system, connect TICI to the I/O processor using connector JR1. In a TMR system, connect TICI to the I/O processors using connectors JR1, JS1, and JT1. Cables or I/O packs are plugged in depending on the type of Mark VI or Mark VIe system, and the level of redundancy.
Note For a Mark VIe system, the I/O packs plug into TICI and attach to sidemounting brackets. One or two Ethernet cables plug into the pack. Firmware may need to be downloaded.
Isolated Contact Input Terminal Board TICI JT1

x
Input 1 (Return) Input 2 (Return) Input 3 (Return) Input 4 (Return) Input 5 (Return) Input 6 (Return) Input 7 (Return) Input 8 (Return) Input 9 (Return) Input 10(Return) Input 11(Return) Input 12(Return)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
Input 1 (Positive) Input 2 (Positive) Input 3 (Positive) Input 4 (Positive) Input 5 (Positive) Input 6 (Positive) Input 7 (Positive) Input 8 (Positive) Input 9 (Positive) Input 10 (Positive) Input 11 (Positive) Input 12 (Positive)
J - Port Connections: JS1 Plug in PDIA I/O Pack(s) for Mark VIe system or Cables to VCCC boards for Mark VI;
Input 13 (Return) Input 14 (Return) Input 15 (Return) Input 16 (Return) Input 17 (Return) Input 18 (Return) Input 19 (Return) Input 20 (Return) Input 21 (Return) Input 22 (Return) Input 23 (Return) Input 24 (Return)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
(Positive) (Positive) (Positive) (Positive) (Positive) (Positive) (Positive) (Positive) (Positive) (Positive) (Positive) (Positive)
The number and location depends on the level of redundancy required. JR1
TICI Terminal Board Wiring and Cabling
Operation
The TICI is similar to TBCI, except for the following items: No contact excitation is provided on the terminal board. Each input is electrically isolated from all others and from the active electronics.
There are two groups of the TICI with different nominal voltage thresholds. TICIH1 has the following input voltage ranges: 70-145 V dc, nominal 125 V dc, with a detection of 39 to 61 V dc 200-250 V dc, nominal 250 V dc, with a detection of 39 to 61 V dc 90-132 V rms, nominal 115 V rms, 47-63 Hz, with a detection of 35 to 76 V ac 190-264 V rms, nominal 230 V rms, 47-63 Hz, with a detection of 35 to 76 V ac
TICIH2 has the following input voltage range: 16-32 V dc, nominal 24 V dc, with a detection threshold of 9.5 to 15 V dc
TICI provides input hardware filtering with time delays of 15 ms, nominal: For dc applications the time delay is 15 8 ms For ac applications the time delay is 15 13 ms
In addition to hardware filters, the contact input state is software-filtered, using configurable time delays selected from 0, 10, 20, 50, and 100 ms. For ac inputs, a filter of at least 10 ms is recommended.
TICI Isolated Contact Inputs External Voltage Posxx Retxx

S S PCOM
optical isolator
JR1 P28 VDC ID

P28V
Simplex system JR1 connects to VCCC/VCRC or connects to PDIA pack for Mark VIe system
PCOM
JS1 Circuit #2 --For total of 24 ccts --ID
P28V
PCOM
P28V
JT1
ID
TMR Systems JS1 and JT1 cable to I/O processors VCCC/VCRC for Mark VI systems or connects to PDIA I/O Packs for Mark VIe systems.
PCOM
TICI Circuits for Sensing Voltage across typical device
The following restrictions should be noted regarding creepage and clearance on the 230 V rms application: For NEMA requirements: 230 V single-phase For CE Certification: 230 V single or 3-phase
Refer to VCCC or PDIO documentation for information on monitoring contact inputs.
Specifications
Item Input voltage Specification TICIH2: 16-32 V dc, nominal 24 V dc, with a detection threshold of 9.5 to 15 V dc TICIH1: 70 -145 V dc, nominal 125 V dc, with a detection threshold of 39 to 61 V dc 200 -250 V dc, nominal 250 V dc, with a detection threshold of 39 to 61 V dc 90 -132 V rms, nominal 115 V rms, 47-63 Hz, with a detection threshold of 35 to 76 V ac 190-264 V rms, nominal 230 V rms, 47-63 Hz, with a detection threshold of 35 to 76 V ac Fault detection in I/O board Physical Size Temperature 17.8 cm high x 33.02 cm wide (7.0 in. x 13.0 in.) Operating -30 to +65C (-22 to +149 F) Non-responding contact input in test mode Unplugged cable or failed ID chip Number of channels 24 input channels for isolated voltage sensing
Diagnostics
Configuration
DTCI Simplex Contact Input with Group Isolation

The Simplex Contact Input with Group Isolation (DTCI) terminal board is a compact terminal board designed for DIN-rail mounting. The DTCI board has 24 contact inputs with a nominal excitation of 24 V dc, and connects to the VCCC (or VCRC) processor board with a single cable. Two DTCI boards can be connected to the VCCC or VCRC for a total of 48 contact inputs. The terminal boards can be stacked vertically on a DIN-rail to conserve cabinet space. Only a simplex version of this board is available.
Note DTCI does not work with the PDIA I/O Pack.
Installation
Note There is no shield terminal strip with this design.
Mount the plastic holder on the DIN-rail and slide the DTCI board into place. Connect the wires for the contact inputs directly to the terminal block. The EuroBlock type terminal block has 60 terminals and is permanently mounted on the terminal board. Typically #18 AWG wires are used. Two screws, 55 and 56, are provided for the SCOM (ground) connection, which should be as short a distance as possible. Six screws are provided for the 24 V dc excitation power.
Note SCOM must be connected to ground.
DTCI Board Screw Connections Input 1 (Return) Input 2 (Return) Input 3 (Return) Input 4 (Return) Input 5 (Return) Input 6 (Return) Input 7 (Return Input 8 (Return) JR1 Input 9 (Return) Input 10 (Return) Input 11 (Return) Input 12 (Return) Input 13 (Return) Input 14 (Return) Input 15 (Return) Input 16 (Return) Input 17 (Return) Input 18 (Return) Input 19 (Return) Input 20 (Return) Input 21 (Return) Input 22 (Return) Input 23 (Return) Input 24 (Return) Excitation (Positive) Excitation (Negative) Excitation (Negative) Chassis Ground SCOM Contact excitation 24 V dc DIN-rail mounting 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 Input 1 (Positive) Input 2 (Positive) Input 3 (Positive) Input 4 (Positive) Input 5 (Positive) Input 6 (Positive) Input 7 (Positive) Input 8 (Positive) Input 9 (Positive) Input 10 (Positive) Input 11 (Positive) Input 12 (Positive) Input 13 (Positive) Input 14 (Positive) Input 15 (Positive) Input 16 (Positive) Input 17 (Positive) Input 18 (Positive) Input 19 (Positive) Input 20 (Positive) Input 21 (Positive) Input 22 (Positive) Input 23 (Positive) Input 24 (Positive) Excitation (Positive) Excitation (Positive) Excitation (Negative) Chassis Ground
To VCCC board, cable to J3 or J4. To VCRC board, cable to J33 or J44 on front.
Euro-Block type terminal block Plastic mounting holder
Operation
DTCI has the same functionality and on-board signal conditioning as TBCI, except they are scaled for 24 V dc.The input excitation ranges from 18 to 32 V dc, and the threshold voltage is 50% of the excitation voltage. The ac voltage rejection is 12 V rms. Contact inputs take 2.5 mA nominal current on the first 21 circuits, and 10 mA on circuits 22 through 24. Filters reduce high frequency noise and suppress surge on each input near the point of signal entry. The discrete input voltage signals are cabled to the VCCC board (or VCRC), which passes them through optical isolators and transfers the signals over the VME backplane to the VCMI. The VCMI then sends them to the controller.
DTCI Terminal Board
49 52 24 V dc excitation power source 50 53 51 54
Input 1 Positive Input 1 Return Input 2 Positive Input 2 Return Input 3 Positive Input 3 Return Input 4 Positive Input 4 Return
(+) (-) (+) (-) (+) (-) ID JR1
Noise Suppression 1 N 2 S
Cable to VCCC or VCRC in VME rack
3 4 5 6 7 8
N S
N S
N S
. . . .
Input 24 Positive Input 24 Return
. . . .
47 48
N S
Field contacts (24)
SCOM
BCOM
DTCI Contact Input Circuits
Specifications
Item Number of channels Excitation voltage Input current Input filter Temperature rating Fault detection in I/O board Specification 24 dry contact voltage input channels Nominal 24 V dc, floating, ranging from 18 to 32 V dc First 21 circuits each draw 2.5 mA (50 k) Last three circuits each draw 10 mA (12.5 k) Hardware filter, 4 ms 0 to 60C (32 to 140 F) Loss of contact input excitation voltage Non-responding contact input in test mode Unplugged cable Physical Size, with support plate Temperature 8.6 cm wide x 16.2 cm high (3.4 in x 6.37 in) 0 to 60C (32 to 140 F)
Diagnostics
Configuration
TRLYH1B Relay Output with Coil Sensing

The Relay Output with coil sensing (TRLYH1B) terminal board holds 12 plug-in magnetic relays. The first six relay circuits configured by jumpers for either dry, Form-C contact outputs, or to drive external solenoids. A standard 125 V dc or 115/230 V ac source, or an optional 24 V dc source with individual jumper selectable fuses and on-board suppression, can be provided for field solenoid power. The next five relays (7-11) are unpowered isolated Form-C contacts. Output 12 is an isolated Form-C contact, used for special applications such as ignition transformers.
Mark VI Systems
In Mark* VI systems, TRLY is controlled by the VCCC, VCRC, or VGEN board and supports simplex and TMR applications. Cables with molded plugs connect the terminal board to the VME rack where the I/O boards are mounted. Connector JA1 is used on simplex systems, and connectors JR1, JS1, and JT1 are used for TMR systems.
Mark VIe Systems

In the Mark VIe system, the TRLY works with the PDOA I/O pack and supports simplex and TMR applications. PDOA plugs into the DC-37 pin connectors on the terminal board. Connector JA1 is used on simplex systems, and connectors JR1, JS1, and JT1 are used for TMR systems.
Solenoid power x
TB3
12 Relay Outputs
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
JF1JF2
X JT1
Fuses JS1
J - Port Connections: Plug inPDOA I/O Pack(s) for Mark VIe system or
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
Output Relays JA1 JR1
Cables to VCCC/VCRC or VGEN boards for Mark VI system The number and location depends on the level of redundancy required.
Shield bar
Solenoid Barrier type terminal blocks can be unplugged power from board for maintenance
TRLYH1B Relay Output Terminal Board
Installation
Connect the wires for the 12 relay outputs directly to two I/O terminal blocks on the terminal board as shown in the figure, TRLYH1B Terminal Board Wiring. Each block is held down with two screws and has 24 terminals accepting up to #12 AWG wires. A shield terminal strip attached to chassis ground is located on to the left side of each terminal block. Connect the solenoid power for outputs 1-6 to JF1. JF2 can be used to daisy chain power to other TRLYs. Alternatively, power can be wired directly to TB3 when JF1/JF2 are not used. Connect power for the special solenoid, Output 12, to connector JG1. Jumpers JP1-JP6 are removed in the factory and shipped in a plastic bag. Re-install the appropriate jumper if power to a field solenoid is required. Conduct individual loop energization checks as per standard practices and install the jumpers as required. For isolated contact applications, remove the fuses to ensure that suppression leakage is removed from the power bus.
Note These jumpers are also for isolation of the monitor circuit when used on isolated contact applications.
Alternate customer power wiring Terminal 1 - Pos Terminal 2 - Neg
TB3 N125/24 V dc P125/24 V dc JF1 x 1 JF2 1 Power source
Relay Output Terminal Board TRLYH1B

x
Powered, fused solenoids form-C
Output 01 (COM) Output 01 (SOL) Output 02 (COM) Output 02 (SOL) Output 03 (COM) Output 03 (SOL) Output 04 (COM) Output 04 (SOL) Output 05 (COM) Output 05 (SOL) Output 06 (COM) Output 06 (SOL)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
Relays + Output 01 (NC) Output 01 (NO) FU1 Out 01 FU7 Output 02 (NC) + Output 02 (NO) FU2 Out 02 FU8 Output 03 (NC) Output 03 (NO) + Output 04 (NC) FU3 Out 03 FU9 Output 04 (NO) + Output 05 (NC) FU4 Out 04 FU10 Output 05 (NO) + Output 06 (NC) Output 06 (NO) FU5 Out 05 FU11 + FU6 Out 06 FU12 Fuses Fuses Neg,return Pos, High
JP1 JP2 JP3 JP4 JP5 JP6 To connectors JA1, JR1, JS1, JT1
Output 07 (COM) Dry contacts form-C Output 08 (COM) Output 09 (COM) Output 10 (COM) Special circuit, form-C, ign. xfmr. Output 11 (COM) Output 12 (COM) Output 12 (SOL)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
Output 07 (NC) Output 07 (NO) Output 08 (NC) Output 08 (NO) Output 09 (NC) Output 09 (NO) Output 10 (NC) Output 10 (NO) Output 11 (NC) Output 11 (NO) Output 12 (NC) Output 12 (NO)
Jumper choices: power (JPx) or dry contact (dry)
To connectors JA1, JR1, JS1, JT1
Power to special circuit 12 JG1 1 2 3 4 Customer return Customer power
JF1, JF2, and JG1 are power plugs
TRLYH1B Terminal Board Wiring
Operation
Relay drivers, fuses, and jumpers are mounted on the TRLYH1B. For simplex operation, D-type connectors carry control signals and monitor feedback voltages between the I/O processors and TRLY through JA1. Relays are driven at the frame rate and have a 3.0 A rating. The rated contact-tocontact voltage is 500 V ac for one minute. The rated coil to contact voltage is 1,500 V ac for one minute. The typical time to operate is 10 ms. Relays 1-6 have a 250 V metal oxide varistor (MOV) for transient suppression between normally open (NO) and the power return terminals. The relay outputs have a failsafe feature that vote to de-energize the corresponding relay when a cable is unplugged or communication with the associated I/O processor is lost.
Relay Terminal Board - TRLYH1B Alternate Power, 20 A 24 V dc or 125 V dc or 115 V ac or 230 V ac Normal Power Source,pluggable (7 Amp) Power Daisy-Chain TB3
1 2 3 4
Dry P125/24 V dc FU7 JP1
Output 01 NC 1 K1 Com 2 NO 3
JF1 1
3
N125/24 Vdc
FU1
K1
K1 Sol 4
Field Solenoid
+ -
3.15 Amp slow-blow

Monitor >14 Vdc >60 Vac
"6" of the above circuits Output 07 NC K7 Com

26 25
JF2
1 3
JA1 Monitor Select
NO
27 K7 K7 "5" of these circuits
Dry Contact, Form-C
R I/O Processor
JR1
P28V
Relay Driver
Coil
K#
Relay Output
ID
JS1
RD Output 12 NC K12 Com

46 45
ID
JT1
"12" of the above circuits
Special Circuit
NO
ID
Available for GT Ignition Transformers (6 Amp at 115 Vac 3 Amp at 230 Vac)
K12 K12 Sol "1" of these circuits
47
JG1
1 3 48
TRLYH1B Circuits, Simplex System
For TMR applications, relay control signals are fanned into TRLY from the three I/O processors R, S, and T through plugs JR1, JS1, and JT1. These signals are voted and the result controls the corresponding relay driver. Power for the relay coils comes from all three I/O processors and is diode-shared. The following figure shows a TRLYH1B in a TMR system.
Relay Terminal Board - TRLYH1B Dry P125/24 V dc FU7 JP1
Alternate power, 20 A 24 V dc or 125 V dc or 115 V ac or 230 V ac Normal power source,pluggable (7 Amp) Power daisy-chain
TB3
1 2 3 4
JF1 1
3
N125/24 V dc
FU1
K1
K1 Sol 4
Field solenoid
+ -
3.15 Amp slow-blow
6 of the above circuits Output 07 NC K7 Com

26 25
JF2
1 3
Monitor >14 V dc >60 V ac
JA1
R I/O Processor Relay Control JR1
Monitor Select
NO
27 K7 K7 5 of these circuits
Dry contact, form-C
P28V
Relay Driver
Coil
K#
ID
JS1 To S I/O Processor

ID

46 45
JT1 To T I/O Processor

ID
12 of the above circuits
Special circuit
NO K12 K12 Sol 1 of these circuits

TRLYH1B Circuits, TMR System
48 47
Available for GT ignition transformers (6 Amp at 115 V ac 3 Amp at 230 V ac)
JG1 1 3
Specifications
Item Number of relay channels on one TRLY board Rated voltage on relays Max load current Specifications 12: 6 relays with optional solenoid driver voltages 5 relays with dry contacts only 1 relay with 7 A rating a: b: a: b: c: Max response time on Max response time off Maximum inrush current Contact material Contact life Fault detection Nominal 125 V dc or 24 V dc Nominal 115/230 V ac 0.6 A for 125 V dc operation 3.0 A for 24 V dc operation 3.0 A for 115/230 V ac, 50/60 Hz operation
25 ms typical 25 ms typical 10 A Silver cad-oxide Electrical operations: Mechanical operations: 100,000 10,000,000
Loss of relay solenoid excitation current Coil current disagreement with command Unplugged cable or loss of communication with I/O board; relays de-energize if communication with associated I/O board is lost.
Physical Size Temperature 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in) -30 to + 65C (-22 to +149 F)
Diagnostics
Diagnostic tests to components on the terminal boards are as follows: The output of each relay (coil current) is monitored and checked against the command at the frame rate. If there is no agreement for two consecutive checks, an alarm is latched. The solenoid excitation voltage is monitored downstream of the fuses and an alarm is latched if it falls below 12 V dc. If any one of the outputs goes unhealthy a composite diagnostics alarm, L3DIAG_xxxx occurs. When an ID chip is read by the I/O processor and a mismatch is encountered, a hardware incompatibility fault is created. Each terminal board connector has it own ID device that is interrogated by the I/O pack/board. The connector ID is coded into a read-only chip containing the board serial number, board type, revision number, and the JR1/JS1/JT1 connector location. When the chip is read by the I/O processor and mismatch is encountered, a hardware incompatibility fault is created. Relay contact voltage is monitored. Details of the individual diagnostics are available in the configuration application. The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal if they go healthy.
Configuration
Board adjustments are made as follows: Jumpers JP1 through JP12. If contact voltage sensing is required, insert jumpers for selected relays. Fuses FU1 through FU12. If power is required for relays 1-6, two fuses should be placed in each power circuit supplying those relays. For example, FU1 and FU7 supply relay output 1. Refer to terminal board wiring diagram for more information.
TRLYH1C Relay Output with Contact Sensing

The Relay Output with contact sensing (TRLYH1C) terminal board holds 12 plug-in magnetic relays. The first six relay circuits are Form-C contact outputs to drive external solenoids. A standard 125 V dc or 115 V ac source with fuses and on-board suppression is provided for field solenoid power. TRLYH2C holds 12 plug-in magnetic relays. The first six relay circuits are Form-C contact outputs to drive external solenoids. A standard 24 V dc source with fuses and on-board suppression is provided for field solenoid power. The next five relays (7-11) are unpowered, isolated Form-C contacts. Output 12 is an isolated Form-C contact with non-fused power supply, used for ignition transformers. For example, 12 NO contacts have jumpers to apply or remove the feedback voltage sensing. TRLYH1C and H2C are the same as the standard TRLYH1B board except for the following: Six jumpers for converting the solenoid outputs to dry contact type are removed. These jumpers were associated with the fuse monitoring. Input relay coil monitoring is removed from the 12 relays. Relay contact voltage monitoring is added to the 12 relays. Individual monitoring circuits have voltage suppression and can be isolated by removing their associated jumper. High-frequency snubbers are installed across the NO and SOL terminals on the six solenoid driver circuits and on the special circuit, output 12.
Mark VI Systems
In the Mark* VI system, the TRLY is controlled by the VCCC or VCRC board and supports simplex and TMR applications. Cables with molded plugs connect the terminal board to the VME rack where the I/O boards are mounted. Connector JA1 is used on simplex systems, and connectors JR1, JS1, and JT1 are used for TMR systems.
Mark VIe Systems

In the Mark VIe system, TRLY works with the PDOA I/O pack and supports simplex and TMR applications. PDOA plugs into the DC-37 pin connectors on the terminal board. Connector JA1 is used on simplex systems, and connectors JR1, JS1, and JT1 are used for TMR systems.
Solenoid power x
TB3
12 Relay Outputs
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
JF1JF2
X JT1
Fuses JS1
J - Port Connections: Plug in PDOA I/O Pack(s) for Mark VIe system or Cables to VCCC/VCRC boards for Mark VIe system The number and location depends on the level of redundancy required.
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
Output Relays Jumpers JA1 JR1
Shield bar
Solenoid power
TRLYH1C Relay Output Terminal Board With Voltage Sensing
Installation
Connect the wires for the 12 relay outputs directly to two I/O terminal blocks on the terminal board as shown in the figure, TRLYH1C Terminal Board Wiring. Each block is held down with two screws and has 24 terminals accepting up to #12 AWG wires. A shield terminal strip attached to chassis ground is located immediately to the left of each terminal block. Connect the solenoid power for outputs 1-6 to JF1 normally. JF2 can be used to daisy-chain power to other TRLYs. Alternatively, power can be wired directly to TB3 when JF1/JF2 are not used. Connect power for the special solenoid, Output 12, to connector JG1.
Jumpers JP1-12 remove the voltage monitoring from selected outputs.

Alternative Customer Power Wiring Power Return TB3 N125/24 Vdc P125/24 Vdc JF1 x 2 x 1 3
x
Power Source
JF2 1 1
3
Relay Output Terminal Board TRLYH1C (Contact Voltage Sensing)
x 4
x 3
Powered, Fused Solenoids Form-C
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
FU1 FU2 FU3 FU4 FU5 -
Out 01 Out 02 Out 03 Out 04 Out 05
+ FU7 + FU8 + FU9 + FU10 + FU11
JP1 JP2 JP3 Voltage JP4 Sensing Boards JP5
FU6 Out 06 Fuses Neg,Return

Output 07 (COM) Dry Contacts Form-C Output 08 (COM) Output 09 (COM) Output 10 (COM) Output 11 (COM) Output 12 (COM) Output 12 (SOL)
Special Circuit, Form-C, Ign. Xfmr.
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
Output 07 (NC) Output 07 (NO) Output 08 (NC) Output 08 (NO) Output 09 (NC) Output 09 (NO) Output 10 (NC) Output 10 (NO) Output 11 (NC) Output 11 (NO) Output 12 (NC) Output 12 (NO) JG1 1 Customer Power
Relays
+ JP6 FU12 Fuses Pos,High Cable JP7 Connectors JA1, JR1, JP8 JS1, JT1 JP9
JP10 JP11 JP12 3 Customer Return
Power to Circuit 12
TRLYH1C Terminal Board Wiring
Operation
Relay drivers, fuses, and jumpers are mounted on the TRLYH1C. Relays 1-6 have a 250 V MOV for transient suppression between the NO and power return terminals. Relays are driven at the frame rate and have a 3.0 A rating. The rated contact-tocontact voltage is 500 V ac for one minute. The rated coil to contact voltage is 1,500 V ac for one minute. The typical time to operate is 10 ms. The relay outputs have a failsafe feature that votes to de-energize the corresponding relay when a cable is unplugged or communication with the associated I/O board is lost.
For simplex operation, a cable carries control signals and monitor feedback voltages between the I/O board and TRLY through JA1. For TMR applications, relay control signals are fanned into TRLY from the three I/O boards R, S, and T through plugs JR1, JS1, and JT1. These signals are voted and the result controls the corresponding relay driver. The 28 V power for the relay coils comes in from all three I/O boards and is diode-shared. The following figure shows a TRLYH1C in a TMR system.
Relay Terminal Board - TRLYH1C with Contact Voltage Sensing Alternate Power, 20 A 24 V dc or 125 V dc or 115 V ac or 240 V ac Normal Power Source, pluggable (7 Amp) Power Daisy-Chain TB3
1 2 3 4
P125/24 V dc
FU7
JF1 1
3
N125/24 Vdc
FU1
6 of these circuits
K1
K1
Snub
Field Solenoid
+ -
3.15 Amp slow-blow
Sol JP1
Output 07
JF2
1 3
NC K7
25
JA1 Monitor Select
Com
26
R I/O Processor JR1
NO K7 K7 JP7
27
Dry Contact Form-C
P28V
K#
Relay Control
Coil
ID
Relay Driver
5 of these circuits

ID
Monitor Voltage
RD
JP12 K12 Com
46 Output 12
NC
45

ID
Special Circuit
NO K12 K12
Snub 47
Available for GT Ignition Transformers (6 A at 120 V ac 3 A at 240 V ac)
JG1 1 3
1 of these circuits
Sol 48
TRLYH1C Circuits
Specifications
Item Specifications Six relays with solenoid driver voltages Five relays with dry contacts only One relay with 7 A rating Rated voltage on relays Max load current a: b: a: b: c: Max response time on Max response time off H1C contact feedback threshold Nominal 125 V dc or 24 V dc Nominal 120 V ac or 240 V ac 0.6 A for 125 V dc operation 3.0 A for 24 V dc operation 3.0 A for 115/230 V ac, 50/60 Hz operation Number of relay channels on one 12: TRLY board
25 ms typical 25 ms typical 70-145 V dc, nominal 125 V dc, threshold 45 to 65 V dc 90-132 V rms, nominal 115 V rms, 47-63 Hz, threshold 45 to 72 V ac 190-264 V rms, nominal 230 V rms, 47-63 Hz, threshold 45 to 72 V ac
H2C contact feedback threshold Max response time off Contact material Contact life Fault detection
16-32 V dc, nominal 24 V dc, threshold 10 to 16 V dc 25 ms typical Silver cad-oxide Electrical operations: Mechanical operations: 100,000 10,000,000
Loss of relay excitation current NO contact voltage disagreement with command Unplugged cable or loss of communication with I/O board; relays de-energize if communication with associated I/O board is lost
Physical Size Temperature 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in) -30 to + 65C (-22 to 149 F)
Diagnostics
Configuration
TRLYH1D Relay Output with Servo Integrity Sensing

The Relay Output with Solenoid Integrity Sensing (TRLYH1D) terminal board holds six plug-in magnetic relays. The six relay circuits are Form-C contact outputs, powered and fused to drive external solenoids. A standard 24 V dc or 125 V dc source can be used. The board provides special feedback on each relay circuit to detect a bad external solenoid. Sensing is applied between the NO output terminal and the SOL output terminal. TRLYH1D is similar to the standard TRLYH1B board except for the following: There are only six relays. The board is designed for 24/125 V dc applications only. Relay circuits have a NO contact in the return side as well as the source side. The relays cannot be configured for dry contact use. Input relay coil monitoring is removed. The terminal board provides monitoring of field solenoid integrity. There is no special-use relay for driving an ignition transformer.
Mark VI Systems
In the Mark* VI systems, the TRLY is controlled by the VCCC or VCRC board and supports simplex and TMR applications. Cables with molded plugs connect the terminal board to the VME rack where the I/O boards are mounted. Connector JA1 is used on simplex systems, and connectors JR1, JS1, and JT1 are used for TMR systems.
Mark VIe Systems

In the Mark VIe systems, the TRLY works with the PDOA I/O pack and supports simplex and TMR applications. PDOA plugs into the DC-37 pin connectors on the terminal board. Connector JA1 is used on simplex systems, and connectors JR1, JS1, and JT1 are used for TMR systems.
Normal power source 24/125 V dc (14 A) Barrier type terminal blocks can be unplugged from board for maintenance x
Power, daisy chain JF2 X JT1
Alternate power source (14 A)
JF1
6 Relay Outputs
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
TB3
J - Port Connections: JS1 Plug in PDOA I/O Pack(s) for Mark VIe system or Fuses Output Relays JA1 JR1 Cables to VCCC/VCRC boards for Mark VI; The number and location depends on the level of redundancy required.
TB1
Shield bar
TRLYH1D Relay Output Terminal Board
Installation
Connect the wires for the six relay outputs directly to the TB1 terminal block on the terminal board as shown in the figure, TRLYH1D Terminal Board Wiring. The block is held down with two screws and has 24 terminals accepting up to #12 AWG wires. A shield terminal strip, attached to chassis ground, is located immediately to the left of the terminal block.
Connect the solenoid power for outputs 1-6 to JF1. JF2 can be used to daisy-chain power to other TRLYs. Alternatively, power can be wired directly to TB3 when JF1/JF2 are not used.
N125/110/24 V dc Power source + JF1 JF2 Alternate customer + power source
TB3
Relay Output Terminal Board TRLYH1D

x
1 3
1 3
x 4
x 3
x 2
x 1
JT1
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
Relays + Output 01 (NC) Output 01 (NO) FU1 Out 01 FU7 Output 02 (NC) + Output 02 (NO) Output 03 (NC) FU2 Out 02 FU8 Output 03 (NO) + Output 04 (NC) FU3 Out 03 FU9 Output 04 (NO) + Output 05 (NC) FU4 Out 04 FU10 Output 05 (NO) + Output 06 (NC) FU5 Out 05 FU11 Output 06 (NO) + FU6 Out 06 FU12 Fuses Fuses Pos, High Neg,return
J - Port Connections: JS1 Plug in PDOA I/O Pack(s) for Mark VIe system or Cables to VCCC/VCRC boards for Mark VI; The number and location depends on the level of redundancy required.
Wiring to six external solenoids
JA1
JR1
TRLYH1D Terminal Board Wiring
Operation
The six relays have a MOV and clamp diode for transient suppression between the NO and power return terminals. The relay outputs have a failsafe feature that votes to de-energize the corresponding relay when a cable is unplugged or communication with the associated I/O board is lost. TRLYH1D monitors each solenoid between the NO and SOL output terminals. When the relay is de-energized, the circuit applies a bias of less than 8% nominal voltage to determine if the load impedance is within an allowable band. If the impedance is too low or high for consecutive scans, an alarm feedback is generated. The contacts must be open for at least 1.3 seconds to get a valid reading.
110 or 125 V dc Solenoid Voltage
Announce Solenoid Failure? Yes Unknown No
(R_NOM = 644 )
Unknown
Yes
Solenoid Resistance
80
153
2.2 k
2.2 k
24 V dc Solenoid Voltage
Announce Solenoid Failure? Yes Unknown No
(R_NOM = 29 )
Unknown
Yes
Solenoid Resistance
11
148
153
TRLYH1D Solenoid Fault Announcement
For simplex operation, cables carry control signals and solenoid monitoring feedback voltages between the I/O board and TRLY through JA1. For TMR applications, relay control signals are fanned into TRLY from the three I/O processor boards R, S, and T through plugs JR1, JS1, and JT1. These signals are voted and the result controls the corresponding relay driver. Power for the relay coils comes in from all three I/O boards and is diode-shared. The following figure shows TRLYH1D in a TMR system.
Relay Terminal Board - TRLYH1D Alternate power source (14 A)
TB3
1 2 3 4
P125/24 V dc
FU7
Normal power source, pluggable 24 V dc or 110 V dc or 125 V dc (14 Amp) Power daisy-chain
JF1 1
3
N125/24 V dc
FU1
K1
4
Field solenoid
+ -
3.15 Amp slow-blow

Fuse Fdback Monitor Select
K1
Sol TB1
JF2
1 3
JA1
Solenoid Integrity Monitor
R I/O Processor
24 kHz from Power Supply Relay Control JR1 P28V

Relay Driver
Coil K#
ID

ID
RD 6 of the above circuits

ID
TRLYH1D Circuits, TMR System
Specifications
Item Number of relay channels Rated voltage on relays Relay contact rating for 24 V dc voltage Specification Six relays with special customer solenoid monitoring Nominal 125 V dc or 24 V dc Current rating 10 A, resistive Current rating 2 A, L/R = 7 ms, without suppression
Relay contact rating for 125 V dc Current rating 0.5 A, resistive voltage Current rating 0.2 A, L/R = 7 ms, without suppression Current rating 0.65 A, L/R = 150 ms, with suppression (MOV) across the load Maximum response time on Maximum response time off Contact life Board size Fault detection 25 ms typical 25 ms typical Electrical operations: 100,000 17.8 cm by 33.0 cm (7 in by 13 in) Loss of solenoid voltage supply (fuse monitor) Solenoid resistance measured to detect open and short circuits Unplugged cable or loss of communication with I/O board (relays de-energize if communication with associated I/O board is lost) Physical Size Temperature 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in) -30 to +65C (-22 to +149 F)
Diagnostics
Configuration
TRLYH1E Solid-State Relay Output

The solid-state Relay Output (TRLYH1E) terminal board is a 12-output relay board using solid-state relays for the outputs and featuring isolated output voltage feedback on all 12 circuits. The solid-state relays allow the board to be certified for Class 1 Division 2 applications. The use of solid-state relays requires three different board types: TRLYH1E for 115 V ac applications TRLYH2E for 24 V dc applications TRLYH3E for 125 V dc applications
Unlike the form-C contacts provided on the mechanical relay boards, all 12 outputs on TRLYH1E are single, NO, contacts. There is no user solenoid power distribution on the board.
Mark VI Systems
In the Mark* VI system, the TRLY is controlled by the VCCC or VCRC board and supports simplex and TMR applications. Cables with molded plugs connect the terminal board to the VME rack where the I/O boards are mounted. Connector JA1 is used on simplex systems, and connectors JR1, JS1, and JT1 are used for TMR systems.
Mark VIe Systems

x
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
MV Relay MV Relay MV Relay MV Relay MV Relay MV
X JT1
MV MV
Relay Relay
J - Port Connections: JS1 Plug in PDOA I/O Pack(s) for Mark VIe system or Cables to VCCC/VCRC boards for Mark VI; JA1 JR1 The number and location depends on the level of redundancy required.
12 Relay Outputs
TB1
MV Relay
MV Relay
Relay MV
MV Relay
Relay
Shield bar
Solid-State Output Relays
TRLYH1E Solid-State Relay Output Terminal Board
Installation
Connect the wires for the 12 solenoids directly to the I/O terminal block on the terminal board as shown in the figure, TRLYH1E Terminal Board Wiring. The terminal block is held down with two screws and has 24 terminals accepting up to #12 AWG wires. The dc relays are unidirectional, so care should be taken about polarity when connecting load to these relays. A shield terminal strip attached to chassis ground is located immediately to the left of each terminal block. The solenoids must be powered externally by the customer.
Solid-State Relay Output Terminal Board TRLYH1E
JT1
COM1 (NEG) NO1 (POS) COM2 (NEG) NO2 (POS)) COM3 (NEG) NO3 (POS) COM4 (NEG) NO4 (POS) COM5 (NEG) NO5 (POS) COM6 (NEG) NO6 (POS)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
COM7 (NEG) NO7 (POS) COM8 (NEG) NO8 (POS) COM9 (NEG) NO9 (POS) COM10 (NEG) NO10 (POS) COM11 (NEG) NO11 (POS) COM12 (NEG) NO12 (POS)
MV Relay MV Relay
Relay Relay
MV MV
MV Relay
JS1
J - Port Connections: Plug in PDOA I/O Pack(s) for Mark VIe system or Cables to VCCC/VCRC boards for Mark VI;
MV Relay
Wiring to 12 external solenoids
MV MV Relay MV MV Relay MV MV Relay Relay Relay Relay
JA1
JR1
TRLYH1E Terminal Board Wiring
Operation
NO solid-state relays, relay drivers, and output monitoring are mounted on TRLYH1E. During power up, relays stay de-energized while connected to any control. The relay outputs have a failsafe feature that votes to de-energize the corresponding relay when a cable is unplugged or communication with the associated I/O processor is lost. For simplex operation, control signals and relay output voltage feedback signals pass between the I/O processor and TRLY through JA1. For TMR applications, relay control signals are fanned into TRLY from the three I/O processors R, S, and T through plugs JR1, JS1, and JT1. These signals are voted and the result controls the corresponding relay driver. Power for the relay drivers comes in from all three I/O processors and is diode-shared. The following figure shows TRLYH1E in a TMR system.
Relay Terminal Board - TRLYH1E

JA1
Contact Sensing/ Input Sensing
R I/O Processor
ID
JR1
P28V NO SolidState Relay COM
Solenoid Supply
Relay Control
ID
JS1
Relay Voting
Relay Driver
To S I/O Processor
ID
TB1 JT1 12 of the above circuits
Coil GND
To T I/O Processor
ID
TRLYH1E Circuits, TMR System
Contact Voltage Feedback

In TRLYH1E, isolated feedback of voltage sensing is connected to the relay outputs. This allows the control to observe the voltage across the relay outputs without a galvanic connection. One contact sensing circuit is provided with each relay. This feature is similar to the voltage sensing on TRLYH1C but with simpler hardware. The voltage sensing circuit allows a small leakage current to pass to power the isolated circuit. The typical leakage current is the sum of the leakage through the turned off solid-state relay and the current through the voltage sensing circuit. The following charts indicate the typical leakage current as a function of the applied voltage for the three board types.
TRLYH1E Typical Off-State Leakage Current-mA RMS
25.0 0 20.0 0 15.0 0 10.0 0 5.0 0 0.0 0
Typical leakage current mA RMS
4 0
5 0
6 0
7 0
8 0
9 0
10 0
11 0
12 0
13 0
14 0
Input Voltage across contacts V RMS
TRLYH2E Typical Off-State Leakage Current

3.50 3.00 2.50 Leakage mA .. 2.00 1.50 1.00 0.50 0.00 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Applied Voltage
TRLYH3E Typical Off-State Leakage Current

3.00
2.50
Leakage mA ..
2.00
1.50
1.00
0.50
0.00 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 Applied Voltage
Due to the permitted leakage current, the board may give false indications if used in series with a low input current load, including common contact input circuits such as those found on TBCI or STCI. To ensure correct operation, the maximum load resistances for the three board types are as follows: TRLYH1E: Maximum load resistance at nominal 115 V ac is 2.5 k. TRLYH2E: Maximum load resistance at nominal 24 V dc is 4.5 k. TRLYH3E: Maximum load resistance at nominal 125 V dc is 25 k.
Load resistance may be decreased by applying a resistor in parallel with the load so the parallel combination satisfies the maximum resistance requirement.
Contact Voltage Rating

Solid-state relays have a finite transient voltage capability and require coordinated voltage protection. TRLYH1E for ac applications uses a load control device that turns off on a current zero crossing. This turn-off characteristic ensures that no inductive energy is present in the load at turn-off time. Basic protection of the ac relay is provided on TRLYH1E using a MOV with clamp voltage coordinated with relay voltage rating. In addition, there is an R-C snubber circuit on the relay output using a 56 resistor in series with a 0.25 F capacitor. Both the TRLYH2E (for 24 V dc applications) and the TRLYH3E (for 125 V dc applications) can interrupt currents in large inductive loads. Because a wide range of loads may be encountered, an appropriate R-C or diode snubber circuit must be selected for each application. The snubber should be applied at the load device using common engineering practices. If the applied snubber does not fully control inductive switching voltage transients, both board versions contain an active voltage clamp circuit. This circuit activates at approximately 50-55 V dc for the H2E and at approximately 164-170 V dc for the H3E (both values below the rating of the relay). While the clamp circuit has a finite ability to absorb energy, it can handle the wiring inductance of a resistive load.
Specifications
Item Number of relay channels on one TRLY board Specification 12 relays: 115 V ac operation with TRLYH1E 24 V dc operation with TRLYH2E 125 V dc operation with TRLYH3E Maximum operating voltage 1E: 250 V rms at 47-63 Hz. 10 A @25C (77 F) maximum and maximum load current de-rate current linearly to 6 A @ 65C (149 F) maximum with free convection air flow 2E: 28 V dc 10 A dc @40C (104 F) maximum de-rate current linearly to 7 A dc @65C (149 F) maximum 3E: 140 V dc Maximum off state leakage (see charts of leakage vs. applied voltage) Max response time on Max response time off Relay MTBF 1E: 2E: 3E: 3 mA rms 3 mA A dc at 55 V 2.5 mA A dc 3 A dc@40C (104 F)maximum de-rate current linearly to 2 A dc @65C (149 F)maximum
1 ms for dc relays; cycle for ac relay 300 micro seconds for dc relays; cycle for ac relay 1E: 2E: 3E: 50 years 37 years 47 years 115 V ac 24 V dc 125 V dc 70 V 10% ac rms 15 V 2 V dc 79 V 10% dc
Relay contact voltage sensing threshold Operating temperature range Operating humidity Fault detection
1E: 2E: 3E:
-30 to 65C (-22 to +149 F) 5 to 95% non-condensing Relay current disagreement with command Unplugged cable or loss of communication with I/O board; relays de-energize if communication with associated I/O board is lost
Diagnostics
Configuration
TRLYH1F Relay Output with TMR Contact Voting

The Relay Output with TMR contact voting (TRLYH1F) terminal board provides 12 contact-voted relay outputs. The board holds 12 sealed relays in each TMR section, for a total of 36 relays. The relay contacts from R, S, and T are combined to form a voted Form A (NO) contact. 24/125 V dc or 115 V ac can be applied.
Note TRLYH1F and H2F do not support simplex arrangements

TRLYH1F does not have power distribution. However, an optional power distribution board, IS200WPDFH1A, can be added so that a standard 125 V dc or 115 V ac source, or an optional 24 V dc source with individual fuses, can be provided for field solenoid power. TRLYH2F is same as TRLYH1F except that the voted contacts form a Form B (NC) output. Both boards can be used in Class 1 Division 2 applications.
Mark VI Systems
In the Mark* VI system, the TRLY is controlled by the VCCC, VCRC, or VGEN board and only supports TMR applications. Cables with molded plugs connect JR1, JS1, and JT1 to the VME rack where the I/O boards are mounted.
Mark VIe Systems

In the Mark VIe system, the TRLY works with PDOA I/O pack and only supports TMR applications. Three TMR PDOA packs plug into the JR1, JS1, and JT1 37-pin D-type connectors on the terminal board.
DC-64 pin connector for optional power distribution daughterboard x
x x x x x x x x x x
TB1
J1
12 Relay Outputs
x x
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
JT1
DC-37 pin connector for I/O processor
K1R
K1S
K1T
18 sealed relays
JS1
J - Port Connections: Plug in 3 PDOA I/O Packs for Mark VIe system or Cables to VCCC/VCRC or VGEN boards for Mark VI system
TB2
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
18 sealed relays JR1
K12R
K12S
K12T
J2
Shield bar
DC-64 pin connector for optional power distribution daughterboard
TRLYH1F Relay Output Terminal Board
Installation
Connect the wires for the 12 solenoids directly to two I/O terminal blocks on the terminal board as shown in the following figure, TRLYH1F Terminal Board Wiring. Each block is held down with two screws and has 24 terminals accepting up to #12 AWG wires. A shield termination strip attached to chassis ground is located immediately to the left side of each terminal block. Solenoid power for outputs 1-12 is available if the WPDF daughterboard is used. Alternatively, power can be wired directly to the terminal block.
Relay Output Terminal Board TRLYH1F
Wiring connections
x
J1
JT1
K1T
DC-64 pin connector for optional power distribution daughterboard WPDF DC-37 pin connector for I/O processor
K1b FPR1 K2b FPR2 K3b FPR3 K4b FPR4 K5b FPR5 K6b FPR6
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
FPO1 K1a FPO2 K2a FPO3 K3a FPO4 K4a FPO5 K5a FPO6 K6a
K1R
K1S
JS1 18 sealed relays
J - Port Connections: Plug in three PDOA I/O Packs for Mark VIe system or Cables to VCCC/VCRC or VGEN boards for Mark VI system
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
K12R
K12S
K12T
J2 Signal Name Description, n=1...12 FPOn FPRn Kna Knb Fused Power Out #n Fused Power Return #n Resulting voted relay contact #n Resulting voted relay contact #n
TRLYH1F Terminal Board Wiring
64-pin connector for optional power distribution daughterboard WPDF
Power Distribution Board

If using the optional WPDF power distribution board, mount it on top of TRLY on the J1 and J2 connectors. Secure WPDF to TRLY by fastening a screw in the hole located at the center of WPDF. Connect the power for the two sections of the board on the three-pin connectors J1 and J4. Power can be daisy-chained out through the adjacent plugs, J2 and J3.
3 1 3 1
J2 Output power daisy chain

FU1 FU13
J1 P1
Input power
Plug DC-62 pin connector into J1 on TRLY
FU6
FU18
TRLYH1F Board
Fasten WPDF to TRLY with screw

FU19 FU7

FU24 FU12
Output power daisy chain J3

3 1 3
P2 J4
1
Input power
WPDF Power Distribution Board
The solenoids must be wired as shown in the following figure. If WPDF is not used, the customer must supply power to the solenoids.
TRLYH1F Customer Solenoid
FPO1 K1b K1a FPR1 1 2 3 4 5 6
WPDF Daughter Board J2 J1 Power Input, section 1
+
Vfb
+
Vfb
Output #2
7 8
P1
Wiring to Solenoid using WPDF
Operation
The 28 V dc power for the terminal board relay coils and logic comes from the three I/O processors connected at JR1, JS1, and JT1. The same relays are used for ac voltages and dc voltages, as specified in the Specifications section. H1F and H2F use the same relays with differing circuits. Relay drivers are mounted on the TRLYH1F and drive the relays at the frame rate. The relay outputs have a failsafe feature that votes to de-energize the corresponding relay when a cable is unplugged or communication with the associated I/O board or I/O pack is lost. This board only supports TMR applications. The relay control signals are routed into TRLY from the three I/O processors R, S, and T through plugs JR1, JS1, and JT1. These signals directly control the corresponding relay driver for each TMR section R, S, and T. Power for each sections relay coils comes in from its own I/O processor and is not shared with the other sections. TRLYH1F features TMR contact voting. The relay contacts from R, S, and T are combined to form a voted Form A (NO) contact. 24/125 V dc or 115 V ac can be applied. TRLYH2F is the same except that the voted contacts form a Form B (NC) output. The following figure shows TMR voting contact circuit.
Relay control Driver feedback
V V V
Contact voting circuit R S T R T S S R T
Normally Open contacts
TRLYH1F Contact Arrangement for TMR Voting
Field Solenoid Power Option

The WPDFH1A daughterboard supplies power to TRLYH#F to power solenoids. WPDF holds two power distribution circuits, which can be independently used for standard 125 V dc, 115 V ac, or 24 V dc sources. Each section consists of six fused branches that provide power to TRLYH#F. Each branch has its own voltage monitor across its secondary fuse pair. Each voltage detector is fanned to three independent open-collector drivers for feedback to each of the I/O processors R, S, and T. WPDF should not be used without TRLYH#F. Fused power flows through this board down to the TRLY terminal board points. TRLY controls the fuse power feedback. The following figure shows TRLYH1F/WPDF solenoid power circuit.
WPDF Daughterboard Pwr. Output daisy chain J2 J1
Fuse
Power Input, section 1
Output #1
1 2 3 4 5 6 7 8
+
Vfb
Voltage sense Fuse
+
Vfb
Output #2
P1 TRLYH1F Terminal Board 6 circuits P2
+
Vfb
Fuse Voltage sense Fuse
+
Vfb
6 circuits Pwr. Output daisy chain J3 J4 Power Input, section 2
Solenoid Power Supply WPDF
Specifications
Item Number of output relay channels Board types Specification 12 H1F: H2F: Rated voltage on relays Maximum load current a: b: a: b: c: Maximum response time on Contact life Fault detection 25 ms Electrical operations: 100,000 Coil Voltage disagreement with command Blown fuse indication (with WPDF power daughterboard). Unplugged cable or loss of communication with I/O board; relays de-energize if communication with associated I/O board is lost. WPDF Solenoid Power Distribution Board Number of Power Distribution 2: Circuits (PDC) Number of Fused Branches Fuse rating Voltage monitor, maximum response delay Voltage monitor, minimum detection voltage Voltage monitor, max current (leakage) Physical Size - TRLY Size - WPDF Temperature Technology 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in) 10.16 cm wide x 33.02 cm high (4.0 in x 13.0 in) -30 to + 65C (-22 to +149 F) Surface-mount Each rated 10 A, nominal 115 V ac or 125 V dc. NO contacts NC contacts Nominal 100/125 V dc or 24 V dc Nominal 115 V ac 0.5/0.3 A resistive for 100/125 V dc operation 5.0 A resistive for 24 V dc operation 5.0 A resistive for 115 V ac
12: 6 for each PDC 3.15 A at 25C (77 F) 2.36 A recommended maximum usage at 65C (149 F) 60 ms typical 16 V dc 72 V ac 3 mA
Diagnostics
Diagnostic tests to components on the terminal boards are as follows: The voltage to each relay coil is monitored and checked against the command at the frame rate. If there is no agreement for two consecutive checks, an alarm is latched. The voltage across each solenoid power supply is monitored and if it goes below 16 V ac/dc, an alarm is created. If any one of the outputs goes unhealthy a composite diagnostic alarm, L3DIAG_xxxx occurs. When an ID chip is read by the I/O processor and a mismatch is encountered, a hardware incompatibility fault is created. Each terminal board connector has its own ID device that is interrogated by the I/O board. The connector ID is coded into a read-only chip containing the board serial number, board type, revision number, and the JR1/JS1/JT1 connector location.
Details of the individual diagnostics are available from the configuration application. The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal if they go healthy.
Configuration
DRLY Simplex Relay Output

The Simplex Relay Output (DRLY) terminal board is a compact relay output terminal board designed for wall mounting (not DIN-rail mounting). The board has 12 form-C dry contact output relays and connects to the VCCC, VCRC, or VTUR processor board with a single cable. The 37-pin cable connector is identical to those used on the larger TRLY terminal board. Two DRLY boards can be connected to VCCC, VCRC, or VTUR for a total of 24 contact outputs. Only a simplex version of this board is available. There are two versions of the DRLY terminal board: H1A has higher powered relay contacts than H1B. H1B is suitable for use in UL listing for Class I, Division 2 Hazardous (classified) locations.
Note DRLY does not work with the PDOA I/O Pack.
Installation
Note DLRY does not have a shield terminal strip.
Mount the DRLY board by fastening screws to wall through the four mounting holes in the corners of metal support plate. Connect the wires for the 12 relay outputs directly to the odd-numbered screws on the terminal blocks. The high-density EuroBlock type terminal blocks plug into the numbered receptacles on the board. The two screws on TB2 are provided for the SCOM (chassis ground) connection, which should be as short a distance as possible.
Note SCOM, TB2, must be connected to chassis ground.

Screw Connections Output 1 (NC) Output 1 (COM) Output 1 (NO) Output 2 (NC) Output 2 (COM) Output 2 (NO) Output 3 (NC) Output 3 (COM) Output 3 (NO) Output 4 (NC) Output 4 (COM) Output 4 (NO) Output 5 (NC) Output 5 (COM) Output 5 (NO) Output 6 (NC) Output 6 (COM) Output 6 (NO) 1 TB1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 1 2 TB2 SCOM K7 K1 K8 K2 K9 K3 K10 K4 K11 K5 K12 K6 JR1 P28 OK LED Screw Connections Output 7 (NC) Output 7 (COM) Output 7 (NO) Output 8 (NC) Output 8 (COM) Output 8 (NO) Output 9 (NC) Output 9 (COM) Output 9 (NO) Output 10 (NC) Output 10 (COM) Output 10 (NO) Output 11 (NC) Output 11 (COM) Output 11 (NO) Output 12 (NC) Output 12 (COM) Output 12 (NO)
37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72
Cable from J3 or J4 on I/O rack, from I/O processor board
LED relay state indicator 37-pin "D" shell connector
Mounting holes
DRLY Wiring and Cabling
Operation
DRLY does not include solenoid source power. There is one set of dry contacts per relay, with two NO contacts in series. Unlike TRLY, there is no on-board suppression, and no relay state monitoring. The I/O board (VCCC, VCRC, or VTUR) provides the 28 V dc power for the relay coils, which is indicated with a green LED. DRLY has a yellow LED for each relay that indicates voltage across the coil. With an unconnected control cable, the relays default to a de-energized state.
Note Three relays on DRLY can be controlled by VTUR using the DTRT transition board. Six relays can be controlled if two DTURs are used.
DRLY Board JR1 From J3 or J4 on I/O rack, from I/O processor board P28V P28 OK Relay Driver RD LED COIL 3 COM 5 TB2 1 2 SCOM NO TB1 1 NC Output 1 of 12 dry contact outputs
ID
DRLY Board Circuits
DRLYH1A Specifications
Item Number of relay outputs and type Relay contact rating Specification 12 relays, nominal 24 V dc coil. Two-pole double throw with Form C contacts containing two NO and 2 NC contacts Resistive: 28 V dc: 10 A Inductive: 28 V dc: 120 V ac: 240 V ac: 125 V dc: 2 A, L/R = 7 ms, without suppression 2 A, PF= 0.4, 10 A inrush, no suppression Motor load 1/3 Hp. 2 A, PF= 0.4, 10 A inrush, no suppression Motor load Hp. 0.2 A, L/R = 7 ms without suppression 125 V dc: 0.65 A, L/R = 150 ms, MOV suppression by others (with two contacts in series on the same relay) Suppression Relay response time External suppression will be supplied by customer Operate: 15 ms typical Release: 10 ms typical Fault detection in I/O board The state of the P28 V dc is monitored using a green LED at the top of the board. Voltage across each relay coil is indicated with a yellow LED. There is no relay state monitoring in the VCCC or VCRC Physical Size Temperature 21.59 cm long x 20.57 cm wide (8.5 in x 8.1 in wide) 0 to 60C (32 to 140 F)
120 V ac: 10 A 240 V ac: 3 A 125 V dc: 0.5 A
DRLYH1B Specifications
Item Number of relay outputs Relay type Relay contact rating (resistive load) Specification 12 relays, nominal 24 V dc coil Two-pole double throw with Form C contacts containing two NO and 2 NC contacts. UL listed, CSA certified, sealed to UL 1604 28 V dc: 125 V dc: 120 V ac: 240 V ac: Suppression Relay response time Fault detection in I/O board Agency requirements Physical Size Temperature 21.59 cm long x 20.57 cm wide, (8.5 in x 8.1 in) 0 to 75C (32 to 167 F) Operate: Release: 2A 1A 0.5 A 3 ms typical 2 ms typical Max operating voltage: 250 V rms, 220 V dc 2 A dc, 1 A rms Max switching capacity: 125 VA, 60 W 0.5 A Max operating current:
External suppression will be supplied by customer
The state of the P28 V dc is monitored using a green LED at the top of the board Voltage across each relay coil is indicated with a yellow LED There is no relay state monitoring in the I/O board UL listed Class I, Division. 2 applications, CSA, and CE, also approvals listed in table above for TRLYH1A
Diagnostics
The board contains the following diagnostics; there is no relay state monitoring. The terminal board connector has an ID device that is interrogated by the I/O board. The connector ID is coded into a read-only chip containing the board serial number, board type, and revision number. When this chip is read by VCCC/VCRC or VTUR and a mismatch is encountered, a hardware incompatibility fault is created. The voltage across each relay coil is indicated with a yellow LED. The 28 V supply to the board is indicated with a green LED.
Configuration
Notes

The VME Bus Master Controller (VCMI) board is the communication interface between the controller and the I/O boards, and the communication interface to the system control network, known as IONet. VCMI is also the VME bus master in the control and I/O racks, and manages the IDs for all the boards in the rack and their associated terminal boards. The two versions of the VCMI are shown in the following figure:
VCMI H1
x
VCMI H2
x
VCMI is OK
RUN FAIL STATUS RESET S E R I A L
Error or Power up Failure Pushbutton
RUN FAIL STATUS RESET S E R I A L M 8O D 4 U 2L 1E
VME bus to I/O boards and controller

BE TX RX CD I O N E T 3 TX
VME bus to I/O boards and controller
BE
8 4 2 1
M O D U L E
IONet node
IONet3 port 10Base2

R S T
R S T
Channel ID
RX CD I O N E T 2 TX RX CD I O N E T 2
TX RX CD
I O N E T 1
Transmitting Packets Receiving Packets Collisions on IONet
IONet2 port 10Base2
IONet port 10Base2
IONet1 port 10Base2
Communication board - 1 IONet
Communication board - 3 IONets
VCMI Boards, Single, and Triple Network Versions
VCMI Bus Master Controller 165
Multiple I/O racks can be connected to the IONet, each rack with its own VCMI board. The following figure shows three simplex system configurations with local and remote I/O using the VCMI.
V C M I U C V X
I/O Boards
Simplex system with local I/O UCVX is controller VCMI is bus master I/O are VME boards
R0
V C M I U C V X I/O Boards V C M I
R1
I/O Boards V C M I
R2
I/O Boards
Simplex system with local & remote I/O
IONet
Simplex System Configurations with Local and Remote I/O
166 VCMI Bus Master Controller
The following figure shows two sizes of triple modular redundant (TMR) systems. The first example is a small system where all the I/O is mounted in the VME control rack so no remote I/O racks are required. Each channel (R, S, T) has its own IONet, and the VCMI has three IONet ports. The second example is a larger system with remote I/O racks. Each IONet supports multiple I/O racks, but only one rack is shown here. All I/O channels (R, S, T) are identical in terms of I/O boards and points.
R0
V U C C M V I X I/O Boards V C M I U C V X
S0
I/O Boards V C M I U C V X
T0
I/O Boards
TMR system with local I/O UCVX is controller VCMI is bus master I/O are VME Termination boards not shown
IONet - R IONet - S IONet - T
R0
V U C C M V I X V C M I U C V X
S0
V C M I U C V X
T0
TMR system with remote I/O, Termination boards not shown
IONet - R IONet - S IONet - T
R1
V C M I I/O Boards V C M I
S1
I/O Boards V C M I
T1
I/O Boards
IONet supports multiple remote I/O racks
TMR System Configurations with Local and Remote I/O
The VCMI card receives analog and digital feedback of power status through the J301 backplane connector. J301 connections are as follows:
Backplane J301 Pin Signal VCMI Hardware VCMI Signal Description Signal Space VCMI Software Signal Space Description
1 2 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 26 27 28 29 30 31 32 33 34 35 36 37
P28AA PCOM SG201C28 SG201C27 SG201C26 SG201C25 SG201C24 SG201C23 SG201C22 SG201C21 SG201C20 SG201C19 SG201C18 SG201C17 PCOM P28AA SIGCOM02 N28 PCOM SG201A26 SG201A25 SG201A24 SG201A23 SG201A22 SG201A21 SG201A20 SG201A19 SG201A18 SG201A17 SIGCOM01 CBL301ID CBL301ID AIN2P AIN2N AIN1P AIN1N DIN6 DIN5 DIN4 DIN3 DIN2 DIN1 AIN4P AIN4N AIN3P AIN3N DINRET DINPWROUT DIN12 DIN11 DIN10 DIN9 DIN8 DIN7
+28 V Power out Power common Analog input 4 + Analog input 4 Analog input 3 + Analog input 3 Digital input Power common Digital input Power output Digital input 12 Digital input 11 Digital input 10 Digital input 9 Digital input 8 Digital input 7 Power common +28 V Power out SCOM-DCOM JP2 Select -28 V Power out Power common Analog input 2 + Analog input 2 Analog input 1 + Analog input 1 Digital input 6 Digital input 5 Digital input 4 Digital input 3 Digital input 2 Digital input 1 SCOM-DCOM JP1 Select ID Cable signal Logic_In_6 Logic_In_5 Logic_In_4 Logic_In_3 Logic_In_2 Logic_In_1 Fuse 32, J20 Fault Fuse 31, J19 Fault Miscellaneous contact AC2 source fault AC1 source fault Battery bus fault P125_Grd P125 with respect to ground N125_Grd N125 with respect to ground Logic_In_12 Logic_In_11 Logic_In_10 Logic_In_9 Logic_In_8 Logic_In_7 Spare 05 Spare 04 Spare 03 Spare 02 Spare 01 Fuse 29, J17 Fault Spare 02 Spare 01 Analog spare 02 Analog spare 01
Specifications
Item Specification
Board Type Processor Memory
6U high VME board, 0.787 inch wide Texas Instruments TMS320C32 32-bit digital signal processor Dual-port memory, 32 Kbytes in 32-bit transfer configuration SRAM, 256k x 32 Flash memory, 512k x 8-VCMIH_B; 4096K x 8-VCMIH_C
Communication
H1 version: One IONet 10Base2 Ethernet port, BNC connector, 10 Mbits/sec H2 version: Three IONet 10Base2 Ethernet ports, BNC connectors, 10 Mbits/sec VME bus block transfers 1 RS-232C Serial port, D-style plug connector, 9600 (only)
Frame Rate
10 ms (100 Hz) for simplex 40 ms (25 Hz) for TMR 20 ms, 80 ms application dependent
Diagnostics
The internal +5 V, 12 V, 15 V, and 28 V power supply buses are monitored and alarmed. The alarm settings are configurable and usually set at 3.5%, except for the 28 V supplies, which are set at 5.5%. Diagnostic signals from the power distribution module (PDM), connected through J301, are also monitored. These include ground fault and over/under voltage on the P125 V bus, two differential 5V dc analog inputs, P28A and PCOM for external monitor circuits, and digital inputs.
Configuration
VCMI Toolbox Configuration (Part 1 of 2)
Parameter
Description
Choices
Configuration System Limits PS_Limit1 PS_Limit2 PwrBusLimits 125 vBusHlim 125 vBusLlim 125 vBusGlim J3 Power Monitor Logic_In_1 Logic_In P125_Grd Input Type Low_Input Low_Value Enable or disable all system limits Power supply limits for P5, P15, N15 in % Power supply limits for P12, N12, P28, N28 in percent Enable or disable power bus diagnostics High limit for 125 V dc bus in volts Low limit for 125 V dc bus in volts Low volts to ground limit for 125 V dc bus (diagnostic) PDM monitor First of 12 logical inputs board point signal Configurable item P125 with respect to ground board point signal Type of analog input Input volts at low value Input value in engineering units at low MA Enable, disable 0 to 10 0 to 10 Enable, disable 0 to 150 0 to 150 0 to 150 Connected, not connected Point edit (input BIT) Used, unused Point Edit (Input FLOAT) Used, unused -10 to +10 -3.4082e+038 to 3.4028e+038
Parameter
Description
Choices
High_Input High_Value Input _Filter TMR_DiffLimit Sys_Lim_1_Enabl Sys_Lim_1_Latch Sys_Lim_1_Type Sys_Lim_1 Sys_Lim_2 N125_Gnd Spare 01 Spare 02
Input volts at high value Input value in engineering units at high MA Bandwidth of input signal filter in Hz Difference limit for voted TMR inputs in % of highlow values Enable system limit 1 fault check Input fault latch Input fault type Input limit in engineering units Same as above for Sys Lim 1 Same as for P125_Grd board point signal Similar to P125_Grd board point signal Similar to P125_Grd board point signal
VCMI Toolbox Configuration (Part 2 of 2)
-10 to +10 -3.4082e+038 to 3.4028e+038 Unused, 0.75 Hz, 1.5 Hz, 3 Hz, 0 to 10 Enable, disable Latch, unlatch Greater than or equal Less than or equal -3.4082e+038 to 3.4028e+038 Same as for Sys_Lim_1 Same as for P125_Grd Similar to P125_Grd Similar to P125_Grd
Parameter
Description
Choices
Board Point Signal L3Diag_VCMI1 L3Diag_VCMI2 L3Diag_VCMI3 SysLimit1-1 SysLimit1-2 SysLimit1-3 SysLimit1-4 SysLimit1_125 SysLimit2-1 SysLimit2-2 SysLimit2-3 SysLimit2-4 SysLimit2_125 P125Bus ResetSYS ResetDIA ResetSuicide MasterReset Logic_In_1 Logic_In_2 Logic_In_3 Logic_In_4 Logic_In_5 Logic_In_6 Logic_In_7 Logic_In_8 Logic_In_9 Logic_In_10 Logic_In_11 Logic_In_12 P125_Grd
Description - Point Edit (Enter Signal Connection) Board diagnostic Board diagnostic Board diagnostic P125_Grd N125_Grd Spare 01 Spare 02 P125 bus out of limits P125_Grd N125_Grd Spare 01 Spare 02 P125 bus out of limits System limit reset Suicide reset Battery bus fault AC1 source fault AC2 source fault Misc contact Fuse 31, J19 fault Fuse 32, J20 fault Fuse 29, J17 fault Spare 01 Spare 02 Spare 03 Spare 04 Spare 05 P125 with respect to ground, P3 28 to 29 (Input exceeds limit) (Input exceeds limit) (Input exceeds limit) (Input exceeds limit) (Input exceeds limit) (Input exceeds limit) (Input exceeds limit) (Input exceeds limit) (Input exceeds limit) (Input exceeds limit) (Special VCMI output to I/O bds)
Direction Input Input Input Input Input Input Input Input Input Input Input Input Input Input Output Output Output Output Input Input Input Input Input Input Input Input Input Input Input Input Input
Type BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT FLOAT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT FLOAT
Calc 125 V dc bus voltage (P125Grd - N125Grd) Diagnostic reset (Special VCMI output to I/O bds) (Special VCMI output to I/O bds) Master reset L86MR (Special VCMI out to I/O bds)
Parameter
Description
Choices
N125_Grd Spare01 Spare02
N125 with respect to ground, negative number, P3 26 to 27 Analog spare 01, P3 07 to 08 Analog spare 02, P3 05 to 06
Input Input Input
FLOAT FLOAT FLOAT
Alarms
1 2 3 4 16 17 18 19 20 21 22 23 24 25
SOE Overrun. Sequence of Events data overrun Flash Memory CRC Failure CRC Failure Override is Active Watchdog circuitry is not armed System Limit Checking is Disabled Board ID Failure J3 ID Failure J4 ID Failure J5 ID Failure J6 ID Failure J3A ID Failure J4A ID Failure Firmware/Hardware Incompatibility Board inputs disagree with the voted value
Communication problem on IONet Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online) Board firmware programming error (board is allowed to go online) System checking was disabled by configuration Failed ID chip on the VME I/O board Failed ID chip on connector J3, or cable problem Failed ID chip on connector J4, or cable problem Failed ID chip on connector J5, or cable problem Failed ID chip on connector J6, or cable problem Failed ID chip on connector J3A, or cable problem Failed ID chip on connector J4A, or cable problem Invalid terminal board connected to VME I/O board A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable. A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. A VME rack backplane wiring problem and/or power supply problem If "Remote Control", disable diagnostic and ignore; otherwise probably a back plane wiring or VME power supply problem. If "Remote Control", disable diagnostic and ignore; otherwise probably a VME backplane wiring and/or power supply problem. If "Remote I/O", disable diagnostic and ignore; otherwise probably a VME backplane wiring and/or power supply problem. If "Remote I/O", disable diagnostic and ignore; otherwise probably a VME backplane wiring and/or power supply problem. If "Remote Control", disable diagnostic and ignore; otherwise probably a VME backplane wiring and/or power supply problem. If "Remote Control", disable diagnostic and ignore; otherwise probably a VME backplane wiring and/or power supply problem.
30
ConfigCompatCode mismatch; Firmware: #, Tre: # The configuration compatibility code that the firmware is expecting is different than what is in the tre file for this board IOCompatCode mismatch; Firmware: #; Tre: # The I/O compatibility code that the firmware is expecting is different than what is in the tre file for this board P5=###.## Volts is Outside of Limits. The P5 power supply is out of the specified operating limits P15=###.## Volts is Outside of Limits. The P15 power supply is out of the specified operating limits N15=###.## Volts is Outside of Limits. The N15 power supply is out of the specified operating limits P12=###.## Volts is Outside of Limits. The P12 power supply is out of the specified operating limits N12=###.## Volts is Outside of Limits. The N12 power supply is out of the specified operating limits P28A=###.## Volts is Outside of Limits. The P28A power supply is out of the specified operating limits P28B=###.## Volts is Outside of Limits. The P28B power supply is out of the specified operating limits
31
32 33
34
35
36
37
38
Fault
Fault Description
Possible Cause
39
P28C=###.## Volts is Outside of Limits. The P28C power supply is out of the specified operating limits P28D=###.## Volts is Outside of Limits. The P28D power supply is out of the specified operating limits P28E=###.## Volts is Outside of Limits. The P28E power supply is out of the specified operating limits N28=###.## Volts is Outside of Limits. The N28 power supply is out of the specified operating limits 125 Volt Bus=###.## Volts is Outside of Limits. The 125-Volt bus voltage is out of the specified operating limits 125 Volt Bus Ground =###.## Volts is Outside of Limits. The 125-Volt bus voltage ground is out of the specified operating limits IONet-1 Communications Failure. Loss of communication on IONet1 IONet-2 Communications Failure. Loss of communication on IONet2 IONet-3 Communications Failure. Loss of communication on IONet3 VME Bus Error Detected (Total of ### Errors). The VCMI has detected errors on the VME bus Using Default Input Data, Rack R.#. The VCMI is not getting data from the specified rack Using Default Input Data, Rack S.#. The VCMI is not getting data from the specified rack Using Default Input Data, Rack T.#. The VCMI is not getting data from the specified rack Missed Time Match Interrupt (## uSec). The VCMI has detected a missed interrupt VCMI Scheduler Task Overrun. The VCMI did not complete running all its code before the end of the frame Auto Slot ID Failure (Perm. VME Interrupt). The VCMI cannot perform its AUTOSLOT ID function Card ID/Auto Slot ID Mismatch. The VCMI cannot read the identity of a card that it has found in the rack Topology File/Board ID Mismatch. The VCMI has detected a mismatch between the configuration file and what it actually detects in the rack Controller Sequencing Overrun Controller PCODE Version Mismatch between R,S,and T. R, S, and T have different software versions IONet Communications Failure. Loss of communications on the slave VCMI IONet VME Error Bit # (Total ## Errors). The VCMI has detected errors on the VME bus Controller Board is Offline. The VCMI cannot communicate with the controller I/O Board in Slot # is Offline. The VCMI cannot communicate with the specified board
If "Remote Control" disable diagnostic. Disable diagnostic if not used; otherwise probably a backplane wiring and/or power supply problem. If "Remote Control" disable diagnostic. Disable diagnostic if not used; otherwise probably a backplane wiring and/or power supply problem. If "Remote Control" disable diagnostic. Disable diagnostic if not used; otherwise probably a backplane wiring and/or power supply problem. If "Remote Control" disable diagnostic. Disable diagnostic if not used; otherwise probably a backplane wiring and/or power supply problem. A source voltage or cabling problem; disable 125 V monitoring if not applicable. Leakage or a fault to ground causing an unbalance on the 125 V bus; disable 125 V monitoring if not applicable. Loose cable, rack power, or VCMI problem Loose cable, rack power, or VCMI problem Loose cable, rack power, or VCMI problem The sum of errors 60 through 66 - Contact the factory. IONet communications failure - Check the VCMI and/or IONet cables. IONet communications failure - Check the VCMI and/or IONet cables. IONet communications failure - Check the VCMI and/or IONet cables. Possible VCMI hardware failure Possibly too many I/O
40
41
42
43
44
45 46 47 48 49 50 51 52 53
54 55 56
I/O board or backplane problem Board ID chip failed ID chip mismatch - Check your configuration
57 58 59 6066 67 6887
Too much application code used in controller. Reduce the code size. Error during controller download - revalidate, build, and download all 3 controllers. Loose cable, rack power, or VCMI problem (VCMI slave only) VME backplane errors - Contact factory. Controller failed or is powered down. I/O board is failed or removed. You must replace the board, or reconfigure the system and redownload to the VCMI, and reboot.
Fault
Fault Description
Possible Cause
88 89 90
U17 Sectors 0-5 are not write protected SRAM resources exceeded. Topology/config too large U54 Flashsectors #-## not write protected
Sectors not write protected in manufacturing. Contact the factory. The size of the configured system is too large for the VCMI. You must reduce the size of the system. Sectors not write protected in manufacturing. Contact the factory
Notes

The Generator Monitor and Trip (VGEN) board and the TGEN terminal board monitor the generator three-phase voltage and currents, and calculate three-phase power and power factor. For large steam turbine applications, VGEN provides the power load unbalance (PLU) and early valve actuation (EVA) functions, using fast acting solenoids located on a TRLY terminal board.
TGEN Terminal Board TB1
VGEN VME Board 37-pin "D" shell type connectors with latching fasteners
x RUN FAIL STAT
Current inputs & gen PT signals
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
JT1
JS1
Cable to VME rack T VME bus to VCMI
TB2 Cable to VME rack S
Gen CT signals
TB3
JR1
VGEN x
TB4
x
Connectors on VME rack R
J3
Shield bar
Cable to VME rack R J4
Cable to optional TRLY, for fast acting solenoids

Generator Terminal Board, Processor Board, and Cabling
VGEN Generator Monitor and Trip 175
Installation
To install the VGEN board 1 2 3
Power down the VME I/O processor rack. Slide in the VGEN board and push the top and bottom levers in with your hands to seat its edge connectors. Tighten the captive screws at the top and bottom of the front panel. These screws serve to hold the board firmly in place and enhance the board front ground integrity. The screws should not be used to actually seat the board.
Note Cable connection to the TGEN terminal board is made at the J3 connector on the lower portion of the VME rack. Cable connection to the optional TRLY terminal board is made at the J4 connector on the lower portion of the VME rack. J3 and J4 are latching type connectors to secure the cables. Power up the VME rack and check the diagnostic lights at the top of the front panel. For details, refer to the Diagnostics section in this document.
176 VGEN Generator Monitor and Trip
Operation
VGEN monitors two, three-phase potential transformer (PT) inputs, and three, onephase current transformer (CT) inputs. Using jumpers on TGEN, four analog inputs can be configured for 4-20 mA or 5, 10 V dc. VGEN performs signal conversions and power, power factor, and frequency calculations.
Note A single VGEN can be used for simplex operation, or three VGENs can be used for TMR operation.
<R> <S> <T>
Terminal Board TGEN

Analog inputs TB1 +24 Vdc +/-5,10 Vdc 4-20 ma Return
01 03 02 04
Controller
4 circuits per terminal board Noise suppression.

Current Limit
P28VV
P28V, R S T
Vdc
JP1A
20 ma
Generator Board VGEN
250 ohms
JP1B
Open 17 Return PCOM PCOM
115 V rms yields 1.5333 V rms, gen & bus
JR1
J3
Shown for <R> +28 Vdc

A/D
TB1 Generator 3-phase volts (115 Vac) Bus 3-phase volts (115 Vac) TB2 Current phase A (115 Vac) TB3 Current phase B (115 Vac) TB4 Current phase C (115 Vac)
A B C A B C H1 H2 L1 L2 H1 H2 L1 L2 H1 H2 L1 L2
18 19 20 21 22 23 24 01 02 03 04 01 02 03 04 01 02 03 04 TB4
Test Points TP-GA TP-GB TP-GC TP-BA TP-BB TP-BC

ID ID
JS1
J3
Buffer
To TRLY from <R> <S> <T>
Same for <S>

JT1
100 ohms 0.01% ID 100 ohms 0.01%
1:2000
TP-IA1 TP-IA2
J3
Same for <T>
1:2000
TP-IB1 TP-IB2
1:2000
TP-IC1 TP-IC2
100 ohms 0.01%
Connectors at bottom of VME racks 5 amp input yields 0.25 V rms (line-neutral) or 0.433 V rms (line-line)
Noise suppression
TGEN Board Showing Potential and Current Transformer Inputs
VGEN monitors generator three-phase power and supplies the PLU and EVA functions for large steam turbines. The generator and bus PT inputs are three-wire, open delta, voltage measurements that are used to calculate all three line-to-line voltages. They are not used for automatic synchronizing, which requires two separate single-phase PT inputs. Each PT input is magnetically isolated and is nominally 115 V rms.
Note Test points are provided for all PT and CT inputs to verify the phase in the field.
Three single-phase CT inputs are provided with a normal current range of 0 to 5 A continuous. The CTs are magnetically isolated on TGEN. CTs connect to nonpluggable terminal blocks with captive lugs accepting are up to #10 AWG wires. The following parameters are calculated from these inputs: Total Mwatts Total Mvars Total MVA Power factor Bus frequency (5 to 66 Hz)
Note High frequency and 50/60 Hz noise is reduced with an analog hardware filter.
The four analog inputs accept 4-20 mA inputs or 5, 10 V dc inputs. A +24 V dc source is available for all four circuits with individual current limits for each circuit. The 4-20 mA transducer can use the +24 V dc source from the turbine control or a self-powered source. A jumper on TGEN selects between current and voltage inputs for each circuit.
Specifications
Item Specification
Inputs to TGEN and VGEN
2 three-phase generator and bus PTs 3 one-phase generator CTs 4 analog inputs (4-20 mA, 5, 10 V dc)
Outputs from VGEN through TRLY Generator and bus voltages
12 relay outputs (for large steam turbines) Nominal 115 V rms with range of interest of 10 to 120% Nominal frequency 50/60 Hz with range of interest 45 to 66 Hz Magnetic isolation to 1,500 V rms and loading less than 3 VA Input measurement resolution is 0.1% Input accuracy is 0.5% of rated V rms from 45 to 66 Hz Input accuracy is 1.0% of rated V rms from 25 to 45 Hz Input loading less than 3 VA per circuit
Generator current inputs
Normal current range is 0 to 5 A with over-range to 10 A Nominal frequency 50/60 Hz with range of interest 45 to 66 Hz Magnetic isolation to 1,500 V rms Input accuracy 0.5% of full scale (5 A) with resolution of 0.1% FS Input burden less than 0.5 per circuit
Item
Specification
Analog inputs
Current inputs: Voltage inputs:
4-20 mA 5 V dc or 10 V dc
Transducers can be up to 300 m (984 ft) from the control cabinet with a two-way cable resistance of 15 . Input burden resistor on TGEN is 250 . Jumper selection of single ended or self powered inputs Jumper selection of voltage or current inputs Analog Input Filter: Breaks at 72 and 500 rad/sec Ac common mode rejection (CMR) 60 dB Dc common mode rejection (CMR) 80 dB Conversion accuracy Frame rate Calculated values Sampling type 16-bit A/D converter, 14 bit resolution Accuracy 0.1% overall 100 Hz Total MW and MV have an accuracy of 1% FS, and 0.5% for totalizing. Total m VA and power factor have an accuracy of 1% full scale. Bus frequency (5 to 66 Hz) has an accuracy of 0.1%.
Diagnostics
Three LEDs at the top of the VGEN front panel provide status information. The normal RUN condition is a flashing green, and FAIL is a solid red. The third LED shows STATUS and is normally off but displays a steady orange if a diagnostic alarm condition exists in the board. Diagnostics perform a high/low (hardware) limit check on the input signal and a high/low system (software) limit check. The software limit check is adjustable in the field. Open wire detection is provided for voltage inputs, and relay drivers and coil currents are monitored. Connectors JR1, JS1, and JT1, on TGEN have their own ID device that is interrogated by VGEN. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and plug location.
Configuration
Parameter Description Choices
Configuration PLU_Enab PLU_Del_Enab MechPwrInput PLU_Rate PLU_Unbal PLU_Delay Press Ratg Current Ratg EVA_Enab EVA_ExtEnab EVA_Rate EVA_Unbal EVA_Delay Enable PLU function Enable PLU delay Mech. power through TMR (first 3 MA ccts), dual xducer (Max), single xducer, or signal space Select PLU threshold rate PLU Unbalance threshold % PLU delay, secs Reheat press equiv. to 100% mechanical power Generator current equivalent to 100% electrical power Enable EVA function Enable external EVA function Select EVA threshold rate EVA unbalance threshold % EVA drop out time, seconds Enable, disable Enable, disable TMR_1 through 3, dual 1 and 2, SMX_1, SMX_2, signal space 37.5 20 to 80 0.5 50 to 600 1,000 to 60,000 Enable, disable Enable, disable LO, ME, HI 20 to 80 0 to 10
Parameter
Description
Choices
MW_Ratg IVT_Enab Min_MA_Input MAx_MA_Input SystemFreq J3:IS200TGENH1A AnalogIn1 Input type Low input Low value System limits GenPT_Vab_KV PT_Input PT_Output Phase Shift System limits BusPT_Vab_KV GenCT_A CT_Input CT_Output System Limits J4:IS200TRLYH1A Relay01_Tst Relay Output RelayDropTime
Generator MW equivalent to 100 % electrical power Enable IVT function Minimum MA for healthy 4-20 mA input Maximum MA for healthy 4-20 mA input System frequency in Hz First analog input (of four) - board point Type of analog input Input MA at low value Input value in engineering units at low MA (configuration inputs the same as for TBAI) Standard System Limits (see TBAI configuration) Generator potential transformer input "ab", (first of 3) board point PT input in KV rms for PT_output PT output in V rms for PT_Input-typically 115 Compensating phase shift, applied to PT signals Standard system limits (similar to analog Inputs) Bus potential transformer input "ab", (first of three) configuration similar to GenPT - board point Generator current transformer A (first of three) - board point CT input in amperes rms for rated CT_Output Rated CT output in amperes rms, typically 5 Standard system limits (similar to genPT)
10 to 1,500 Enable, disable 0 to 21 0 to 21 50 or 60 Connected, Not Connected Point edit (input FLOAT) Unused, 4-20 ma, 5 V, 10 V -10 to 20 -3.4028e+038 to 3.4028e+038
- Point edit (input FLOAT) 1 to 1,000 60 to 150 Zero, plus 30, plus 60, minus 30, minus 60 Point edit (input FLOAT) Point edit (input FLOAT) 100 to 50,000 1 to 5 Connected, not connected
Fast acting solenoid #1 test, first of 12 relays - board point FAS valve type Relay dropout time
Point edit (output BIT) Unused, CV, tst only, CV EVA 0 to 5
Board Points Signals
Description Point Edit (Enter Signal Name)
Direction
Type
L3DIAG_VGEN1 L3DIAG_VGEN2 L3DIAG_VGEN3 SysLim1Anal1 : SysLim1Anal4 SysLim2Anal1 : SysLim2Anal4 SysL1GenPTab SysL1GenPTbc SysL1GenPTca SysL1BusPTab SysL1BusPTbc SysL1BusPTca SysL2GenPTab
Board diagnostic Board diagnostic Board diagnostic System limit 1 exceeded on analog cct #1 : System limit 1 exceeded on Analog cct #4 System limit 2 exceeded on Analog cct #1 : System limit 2 exceeded on analog cct #4 System limit 1 exceeded on gen PT, Vab System limit 1 exceeded on gen PT, Vbc System limit 1 exceeded on gen PT, Vca System limit 1 exceeded on bus PT, Vab System limit 1 exceeded on bus PT, Vbc System limit 1 exceeded on bus PT, Vca System limit 2 exceeded on gen PT, Vab
Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input
BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT
Description Point Edit (Enter Signal Name)
Direction
Type
SysL2GenPTbc SysL2GenPTca SysL2BusPTab SysL2BusPTbc SysL2BusPTca SysL1GenCTa SysL1GenCTb SysL1GenCTc SysL2GenCTa SysL2GenCTb SysL2GenCTc Relay01_Fdbk : Relay12_Fdbk L10PLU_EVT L10EVA_EVA GenMW GenMVAR GenMVA GenPF BusFreq PLU_Tst EVA_Tst IV_Trgr EVA_ExtCmd EVA_ExtPrm TN_Hz MechPower AnalogIn1 : AnalogIn4 GenPT_Vab_KV GenPT_Vbc_KV GenPT_Vca_KV BusPT_Vab_KV BusPT_Vbc_KV BusPT_Vca_KV GenCT_A GenCT_B GenCT_C Relay01_Tst : Relay12_Tst
System limit 2 exceeded on gen PT, Vbc System limit 2 exceeded on gen PT, Vca System limit 2 exceeded on bus PT, Vab System limit 2 exceeded on bus PT, Vbc System limit 2 exceeded on bus PT, Vca System limit 1 exceeded on gen CT, phase A System limit 1 exceeded on gen CT, phase B System limit 1 exceeded on gen CT, phase C System limit 2 exceeded on gen CT, phase A System limit 2 exceeded on gen CT, phase B System limit 2 exceeded on gen CT, phase C Status of relay 01 : Status of relay 12 Power load unbalance event Early valve actuation event Generator MWatts Generator MVars Generator MVA Generator power factor, 0/1/0 Bus frequency, Hz Power load unbalance test Early valve actuation test Intercept valve trigger command Early valve actuation external command Early valve actuation external permissive PLL center frequency, Hz Mechanical power, percent, when configured through signal space Analog input 1 : Analog input 4 Kilovolts rms Kilovolts rms Kilovolts rms Kilovolts rms Kilovolts rms Kilovolts rms Generator Amperes RMS, phase A Generator amperes rms, phase B, same configuration as phase A Generator amperes rms, phase C, same configuration as phase A Fast acting solenoid #1 test : Fast acting solenoid #12 test
Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Output Output Output Output Output Output Output Input Input Input Input Input Input Input Input Input Input Input Input Output Output Output
BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT FLOAT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT BIT BIT BIT
Alarms
2 3 16 17 18 19 20 21 22 23 24 30
Flash Memory CRC Failure CRC failure override is Active System Limit Checking is Disabled Board ID Failure J3 ID Failure J4 ID Failure J5 ID Failure J6 ID Failure J3A ID Failure J4A ID Failure Firmware/Hardware Incompatibility ConfigCompatCode mismatch; Firmware: #; Tre: # The configuration compatibility code that the firmware is expecting is different than what is in the tre file for this board IOCompatCode mismatch; Firmware: #; Tre: # The I/O compatibility code that the firmware is expecting is different than what is in the tre file for this board Relay Driver # does not Match Requested State. There is a mismatch between the relay driver command and the state of the output to the relay as sensed by VGEN Relay Output Coil # does not Match Requested State. There is a mismatch between the relay driver command and the state of the current sensed on the relay coil on the relay terminal board Analog Input # Unhealthy. Analog Input 4-20 mA ## has exceeded the A/D converter's limits
Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online) System checking was disabled by configuration Failed ID chip on the VME I/O board Failed ID chip on connector J3, or cable problem Failed ID chip on connector J4, or cable problem Failed ID chip on connector J5, or cable problem Failed ID chip on connector J6, or cable problem Failed ID chip on connector J3A, or cable problem Failed ID chip on connector J4A, or cable problem Invalid terminal board connected to VME I/O board A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. The relay terminal board may not exist and the relay is configured a used, or there may be a faulty relay driver circuit or drive sensors on VGEN. Relay is defective, or the connector cable J4 to the relay terminal board J1 is disconnected, or the relay terminal board does not exist. Analog input is too large, TGEN jumper (JP1, JP3, JP5, JP7) is in the wrong position, signal conditioning circuit on TGEN is defective, multiplexer or A/D converter circuit on VGEN is defective. One or both of the listed fuses is blown, or there is a loss of power on TB3, or the terminal board does not exist, or the jumpers are not set. 3 Volt or 9 Volt precision reference or null reference on VGEN is defective, or multiplexer or A/D converter circuit on VGEN is defective. Precision reference voltage or null reference is defective on VGEN, or multiplexer or A/D converter circuit on VGEN is defective. Precision reference voltage or null reference is defective on VGEN, or multiplexer or A/D converter circuit on VGEN is defective. A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable. A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable.
31
32-43
44-55
56-59
60-65
66-69
70-73
Fuse # and/or # Blown. The fuse monitor requires the jumpers to be set and to drive a load, or it will not respond correctly Analog 4-20 mA Auto Calibration Faulty. One of the analog 4-20 mA auto calibration signals has failed. Auto calibration or 4-20 mA inputs are invalid PT Auto Calibration Faulty. One of the PT auto calibration signals has gone bad. Auto calibration of PT input signals is invalid, PT inputs are invalid CT Auto Calibration Faulty. One of the CT auto calibration signals has gone bad. Auto calibration of CT input signals is invalid, CT inputs are invalid Logic Signal # Voting mismatch. The identified signal from this board disagrees with the voted value Input Signal # Voting mismatch, Local #, Voted #. The specified input signal varies from the voted value of the signal by more than the TMR Diff Limit
74-79
96-223
224-241
TGEN Generator Monitor

The Generator Monitor (TGEN) terminal board works with the VGEN processor to monitor the generator three-phase voltage and currents, and calculate three-phase power and power factor. For large steam turbine applications, VGEN provides the PLU and EVA functions, using fast acting solenoids located on the TRLY terminal board. In the Mark* VI system, the TGEN works with the VGEN processor and supports simplex and TMR applications. One TGEN connects to the VGEN with a single cable. In TMR systems, TGEN connects to three VGEN boards with three separate cables.
TGEN Terminal Board TB1
VGEN VME Board 37-pin "D" shell type connectors with latching fasteners
x RUN FAIL STAT
Current inputs & gen PT signals
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
JT1
JS1
Cable to VME rack T VME bus to VCMI
TB2 Cable to VME rack S
Gen CT signals
TB3
JR1
VGEN x
TB4
x
J3
Shield bar
Cable to VME rack R J4
Cable to optional TRLY, for fast acting solenoids

Generator Terminal Board, Processor Board, and Cabling
Installation
Connect the wires for the analog current and PT inputs to TB1. Connect the wires for the CT inputs to special terminal blocks TB2, TB3, and TB4. The blocks cannot be unplugged, protecting against an open CT circuit. Use jumpers J#A and J#B to select the input as a current or voltage input on analog inputs 1 through 4.
Generator Terminal Board TGEN Analog Input Jumpers TB1
x
JT1
20ma
VDC RET
OPEN
20 mA (1) RET (1) 20mA (2) RET (2) 20mA (3) RET (3) 20mA (4) RET (4) PCOM GenB BusA
BusC
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
P24V (1) VDC (1) P24V (2) VDC (2) P24V (3) VDC (3) P24V (4) VDC (4) PCOM GenA GenC BusB
JP1A
JP1B
JP2A JP3A JP4A
JP2B JP3B JP4B JS1
CurAH1 CurAH2 CurAL1 CurAL2 CurBH1 CurBH2 CurBL1 CurBL2 CurCH1 CurCH2 CurCL1 CurCL2
1 2 TB2 3 4 1 2 TB3 3 4 1 2 TB4 3 4
JR1
Test points
Terminal block 1 can be unplugged from terminal board for maintenance. TB2, TB3, TB4 are not pluggable.
TGEN Terminal Board and Wiring
Operation
VGEN monitors two, three-phase PT inputs, and three, one-phase current transformer CT inputs from TGEN. Using jumpers, four analog inputs can be configured for 4-20 mA or 5, 10 V dc. Test points on the generator and bus voltages and currents are used to check the phase of the input signals. VGEN performs signal conversions and power, power factor, and frequency calculations.
<R> <S> <T>
Terminal Board TGEN

Analog inputs TB1 +24 Vdc +/-5,10 Vdc 4-20 ma Return
01 03 02 04
Controller
4 circuits per terminal board Noise suppression.

Current Limit
P28VV
P28V, R S T
Vdc
JP1A
20 ma
Generator Board VGEN
250 ohms
JP1B
Open 17 18
A B C A B C H1 H2 L1 L2 H1 H2 L1 L2 H1 H2 L1 L2
Return PCOM
115 V rms yields 1.5333 V rms, gen & bus
JR1
J3
Shown for <R> +28 Vdc

A/D
TB1 Generator 3-phase volts (115 Vac) Bus 3-phase volts (115 Vac) TB2 Current phase A (115 Vac) TB3 Current phase B (115 Vac) TB4 Current phase C (115 Vac)
PCOM
19 20 21 22 23 24 01 02 03 04 01 02 03 04 01 02 03 04 TB4
1:2000 1:2000 1:2000
Test Points TP1 TP2 TP3 TP4 TP5 TP6 TP8 TP7 TP10 TP9 TP12 TP11
R21 ohms 0.01% R20 ohms 0.01% R19 ohms 0.01% ID ID ID
JS1
J3
Buffer
To TRLY from <R> <S> <T>
Same for <S>

JT1 J3
Same for <T>
Connectors at bottom of VME racks 5 A input yields 0.25 V rms (line-neutral) or 0.433 V rms (line-line)
Noise suppression
Note Test points are provided for all PT and CT inputs to verify the phase in the field.
Three single-phase CT inputs are provided with a normal current range of 0 to 5 A continuous. The CTs are magnetically isolated on TGEN. The CTs connect to nonpluggable terminal blocks with captive lugs accepting are up to #10 AWG wires.
The four analog inputs accept 4-20 mA inputs or 5, 10 V dc inputs. A +24 V dc source is available for all four circuits with individual current limits for each circuit. The 4-20 mA transducer can use the +24 V dc source from the turbine control or a self-powered source.
Specifications
Item Inputs to TGEN and VGEN Specification 2 three-phase generator and bus PTs 3 one-phase generator CTs 4 analog inputs (4-20 mA, 5, 10 V dc) Generator and bus voltages Nominal 115 V rms with range of interest of 10 to 120% Nominal frequency 50/60 Hz with range of interest 25 to 66 Hz Magnetic isolation to 1,500 V rms and loading less than 3 VA Input loading less than 3 VA per circuit Generator current inputs Normal current range is 0 to 5 A with over-range to 10 A Nominal frequency 50/60 Hz with range of interest 45 to 66 Hz Magnetic isolation to 1,500 V rms Input burden less than 0.5 per circuit Analog inputs Current inputs: Voltage inputs: 4-20 mA 5 V dc or 10 V dc
Transducers can be up to 300 m (984 ft) from the control cabinet with a two-way cable resistance of 15 . Input burden resistor on TGEN is 250 . Jumper selection of single ended or self powered inputs Jumper selection of voltage or current inputs
Diagnostics
Diagnostics perform a high/low (hardware) limit check on the input signal and a high/low system (software) limit check. The software limit check is adjustable in the field. Open wire detection is provided for voltage inputs, and relay drivers and coil currents are monitored. Connectors JR1, JS1, and JT1 on TGEN have their own ID device that is interrogated by VGEN. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and plug location.
Configuration
Configuration of the terminal board is by means of jumpers. For location of these jumpers refer to the installation diagram. The jumper choices are as follows: Jumpers J1A through J4A select either current input or voltage input Jumpers J1B through J4B select whether the return is connected to common or is left open
The following diagrams illustrate connections for common analog inputs.
TRLYH1B Relay Output with Coil Sensing

The Relay Output with coil sensing (TRLYH1B) terminal board holds 12 plug-in magnetic relays. The first six relay circuits configured by jumpers for either dry, Form-C contact outputs, or to drive external solenoids. A standard 125 V dc or 115/230 V ac source, or an optional 24 V dc source with individual jumper selectable fuses and on-board suppression, can be provided for field solenoid power. The next five relays (7-11) are unpowered isolated Form-C contacts. Output 12 is an isolated Form-C contact, used for special applications such as ignition transformers.
Mark VI Systems
In Mark* VI systems, TRLY is controlled by the VCCC, VCRC, or VGEN board and supports simplex and TMR applications. Cables with molded plugs connect the terminal board to the VME rack where the I/O boards are mounted. Connector JA1 is used on simplex systems, and connectors JR1, JS1, and JT1 are used for TMR systems.
Mark VIe Systems

Solenoid power x
TB3
12 Relay Outputs
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
JF1JF2
X JT1
Fuses JS1
J - Port Connections: Plug inPDOA I/O Pack(s) for Mark VIe system or
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
Output Relays JA1 JR1
Cables to VCCC/VCRC or VGEN boards for Mark VI system The number and location depends on the level of redundancy required.
Shield bar
Solenoid Barrier type terminal blocks can be unplugged power from board for maintenance
TRLYH1B Relay Output Terminal Board
Installation
Connect the wires for the 12 relay outputs directly to two I/O terminal blocks on the terminal board as shown in the figure, TRLYH1B Terminal Board Wiring. Each block is held down with two screws and has 24 terminals accepting up to #12 AWG wires. A shield terminal strip attached to chassis ground is located on to the left side of each terminal block. Connect the solenoid power for outputs 1-6 to JF1. JF2 can be used to daisy chain power to other TRLYs. Alternatively, power can be wired directly to TB3 when JF1/JF2 are not used. Connect power for the special solenoid, Output 12, to connector JG1. Jumpers JP1-JP6 are removed in the factory and shipped in a plastic bag. Re-install the appropriate jumper if power to a field solenoid is required. Conduct individual loop energization checks as per standard practices and install the jumpers as required. For isolated contact applications, remove the fuses to ensure that suppression leakage is removed from the power bus.
Note These jumpers are also for isolation of the monitor circuit when used on isolated contact applications.
Alternate customer power wiring Terminal 1 - Pos Terminal 2 - Neg

TB3
N125/24 V dc P125/24 V dc JF1 x 1 JF2 1
Power source
Relay Output Terminal Board TRLYH1B

x
Powered, fused solenoids form-C
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
FU1 Out 01 -
Relays
+ FU7 +
JP1 JP2 JP3 JP4 JP5 JP6 To connectors JA1, JR1, JS1, JT1
FU2 Out 02 FU8 + FU3 Out 03 FU9 + FU4 Out 04 FU10 + FU5 Out 05 FU11 + FU6 Out 06 FU12 Fuses Fuses Neg,return Pos, High
Output 07 (COM) Dry contacts form-C Output 08 (COM) Output 09 (COM) Output 10 (COM) Special circuit, form-C, ign. xfmr. Output 11 (COM) Output 12 (COM) Output 12 (SOL)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
Jumper choices: power (JPx) or dry contact (dry)
To connectors JA1, JR1, JS1, JT1
Power to special circuit 12 JG1 1 2 3 4 Customer return Customer power
JF1, JF2, and JG1 are power plugs
TRLYH1B Terminal Board Wiring
Operation
Relay drivers, fuses, and jumpers are mounted on the TRLYH1B. For simplex operation, D-type connectors carry control signals and monitor feedback voltages between the I/O processors and TRLY through JA1. Relays are driven at the frame rate and have a 3.0 A rating. The rated contact-tocontact voltage is 500 V ac for one minute. The rated coil to contact voltage is 1,500 V ac for one minute. The typical time to operate is 10 ms. Relays 1-6 have a 250 V metal oxide varistor (MOV) for transient suppression between normally open (NO) and the power return terminals. The relay outputs have a failsafe feature that vote to de-energize the corresponding relay when a cable is unplugged or communication with the associated I/O processor is lost.
Relay Terminal Board - TRLYH1B Output 01 NC 1
Alternate Power, 20 A 24 V dc or 125 V dc or 115 V ac or 230 V ac Normal Power Source,pluggable (7 Amp) Power Daisy-Chain
TB3
1 2 3 4
Dry P125/24 V dc FU7 JP1
K1 Com 2 NO 3
JF1 1
3
N125/24 Vdc
FU1
K1
K1 Sol 4
Field Solenoid
+ -
3.15 Amp slow-blow

"6" of the above circuits Output 07
JF2
1 3
NC K7 Com
26 25
JA1 Monitor Select
NO
27 K7 K7 "5" of these circuits
Dry Contact, Form-C
R I/O Processor
JR1
P28V
Relay Driver
Coil
K#
Relay Output
ID
JS1
RD
Output 12
ID
NC K12 Com
46 45
JT1
"12" of the above circuits
Special Circuit
NO
ID
Available for GT Ignition Transformers (6 Amp at 115 Vac 3 Amp at 230 Vac)
K12 K12 Sol

"1" of these circuits
47
JG1
1 3 48
TRLYH1B Circuits, Simplex System
For TMR applications, relay control signals are fanned into TRLY from the three I/O processors R, S, and T through plugs JR1, JS1, and JT1. These signals are voted and the result controls the corresponding relay driver. Power for the relay coils comes from all three I/O processors and is diode-shared. The following figure shows a TRLYH1B in a TMR system.
Relay Terminal Board - TRLYH1B Dry P125/24 V dc FU7 JP1
Alternate power, 20 A 24 V dc or 125 V dc or 115 V ac or 230 V ac Normal power source,pluggable (7 Amp) Power daisy-chain
TB3
1 2 3 4
JF1 1
3
N125/24 V dc
FU1
K1
K1 Sol 4
Field solenoid
+ -
3.15 Amp slow-blow
6 of the above circuits Output 07 NC K7 Com

26 25
JF2
1 3
JA1
R I/O Processor Relay Control JR1
Monitor Select
NO
27 K7 K7 5 of these circuits
Dry contact, form-C
P28V
Relay Driver
Coil
K#
ID

ID

46 45

ID
Special circuit
NO K12 K12 Sol 1 of these circuits

TRLYH1B Circuits, TMR System
48 47
Available for GT ignition transformers (6 Amp at 115 V ac 3 Amp at 230 V ac)
JG1 1 3
Specifications
Item Number of relay channels on one TRLY board Specifications 12: 6 relays with optional solenoid driver voltages 5 relays with dry contacts only 1 relay with 7 A rating Rated voltage on relays Max load current a: b: a: b: c: Max response time on Max response time off Maximum inrush current Contact material Contact life Fault detection Nominal 125 V dc or 24 V dc Nominal 115/230 V ac 0.6 A for 125 V dc operation 3.0 A for 24 V dc operation 3.0 A for 115/230 V ac, 50/60 Hz operation
25 ms typical 25 ms typical 10 A Silver cad-oxide Electrical operations: Mechanical operations: 100,000 10,000,000
Loss of relay solenoid excitation current Coil current disagreement with command Unplugged cable or loss of communication with I/O board; relays de-energize if communication with associated I/O board is lost.
Diagnostics
Configuration
TRLYH1F Relay Output with TMR Contact Voting

The Relay Output with TMR contact voting (TRLYH1F) terminal board provides 12 contact-voted relay outputs. The board holds 12 sealed relays in each TMR section, for a total of 36 relays. The relay contacts from R, S, and T are combined to form a voted Form A (NO) contact. 24/125 V dc or 115 V ac can be applied.
Note TRLYH1F and H2F do not support simplex arrangements

TRLYH1F does not have power distribution. However, an optional power distribution board, IS200WPDFH1A, can be added so that a standard 125 V dc or 115 V ac source, or an optional 24 V dc source with individual fuses, can be provided for field solenoid power. TRLYH2F is same as TRLYH1F except that the voted contacts form a Form B (NC) output. Both boards can be used in Class 1 Division 2 applications.
Mark VI Systems
In the Mark* VI system, the TRLY is controlled by the VCCC, VCRC, or VGEN board and only supports TMR applications. Cables with molded plugs connect JR1, JS1, and JT1 to the VME rack where the I/O boards are mounted.
Mark VIe Systems

In the Mark VIe system, the TRLY works with PDOA I/O pack and only supports TMR applications. Three TMR PDOA packs plug into the JR1, JS1, and JT1 37-pin D-type connectors on the terminal board.
DC-64 pin connector for optional power distribution daughterboard x

x x x x x x x x x x
TB1
J1
12 Relay Outputs
x x
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
JT1
DC-37 pin connector for I/O processor
K1R
K1S
K1T
18 sealed relays
JS1
J - Port Connections: Plug in 3 PDOA I/O Packs for Mark VIe system or Cables to VCCC/VCRC or VGEN boards for Mark VI system
TB2
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
K12R
K12S
K12T
J2
Shield bar
DC-64 pin connector for optional power distribution daughterboard
TRLYH1F Relay Output Terminal Board
Installation
Connect the wires for the 12 solenoids directly to two I/O terminal blocks on the terminal board as shown in the following figure, TRLYH1F Terminal Board Wiring. Each block is held down with two screws and has 24 terminals accepting up to #12 AWG wires. A shield termination strip attached to chassis ground is located immediately to the left side of each terminal block. Solenoid power for outputs 1-12 is available if the WPDF daughterboard is used. Alternatively, power can be wired directly to the terminal block.
Relay Output Terminal Board TRLYH1F
Wiring connections
x
J1
JT1
K1T
DC-64 pin connector for optional power distribution daughterboard WPDF DC-37 pin connector for I/O processor
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
K1R
K1S
JS1 18 sealed relays
J - Port Connections: Plug in three PDOA I/O Packs for Mark VIe system or Cables to VCCC/VCRC or VGEN boards for Mark VI system
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
K12R
K12S
K12T
J2 Signal Name Description, n=1...12 FPOn FPRn Kna Knb Fused Power Out #n Fused Power Return #n Resulting voted relay contact #n Resulting voted relay contact #n
TRLYH1F Terminal Board Wiring
64-pin connector for optional power distribution daughterboard WPDF
Power Distribution Board

If using the optional WPDF power distribution board, mount it on top of TRLY on the J1 and J2 connectors. Secure WPDF to TRLY by fastening a screw in the hole located at the center of WPDF. Connect the power for the two sections of the board on the three-pin connectors J1 and J4. Power can be daisy-chained out through the adjacent plugs, J2 and J3.
3 1 3 1
J2 Output power daisy chain

FU1 FU13
J1 P1
Input power
FU6
FU18
TRLYH1F Board
Fasten WPDF to TRLY with screw

FU19 FU7

FU24 FU12
Output power daisy chain J3

3 1 3
P2 J4
1
Input power
WPDF Power Distribution Board
The solenoids must be wired as shown in the following figure. If WPDF is not used, the customer must supply power to the solenoids.
TRLYH1F Customer Solenoid
FPO1 K1b K1a FPR1 1 2 3 4 5 6
WPDF Daughter Board J2 J1 Power Input, section 1
+
Vfb
+
Vfb
Output #2
7 8
P1
Wiring to Solenoid using WPDF
Operation
The 28 V dc power for the terminal board relay coils and logic comes from the three I/O processors connected at JR1, JS1, and JT1. The same relays are used for ac voltages and dc voltages, as specified in the Specifications section. H1F and H2F use the same relays with differing circuits. Relay drivers are mounted on the TRLYH1F and drive the relays at the frame rate. The relay outputs have a failsafe feature that votes to de-energize the corresponding relay when a cable is unplugged or communication with the associated I/O board or I/O pack is lost. This board only supports TMR applications. The relay control signals are routed into TRLY from the three I/O processors R, S, and T through plugs JR1, JS1, and JT1. These signals directly control the corresponding relay driver for each TMR section R, S, and T. Power for each sections relay coils comes in from its own I/O processor and is not shared with the other sections. TRLYH1F features TMR contact voting. The relay contacts from R, S, and T are combined to form a voted Form A (NO) contact. 24/125 V dc or 115 V ac can be applied. TRLYH2F is the same except that the voted contacts form a Form B (NC) output. The following figure shows TMR voting contact circuit.
Relay control Driver feedback
V V V
Contact voting circuit R S T R T S S R T
Normally Open contacts
TRLYH1F Contact Arrangement for TMR Voting
Field Solenoid Power Option

The WPDFH1A daughterboard supplies power to TRLYH#F to power solenoids. WPDF holds two power distribution circuits, which can be independently used for standard 125 V dc, 115 V ac, or 24 V dc sources. Each section consists of six fused branches that provide power to TRLYH#F. Each branch has its own voltage monitor across its secondary fuse pair. Each voltage detector is fanned to three independent open-collector drivers for feedback to each of the I/O processors R, S, and T. WPDF should not be used without TRLYH#F. Fused power flows through this board down to the TRLY terminal board points. TRLY controls the fuse power feedback. The following figure shows TRLYH1F/WPDF solenoid power circuit.
WPDF Daughterboard Pwr. Output daisy chain J2 J1
Fuse
Power Input, section 1
Output #1
1 2 3 4 5 6 7 8
+
Vfb
Voltage sense Fuse
+
Vfb
Output #2
P1 TRLYH1F Terminal Board 6 circuits P2
+
Vfb
Fuse Voltage sense Fuse
+
Vfb
6 circuits Pwr. Output daisy chain J3 J4 Power Input, section 2
Solenoid Power Supply WPDF
Specifications
Item Number of output relay channels Board types Specification 12 H1F: H2F: Rated voltage on relays Maximum load current a: b: a: b: c: Maximum response time on Contact life Fault detection 25 ms Electrical operations: 100,000 Coil Voltage disagreement with command Blown fuse indication (with WPDF power daughterboard). Unplugged cable or loss of communication with I/O board; relays de-energize if communication with associated I/O board is lost. WPDF Solenoid Power Distribution Board Number of Power Distribution 2: Circuits (PDC) Number of Fused Branches Fuse rating Voltage monitor, maximum response delay Voltage monitor, minimum detection voltage Voltage monitor, max current (leakage) Physical Size - TRLY Size - WPDF Temperature Technology 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in) 10.16 cm wide x 33.02 cm high (4.0 in x 13.0 in) -30 to + 65C (-22 to +149 F) Surface-mount Each rated 10 A, nominal 115 V ac or 125 V dc. NO contacts NC contacts Nominal 100/125 V dc or 24 V dc Nominal 115 V ac 0.5/0.3 A resistive for 100/125 V dc operation 5.0 A resistive for 24 V dc operation 5.0 A resistive for 115 V ac
12: 6 for each PDC 3.15 A at 25C (77 F) 2.36 A recommended maximum usage at 65C (149 F) 60 ms typical 16 V dc 72 V ac 3 mA
Diagnostics
Diagnostic tests to components on the terminal boards are as follows: The voltage to each relay coil is monitored and checked against the command at the frame rate. If there is no agreement for two consecutive checks, an alarm is latched. The voltage across each solenoid power supply is monitored and if it goes below 16 V ac/dc, an alarm is created. If any one of the outputs goes unhealthy a composite diagnostic alarm, L3DIAG_xxxx occurs. When an ID chip is read by the I/O processor and a mismatch is encountered, a hardware incompatibility fault is created. Each terminal board connector has its own ID device that is interrogated by the I/O board. The connector ID is coded into a read-only chip containing the board serial number, board type, revision number, and the JR1/JS1/JT1 connector location.
Details of the individual diagnostics are available from the configuration application. The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal if they go healthy.
Configuration
VPRO Turbine Protection Board

VPRO Emergency Turbine Protection
The Emergency Turbine Protection (VPRO) board and associated terminal boards (TPRO and TREG) provide an independent emergency overspeed protection system. The protection system consists of triple redundant VPRO boards in a module separate from the turbine control system, controlling the trip solenoids through TREG. The figures shows the cabling to VPRO from the TPRO and TREG terminal boards.
Note VPRO also has an Ethernet connection for IONet communications with the control modules.
The VPRO board in the Protection Module provides the emergency trip function. Up to three trip solenoids can be connected between the TREG and TRPG terminal boards. TREG provides the positive side of the 125 V dc to the solenoids and TRPG provides the negative side. Either board can trip the turbine. VPRO provides emergency overspeed protection and the emergency stop functions. It controls the 12 relays on TREG, nine of which form three groups of three to vote inputs controlling the three trip solenoids. The original VPROH1A has been superseded by the functionally equivalent VPROH1B. VPROH1A and VPROH1B supports a second TREG board driven from VPRO connector J4. VPROH2B is a lower power version of VPRO that omits support for the second TREG board. Applications using a second TREG board connected to J4 must use VPROH1A or VPROH1B, not VPROH2B.
VPRO Turbine Protection Board 201
TPRO Terminal Board

x
VPRO- R8 Ethernet IONet JZ1

I O N E T RUN FAIL STAT 8 X 4 Y T 2 Z R 1 C S E R x x x
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
JZ5 JY1 Cables to VPRO-T8
J6
P5 COM P28A P28B E T H R P A R A L x
JY5
J 5
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
JX1 JX5
Cables to VPRO-S8
J 3
F
J 4
N
Cables to VPRO-R8
x
VPRO
x
P O W E R
x
To TREG Shield Bar BarrierType Terminal Blocks can be unplugged from board for maintenance 37-pin "D" shell type connectors with latching fasteners To Second TREG (optional)
VPRO Board, TPRO Terminal Board, and Cabling
202 VPRO Turbine Protection Board
The figure shows how the VTUR and VPRO processor boards share in the turbine protection scheme. Either one can independently trip the turbine using the relays on TRPG or TREG.
VTUR Special speed cable JR5 TTUR JS5 J5 JT5 JR1 JS1 Optional daughterboard JT1 3 Relays Gen Synch 335 V dc from <Q> J3 J4 J5 TRPG Two xfrs
JR1 J3 To second TRPG board (optional) J1 125 VDC Cable J2 JS1 JT1
J4
J4
9 Relays (3 x 3 PTR's)
Trip Solenoids, three circuits
JX1 VPRO J3 J4 J5 J6 To second TREG Board (optional) JH1 P125 V dc from <PDM> NEMA class F Special speed cable JX5 JY5 JZ5 JX1 JY1 125 VDC JZ1 JY1 JZ1
J2
TREG
J1
Trip signal to TSVO TB's
12 Relays (9 ETR's, 3 econ. relays)
TPRO
J7
2 transformers
Turbine Control and Protection Boards
Installation
Note Cable connections to the terminal boards are made at the J3, J4, J5, and J6 connectors on VPRO front panel. These are latching type connectors to secure the cables. Connector J7 is for 125 V dc power. For details refer to the section on diagnostics in this document.
It may be necessary to update the VPRO firmware to the latest level. For instructions, refer to GEH-6403 Control System Toolbox for a Mark VI Turbine Controller.
Operation
The main purpose of the protection module is emergency overspeed (EOS) protection for the turbine, using three VPRO boards. In addition, VPRO has backup synchronization check protection, three analog current inputs, and nine thermocouple inputs, primarily intended for exhaust over-temperature protection on gas turbines. The protection module is always triple redundant with three completely separate and independent VPRO boards named R8, S8, and T8 (originally named X, Y, and Z). Any one of these boards can be powered down and replaced while the turbine is running without jeopardizing the protection system. Each board contains its own I/O interface, processor, power supply, and Ethernet communications (IONet) to the controller. The communications allow initiation of test commands from the controller to the protection module and the monitoring of EOS system diagnostics in the controller and on the operator interface. Communications are resident on the VPRO board. The VPRO board has a VME interface that allows programming and testing in a VME rack. However, the backplane is neutralized when plugged into the protection module to eliminate any continuity between the three independent sections.
Speed Control and Overspeed Protection

Speed control and overspeed protection is implemented with six passive, magnetic speed pickups. The first three are monitored by the controllers, which use the median signal for speed control and primary overspeed protection. The second three are separately connected to the R8, S8, and T8 VPROs in the protection module. Provision is made for nine passive magnetic speed pickups or active pulse rate transducers (TTL type) on the TPRO terminal board with three being monitored by each of the R8, S8, and T8 VPROs. Separate overspeed trip settings are programmed into the application software for the primary and emergency overspeed trip limits, and a second emergency overspeed trip limit must be programmed into the I/O configurator to confirm the emergency overspeed (EOS) trip point.
The speed is calculated by counting passing teeth on the wheel and measuring the time involved. Another protection feature is: after the turbine reaches a predetermined steady-state speed, the rate of change of speed is continuously calculated and compared with 100%/sec and transmitted to the controller to trip the unit if it is detected. This steady-state speed limit is a tuning constant located in the controllers application software. Another speed threshold which is monitored by the EOS system, is 10% speed. This is transmitted to the controller to verify that there is no gross disagreement between the first set of three speed pickups being monitored by the controller (for speed control and the primary overspeed protection) and the second set of three speed pickups being monitored by the EOS system.
Speed Difference Detection

There should never be a reason why the speed calculated by PPRO is significantly different from the speed calculated by the main control. Speed difference detection looks at the difference in magnitude between pulse rate 1 from both PPRO and the main control. If the difference is greater than the set threshold for three successive samples, a SpeedDifTrip is latched. If the main control recovers for 60 seconds, the trip is removed. This allows the main control to recover with subsequent re-arming of the backup protection.
Interface To Trip Solenoids

The trip system combines the Primary Trip Interface from the controller with the EOS Trip Interface from the protection module. Three separate, triple redundant trip solenoids (also called Electrical Trip Devices - ETDs) are used to interface with the hydraulics. The ETDs are connected between the TRPG and TREG terminal boards. A separately fused 125 V dc feeder is provided from the turbine control for each solenoid, which is energized in the run mode and de-energized in the trip mode.
Backup Synch Check Protection

Backup synch check protection is provided in the Protection Module. The generator and bus voltages are supplied from two, single phase, potential transformers (PTs) secondary output supplying a nominal 115 V rms. The maximum cable length between the PTs and the turbine control is 100 meters of 18 AWG twisted, shielded wire. Each PT is magnetically isolated with a 1,500 V rms rated barrier and a circuit load less than 3 VA. The synch algorithms are based on phase lock loop techniques. Phase error between the generator and bus voltages is less than +/-1 degree at nominal voltage and 50/60 Hz. A frequency range of 45 to 66 Hz is supported with the measured frequency within 0.05% of the input frequency. The algorithm is illustrated under TTUR, generator synchronizing. Each PT input is internally connected in parallel to the R8, S8, and T8 VPROs. The triple redundant phase slip windows result in a voted logical output on the TREG terminal board, which drives the K25A relay. This relays contacts are connected in series with the synch permissive relay (K25P) and the auto synch relay (K25) to insure that no false command is issued to close the generator breaker. Similarly, contacts from the K25A contact are connected in series with the contacts from remote, manual synchronizing equipment to insure no false commands.
Thermocouple and Analog Inputs

Thermocouple and analog inputs are available in the VPRO, primarily for gas turbine applications. Nine thermocouple inputs are monitored with three connected to each VPRO. These are generally used for backup exhaust over-temperature protection. Also, one 5, 10 V dc, 4-20 mA (selectable) input, and two 4-20 mA inputs can be connected to the TPRO terminal board, which feeds the inputs in parallel to the three VPROs.
Power Supply
Each VPRO board has its own on-board power supply. This generates 5 V dc and 28 V dc using 125 V dc supplied from the cabinet PDM. The entire protection module therefore has three power supplies for high reliability TREG is entirely controlled by VPRO, and the only connections to the control modules are the J2 power cable and the trip solenoids. In simplex systems a third cable carries a trip signal from J1 to the TSVO terminal board, providing a servo valve clamp function upon turbine trip.
Control of Trip Solenoids

Note The solenoid circuit has a metal oxide varistor (MOV) for current suppression and a 10 , 70 W economizing resistor.
Both TRPG and TREG control the trip solenoids so that either one can remove power and actuate the hydraulics to close the steam or fuel valves. The three trip solenoids are supplied with 125 V dc through plug J2, and draw up to 1 A with a 0.1 second L/R time constant. The nine trip relay coils on TREG are supplied with 28 V dc from VPRO boards in R8, S8, and T8. A separately fused 125 V dc feeder is provided for the solenoids, which energize in the run mode and de-energize in the trip mode. Diagnostics monitor each 125 V dc feeder from the power distribution module at its point of entry on the terminal board to verify the fuse integrity and the cable connection.
Solenoid Trip Tests

Application software in the controller is used to initiate tests of the trip solenoids. Online tests allow each of the trip solenoids to be manually tripped one at a time either through the PTR relays from the controller or through the ETR relays from the protection module. A contact from each solenoid circuit is wired back as a contact input to give a positive indication that the solenoid has tripped. Primary and emergency offline overspeed tests are provided too for verification of actual trips due to software simulated trip overspeed conditions.
Terminal Board TPRO 1 Gen. Volts 120 V ac from PT 2

Noise Suppression
JX1
VPRO R8 Protection
VPRO S8 Protection
VPRO T8 Protection
NS
Bus Volts 120 V ac from PT To TTUR TC1RH TC1RL TC1SH TC1SL TC1TH TC1TL P24V1 V dc 20mA1 mAret
3 4
Noise Suppression
ID
NS Thermocouple Inputs
NS NS NS NS NS NS
1
JY1
J6
J6
J6
13 14 19 20 25 26 5 7 6 8
CJ
Three TC ccts to R8
CJ
1
ID
JZ1
1
Three TC ccts to S8
CJ
Three TC ccts to T8 P28VV Current Limiter

ID
Overspeed Em Stop Sync Check Overtemp
JPA1
VDC
P28V,R8 P28V,S8 P28V,T8 To R8,S8,T8
J5
J5
J5
20 ma 250 ohms
Open
Ret
One of the above ccts P28VV
J3
J3
J3
JPB1 P24V2 20 mA2

9 10 Current Limiter 250 ohms
J4
J4
J4
To R8,S8,T8 JX5
Two of the above ccts #1 Emergency Magnetic Speed Pickup #2 Emergency Magnetic Speed Pickup #3 Emergency Magnetic Speed Pickup
MX1H
31 32 NS 3 Circuits
MX1H
Filter Clamp AC Coupling

ID
To TREG and Trip Solenoids
MY1H
37 38 NS 3 Circuits
MY1L
Filter Clamp AC Coupling Filter Clamp AC Coupling
JY5
ID
MZ1H
43 44 NS 3 Circuits
JZ5
ID
MZ1L
TMR VPROs and TPRO Terminal Board
Specifications
Item Number of Inputs Specification 3 1 3 2 7 2 6 6 1 1 Passive speed pickups Generator and 1 Bus Voltage Thermocouples1 4-20 mA current or voltage 4-20 mA current Trip interlocks Emergency Stop Trip Solenoids Economizer relays Breaker relay command, K25A on TTUR Servo clamp relay contact, to TSVO boards
Number of Outputs
Power Supply Voltage Frame Rate MPU Characteristics
Input supply 125 V dc (70-145 V dc) Output 5 V dc and 28 V dc Up to 100 Hz Output resistance 200 with inductance of 85 mH.Output generates 150 V p-p into 60 K at the TPRO terminal block, with insufficient energy for a spark. The maximum short circuit current is approximately 100 mA. The system applies up to 400 normal mode load to the input signal to reduce the voltage at the terminals.
MPU Cable
Sensors can be up to 300 m (984 ft) from the cabinet, assuming that shielded pair cable is used, with typical 70 nF single ended or 35 nF differential capacitance, and 15 resistance. 2 Hz to 20 kHz 0.05% of reading; resolution is 15 bits at 100 Hz Noise of the acceleration measurement is less than 50 Hz/sec for a 10,000 Hz signal being read at 10 ms. Minimum signal is 27 mV pk at 2 Hz Minimum signal is 450 mV pk at 14 kHz Two Single-Phase Potential Transformers, 115 V rms secondary voltage accuracy is 0.5% of rated Volts rms Frequency Accuracy 0.05% Phase Difference Measurement better than 1 degree. Allowable voltage range for synchronizing is 75 to 130 V rms. Each input has a load of less than 3 VA. Same specifications as for VTCC board 2 current inputs, 4-20 mA 1 current input, with selection of 4-20 mA, or 5 V dc, or 10 V dc. Same specifications as for VAIC board
MPU Pulse Rate Range MPU Pulse Rate Accuracy MPU Input Circuit Sensitivity Generator and Bus Voltage Sensors
Thermocouple Inputs Analog Inputs
Diagnostics
Three LEDs at the top of the VPRO front panel provide status information. The normal RUN condition is a flashing green, FAIL is a solid red. The third LED is STATUS and is normally off but shows a steady orange if a diagnostic alarm condition exists in the board. VPRO makes diagnostic checks and creates faults as follows: Trip relay driver and contact feedbacks Solenoid voltage and solenoid voltage source Economizer relay driver and contact feedbacks K25A relay driver and coil Servo clamp relay driver and contact feedback High and low limits on all analog inputs If any one of the above signals goes unhealthy, a composite diagnostic alarm L3DIAG_VPROR, or S, or T occurs. The diagnostic signals can be individually latched and then reset with the RESET_DIA signal if they go healthy.
Terminal board connectors on TPRO and TREG have their own ID device that is interrogated by the I/O board. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read by VPRO and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
Parameter Configuration Turbine_Type Define the type of turbine from selection of ten types Two gas turbine, two LM, two large steam, one medium steam, one small steam, two stag GT Enable, disable Enable, disable Description Choices
LMTripZEnable OT_Trip_Enbl OvrTemp_Trip TA_Trip_Enab1 ContWdogEn SpeedDifEn StaleSpdEn DiagSolPwrA RatedRPM_TA AccelCalType Auto Reset OTBias_RampP OTBias_RampN Min_MA_Input Max_MA_Input OTBias_Dflt
On LM machine, when no PR on Z, enable vote for trip Enable overtemperature trip
Iso-thermal overtemperature trip setting for exhaust thermocouples -60 to 2,000 in degree F Steam, enable trip anticipation on ETR1 (same for four ETRs) Enable trip on loss of control outputs to VPRO Enable trip on speed difference between controller & VPRO Enable trip on speed from controller freezing For TREL/TRES, sol power, BusA, diagnostic (same for three solenoids) Steam, rated RPM, used for trip anticipation calc Select acceleration calculation type Automatic restoring of thermocouples removed from scan Overtemperature bias ramp positive Overtemperature bias ramp negative Minimum MA for healthy 4/20 ma Input Maximum MA for healthy 4/20 ma Input Overtemperature bias 0 to 21 0 to 21 0 to 20,000 Slow, medium, fast Enable, disable Enable. disable Enable. disable Enable, disable Enable, disable Enable, disable
Parameter OS_Diff 5J6:IS200TPRO PulseRate1 PRType PRScale OS_Setpoint OS_Tst_Delta Zero_Speed Min_Speed Accel_Trip Acc_Setpoint TMR_DiffLimt BusPT_KVolts PT_Input PT_Output TMR_DiffLimt GenPT_KVolts TC1R ThermCplType Low Pass Filter TC2R TC3R Cold Junction TMR_DiffLimt AnalogIn1 Input Type Low_Input Low_Value High_Input High_Value InputFilter Trip_Enable DiagHighEnab DiagLowEnab TripSetpoint TripTimeDelay TMR_DiffLimt J3:IS200TREG KESTOP1_Fdbk1 DiagVoteEnab Contact1
Description Absolute speed difference, in percent, for trip threshold (if SpeedDifEn enabled)
Choices 0 to 10
First of three speed inputs - card point Selects gearing (resolution) Pulses per revolution (output RPM) Overspeed trip setpoint in RPM Offline overspeed test setpoint delta in RPM Zero speed for this shaft in RPM Minimum speed for this shaft in RPM Enable acceleration trip Accelerate trip setpoint in RPM/second Difference limit for voted pulse rate inputs in engineering units Kilo-Volts RMS, bus potential transformer - card point PT input in kilovolts rms for PT_Output PT output in volts rms for PT_Input typically 115 Difference limit for voted PT inputs in percent Kilo-Volts RMS, generator PT, configuration similar to Bus PTcard point Thermocouple 1, for R module (first of R, S, and T) - card point Select thermocouple type or mV input Enable 2 Hz low pass filter Thermocouple 2, for R module (first of R, S, and T) config as above - card point Thermocouple 3, for R module (first of R, S, and T) config as above - card point Cold junction for thermocouples 1-3 Difference limit for voted TMR cold junction inputs in Deg F First of three analog inputs - card point Type of analog input Input mA at low value Input value in engineering units at low value Input mA at high value Input value in engineering units at high mA Filter bandwidth in Hz Enable trip for this mA input Enable high input limit diag Enable low input limit diag Trip setpoint in engineering units Time delay before tripping turbine after signal exceeds setpoint in seconds Difference limit for voted TMR inputs in per cent of (High_ValueLow_Value) First TREG board Emergency Stop ESTOP1, inverse sense, K4 relay, True=Run card point Enable voting disagreement diagnostic Trip interlock 1 (first of 7) - card point
point edit (input FLOAT) Unused, PR<6,000 Hz, PR>6,000 Hz 0 to 1,000 0 to 20,000 -2,000 to 2,000 0 to 20,000 0 to 20,000 Enable, disable 0 to 20,000 0 to 20,000 Point edit (input FLOAT) 0 to 1,000 60 to 150 0 to 100 Point edit (input FLOAT) Point edit (input FLOAT) Unused, mV, T, K, J, E Enable, disable Point edit (Input FLOAT) Point edit (Input FLOAT) Point edit (Input FLOAT) -60 to 2,000 Point Edit (Input FLOAT) Unused, 4-20 mA, 10 V -10 to 20 -3.402e +38 to 3.402e +38 -10 to 20 -3.402e +38 to 3.402e +38 Unused, 12 Hz, 6 Hz, 3Hz, 1.5 Hz, 0.75 Hz Enable, Disable Enable, Disable Enable, disable -3.402e +38 to 3.402e +38 0 to 10 0 to 100 Connected, not connected Point edit (input BIT) Enable, disable Point edit (Input BIT)
Parameter ContactInput SeqOfEvents DiagVoteEnab TrpTimeDelay TripMode K1_Fdbk RelayOutput DiagVoteEnab DiagSolEnab KE1_Fdbk RelayOutput DiagVoteEnab K4CL_Fdbk Relay Output DiagVoteEnab K25A_Fdbk SynchCheck DiagVoteEnab SystemFreq ReferFreq TurbRPM VoltageDiff FreqDiff PhaseDiff GenVoltage BusVoltage J4A:IS200TREG KESTOP2_Fdbk K4_Fdbk KE4_Fdbk
Description Trip interlock 1 used Record contact transitions in sequence of events Enable voting disagreement diagnostic Time delay before tripping turbine after contact opens (sec) Trip mode Trip relay 1 feedback (first of 3) - card point Relay feedback used Enable voting disagreement diagnostic Enable solenoid voltage diagnostic Economizer relay for trip solenoid feedbk (first of 3) - card point Economizer relay feedback used Enable voting disagreement diagnostic Drive control valve servos closed, use only for steam turbine simplex - card Point Servo valve clamp used Enable voting disagreement diagnostic Synchronizing check relay on TTUR - card point Synch check relay K25A used Enable voting disagreement diagnostic System frequency in Hz Select generator frequency reference for PLL, standard PR input or from signal space Rated load turbine RPM Maximum voltage difference in kV rms for synchronizing Maximum frequency difference in Hz for synchronizing Maximum phase difference in degrees for synchronizing Minimum generator voltage in kV rms for synchronizing Minimum bus voltage in kV rms for synchronizing Second TREG board Emergency stop ESTOP2, inverse sense, K4 relay, True= run card point Trip relay 4 feedback (first of 4,5,6) - card point Economizing relay for trip solenoid 4 (first of 4,5,6) - card point
Choices Used, unused Enable, disable Enable. disable 0 to 10 Direct, conditional, disable Point edit (Input BIT) Used, unused Enable, disable Enable, disable Point edit (Input BIT) Used, unused Enable, disable Point edit (Input BIT) Used, unused Enable, disable Point edit (Input BIT) Used, unused Enable, disable 50 or 60 PR Std or Sg space 0 to 20,000 0 to1,000 0 to 0.5 0 to 30 1 to 1,000 1 to 1,000 Connected, not con. Point edit (Input BIT) Point edit (Input BIT) Point edit (Input BIT)
Card Points(Signals) DescriptionPoint Edit (Enter Signal Connection) L3DIAG-VPROR L3DIAG-VPROS L3DIAG-VPROT PR1_Zero PR2_Zero PR3_Zero K1_FdbkNVR K1_FdbkNVS K1_FdbkNVT : K6_FdbkNVR K6_FdbkNVS K6_FdbkNVT Card Diagnostic Card Diagnostic Card Diagnostic L14HP_ZE L14IP_ZE L14LP_ZE Non voted L4ETR1_FB, Trip Relay 1 Feedback R Non voted L4ETS1_FB, Trip Relay 1 Feedback S Non voted L4ETT1_FB, Trip Relay 1 Feedback T : Non voted L4ETR6_FB, Trip Relay 6 Feedback R Non voted L4ETS6_FB, Trip Relay 6 Feedback S Non voted L4ETT6_FB, Trip Relay 6 Feedback T
Direction Input Input Input Input Input Input Input Input Input : Input Input Input
Type BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT
Card Points(Signals) DescriptionPoint Edit (Enter Signal Connection) OS1_Trip OS2_Trip OS3_Trip Dec1_Trip Dec2_Trip Dec3_Trip Acc1_Trip Acc2_Trip Acc3_Trip TA_Trip TA_StpLoss OT_Trip MA1_Trip MA2_Trip MA3_Trip SOL1_Vfdbk : SOL6_Vfdbk L25A_Cmd L12HP_TP L12IP_TP L12LP_TP L12HP_DEC L12IP_DEC L12LP_DEC L12HP_ACC L12IP_ACC L12LP_ACC Trip Anticipate Trip L12TA_TP L30TA L26TRP L3MA_TRP1 L3MA_TRP2 L3MA_TRP3 When TREG used, Trip Solenoid 1 Voltage detected status : When TREG used, Trip Solenoid 6 Voltage detected status L25A Breaker Close Pulse
Direction Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input
Type BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT
The following Input BITs marked config are set by Configuration
Card Points(Signals) DescriptionPoint Edit (Enter Signal Connection) Cont1_TrEnab : Cont7_TrEnab Acc1_TrEnab Acc2_TrEnab Acc3_TrEnab OT_TrEnab GT_1Shaft GT_2Shaft LM_2Shaft LM_3Shaft LargeSteam MediumSteam SmallSteam STag_GT_1S STag_GT_2S ETR1_Enab : ETR6_Enab KE1_Enab KE2_Enab KE3_Enab KE4_Enab KE5_Enab KE6_Enab K4CL_Enab K25A_Enab Config_Contact 1 Trip Enabled : Config -contact 7 trip enabled Config- accel 1 trip enabled Config- accel 2 trip enabled Config- accel 3 trip enabled Config overtemp trip enabled Config gas turb, 1 shaft enabled Config gas turb, 2 shaft enabled Config LM turb, 2 shaft enabled Config LM turb, 3 shaft enabled Config Large steam 1, enabled Config medium steam, enabled Config small steam, enabled Config - stag 1 shaft, enabled Config - stag 2 shaft, enabled Config - ETR1 relay enabled : Config - ETR6 relay enabled Config - economizing relay 1 enabled Config - economizing relay 2 enabled Config - economizing relay 3 enabled Config - economizing relay 4 enabled Config - economizing relay 5 enabled Config - economizing relay 6 enabled Config - servo clamp relay enabled Config - sync check relay enabled
Direction Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input : Input Input Input Input Input Input Input Input Input
Type BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT
Card Points(Signals) DescriptionPoint Edit (Enter Signal Connection) L5CFG1_Trip L5CFG2_Trip L5CFG3_Trip OS1_SP_CfgEr OS2_SP_CfgEr OS3_SP_CfgEr ComposTrip1 ComposTrip2 ComposTrip3 L5ESTOP1 L5ESTOP2 L5Cont1_Trip : L5Cont7_Trip LPShaftLock Inhbt1_Fdbk : Inhbt7_Fdbk L3SS_Comm Trip1_EnCon : Trip7_EnCon BusFreq GenFreq GenVoltsDiff GenFreqDiff GenPhaseDiff PR1_Accel PR2_Accel PR3_Accel PR1_Max PR2_Max PR3_Max OTSPBias OTSetpoint SynCk_Perm SynCk_ByPass Cross_Trip OnLineOS1Tst OnLineOS2Tst OnLineOS3Tst OffLineOS1Tst OffLineOS2Tst OffLineOS3Tst TrpAntcptTst LokdRotorByp HPZeroSpdByp Contact7 trip LP shaft locked Trip inhibit signal feedback for contact 1 : Trip inhibit signal feedback for contact 7 Valid communications with VCMI status Contact1 trip enabled conditional : Contact7 trip enabled conditional Bus frequency SFL 2 Hz Gen frequency SF 2 Hz Gen - bus kV difference rms: gen low is negative Gen - bus slip Hz: gen slow is negative Gen - bus phase difference degrees: gen lag is negative HP accel in RPM/SEC IP accel in RPM/SEC LP accel in RPM/SEC HP max speed since last zero speed in RPM (see Vol 1 Chap 8 overspeed protection) IP max speed since last zero speed in RPM LP max speed since last zero speed in RPM Overtemperature setpoint bias Overtemperature setpoint L25A_PERM sync check permissive L25A_BYPASS sync check bypass L4Z_XTRP control cross trip L97HP_TST1 on line HP overspeed test L97LP_TST1 on line HP overspeed test L97IP_TST1 on line LP overspeed test L97HP_TST2 offline HP overspeed test L97LP_TST2 offline IP overspeed test L97IP_TST2 offline LP overspeed test L97A_TST trip anticipate test L97LR_BYP locked rotor bypass L97ZSC_BYP HP zero speed check bypass HP config Trip IP config Trip LP config Trip HP overspeed setpoint config mismatch error IP overspeed setpoint config mismatch error LP overspeed setpoint config mismatch error Composite trip 1 Composite trip 2 Composite trip 3 ESTOP1 trip, TREG, J3 ESTOP2 trip, TREG, J4 Contact1 trip :
Direction Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input : Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Output Output Output Output Output Output Output Output Output Output Output Output
Type BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT
Card Points(Signals) DescriptionPoint Edit (Enter Signal Connection) TestETR1 : TestETR4 PTR1 : PTR6 PR_Max_Rst OnLineOS1X Trip1 Inhbt : Trip7 Inhbt CJBackup OS1_Setpoint OS2_Setpoint OS3_Setpoint OS1_TATrpSp OTBias DriveFreq Speed1 ContWdog L97ETR1 ETR1 test, true denergizes relay : L97ETR4 ETR4 Test, true denergizes relay L20PTR1 primary trip relay CMD for diagnostic only : L20PTR6 primary trip relay CMD for diagnostic only Max speed reset (see Vol 1 Chap 8 overspeed protection) L43EOST_ONL online HP overspeed test with auto reset Contact1 trip inhibit : Contact7 trip inhibit Estimated TC cold junction temperature in Deg F HP overspeed setpoint in RPM IP overspeed setpoint in RPM LP overspeed setpoint in RPM PR1 overspeed trip setpoint in RPM for trip anticipate Fn Overtemperature bias signal Drive (Gen) Freq (Hz), used for non standard drive config. Shaft speed 1 in RPM Controller watchdog counter
Direction Output : Output Output : Output Output Output Output : Output Output Output Output Output Output Output Output Output Output
Type BIT BIT BIT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT LONG INT
Alarms
Fault 2 3 4-15 16 17 18 19 20 21 22 23 24 25-29 30 Fault Description Flash memory CRC failure CRC failure override is active Reserved for future use System limit checking is disabled Board ID failure J3 ID failure J4 ID failure J5 ID failure J6 ID failure J3A ID failure J4A ID failure Firmware/Hardware incompatibility Reserved for future use ConfigCompatCode mismatch; firmware: #; Tre: # The A tre file has been installed that is incompatible with the configuration compatibility code that the firmware is firmware on the I/O board. Either the tre file or firmware must expecting is different than what is in the tre file for this change. Contact the factory. board IOCompatCode mismatch; firmware: #; Tre: # The I/O compatibility code that the firmware is expecting is different than what is in the tre file for this board Contact input # not responding to test mode trip interlock number # is not reliable A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. Contact input circuit failure on VPRO or TREG/TREL/TRES board. System checking was disabled by configuration. Failed ID chip on the VME I/O board Failed ID chip on connector J3, or cable problem Failed ID chip on connector J4, or cable problem Failed ID chip on connector J5, or cable problem Failed ID chip on connector J6, or cable problem Failed ID chip on connector J3A, or cable problem Failed ID chip on connector J4A, or cable problem Invalid terminal board connected to VME I/O board Possible Cause Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online)
31
32-38 39-40
Contact excitation voltage test failure contact excitation Loss of P125 voltage caused by disconnection of JH1 to voltage has failed, trip interlock monitoring voltage is TREG/TREL/TRES, or disconnect of JX1, JY1, JZ1 on lost TREG/TREL/TRES to J3 on VPRO.
Fault 41-43
Fault Description
Possible Cause
Thermocouple ## raw counts high. The ## A condition such as stray voltage or noise caused the input to thermocouple input to the analog to digital converter exceed +63 mV. exceeded the converter limits and will be removed from scan Thermocouple ## raw counts low. The ## thermocouple input to the analog to digital converter exceeded the converter limits and will be removed from scan Cold junction raw counts high. Cold junction device input to the A/D converter has exceeded the limits of the converter. Normally two cold junction inputs are averaged; if one is detected as bad then the other is used. If both cold junctions fail, a predetermined value is used Cold junction raw counts low. Cold junction device input to the A/D converter has exceeded the limits of the converter Calibration reference # raw counts high. Calibration reference # input to the A/D converter exceeded the converter limits. If Cal. Ref. 1, all even numbered TC inputs will be wrong; if Cal. Ref. 2, all odd numbered TC inputs will be wrong Calibration reference raw counts low. Calibration reference input to the A/D converter exceeded the converter limits The board detected a thermocouple open and applied a bias to the circuit driving it to a large negative number, or the TC is not connected, or a condition such as stray voltage or noise caused the input to exceed -63 mV. The cold junction device on the terminal board has failed.
44-46
47
48
The cold junction device on the terminal board has failed.
49
The precision reference voltage on the board has failed.
50
51
Null reference raw counts high. The null (zero) The null reference voltage signal on the board has failed. reference input to the A/D converter has exceeded the converter limits Null reference raw counts low. The null (zero) The null reference voltage signal on the board has failed. reference input to the A/D converter has exceeded the converter limits Thermocouple ## linearization table high. The thermo- The thermocouple has been configured as the wrong type, or couple input has exceeded the range of the a stray voltage has biased the TC outside of its normal range, linearization (lookup) table for this type. The or the cold junction compensation is wrong. temperature will be set to the table's maximum value Thermocouple ## linearization table low. The thermo couple input has exceeded the range of the linearization (lookup) table for this type. The temperature will be set to the table's minimum value The thermocouple has been configured as the wrong type, or a stray voltage has biased the TC outside of its normal range, or the cold junction compensation is wrong.
52
53-55
56-58
59-61
Analog Input # unhealthy. The number # analog input The input has exceeded 4-20 mA range, or for input #1 if to the A/D converter has exceeded the converter limits jumpered for 10 V, it has exceeded 10 V range, or the 250 burden resistor on TPRO has failed. P15=####.## volts is outside of limits. The P15 power supply is out of the specified +12.75 to +17.25 V operating limits Analog 15 V power supply on VPRO board has failed.
63
64
N15=####.## volts is outside of Limits. The N15 Analog 15 V power supply on VPRO board has failed. power supply is out of the specified 17.25 to 12.75 V operating limits Reserved for future use P28A=####.## Volts is Outside of Limits. The P28A power supply is out of the specified 23.8 to 31.0 V operating limits P28B=####.## Volts is Outside of Limits. The P28B power supply is out of the specified 23.8 to 31.0 V operating limits The P28A power supply on VPWR board has failed, otherwise there may be a bad connection at J9, the VPWR to VPRO interconnect. The P28B power supply on VPWR board has failed, otherwise there may be a bad connection at J9, the VPWR to VPRO interconnect.
65-66 67
68
69-82
Relay driver feedback does not match the requested The relay driver or relay driver feedback monitor on the state. The state of the command to the relay does not TREG/TREL/TRES terminal board has failed, or the cabling match the state of the relay driver feedback signal; the between VPRO and TREG/TREL/TRES is incorrect. relay cannot be reliably driven until corrected
Fault 69-71 72-74 75 76 77-79 80-82 83-96
Fault Description Trip Relay (ETR) Driver # Mismatch requested State. Terminal Board 1 Econ Relay Driver # Mismatch Requested State. Terminal Board 1 Servo Clamp Relay Driver Mismatch (K4CL) Requested State. K25A Relay (Synch Check) Driver Mismatch Requested State. Trip Relay (ETR) Driver # Mismatch requested State. Terminal Board 2 Econ Relay Driver # Mismatch Requested State. Terminal Board 2
Possible Cause See 69-82 above See 69-82 above See 69-82 above See 69-82 above See 69-82 above See 69-82 above
Relay contact feedback does not match the requested The relay contact or relay contact feedback monitor on the state. The state of the command to the relay does not TREG/TREL/TRES terminal board has failed, or the cabling match the state of the relay contact feedback signal; between VPRO and TREG/TREL/TRES is incorrect. the relay cannot be reliably driven until corrected Trip Relay (ETR) Contact # Mismatch requested State. See 83-96 above Terminal Board 1 Econ Relay Contact # Mismatch Requested State. Terminal Board 1 Servo Clamp Relay Driver Mismatch (K4CL) Requested State. Terminal Board 1 K25A Relay (Synch Check) Contact MismatchRequested State. Terminal Board 1 See 83-96 above See 83-96 above The K25A relay contact feedback on the TREG/TREL/TRES board has failed, or the K25A relay on TTUR has failed, or the cabling between VPRO and TTUR is incorrect. The state of the command to the K25A relay does not match the state of the K25A relay contact feedback signal; cannot reliably drive the K25A relay until the problem is corrected. The signal path is from VPRO to TREG/TREL/TRES to TRPG/TRPL/TRPS to VTUR to TTUR. See 83-96 above See 83-96 above The power detection monitor on the TREG1/TREL1/TRES1 board has failed, or there is a loss of P125 V dc through the J2 connector from TRPG/TRPL/TRPS board, or the cabling between VPRO and TREG1/TREL1/TRES1 or between TREG1/TREL1/TRES1 and TRPG/TRPL/TRPS is incorrect. The power detection monitor on the TREG2/TREL2/TRES2 board has failed, or there is a loss of P125 V dc through the J2 connector from TRPG/TRPL/TRPS board, or the cabling between VPRO and TREG2/TREL2/TRES2 or between TREG2/TREL2/TRES2 and TRPG/TRPS/TRPL is incorrect. Also trip relays K4-K6 may be configured when there is no TREG2/TREL2/TRES2 board. The trip solenoid # voltage monitor on TREG/TREL/TRES has failed or ETR # driver failed, or PTR # driver failed. There may be a loss of 125 V dc through the J2 connector from TRPG/TRPL/TRPS, which has a separate diagnostic. See (105-107)
83-85 86-88 89 90
91-93 94-96 97
Trip Relay (ETR) Contact # Mismatch Requested State. Terminal Board 2 Econ Relay Contact # Mismatch Requested State. Terminal Board 2 TREG/TREL/TRES J3 Solenoid Power Source is Missing. The P125 V dc source for driving the trip solenoids is not detected; cannot reliably drive the trip solenoids TREG/TREL/TRES J4 Solenoid Power Source is Missing. The P125 V dc source for driving the trip solenoids is not detected; cannot reliably drive the trip solenoids K4-K6
98
99-104
TREG/TREL/TRES Solenoid Voltage # Mismatch Requested State. The state of the trip solenoid # does not match the command logic of the voted ETR # on TREG/TREL/TRES, and the voted primary trip relay (PTR) # on TRPG/TRPL/TRPS, the ETR cannot be reliably driven until corrected
105
TREL/TRES, J3, Solenoid Power, Bus A, Absent. The Loss of power bus A through J2 connector from TRPL/TRPS voltage source for driving the solenoids is not detected on Bus A; cannot reliably drive these solenoids TREL/TRES, J3, Solenoid Power, Bus B, Absent. The Loss of power bus B through J2 connector from TRPL/TRPS voltage source for driving the solenoids is not detected on Bus B; cannot reliably drive these solenoids
106
Fault 107
Fault Description
Possible Cause
TREL/TRES, J3, Solenoid Power, Bus C, Absent. The Loss of Power Bus C through J2 connector from TRPL/TRPS voltage source for driving the solenoids is not detected on Bus C; cannot reliably drive these solenoids Control Watchdog Trip Protection This alarm can only occur if Configuration -> ContWdogEn has been enabled. An alarm indicates that the signal space point -> ContWdog has not changed for 5 consecutive frames. The alarm will reset itself if changes are seen for 60 seconds. Verify that the ContWdog is set up correctly in the toolbox and that the source of the signal is changing the value at least once a frame. Check Ethernet cable and connections.
108
109
Speed Difference Trip Protection This alarm can only occur if Configuration -> SpeedDifEnable has been enabled.
Verify that the Speed1 signal is set up correctly in the toolbox and that the source of the signal reflects the VTUR pulse rate speed.
Check Ethernet cable and connections. An alarm indicates that the difference between the output signal Internal Points -> Speed1 and the first VPRO pulse rate speed is larger than the percentage Configuration -> OS_DIFF for more than 3 consecutive frames. The alarm will reset itself if the difference is within limits for 60 seconds. 110 Verify that the Speed1 signal is set up correctly in the toolbox Stale speed trip protection. and that the source of the signal reflects the VTUR pulse rate This alarm can only occur if Configuration -> StaleSpdEn has been enabled. An alarm indicates that speed input. the signal Internal Points -> Speed1 has not changed for 5 consecutive frames. The alarm will reset itself if Check Ethernet cable and connections. the speed dithers for 60 seconds. Reserved for future use Logic Signal # Voting mismatch. The identified signal from this board disagrees with the voted value A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable.
111-127 128-319 320-339
Input Signal # Voting mismatch, Local #, Voted #. The A problem with the input. This could be the device, the wire to specified input signal varies from the voted value of the the terminal board, the terminal board, or the cable. signal by more than the TMR Diff Limit
TPRO Emergency Protection

The Emergency Protection (TPRO) terminal board provides the VPRO with speed signals, temperature signals, generator voltage, and bus voltage as part of an independent emergency overspeed and synchronization protection system. The protection system consists of triple redundant VPRO boards in a module separate from the turbine control system, controlling the trip solenoids through TREx (TREG, or TREL, or TRES). TPRO supplies inputs to all three VPRO boards. The following figure shows the cabling to VPRO from the TPRO and TREx terminal boards. The VPRO board provides the emergency trip function. Up to three trip solenoids can be connected between the TREx and TRPx (TRPG, or TRPL, or TRPS) terminal boards. TREx provides the positive side of the 125 V dc to the solenoids and TRPx provides the negative side. Either board can trip the turbine. VPRO provides emergency overspeed protection and the emergency stop functions. It controls the 12 relays on TREG, nine of which form three groups of three to vote inputs controlling the three trip solenoids. A second TREG board may be driven from VPRO through J4.
Note TPRO does not work with the Mark* VIe I/O packs.
The following figure shows how the VTUR and VPRO boards share in a gas turbine protection scheme. Both detect turbine overspeed, and either one can independently trip the turbine using the relays on TRPG or TREG.
TPRO Terminal Board
x
VPRO- R8 Ethernet IONet JZ1

I O N E T RUN FAIL STAT X 8 Y 4 T 2 Z R 1 C S E R x x x
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
JZ5 JY1 Cables to VPRO-T8
J6
P5 COM P28A P28B E T H R P A R A L x
JY5
J 5
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
JX1 JX5
Cables to VPRO-S8
J 3
F
J 4
N
Cables to VPRO-R8
x
VPRO
x
P O W E R
x
To TREG Shield Bar BarrierType Terminal Blocks can be unplugged from board for maintenance 37-pin "D" shell type connectors with latching fasteners To Second TREG (optional)
TPRO Terminal Board, VPRO Board, and Cabling
VTUR
Special speed cable
JR5 TTUR JS5
J5
JT5 JR1 JS1 Optional daughterboard JT1 3 Relays Gen Synch 335 V dc from <Q> J3 J4 J5 TRPG Two xfrs
JR1 J3 To second TRPG board (optional) J1 125 VDC Cable J2 JS1 JT1
J4
J4
9 Relays (3 x 3 PTR's)
Trip Solenoids, three circuits
JX1 VPRO J3 J4 J5 J6 To second TREG Board (optional) JH1 P125 V dc from <PDM> NEMA class F Special speed cable JX5 JY5 JZ5 JX1 JY1 125 VDC JZ1 JY1 JZ1
J2
TREG
J1
Trip signal to TSVO TB's
12 Relays (9 ETR's, 3 econ. relays)
TPRO
J7
2 transformers
Turbine Control and Protection Boards, Gas Turbine Control Example
Installation
The generator and bus potential transformers, analog inputs, and thermocouples are wired to the first terminal block on TPRO. The magnetic speed pickups are wired to the second block. Jumpers JP1A and JP1B are set to give either a 4-20 mA or voltage input on the first of the three analog inputs. The wiring connections are shown in the following figure. Two cables go to each of the three VPRO boards.
Turbine Protection Terminal Board TPRO

x
ma
VOLTS
JZ1
Gen (L) Bus (L) 20mA1 mAret 20mA2 20mA3 TC1R (L) TC2R (L) TC3R (L) TC1S (L) TC2S (L) TC3S (L)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
Gen (H) Bus (H) P24V1 VDC P24V2 P24V3 TC1R (H) TC2R (H) TC3R (H) TC1S (H) TC2S (H) TC3S (H)
JP1A Gen Volts Analog Inputs OPEN RETURN JP1B
JZ5 Thermocouple Inputs To J5 JY5
JY1
To VPRO-T8 J6
TC1T (L) TC2T (L) TC3T (L) MX1 (L) MX2 (L) MX3 (L) MY1 (L) MY2 (L) MY3 (L) MZ1 (L) MZ2 (L) MZ3 (L)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
TC1T (H) TC2T (H) TC3T (H) MX1 (H) MX2 (H) MX3 (H) MY1 (H) MY2 (H) MY3 (H) MZ1 (H) MZ2 (H) MZ3 (H)
JX1 Magnetic Speed Pickups (MPU) To J5 JX5
To VPRO-S8 J6
To J5 To VPRO-R8 J6

TPRO Wiring and Cabling
Operation
The main purpose of the TPRO is to supply speed signals to VPRO for the emergency overspeed (EOS) protection for the turbine. In addition, TPRO supplies generator signals for backup synchronization check protection, three analog current inputs, and nine thermocouple inputs, primarily for exhaust over-temperature protection on gas turbines. VPRO provides 28 V dc to TPRO to power the three analog input transmitters.
Speed Control and Overspeed Protection

Speed control and overspeed protection is implemented with six passive, magnetic speed pickups. The first three are monitored by the controller, which uses the median signal for speed control and the primary overspeed protection. The second three are separately connected to the three VPROs in the protection module. Provision is made for nine passive magnetic speed pickups or active pulse rate transducers (TTL type) on the TPRO terminal board, with three being monitored by each of the three VPROs.
Backup Synch Check Protection

TPRO provides inputs to the protection module for backup synchronization check. The generator and bus voltages are supplied from two, single phase, potential transformers (PTs) secondary output supplying a nominal 115 V rms. The maximum cable length between the PTs and the turbine control is 100 meters of 18 AWG twisted, shielded wire. Each PT is magnetically isolated with a 1,500 V rms rated barrier and a circuit load less than 3 VA. Each PT input is internally connected in parallel through TPRO to the three VPROs in the protection module. The triple redundant phase slip windows result in a voted logical output on the TREG terminal board, which drives the K25A relay. This relays contacts are connected in series with the synch permissive relay (K25P) and the auto synch relay (K25) to insure that no false command is issued to close the generator breaker. Similarly, contacts from the K25A contact are connected in series with the contacts from remote, manual synchronizing equipment to insure no false commands.
Thermocouple and Analog Inputs

TPRO provides thermocouple and analog inputs to the protection module, primarily for gas turbine applications. Nine thermocouple inputs are monitored with three connected to each VPRO. These are generally used for backup exhaust overtemperature protection. Also, one 5, 10 V dc, 4-20 mA input, and two 4-20 mA inputs can be connected to the TPRO terminal board, which feeds the inputs in parallel to the three VPROs.
Terminal Board TPRO 1 Gen. Volts 120 V ac from PT 2

Noise Suppression
JX1
VPRO R8 Protection
VPRO S8 Protection
VPRO T8 Protection
NS
Bus Volts 120 Vac from PT To TTUR TC1RH TC1RL TC1SH TC1SL TC1TH TC1TL P24V1 V dc 20mA1 mAret
3 4
Noise Suppression
ID
NS Thermocouple Inputs
NS NS NS NS NS NS
1
JY1
J6
J6
J6
13 14 19 20 25 26 5 7 6 8
CJ
Three TC ccts to R8
CJ
1
ID
JZ1
1
Three TC ccts to S8
CJ
Three TC ccts to T8 P28VV Current Limiter

ID
JPA1
VDC
P28V,R8 P28V,S8 P28V,T8 To R8,S8,T8
J5
J5
J5
20 ma 250 ohms
Open
Ret
One of the above ccts P28VV
J3
J3
J3
JPB1 P24V2 20 mA2

9 10 Current Limiter 250 ohms
J4
J4
J4
To R8,S8,T8 JX5
Two of the above ccts #1 Emergency Magnetic Speed Pickup #2 Emergency Magnetic Speed Pickup #3 Emergency Magnetic Speed Pickup
MX1H
31 32 NS 3 Circuits
MX1H

ID
To TREG and Trip Solenoids
MY1H
37 38 NS 3 Circuits
MY1L
Filter Clamp AC Coupling Filter Clamp AC Coupling
JY5
ID
MZ1H
43 44 NS 3 Circuits
JZ5
ID
MZ1L
TPRO Terminal Board and TMR VPROs
Specifications
Item Number of Inputs Specification 9 Passive proximity probes for speed pickups 1 Generator and 1 Bus Voltage 9 Thermocouples 1 4-20 mA current or voltage 2 4-20 mA current Power Supply Voltage Input supply 28 V dc for the analog sensors Magnetic Pickup (MPU) Output resistance 200 ohms with inductance of 85 mH. Characteristics Output generates 150 V p-p into 60 K ohms at the TPRO terminal block, with insufficient energy for a spark. The maximum short circuit current is approximately 100 mA. The system applies up to 400 ohm normal mode load to the input signal to reduce the voltage at the terminals. MPU Cable Sensors can be up to 300 m (984 ft) from the cabinet, assuming that shielded pair cable is used, with typical 70 nF single ended or 35 nF differential capacitance, and 15 ohms resistance. Minimum signal is 27 mV pk at 2 Hz Minimum signal is 450 mV pk at 14 kHz Two Single-Phase Potential Transformers, 115 V rms secondary. Voltage accuracy is 0.5% of rated Volts rms. Frequency Accuracy 0.05%. Phase Difference Measurement better than 1 degree. Allowable voltage range for synchronizing is 75 to 130 V rms. Each input has a load of less than 3 VA. Thermocouple Inputs Analog Inputs Same specifications as for VTCC board 2 current inputs, 4-20 mA 1 current input with selection of 4-20 mA, or 5 V dc, or 10 V dc. Same specifications as for VAIC board. Size 17.8 cm Wide x 33.02 cm High (7.0 in x 13 in)
MPU Pulse Rate Range 2 Hz to 20 kHz MPU Input Circuit Sensitivity Generator and Bus Voltage Sensors
Diagnostics
VPRO makes diagnostic checks on TPRO and its cables and input signals as follows: If high or low limits on analog inputs are exceeded a fault is created. If any one of the above signals goes unhealthy, a composite diagnostic alarm L3DIAG_VPROR (or S, or T) occurs. The diagnostic signals can be individually latched and then reset with the RESET_DIA signal if they go healthy.
Terminal board connectors on TPRO have their own ID device that is interrogated by the I/O board. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read by VPRO and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
Configuration of the terminal board is by means of jumpers. For location of these jumpers refer to the Installation diagram. The jumper choices are as follows: Jumper JPA1 selects either current input or voltage input Jumper JPB1 selects whether the return is connected to common or is left open
All other configuration is for VPRO and is done from the toolbox.
TREG Turbine Emergency Trip

The Gas Turbine Emergency Trip (TREG) terminal board provides power to three emergency trip solenoids and is controlled by the I/O controller. Up to three trip solenoids can be connected between the TREG and TRPG terminal boards. TREG provides the positive side of the dc power to the solenoids and TRPG provides the negative side. The I/O controller provides emergency overspeed protection, emergency stop functions, and controls the 12 relays on TREG, nine of which form three groups of three to vote inputs controlling the three trip solenoids. There are a number of board types as follows: The H1A version is not used for new production and is replaced by H1B. H1B is the primary version for 125 V dc applications. Control power from the JX1, JY1, and JZ1 connectors are diode combined to create redundant power on the board for status feedback circuits and powering the economizing relays. Power separation is maintained for the trip relay circuits. H2B is used for 24 V dc applications. All other features are the same as H1B. H3B is a special version of H1B for use in systems with redundant TREG boards. Feedback circuit and economizing relay power is provided only by the JX1 connector. H4B is a special version of H1B for use in systems with redundant TREG boards. Feedback circuit and economizing relay power is provided only by the JY1 connector. H5B is a special version of H1B for use in systems with redundant TREG boards. Feedback circuit and economizing relay power is provided only by the JZ1 connector.
In redundant TREG applications, it is typical to find one H3B and one H4B board used together. It is important that system repairs be done with the correct board type to maintain the control power separation designed into these systems.
Mark VI Systems
In Mark* VI systems, the VPRO works with the TREG terminal board. Cables with molded plugs connect TREG to the VPRO module.
Mark VIe Systems

In Mark VIe systems, TREG is controlled by the PPRO pack on SPRO. The PPRO I/O packs plug into the D-type connectors on SPRO. Cables with molded plugs connect TREG to the SPRO board.
TREG Terminal Board

P125 Vdc
JH1
To TRPG
x
J1
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
J2
JZ1
To TSVO termination boards (SMX)
JY1
Cable to VPRO
Protection Module
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47 x
JX1
Cable to VPRO
Cable to VPRO To second TREG (optional)
Shield bar
37-pin D shell type connectors with latching fasteners
TREG Turbine Emergency Trip Terminal Board, and Protection Module I/O Controller
Installation
The three trip solenoids, economizing resistors, and the emergency stop are wired directly to the first I/O terminal block. Up to seven trip interlocks can be wired to the second terminal block. The wiring connections are shown in the following figure.
Note TREGH2B is a 24 V dc version of the terminal board.

Power 125V dc To TRPG, 12 wires To TSVO boards on SMX systems
J1
Turbine Emergency Trip Terminal Board TREG
JH1
J2
JZ1
PWR_N1 RES 1B PWR_N2 RES 2B PWR_N3 RES 3B E-TRP (H) E-TRP (L)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
SOL 1 or 4 RES 1A SOL 2 or 5 RES 2A SOL 3 or 6 RES 3A E-TRP (H) JUMPER JY1
VPRO
x x x
PWR_P2 (for probe)
x x x
Contact TRP1 (L) Contact TRP2 (L) Contact TRP3 (L) Contact TRP4 (L) Contact TRP5 (L) Contact TRP6 (L) Contact TRP7 (L)
x x x x x x x
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
PWR_P1 (for probe) Contact TRP1 (H) Contact TRP2 (H) Contact TRP3 (H) Contact TRP4 (H) Contact TRP5 (H) Contact TRP6 (H) Contact TRP7 (H)
JX1
VPRO
VPRO Terminal blocks can be unplugged from terminal board for maintenance
TREG Terminal Board Wiring
Operation
TREG is entirely controlled by the VPRO protection module, and the only connections to the control modules are the J2 power cable and through the trip solenoids. In simplex systems a third cable carries a trip signal from J1 to the TSVO terminal board, providing a servo valve clamp function upon turbine trip.

Both TRPG and TREG control the trip solenoids so that either one can remove power and actuate the hydraulics to close the steam or fuel valves. The nine trip relay coils on TREG are supplied with 28 V dc from the I/O controller. The trip solenoids are supplied with 125 V dc through plug J2, and draw up to 1 A with a 0.1 second L/R time constant.
Note The solenoid circuit has a metal oxide varistor (MOV) for current suppression and a 10 , 70 W economizing resistor.
A separately fused 125 V dc feeder is provided from the turbine control for the solenoids, which energize in the run mode and de-energize in the trip mode. Diagnostics monitor each 125 V dc feeder from the power distribution module at its point of entry on the terminal board to verify the fuse integrity and the cable connection. Two series contacts from each emergency trip relay (ETR1, 2, 3) are connected to the positive 125 V dc feeder for each solenoid, and two series contacts from each primary trip relay (PTR1,2,3 in TRPG) are connected to the negative 125 V dc feeder for each solenoid. An economizing relay (KE1, 2, 3) is supplied for each solenoid with a normally closed contact in parallel with the current limiting resistor. These relays are used to reduce the current load after the solenoids are energized. The ETR and KE relay coils are powered from a 28 V dc source from the I/O controller. Each I/O controller in each of the R8, S8, and T8 sections supplies an independent 28 V dc source. The 28 V dc bus is current limited and used for power to an external manual emergency trip contact, shown as E-STOP. Three master trip relays (K4X, K4Y, K4Z) disconnect the 28 V dc bus from the ETR, and KE relay coils if a manual emergency trip occurs. Any trip that originates in either the protection module (such as EOS) or the TREG (such as a manual trip) will cause each of the three protection module sections to transmit a trip command over the IONet to the control module, and may be used to identify the source of the trip. In addition, the K4CL servo clamp relay will energize and send a contact feedback directly from the TREG terminal board to the TSVO servo terminal board. TSVO disconnects the servo current source from the terminal block and applies a bias to drive the control valve closed. This is only used on simplex applications to protect against the servo amplifier failing high.
Note The primary and emergency overspeed systems will trip the hydraulic trip solenoids independent of this circuit.
Terminal Board TRPG 02 J2
Trip solenoid 1 or 4
+
Terminal Board TREG

01
JX1 KX1 KX2 KX3

P28X1
KE1
KX1 KY1
KY1 KZ1 KX1
RD RD RD
Mon
KX1,2,3 28 V dc ID
 VPRO section R8 J3
J2
Mon
Optional economizing resistor, Trip solenoid 100 ohm, 2 or 5 70W 04 + J2
04 03 KE2
KZ1
K4X KX2 KY2

Mon
05
KY2 KZ2 KX2 KY1 KY2
JY1
RD RD RD
Mon
KY1,2,3 28 V dc ID
J2
08 07
 VPRO section S8 J3
KZ2
KY3
P28Y1
06 J2
Trip solenoid 3 or 6
+
K4Y
09 KE3
KX3 KY3
KY3 KZ3 KX3 KZ1 KZ2 KZ3

P28Z1
JZ1
J2
Mon
RD RD RD
Mon
KZ1,2,3 28 V dc ID
12 PWR_N1 for test 11 02 06 10
KZ3
 VPRO section T8 J3
J2
J2
N125V P125V 30 31
Sol pwr monitor JX1 JY1 Mon JZ1
K4Z
KE1,2,3
JX1 JY1 JZ1
PWR_P1 PWR_P2 for test probe
P28VV Mon
KE1,2,3
RD
2 3
JX1 JY1 JZ1
Three economizing relay circuits
To TSVO P28VV boards on J1 K4CL SMX systems
K4CL
RD
K4CL
2 3
JX1 JY1 JZ1
Servo clamp To relay K25A on J2 TTUR
Mon J2
JX1 JY1 JZ1 JX1 JY1 JZ1
To Exc JX1 JY1 TRP JZ1
P125X NS NS N125X
35 TRP1H 36 TRP1L 13 14 16 15 17
ETRPH ETRPL
Trip interlock seven circuits
P28VV
CL
RD
JH1 P125X N125X
BCOM
Mon
2 3
K4X K4Y K4Z
E-Stop
JUMPR JUMPR
18 Second E-STOP when applicable
TREG Board, Trip Interlocks, and Trip Solenoids
Solenoid Trip Tests

Application software in the controller is used to initiate tests of the trip solenoids. Online tests allow each of the trip solenoids to be manually tripped one at a time, either through the PTR relays from the controller, or through the ETR relays from the protection module. A contact from each solenoid circuit is wired back as a contact input to give a positive indication that the solenoid has tripped. Primary and emergency offline overspeed tests are provided too for verification of actual trips due to software simulated trip overspeed conditions.
Specifications
Item Specification
Number of trip solenoids Trip solenoid rating Trip solenoid circuits Solenoid inductance Suppression Relay outputs
Three solenoids per TREG (total of six per I/O controller) H1 - 125 V dc standard with 1 A draw H2 - 24 V dc is alternate with 1 A draw Circuits rated for NEMA class E creepage and clearance Circuits can clear a 15 A fuse with all circuits fully loaded Solenoid maximum L/R time constant is 0.1 second MOV across the solenoid Three economizer relay outputs, two second delay to energize Driver to breaker relay K25A on TTUR Servo clamp relay on TSVO
Solenoid control relay contacts Trip inputs Trip interlock excitation Trip interlock current
Contacts are rated to interrupt inductive solenoid loads at 125 V dc, 1 A Bus voltage can vary from 70 to 145 V dc Seven trip interlocks to the I/O controller protection module, 125/24 V dc One emergency stop hard wired trip interlock, 24 V dc H1 - Nominal 125 V dc, floating, ranging from 100 to 145 V dc H2 - Nominal 24 V dc, floating, ranging from 18.5 to 32 V dc H1 for 125 V dc applications: Circuits draw 2.5 mA (50 ) H2 for 24 V dc applications: Circuits draw 2.5 mA (10 )
Trip interlock isolation Trip interlock filter Trip interlock ac voltage rejection Size
Optical isolation to 1500 V on all inputs Hardware filter, 4 ms 60 V rms @ 50/60 Hz at 125 V dc excitation 17.8 cm wide x 33.02 cm, high (7.0 in x 13.0 in)
Diagnostics
The I/O controller runs diagnostics on the TREG board and connected devices. The diagnostics cover the trip relay driver and contact feedbacks, solenoid voltage, economizer relay driver and contact feedbacks, K25A relay driver and coil, servo clamp relay driver and contact feedback, and the solenoid voltage source. If any of these do not agree with the desired value then a fault is created. TREG connectors JX1, JY1, and JZ1 have their own ID device that is interrogated by I/O controller. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the plug location. When the chip is read by the I/O board and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
There are no switches on the terminal board.
Note A jumper must be placed across terminals 15 and 17 if the second emergency stop input is not required.
TRES Turbine Emergency Trip

The Small Steam Turbine Emergency Trip (TRES) terminal board is used for the emergency overspeed protection for small/medium size steam turbines. TRES is controlled by the VPRO protection module, and provides power to three emergency trip solenoids, which can be connected between the TRES and TRPS terminal boards. TRES provides the positive side of the 125 V dc to the solenoids and TRPS provides the negative side. The VPRO provides emergency overspeed protection, emergency stop functions, and controls the three relays on TRES, which control the three trip solenoids. TRES has both simplex and TMR form. There are seven dry contact inputs for trip interlocks. TRES has no economizing relays. There are no emergency stop inputs.
In the TRES, the seven dry contact inputs excitation and signal are monitored and fanned to the protection module. The board includes the synch check relay driver, K25A, and associated monitoring, the same as on TREG, and the servo clamp relay driver, K4CL, and its associated monitoring. A second TRES board cannot be driven from the protection module.
Installation
The three trip solenoids are wired to the first I/O terminal block. Up to seven trip interlocks are wired to the second terminal block. The wiring connections are shown in the following figure. Connector J2 carries three power buses from TRPS, and JH1 carries the excitation voltage for the seven trip interlocks.
Emergency Trip Terminal Board TRES (Small/Medium Steam Turbine)

JH1 Trip interlock excitation J2
x
J25
J1 K25A relay
JZ1
Servo clamp
SUS1B SOL1B PwrA_P SUS2B SOL2B PwrB_P SUS3B SOL3B
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
SUS1A SOL1A
Cable to TRPS
PwrA_N SUS2A SOL2A
ETR1 JY1
VPRO
PwrB_N SUS3A SOL3A
ETR2
ETR3
x x
PwrC_P
x x x x
TRP1(L) TRP2(L) TRP3(L) TRP4(L) TRP5(L) TRP6(L) TRP7(L)
x x x x x x x
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
JA1 PwrC_N
JX1
VPRO
TRP1(H) TRP2(H) TRP3(H) TRP4(H) TRP5(H) TRP6(H) TRP7(H)
Trip interlocks 1 through 7

VPRO
Cable for Simplex applications

Terminal blocks can be unplugged from terminal board for maintenance
Up to two #12 AWG wires per point with 300V insulation
TRES Terminal Board Wiring
Operation
The VSVO protection module controls TRES. In simplex systems, a third cable carries a trip signal from J1 to the TSVO terminal board, providing a servo valve clamp function upon turbine trip.

Both TREL and TRES control the trip solenoids 1 and 2 so that either one can remove power and actuate the hydraulics to close the steam or fuel valves. ETR3 is set up to supply power to trip solenoid #3. The nine trip relay coils on TRES are supplied with 28 V dc from the I/O controller. The trip solenoids are supplied with 125 V dc (or 24 V dc) through plug J2, and draw up to 1 A with a 0.1 second L/R time constant.
Note The solenoid circuit has an MOV for current suppression on TREL.
A separately fused 125 V dc feeder is provided from the PDM for the solenoids. Diagnostics monitor each 125 V dc feeder from the PDM at its point of entry on the terminal board to verify the fuse integrity and the cable connection.
Note A normally closed contact from each relay is used to sense the relay status for diagnostics
Two series contacts from each of the emergency trip relays (ETR1, 2, 3) are connected to the positive 125 V dc feeder for each solenoid, and two series contacts from each of the primary trip relays are connected to the negative 125 V dc feeder for each solenoid. The ETR relay coils are powered from a 28 V dc source from the I/O controller. Each I/O controller in each of the R8, S8, and T8 sections supplies an independent 28 V dc source. The K4CL servo clamp relay will energize and send a contact feedback directly from the TRES terminal board to the TSVO servo terminal board. TSVO disconnects the servo current source from the terminal block and applies a bias to drive the control valve closed. This is only used on simplex applications to protect against the servo amplifier failing high.
Solenoid Trip Tests

Simplex system uses JA1
JA1
Terminal Board TRES

P28A P28X P28Y P28
PwrA_N PwrA_P PwrB_N PwrB_P PwrC_N
J2, power buses from TRPS
Terminal Board TRPS
PwrC_P
ID
P28Z
JX1
I/O Controller
Sol. To JX1, Power JY1,JZ1, Monitor JA1
J2
SUS1A 01 02
J2
2 3
RD
ETR1
PwrA_P Mon SUS1B
To X,Y,Z, A
ETR1
ID
ETR1 ETR1
Trip solenoid SOL1A 03 +

SOL1B 04
JY1
I/O Controller
P28 2 3 RD ETR2
PwrA_N
PwrA_P 08 PwrA_N 09
Several terminals positions for different applications J2
To X,Y,Z, A
J2
Mon
ETR2
ID PwrB_P ETR2
SUS2A
11
P28 JZ1
I/O Controller
Trip solenoid SOL2A 13 +

SOL2B 14 PwrB_P 18 19 PwrB_N
SUS2B 12
ETR2 PwrB_N
2 3
RD
ETR3
J2
Mon SUS3A 21
J2
To X,Y,Z,A
ETR3
ID
PwrC_P ETR3
SUS3B 22 SOL3A SOL3B PwrC_P PwrC_N
To TSVO boards on J1 SMX systems Servo Clamp
P28VV K4CL K4CL

K4CL 2 RD 3 JX1 JY1 JZ1 JA1
Trip solenoid 23 +
24 28 29
ETR3 PwrC_N
Mon
JX1 JY1 JZ1 JA1
To JX1, JY1, JZ1, JA1

Excitation volts 7
To TTURH 1B To relay K 25A on TTUR
J25 J2 JH1 Excit_P

2 RD 3
Exc_P
NS NS
. . .
35 36
TRP1A TRP1B
Mon
From PDM
Trip interlock
Excitation_N
BCOM
7 circuits as above
TRES Terminal Board, Trip Interlocks, and Trip Solenoids
Specifications
Item Specification
Number of trip solenoids Trip solenoid rating Trip solenoid circuits Solenoid inductance Suppression Relay Outputs Solenoid control relay contacts Trip inputs Trip interlock excitation Trip interlock current
Three solenoids per TRES 125 V dc standard with 1 A draw 24 V dc is alternate with 3 A draw Circuits rated for NEMA class E creepage and clearance Circuits can clear a 15 A fuse with all circuits fully loaded Solenoid maximum L/R time constant is 0.1 sec MOV on TRPS across the solenoid Driver to breaker relay K25A on TTUR Servo clamp relay on TSVO Contacts are rated to interrupt inductive solenoid loads at 125 V dc, 1 A. Bus voltage can vary from 70 to 145 V dc. Seven trip interlocks to VPRO protection module H1 - Nominal 125 V dc, floating, ranging from 100 to 145 V dc H2 - Nominal 24 V dc, floating, ranging from 18.5 to 32 V dc H1 for 125 V dc applications: Circuits draw 2.5 mA (50 ) H2 for 24 V dc applications: Circuits draw 2.5 mA (10 )
Trip interlock isolation Trip interlock filter Trip interlock ac voltage rejection Size
Optical isolation to 1500 V on all inputs Hardware filter, 4 ms 60 V rms @ 50/60 Hz at 125 V dc excitation 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in)
Diagnostics
The I/O controller runs diagnostics on the TRES board and connected devices. The diagnostics cover the trip relay driver and contact feedbacks, solenoid voltage, K25A relay driver and coil, servo clamp relay driver and contact feedback, and the solenoid voltage source. If any of these do not agree with the desired value, a fault is created. TRES connectors JA1, JX1, JY1, and JZ1 have their own ID device that is interrogated by the I/O controller. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the plug location. When the chip is read by the I/O controller and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
TREL Turbine Emergency Trip

The Large Steam Turbine Emergency Trip (TREL) terminal board is used for the emergency overspeed protection for large steam turbines. TREL is controlled by the VPRO in the protection module, and provides power to three emergency trip solenoids, which can be connected between the TREL and TRPL terminal boards. TREL provides the positive side of the 125 V dc to the solenoids and TRPL provides the negative side. I/O controller provides emergency overspeed protection, emergency stop functions, and controls the nine relays on TREL, which form three groups of three to vote inputs controlling the three trip solenoids. The three groups are called ETR (emergency trip) 1, 2, and 3. TREL is only available in TMR form. TREL has no economizing relay as with TREG. TREL has no E-STOP function as with TREG.
A second TREL board may be driven from the protection module.
Installation
The three trip solenoids are wired to the first I/O terminal block. Up to seven trip interlocks are wired to the second terminal block. The wiring connections are shown in the following figure. Connector J2 carries three power buses from TRPL, and JH1 carries the excitation voltage for the seven trip interlocks.
Excitation To TRPL
TTUR JH1 J2
Emergency Trip Terminal Board TREL (Large Steam Turbine)

x
J25 J1 Servo clamp
JZ1
Sol1B Sol2A PwrB_N Sol3B
x x x x x x
PwrB_P
x x x x x x
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
Sol1A PwrA_N Sol2B Sol3A PwrC_N PwrA_P PwrC_P
KZ1
KZ3
KZ2
JY1
VPRO
KY1
x x x x x x
TRP1(L) TRP2(L) TRP3(L) TRP4(L) TRP5(L) TRP6(L) TRP7(L)
x x x x x x x
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
KY3
KY2 JX1
VPRO
TRP1(H) TRP2(H) TRP3(H) TRP4(H) TRP5(H) TRP6(H) TRP7(H)
KX3
KX1
KX2
VPRO Terminal blocks can be unplugged from terminal board for maintenance
TREL Terminal Board Wiring
Up to two #12 AWG wires per point with 300V insulation
Operation
TREL is entirely controlled by the VPRO protection module, and the only connections to the turbine control are the J2 power cable and the trip solenoids. In simplex systems, a third cable carries a trip signal from J1 to the TSVO terminal board, providing a servo valve clamp function upon turbine trip.

Both TRPL and TREL control the trip solenoids 1 and 2 so that either one can remove power and actuate the hydraulics to close the steam or fuel valves. ETR3 is set up to supply power to trip solenoid #3. The nine trip relay coils on TREL are supplied with 28 V dc from I/O controller. The trip solenoids are supplied with 125 V dc (or 24 V dc) through plug J2, and draw up to 1 A with a 0.1 second L/R time constant.
Note The solenoid circuit has an MOV for current suppression on TRPL.
A separately fused 125 V dc feeder is provided from the PDM to the solenoids. Diagnostics monitor each 125 V dc feeder from the PDM at its point of entry on the terminal board to verify the fuse integrity and the cable connection.
Note A normally closed contact from each relay is used to sense the relay status for diagnostics.
Two series contacts from each of the emergency trip relays (ETR1, 2, 3) are connected to the positive 125 V dc feeder for each solenoid, and two series contacts from each of the primary trip relays are connected to the negative 125 V dc feeder for each solenoid. The ETR relay coils are powered from a 28 V dc source from the I/O controller. Each I/O controller in each of the R8, S8, and T8 sections supplies an independent 28 V dc source. The K4CL servo clamp relay will energize and send a contact feedback directly from the TREL terminal board to the TSVO servo terminal board. TSVO disconnects the servo current source from the terminal block and applies a bias to drive the control valve closed. This is only used on simplex applications to protect against the servo amplifier failing high.
Solenoid Trip Tests

Terminal Board TRPL
02 J2
Trip solenoid #1 or 4
+
01 02
Terminal Board TREL
JX1 KX1 KX2 KX3 RD RD RD Mon

ID
ETR1
KX1 KY1 KZ1
KY1 KZ1 KX1 PwrA_P
VPRO
J2
03
06 J2
+
PwrA_N
KX1,2,3
04 05
ETR2
KX2 KY2 KZ2
KY2 KZ2 KX2 KY3 PwrB_P KY1 KY2
P28X RD RD RD Mon
KY1,2,3
JY1
VPRO
J2
06
PwrB_N
ID
10 J2
+
07 08
ETR3
KX3 KY3 KZ3
KY3 KZ3 KX3 PwrC_P KZ1 KZ2 KZ3
P28Y JZ1 RD RD RD Mon

KZ1,2,3 ID
J2
VPRO
09 PwrC_N PwrA_P PwrA_N PwrB_P PwrB_N PwrC_P PwrC_N To TSVO boards on SMX systems J1 A B Sol Pwr C Monitor JX1 JY1 JZ1
Power J2 buses
J2
P28Z
PwrA_P 13 PwrB_P 14 PwrC_P 15
P28VV K4CL RD K4CL

K4CL
2 3
JX1 JY1 JZ1
Servo clamp
To relay K25 A on J2 TTUR
Mon
JX1 JY1 JZ1
J25 J2 JH1 Excit_P From PDM RD 2

3
To JX1,JY1,JZ1 Exc_P
Excitation volts NS 7 NS
. . .
Trip interlock
35 36
TRP1A
TRP1B
Mon
Excitation_N
BCOM
7 circuits as above
TREL Terminal Board, Trip Interlocks, and Trip Solenoids
Specifications
Item Number of trip solenoids Trip solenoid rating Trip solenoid circuits Solenoid inductance Suppression Relay Outputs Solenoid control relay contacts Trip inputs Trip interlock excitation Trip interlock current Specification Three solenoids per TREL (total of six per I/O controller) H1 - 125 V dc standard with 1 A draw H2 - 24 V dc is alternate with 3 A draw Circuits rated for NEMA class E creepage and clearance Circuits can clear a 15 A fuse with all circuits fully loaded Solenoid maximum L/R time constant is 0.1 sec MOV on TRPL across the solenoid Driver to breaker relay K25A on TTUR. Servo clamp relay on TSVO Contacts are rated to interrupt inductive solenoid loads at 125 V dc, 1 A. Bus voltage can vary from 70 to 145 V dc Seven trip interlocks to the I/O controller protection module, 125/24 V dc H1 - Nominal 125 V dc, floating, ranging from 100 to 145 V dc H2 - Nominal 24 V dc, floating, ranging from 18.5 to 32 V dc H1 for 125 V dc applications: Circuits draw 2.5 mA (50 ) H2 for 24 V dc applications: Circuits draw 2.5 mA (10 ) Trip interlock isolation Trip interlock filter Trip interlock ac voltage rejection Size Optical isolation to 1500 V on all inputs Hardware filter, 4 ms 60 V rms @ 50/60 Hz at 125 V dc excitation 17.8 cm wide x 33.02 cm high (7.0 in x 13.0 in)
Diagnostics
The protection module runs diagnostics on the TREL board and connected devices. The diagnostics cover the trip relay driver and contact feedbacks, solenoid voltage, K25A relay driver and coil, servo clamp relay driver and contact feedback, and the solenoid voltage source. If any of these do not agree with the desired value, a fault is created. TREL connectors JX1, JY1, and JZ1 have their own ID device that is interrogated by the I/O controller. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the plug location. When the chip is read by the I/O controller and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
Notes
VPYR Pyrometer Board

VPYR Pyrometer Input
The Pyrometer Input (VPYR) board provides a dynamic temperature profile of the rotating turbine blades and computes temperature conditions that can lead to a trip. Two infrared turbine blade temperature measurement system (TBTMS) thermometers, known as pyrometers, and to two Keyphasor Proximitor probes for shaft reference are wired to the TPYR terminal board. Dedicated analog-to-digital converters on VPYR provide sampling rates up to 200,000 samples per second for burst data from two of the temperature channels. Fast temperature data is available for display and offline evaluation. TPYR has simplex and TMR capability as shown in the following figure.
TPYR Terminal Board VPYR VME Board
x
Pyrometer wiring
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
JT1
37-pin "D" shell type connectors with latching fasteners
RUN FAIL STAT
VME bus to VCMI JS1 Cables to VME racks S and T
KeyPhasor wiring
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47 x
JR1 Cable to VME rack R Connectors on VME rack

VPYR x
J3
Shield bar J4 Barrier type terminal blocks can be unplugged from board for maintenance
Pyrometer Terminal Board, Processor, and Cabling
VPYR Pyrometer Board 245
Installation
To install the VPYR board 1 2 3
Power down the VME processor rack. Slide in the VPYR board and push the top and bottom levers in with your hands to seat its edge connectors. Tighten the captive screws at the top and bottom of the front panel. These screws hold the board firmly in place and enhance the board front ground integrity. The screws should not be used to actually seat the board.
Note Cable connections to the TPYR terminal boards are made at the J3 and J4 connectors on the lower portion of the VME rack. These are latching type connectors to secure the cables. Power up the VME rack and check the diagnostic lights at the top of the front panel. For details, refer to Diagnostics section in this document.
You may need to update the VPYR firmware to the latest level. For instructions, refer to GEH-6403, Control System Toolbox for the Mark VI Turbine Controller.
Operation
Analog signals from TPYR are cabled to the VPYR processor board where signal sampling and conversion take place. VPYR calculates the temperature profiles and runs turbine protection algorithms using both pyrometer signals. If a trip is indicated and the signals are validated, VPYR issues the trip signal.
Optical Pyrometer Measurements

Two infrared pyrometers dynamically measure the temperature profile of the rotating turbine blades. Each pyrometer is powered by a +24 V dc and a -24 V dc source on the terminal board, diode selected from voltages supplied by the three VPYR boards. Four 4-20 mA signals are returned from each pyrometer, representing the following blade measurements: Average temperature Maximum peak temperature Average peak temperature Fast dynamic profile, with 30 kHz bandpass, providing the full signature.
Each 4-20 mA input generates a voltage across a resistor. The signal is sent to VPYR where it is multiplexed and converted. A dedicated A/D converter samples the fast input (#4) at up to 200,000 samples per second. VPYR can be configured for different numbers of turbine buckets, with up to 30 temperature samples per bucket.
246 VPYR Pyrometer Board
Chan A
1 2 P24A PCOM N24A PCOM 20ma A1 RetA1 20ma A2 RetA2
TPYR Terminal Board

Current P28VX Limiter Current N28VX Limiter 100 ohms Average
<T> <S> <R> VPYR Pyrometer Board JR1 J3 Chan A Fast P28VR N28VR
ID All others
P Y R O M E T E R
3 4 5 6 7 8 9
Fan Distrib -ution
Fast A/D sampling
Chan B Fast Fast A/D sampling
Max-Pk Avg-Pk Fast
20ma A3 10 RetA3 11 20ma A4 12 RetA4
Mux
A/D
JS1 P28VS N28VS

ID
J3 Same for <S>
Chan B
13 P24B Current 14 PCOM Limiter
P28VX N28VX
P Y R O M E T E R
15 N24B Current 16 PCOM Limiter 17 20ma B1 18 RetB1 19 20ma B2 20 RetB2 21 20ma B3 22 RetB3 23 20ma B4 24 RetB4
Avg
Max Pk
JT1
Avg-Pk
J3 Same for<T>
Fast
P28VT N28VT
ID
P R O X
30 N24Pr1 Current Limiter 31 PrH1 32 PrL1
N28VX
KeyPhasor#1
P R O X
P28VX N28VX N28VX
P28VR P28VS P28VT N28VR N28VS N28VT
KeyPhasor#2
Noise suppression on all inputs & power outputs
VPYR Processor Board and Terminal Board
Keyphasor Inputs
Two Keyphasor probes are used for shaft position reference, with one used as a backup. These probes and associated circuitry are identical to those used with VVIB/TVIB. They sense a shaft keyway or pedestal to provide a time stamp.
Turbine Protection Algorithm

The protection algorithms run every Burst Period. The Burst of Fast data is collected concurrently from the two pyrometers. The start of each Burst of Fast data is synchronized with the selected Keyphasor probe. Each burst is continuous and has a nominal length of three revolutions as determined from the probe. The Keyphasor time-stamps, associated with this burst (four stamps) are included in the data. The turbine RPM is also passed to the VPYR card through signal space as a backup to the Keyphasor RPM value. The algorithm provides seven buffers to store the fast pyrometer temperature data. The buffers store the raw A/D data that is loaded into a buffer automatically through the VPYRs DMA controller. Each buffer stores one burst of data for pyrometer channel A, one burst of data for pyrometer channel B, and one header that describes the sampling details, conversion factors, and rate limits used. The seven buffers allow five buffers to be captured or frozen for a trip function (Trip_minus4, Trip_minus3, Trip_minus2, Trip_minus1 and Trip_List data), one user or manually operated capture list, and the last buffer for gathering sampled data for the protection algorithms. The pyrometer algorithm takes the latest data from the capture buffers and determines the bucket span (pyrometer samples) that is used for the protection algorithm. BuckOffsetA/B defines the delay in percent of Bucket Period starting from the Keyphasor input to the start of the bucket temperatures that is used in the protection algorithm. BuckSpanA/B defines the percent of the Bucket Period that is used in calculating the bucket temperature signature for the protection algorithm. The average temperature per burst, the maximum temperature per bucket signature, and the minimum temperature per bucket signature are calculated based on the bucket signature defined by the configuration constants. The average temperature per burst is the average temperature over the bucket signature for 3.1 revolutions of data (1 burst). The maximum temperature is stored for each bucket signature for 3.1 revolutions of data. The minimum temperature is stored for each bucket signature for 3.1 revolutions of data. A median select is performed on each bucket signature over the three revolutions of data for both the maximum temperature per bucket and the minimum temperature per bucket, as shown in the following figure. This results in a filtered maximum for each bucket over the 3 revolutions of data and a filtered minimum for each bucket over the 3 revolutions of data. The algorithm performs a maximum select from all the bucket filtered maximums and stores the value in the signal space variable, FastMxMxPk_A/B. The algorithm also performs a minimum select from all the bucket filtered minimums and stores the results in FastMnMnPk_A/B. The algorithm also provides an average of all the filtered maximums, FastAgMxPk_A/B, and calculates the average of all the filtered minimums, FastAgMnPk_A/B. The following block diagram illustrates the algorithms used to calculate the following from the Pyrometer Channel A and B fast sampled temperature data: Maximum of the filtered maximum Turbine Blade Temperature per bucket Average of the filtered maximum Turbine Blade Temperature per bucket Average of the filtered minimum Turbine Blade Temperature per bucket Minimum of the filtered minimum Turbine Blade Temperature per bucket
VPYR Hdwr Channel A & B) KeyPhasor ChB Fast

MAXxy = Maximum Value from Bucket Span where x is Bucket # and y identifies the revolution.
VPYR Firmware (Channel A)
ChA Fast Bucket Offset and Span Calc. A/D REVOLUTION

Start KeyPhasor; Immed.
MIN xy = Minimum Value from Bucket Span where x is Bucket # and y identifies the revolution.
A/D REVOLUTION 2
MAX0
A/D
FPGA 0
0 1 2
0
MAX0 MAX0
1 0 1
MIN00 MIN10
1
MIN01 MIN11
2
MIN02 MIN12
DMA 1
0 1 2
Int Ptr, Size
A/D & Buffe r Cntrl

MAX1 MAX1 MAX1
T EK CUB
n
0 1 2
T EK CUB
Capture Buffers(7)
MAXn MAXn MAXn
MINn0
MINn1
MINn2
TSM Drivers
UDH Drivers
T EK CUB
kc eh C e a R o T t

Assuming no list data captured & VPYR firmware using Buffer 2 data, then DMA is updating Buffer 3's data. , , MAXFx = Median Select (MAXx0 MAXx1 MAXx2 ) where x is Bucket # AVG(n-j) = Average of Samples within Bucket Span for 3 revolutions (burst) where n is a point in time and j represents a burst period. , , MIN F = Median Select ( x MIN x MIN x MIN 0 x 1 2 where x is Bucket # )
Header 0 Pyro ChA Data Pyro ChB Data Header 1 Pyro ChA Data Pyro ChB Data Header 2 Pyro ChA Data Pyro ChB Data Header 3 Pyro ChA Data Pyro ChB Data Header 4 Pyro ChA Data Pyro ChB Data Header 5 Pyro ChA Data Pyro ChB Data
Header 6 Pyro ChA Data Pyro ChB Data
AVG(n-3) Burst Delay AVG(n-2) AVG(n-1) AVG(n) Delta Avg(n-2) Delta Avg(n-1) Delta Avg(n)
To Rate Check
0 1
Fmx Fmn (n-3) (n-3) Fmx Fmn (n-2) (n-2) Burst Delay Fmx Fmn (n-1) (n-1) Filter Filter Max(n Min(n) ) MAXF MINF0 MAXF
1 0
MINF1
n-2 MAXF [Delta Filter Max1]
MINFn
[Delta Filter Max] [Delta Filter n-1 Max] [Delta Filter n Max] Max. Select Average Average Min. Select
RS232
VCMI / UCxx
Average of one Burst (3 revs)
(FastAvg_A)

HMI
Ethernet
Max. of Filtered Max.

(FastMxMxPk_A)
Avg. of Filtered Max.

(FastAgMxPk_A)
Avg. of Filtered Min.

(FastAgMnPk_A)
Min. of Filtered Min.
Terminal Emulator
Signal Space Inputs
(FastMnMnPk_A )
The rate limit comparator uses the Delta-Delta matrix and compares this against one of two limits. The Delta-Delta matrix is the difference in the rate of change of the filtered maximum temperatures from one burst to another and the rate of change of the average temperature from one burst to the next on a per bucket basis. The limit used is determined by the signal space variable, Rate1 Limit Select for Channel A/B, Rate1_LSel_A/B. If Rate1_LSel_A/B equals FROM_APPLICATION, then the signal space variable, Rate1_Lmt_A/B, is used. The application software sets the value used. At initialization the VPYR firmware sets Rate1_Lmt_A/B = Fn1. If Rate1_LSel_A/B equals FROM VPYR, then Fn1 is used. Fn1 is defined as Fn = SetptR1B_A/B + SetptR1_A * AVG(n-1) where SetptR1B_A/B is the set point bias for Rate1, _A for channel A & _B for chB, SetptR1_A/B is the set point gain for Rate1. The set point bias and gain are both configuration constants in the VPYR. Rate2, Rate3, and the Distance calculations are performed similarly. The pyrometer rate limit checks of the protection algorithm are shown in the following two figures.
Rate Calc:
where SetptRxx_x are IO configurable constants.
[Filter Max] n
+ _
[Delta Filter Max] n + Delta AVG(n) _
[Delta Delta] n
A A>B B
[Rate1 State] n
[Filter Max]n-1 AVG(n)
SetptR1B_A + SetptR1_A AVG n-1 Rate1_Lmt_A Rate1_LSel_A

Where: "Fn" is SetptR1B_A + SetptR1_A * AVG(n-1)
Fn
a b
MUX
sel
AVG(n-1)
Mark VI Pyrometer Rate Check Portion of Protection Algorithm
Rate Calc Cont'd:
[Delta Delta] SetptR2B_A SetptR2_A AVG n-2 Rate2_Lmt_A Rate2_LSel_A Fn
n-1
A A>B
MUX
sel
[Rate2 State]
a b
[Delta Delta] SetptR3B_A SetptR3_A AVG n-3

Distance Calc:
n-2
A A>B B
[Rate3 State]
Fn
a b
MUX
sel
Rate3_Lmt_A Rate3_LSel_A [Delta Filter Max1]n [Delta AVG]
where SetptDx_A and StptDDepth_A are configurable constant
[Filter Max] n
+ _
+ _
[Delta Delta1]
A A>B B
[Distance State]
[Filter Max]
n-StptDDepth_A
n-StptDDepth_A
AVGn + AVG n-StptDDepth_A _
SetptDB_A SetptD_A AVG

n-StptDDepth_A
MUX
a b
s e l
Fn
Dist_Lmt_A Dist_LSel_A
Trip Logic:
where RatexEnab_A are IO Configuration constants used as disable switches Where: "Fn" is SetptDB_A + SetptD_A * AVG(n-StptDDepth_A)
Signal Space
Matric operation
[Rate1 State] [Rate2 State] Rate2Enab_A [Rate3 State] Rate3Enab_A [Distance State] DistEnab_A
OR AND OR
OR
matrix elements are "ored" KP1 or KP2 valid (Keyphasors) "Chan A" Trip
AND
TripPyrA
OR
Rate2Enab_A: If = 0, then enable or use Rate2State else disable Rate2 trip logic. Rate3Enab_A: If = 0, then enable or use Rate3State else disable Rate3 trip logic. DistEnab_A : If = 0, then enable or use Distance State else disable Distance trip logic.
"Chan B" Trip
AND
TripPyrB
Mark VI Pyrometer Rate/Distance Check Portion of Protection Algorithm
Data Historian Upload of Captured Lists

The Data Historian is used to upload captured lists from VPYR. For a TMR system configuration, the Data Historian uploads the captured lists from VPYR that is designated the UDH communicator. If the user wants the Data Historian to upload captured lists from each of the three VPYRs, then the user must configure the VPYRs as simplex. VPYR provides two types of captured lists. VPYR runs protection algorithms examining the rate of temperature rise on the turbine blades. If the rate of rise is too high, then the protection algorithm flags the application software through the board point, TripPyrA or TripPyrB, which indicates a rate limit trip for either Channel A and B pyrometer. The application software in the controller detects the rate limit trip and, based on the application code sequencing, either requests a list capture for the trip information or does not. The VPYR captures five individual lists of approximately 12,000 samples or less of temperature data for each channel. The lists are identified as Trip_minus4, Trip_minus3, Trip_minus2, Trip_minus1, and TripList. Trip_minus1 stores the actual event that caused the trip indication. Each list includes a header describing the data captured and the data. The second type of list capture is a user requested capture. The user capture request is generated in the controller application software in two different ways. First, the user can manually request a pyrometer temperature data capture through the HMI screen. Secondly, the application code periodically pings the VPYR(s) with a request based on a User Capture Timer set up through an HMI screen. When the board point, User Capture Request (UserCapReq), is set True by the application software, the VPYR(s) capture a single list of temperature data for both Channel A and Channel B pyrometers. The Data Historian uses the voted board point, Trip Captured List (TripCapList), to determine when the trip list(s) are available by the VPYR for upload. The Data Historian uses the voted board point, User Captured List (UserCapList), for a User list upload. When the Boolean TripCapList or UserCapList equal True, the Data Historian checks the Main Header parameter, ListNumber. For I/O boards with multiple lists to be uploaded the parameter, ListNumber, indicates the number of the list that is ready to be uploaded.
Application Software State Diagram

Normally, the application software is in the No Pyro Fault Detected state. A pyrometer trip detection is determined by checking the EGD read variables, TripPyrA and TripPyrB. If either of these variables are True, then the application software transitions to the Pyrometer Fault Detected state where the EGD write variable, LogTrigger, is set True. VPYR freezes the five lists, Trip_minus4, Trip_minus3, Trip_minus2, Trip_minus1, and TripList per the request, LogTrigger = True, from the application software. Next, VPYR prepares the Trip_minus4 for upload by the Data Historian. The EGD variable, TripCapList is set True by VPYR after the Trip_minus4 upload prep work has been completed. The application software transitions to the Data Historian Uploading state on the detection of TripCapList = True. The application software starts a timer in the Data Historian Uploading state. To allow enough time for the Data Historian to upload the 5 lists, a minimum 2 minutes delay is required before the HMI Pyrometer Reset button is recognized.
Resetting the EGD variable, LogTrigger, to False before the two minute delay is complete will corrupt the uploaded data. The following figure shows how the controller application software handles the detection of a pyrometer trip.
NO PYRO FAULT DETECTED 1) LogTrigger = False
(Timer >= 2 min.) & (HMI Pyro Reset = True)
(TripPyrA = False) & (TripPyrB = False)
(TripPyrA = True) or (TripPyrB = True)
(Timer < 2 min.) or (HMI Pyro Reset = False)
TripCapList = False
DATA HISTORIAN UPLOADING 1) Start Timer
PYRO FAULT DETECTED 1) LogTrigger = True
TripCapList = True
Record Storage in the Data Historian Archive

At least 450 Mbytes of disk space is required to store the Data Historian Archive for Operator or User Captured lists from six VPYR boards (TMR system boards configured as Simplex) at a maximum rate of one upload per day for two years.
Archive Folder Layout

The folder structure for the Mark* VI I/O boards follows the Data Historian standard. In addition, the main header uploaded from the I/O board provides a subfolder name under the date folder. The naming convention for the file format is: <collection-name_date_time_controller_rack#_slot#_list-name_A>.dca
File collection-name date time Description This is used as the character field for Mark VI I/O board name (VPYR) Date format YYMMDD Time format HHMMSS Note: The time is defined as the trigger time provided in the Main Header. If I/O board does not provide, then Data Historian will use its computer time. This defines the R, S or T controller This defines the rack number This defines the slot number This defines the Mark VI I/O list name. Note ListName is provided in the main header. If list-name is not provided, then an alpha character will be appends to the file name to insure a unique file name for each list.
controller rack# slot# list-name
Pyrometer Viewer
The Pyrometer Viewer is used to upload the data captured by the Data Historian. The Viewer is a separate application from the toolbox and is loaded onto the HMI computer or even the field engineers computer. The user selects the five dca files associated with the trip as shown in the following figure.
The Pyrometer Viewer uses the raw temperature data from each dca file and recalculates the median peak temperatures for each bucket as shown in the following figure.
The rate of change data per each burst is also provided as shown in the following figure.
Specifications
Item Number of inputs Current inputs from pyrometers Specification 2 pyrometers, each with 4 analog 420 mA current signals 2 Keyphasor probes, each with 0.5 to 20 V dc inputs 4-20 mA across a 100 ohm resistor. Common mode rejection: Dc up to 5 V dc, CMRR of 80 dB Ac up to 5 Volt peak, CMRR of 60 dB Measurement accuracy of 0.1% full scale, 14-bit resolution. Bandwidth of 0 to 100 Hz on 6 slow inputs using multiplexed A/D converter. Bandwidth of 0 to 30,000 Hz on two fast inputs using dedicated A/D converters, sampling at 200,000 per sec. Keyphasor inputs Input voltage range of 0.5 to 20 V dc CMR of 5 V, CMRR of 50 dB at 50/60 Hz Accuracy 2% of full scale (0.2 V dc) Dc level detection typically 0.2 V/mil sensitivity Speed measurement 2 to 5,610 RPM with accuracy of 0.1% of reading Device excitation Pyrometers have individual power supplies, current limited: P24V source is diode selected, +22 to +30 V dc, 0.175 A N24V source is diode selected, -22 to -30 V dc, 0.175 A Measurement parameters Rated RPM up to 5,100 RPM Number of buckets per stage, up to 92 Number of samples per bucket, up to 30 Fast inputs sampled in bursts covering three revolutions, at twice per second Size 26.04 cm high x 1.99 cm, wide x 18.73 cm, deep (10.25 x 0.782 x 7.375)
Diagnostics
Three LEDs at the top of the VPYR front panel provide status information. The normal RUN condition is a flashing green, FAIL is a solid red. The third LED is STATUS and is normally off but shows a steady orange if a diagnostic alarm condition exists in the board. VPYR makes diagnostic checks including: System limit checking on the temperature inputs and the Keyphasor gap signals can create faults. The two pyrometer inputs are compared against configuration limits to determine if they are tracking, and the fast data is compared with other inputs to check validity. If any one of the above signals goes unhealthy, a composite diagnostic alarm L3DIAG_VPYR occurs. The diagnostic signals can be individually latched and then reset with the RESET_DIA signal if they go healthy. Terminal board connectors JR1, JS1, and JT1 have their own ID device that is interrogated by the I/O board. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read by VPYR and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
Module Parameter Calibration System limits Min_MA_Input Max_MA_Input RPMrated BuckSamples BuckOffset_A BuckSpan_A BuckNumb_A Burst_Period SetptR1_A SetptR1B_A SetptR2_A SetptR2B_A SetptR3_A SetptR3B_A SetptD_A SetptDB_A SetptDDepth_A Rate2Enab_A Rate3Enab_A DistEnab_A Enables or disables all system limit checking Minimum MA for healthy 4-20 mA input Maximum MA for healthy 4-20 mA input Rated turbine RPM Minimum samples per bucket at 110 percent speed Offset from key to the first bucket, % bucket, pyrometer A Percent of bucket to include in protection algorithm, pyrometer A Number of buckets, pyrometer A Burst Period for Pyr A & B. Note: Value here must match what is in the controller application software. Setpoint, rate 1, pyrometer A Setpoint, rate 1, bias, average temp, pyrometer A Setpoint, rate 2, pyrometer A Setpoint, rate 2,bias, average temp, pyrometer A Setpoint, rate 3, pyrometer A Setpoint, rate 3, bias, average temp, pyrometer A Setpoint distance, pyrometer A Setpoint distance bias, average temp, pyrometer A Setpoint, depth of the distance measurement, pyrometer A Enable, temperature rate 2, pyrometer A Enable, temperature rate 3, pyrometer A Enable temperature rate 3, pyrometer A Same configuration for channel B pyrometer J3:IS200TPYRH1A SlowAvg_A Input use Low_Input Low_Value High_Input High_Value TMR_Diff SlowMXPk_A SlowAvgPk_A FastAvg_A SlowAvg_B SlowMXPk_B SlowAvgPk_B FastAvg_B GAP_KPH1 VIB-Type VIB_Scale Input MA at low value Input value in engineering units at low MA Input MA at high value Input value in engineering units at high MA Difference limit for voted TMR inputs in % of (high value/low value) Slow, maximum peak temperature, pyrometer A (configuration similar to above) - board point Slow, average peak temp, pyrometer A - board point Fast, average temp, pyrometer A - board point Slow, Average Temperature, Pyr B - board point Slow, Max Peak Temperature, Pyr B - board point Slow, average peak temperature, Pyr B - board pt. Fast, average temperature, Pyr B - board point Air Gap, keyPhasor #1 - board point Configurable item Volts/mil Terminal board 1 connected to VPYR through J3 Slow, average temperature, pyrometer A - board point Connected, not connected Point edit (input FLOAT) Used, unused 0 to 21 -3.4e+038 to 3.4e+038 0 to 21 -3.4e+038 to 3.4e+038 0 to 100 Point edit (input FLOAT) Point edit (input FLOAT) Point edit (input FLOAT) Point Edit (Input FLOAT) Point Edit (Input FLOAT) Point Edit (Input FLOAT) Point Edit (Input FLOAT) Point Edit (Input FLOAT) Used, Not used 0 to 2 Enable, disable 0 to 21 0 to 21 300 to 10,000 10 to 30 0 to 100 0 to 100 30 to 92 480 to 5000 -1 to 1 0 to 50 -1 to 1 0 to 50 -1 to 1 0 to 50 -1 to 1 0 to 50 1 to 3 Enable, disable Enable, disable Enable, disable Description Choices
Module Parameter KPH_Thrshld KPH_Type SysLim GAP_KPH2
Description Voltage difference from gap voltage where Keyphasor Trigger Type of Pulse Generator System Limits 1 and 2, and TMR same as above
Choices 1 to 5 Slot, Pedestal Standard Choices
Air Gap, keyPhasor #2, config. Same as above - board point Point Edit (Input FLOAT)
Board Points (Signals) L3DIAG_VPYR1 L3DIAG_VPYR2 L3DIAG_VPYR3 ProtAlgRun_A ProtAlgRun_B TripCapList UserCapList Rate1_LSel_A Rate2_LSel_A Rate3_LSel_A Dist_LSel_A Rate1_LSel_B Rate2_LSel_B Rate3_LSel_B Dist_LSel_B TripPyrA TripPyrB KeyPh1Act KeyPh2Act SysLim1KP1 SysLim2KP1 SysLim1KP2 SysLim2KP2 FastMxMxPk_A FastAgMxPk_A FastAgMnPk_A FastMxMxPk_B FastAgMxPk_B FastMnMnPk_B FastAgMnPk_B RPM_KPH1 RPM_KPH2 Rate1_Lmt_A Rate2_Lmt_A Rate3_Lmt_A Dist_Lmt_A Rate1_Lmt_B Rate2_Lmt_B Rate3_Lmt_B Dist_Lmt_B
Description Point Edit (Enter Signal Name) Board diagnostic Board diagnostic Board diagnostic Protection Algorithm is running for Pyr Ch. A Protection Algorithm is running for Pyr Ch. B Trip Capture List is ready for upload User Capture List is ready for upload Rate1 Logic Select for Channel A Rate2 Logic Select for Channel A Rate3 Logic Select for Channel A Distance Logic Select for Channel A Rate1 Logic Select for Channel B Rate2 Logic Select for Channel B Rate3 Logic Select for Channel B Distance Logic Select for Channel B Bucket temperature rate trip, pyrometer A Bucket temperature rate trip, pyrometer B Keyphasor 1 Active Keyphasor 2 Active System Limit System Limit System Limit System Limit Fast, Max of the Max Peaks Temp, Pyr A Fast, Average of the Max Peaks Temp, Pyr A Fast, Average of the Min Peaks, Pyr A Fast, Max of the Max Peaks Temp, Pyr B Fast, Average of the Max Peaks Temp, Pyr B Fast, Min of the Min Peaks Temp, Pyr B Fast, Average of the Min Peaks, Pyr B RPM Keyphasor #1 RPM Keyphasor #2 Rate1 Limit value for Channel A pyro. Rate2 Limit value for Channel A pyro. Rate3 Limit value for Channel A pyro. Distance Limit value for Channel A pyro. Rate1 Limit value for Channel B pyro. Rate2 Limit value for Channel B pyro. Rate3 Limit value for Channel B pyro. Distance Limit value for Channel B pyro.
Direction Input Input Input Input Input Input Input Output Output Output Output Output Output Output Output Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Output Output Output Output Output Output Output Output
Type BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT
FastMnMnPk_A Fast, Min of the Min Peaks Temp, Pyr A
Board Points (Signals) TripBuckIx_A TripBuckNb_A TripBuckIx_B TripBuckNb_B LogTrigger ResetLists UserCapReq PollStrobe TurbRPM
Description Point Edit (Enter Signal Name) Index of the first Bucket causing trip, Pyr A Number of Buckets causing trip, Pyr A Index of the first Bucket causing trip, Pyr B Number of Buckets causing trip, Pyr B When true, records freeze, two before, one after Reset Captured Lists User Capture List request from controller Strobe to keep each TMR based Pyro in synch Turbine Speed in RPM
Direction Input Input Input Input Output Output Output Output Output
Type FLOAT FLOAT FLOAT FLOAT BIT BIT BIT BIT FLOAT
Alarms
Fault 2 3 16 17 18 24 30 Fault Description Flash Memory CRC Failure CRC failure override is Active System Limit Checking is Disabled Board ID Failure J3 ID Failure Firmware/Hardware Incompatibility ConfigCompatCode mismatch; Firmware: #; Tre: # The configuration compatibility code that the firmware is expecting is different than what is in the tre file for this board IOCompatCode mismatch; Firmware: #; Tre: # The I/O compatibility code that the firmware is expecting is different than what is in the tre file for this board Milliamp input associated with the slow average temperature is unhealthy. Pyro## SLOW AVG TEMP unhealthy Pyro## Slow Max Pk Temp unhealthy. Milliamp input associated with the slow maximum peak temperature is unhealthy Pyro## Slow Average Peak Temp. Milliamp input associated with the slow average peak temperature is unhealthy Pyro##Fast Temp Unhealthy. Milliamp input associated with the fast temperature is unhealthy Pyro## Fast Cal Reference out of limits. The fast calibration reference is out of limits Pyro## Fast Cal Null out of limits. The fast calibration null is out of limits Slow Cal Reference out of limits. The slow calibration reference is out of limits Slow Cal Null out of limits. The slow calibration null is out of limits Logic Signal # Voting mismatch. The identified signal from this board disagrees with the voted value Input Signal # Voting mismatch, Local #, Voted #. The specified input signal varies from the voted value of the signal by more than the TMR Diff Limit Possible Cause Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online) System checking was disabled by configuration. Failed ID chip on the VME I/O board Failed ID chip on connector J3, or cable problem Invalid terminal board connected to VME I/O board A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. Specified pyrometer's average output is faulty, or VPYR or TPYR is faulty. Specified pyrometer's maximum output is faulty, or VPYR or TPYR is faulty. Specified pyrometer's peak output is faulty, or VPYR or TPYR is faulty. Specified pyrometer's fast output is faulty, or VPYR or TPYR is faulty. VPYR is faulty VPYR is faulty VPYR is faulty VPYR is faulty A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable. A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable.
31
32&38
33&39
34&40
35&41 36&42 37&43 44 45 128-191
224-247
TPYR Pyrometer Input

The Pyrometer Input (TPYR) terminal board is wired to two pyrometers and to two Keyphasor Proximitor probes for shaft reference. The resulting 10 voltage signals are cabled to the VPYR board, which samples them at up to 200,000 samples per second. Three DC-37 connectors on TPYR connect to three VPYRs. Connections can be simplex on a single connector (JR1), or TMR using all three connectors. In TMR applications, the input signals are fanned to the three connectors for the R, S, and T controls. In the Mark* VI system, TPYR works with the VPYR I/O board and supports simplex and TMR applications. With TMR systems, TPYR connects to three VPYR boards with three cables.
TPYR Terminal Board

x
x x x
Pyrometers (2)
x x x x x x x x x x
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
JT1
J ports: JS1 Plug in PPYR I/OPack(s) for Mark VIe or
x x x
KeyPhasors (2)
x x x x x x x x x x
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47 x
Cable(s) to VPYR board(s) for Mark VI; JR1 the number and location depends on the level of redundancy required.
Shield bar
Barrier type terminal blocks can be unplugged from board for maintenance Pyrometer Terminal Board
Installation
Connect the wires for the two optical pyrometer inputs directly to the first terminal block. Connect the wires for the two Keyphasor probes directly to the second terminal block. Each block is held down with two screws and has 24 terminals accepting up to #12 AWG wires. A shield termination strip attached to chassis ground is located immediately to the left of each terminal block. 28 V dc power for the sensors comes in from the R, S, and T VPYR through the JR1, JS1, and JT1 connectors. The following figure shows TPYR wiring and cabling.
TPYR Terminal Board
JR1
Pyr A wiring
Pyr B wiring
PCOM1 (A) PCOM2 (A) Ret (A1) Ret (A2) Ret (A3) Ret (A4) PCOM1 (B) PCOM2 (B) Ret (B1) Ret (B2) Ret (B3) Ret (B4)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
P24 (A) N24 (A) 20ma (A1) 20ma (A2) 20ma (A3) 20ma (A4) P24 (B) N24 (B) 20ma (B1) 20ma (B2) 20ma (B3) 20ma (B4)
JS1
J ports: Plug in PPYR I/OPack(s) for Mark VIe or Cable(s) to VPYR board(s) for Mark VI;
x x x
Key phasors 1&2
N24 Pr (1) PrL (1) PrH (2)
x x x x x x x x x x
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
PrH (1) N24Pr (2) PrL (2)
JT1
the number and location depends on the level of redundancy required.

TPYR Terminal Board Wiring and Cabling
Operation
Analog signals from TPYR are cabled to the VPYR board. The following figure shows the pyrometer monitoring circuit.
Chan A
1 2 P24A PCOM N24A PCOM 20ma A1 RetA1 20ma A2 RetA2
TPYR Terminal Board

Current P28VX Limiter Current N28VX Limiter 100 ohms Average
P Y R O M E T E R
3 4 5 6 7 8 9
JR1 Fan Distrib -ution P28VR N28VR

ID
PPYR I/O Pack or VPYR Pyrometer Board <R> Chan A Fast Fast A/D sampling
Chan B Fast Fast A/D sampling

All others
Max-Pk Avg-Pk Fast
20ma A3 10 RetA3 11 20ma A4 12 RetA4
Mux
A/D
JS1 Chan B
13 P24B Current 14 PCOM Limiter
P28VX N28VX
P28VS N28VS
ID
P Y R O M E T E R
15 N24B Current 16 PCOM Limiter 17 20ma B1 18 RetB1 19 20ma B2 20 RetB2 21 20ma B3 22 RetB3 23 20ma B4 24 RetB4
PPYR I/O Pack or VPYR Pyrometer Board <S>
Avg
Max Pk
JT1
Avg-Pk
Fast
P28VT N28VT
ID
PPYR I/O Pack or VPYR Pyrometer Board <T>
P R O X
N28VX
KeyPhasor#1
P R O X
P28VX N28VX N28VX
P28VR P28VS P28VT N28VR N28VS N28VT
KeyPhasor#2
Noise suppression on all inputs & power outputs
TPYR Terminal Board and I/O Boards
Optical Pyrometer Measurements

Two infrared pyrometers dynamically measure the temperature profile of the rotating turbine blades. Each pyrometer is powered by a +24 V dc and a 24 V dc source, diode selected on TPYR from voltages supplied by the three VPYRs. Four 4-20 mA signals are returned from each pyrometer, representing the following blade measurements: Average temperature Maximum peak temperature Average peak temperature Fast dynamic profile, with 30 kHz bandpass, providing the full signature.
Each 4-20 mA input generates a voltage across a resistor. The signal is sent to VPYR where it is multiplexed and converted. VPYR can be configured for different numbers of turbine buckets, with up to 30 temperature samples per bucket.
Keyphasor Inputs
Two Keyphasor probes are used for shaft position reference, with one used as a backup. These probes and associated circuitry are identical to those used with VVIB/TVIB. They sense a shaft keyway or pedestal to provide a time stamp (angle reference for blade identification).
Specifications
Item Specification
Number of inputs Current inputs from pyrometers
2 pyrometers, each with 4 analog 420 mA current signals 2 Keyphasor probes, each with 0.5 to 20 V dc inputs 4-20 mA across a 100 ohm resistor. Common mode rejection: Dc up to 5 V dc, CMRR of 80 dB Ac up to 5 Volt peak, CMRR of 60 dB Input voltage range of -0.5 to -20 V dc. CMR of 5 V, CMRR of 50 dB at 50/60 Hz
Keyphasor inputs
Device excitation (outputs) Each Pyrometers has individual power supplies, current limited: P24V source is diode selected, +22 to +30 V dc, 0.175 A N24V source is diode selected, -22 to -30 V dc, 0.175 A Size 10.16 cm wide x 33.02 cm high (4.0 in x 13 in)
Diagnostics
Diagnostic tests are made on the terminal board as follows: There is system limit checking on the temperature inputs and the Keyphasor gap signals, and these can create faults. If any one of the above signals goes unhealthy, a composite diagnostic alarm L3DIAG_VPYR occurs. The diagnostic signals can be individually latched and then reset with the RESET_DIA signal if they go healthy. Terminal board connectors JR1, JS1, and JT1 have their own ID device that is interrogated by the I/O board. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read by the I/O board and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
VRTD RTD Input

VRTD RTD Input
The Resistance Temperature Device (RTD) Input (VRTD) board accepts 16, threewire RTD inputs. These inputs are wired to a RTD terminal board (TRTD or DRTD). Cables with molded fitting connect the terminal board to the VME rack where the VRTD processor board is located. VRTD excites the RTDs and the resulting signals return to the VRTD. VRTD converts the inputs to digital temperature values and transfers them over the VME backplane to the VCMI, and then to the controller.
TRTD Terminal Board
x
VRTD VME Board

x
8 RTD inputs
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
TRTD capacity for 16 RTD inputs
RUN FAIL STAT
VME bus to VCMI JA1 37-pin "D" shell type connectors with latching fasteners
8 RTD inputs
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47 x
JB1 Cables to VME I/O rack Connectors on VME I/O rack

VRTD x
J3
Shield bar
J4
RTD Input Terminal Board, I/O Board, and Cabling
VRTD RTD Input 265
Installation
To install the V-type board 1 2 3
Power down the VME processor rack Slide in the board and push the top and bottom levers in with your hands to seat its edge connectors Tighten the captive screws at the top and bottom of the front panel
Note Cable connections to the terminal boards are made at the J3 and J4 connectors on the lower portion of the VME rack. These are latching type connectors to secure the cables. Power up the VME rack and check the diagnostic lights at the top of the front panel. For details, refer to the section on diagnostics in this document.
Operation
VRTD supplies a 10 mA dc multiplexed (not continuous) excitation current to each RTD through the terminal board. The resulting signal returns to VRTD. The VCO type A/D converter uses voltage to frequency converters and sampling counters. The converter samples each signal and the excitation current four times per second for normal mode scanning and 25 times per second for fast mode scanning, using a time sample interval related to the power system frequency. Software in the digital signal processor performs the linearization for the selection of 15 RTD types. RTD open and short circuits are detected by out of range values. An RTD that is determined to be outside the hardware limits is removed from the scanned inputs to prevent adverse effects on other input channels. Repaired channels are reinstated automatically in 20 seconds or can be manually reinstated. In triple modular redundant (TMR) configuration, TRTDH1B provides redundant RTD inputs by fanning the inputs to three VRTD boards in the R, S, and T racks. All RTD signals have high frequency decoupling to ground at signal entry. RTD multiplexing is coordinated by redundant pacemakers so that the loss of a single cable or VRTD does not cause the loss of any RTD signals in the control database. VRTD boards in R, S, and T read RTDs simultaneously. The RTDs read by each VRTD differ by two RTDs, such that when R reads RTD3, S reads RTD5, and T reads RTD7, and so on. This ensures that the same RTD is not excited by two VRTDs simultaneously and hence produce bad readings.
266 VRTD RTD Input
<R> or <S> or <T> I/O rack Termination Board TRTD

Noise suppression
RTD Input Board VRTD
Excitation RTD Signal Return Grounded or ungrounded
JA1
J3
Excit.
NS
I/O Core Processor TMS320C32

ID
(8) RTDs
Noise suppression
JB1
Connectors at A/D bottom of VME rack Excit. J4
Processor VMEbus VME Bus
NS
VCO type A/D converter
ID
(8) RTDs
RTD Inputs and Signal Processing, Simplex System
VRTD RTD Input 267
Signals TerminalBoard TRTDH1B PM= Pacemaker Tx = VRTD transmit Rx = VRTD receive
Noise suppression
JRA
ID
NS
JSA
ID
PM, Tx PM, Rx, S
(8) RTDs to JRA, JSA, JTA
PM, Tx PM, Rx, R JTA

ID
PM, Tx PM, Rx, R Excitation RTD Signal Return Grounded or ungrounded

ID
Noise suppression
JRB
ID
PM, Tx
NS
JSB (8) RTDs to JRB, JSB, JTB
PM, Rx, T
PM, Tx PM, Rx, T JTB

ID
PM, Tx PM, Rx, S

RTD Inputs and Connections to three VRTD Processors in TMR System
Specifications
Item
Number of channels RTD types
Specification
16 channels per VRTD board 10, 100, and 200 platinum 10 copper 120 nickel
Span A/D converter resolution Scan Time Power consumption Measurement accuracy
0.3532 to 4.054 V 14-bit resolution Normal scan 250 ms (4 Hz) Fast scan 40 ms (25 Hz) Less than 12 W See Tables
268 VRTD RTD Input
Item
Common mode rejection Common mode voltage range Normal mode rejection Maximum lead resistance Fault detection
Specification
Ac common mode rejection 60 dB @ 50/60 Hz Dc common mode rejection 80 dB 5 V Rejection of up to 250 mV rms is 60 dB @ 50/60 Hz system frequency for normal scan 15 maximum two way cable resistance High/low (hardware) limit check High/low (software) system limit check Failed ID chip
RTD Accuracy
RTD Type
120 nickel 200 platinum 100 platinum 100 platinum -51 to 240C (- 60 F to 400 F) 10 copper
Group Gain
120 nickel Normal_ 1.0 Normal_ 1.0 Gain_ 2.0 10 Cu_10
Accuracy at 400 F
2 F 2 F 4 F 2 F 10 F
RTD Types and Ranges

RTD inputs are supported over a full-scale input range of 0.3532 to 4.054 V. The following table shows the types of RTD used and the temperature ranges.
RTD Type
10 copper 100 platinum 100 platinum
Name/Standard
MINCO_CA GE 10 Copper SAMA 100 DIN 43760 IEC-751 MINCO_PD MINCO_PE PT100_DIN
Range C
-51 to +260 -51 to +593 -51 to +700
Range F
-60 to +500 -60 to +1100 -60 to +1292
100 platinum
MINCO_PA IPTS-68 PT100_PURE
-51 to +700
-60 to +1292
100 platinum
MINCO_PB Rosemount 104 PT100_USIND
-51 to +700
-60 to +1292
120 nickel 200 platinum
MINCO_NA N 120 PT 200
-51 to +249 -51 to +204
-60 to +480 -60 to +400
VRTD RTD Input 269
Diagnostics
Three LEDs at the top of the VRTD front panel provide status information. The normal RUN condition is a flashing green and FAIL is a solid red. The third LED is normally off, but shows a steady orange if a diagnostic alarm condition exists in the board. Diagnostic checks include the following: Each RTD type has hardware limit checking based on preset (non-configurable) high and low levels set near the ends of the operating range. If this limit is exceeded, a logic signal is set and the input is no longer scanned. If any one of the inputs hardware limits is set, it creates a composite diagnostic alarm, L3DIAG_VRTD, referring to the entire board. Details of the individual diagnostics are available from the toolbox. The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal. Each RTD input has system limit checking based on configurable high and low levels. These limits can be used to generate alarms, and can be configured for enable/disable, and as latching/non-latching. RESET_SYS resets the out of limit signals. In TMR systems, limit logic signals are voted and the resulting composite diagnostic is present in each controller. The resistance of each RTD is checked and compared with the correct value, and if high or low, a fault is created. Each connector has its own ID device, which is interrogated by the I/O processor board. The terminal board ID is coded into a read-only chip containing the terminal board serial number, board type, revision number, and the connector location. If a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
Module Parameter
Configuration System limits Auto reset Group A rate Enable or disable all system limit checking Enable, disable
Description
Choices
Enable or disable restoring of RTDs Enable, disable removed from scan Sampling rate and system frequency filter for first group of 8 inputs Gain 2.0 is for higher accuracy if ohms <190, first group of 8 inputs 4 Hz, 50 Hz filter 4 Hz, 60 Hz filter 25 Hz Normal_1.0 Gain_2.0 10 ohm Cu_10.0 4 Hz, 50 Hz filter 4 Hz, 60 Hz filter 25 Hz Normal_1.0 Gain_2.0 10 ohm Cu_10.0 Connected, not connected Point edit (input FLOAT)
Group A gain
Group B rate
Sampling rate and system frequency filter for second group of 8 inputs Gain 2.0 is for higher accuracy if ohms <190, second group of 8 inputs Terminal board First of 16 RTDs - Board point signal
Group B gain
J3J4:IS200TRTDH1C RTD1
270 VRTD RTD Input
Module Parameter
RTDRTD type
Description
RTDs linearizations supported by VRTD;VRTD select RTDRTD or Ohms Input (unused inputs are removed from scanning)
Choices
Unused CU10 PT100_DIN PT100_PURE PT100_USIND N120 MINCO_PIA PT200 Ohms MINCO_CA MINCO_PD MINCO_PA MINCO_PB MINCO_NA PT100_SAMA MINCO_PK
SysLim1 Enable
Enables or disables a temperature Enable, disable limit for each RTD,RTD can be used to create an alarm Determines whether the limit condition will latch or unlatch for each RTD;RTD reset used to unlatch. Latch, unlatch
SysLim1 Latch
SysLim1 Type
Limit occurs when the temperature Greater than or equal is greater than or equal (>=), or less Less than or equal than or equal to (<=) a preset value. Enter the desired value of the limit temperature, Deg F or Ohms -60 to 1,300
System Limit 1 SysLim2 Enable
Enables or disables a temperature Enable, disable limit which can be used to create an alarm Determines whether the limit Latch, unlatch condition will latch or unlatch; reset used to unlatch. Limit occurs when the temperature Greater than or equal is greater than or equal (>=), or less Less than or equal than or equal to (<=) a preset value. Enter the desired value of the limit temperature, Deg F or Ohms Limit condition occurs if 3 temperatures in R,S,T differ by more than a preset value; this creates a voting alarm condition. -60 to 1,300 -60 to 1,300
SysLim2 Latch
SysLim2 Type
System Limit 2 TMR Diff Limt
Board Point Signals

L3DIAG_VRTD1 L3DIAG_VRTD2 L3DIAG_VRTD3 SysLim1RTD1 : SysLim1RTD16 SysLim2RTD1 : SysLim2RTD16
Description-Point Edit (Enter Signal Connection) Direction

Board diagnostic Board diagnostic Board diagnostic System limit 1 : System limit 1 System limit 2 : System limit 2 Input Input Input Input Input Input Input Input Input
Type
BIT BIT BIT BIT BIT BIT BIT BIT BIT
VRTD RTD Input 271
Alarms
Fault Fault Description
Flash Memory CRC Failure CRC failure override is Active System Limit Checking is Disabled Board ID Failure J3 ID Failure J4 ID Failure J5 ID Failure J6 ID Failure J3A ID Failure J4A ID Failure Firmware/Hardware Incompatibility ConfigCompatCode mismatch; Firmware: [ ]; Tre: [ ]. The configuration compatibility code that the firmware is expecting is different than what is in the tre file for this board
Possible Cause
Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online) System checking was disabled by configuration. Failed ID chip on the VME I/O board Failed ID chip on connector J3, or cable problem Failed ID chip on connector J4, or cable problem Failed ID chip on connector J5, or cable problem Failed ID chip on connector J6, or cable problem Failed ID chip on connector J3A, or cable problem Failed ID chip on connector J4A, or cable problem Invalid terminal board connected to VME I/O board A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory.
2 3 16 17 18 19 20 21 22 23 24 30
31
IOCompatCode mismatch; Firmware: [ ] ; A tre file has been installed that is incompatible with the firmware on Tre: [ ] The I/O compatibility code that the the I/O board. Either the tre file or firmware must change. Contact firmware is expecting is different than what the factory. is in the tre file for this board RTD [ ] high voltage reading, Counts are Y An RTD wiring/cabling open, or an open on the VRTD board, or a VRTD hardware problem (such as multiplexer), or the RTD device has failed.
32- 47
48- 63
RTD [ ] low voltage reading, Counts are Y An RTD wiring/cabling short, or a short on the VRTD board, or a VRTD hardware problem (such as multiplexer), or the RTD device has failed. RTD [ ] high current reading, Counts are Y The current source on the VRTD is bad, or the measurement device has failed. RTD [ ] low current reading, Counts are Y An RTD wiring/cabling open, or an open on the VRTD board, or a VRTD hardware problem (such as multiplexer), or the RTD device has failed.
64- 79 80- 95
96- 111 RTD [ ] Resistance calc high, it is Y
The wrong type of RTD has been configured or selected by default, Ohms. RTD [ ] has a higher value than the or there are high resistance values created by faults 32 or 35, or table and the value is Y both 32 and 35. RTD [ ] Resistance calc low, it is Y Ohms. The wrong type of RTD has been configured or selected by default, TRD [ ] has a lower value than the table or there are low resistance values created by faults 33 or 34, or and the value is Y both 33 and 34. Internal VRTD problems such as a damaged reference voltage Voltage Circuits for RTDs, or Current Circuits for RTDs have Reference raw circuit, or a bad current reference source, or the voltage/current null counts high or low, or Null raw counts high multiplexer is damaged. or low Failed one Clock Validity Test, scanner still VME board, terminal board, or cable could be defective. running. In TMR mode, the firmware tests whether the three TMR boards are synchronized and will stop scanning inputs under certain conditions Failed one Phase Validity Test, scanner VME board, terminal board, or cable could be defective. still running. In TMR mode, the firmware tests whether the three TMR boards are synchronized and will stop scanning inputs under certain conditions
112127 128151 152
153
272 VRTD RTD Input
Fault
Fault Description
Possible Cause
154
Failed both Clock Validity Tests, scanner VME board, terminal board, or cable could be defective. shutdown. In TMR mode, the firmware tests whether the three TMR boards are synchronized and will stop scanning inputs under certain conditions Terminal Board connection(s) wrong. Cables crossed between <R>, <S>, and <T> 25 Hz Scan not Allowed in TMR Mode, please reconfigure Logic Signal [ ] Voting mismatch. The identified signal from this board disagrees with the voted value. Check cable connections.
155
156 160255 256271
Configuration error. Choose scan of 4 Hz_50 Hz Fltr or 4 Hz_60 Hz Fltr. A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable.
Input Signal [ ] Voting mismatch, Local [ ], A problem with the input. This could be the device, the wire to the Voted [ ]. The specified input signal varies terminal board, the terminal board, or the cable. from the voted value of the signal by more than the TMR Diff Limit
TRTD RTD Input

The RTD Input (TRTD) terminal board accepts 16, three-wire RTD inputs. These inputs are wired to two barrier type terminal blocks. The inputs have noise suppression circuitry to protect against surge and high frequency noise. TRTD communicates with one or more I/O processors, which convert the inputs to digital temperature values and transfer them to the controller. There are four versions of TRTD as follows: TRTDH1B is a TMR version that fans out the signals to three VRTD boards using six DC-type connectors. TRTDH1C is a simplex board with two DC-type connectors for VRTD. TRTDH1D is a simplex board with two DC-type connectors for PRTD, normal scan. TRTDH2D is a simplex board with two DC-type connectors for PRTD, fast scan.
Mark VI Systems
In the Mark* VI system, TRTDH1B and TRTDH1C works with the VRTD processor and supports simplex and TMR applications. One TRTDH1C connects to the VRTD with two cables. In TMR systems, TRTDH1B connects to three VRTD processors with six cables.
Mark VIe Systems

In the Mark VIe system, TRTDH1D and TRTDH2D works with the PRTD I/O pack and support simplex applications only. Two PRTD packs plug into the TRTD for a total of 16 inputs.
VRTD RTD Input 273
TRTDH1C, H1D, H2D Terminal Board
TRTDH1B Terminal Board TRTD capacity for 16 RTD inputs DC-37 pin Connectors With latching fasteners Eight RTD Inputs
Eight RTD Inputs
2 4 6 8 10 12 14 16 18 20 22 24
1 3 5 7 9 11 13 15 17 19 21 23
+ 2 4 6 8 10 12 14 16 18 20 22 24
1 3 5 7 9 11 13 15 17 19 21 23
JTA JTB
JA1
JSA JSB
J Ports:
Eight RTD Inputs
26 28 30 32 34 36 38 40 42 44 46 48
25 27 29 31 33 35 37 39 41 43 45 47
JB1
Plug in PRTD I/O Pack(s) for Mark VIe or Eight RTD Cable(s) to VRTD Inputs board(s) for Mark VI; the number and location depends on the level of redundancy required .
26 28 30 32 34 36 38 40 42 44 46 48
25 27 29 31 33 35 37 39 41 43 45 47
JRA JRB
Shield Bar
Barrier Type terminal Blocks can be unplugged from board formaintenance
RTD Input Terminal Boards
Installation
Connect the wires for the 16 RTDs directly to the two terminal blocks on the terminal board. Each block is held down with two screws and has 24 terminals accepting up to #12 AWG wires. A shield terminal strip attached to chassis ground is located immediately to the left of each terminal block. For CE mark applications, double-shielded wire must be used. All shields must be terminated at the shield terminal strip. Do not terminate shields located at the end device.
274 VRTD RTD Input
In a TMR Mark VI system, TRTDH1B provides redundant RTD inputs by fanning the inputs to three VRTD boards in the R, S, and T racks. The inputs meet the same environmental, resolution, suppression, and function requirements and codes as the TRTDH1C terminal board; however, the fast scan is not available.
RTD Terminal Board TRTDH1C Screw Connections Input 1 Input 2 Input 2 Input 3 Input 4 Input 4 Input 5 Input 6 Input 6 Input 7 Input 8 Input 8 (Sig) (Exc) (Ret) (Sig) (Exc) (Ret) (Sig) (Exc) (Ret) (Sig) (Exc) (Ret)
Screw Connections
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
(Exc) (Ret) (Sig) (Exc) (Ret) (Sig) (Exc) (Ret) (Sig) (Exc) (Ret) (Sig)
JA1 First 8 RTDs to JA1
J-Port Connections: Plug in PRTD I/O Pack(s) for Mark VIe
Input 9 (Sig) Input 10 (Exc) Input 10 (Ret) Input 11 (Sig) Input 12 (Exc) Input 12 (Ret) Input 13 (Sig) Input 14 (Exc) Input 14 (Ret) Input 15 (Sig) Input 16 (Exc) Input 16 (Ret)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
(Exc) (Ret) (Sig) (Exc) (Ret) (Sig) (Exc) (Ret) (Sig) (Exc) (Ret) (Sig)
or Cable to VRTD I/O board(s) for Mark VI; JB1 Second 8 RTDs to JB1 The number and location depends on the number of inputs required.
A RTD B C
Excxx
Application Note: - Optional Ground: connnect the B wire to ground; - RTD Group wiring, that is sharing the B wire; tie the B wires together at the RTDs, tie the Sigxx signals together at the TRTD terminal b board, and interconnect with one wire.
TRTDH1C RTD Terminal Board Wiring
Sigxx Retxx
VRTD RTD Input 275
Operation
TRTD supplies a 10 mA dc multiplexed (not continuous) excitation current to each RTD, which can be grounded or ungrounded. The 16 RTDs can be located up to 300 m (984 ft) from the turbine control cabinet with a maximum two-way cable resistance of 15 . The A/D converter in the I/O processor samples each signal and the excitation current four times per second for normal mode scanning and 25 times per second for fast mode scanning, using a time sample interval related to the power system frequency. Software performs the linearization for the selection of 15 RTD types. RTD open and short circuits are detected by out-of-range values. An RTD that is determined to be outside the hardware limits is removed from the scanned inputs to prevent adverse effects on other input channels. Repaired channels are reinstated automatically in 20 seconds or can be manually reinstated. All RTD signals have high-frequency decoupling to ground at signal entry. RTD multiplexing in the I/O processor is coordinated by redundant pacemakers so that the loss of a single cable or I/O processor does not cause the loss of any RTD signals in the control database.
TRTDH1C Terminal Board

Noise suppression JA1
RTD I/O Processor Board

I/O Processor is either remote (Mark VI) or local (Mark VIe)
To controller
Excitation
NS
A/D Conv
(8) RTDs
ID
Processor
VMEbus
Noise Suppression JB1
NS
(8) RTDs
ID
JB1 cables to I/O processor VRTD for Mark VI systems or connects to PRTD I/O pack for Mark VIe systems
TRTD (Simplex) Inputs and Signal Processing
276 VRTD RTD Input
Signals TerminalBoard TRTDH1B PM= Pacemaker Tx = VRTD transmit Rx = VRTD receive
Noise suppression
JRA
ID
NS
JSA
ID
PM, Tx PM, Rx, S
(8) RTDs to JRA, JSA, JTA
PM, Tx PM, Rx, R JTA

ID
PM, Tx PM, Rx, R Excitation RTD Signal Return Grounded or ungrounded

ID
Noise suppression
JRB
ID
PM, Tx
NS
JSB (8) RTDs to JRB, JSB, JTB
PM, Rx, T
PM, Tx PM, Rx, T JTB

ID
PM, Tx PM, Rx, S

TRTDH1 TMR-Capable RTD Terminal Board
Specifications
Item
Specification
Eight channels per terminal board 10, 100, and 200 platinum 10 copper 120 nickel
Span Maximum lead resistance Fault detection
0.3532 to 4.054 V 15 maximum two-way cable resistance High/low (hardware) limit check High/low (software) system limit check Failed ID chip
VRTD RTD Input 277
RTD Accuracy
RTD Type
120 nickel 200 platinum 100 platinum 100 platinum -51 to 240C (- 60 F to 400 F) 10 copper
Group Gain
120 nickel Normal_ 1.0 Normal_ 1.0 Gain_ 2.0 10 Cu_10
Accuracy at 400 F
2 F 2 F 4 F 2 F 10 F

RTD Type
Name/Standard
Range C
-51 to +260 -51 to +593 -51 to +700
Range F
-60 to +500 -60 to +1100 -60 to +1292
100 platinum
-51 to +700
-60 to +1292
100 platinum
-51 to +700
-60 to +1292
-51 to +249 -51 to +204
-60 to +480 -60 to +400
278 VRTD RTD Input
Diagnostics
Diagnostic checks include the following: Each RTD type has hardware limit checking based on preset (non-configurable) high and low levels set near the ends of the operating range. If this limit is exceeded, a logic signal is set and the input is no longer scanned. If any one of the inputs hardware limits is set, it creates a composite diagnostic alarm, L3DIAG_xxxx, referring to the entire board. Details of the individual diagnostics are available from the toolbox. The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal. Each RTD input has system limit checking based on configurable high and low levels. These limits can be used to generate alarms, and can be configured for enable/disable, and as latching/non-latching. RESET_SYS resets the out of limit signals. In TMR systems, limit logic signals are voted and the resulting composite diagnostic is present in each controller. The resistance of each RTD is checked and compared with the correct value, and if high or low, a fault is created. Each connector has its own ID device, which is interrogated by the I/O processor board. The terminal board ID is coded into a read-only chip containing the terminal board serial number, board type, revision number, and the connector location. If a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
DRTD Simplex RTD Input

The Simplex RTD Input (DRTD) terminal board is a compact RTD terminal board designed for DIN-rail mounting. The board has eight RTD inputs and connects to the VRTD processor board with a single cable. This cable is identical to those used on the larger TRTD terminal board. The terminal boards can be stacked vertically on the DIN-rail to conserve cabinet space. Two DRTD boards can be connected to VRTD for a total of 16 temperature inputs. Only a simplex version of the board is available.
Note The DRTD board does not work with the PRTD I/O pack.
Installation
Note There is no shield terminal strip with this design.
Mount the plastic holder on the DIN-rail and slide the DRTD board into place. Connect the wires for the eight RTDs directly to the terminal block. The Euro-Block type terminal block has 36 terminals and is permanently mounted on the terminal board. Typically #18 AWG wires (shielded twisted triplet) are used. Terminals 25 through 34 are spares. Two screws, 35 and 36, are provided for the SCOM (ground) connection, which should be as short a distance as possible.
VRTD RTD Input 279
DRTD Screw Connections Input 1 (Signal) Input 2 (Excitation) Input 2 (Return) JA1 Input 3 (Signal) Input 4 (Excitation) Input 4 (Return) Input 5 (Signal) Input 6 (Excitation) Input 6 (Return) Input 7 (Signal) Input 8 (Excitation) Input 8 (Return) 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 Input 1 (Excitation) Input 1 (Return) Input 2 (Signal) Input 3 (Excitation) Input 3 (Return) Input 4 (Signal) Input 5 (Excitation) Input 5 (Return) Input 6 (Signal) Input 7 (Excitation) Input 7 (Return Input 8 (Signal)
Cable to J3 or J4 connector in I/O rack for VRTD board
Chassis Ground SCOM
Chassis Ground
Euro Block type terminal block
Application Notes: - Optional Ground: connnect the "B" wire to ground; - RTD Group wiring, that is sharing the "B" wire; tie the "B" wires together at the RTDs, tie the "Sigxx" signals together at the TRTD termination board, and interconnect with one wire. b
Excxx
A RTD
Sigxx Retxx
B C
DRTD Board Wiring and Cabling
280 VRTD RTD Input
Operation
The noise suppression on DRTD is similar to that on TRTD. High-density EuroBlock type terminal blocks are permanently mounted to the board, with two screw connections for the ground connection (SCOM). An on-board ID chip identifies the board to VRTD for system diagnostic purposes.
<R> Control Rack DRTD Terminal Board
suppression JA1 Excitation 1 B Noise
RTD Input Board VRTD Excitation . 16 RTD inputs
J3
RTD
C
Signal 2 Return 3
I/O Core Processor TMS320C32 (8) RTDs ID

Grounded or ungrounded
SCOM
A/D
Processor VME Bus
J4
Excit.
Connector for cable from second DRTD board
VCO Type A/D converter
DRTD Board and VRTD Input Board
DRTD supplies a 10 mA dc multiplexed (not continuous) excitation current to each RTD, which can be grounded or ungrounded. The eight RTDs can be located up to 300 meters (984 feet) from the turbine control cabinet with a maximum two-way cable resistance of 15 . VRTDs VCO type A/D converter uses voltage to frequency converters and sampling counters. The converter samples each signal and the excitation current four times per second for normal mode scanning and 25 times per second for fast mode scanning, using a time sample interval related to the power system frequency. Software in the digital signal processor performs the linearization for the selection of 15 RTD types . RTD open and short circuits are detected by out of range values. An RTD that is determined to be outside the hardware limits is removed from the scanned inputs to prevent adverse effects on other input channels. Repaired channels are reinstated automatically in 20 seconds or can be manually reinstated.
VRTD RTD Input 281
Specifications
Item
Specification
Eight channels per terminal board 10, 100, and 200 platinum 10 copper 120 nickel
Span Maximum lead resistance Fault detection
0.3532 to 4.054 V 15 maximum two-way cable resistance High/low (hardware) limit check High/low (software) system limit check Failed ID chip

RTD Type
Name/Standard
Range C
-51 to +260 -51 to +593 -51 to +700
Range F
-60 to +500 -60 to +1100 -60 to +1292
100 platinum
-51 to +700
-60 to +1292
100 platinum
-51 to +700
-60 to +1292
-51 to +249 -51 to +204
-60 to +480 -60 to +400
282 VRTD RTD Input
Diagnostics
Diagnostic checks include the following: Each RTD type has hardware limit checking based on preset (non-configurable) high and low levels set near the ends of the operating range. If this limit is exceeded, a logic signal is set and the input is no longer scanned. If any one of the inputs hardware limits is set, it creates a composite diagnostic alarm, L3DIAG_xxxx, referring to the entire board. Details of the individual diagnostics are available from the toolbox. The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal. Each RTD input has system limit checking based on configurable high and low levels. These limits can be used to generate alarms, and can be configured for enable/disable, and as latching/non-latching. RESET_SYS resets the out of limit signals. In TMR systems, limit logic signals are voted and the resulting composite diagnostic is present in each controller. The resistance of each RTD is checked and compared with the correct value, and if high or low, a fault is created. Each connector has its own ID device, which is interrogated by the I/O processor board. The terminal board ID is coded into a read-only chip containing the terminal board serial number, board type, revision number, and the connector location. If a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
VRTD RTD Input 283
Notes
284 VRTD RTD Input
VSVA Servo Control

VSVA Servo Control
The Servo Control (VSVA) board controls up to four electro-hydraulic servo valves that start the steam/fuel valves. These four channels are divided between two TSVA terminal boards. The VSVA/TSVA boards provide triple modular redundancy (TMR) control solution for retrofit applications where 3-coil servo valves are not present. Valve position is measured with linear variable differential transformers (LVDT) or alinear variable differential reluctance (LVDR) sensor. Applications allowing dual coil servo valve and using either single or dual LVDT/LVDR sensors are supported.
TSVA Terminal Board Screw TB1 x 1 x 3 x 5 x 7 x 9 x 11 x 13 x 15 x 17 x 19 x 21 x 23 x Locking Tab JT1 VME Bus to VCMI
RUN FAIL STAT
VSVA Servo Board x
x 2 4 6 8 10 12 14 16 18 20 22 24 x x 26 28 30 32 34 36 38 40 42 44 46 48 x
DC - 37 connectors with locking fasteners JT 6 JS 1 Cables to VME Rack T JS 6 From Second TSVA JR 1 JR 6 JT 5 Cables to VME Rack S Locking Tab Screw x
J8
TB2 x 25 x 27 x 29 x 31 x 33 x 35 x 37 x 39 JR 5 JS 5 x 41 x 43 x 45 x 47 P 12
J7
J5
VSVA
x J3
Shield Bar
DA - 15 connectors with locking fasteners From Second TSVA
Connectors on VME Rack R
J4
Cables to VME Rack R From Second TSVA
VSVA Processor Board, TSVA Terminal Board and Interconnect Cabling
VSVA Servo Control 285
Installation
To install the V-type board 1 2 3 4 5 6 7 8
Power down the controller by turning off the power supply. Loosen the top and bottom screws on the existing servo board, or cover plate. Remove existing board (by pushing up on top extraction tab and pushing down on lower extraction tab) or remove cover plate. Ensure the board is in the top and bottom tracks. Fully inset the board by pushing in at the top and bottom. Lock the board in place by pushing down on the top and bottom locking tabs. Tighten the top and bottom screws. Power up the controller by turning on the power supply.
Note Sensors and servo valves are wired directly to two removable barrier type terminal blocks mounted on each terminal board. Each block is held down with two screws, and has 24 terminals accepting up to two #12 AWG wires each. A shield termination strip attached to chassis ground is located immediately to the left of each terminal block.
Combined Servo Output/LVDT Terminal Board TSVAH1A
x
LVDT 01 (L) LVDT 02 (L) LVDT 03 (L) LVDT 04 (L) NC LVDT 06 (L) Exc R1/S (L) Exc R2/T (L) Exc R1 (L) Exc R2 (L) Exc S (L) Exc T (L)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
LVDT 01 (H) LVDT 02 (H) LVDT 03 (H) LVDT 04 (H) NC LVDT 06 (H) Exc R1/S (H) Exc R2/T (H) Exc R1 (H) Exc R2 (H) Exc S (H) Exc T (H)
Servo 1 120 mA JP1 80 mA JP2
Servo 2 120 mA JP6 80 mA JP7 40 mA JP8 20 mA JP9 10 mA JP10
Servo 1 R (L) NC NC NC Servo 2 R (L) NC NC Pulse 02 (TTL) Pulse 01 (24R) Pulse 01 (L) Pulse 02 (24R) Pulse 02 (L)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
Servo 1 R (H) NC NC NC Servo 2 R (H) NC NC Pulse 01 (TTL) Pulse 01 (24V) Pulse 01 (H) Pulse 02 (24V) Pulse 02 (H)
40 mA JP3 20 mA JP4 10 mA JP5
Jumper Choices: 120A 120 mA (40 ohm coil) 80 80 mA 40 40 mA 20 20 mA 10 10 mA Terminal blocks can be unplugged from terminal board for maintenance
TSVA Terminal Board
286 VSVA Servo Control
Operation
The VSVA servo board contains I/O signal conditioning electronics along with a microprocessor providing four channels of servo loop control with bi-directional servo current outputs. Valve position is typically measured with either four wire LVDT or three wire LVDR Sensors. Ten LVDT/LVDR position inputs, two pulse rate inputs and four LVDT/LVDR excitation source outputs are supported on the VSVA/TSVA boards. The VSVA/TSVA boards provide a TMR servo control solution using fanned in and out control and feedback signals needed to support retrofits of older simplex control applications which commonly have dual coil servo valves. The two coils are either tied in parallel or split, and have either one or two LVDT/LVDR position feedback sensors per valve. One, two or three LVDT/LVDR valve position inputs can be assigned to a servo control loop from 10 LVDT/LVDR inputs available for all four servo loops. Two Pulse Rate inputs could be assigned for servo control loop applications requiring flow rate measurement feedback. The pulse rate inputs can be used for turbine speed control. It is important to ensure that speed input signals meet the VSVA board input sensitivity-versus-frequency specification and that they fall within a 2 Hz to 12 kHz frequency band. VSVA boards located in the R, S and T VME racks provide individual (local) servo current outputs that are combined on the TSVA terminal board to produce a TMR output. A current sense resistor in series with the total servo current output is located on the TSVA board providing total current feedback to the VSVA current regulator circuits. As long as any two of the three VSVA boards are online and operating without faults, the combined servo output loop will continue to function, allowing online replacement of any one of the three VSVA boards. Refer to the figures for VSVA/TSVA inputs and outputs. Each VSVA servo control loop output is equipped with an individual suicide relay under firmware control. It opens the output current signal to the TSVA terminal board during rack power off, during system startup, for over-current faults, and for out-of-range position feedback faults. Inputs, outputs, and critical internal VSVA board functions are continuously monitored online for out-of-limit conditions. The VSVA servo board generates diagnostic alarms. It sends associated fault messages to the operator interface as fault conditions are detected. Green, red, and yellow LEDs on the VSVA front panel display the board-operating status. Redundant one-bit serial communication busses allow the R, S, and T VSVA boards to share critical status parameters. The decision to suicide servo current loop outputs, select LVDT/LVDR excitation switchover sources, and check all three boards are using the same parameters is continuously shared between VSVA boards over the serial busses. The TSVA terminal board contains two removable I/O terminal blocks. The terminal screws, each capable of accepting two #12 AWG wires, provide the interface I/O customer sensor wiring. Each TSVA supports two servo control loop outputs plus associated I/O feedback sensors. Signals are fanned in and out on the TSVA board to and from the three VSVA (R, S, and T) boards. LVDT/LVDR inputs, excitation outputs, pulse rate inputs and servo loop outputs are voltage-clamped and passively filtered (suppressed) on the TSVA board. Servo cable lengths, up to 300 m (984 ft), are supported with a maximum two-way cable resistance of 15 .
Three TMR VSVA boards are connected to either one or two TSVA terminal boards using cables, with DC-37 pin connectors on each end, between the JR1, JS1, and JT1 connectors and the R, S, or T rack J3 or J4 backplane connectors. VSVA front panel connectors, J7 and J8, supply feed back signals. They are connected to the TSVA board JR6, JS6 or JT6 receptacles using twisted shielded pair cables with DA-15 connectors. J7 and J3 must connect to one of the TSVA boards, while J8 and J4 connect to the second TSVA board, if used. Pulse rate inputs are fanned to the TMR VSVA boards through twisted shielded pair cables, with DA-15 connectors, between J5 receptacles on the three VSVA front panels and JR5, JS5 and JT5 receptacles on the TSVA. When Pulse Rate inputs are used, J5 on the VSVA board must be connected to JR5 on the TSVA terminal board. JR1 must be connected to J3 on the VME rack using cables with DC-37 pin connectors. If Pulse rate inputs are not required, J5 can be left unconnected. If J5 is used, then the J12 4 pin cable must connect the two TSVA boards. Jumpers on the TSVA are configured to select appropriate in-line resistors that limit servo output current overdrive depending on coil resistance. Jumpers JP1 through JP5 and JP6 through JP10 select resistors compatible with full-scale servo output current ranges of 10 mA, 20 mA, 40 mA, 80 mA, or 120 mA for servo output channels. Refer to the figures for VSVA/TSVA inputs and outputs. TSVA provides five channels of LVDT/LVDR differential inputs and two channels of redundant automatically switched-over LVDT/LVDR excitation outputs at 7.10 Vrms at 3.2 kHz. TSVA provides redundant LVDT/LVDR excitation switchover relays to automatically select a good excitation source from an R, S, or T VSVA board. This feature ensures that a failure of a single VSVA board will not result in the loss-ofexcitation output on the TSVA board. It also allows any one of the R, S, or T racks to be powered down to support online VSVA board replacement. TSVA excitation outputs to LVDT/LVDR sensors minimize effects on servo control when either the high or low side of the input or output windings are inadvertently shorted to ground. This excitation output switchover feature is especially useful for retrofit applications using a single LVDT/LVDR position sensor. The excitation switchover source selection commands are controlled by software on the R, S, and T VSVA boards, which continuously monitor the excitation switchover outputs. A redundant hardware voter circuit on the TSVA board ensures that a single fault on a VSVA board or rack power-off condition will not result in loss-of -excitation output. The two pulse rate circuits on the TSVA board have two current-limited 24 V dc outputs, at 40 mA each, to supply power to active pulse rate input devices.
R S T Controller Application Software Terminal Board TSVAH1A (Input Portion) LVDT 3.2k Hz, 7 V rms Excitation Source LVDT1H 1
Servo Board VSVAH1A J3

A / D Converter
4 Circuits Regulator Digital Servo Regulator
JR1 P28VR JS1
A/D
J3 P28V Same for S To pulse J3 rate Same for T
LVDT1L
2 SCOM
D/A D/A Converter Servo Driver Local Current Sense To combined Servo Outputs TSVA
or LVDR
5 Ckts. Diode Voltage Select P24V1 41 P24VR1 42 P1TTL 39
P28VS JT1 P28VT
CL P28V
JR5
CL
J5 (R) J5 (S) J5 (T)
Connector on Front of VSVA Board in R
Pulse Rate Inputs PR Active TTL Probes 0 - 12 kHz
P1H P1L 44 P24V2 45
43
Pulse Rate
Configurable Gain TMR Total Current Sense from TSVA
JS5
(PR only available 46 on 1 of 2 TSVA ) P24VR2 40 P2TTL Pulse Rate P2H 47 Inputs, PR Magnetic MPU P2L 48 Pickups 0 - 12 kHz Noise Suppression
JT5
Combined TMR Feedback Control Configurable Gain 3.2KHz Excitation
Excitation to TSVA
LVDT and Pulse Rate Inputs, TMR Servo Outputs
Note Signal pairs from LVDT/LVDR pulse rate devices are twisted shielded pairs.
R S T Controller Application Software Terminal Board TSVAH1A (continued)
4 Circuits. A/D Converter
A/D
From TSVA LVDT
Regulator
Digital Servo Regulator Suicide Relay J3
TMR Combined Servo Current Ranges 10,20,40,80,120 mA
D/A
2 Circuits. JR1
120 80 40 20 10
Servo Driver Local Current Sense
TMR Total Current Sense

25 100
Servo Coils 31 S1RH

N S 26
Configurable Gain J5 Pulse Rate Connector on front of VSVA card Combined TMR Feedback Control Configurable Gain J7
Current Limit Resistors
S1RL JR6 J3 JS1

120 80 40 20 10
J7 Connector on Front of VSVA Board
JS6 J3 JT1
120 80 40 20 10
Servo Board VSVAH1A
JT6
Combined TMR Servo Output
S T VSVAH1A Servo Card (continued) 3.2 KHz at 7.0 Vrms LVDT Excitation Outputs to TSVA
3.2KHz Sinewave Generator
TSVAH1A Terminal Board (continued) LVDT/LVDR Redundant Excitation Switchover Diagram

Relay Coils EXR1 HW EXS1 Voter EXT1 Ckt's x4
K1 K2 K3 K4
P28
P2
J3
JR1
ER1H 1:1
ERH1 ERL1 ERH2 ERL2
17 18 19 20
ER1L ER2H 1:1 ER2L K1A K2A K4A K2B K3A EXR1 EXR2 LV5H LV5L LV6H LV6L K1B
LVDT Excitation Source Selection Outputs to TSVA
EDR1H 13 EDR1L 14
K3B K4B RMS Det. RMS Det. To JS1 & JT1 To JS1 & JT1 To JS1 & JT1 To JS1 & JT1 LV6H 11 LV6L ESH ESL N.C.
LVDT/LVDR Excitation Output 1
12 21 22
J3 LVDT Excitatio n Loss Detector
JS1
ES1H 1:1 ES1L
ES2H
K5A K7A K5B K7B
K6A K8A K6B K8B

EDR2H
ES2L EXS1 N.C. EXS2 LV5H LV5L LV6H LV6L
15
EDR2L 16
LVDT/LVDR Excitation Output 2
J3
JT1
ET1H ET1L
1:1
ETH ETL
23 24
ET2H ET2L EXT1 EXT2 LV5H LV5L LV6H LV6L
N.C. N.C. Relay Coils EXR2 HW EXS2 Voter EXT2 Ckt's P28
K5 K6 K7 K8
x4
LVDT Excitation Switchover Source Selection Relays
R VSVA
S VSVA JR1
TSVA
2 2 2
37 Pin Cables T VSVA
JS1
2 2 2
J3XX J4XX
JT1
2 2 2
TSVA
J3XX JR1 J4XX J3XX J4XX JS1
2 2 2
2 2 2
JT1
2 2 2
VSVA-to-VSVA Serial Communications Bus Interconnection Diagram
Data Format / Transfer Rates for VSVA-to-VSVA Serial Communication Bus
VSVA Function
Servo outputs 1-4 over-current status Servo outputs 1-4 local current polarity
Data Type
Servo over-current status bit
State Definition
1 = Over current 0 = Normal
VSVA to VSVA Transfer Rate

14.4 ms 14.4 ms 432 ms 432 ms 432 ms
Servo local current polarity status bit 1 = Positive 0 = Negative 1=S 0 = R1 1=T 0 = R2 R, S, and T CRCs must match at power-up
LVDT excitation - out 1 and 3 source LVDT source selection status bit selection LVDT excitation - out 2 and 4 source LVDT source selection status bit selection Check of R, S, and T VSVA critical configuration parameter match at power-up Cyclic redundancy check (CRC) of critical configuration parameters
Examples that define both internal cable and customer sensor wire interconnections to VSVA and TSVA boards are shown in the following five examples.
Example 1: Two Dual Coil Servo Valves and Single LVDT/LVDR

The first example supports two dual coil servo valves with coils electrically connected in parallel, and a single LVDT/LVDR position feedback device per valve. Only one servo valve and associated feedback device are connected to each one of the two TSVA boards. This supports online TSVA replacement with the loss of only one servo valve function. Three TMR VSVA boards plus two TSVA boards control a total of two servo valves plus associated LVDT/LVDR position feedback devices. This configuration supports steam turbine control retrofit applications that can continue to operate with the loss of any single servo controlled steam valve. No single point fault, including online replacement of a TSVA board, will result in losing more than one servo valve control function. VSVA boards and cables can be replaced online without the losing servo output functions. Three TMR VSVA boards, R, S, and T, connect to either one or two TSVA terminal boards using cables, with DC-37 pin connectors, between the TSVA JR1, JS1 and JT1 connectors and the R, S, or T VME rack backplane J3xx or J4xx connectors. JR6, JS6 and JT6 TSVA connectors feed total servo output combined current sense signals back to the associated VSVA front panel connectors, J7 and J8, using twisted/shielded pair cables with DA-15 pin connectors. The J7 and J3xx cables must connect to one of the TSVA boards, while J8 and J4xx must connect to a second TSVA board, if used. Pulse rate inputs are fanned into the three TMR VSVA boards using twisted/shielded pair cables, with DA-15 pin connectors, connected between the J5 connectors on the VSVA front panels and JR5, JS5, and JT5 connectors on the TSVA. When pulse rate inputs are used, the J5 cables must be connected to the TSVA board associated with the J3xx 37 pin backplane cable. If pulse rate inputs are not required, connecting the J5 cables is unnecessary. The 4-pin J12 connectors and cable connect the LVDT switchover relay status between two TSVA boards. If the J5 cable is not used, the J12 cable is not needed. Refer to the figure, Application Example 1: Two Dual Coil Servo Valve with Tied Coils and One LVDT/LVDR per TSVA.
Spare I/O resources are wired at the TSVA terminal block providing redundant monitoring functions improving VSVA board fault detection and localization. For example: LVDT inputs 1, 2, and 3 are wired together on the TSVA terminal block using three different LVDT/LVDR input cables and conditioning circuits on the VSVA and TSVA boards. Selecting a three-position, mid-select regulator configuration for regulator 1 and servo output 1 ensures a single fault in any of the three LVDT/LVDR input conditioning circuits or cables will not adversely affect the servo outputs. Mode 1 configuration enables limit checking on the VSVA board between the three LVDT regulator inputs while detecting and reporting disagreements between them. Mode 1 also enables limit checking between LVDT inputs 7, 8, and 9 assigned to servo regulator 3 and servo output 3. Refer to the Configuration section for more detailed information. Mode 1 configuration checks the R1 excitation sources of both TSVA boards, enhancing fault detecting and reporting capability. LVDT inputs 6 and 12 are wired at the TSVA terminal block redundantly monitoring LVDT excitation switchover outputs 1 and 3. Circuits on the VSVA boards use LVDT inputs 5 and 11 to detect loss-of-excitation, controlling the excitation 1 and 3 output switchover functions. LVDT inputs 5 and 11 are internally fed back on the TSVA to the VSVA boards. Refer to the Configuration section for more detailed information. Mode 1 only checks the following defined functions: detecting LVDT/LVDR disagreements and generating diagnostic alarms/messages.
TSVA Terminal Board

17
"R" VSVA
x
18 R1 15 & 37 Pin Cables 13 14 R2 15 16 11

C B A
J8 J7 JR1 J5 JS1
x
LVDR VALVE A
LV5
LV6
12 25 33 34 1 2 3 4 5 6 7 8 43 44 47 48 17 18
SV1 26 SV2 LV1 LV2 LV3 LV4 PR1

PR2
SERVO VALVE A
J3 J4 "S" VSVA
x
JT1 JR6 JS6 JT6 JR5
LVDT Inputs
J8 J7 J5
x
JS5 JT5
J12 TSVA Terminal Board
R1 S R2
13
14 15 16 LV6 LV5 11 12 25 26 33 34
J3 J4 "T" VSVA
x
C B A
T JR1 JS1
LVDR VALVE B SERVO VALVE B
SV1 SV2
J8 J7 J5
x
JT1 JR6 JS6 JT6 JR5 JS5 JT5
LV1 1 2
3
LV2 4 LV3 LV4 PR1 PR2

J12 5 6 7 8 43 44 47 48
LVDT Inputs
J3 J4 4 Pin Cable
Application Example 1: Two Dual Coil Servo Valve with Tied Coils and One LVDT/LVDR per TSVA
Example 2: Four Dual Coil Servo Valves and Single LVDT/LVDR

The second application example supports four dual coil servo valves with tied coils and a single LVDT/LVDR position feedback device per servo valve. Two servo valves and associated feedback devices are connected to each of the two TSVA boards. The three TMR VSVA boards plus two TSVA boards and associated cables shown in the following figure provide servo control outputs for up to four servo valve functions. The VSVA boards and internal cables can be replaced online without the loss of servo output functions. Online replacement of a TSVA board will result in the loss of up to two servo valve control functions during the replacement time period. Spare I/O resources are wired at the TSVA terminal block providing redundant monitoring functions enhancing VSVA board fault detecting and localization. For example: LVDT inputs 1 and 2 are wired together on the TSVA terminal block utilizing two different LVDT/LVDR input cables and input conditioning circuits on the VSVA and TSVA boards. A two position, minimum or maximum, regulator configuration can be selected for regulators 1 - 4 and servo outputs 1 - 4 ensuring a single fault in either of two associated LVDT/LVDR input conditioning circuits will not affect the servo output functions. A mode 2 configuration should be selected enabling limit checking on the VSVA board between LVDT/LVDR regulator inputs 1 and 2, assigned to servo channel 1, detecting and reporting disagreements between them. Mode 2 enables limit checking between LVDT input pairs 3 - 4, 7 - 8, and 9 10 assigned to servo regulators and servo outputs 2 through 4. Refer to the Configuration section for more detailed information on mode 2 servo configuration and operation. Refer to the figure, Application Example 2: Four Dual Coil Servo Valves with Tied Coils-One LVDT/LVDR per Valve. Mode 2 checks for LVDT/LVDR input pair disagreements for monitors 1 through 12 when configured to a 2_LVposMIN or 2_LVposMAX configuration and assigned to input pairs 1 - 2, 3 - 4, 7 - 8, and 9 - 10. Each of the input pairs must be assigned to one of the 12 monitoring functions when enabling mode 2. Mode 2 only checks between LVDT/LVDR specified pairs on regulators and monitors detecting disagreements that generate diagnostic alarms and messages. LVDT input 6 and 12 are wired at the TSVA terminal block to monitor and control LVDT excitation switchover outputs 2 and 4. Excitation switchover outputs 1 and 3 are monitored and controlled using LVDT/LVDR inputs 5 and 11. These are internally fed back to the TSVA detecting loss-of-excitation. Refer to the Configuration section for specifics on setting up and enabling LVDT excitation switchover circuit function.
"R" VSVA
x
TSVA Terminal Board

13 R1
C B A
15 & 37 Pin Cables J8 J7 J5 JS1

x
S R2
14 15 16 11 12 25 SV1 SV2 26 33
34
LVDR VALVE A LVDR VALVE B
JR1
T LV6 LV5
C B A
J3 JR6 J4 "S" VSVA

x
JT1
LV1 LV2 LV3 LV4 PR1 PR2
JS6 JT6 JR5
J8 J7 J5
JS5 JT5 J12
1 2 3 4 5 6 7 8 43
SERVO VALVE A SERVO VALVE B
LVDT Inputs
44 47 SPEED PICKUPS 48
TSVA Terminal Board

13 R1
x
C B A
S R2
14 15 T LV6 LV5 16 11 12 25 26 33 34 1 2 3 4 5
LVDR VALVE C LVDR VALVE D
J3 J4 "T" VSVA
x
C B A
JR1
JS1
SV1 SV2
J8 JR6 J7 J5
x
SERVO VALVE C SERVO VALVE D
JT1
JS6 JT6 JR5 JS5

JT5
LVDT Inputs
6
7
8
43 44 47 48
J3 J4 4 Pin Cable
J12
Application Example 2: Four Dual Coil Servo Valves with Tied Coils -One LVDT/LVDR per Valve
Example 3: Four LVDT/LVDR Valve Position Only Monitors

The third application example shows supports four LVDT/LVDR valve position only monitors. LVDT/LVDR position information from four remotely driven servo valves is monitored using this configuration. This configuration was developed to support NSTC monitoring valve positions on customer-controlled valves. The three TMR VSVA boards plus two TSVA boards and associated cables shown in the following figure provide four LVDT/LVDR excitation sources and LVDT/LVDR input position monitoring functions supporting four customercontrolled valves. The VSVA boards and internal cables can be replaced online without losing LVDT/LVDR excitation/monitor functions. Online replacement of a TSVA board can result in the loss of two servo valve monitoring functions during the replacement time period. LVDT/LVDR input pairs 1 - 2, 3 - 4, 7 - 8, and 9 - 10 are wired at the TSVA terminal block providing redundant monitoring, enhancing VSVA board fault detecting and localization. For example: LVDT inputs 1 and 2 are wired together on the TSVA terminal block utilizing two different LVDT/LVDR input cables and input conditioning circuits. A two position minimum or maximum monitor configuration can be selected for monitors 1 through 12 ensuring a single fault in either of the two LVDT/LVDR input conditioning circuits will not affect the related LVDT/LVDR monitoring function. A mode 2 configuration can be selected enabling limit checking on the VSVA board between the two LVDT/LVDR monitor inputs for detecting and reporting disagreements between LVDT input pairs 3 - 4, 7 - 8, and 9 - 10 assigned to one of the 12 monitors. Each of these input pairs must only be assigned to one of the 12 monitor functions when enabling mode 2. Refer to the Configuration section for more detailed information on mode 2 servo configuration and operation. Refer to the figure, Application Example 3: Four LVDT/LVDR Value Position Monitors Only Configuration. LVDT inputs 6 and 12 are wired at the TSVA terminal block monitoring and controlling LVDT excitation switchover outputs 2 and 4. Excitation switchover outputs 1 and 3 are monitored and controlled based on LVDT/LVDR inputs 5 and 11. These are internally fed back to the TSVA board detecting loss-of-excitation. Refer to the Configuration section for more detailed information on setting up and enabling LVDT excitation switchover circuit function.
"R" VSVA
x
TSVA Terminal Board

13 R1
C B A

x
S R2
14 15 16
LVDR VALVE A LVDR VALVE B
JR1
C B A
LV5
LV6 SV1 SV2
11 12 25 26 33 34 1 2 3 4 5 6 7 8 43 44 47 48
J3 JR6 J4 "S" VSVA

x
JT1
JS6 JT6 JR5
LVDT Inputs
J8 J7 J5
JS5 JT5 J12
SPEED PICKUPS
TSVA Terminal Board

13 R1
x
S R2
14 15 T 16
C B A
LVDR VALVE C LVDR VALVE D
J3 J4 "T" VSVA
x
C B A
JR1
LV5 JS1
LV6 SV1 SV2
11 12 25 26 33 34 1 2 3 4 5
J8 JR6 J7 J5
x
JT1
LV1
LV2 LV3 LV4 PR1 PR2
JS6 JT6 JR5 JS5

JT5
LVDT Inputs
6
7
8
43 44 47 SPEED PICKUPS 48
J3 J4 4 Pin Cable
J12
Application Example 3: Four LVDT/LVDR Valve Position Monitors Only Configuration
Example 4: Two Dual Coil Servo Valves and Two LVDT/LVDR Devices
The fourth application example supports two dual coil servo valves with split coils and two separate LVDT/LVDR devices per servo valve. The split coils of the two servo valves and the associated LVDT/LVDR devices are divided between the two TSVA boards as shown in the following figure. This supports changing VSVA boards, TSVA boards and cables while online without losing either of the two servo output functions. Loss of one servo control output channel to one of the two split servo coils will result in a 50% reduction in gain and null bias. Spare I/O resources are wired on the TSVA terminal block providing redundant monitoring functions while enhancing VSVA board fault detection and localization. For example: LVDT inputs 1 and 2 are wired together on the TSVA terminal block. They utilize two different LVDT/LVDR input cables and input conditioning circuits on the VSVA and TSVA boards while monitoring a single LVDT/LVDR input. A two position minimum or maximum monitor arrangement can be configured using monitor 1. LVDT/LVDR inputs 3 - 4, 7 - 8, and 9 - 10 can be configured using monitor 3, monitor 7, and monitor 9. A mode 2 configuration can be selected enabling a limit check on the VSVA board between these pairs of LVDT/LVDR monitor inputs detecting and reporting disagreements between them. Refer to the Configuration section for more detailed information on Mode 2 monitor configuration and operation. Refer to the figure, Application Example 4: Two Dual Coil Valves with Split Coils - Two LVDT/LVDRs per Valve. LVDT input 6 and 12 are wired at the TSVA terminal block to monitor and control LVDT excitation switchover outputs 2 and 4. Excitation switchover outputs 1 and 3 are monitored and controlled based on LVDT/LVDR inputs 5 and 11. These are internally fed back on the TSVA to detect loss-of-excitation. Refer to the Configuration section for specifics on setting up and enabling LVDT excitation switchover circuit functions.
"R" VSVA
x
TSVA Terminal Board

13 R1
LVDR A VALVE A
C B A

x
S R2
14 15 16
JR1
C B A
LVDR B VALVE B
LV5
LV6 SV1 SV2
11 12 25 26 33 34 1 2 3 4 5 6 7 8 43 44 47 48
SERVO VALVE A
J3 JR6 J4 "S" VSVA

x
JT1
JS6 JT6 JR5
LVDT Inputs
J8 J7 J5
JS5 JT5 J12
SPEED PICKUPS
TSVA Terminal Board

13 R1
x
LVDR B VALVE A
C B A
S R2
14 15 T 16
J3 J4 "T" VSVA
x
C B A
JR1
LV5 JS1
LV6 SV1 SV2
11 12 25 26 33 34 1 2 3 4 5
LVDR A VALVE B
J8 JR6 J7 J5
x
JT1
LV1
LV2 LV3 LV4 PR1 PR2
SERVO VALVE B LVDT Inputs
JS6 JT6 JR5 JS5 JT5 4 Pin Cable

J12
6
7
8
43 44 47 SPEED PICKUPS 48
J3 J4
Application Example 4: Two Dual Coil Valves with Split Coils Two LVDT/LVDRs per Valve
Example 5: Single Servo Valve - Dual LVDT/LVDR One Value Per Terminal Board
The fifth application example supports a single-coil servo valve with two separate LVDT/LVDR devices per servo valve. The single-coil servo valve and the associated LVDT/LVDR devices are supported by a single TSVA terminal board as shown in the following figure. Spare I/O resources are wired on the TSVA terminal block providing redundant monitoring functions while enhancing the VSVA board fault detection and localization. For example: LVDT inputs 1 and 2 are wired together on the TSVA terminal block. They utilize two different LVDT/LVDR input cables and input conditioning circuits on the VSVA and TSVA boards while monitoring a single LVDT/LVDR input. A two position minimum or maximum monitor arrangement can be configured using monitor 1. LVDT/LVDR inputs 3-4, 7-8 and 9-10 can be configured using monitor 3, monitor 7 and monitor 9. A mode 2 configuration can be selected enabling a limit check on the VSVA board between these pairs of LVDT/LVDR monitor inputs detecting and reporting disagreements between them. Refer to the Configuration section for more detailed information on Mode 2 monitor configuration and operation.
"R" V SJ8 VJ7 A
J5 R1 J3XX S R2 T
SINGLE SERVO VALVE - DUAL LVDT/LVDR ONE VALVE PER TERMINAL BD

TSVA
C B A C B A
LVDR 1 VALVE A
J4XX
"S" V SJ8 VJ7 A

J5 J3XX
LV5
LVDR2 VALVE A
JR1 JS1 JT1 JR6
LV6 SV1 SV2
SERVO VALVE A
LV1 LV2 LV3 LV4 PR1
J4XX
JS6 JT6
LVDT Inputs
"T" V J8 S VJ7 A
J5 J3XX
JR5 JS5 JT5
SPEED PICKUPS
PR2
J4XX
Application Example 5: Single Servo Valve - Dual LVDT/LVDR
Typical Servo Coil Ratings
Coil Nominal Nominal Coil Type Current Resistance (/Coil) Typical Servo Design 1 2 3 4 10 mA 20 mA 20 mA 40 mA 1,000 250 500 125 2 and 3 Coil Gas 25 GPM, 3 and 4 Way, 2 Coil 70 GPM, 3 Way, 2 Coil 50 GPM, 4 Way, 2 Coil
Rated Current for Rated Flow 10 mA 16 mA 17 mA 34.5 mA
Internal TSVA J1 J10 TSVA Resistance () Jumper Setting 102 416 416 185 10 mA 20 mA 10 mA 40 mA
The above table defines standard servo coil resistance and associated internal resistance, selectable with the terminal board jumpers shown in the preceding figure. In addition, non-standard jumper settings could be used to drive non-standard coils. The total resistance would be equivalent to the standard setting. Control valve position is sensed with either a four wire LVDT or a three-wire linear variable differential reluctance (LVDR). The application software allows maximum flexibility checks for the feedback devices. LVDT/LVDRs can be mounted up to 300 m (984 ft) from the turbine control with a maximum two-way cable resistance of 15 .
Note The excitation source is isolated from signal common (floating) and is capable of operation at common mode voltages up to 35 V dc, or 35 V rms, 50/60 Hz
Two LVDT/LVDR excitation sources are located on each terminal board for Simplex applications and another two for TMR applications. Excitation voltage is 7 V rms and the frequency is 3.2 kHz with a total harmonic distortion of less than 1% when loaded. A typical LVDT/LVDR has an output of 0.7 V rms at the zero stroke position of the valve stem, and an output of 3.5 V rms at the designed maximum stoke position (some applications have these reversed). The LVDT/LVDR input is converted to dc and conditioned with a low pass filter. Diagnostics perform a high/low (hardware) limit check on the input signal and a high/low system (software) limit check. Two pulse rate inputs are cabled to a single J5 connector on the VSVA board front. This is a dedicated connection minimizing noise sensitivity on the pulse rate inputs. Inputs support both passive magnetic pickups and active pulse rate transducers (TTL type). Both are interchangeable without configuration. Pulse rate inputs can be located up to 300 m (984 ft) from the turbine control cabinet, provided 70 NF shielded-pair cable is used or 35 NF differential capacitance with 15 resistance. A frequency range of 2 to 12 kHz can be monitored at a normal sampling rate of either 10 or 20 ms. Magnetic pickups typically have an output resistance of 200 and an inductance of 85 mHz excluding cable characteristics. The transducer is a high impedance source, generating energy levels insufficient to cause a spark.
Note The maximum short circuit current is approximately 100 mA with a maximum power output of 1 W.
Specifications
Item Number of inputs (per TSVA) Number of outputs (per TSVA) Specification LVDT 1-4 and 6. Five LVDT windings Two pulse rate signals (total of two per VSVA) Two servo valves (total of four per VSVA board) Four excitation sources for LVDTs Two special TMR switchover LVDT/LVDR excitation sources Two excitation sources (24 V dc) for pulse rate transducers Internal sample rate LVDT accuracy LVDT input filter LVDT common mode rejection LVDT excitation output Pulse rate accuracy 200 Hz 1% with 14-bit resolution Low pass filter with three down breaks at 50 rad/sec 15% CMR is 1 V, 60 dB at 50/60 Hz Frequency of 3.2 0.2 kHz Voltage of 7.00 0.14 V rms 0.05% of reading with 16-bit resolution at 50 Hz frame rate Noise of acceleration measurement is less than 50 Hz/sec for a 10,000 Hz signal being read at 10 ms Pulse rate input Magnetic PR pickup signal input Active PR Pickup Signal input Servo valve output accuracy Minimum signal for proper measurement at 4 Hz is 33 mVpk, and at 12 kHz is 827 mVpk. Generates 150 V peak-to-peak into 60 k Generates 5 to 27 V peak-to-peak into 60 k 2% with 12-bit resolution Dither amplitude and frequency adjustable; unused, 12.5 Hz, 25 Hz, 33.33 Hz, 50 Hz, 100 Hz; 0 to 10% Amplitude Fault detecting Suicide servo outputs initiated by: Servo current out of limits Regulator feedback signal out of limits Pulse Rate Excitation Source (TSVA) Nominal 24 V dc --- 40 mA max
Diagnostics
Three LEDs at the top of the VSVA front panel display status information. The normal RUN condition is a flashing green, and FAIL is solid red. The third LED is normally off but displays a steady orange if an alarm condition exists on the board Servo diagnostics cover items such as out of range LVDT voltage, servo suicide, servo current open circuit, and short circuit. If any one of the signals goes unhealthy a composite diagnostic alarm, L#DIAG_VSVA occurs. If the associated regulator has two sensors, the bad sensor is removed from the feedback calculation and the good sensor is used. Details of the individual diagnostics are available from the toolbox. The diagnostic signals can be individually latched, and reset with the RESET_DIA signal if they go healthy Connectors JR1, JS1, JT1, JR6, JS6, JT6, JR5, JS5 and JT5 on the TSVA terminal board have their own ID device that is interrogated by the VSVA board. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the plug location.
Configuration
Jumpers on the TSVA must be configured to select appropriate in-line resistors that limit Servo output current overdrive. Jumpers JP1 to JP5 and JP6 to JP10 select resistor values that are compatible with full-scale servo output currents of 10 mA, 20mA, 40 mA, 80 mA or 120 mA for servo output channels 1 and 2 respectively.
Parameter Configuration System Limits Mode Enable / Disable system limits for Pulse Rate Inputs. Modes 1 and 2 for specific VSVA board applications. Mode 1: Mode1 generates diagnostic alarms for applications using one servo valve with dual coils tied in parallel and a single LVDT for position feedback. Only one servo valve and associated LVDT is supported per TSVA terminal board. If Regulator 1 and 3 is used, RegType must be selected to 3_LV_PosMid using LVDT inputs 1, 2 and 3 and 7,8 and 9 respectively. Regulators 2 and 4 must be selected to RegType unused. A diagnostic alarm is generated when an LVDT input assigned to Regulator 1 or 3 exceeds the TMR_DiffLimt referenced to the voted median value. If Monitors 4 and 10 are used, they must be assigned to LVDT inputs 4 and 10 respectively. A diagnostic alarm will be generated if LVDT input 4 or 10 is < 6.6 Vrms or > 7.7 Vrms. Excitation sources J3 ER1 and J4 ER1 must be wired to LVDT Inputs 4 and 10 respectively if Monitors 4 and 10 are used. Mode 2: Mode2 generates diagnostic alarms for applications using one or two servo valves with dual split coils and one or two LVDTs each for position feedback. These applications will typically split the servo valves and LVDTs between the two TSVA terminal boards. Mode2 also supports four-valve LVDT position monitoring only applications. If Regulators 1,2,3 or 4 are used, they must be selected to RegType 2_LV_PosMAx or Min using LVDT input pairs (1,2) (3,4) (7,8) (9,10) respectively. If Monitors 1-12 are used and assigned to any of LVDT input pairs (1,2) (3,4) (7,8) or (9,10), they must be selected to RegType 2_LV_PosMax or Min. Only one Monitor can be assigned to one of these pairs. If a Regulator or Monitor is assigned LVDT input pairs (1,2) (3,4) (7,8) or (9,10) and the difference within the pair exceeds the associated TMR_DiffLimt value, a diagnostic alarm will be generated. SrvOcSiucHld If an over-current condition exists on a used Servo Output 1,2,3 or 4 and it exceeds the selected Curr_Suicide value, the suicide command will be held off for this time interval to prevent suicide action on a short transient over-current condition. Hold-off time to allow LVDT input hardware filter recovery when LVDT Excitation source switch over occurs. The LVDT input retains last known good value for the time selected. Unused, 10 ms, 15 ms, 20 ms, 25 ms, 30 ms, 35 ms, 40 ms, 45 ms, 50 ms Enable, disable Unused, Mode1, Mode 2 Description Choices
LvdtExFlHold
Unused, 5 ms, 10 ms, 15 ms, 20 ms, 25 ms, 30 ms, 35 ms, 40 ms
Parameter Regulators Regulator 1 RegType
Description
Choices
Algorithm used in the regulator
Unused, no_fbk, 1_PulseRate, 2_PlsRateMAX, 1_LVPosition, 2_LV_PosMIN, 2_LV_PosMAX, 3_LV_PosMid, 2_LV_pilotCyl 4_LVp/cylMAX
RegGain RegNullBias DitherAmpl Dither Frequency
Position loop gain in (%current/%position) Null bias in % current, balances servo spring force Dither in % current (minimizes hysteresis) Dither Frequency in Hz
Gain 200 to 200 Null Bias 100 to 100 Dither amp: 0 to 10% Dither Frequency: unused, 12.5Hz, 25Hz, 33.33Hz, 50Hz, 100Hz Range: -15 to150 Range: -15 to150 Unused; LVDT 1 through 12 Range: 0 to10 Range: 0 to10 Range: 0 to7.1 Range: -15 to150
MinPOSvalue MAxPOSvalue LVDT#input MnLVDT#_Vrms MxLVDT#_Vrms LVDT_MArgin TMR_DiffLimit Monitor 1 Monitor type
Position at Min End Stop in engineering units Position at Max End Stop in engineering units LVDT Input Selection LVDT# Vrms at Min End Stop Normally set by AutoCalibrate LVDT# Vrms at Max End Stop Normally set by AutoCalibrate Allowable Range Exceeded Error of LVDT in Percent Diagnostic, Limit TMR Input Vote Difference, Position in Engineering Units Monitor algorithm
Unused 2_LVposMIN 2_LVposMAX 3_LVposMID
1_Lvposition
MinPOSvalue MAxPOSvalue LVDT#input MnLVDT#_Vrms MxLVDT#_Vrms LVDT_MArgin TMR_DiffLimit
Position at Min End Stop in engineering units Position at Max End Stop in engineering units LVDT Input Selection LVDT# Vrms at Min End Stop Normally set by AutoCalibrate LVDT# Vrms at Max End Stop Normally set by AutoCalibrate Allowable Range Exceeded Error of LVDT in Percent Diagnostic, Limit TMR Input Vote Difference, Position in Engineering Units
Range: -15 to150 Range: -15 to150 Unused: LVDT 1 through 12 Range: 0 to10 Range: 0to10 Range: 0 to.7.1 Range: -15 to150
Parameter Monitor 2 Monitor 12 J3:IS200TSVAH1A ExctFailOvr1
Description
Choices
Terminal board 1 connected to VSVA through J3 Excitation 1 Failover Status: indicates whether excitation source R1 or Excitation source S is selected. (R1=0; S=1) If both LVDT Excitation Failover Outputs 1 and 2 are required, independent should be selected. If only LVDT Excitation Failover Output 1 is required, redundant should be selected and LVDT Input 6 must be wired to LVDT Excitation Failover Output 1. This provides redundant monitoring of LVDT Input 5 failover detecting circuits. Switch_R2T must be set to Disable.
J3 connected, not connected (Input BIT)
ExciteMode
Independent, Redundant
Switch_R1S RndtLvdtDiag
Disable or Enable Excitation 1 Failover.
Disable, Enable
Enable - Configures LVDT 6 Input as a redundant monitor of Disable, Enable excitation Source Select 1 switchover logic. Produces a Diagnostic if disagreement occurs. Excitation 2 Failover Status: indicates whether excitation source R2 or Excitation source T is selected. (R2=0; T=1) Disable or Enable Excitation 2 Failover. Set to Disable if ExciteMode is set to Redundant. Measured Servo Output 1 Current Total in Percent Identify regulator number Select current output for coil windings Select Suicide function based on current Percent current error to initiate suicide Select Suicide function based on feedback Percent position error to initiate suicide Measured Servo Output 2 Current Total in Percent Terminal Board 2 connected to VSVA through J4 Excitation 3 Failover Status: indicates whether excitation source R1 or Excitation source S is selected. (R1=0; S=1) If both LVDT Excitation Failover Outputs 3 and 4 are required, independent should be selected. If only LVDT Excitation Failover Output 3 is required, redundant should be selected and LVDT Input 12 must be wired to LVDT Excitation Failover Output 3. This provides redundant monitoring of the LVDT Input 11 failover detecting circuits. Switch_R2T must be set to Disable. (Input BIT)
ExctFailOvr2
Switch_R2T Servo Output1 Reg Number Servo_mA_Out EnableCurSuic Curr_Suicide EnablFbkSuic Fdbk_Suicide Servo Output2 J4:IS200TSVAH1A ExctFailOvr1
Disable, Enable (Input FLOAT) Unused, Reg1, Reg2, Reg3, Reg4 10, 20, 40, 80, 120 mA Enable, disable 75 to 125% (output current error) Enable, disable 0 to 10% (actuator position error) (input FLOAT) J4 connected, not connected (Input BIT)
ExciteMode
Independent, Redundant
Switch_R1S RndtLvdtDiag
Disable or Enable Excitation 3 Failover. Enable - Configures LVDT 12 Input as a redundant monitor of excitation Source Select 3 switchover logic. Produces a Diagnostic if disagreement occurs. Excitation 4 Failover Status: indicates whether excitation source R2 or Excitation source T is selected. (R2=0; T=1) Disable or Enable Excitation 4 Failover. Set to Disable if ExciteMode is set to Redundant.
Disable, Enable Disable, Enable
ExctFailOvr2
(Input BIT)
Switch_R2T
Disable, Enable
Parameter Servo Output3 Servo Output4 J5:IS200TSVAH1A
Description Measured Servo Output 3 Current Total in Percent Measured Servo Output 4 Current Total in Percent Pulse Rate inputs cabled to J5 connector Note: If used, the J5 cable must be attached to the J3 TSVA terminal board.
Choices (Input FLOAT) (Input FLOAT) Connected, not connected
FlowRate1 PRType PRScale SysLim1Enabl SysLim1Latch SysLim1Type SysLimit SystemLim2 TMR_DiffLimt FlowRate2 Board Points (Signals) L3DIAG_VSVA R1_SuicideNV : R4_SuicideNV ER1_StateNV : ER4_StateNV SysLim1PR1 SysLim2PR1 SysLim1PR2 SysLim2PR2 Reg1Suicide : Reg4Suicide RegCalMode Reg1_Fdbk : Reg4_Fdbk MiscFdbk1a : MiscFdbk4a Reg1_Error : Reg4_Error Accel1 Accel2 Mon1 : Mon12 AVSelect1NV
Pulse rate input selected - Board point Select speed or flow type signal Convert Hz to engineering units Select system limit Select whether alarm will latch Select type of alarm initiation Select alarm level in GPM or RPM Same as above Difference limit off voted pulse inputs (EU) Pulse rate input selected - Board point (as above) Description - Point Edit (Enter Signal Connection) Board diagnostic exists Servo 1 Output Suicide Status : Servo 4 Output Suicide Status Excitation 1 Select Relay State : Excitation 4 Select Relay State Pulse Rate 1 Limit 1 Status Pulse Rate 1 Limit 2 Status Pulse Rate 2 Limit 1 Status Pulse Rate 2 Limit 2 Status Regulator 1 suicide relay status : Regulator 4 suicide relay status Regulator Calibration Status Regulator 1 Feedback Value : Regulator 4 Feedback Value Pilot/Cylinder 1 : Pilot/Cylinder 4 Regulator 1 Position Error : Regulator 4 Position Error GPM/sec GPM/sec Position monitor : Position monitor Anti-vote Signal Monitor One of Five Selected Signals. (Local Current, Total Current, Compliance Voltage, DAC Feedback or Position Error) :
(Input FLOAT) Unused, speed, or flow 0 to 1,000 Enable, disable Latch, not latch >= Or <= 0 to 12,000 Same as above 0 to 12,000 (Input FLOAT) Direction Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Type BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT
Input
FLOAT
Parameter AVSelect4NV
Description Anti-vote Signal Monitor One of Five Selected Signals. (Local Current, Total Current, Compliance Voltage, DAC Feedback or Position Error) Enable Calibration for Regulator 1 : Enable Calibration for Regulator 4 Force Suicide for Servo Output 1 : Force Suicide for Servo Output 4 Regulator 1 Position Reference : Regulator 1 Position Reference Regulator 1 Gain Modifier : Regulator 4 Gain Modifier Reg 1 Null Bias Correction : Reg 4 Null Bias Correction
Choices Input FLOAT
CalibEnab1 : CalibEnab4 SuicideForce1 : SuicideForce4 Reg1_Ref : Reg4_Ref Reg1- GainMod : Reg4- GainMod Reg1_NullCor : Reg4_NullCor Internal Variables
Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output
BIT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT
Internal variables to service the auto-calibration display, not configurable
Alarms
Fault 2 3 Fault Description Flash Memory CRC Failure CRC failure override is Active Possible Cause Board firmware programming error (VSVA board is not allowed to go online unless override is active) Board firmware programming error (VSVA board is allowed to go online should not happen on released code) System checking was disabled by configuration.
16
System Limit Checking is Disabled Limit checks for J5 Pulse Rate Inputs disabled. This diagnostic is disabled if the J5 cable is not present at power-up.
24 30
Firmware/Hardware Incompatibility ConfigCompatCode Mismatch; Firmware: {Firmware: #} (Tre: #}
Invalid terminal board connected to the VSVA board.
A tre file has been installed that is incompatible with the firmware on VSVA board. Either the tre file or The configuration compatibility code that the firmware firmware must change. Contact the factory. is expecting is different than what is in the tre file for this board IOCompatCode Mismatch; Firmware: {Firmware: #} (Tre: #} The I/O compatibility code that the firmware is expecting is different than what is in the tre file for this board A tre file has been installed that is incompatible with the firmware on the VSVA board. Either the tre file or firmware must change. Contact the factory.
31
33-44
Monitor LVDT #{1-12} rms voltage out of limits {value} Minimum and maximum LVDT rms voltage limits are configured incorrectly. Monitor LVDT # rms voltage is out of limits. The Limits are defined as: The LVDT may need recalibration. Monitor MnLVDT#_Vrms ((MxLVDT#_Vrms May be a problem on the VSVA board. MnLVDT#_Vrms) * LVDT_MArgin percent /100) = Low Limit Monitor MnLVDT#_Vrms + ((MxLVDT#_Vrms MnLVDT#_Vrms) * LVDT_MArgin percent /100) = High Limit
Fault 45
Fault Description Calibration Mode Enabled A VSVA Servo Regulator was placed into calibration mode.
Possible Cause The VSVA is in calibration mode.
46
The controller (R, S, T) or IONet is down, or there is The servo is suicided because the VSVA is not online. a configuration problem with the system preventing the VCMI from bringing the VSVA board online. VSVA board not online, Servos Suicided Bad Regulator Position reference or position Local Servo # Current exceeded 80% for a continuous feedback value. time period >80 milliseconds. May be a problem on the VSVA board. Servo current #{1-4} Over current Detected {value} Servo current #{1-4} Current Exceeded Limit {value}, Suicided. Bad Regulator Position reference or position feedback value.
48-51
52-55
Produces a diagnostic alarm and suicides the Servo # May be a problem on the VSVA board. Output when the following four conditions are met: Servo local current exceeds the Curr_Suicide Limit in percent. The time hold off requirement of SrvOcSiucHld {value} is met Local Current polarities for R, S and T Servo Outputs support isolation of a single VSVA board/servo output to suicide. Configuring the EnableCurSuic to disable will disable the suicide action. 56-59 Servo posit. #{1-4} fdbk out of range {value}, Suicided Minimum and maximum LVDT rms voltage limits are configured incorrectly. Servo position feedback is out of limits resulting in a Suicide. The Limits are defined as: Regulator # MinPOSvalue - Servo # Fdbk_Suicide value = low limit Regulator # MAxPOSvalue + Servo # Fdbk_Suicide value = high limit. Configuring the EnableFbkSuic to disable will disable the suicide action. 60 The LVDT minimum and maximum voltages are ConfigMsg error for regulator #{1-4} Configuration Message Error for Regulator Number #. equal or reversed, or an invalid LVDT, regulator, or servo number is specified. There is a problem with the VSVA configuration and the servo will not operate properly. On board ref voltages {Pos ref} {Neg ref} Onboard Calibration Voltage Range Fault for Positive 9.09 V dc and/or Negative 9.09 V dc References. Message displays the values for the P9.09 and N9.09 reference voltage readings. 62 VSVA LVDT Exct Out Mon to J3 {ER1, ES, ET} voltage out of range {value} LVDT Excitation Voltage out of range. (<6.3Vrms or >7.7Vrms) 63 VSVA LVDT Exct Out Mon to J4 {ER1, ES, ET} voltage out of range {value} LVDT Excitation Voltage out of range. (<6.3Vrms or >7.7Vrms) 64 VSVA LVDT Exct Out Mon to J3 {ER2, ES2 unused, ET2 unused} voltage out of range {value} LVDT Excitation Voltage out of range. (<6.3Vrms or >7.7Vrms) 65 VSVA LVDT Exct Out Mon to J4 {ER2, ES2 unused, ET2 unused} voltage out of range {value} LVDT Excitation Voltage out of range. (<6.3Vrms or >7.7Vrms) May be a problem on the VSVA board. May be a problem on the VSVA board. May be a problem on the VSVA board. May be a problem on the VSVA board. Problem on the VSVA board. The LVDT may need recalibration. May be a problem on the VSVA board.
61
Fault 66
Fault Description Servo Output Assignment Mismatch Servo output assignment mismatch. Regulator types 8 and 9 (pilot cylinder configurations) use two-servo outputs each. They have to be consecutive pairs, and they have to be configured as the same range
Possible Cause Fix the regulator configurations.
67-68
J3 Excitation failure #{1-2} Excitation Switchover An excitation switchover has occurred due to loss of LVDT Excitation output for {1} J3 Exc R1/S or {2} J3 Exc R2/T.
The Power Supply for the R, S or T rack may have been turned off. (R or S for #1, R or T for #2).
69-70
J4 Excitation failure #{3-4} Excitation Switchover An excitation switchover has occurred due to loss of LVDT Excitation output for {3} J4 Exc R1/S or {4} J4 Exc R2/T.
The Power Supply for the specified R or T rack may have been turned off. R and S for #3, R and T for #4.
71
J3 {R, S, T}_Pack DIO Communication Failure on {R, The Power Supply for the specified R or S rack may S} channels 1+2 be off.. Both J3 Serial Communication channels 1 and 2 for the specified R or S channel are not communicating. J3 R or J3 S or J3 T clarifies which VSVA board saw the fault and generated this diagnostic alarm. The specified R or S VSVA board may have a problem sending or receiving serial communications The 37 pin J3 cable associated with the specified VSVA may not be properly mated at the TSVA terminal board or the rack backplane connector
72-73
J3 {R, S, T}_Pack DIO Communication Failure on {R, The specified R or S VSVA board may have a S} channel #{1 or 2) problem. One of the J3 Serial Communication channels 1 or 2 for the specified R or S channel is not communicating. J3 R or J3 S or J3 T clarifies which VSVA board saw the fault and generated this diagnostic alarm. The 37 pin J3 cable associated with the specified R or S VSVA may not be properly mated at the TSVA terminal board or the rack backplane connector or may have a shorted / open wire or pin. The terminal board may have a signal net open or shorted to another signal. The Power Supply for the specified S or T rack may be off. The specified S or T VSVA board may have a problem sending or receiving serial communications The 37 pin J3 cable associated with the specified VSVA may not be properly mated at the TSVA terminal board or the rack backplane connector
74
J3 {R, S, T}_Pack DIO Communication Failure on {S, T} channels 1+2 Both J3 Serial Communication channels 1 and 2 for the specified S or T channel are not communicating. J3 R or J3 S or J3 T clarifies which VSVA board saw the fault and generated this diagnostic alarm.
75-76
J3 {R, S, T}_Pack DIO Communication Failure on {S, T} channel #{1 or 2) One of the J3 Serial Communication channels 1 or 2 for the specified S or T channel is not communicating. J3 R or J3 S or J3 T clarifies which VSVA board saw the fault and generated this diagnostic alarm.
The specified R or S VSVA board may have a problem. The 37 pin J3 cable associated with the specified R or S VSVA may not be properly mated at the TSVA terminal board or the rack backplane connector or may have a shorted / open wire or pin. The terminal board may have a signal net open or shorted to another signal.
77
J3 {R, S, T}_Pack DIO Communication Failure on {R, The Power Supply for the specified R, S or T rack S, T} channels 1+2 may be off. Both J3 Serial Communication channels 1 and 2 for the specified R or S or T channel are not communicating. J3 R or J3 S or J3 T clarifies which VSVA board saw the fault and generated this diagnostic alarm. The specified R, S or T VSVA board may have a problem sending or receiving serial communications The 37 pin J3 cable associated with the specified VSVA may not be properly mated at the TSVA terminal board or the rack backplane connector
Fault 78-79
Fault Description
Possible Cause
J3 {R, S, T}_Pack DIO Communication Failure on {R, The specified R, S or T VSVA board may have a S, T} channel #{1 or 2) problem. One of the J3 Serial Communication channels 1 or 2 for the specified R or S or T channel is not communicating. J3 R or J3 S or J3 T clarifies which VSVA board saw the fault and generated this diagnostic alarm. The 37 pin J3 cable associated with the specified R, S or T VSVA may not be properly mated at the TSVA terminal board, the rack backplane connector or may have a shorted / open wire or pin. The terminal board may have a signal net open or shorted to another signal.
80
J4 {R, S, T}_Pack DIO Communication Failure on {R, The Power Supply for the specified R or S rack may be off. S} channels 1+2 Both J4 Serial Communication channels 1 and 2 for the specified R or S channel are not communicating. J4 R or J4 S or J4 T clarifies which VSVA board saw the fault and generated this diagnostic alarm. The specified R or S VSVA board may have a problem sending or receiving serial communications The 37 pin J4 cable associated with the specified VSVA may not be properly mated at the TSVA terminal board or the rack backplane connector
81-82
J4 {R, S, T}_Pack DIO Communication Failure on {R, The specified R or S VSVA board may have a S} channel #{1 or 2) problem. One of the J4 Serial Communication channels 1 or 2 for the specified R or S channel is not communicating. J4 R or J4 S or J4 T clarifies which VSVA board saw the fault and generated this diagnostic alarm. The 37 pin J4 cable associated with the specified R or S VSVA may not be properly mated at the TSVA terminal board or the rack backplane connector or may have a shorted / open wire or pin. The terminal board may have a signal net open or shorted to another signal. The Power Supply for the specified S or T rack may be off. The specified S or T VSVA board may have a problem sending or receiving serial communications The 37 pin J4 cable associated with the specified VSVA may not be properly mated at the TSVA terminal board or the rack backplane connector The specified S or T VSVA board may have a problem. The 37 pin J4 cable associated with the specified S or T VSVA may not be properly mated at the TSVA terminal board or the rack backplane connector or may have a shorted / open wire or pin. The terminal board may have a signal net open or shorted to another signal.
83
J4 {R, S, T}_Pack DIO Communication Failure on {S, T} channels 1+2 Both J4 Serial Communication channels 1 and 2 for the specified S or T channel are not communicating. J4 R or J4 S or J4 T clarifies which VSVA board saw the fault and generated this diagnostic alarm.
84-85
J4 {R, S, T}_Pack DIO Communication Failure on {S, T} channel #{1 or 2) One of the J4 Serial Communication channels 1 or 2 for the specified S or T channel is not communicating. J4 R or J4 S or J4 T clarifies which VSVA board saw the fault and generated this diagnostic alarm.
86
J4 {R, S, T}_Pack DIO Communication Failure on {R, The Power Supply for the specified R, S or T rack S, T} channels 1+2 may be off. Both J4 Serial Communication channels 1 and 2 for the specified R or S or T channel are not communicating. J4 R or J4 S or J4 T clarifies which VSVA board saw the fault and generated this diagnostic alarm. The specified R, S or T VSVA board may have a problem sending or receiving serial communications The 37 pin J4 cable associated with the specified VSVA may not be properly mated at the TSVA terminal board or the rack backplane connector
87-88
J4 {R, S, T}_Pack DIO Communication Failure on {R, The specified R, S or T VSVA board may have a S, T} channel #{1 or 2} problem. One of the J4 Serial Communication channels 1 or 2 for the specified R or S or T channel is not communicating. J4 R or J4 S or J4 T clarifies which VSVA board saw the fault and generated this diagnostic alarm. The 37 pin J4 cable associated with the specified R, S or T VSVA may not be properly mated at the TSVA terminal board or the rack backplane connector or may have a shorted / open wire or pin. The terminal board may have a signal net open or shorted to another signal.
97-100
Suicide relay #{1-4} does not match commanded state There is a problem on the associated VSVA board. Suicide relay status contact feedback does not match the relay commanded state.
Fault 101-104
Fault Description Excitation relay Driver #{1-4} does not match commanded state
Possible Cause There may be a problem on the associated VSVA board.
The VSVA excitation switchover driver state output to The TSVA terminal board may be the problem. the TSVA terminal board does not match the VSVA The J3 or J4 37 pin cable may be the problem. commanded state. 105-106 J3 Excitation relay #{1-2} does not match commanded The J3 TSVA terminal board may be the problem. state Switchover Excitation Output (1 or 2) may be shorted The TSVA LVDT Excitation 1 or 2 relay driver state at the J3 TSVA TB Screws. does not match the commanded state. If the J5 cable is not connected, this diagnostic is suppressed. If the J5 cable and two TSVA terminal boards are used, the J12 cable must be installed. J4 Excitation relay #{3-4} does not match commanded The J4 TSVA terminal board may be the problem. state Switchover Excitation Output (1 or 2) may be shorted The TSVA LVDT Excitation 3 or 4 relay driver state at the J4 TSVA TB Screws. does not match the commanded state. If the J4 TSVA terminal board is used and J5 is connected to the J3 TSVA board, the J12 cable must be installed. Regulator #{1-4} failed, exceeded position limits {value} Regulator position feedback is out limits. The limits are defined as: Regulator # MinPOSvalue - Servo # Fdbk_Suicide value = low limit. Regulator # MAxPOSvalue + Servo # Fdbk_Suicide value = high limit. 113-116 Excitation Failover #{1-4} limit exceeded {value} The LVDT Excitation output may be shorted. The LVDT Excitation # output is faulted. The VSVA The LVDT Excitation output may be faulted to an fault detecting circuitry has toggled the selection open state on the TSVA terminal board. relays on the TSVA terminal board four times within a 100 msec period attempting to select a good excitation source. This action has been repeated after waiting 16 seconds for the fault to go away. After 3 attempts separated by 16 seconds each, the VSVA boards will stop commanding the failover relays to toggle to prevent excessive long-term stress on the relays. (Nominal limit value displayed will be 12) If the fault goes away at any time and the Excitation Output returns to a healthy state, the failover detector circuits will restart and return to an active mode. 117-120 Excitation Outputs may be shorted at the TSVA TB-1 Excitation #{1-4} Not Valid LVDT Excitation # Failover output has been faulted for Screw Inputs. more than three seconds at the failover detector comparator circuit. J3 TB ID not found or invalid The TSVA ID devices may have a problem. JR1, JS1 or JT1 cable ID device on the TSVA terminal The VSVA has a problem reading the ID. board connected to the J3 cable was not found. The J3 cable connectors may not be properly mated. 129 J4 TB ID not found or invalid The TSVA ID devices may have a problem. JR1, JS1 or JT1 cable ID device on the TSVA terminal The J4 cable connectors may not be properly mated. board connected to the J4 cable was not found. 130 J5 TB ID not found or invalid The TSVA ID devices may have a problem. JR5, JS5 or JT5 cable ID device on the TSVA terminal The J5 cable connectors may not be properly mated. board connected to the J5 cable was not found. 131 J7 TB ID not found or invalid The TSVA ID devices may have a problem. JR6, JS6 or JT6 cable ID device on the TSVA terminal The J7 cable connectors may not be properly mated. board connected to the J7 cable was not found. Minimum and maximum Regulator LVDT rms voltage limits are configured incorrectly. The assigned LVDTs may need recalibration. May be a problem on the VSVA board.
107-108
109-112
128
Fault 132
Fault Description J8 TB ID not found or invalid
Possible Cause The TSVA ID devices may have a problem.
JR6, JS6 or JT6 cable ID device on the TSVA terminal The J8 cable connectors may not be properly mated. board connected to the J8 cable was not found. 133 J3 + J7 TB ID Barcode Do NOT MATCH J3 and J7 cables must be connected to the same TSVA Terminal Board to properly close the Servo TMR total current regulation loops. The J3 37 pin cable and the J7 15 pin cables must be connected to the same TSVA. The TSVA ID devices may have a problem.
The VSVA board may have a problem reading the ID If both the J3 and J7 cables are unconnected at power devices. up, this diagnostic is suppressed. 134 J4 + J8 TB ID Barcode Do NOT MATCH J4 and J8 cables must be connected to the same TSVA Terminal Board to properly close the Servo TMR total current regulation loops. If both the J4 and J8 are unconnected at power up, this diagnostic is suppressed. 135-138 Servo #{1-4} Suicided The J4 37 pin cable and the J8 15 pin cables must be connected to the same TSVA. The TSVA ID devices may have a problem. The VSVA board may have a problem reading the ID devices.
VSVA Board may be off line or in the process of Status of Servo Suicide state independent of a reason startup. for the suicide condition. Vsva board may have a problem. Critical configuration parameters or the firmware The VSVA is not allowed to go Online following power revision do not match the other R, S or T VSVA boards in this slot location. on because one or more critical configuration RST Configuration mismatch of critical items parameters do not match between the R, S and T boards. If the code revision is a match, a configuration download is required. Download the firmware and configuration to this board. Wires on J3 TSVA Between TB-1 Screws 11 and 13 or 12 and 14 may be loose or missing. The VSVA board may have a problem. Wires on J4 TSVA Between TB-1 Screws 11 and 13 or 12 and 14 may be loose or missing. The VSVA board may have a fault.
139
140
Redundant LVDT5+LVDT6 Vrms Diff > 0.5v {value} LVDT Excitation Output 1 ExciteMode is selected to Redundant and the LVDT 5 and 6 Vrms input values are not within 0.5VRMS of each other.
141
Redundant LVDT11+LVDT12 Vrms Diff > 0.5v {value} LVDT Excitation Output 3 ExciteMode is selected to Redundant and LVDT 11 and 12 Vrms input values are not within 0.5VRMS of each other.
142
J3 Redundant Excitation Loss Failure Detected LVDT5+LVDT6 LVDT Excitation Output 1 ExciteMode is selected to Redundant and the LVDT 6 input redundant loss detector disagreed with the LVDT 5 detector event detecting time.
Wires on J3 TSVA Between TB-1 Screws 11 and 13 or 12 and 14 may be loose or missing. The VSVA board may have a problem.
143
J4 Redundant Excitation Loss Failure Detected LVDT11+LVDT12 LVDT Excitation Output 3 ExciteMode is selected to Redundant and the LVDT 12 input redundant loss detector disagreed with the LVDT 11 detector event detecting time.
Wires on J4 TSVA Between TB-1 Screws 11 and 13 or 12 and 14 may be loose or missing. The VSVA board may have a fault.
160
The R VSVA board ER1 LVDT Excitation out has a Mode 1 specific diagnostic alarm. The ER1 Excitation problem. output for the J3 TSVA terminal board which must be The transformer on the TSVA board may have an wired to LVDT4 Input at the TSVA terminal board open winding. screws is < 6.6Vrms or > 7.7 Vrms. The J3 cable may be improperly mated, have an LVDT4 Pre-Relay R1 Excitation Low {value} open wire/connector pin or a short between signal and ground.
Fault 161
Fault Description LVDT10 Pre-Relay R1 Excitation Low {value} Mode 1 specific diagnostic alarm. The ER1 Excitation output for the J4 TSVA terminal board which must be wired to LVDT4 Input at the J4 TSVA terminal board screws is < 6.6Vrms or > 7.7 Vrms.
Possible Cause The R VSVA board ER1 LVDT Excitation out has a problem. The transformer on the TSVA board may have an open winding. The J4 cable may be improperly mated, have an open wire/connector pin or a short between signal and ground.
162
Mode1 REG1 3_LVDT (1,2,3){#1 or 2 or 3} Exceeded VSVA Board Electronics or the associated 37 pin TMR Median Diff Limit {value} LVDT 1, 2 and 3 inputs cable may have an LVDT Input fault. to Regulator 1 are compared to the median selected Wire on LVDT input screws may be loose or missing. value. A diagnostic alarm is generated and the faulted LVDT # and value is inserted into the message if the TMR Median Diff Limit value is exceeded.
165
Mode1 REG3 3_LVDT (7,8,9){#7 or 8 or 9} Exceeded VSVA Board Electronics or the associated 37 pin TMR Median Diff Limit {value} LVDT 7, 8 and 9 inputs cable may have an LVDT Input fault. to Regulator 3 are compared to the median selected Wire on LVDT input screws may be loose or missing. value. A diagnostic alarm is generated and the faulted LVDT # and value is inserted into the message if the TMR Median Diff Limit value is exceeded.
170
Mode2 REG1 LVDT (1,2) Exceeded Diff Limit ({value}) {value} LVDT 1and 2 inputs to Regulator 1 are compared to either the Min or Max value dependent upon the RegType selection. A diagnostic alarm is generated and the fault value is inserted into the message if the TMR Median Diff Limit value is exceeded.
VSVA Board Electronics or the associated 37 pin cable may have an LVDT Input fault. Wire on LVDT input screws may be loose or missing.
171
Mode2 REG2 LVDT (3,4) Exceeded Diff Limit ({value}) {value} LVDT 3 and 4 inputs to Regulator 2 are compared to either the Min or Max value dependent upon the RegType selection. A diagnostic alarm is generated and the fault value is inserted into the message if the TMR Median Diff Limit value is exceeded.
172
Mode2 REG3 LVDT (7,8) Exceeded Diff Limit ({value}) {value} LVDT 7 and 8 inputs to Regulator 3 are compared to either the Min or Max value dependent upon the RegType selection. A diagnostic alarm is generated and the fault value is inserted into the message if the TMR Median Diff Limit value is exceeded.
173
Mode2 REG4 LVDT (9,10) Exceeded Diff Limit ({value}) {value}
VSVA Board Electronics or the associated 37 pin cable may have an LVDT Input fault.
LVDT 9 and 10 inputs to Regulator 4 are compared to Wire on LVDT input screws may be loose or missing. either the Min or Max value dependent upon the RegType selection. A diagnostic alarm is generated and the fault value is inserted into the message if the TMR Median Diff Limit value is exceeded.
Fault 174
Fault Description Mode2 MON {1-12} LVDT (1,2) Exceeded Diff Limit {value} If LVDT input pair 1 and 2 are assigned to any of the Monitors 1-12, the LVDT inputs 1 and 2 are compared to either the Min or Max value dependent upon the Monitor type selection. A diagnostic alarm is generated and the faulted Monitor # is inserted into the message if the TMR Median Diff Limit value is exceeded.
Possible Cause VSVA Board Electronics or the associated 37 pin cable may have an LVDT Input fault. Wire on LVDT input screws may be loose or missing.
175
Mode2 MON {1-12} LVDT (3,4) Exceeded Diff Limit {value}
VSVA Board Electronics or the associated 37 pin cable may have an LVDT Input fault.
If LVDT input pair 3 and 4 are assigned to any of the Wire on LVDT input screws may be loose or missing. Monitors 1-12, the LVDT inputs 3 and 4 are compared to either the Min or Max value dependent upon the Monitor type selection. A diagnostic alarm is generated and the faulted Monitor # is inserted into the message if the TMR Median Diff Limit value is exceeded. 176 Mode2 MON {1-12} LVDT (7,8) Exceeded Diff Limit {value} VSVA Board Electronics or the associated 37 pin cable may have an LVDT Input fault.
If LVDT input pair 7 and 8 are assigned to any of the Wire on LVDT input screws may be loose or missing. Monitors 1-12, the LVDT inputs 7 and 8 are compared to either the Min or Max value dependent upon the Monitor type selection. A diagnostic alarm is generated and the faulted Monitor # is inserted into the message if the TMR Median Diff Limit value is exceeded. 177 Mode2 MON {1-12} LVDT (9,10) Exceeded Diff Limit {value} VSVA Board Electronics or the associated 37 pin cable may have an LVDT Input fault.
If LVDT input pair 9 and 10 are assigned to any of the Wire on LVDT input screws may be loose or missing. Monitors 1-12, the LVDT inputs 9 and 10 are compared to either the Min or Max value dependent upon the Monitor type selection. A diagnostic alarm is generated and the faulted Monitor # is inserted into the message if the TMR Median Diff Limit value is exceeded. 180-191 Regulator LVDT #{1-12} rms voltage out of limits {value} Regulator LVDT # position input is out of limits. The Limits are defined as: Regulator MnLVDT#_Vrms ((MxLVDT#_Vrms MnLVDT#_Vrms) * LVDT_MArgin percent /100) = Low Limit Regulator MnLVDT#_Vrms + ((MxLVDT#_Vrms MnLVDT#_Vrms) * LVDT_MArgin percent /100) = High Limit 192-255 Logic Signal {name) Voting Mismatch The specified signal from this VSVA disagrees with the TMR voted value. Voter Disagreement Diagnostic 288-323 Input Signal {name} Voting Mismatch, Local={value}, Voted={value} A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable. Minimum and maximum Regulator LVDT rms voltage limits are configured incorrectly. The LVDT may need recalibration. May be a problem on the VSVA board.
A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or The specified input signal from this VSVA varies from the cable the voted value of the signal by more than the TMR Diff Limit value. Voter Disagreement Diagnostic.

The Serial Communication Input/Output (VSCA) board provides I/O interfaces for external devices using RS-232C, RS-422, and RS-485 serial communications. Currently the IS200VSCAH2A version is available. The DSCB terminal board connects to the external devices, which include intelligent pressure sensors such as smart Honeywell pressure transducers and Kollmorgen electric drives. VSCA connects to the DSCB terminal board(s) through the J6 and J7 front panel connectors. These are parallel connected using 37-pin D shell connectors with group shielded twisted pair wiring. For RS-422 and RS-485, DSCB can interface with external devices at distances up to 1000 ft, at baud rates up to 375 kbps. For RS232C, the distance is only 50 ft or 2500 pF of cable capacitance (including the cable from VSCA to the DSCB). It supports short haul modems for longer distances.
Installation
Power down the VME I/O processor rack. Slide in the board and push the top and bottom levers in with your hands to seat its edge connectors. Tighten the captive screws at the top and bottom of the front panel.
Note Cable connections to the terminal boards are made at the J6 and J7 connectors on the front panel. These are latching type connectors to secure the cables. Power up the VME rack and check the diagnostic lights at the top of the front panel; for details refer to the section on diagnostics in this document.
It may be necessary to update the VSCA firmware to the latest level. For instructions, refer to GEH-6403 Control System Toolbox for the Mark VI Turbine Controller.
VSCA Serial Communication Input/Output 317
Operation
Note VSCA/DSCB is a data terminal device (DTE).
The VSCA is a single slot board with six serial communication ports. Each port can be independently configurable as an RS-232C, RS-485, or RS-422 interface, using a three-position group jumper (berg array). Both RS-232C and R-S422 support full duplex. The line drivers on VSCA include appropriate termination resistors with configurable jumpers to accommodate multi-drop line networks. RS-422 and RS-485 outputs have tri-state capability. I/O goes to a high impedance condition when powered down. They do not cause significant disturbance when powered down/up (less than 10 ms) on a party line. The open wire condition on a receiver is biased to a high state.s RS-232C supports: RXD, TXD, DTR/RTS, GND, CTS (five wire) RS-422 supports: RS-485 supports: TX+, TX-, RX+, RX-, GND TX/RX+, TX/RX-, GND
Data Flow from VSCA to Controller

The data flow from VSCA to the UCV_ controller is of two types: fixed I/O and Modbus I/O. Fixed I/O is associated with the smart pressure transducers and the Kollmorgen electric drive data. This data processes completely, every frame, as with conventional I/O. The required frame rate is 100 Hz. These signals are mapped into signal space, using the .tre file, and have individual health bits, use system limit checking, and have offset/gain scaling.
Note Two consecutive time outs are required before a signal is declared unhealthy. Diagnostic messages are used to annunciate all communication problems.
Modbus I/O is associated with the Modbus ports. Because of the quantity of these signals, they are not completely processed every frame. Instead they are packetized and transferred to the UCV_ processor over the IONet through a special service. This accommodates up to 2400 bytes at 4 Hz, or 9600 bytes at 1 Hz, or combinations thereof. This I/O is known as second class I/O, where coherency is at the signal level only, not at the device or board level. Health bits are assigned at the device level, the UCV_ expands (fully populate) for all signals, and system limit checking is not performed.
Ports 1 and 2 only (as an option) support the Honeywell pressure configuration. It reads inputs from the Honeywell smart pressure transducers, type LG-1237. This service is available on ports 1 and 2 as an option (pressure transducers or Modbus, or drives). The pressure transducer protocol uses the XDSAG#AC interface board and RS-422. Each port can service up to six transducers. The service is 375 kbaud, asynchronous, and with nine data bits (11 bits including start and stop). It includes the following failsafe features:
Communication miss counters, one per device, and associated diagnostics After four consecutive misses it forces the input pressure to 1.0 psi, and posts a diagnostic. After four consecutive hits (good values) it removes the forcing and the diagnostic.
Three ports (any three, but no more than three) support the Kollmorgen electric drive. It communicates with a Kollmorgen electric fast drive FD170/8R2-004 at a 19200 baud rate, point-to-point, using RS-422.
318 VSCA Serial Communication Input/Output
Modbus service
The current Modbus design supports the master mode. However the design does not prevent the future enhancement of Modbus slave mode of operation. It is configurable at the port level as follows: Used, not used Baud Rate RS-232C: 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600 Baud Rate RS-485/422: 19200, 38400, 57600, 115000 Parity: none, odd, even Data bits: seven, eight Stop bits: one, two Station addresses Multi-drop, up to eight devices per port; maximum of 18 devices per board RTU Time out (seconds) per device
The Modbus service is configurable at the signal level as follows: Signal type Register number Read/write Transfer rate, 0.5, 1, 2, or 4 Hz Scaling, offset, and gain
The service supports function codes 1-7, 15, and 16. It also supports double 16-bit registers for floating point numbers and 32-bit counters. It periodically tries 20 attempts to reestablish communications with a dead station. The VSCA and toolbox support type casting and scaling of all I/O signals to/from engineering units, for both fixed I/O and Modbus I/O.
Physical interfaces
Special connections are required for RS-485 applications with VSCA/DSCB located somewhere in the middle of the transmission path. Because of the potential length of the connection between VSCA and DSCB, there may be substantial stub length to the connection that will affect signal quality. For this reason, VSCA supports the connection of two DSCB boards wired in parallel. This permits RS-485 signals to come in one DSCB, pass through VSCA with the RS-485 transceiver, and go out the opposite DSCB. This ensures that the stub-length of the RS-485 path is minimized.
Note The above arrangement is not required when the VSCA/DSCB is located at one end of the RS-485 wiring.
The following figure shows the physical interface to the electric drives. For the Honeywell transducer interface using DSCB and DPWA, refer to the section, DSCB Serial Input/Output.
Twisted shielded pair AWG#18 min, up to 1000 ft, ground shields at Mark VI end only Mark VI Control J2 Electric Drive 8+ 9 - Rx FD170/8F2-004 4+ Tx 6 5 Grd J4 3 Enable 6 7 P24 V 8 enable 31 Crit fault Chassis 32 relay J1 18 20 22 J4 23 4 5 1 2 3 6 30 27 17 19 21 28 + 125 V dc power Drive enable relay L4FMVn_ENAX Enable = Close Contact input L5FMVn_CFZ Fault = Open
Ph PhPhGrd A B C Ref Sin Cos
V S C A
D S C B
V C C C
T R L Y T B C I
1 2 3 5
46 7 8
FE A BDCG
Motor Grd Motor frame exc exc sec2 sec2 sec1 sec1 1 2 3 4 5 6
Ther Shield (int)
Resolver
L V D T
Actuator/Valve
V S V O
T S V O
Monitoring signals
VSCA Interface to Electric Servo Drive using DSCB Board
Specifications
Item Number of Serial Ports Devices Specification 6 per VSCA board Port 1 2 3 4 5 6 Type Pressure Transducer Y Y RS-422 (375 KB) Electric Drive* Y Y Y Y Y Y RS-422 (19.2 KB) DSCB Modbus Comm. Y Y Y Y Y Y RS-232 (57.6 KB) RS-422 (115 KB) RS-485 (115 KB) DSCB Full duplex Full duplex
Boards DSCB, DPWA Choices (jumper select) RS-232C RS-422 RS-485 Ports 1 and 2 Ports 1 through 6 Size 50 ft 1000 ft 1000 ft
Baud Rates up to 57.6 kbps. Baud Rates up to 375 kbps Baud Rates up to 375 kbps
Honeywell pressure transducers, 6 transducers per port using XDSA board Modbus operation or Kollmorgen electric fast drive FD170/8R2-004. * Note 26.04 cm high x 1.99 cm wide x 18.73 cm deep (10.25 in. x 0.78 x 7.375 in.)
Note Any three ports, but no more than three, can support the electric drive.
Diagnostics
Three LEDs at the top of the VSCA front panel provide status information. The normal RUN condition is a flashing green, and FAIL is a solid red. The third LED shows a steady orange if a diagnostic alarm condition exists in the board. Diagnostic checks include the following: Each port checks communications and if there is no response, or bad data, or the communication port is non functional, a diagnostic fault is set. This creates a composite diagnostic alarm, L3DIAG_VSCA, referring to the entire board. The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal. Each terminal board has its own ID device, which is interrogated by the I/O board. The board ID is coded into a read-only chip containing the terminal board serial number, board type, revision number, and the JA1 connector. When the chip is read by the I/O board and a mismatch is encountered, a hardware incompatibility fault is created.
Details of diagnostic faults generated by the electric actuator are a separate category and are listed in the Alarms section of this document.
Configuration
VSCA is configured with board jumpers and with the toolbox. Jumpers JP1 through JP6 are block jumpers, used to select the port electrical characteristic, RS-232C, RS422, or RS-485. Each jumper has three positions marked 232, 422, and 485. Jumpers JP7 through JP12 are block jumpers, used to select the correct termination configuration for all the transmission lines (Tx). Each jumper has three positions marked TRM, THR, and PRK where: TRM means with terminating resistor. THR means no terminating resistor, pass through to J7. PRK means no terminating resistor, or park position
Jumpers JP13 through JP18 are block jumpers, and are used to select the correct termination configuration for all the receive lines (Rx). Each jumper has three positions marked, TRM, THR, and PRK, where the meanings are the same as above. A two-position jumper, JPU1, selects between Honeywell pressure transducer and Modbus operation for ports 1 and 2. The default position for JPU1 is X2, which enables the serial clock for operation with Honeywell transducers. Position X1 selects the clock needed for Modbus operation. JPU1 is located at the bottom of the board towards the backplane connector (away from the other jumpers).
VSCA Board Jumper Positions
Network Port Number Port 1 Port 2 Port 3 Port 4 Port 5 Port 6
232/422/485 Tx Communication TRM/THR/PRK JP1 JP2 JP3 JP4 JP5 JP6 JP7 JP8 JP9 JP10 JP11 JP12
Rx TRM/THR/PRK JP13 JP14 JP15 JP16 JP17 JP18
Parameter VSCA_Crd_Cfg Pressure_ Port1_Cfg PortNum PortType Priority PhyConnect TermType BitsPerChar Parity StopBits Baud DevAddr1 TimeOut Pressure_ Port2_Cfg PressureXdr_Pnt_Cfg
Description
Choices
Toolbox Parameter, Applicable port, Port 1 only Type of VSCA port Priority Type of physical connection Type of Termination Bits per character Normal parity Normal Parity Baud rate Device Address for transducer (first of six devices) Time out in msec (Similar configuration, for six devices) 10 60000 None, Odd, Even RS-232, RS-422, RS-485 None, Terminated, Pass through 7 Bits, 8 Bits, 9 Bits None, Odd, Even 1 StopBit, 2 StopBit
Parameter RawMin RawMax EngMin EngMax Lim1Enable Lim1_Latch Lim1Comp Limit1 Limit2 ElectDrive_Port_Cfg PortNum PortType Priority PhyConnect TermType BitsPerChar Parity StopBits Baud ATA PCP PDP PIN PPN RES_p1 RES_p2 RMS_p1 RMS_p2 RTL_p1 RTL_p2 TOF TimeOut ElectDriveRefCfg RawMin RawMax EngMin EngMax ElectDrivePosCfg ElectDriveVelCfg ElectDriveTorCfg Modbus_Port_Cfg PortNum PortType Priority PhyConnect TermType BitsPerChar
Description Scaling Factor Raw Limit Scaling Factor Raw Limit Scaling Factor eng limit Scaling Factor eng limit Enable Limit 1 check Latch error limit 1 Latch error compare (Similar for Lim2) Limit 1 Limit 2 Toolbox Parameter, Applicable port, Port 1 thru 6 Type of VSCA port Priority Type of physical connection Type of Termination Bits per character Normal parity Normal Parity Baud rate Drive parameter, Ampl Temp Alarm Drive parameter, Position Loop Comp Drive parameter, Position Loop Comp Drive parameter, Position Integral Gain Drive parameter, Position Loop Proportional Gain Drive parameter, Resolver excit amplitude Drive parameter, Resolver excit freq Drive parameter, Resolver excit freq Drive parameter, Resolver excit freq Drive parameter, Time limit Drive parameter, Time limit Drive parameter, Torque Offset Time Out in msec Scaling Factor Raw Limit Scaling Factor Raw Limit Scaling Factor eng limit Scaling Factor eng limit (Similar to PressureXdr_Pnt_Cfg) (Similar to ElectDriveRefCfg) (Similar to ElectDriveVelCfg) Toolbox Parameter, which port, Port 1 thru 6 Type of VSCA port Priority Type of physical connection Type of Termination Bits per character
Choices -3.4E+038, +3.4E+038 -3.4E+038, +3.4E+038 -3.4E+038, +3.4E+038 -3.4E+038, +3.4E+038 Disable, Enable NotLatch, Latch <=, >=
None, Odd, Even RS-232, RS-422, RS-485 None, Terminated, Pass through 7 Bits, 8 Bits, 9 Bits None, Odd, Even 1 StopBit, 2 StopBit
10 60000 -3.4E+038, +3.4E+038 -3.4E+038, +3.4E+038 -3.4E+038, +3.4E+038 -3.4E+038, +3.4E+038
07 RS-232, RS-422, RS-485 None, Terminated, Pass through 7 Bits, 8 Bits, 9 Bits
Parameter Parity StopBits Baud
Description Normal parity Normal Parity Baud rate
Choices None, Odd, Even 1 StopBit, 2 StopBit 300, 600, 800, 1200, 2400, 9600, 115000, 192000, 384000, 57600, 375000.
StationCount Modbus_Station_Cfg StationAddr PageCount TimeOut FuncCode15 FuncCode16 DataSwap MaxBools MaxReg DeviceDelay Modbus_Page_Cfg PageType PointCount Modbus_Bit_Cfg Address BitNumber RemDataType UpdateRate RawMin RawMax EngMin EngMax Modbus_Long_Cfg Modbus_Float_Cfg Address BitNumber PointDefs
Toolbox Parameter, Number of stations What is station address Toolbox Parameter, Number of Pages Time Out in msec The connected station supports Modbus command FC15 Force Mult Coils. The connected station supports Modbus command FC16 Write Mult Registers. Float Data Format, swap words, ie Most Significant first Maximum Number of Booleans per request Maximum Number of Registers per request Transmit Delay Time in msec for non Modbus compliant slaves What is the page type HC, HR, OC, CC Toolbox Parameter, Number of points Address of remote Register/Discrete Bit-Packed register bit number 1 = Not Used Data-type of remote register/discrete The rate at which inputs are updated Never means spare Scaling factor raw minimum Scaling factor raw maximum Scaling factor engineering minimum Scaling factor engineering maximum (Similar to Modbus_Bit_Cfg) Address of remote Register/Discrete Bit-Packed register bit number 0 = LSB (Similar to Modbus_Bit_Cfg) -1 or 0 1 9999 0 or 1 UNS16, PAC16, SIGN16 , 1, 2, 4 Hz -3.4E+038, +3.4E+038 -3.4E+038, +3.4E+038 -3.4E+038, +3.4E+038 -3.4E+038, +3.4E+038 10 60000 Enable, Disable Enable, Disable LswFirst, MswFirst -32768 +32767 -32768 +32767 0 60000 1 255
Pressure Transducer Port 1 and 2 Point Definitions. Electric Drive Port Point Definitions (see drive Faults in the Alarm section).
Alarms
VSCA I/O Board Diagnostic Alarms
Fault 2 3 16 30
Fault Description Flash ,memory CRCCRC failure CRCCRC failure override is active System limit checking is disabled
Possible Cause Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online) System checking was disabled by configuration
ConfigCompatCode mismatch; Firmware: A tre file has been installed that is incompatible with the firmware on [] the I/O board. Either the tre file or firmware must change. Contact the factory IOCompatCode mismatch; Firmware: [ ] A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. Message sent but no response received. Hardware or software configuration error. Message sent but bad data received. Software configuration error No communications taking place. Hardware or software configuration error
31
32 33 34 35 36 37
Port [ ] Device/Station [ ] No Response Port [ ] Device/Station [ ] Bad Data Configure problem, Port [ ] , Communications nonfunctional Electric drive, Port [ ], save command non functional Card ID failure P6 ID failure
Electric Actuator Diagnostic Alarms
Fault (Point Definition) Note L5FMV_CF L3FMV_RST L5FMV_LRC L5FMV_BOV L5FMV_BUV L30FMV_LVA L5FMV_WDT L5FMV_OVC L5FMV_POR L5FMV_ATF L5FMV_MTF L30FMV_RMS L5FMV_PCF L5FMV_RTL L5FMV_CSL L5FMV_CVL L5FMV_PF L5FMV_RF Drive critical fault Drive reset fault feedback Drive LRC fault Fault, Bus overvoltage (> 240 V) Fault, Bus undervoltage (< 90 V) Alarm, Low Volts (< 100 V) Fault, Watch Dog Timer Fault, Bridge Over-Current Fault, Power On Reset Fault, Ampl. Temperature Fault, Motor Temperature Alarm, Alarm, RMS Over-current Fault, Position Control Fault, Commun. Time Limit. Fault, Check Sum Limit. Fault, Control Volts Limit Fault, Processor Failure Fault, Resolver Limit
DSCB Simplex Serial Communication Input/Output

The Simplex Serial Communication Input/Output (DSCB) terminal board is a compact interface terminal board, designed for DIN-rail mounting. DSCB connects to theVSCA board with a 37-wire cable. VSCA provides communication interfaces with external devices, using RS-232C, RS-422, and RS-485 serial communications. DSCB is wired to the external devices, which include intelligent pressure sensors such as the smart Honeywell Pressure Transducers and Kollmorgen Electric Drives used for valve actuation. Wiring to devices uses shielded twisted pair. DSCB communication signals have onboard noise suppression. An on-board ID chip identifies the board to VSCA for system diagnostic purposes.
Note DSCB does not work with the PSCA I/O pack.
Installation
Mount the plastic holder on the DIN-rail and slide the DSCB board into place. Connect the wires for the external devices to the Euro-Block type terminal block as shown in the following figure. Four terminals are provided for the SCOM (ground) connection, which should be as short as possible. Connect DSCB to VSCA using the 37 pin JA1 connector.
Note Jumpers J1 - J6 direct SIGRET directly to SCOM or through a capacitor to SCOM. The shield must be grounded at one end or the other, but not both. If the shield is grounded at the device end, the jumpers should be set to include the capacitor in the circuit. If the shield is not grounded at the device end, the jumpers should be set to go directly to SCOM.
DSCB
DIN-rail mounted terminal board s s SCOM Cap J1 SIGRET SCOM
JA1 To/from VSCA, J6 37 wire cable, with twisted pair, group shielding
Twisted shielded pair, AWG#18, to external devices. Configurable to RS232, RS422, or RS485. Six channels, screw definitions below
s s
Six channels
SCOM
GRD
DSCB Terminal Assignments RS422 RS485 RS232 Chan 1 Chan 2 Chan 3 Chan 4 Chan 5 Chan 6 TX+ NC CTS 1 8 15 22 29 36 TXNC DTR/RTS 2 9 16 23 30 37 RX+ RXTx/RX+ Tx/RXRX NC 3 10 17 24 31 38 4 11 18 25 32 39 NC NC TX 5 12 19 26 33 40 SIGRET SIGRET SIGRET 6 13 20 27 34 41 JPx JPx JPx JP1 JP2 JP3 JP4 JP5 JP6 SCOM SCOM SCOM 7 14 21 28 35 42 43,44,45,46
Comments: The RS422/RS485 transmit and receive pairs must use a twisted pair in the VSCA to DSCB
DSCB Wiring, Cabling, and Jumper Positions
Operation
The three XDSA boards are intermediate distribution boards for the RS-422 multidrop signals. The pressure transducers plug into ports P1, P2, P3, and P4 on these boards. The following figure shows DSCB using two of the six VSCA channels, Ports 1 and 2, to interface with 12 Honeywell pressure transducers.
Mark VI control From VSCA board front, J6 DSCB
JA1 Port #1 Tx 2
1
Fuel skid XDSAG1ACC

P1 Adr= 0
Chan A, RS422 + +
Rx 3 4
1 Power 2 3 4 5 6 7 8
Press Xdr LG-1237
Outer valve GP1OA Outer valve GP2OA
Chan A P2 Adr= 1
Press Xdr LG-1237
Port #2
Chan B, RS422 + 8 Tx 9 Rx 10 11 +
9 Power 10 11 12 13 14 15 16
P3 Adr= 2 Chan B P4 Adr= 3 Stab-on nearest gnd
Press Xdr LG-1237
Outer valve GP1OB Outer valve GP2OB
Press Xdr LG-1237
XDSAG1ACC
1 Power 2 3 4 5 6 7 8
P1 Adr= 4 Chan A P2 Adr= 5
Press Xdr LG-1237
Pilot valve GP1PA Pilot valve GP2PA
Press Xdr LG-1237
43 44 45 46 SCOM Gnd
9 Power 10 11 12 13 14 15 16
Press Xdr LG-1237
Pilot valve GP1PB Pilot valve GP2PB
Press Xdr LG-1237
XDSA Jumper Settings

Termination: Tx Only, JP1, JP2: Set to "IN" if end of line; Set to "OUT" if not end of line. Address: Jumper Outer Pilot Inner JP3 JP4 JP5 JP6 0 0 0 0 1 0 1 0 0 1 0 1 Chan A Chan A Chan B Chan B
XDSAG1ACC
1 Power 2 3 4 5 6 7 8
Press Xdr LG-1237
Inner valve GP1IA Inner valve GP2IA
Press Xdr LG-1237
9 Power 10 11 12 13 14 15 16
P3 Adr=10 Chan B P4 Adr=11 Stab-on nearest gnd
Press Xdr LG-1237
Inner valve GP1IB Inner valve GP2IB
Press Xdr LG-1237
DSCB Connections to XDSA and Pressure Transducers
Specifications
Item Number of Channels Choices (jumper select on VSCA) RS-232C RS-422 RS-485 Connector for VSCA cable Size, with support plate 50 feet Baud Rates up to 57.6 kbps Full duplex Full duplex 1000 feet Baud Rates up to 375 kbps 1000 feet Baud Rates up to 375 kbps 37-pin D shell connector 8.6 cm Wide X 16.2 cm High (3.4 in x 6.37 in) Specification Six
Diagnostics
The DSCB terminal board has its own ID device, which is interrogated by VSCA. The board ID is coded into a read-only chip containing the terminal board serial number, board type, revision number, and the JA1 connector. When the chip is read by VSCA and a mismatch is encountered, a hardware incompatibility fault is created. Communication and device problems are detected by the VSCA and reported to the toolbox.
Configuration
Each of the six channels has a jumper to connect the cable shield to ground through a capacitor. These are used when the shield is grounded at the device end. The jumper positions are shown in the Installation section. All other configuration is done on the VSCA board and in the toolbox.
DPWA Transducer Power Distribution

The Transducer Power Distribution (DPWA) terminal board is a DIN-rail mounted power distribution board. It accepts input voltage of 28 V dc 5%, provided through a two-pin Mate-N-Lok connector. Connectors are provided for two independent power sources to allow the use of redundant supplies. The input can accept power from a floating isolated voltage source. The input to DPWA includes two 1 k resistors from positive and negative input power to SCOM. These center a floating power source on SCOM. Attenuated input voltage is provided for external monitoring. Output power of 12 V dc 5% is connected to external devices through a Euro- type terminal block, using screw terminals and AWG#18 twisted-pair wiring. DPWA provides three output terminal pairs with a total output rated at 0 to 1.2 A. The outputs are compatible with the XDSAG#AC interface board. Outputs are short circuit-protected and self-recovering.
Note DPWA provides excitation power to LG-1237 Honeywell pressure transducers.
Installation
Mount the DPWA assembly on a standard DIN-rail. Connect input power to connector P1. If multiple DPWA boards are used, use connector P2 as a pass-through connection point for the power to additional boards. If a redundant power input is provided, connect power to connector P3 and use connector P4 as the pass-through to additional boards. Connect the wires for the three output power circuits on screw terminal pairs 9-10, 11-12, and 13-14.
Note The DPWA terminal board includes two screw terminals, 15 and 16, for SCOM (ground) that must be connected to a good shield ground.
DPWA Power Distribution Terminal Board P28V dc P28V dc to P12Vdc, P12 V dc 1.2 Amp Isolation
P12
9 10
P12V1 P12R1 P12V2 P12R2 P12V3 P12R3 SCOM SCOM
1 P1 2 P2
P12
11 12
Return
s s
P12
13 14 15
P3
100k
16
P4
20 k
Bus centering bridge
1k
1k
100 k 100 k 20 k 20 k
1
SCOM
PSRet SCOM
SCOM
SCOM
3 4 5 6
PS28VA SCOM PS28VB SCOM
DPWA Board Block Diagram
Operation
DPWA has an on-board power converter that changes the 28 V dc to 12 V dc for the transducers. A redundant 28 V dc supply can be added if needed. The following figure shows the DPWA power distribution system feeding power to 12 LG-1237 pressure transducers.
Controller Fuel skid
Power for channel A DPWA

1 2 P1 + 12 Vdc +/-5% 1.2 Amp P12 9 28 V Return 10 to 12 V P12 Isol Return P12 Return Grd1 Grd2 P3 Return 100K 20K SCOM P28_J1 100K 20K SCOM P28_J2 SCOM 100K 20K + + + + +
XDSA
1 Power 2 3 4 5 6 7 8 Adr= 0
P1 Press Xdr LG-1237
Outer valve GP1OA
Chan A P2 Adr= 1
28 Vdc +/- 5%
Press Xdr LG-1237
Outer valve GP2OA
11 12 13 14 15 16
1 2 Redundant power supply when required
P2
1 2 3 4 5 6
9 Power 10 11 12 13 14 15 16
Press Xdr LG-1237
Outer valve GP1OB
Press Xdr LG-1237
Outer valve GP2OB
P4
XDSA
+ 1 Power 2 3 4 5 6 7 8
Press Xdr LG-1237
Pilot valve GP1PA
Press Xdr LG-1237
Pilot valve GP2PA
Power for channel B DPWA

P1 12 V dc +/-5% 1.2 Amp P12 9 28 V Return 10 to 12 V P12 11 Return 12 Isol P12 13 Return Grd1 Grd2 P3
14 15 16
+ + +
9 Power 10 11 12 13 14 15 16
Press Xdr LG-1237
Pilot valve GP1PB
Press Xdr LG-1237
Pilot valve GP2PB
P2
XDSA
+ 1 Power 2 3 4 5 6 7 8
Press Xdr LG-1237
Inner valve GP1IA
P4
Return 100K 20K SCOM P28_J1 100K 20K SCOM P28_J2 100K 20K SCOM
1 2 3 4 5 6
VDCx Retx VDCx Retx VDCx Retx +
Press Xdr LG-1237
Inner valve GP2IA
Power supply monitoring voltage inputs
9 Power 10 11 12 13 14 15 16
P3 Adr= 10 Chan B P4 Adr=11 Stab-on nearest gnd
Press Xdr LG-1237
Inner valve GP1IB
Press Xdr LG-1237
Inner valve GP2IB
DPWA Power Distribution to XDSA and Smart Pressure Transducers
Specifications
Item Number of Channels Input voltage Input current Output voltage Monitor voltages Specification Three power output terminal pairs 28 V dc 5%, provisions for redundant source Limited by protection to no more than 1.6 A steady state 12 V dc 5%, maximum total current of 1.2 A, short circuit protected, and self-recovering Attenuated by 6:1 ratio
Diagnostics
DPWA features three voltage outputs to permit monitoring of the board input power. The voltage monitor outputs are all attenuated by a 6:1 ratio to permit reading the 28 V dc using an input voltage with 5 V dc full scale input. Terminal 1 (PSRet) is the attenuated voltage present on the power input return line. Terminal 3 (PS28VA) is the attenuated voltage present on the P1 positive power input line. Terminal 5 (PS28VB) is the attenuated voltage present on the P3 positive power input line. Terminals 2, 4, and 6 provide a return SCOM path for the attenuator signals. In redundant systems, monitoring PS28VA and PS28VB permits the detection of a failed or missing redundant input. In systems with floating 28 V power, with the input centered on SCOM, the positive and return voltages should be approximately the same magnitude as a negative voltage on the return. If a ground fault is present in the input power, it may be detected by positive or return attenuated voltage approaching SCOM while the other signal doubles.
Configuration
VSVO Servo Control

VSVO Servo Control
The Servo Control (VSVO) board controls four electro-hydraulic servo valves that actuate the steam/fuel valves. These four channels are usually divided between two servo terminal boards (TSVO or DSVO). Valve position is measured with linear variable differential transformers (LVDT). The loop control algorithm is run in the VSVO. Three cables connect to VSVO on J5 plug on the front panel and the J3/J4 connectors on the VME rack. TSVO provides simplex signals through the JR1 connector, and fans out TMR signals to the JR1, JS1, and JT1 connectors. Plugs JD1 or JD2 are for external trips from the protection module.
TSVO Terminal Board
External trip
x JT1
VSVO Processor Board

x RUN FAIL STAT
LVDT inputs Pulse rate inputs LVDT excitation Servo coil outputs
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
JD1 JD2
37-pin "D" shell type connectors with latching fasteners VME bus to VCMI
JT5 JS1
Cables to VME rack T
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
JS5 JR1 JR5
Cables to VME rack S
J5
VSVO x
J3
x
Shield bar Barrier type terminal blocks can be unplugged from board for maintenance
Connectors on VME rack R Cables to VME rack R
J4
From second TSVO

Servo/LVDT Terminal Board, VSVO Processor Board, and Cabling
VSVO Servo Control 333
Installation
Operation
VSVO provides four channels consisting of bi-directional servo current outputs, LVDT position feedback, LVDT excitation, and pulse rate flows inputs. The TSVO provides excitation for, and accepts inputs from , up to six LVDT valve position inputs. There is a choice of one, two three, or four LVDTs for each servo control loop. Three inputs are available for gas turbine flow measuring applications. These signals come through TSVO and go directly to the VSVO board front at J5. Each servo output is equipped with an individual suicide relay under firmware control that shorts the VSVO output signal to signal common when de-energized, and recovers to nominal limits after a manual reset command is issued. Diagnostics monitor the output status of each servo voltage, current, and suicide relay.
334 VSVO Servo Control
Simplex Systems
VSVO circuits for a simplex system are shown in the following figures.
Capacity 6 LVDT/R inputs on each of 2 boards, and total of 2 active/passive magnetic pickups. Termination Board TSVOH1B (Input portion) JR1 LVDT 3.2k Hz, 7 V rms excitation source or LVDR
LVDT1H
<R> Control Module Controller Application Software
Servo Board VSVO J3 Digital regulator
1
SCOM
A/D
P28VR
Regulator servo
LVDT1L
A/D converter
D/A D/A converter

Servo driver P28V J3
Voltage Limit
6 Ckts.
P28V
P24V1 P24VR1
41 42 39 43( 44 45 46 40 47( 48
Current limit
Configurable Gain
Suicide Relay
Pulse rate inputs active probes 2 - 20 k Hz
P1TTL
JR5
J5
To Servo Outputs
To TSVO
PR TTL
P1H P1L
Pulse Rate
3.2KHz
Excitation
(PR only available on 1 of 2 TSVOs) Pulse rate inputs, magnetic pickups 2 - 20 k Hz
P24V2 P24VR2 P2TTL P2H P2L
CL
Connector on front of VSVO board
To second
TSVO
PR MPU
Noise suppr.
LVDT and Pulse Rate Inputs, Simplex
Each servo output channel can drive one or two-coil servos in simplex applications, or two or three-coil servos in TMR applications. The two-coil TMR applications are for 200# oil gear systems where each of two control modules drive one coil each and the third module interfaces with the servo. Servo cable lengths up to 300 meters (984 feet) are supported with a maximum two-way cable resistance of 15 ohms. Because there are many types of servo coils, a variety of bi-directional current sources are selectable by configuring jumpers. Another trip override relay, K1, is provided on each terminal board and is driven from the Protection Module. If an emergency overspeed condition is detected in the Protection Module, the K1 relay energizes and disconnects the VSVO servo output from the terminal block and applies a bias to drive the control valve closed. This is only used on simplex applications to protect against the servo amplifier failing high, and is functional only with respect to the servo coils driven from <R>.
Note The primary and emergency overspeed systems can trip the hydraulic solenoids independent of this circuit.
<R> Controller Application Software Terminal Board TSVOH1B (continued)
Servo Board VSVO A/D converter Digital
Coil current range 10,20,40,80,120 ma P28VR JD1 K1 JP1 JD2

25 31
A/D
From LVDT TSVO
Regulator servo
regulator
1 2
Trip input from module (J1)
D/A D/A converter

Servo driver
Voltage Limit
P28VR J3 JR1
120B 120 80 40 20 10
1 2
Servo coil from<R>
SR1H SRS1H
P28V
Configurable Gain
Suicide Relay
2 Ckts.
N S
26
SCOM
1k ohm
SR1L
22 ohms 89 ohms 1k ohm
J5
Pulse Rate
3.2KHz Excitation 2 Ckts.

To second TSVO
17 ER1H
N S 18
SCOM
ER1L
Connector on front of VSVO
Noise suppression
3.2KHz, 7V rms excitation source for LVDTs
Servo Coil and LVDT Outputs, Simplex (continued) LVDT Outputs, Simplex
TMR Systems
In TMR applications, the LVDT signals on TSVO fan out to three racks through JR1, JS1, and JT1. Three connectors also bring power into TSVO where the three voltages are diode high-selected and current limited to supply 24 V dc to the pulse rate active probes. VSVO circuits for a TMR system are shown in the following figures.
Note Only two pulse rate probes on one TSVO are used.
<R>
<S> <T> Controller Application Software
Terminal Board TSVOH1B (Input Portion) LVDT 3.2k Hz, 7 V rms excitation source
LVDT1H 1
Servo Board VSVO J3 A/D converter Digital
JR1
P28VR
A/D
LVDT1L
Regulator servo
regulator
2
SCOM
JS1
J3
P28V Same for <S> J3 Same for <T>
D/A D/A converter

Servo driver
Voltage Limit
6 Ckts.
P28VS
JT1
P28VT
To servo outputs on TSVO
Diode Voltage Select

P24V1 P24VR1
41 42 39 43( 44 45 46 40 47 ( 48
CL P28V
Pulse rate inputs active probes PR 2 - 20 kHz (PR only available on 1 of 2 TSVOs) Pulse rate inputs, magnetic pickups 2 - 20 kHz
P1TTL P1H P1L
JR5
Connector on front of VSVO card in <R> J5 Pulse Rate J5 in <S>
Configurable Gain
3.2KHz excitation
To TSVO
TTL
JS5
CL
P24V2 P24VR2 P2TTL
JT5
J5 in <T>
PR MPU
P2H P2L
Noise suppression
LVDT and Pulse Rate Inputs,TMR
For TMR systems, each servo channel has connections to three output coils with a range of current ratings up to 120 mA selected by jumper.
<R> <S> <T> Controller Application Software Terminal Board TSVOH1B (continued) Servo current range 10,20,40,80,120 ma P28VR P28VR J3 JR1 JD1
1 2
Servo Board VSVO A/D converter Digital servo regulator Suicide relay Servo driver
Voltage Limit
A/D
From TSVO LVDT
Regulator D/A
Trip input from not used for TMR
JP1
JD2
1 2 25 31 S1RH
120B 120 80 40 20 10
Servo coil from <R>
2 Ckts.
Configurable Gain
N S
26 S1RL
22 ohms 89 ohms 1k ohm 3.2KHz, 7V rms excitation source For LVDTs Servo coil from <S>
J5
Pulse Rate
3.2KHz
17
ER1H
excitation J3 JS1
2 Ckts S JP2
120B 120 80 40 20 10
N
18 ER1L
Connector on front of VSVO card
27
S1SH
2 Ckts.
N S
28 21
S1SL ESH
1 Ckt. N
S
22
ESL
J3
JT1
120B 120 80 40 20 10
JP3
29 S1TH
3.2KHz, 7V rms excitation source Servo coil from <T>
2 Ckts.
N S
30 23
S1TL ETH
N 1 Ckt. S
24
ETL
Noise suppression
3.2KHz, 7V rms excitation source For LVDTs
Servo Coil Outputs and LVDT Excitation, TMR
The following table defines the standard resistance of servo coils, and their associated internal resistance, selectable with the terminal board jumpers shown in the figure above. In addition to these standard servo coils, non-standard coils can be driven by using a non-standard jumper setting. For example, an 80 mA, 125 coil can be driven by using a jumper setting 120B.
Servo Coil Ratings
Coil Type 1 2 3 4 5 6 7
Nominal Current 10 mA 20 mA 40 mA 40 mA 80 mA 120 mA (A) 120 mA (B)
Coil Resistance Internal (Ohms) Resistance (Ohms) Application 1,000 125 62 89 22 40 75 180 442 195 195 115 46 10 Simplex and TMR Simplex Simplex TMR TMR Simplex TMR
Note The total resistance is equivalent to the standard setting.

The control valve position is sensed with either a four-wire LVDT or a three-wire linear variable differential reluctance (LVDR). Redundancy implementations for the feedback devices is determined by the application software to allow the maximum flexibility. LVDT/Rs can be mounted up to 300 meters (984 feet) from the turbine control with a maximum two-way cable resistance of 15 . Each terminal has two LVDT/R excitation sources for simplex applications and four for TMR applications. Excitation voltage is 7 V rms and the frequency is 3.2 kHz with a total harmonic distortion of less than 1% when loaded.
Note The excitation source is isolated from signal common (floating) and is capable of operation at common mode voltages up to 35 V dc, or 35 V rms, 50/60 Hz.
A typical LVDT/R has an output of 0.7 V rms at the zero stroke position of the valve stem, and an output of 3.5 V rms at the designed maximum stoke position (these are reversed in some applications). The LVDT/R input is converted to dc and conditioned with a low pass filter. Diagnostics perform a high/low (hardware) limit check on the input signal and a high/low system (software) limit check. Two pulse rate inputs connect to a single J5 connector on the front of VSVO. This dedicated connection minimizes noise sensitivity on the pulse rate inputs. Both passive magnetic pickups and active pulse rate transducers (TTL type) are supported by the inputs and are interchangeable without configuration. Pulse rate inputs can be located up to 300 meters (984) from the turbine control cabinet, assuming a shieldedpair cable is used with typically 70 nF single ended or 35 nF differential capacitance and 15 resistance.
A frequency range of 2 to 30 kHz can be monitored at a normal sampling rate of either 10 or 20 ms. Magnetic pickups typically have an output resistance of 200 and an inductance of 85 mH excluding cable characteristics. The transducer is a high impedance source, generating energy levels insufficient to cause a spark.
Digital Servo Regulators

The Digital Servo Regulators n = 1-4 in the following figure divides the servo regulators into the software and hardware portions of the control loop. The user can choose the LVDT and pulse rate inputs as the servo feedback. The LVDT input is a 3.2 kHz sinusoidal signal with a magnitude proportional to the position of the electro-mechanical valve that is controlled by the servo output. The pulse rate input is TTL-type signal or a periodic signal that triggers a comparator input. The comparator output transitions are counted by an FPGA on VSVO and converted to a flow rate. For LVDT feedbacks, LVDT1 12 are scaled and conditioned in the Position Feedback function of the Digital regulator and can also be independently conditioned by a separated Monitoring function. The asterisk after a block name indicates a more detailed drawing exists to better define the block function. All signal space I/O for the VSVO is identified as either si for system input (the controller reads the signal space variable from the servo) or so for system output (the controller writes the signal space variable to the servo card). Italic text is defined as a configuration parameter that can be changed in the toolbox to redefine the operation of the VSVO. Internal variables, for example Variable_Name, are not visible to the user through the toolbox.
Digital Servo Regulators n = 1 - 4

PRType PRScale MonitorType CalibEnabn (so)
Regn_Error (si)
SystemLimits RegNumber RegType Dither_Freq DitherAmpl SuicideForcen (so) MasterReset (so) Servo Suicide Control* Servo Open/Short Monitor* mA_cmdn
-100%
EnableCurSui EnablFdbkSui
I/O Configuration
(VSVO Servo firmware) RegnSuicide (si) Rn_SuicideNV (si) L3DIAG_VSVO (si)
Regn_Ref (so) +
100%
Digital Reg. (RegType)*
G SuicideReset (so)
Dither Control Calibration Function
+ +
Regn_Fdbk (si) FlowRate1 (si) FlowRate2 (si) IMFBKn

50% Duty Cyl
Pulse Rate Calc. Position Fdbk Function SuicDrv
K_comp function (I range)
% ----cnt
ServoOutnNV (si) ServoOutputn (si)
Monitor*
volts / cnt
ServoOutnNV (si)
-1
Monx (si) x=1- 12
ServoOutIn (si) Execution Rate = 200 Hz (VSVO Hardware) FPGA

Registe r

Pulse Rate Support Servo Current Regulator n
Logic I/O SUIMON SUICDRVH K1
PulsRate1H/L
PulsRate2H/L
LVDT1-12 Servo n D/A Controller D/A

DACIREF +/- 4.0V FS Op Amp
P28 10 BUF ohm
ACOM T
o
SERVOxH
AE1H/L BE1H/L AE2H/L BE2H/L
LV1H/L cntrl A/ D cntrl A/D
ACOM IMFBK Servo1 Gain Reg +/- 2.0V @full scale Diff Amp
f r o m
LV2H/L
M U X
LV3H/L
T S V SERVOxL O /4
Programmable Gain ACOM
LV4H/L M U X
A/D Controller & Register Interface to PSVO Microprocessor
LV5H/L
T S V O
LV6H/L
Logic I/O
LV7H/L
LV8H/L
Param_Name - Servo config parameter (Toolbox view) Signal_Name - signal from A/D in (no Toolbox view) Variable_Name - internal vars to Servo (no Toolbox view)
LV9H/L
LV10H/L
- indicates a detailed drawing with title per block name. Input_Name - Input to controller from Servo (si) (Toolbox view) Output_Name - Output from controller to Servo (so) (Toolbox view)
LV11H/L
LV12H/L
Servo Suicide Control

The Servo Suicide Control function compares the absolute value of the filtered servo current error against the configuration parameter value, Sui_Margin. This function determines if the hardware servo current regulator has lost control of the current. If the current feedback is not following the current command, a diagnostic is generated and the servo current output is suicided (disabled and put in a safe state).
Servo Suicide Control

EnablCurSuic(cfg) 1 0
LowPass Filter Tc = .5 sec ABS S Latch R No Time Delay > Sui_Margin (cfg) Y Time Delay
Master_Reset (so) Reg_Type(cfg) = 4_LV_LM OR
SuicideForce (so)
Suicide_Reset (so)
+
Master_Reset (so) Master_Reset (so) 1
1) Clear Servo I Diag. 2) Servo State = OK Y <= Sui_Margin (cfg)
mA_cmdx where x = 1- 4 Suicide_Reset (so) Servo State = Failed 1

1) Set Servo I Diag. 2) Servo State = Failed N
IMFBx where x = 1- 4 Suicide_Reset (so) Cur_Sui_En(cfg) EnablCurSuic(cfg)
suicide
1) Servo State = OK

1) Set Servo Current Range 2) FPGA out = no suicide
Limit_Check_Servo_Output_Current
Suicide_Reset (so) Master_Reset (so) OR
3) Servo State = OK 1) Set Servo Current Range = 120 mA 4) Servo Reg Health = OK 2) FPGA out = suicide
CalibEnabn n=1- 4 (so) NOT
3) Servo State = Failed 4) Servo Reg Health = Not OK 1) Set Servo Current Range 2) FPGA out = no suicide 3) Servo State = OK 4) Clear I/O Diagnostic 5) Servo Reg Health = OK 1) Set Servo Current Rng = 120 mA 2) FPGA out = suicide 3) Servo State = Failed 4) Set I/O Offline Diagnostic
Param_Name(cfg) - Servo config parameter (Toolbox view) Signal_Name - signal from A/D in (no Toolbox view) Variable_Name - internal vars to Servo (no Toolbox view)
- indicates a detailed drawing with title per block name. Input_Name - Input to controller from Servo (si) (Toolbox view)
Output_Name - Output from controller to Servo (so) (Toolbox view)
DPM_State_Online (Servo is OnLine)
5) Servo Reg Health = OK
Open/Short Detect Function

The servo output open circuit detection function checks for open or broken wires between the terminal screws of the terminal board and the servo coil. If the servo driver voltage is high and no current is flowing, the diagnostic alarm, Msg_Servo_Open, is issued.
Diagnostic Alarm (Msg_Servo_Short) Diag = True
|ServoOutVn| <= |ServoOutnNV * ohms * delta_mA_pct + 0.2|
Servo State /= Failed
Diagnostic Alarm (Msg_Servo_Short) Diag = False
Presently, disabled in PSVO

Diagnostic Alarm (Msg_Servo_Open) Diag = True
|ServoOutVn| > 5 V
ServoOutnNV < 10 %
Diagnostic Alarm (Msg_Servo_Open) Diag = False
Open_Short_Detect is called by the Servo routine every 5ms.
Open Short Detect Function
1 PulseRate /2 PulseRateMax
The Digital Servo Regulator is configured as a flow-rate regulator. A pulse signal with a frequency proportional to the flow-rate of the liquid fuel is the feedback for the 1 PulseRate version of the flow-rate regulator. With the dual input, the larger pulse rate frequency is selected as the feedback for the flow rate regulator. System Limit functions monitor each pulse rate input and are enabled through the configuration parameter, SysLimxEnabl. It can latch the signal space limit flags SysLimxPR1 and/or SysLimxPR2.
Digital Servo Regulator

PR_Scale (EU * sec / pulse) Reg_Gain RegNullBias RegType PRateInput1 SysLim2Type SysLim2Enabl SysLimit2 SysLim2Latch SysLim1Enabl SysLim1Type SysLimit1 SysLim1Latch
RegType = 1_PulseRate I/O Configuration
Sys2 Lmt En >= <=

0
Lmt Value
SysLim2PR1 (si) Regn_Ref n=1- 4(so)
Regn_error n=1- 4 (si)
input Latch Option

Sys1 Lmt En >= <=
0
Lmt Value input Latch Option
*
+ SysLim1PR1 (si) Regn_fdbk (si) n=1- 4
+ + + Servo_mA_ref(%)
0 fs1 = (# pulses/sec) / (# pulses/entry) Pulse Rate 1 Calc. fs2 = 100hz FlowRate1
M U X
Regn_NullCor n=1- 4 (so)
fs1
# of Entries to Use Flow Spd LM HiSpd
# of Pulses / List Entry Flow Spd LM HiSpd 1 4 3 2 Hysteresis 1 1 1 1 4 4 2 1 4 6 2 1 2 2 1 1
# of Pulses List PLE0 PLE1 PLE2 PLE3 Eng. Units . . .

PLE127
Gear5 Gear4
24
24
24
32
12 6 3 2
12 8 8 8
16 8 4 2
from FPGA PR1 Pulse Ctr PLE(x) - PLE(x - # of

entries to use) pulses --------------------------------------tic TLE(x) - TLE(x - # of entries to use)
Gear3 4 Gear2 2 Gear1 1 Speed (rpm) pulses / sec

Flow (pulses/sec) Spd (pulses/sec) LM (pulses/sec) HSpd(pulses/sec) 362 724 724 724 724 1448 1448 1448 1448 2896 2600 2896 2896 5793 5400 5793
# of Tics List TLE0 TLE1 TLE2 TLE3 6.25 e +06 tics -----sec
PR_Scale PLE(x) - PLE(x - 24) TLE(x) - TLE(x - 24) PLE(x) - PLE(x - 12) TLE(x) - TLE(x - 12) (TLE(x) - TLE(x - 24)) / 2 pulses/sec/sec
from FPGA Timer . . . TLE12 7
Accel1 (si)
PR_Scale PR_Type I/O Configuration

RegType = 2_PlsRateMAX Reg_Gain RegNullBias RegType I/O Configuration PRateInput2 PRateInput1
Sys2 Lmt En >= <=
0
PR_Scale (EU * sec / pulses)

Sys2 Lmt En >= <=
0
SysLim2Enabl SysLim2Type SysLimit2 SysLim2Latch SysLim1Enabl SysLim1Type SysLimit1 SysLim1Latch
Lmt Value
Lmt Value
SysLim2PR1 (si) Regn_error n=1- 4 (si)
input Latch Option Latch Option
SysLim2PR2 (si)
input
Param_Name - Servo config parameter(Toolbox view) Signal_Name - signal from A/D in (no Toolbox view) Variable_Name - internal variables(no Toolbox view)
Accel2 (si)
Sys1 Lmt En >= <=
0
- IDs a detailed drawing with title per block name. Input_Name - Input to controller from Servo (si) (Toolbox view) Output_Name - Output from controller to Servo (so) (Toolbox view)
from FPGA PR2 Pulse Ctr

Sys1 Lmt En >= <=
0
Regn_Ref n=1- 4(so)
Pulse Rate 2 Calc.

Lmt Value input Latch Option PR2 Latch Option Lmt Value input
SysLim1PR2 (si) + 0 FlowRate1 Maximum Select Regn_fdbk (si) n=1- 4 -
SysLim1PR1 (si)
+ + + Servo_mA_ref(%)
from FPGA Timer M U X FlowRate2

PR1
M U X

Pulse Rate 1 Calc. fs2 = 100hz
PR1
fs1
# of Entries to Use Flow Spd LM HiSpd 1 4 3 2
fs1 = (# pulses/sec) / (# pulses/entry) PR_Scale
# of Pulses / List Entry Flow Spd LM HiSpd
Gear5
Hysteresis 4 2
Pulse Count List PLE0 PLE1 PLE2 PLE3

1 1 1 1 4 4 2 1 6 2 1 2 1 1
24
24
24
32
Gear4
12 6 3 2
12 8 8 8
16 8 4 2
. . . PLE(x) - PLE(x - # of
entries to use) pulses -------------------------------------tic TLE(x) - TLE(x - # of entries to use)
from FPGA PR1 Pulse Ctr pulses / sec
PLE127
Gear3 4 Gear2 2 Gear1 1 Speed (rpm)

Flow (pulses/sec) Spd (pulses/sec) LM (pulses/sec) HSpd(pulses/sec) 362 724 724 724 724 1448 1448 1448 1448 2896 2600 2896 2896 5793 5400 5793
# of Tics List TLE0 TLE1 TLE2 TLE3 6.25 e +06 tics -----sec
PR_Scale PLE(x) - PLE(x - 24) TLE(x) - TLE(x - 24) PLE(x) - PLE(x - 12) TLE(x) - TLE(x - 12) (TLE(x) - TLE(x - 24)) / 2 pulses/sec/sec
from FPGA Timer
. . . TLE12 7
Accel1 (si)
PR_Scale PR_Type I/O Configuration
1 LVposition, 2 LVposMIN, 2LVposMAX, 3LVposMID

The following LVDT feedback configurations are provided for the servo value position loop: 1_LVposition one LVDT signal is used as the position feedback. 2_LVposMIN the minimum of two LVDT signals is selected as the position feedback. 2_LVposMAX the maximum of two LVDT signals is selected as the position feedback. 3_LVposMID the median of three LVDT signals is selected as position feedback.
The LVDT feedback signals are bounded and scaled using the Calibration function. The Calibration function uses the following configuration parameters: position at the minimum end stop in engineering units (EU), MinPOSvalue, and the position at the maximum end stop in EU, MaxPOSvalue. In the calibration mode the LVDT sensors are forced into the minimum and maximum positions. The feedback voltages, MnLVDTx_Vrms and MxLVDTx_Vrm,s are recorded for each of the LVDT feedbacks used. From these values, the internal constants Reg_Sensor_Hdwr_Hi, Reg_Sensor_Hdwr_Lo, Reg_Sensor_Offset, Reg_Sensor_Gain, and Reg_Sensor_End_Stop_Min are calculated. These internal constants are used by the Regulator Calculation Position function. The Regulator Calculation Position function performs an input boundary check that makes sure the input signal is between the values, Reg_Sensor_Hdwr_Hi and Reg_Sensor_Hdwr_Lo. If the feedback input is out of range a diagnostic alarm is generated. The scaling from volts_rms to position feedback in EU is calculated next. A limit check is then performed on the selected feedback.

RegType = 1_LVposition Reg_Gain RegType RegNullBias
I/O Configuration
LVDT1input TMR_DiffLimt
Regn_Ref n=1- 4 (so) Regn_error (si) n=1- 4 +
CalibEnabn n=1- 4 (so)
X
Reg Calc. Position* Position(%) Regn_fdbk (si) n=1- 4 Limit Check*
+ +
Servo_mA_ref(%)

Regn_NullCor n=1- 4 (so) Reg_Sensor_Hdwr_Hi Reg_Sensor_Hdwr_Lo Reg_Sensor_Offset Reg_Sensor_Gain Reg_Sensor_End_Stop_Min CalibEnabn (so) n=1- 4 RegCalMode (si) Calibrate Function* MnLVDT1_Vrms(cfg), MxLVDT1_Vrms(cfg) MaxPosValue MinPosValue LVDT_Margin
LVDT1 LVDT2 LVDT3 LVDT4 LVDT5 LVDT6 LVDT7 LVDT8 LVDT9 LVDT10 LVDT11 LVDT12
M U X
- indicates a detailed drawing with title per block name. Input_Name - Input to controller from Servo (Toolbox (si) view)
I/O Configuration
Digital Servo Regulator RegType = 2_LVposMIN

I/O Configuration Reg_Gain RegType RegNullBias
LVDT1input
LVDT2input
TMR_DiffLimt
Status_B Reg Calc. Position* Regn_Ref n=1- 4 (so) PositionA(%)

StatA A B StatB
Regn_error (si) n=1- 4 Status_A CalibEnabn n=1- 4 (so)

+ +
M U X
X
-
+ +
Servo_mA_ref(%)
LVDT1 PositionB(%) Reg Calc. Position*

MIN M
M U X Limit Check* Regn_fdbk (si) n=1- 4
LVDT12 Minimum Select
Reg_Sensor_Hdwr_Hi Reg_Sensor_Hdwr_Lo Reg_Sensor_Offset Reg_Sensor_Gain Reg_Sensor_End_Stop_Min
Calibrate Function*
MnLVDT1_Vrms(cfg), MxLVDT1_Vrms(cfg) MnLVDT2_Vrms(cfg), MxLVDT2_Vrms(cfg) RegCalMode (si) CalibEnabn (so) n=1- 4
MaxPosValue MinPosValue
LVDT_Margin I/O Configuration
Digital Servo Regulator RegType = 2_LVposMAX

I/O Configuration Reg_Gain RegType RegNullBias
LVDT1input
LVDT2input
TMR_DiffLimt
Status_B Reg Calc. Position* PositionA(%)

StatA A StatB
Status_A Regn_Ref n=1- 4 (so) + Regn_error n=1- 4 (si) + CalibEnabn n=1- 4 (so)
B
M U X
X
-
+ +
Servo_mA_ref(%)
LVDT1 PositionB(%) Reg Calc. Position*

MAX M
M U X Limit Check* Regn_fdbk (si) n=1- 4 Maximum Select

Reg_Sensor_Hdwr_Hi Reg_Sensor_Hdwr_Lo Reg_Sensor_Offset Reg_Sensor_Gain Reg_Sensor_End_Stop_Min CalibEnabn (so) n=1- 4 Calibrate Function* MnLVDT1_Vrms(cfg), MxLVDT1_Vrms(cfg) MnLVDT2_Vrms(cfg), MxLVDT2_Vrms(cfg) MaxPosValue MinPosValue LVDT_Margin
LVDT12
RegCalMode (si)
I/O Configuration

RegType = 3_LVposMID RegNullBias TMR_DiffLimt RegType Reg_Gain
LVDT1input
I/O Configuration
LVDT2input
LVDT3input

Reg Calc. Position* Regn_Ref n=1- 4 (so) Regn_error (si) n=1- 4 + CalibEnabn n=1- 4 (so) PositionA(%) +
M U X
X
Reg Calc. Position* PositionB(%) Regn_fdbk (si) n=1- 4 Median Select Limit Check* +
Servo_mA_ref(%)
LVDT1
M U X
LVDT12 PositionC(%)
LVDT1 Reg Calc. Position* Calibrate Function*
M U X Reg_Sensor_Hdwr_Hi Reg_Sensor_Hdwr_Lo Reg_Sensor_Offset Reg_Sensor_Gain Reg_Sensor_End_Stop_Min
MnLVDT1_Vrms(cfg), MxLVDT1_Vrms(cfg) MnLVDT2_Vrms(cfg), MxLVDT2_Vrms(cfg) MnLVDT3_Vrms(cfg), MxLVDT3_Vrms(cfg) RegCalMode (si) CalibEnabn (so) n=1- 4
LVDT12
MaxPosValue MinPosValue
LVDT_Margin I/O Configuration
Reg_Calc_Position
Reg_Sensor_Hdwr_Lo[x] <= LVDT[x].volt_rms <= Reg_Sensor_hdwr_Hi[x] Reg_Sensor_Offset[x]
Reg_Sensor_End_Stop_Min[x]
Is a LVDT selected? + + Reg_Sensor _Hdwr_Hi[x]
Reg_Sensor_Fail_Ctr < Failed_2
Reg_Sensor_Gain[x] +
LVDTx where x = 1 - 12
Reg_Sensor[x].Pos (%)
X
1.1
1) Reg_Sensor.state = OK 2) Reg_Sensor_Fail_Ctr = 0 3) Clear Diagnostic Alarm
Reg_Sensor[x].Pos(%) is used for RegTypes: 1_LVposition 2_LVposMIN 2_LVposMAX 3_LVposMID

1) Reg_Sensor.state = Fail 2) Set Diagnostic Alarm 1) Increment Reg_Sensor_Fail_Ctr 2) Don't update Reg_Sensor_Pos
Reg_Sensor[x].volts_rms Reg_Sensor[x].volts_rms is used for RegTypes: 4_LVLM
Reg_Sensor_Hdwr_Lo[x] = MnLVDT_Vrms(cfg) - (MxLVDT_Vrms(cfg) - MnLVDT_Vrms(cfg)) * LVDT_Margin(cfg) / 100 before calibration.
Reg_Sensor_Hdwr_Hi[x] = MxLVDT_Vrms(cfg) + (MxLVDT_Vrms(cfg) - MnLVDT_Vrms(cfg)) * LVDT_Margin(cfg) / 100 before calibration.
Limit Check Function

Fdbk_lo_limit < Fdbk_lo_limit < Fdbk_hi_limit Regn_fdbk (si) < Fdbk_hi_limit RegType(cfg) /= 4LV_LM GoodFdbk = True
Fdbk_hi_limit < Regn_fdbk (si)
< Fdbk_lo_limit
Regn_PosAFlt =False (si)
Regn_PosBFlt =False (si)
GoodFdbk = True
Master_Reset (so) 1) Clear Diag. Alarm "Msg Sel Pos" 2) Regn_fdbk health bit "OK" 3) Fbk_Fail_ctr = 0 Suicide_Reset (so)
Fbk_Fail_Ctr < Threshold
Increment Fbk_Fail_ctr
1) Regn_fdbk health bit "Not OK" 2) Fdbk_state = Failed
EnableFdbkSuic = True (so)
1) Set Diag. Alarm "Msg Sel Pos"
Fdbk_lo_limit = MinPOSvalue(cfg) - Fdbk_suicide_margin Fdbk_hi_limit = MaxPOSvalue(cfg) + Fdbk_suicide_margin

- indicates a detailed drawing with title per block name. Input_Name - Input to controller from Servo (si) (Toolbox view) Output_Name - Output from controller to Servo (so) (Toolbox view)
4 LV_LM
The 4_LV_LM Digital Servo regulator uses four LVDT inputs to calculate the single position feedback required for the servo position loop. The Regulator Calculation Position performs the boundary check for the LVDT input signals. The scaling from volts_rms to position in EU is not calculated, but the volts_rms value for each of the LVDT feedbacks is calculated. The ratio of (A B) / (A + B) is performed on the LVDT input pairs and scaling is calculated using the input from the Calibration function. The internal variables, Reg_2LV[A].pos, PosA and Reg_2LV[B].pos, PosB are checked against the configuration parameter limits, MinPOSvalue and MaxPOSvalue in the Position A & B Diagnostic function. Results from PosA, PosB, and the diagnostic Booleans feed the Position Feedback Selection function. Refer to the Position Feedback Selection block diagram to understand the details of the function. Other differences in the LM servo regulator are the following: Gain Modifier function Lead/Lag filter on the position error Configurable servo position error output clamp

RegType = 4_LV_LM CurSlope2 CurBreak CurSlope1 Reg_Gain CurClpNg RegNullBias CurClpPs LagTau LeadTau RegType MaxPosValue TMR_DiffLimt MinPosValue LVDT1input LVDT2input LVDT3input LVDT4input Reg_Sensor_Hdwr_Hi[x] Reg_Sensor_Hdwr_Lo[x] Reg_2LV[0].pos.gain CalibEnabn n=1- 4 (so) MiscFdbknA n=1- 4 (si) Regn_Ref n=1- 4 (so) Reg_2LV[0].pos.offset Reg Calc. Position*
(refer to details)
I/O Configuration
LVDT1 Reg_Sensor[B]. volts_rms A + B /= 0 +

A-B -------A +B
M U X
LVDT12
X
Reg_2LV[A].pos + Regn_error (si) n=1- 4
LVDT1 0 Reg Calc. Position* Regn_fdbk (si) n=1- 4 Limit Check* Gain Modifier Reg_Sensor[B].volts_rms PosA Diag.* Reg_2LV[A]. pos.failed PosDiffEnabn n=1- 4 (si) Reg_2LV[B]. pos.failed Reg_2LV[0].sum_failed Reg_2LV[0].sum_lim_hi Reg_2LV[0].sum_lim_lo Reg_2LV[1].sum_lim_hi Reg_2LV[1].sum_lim_lo Reg_2LV[1].sum_failed PosB Diag.* Reg_Sensor[C].volts_rms 0 Reg_2LV[B].pos Pos. Fdbk Sel Func* Regn_PosDif1(si) n=1- 4 Regn_PosDif2(si) n=1- 4 Sum Check*
+ +
1 + s * LeadTau 1 + s * LagTau Lead/Lag Filter Regn_NullCor (si) n=1- 4 Clamp NOT USED
M U X
Regn_ Pos AFlt n=1- 4 (si)
Servo_ mA_ ref%)
LVDT12
Regn_GainMod (si) n=1- 4 Reg_2LV[0].sum_lim_hi, Reg_2LV[0].sum_lim_lo Reg_2LV[1].sum_lim_hi, Reg_2LV[1].sum_lim_lo Reg_2LV[0].pos.failed_lim Reg_2LV[0].pos.offset Reg_2LV[0].pos.gain Reg_2LV[1].pos.failed_lim Reg_2LV[1].pos.offset Calibrate Function* Reg_2LV[1].pos.gain Reg_Sensor_Hdwr_Lo[x], Reg_Sensor_Hdwr_Hi[x] Reg_Sensor_Gain[x], Reg_Sensor_Offset[x] MnLVDT1_Vrms(cfg), MxLVDT1_Vrms(cfg) MnLVDT2_Vrms(cfg), MxLVDT2_Vrms(cfg)
LVDT1 Reg Calc. Position* Regn_ Pos BFlt n=1- 4 (si) + -
Sum Check*
M U X
LVDT12 C-D -------C+D
LVDT1 Reg Calc. Position

(refer to details)
M U X Reg_Sensor[D].volts_rms Reg_2LV[1].pos.gain Reg_Sensor_Hdwr_Lo[x] Reg_Sensor_Hdwr_Hi[x]
C + D /= 0 Reg_2LV[1].pos.offset
LVDT12
MiscFdbknB n=1- 4 (si)
MnLVDT3_Vrms(cfg), MxLVDT3_Vrms(cfg) MnLVDT4_Vrms(cfg), MxLVDT4_Vrms(cfg) RegCalMode (si)
MinPosValue MaxPosValue
LVDT_Margin LVDTVsumMarg I/O Configuration
PosSelect PosDefltEnab SelectMinMax DefltValue
PosDiffCmp1 PosDiffTime1 PosDiffCmp2 PosDiffTime2
CalibEnabn n=1- 4 (so)
Position A & B Diagnostic Function

PosA Diag Function
MinPosValue(cfg) <= Reg_2LV[A].pos <= MaxPosValue(cfg) LATCH 1 S R 0 If Reg_2LV[A].pos.failed_limit = 1 for MiscFdbk1A (si) then MiscFdbk1A (si) Health bit = OK else MiscFdbk1A Reg_2LV[A].pos.failed_limit (si) Health bit = Not OK If Reg_2LV[A].pos.failed_limit = 1 for MiscFdbk2A (si) then MiscFdbk2A (si) Health bit = OK else MiscFdbk2A (si) Health bit = Not OK
Master_Reset (so)
OR Reg_2LV[0].sum_failed
Reg_2LV[A].pos.failed
PosB Diag Function

Reg_2LV[1].sum_failed OR Reg_2LV[B].pos.failed
MinPosValue(cfg) <= Reg_2LV[B].pos <= MaxPosValue(cfg) If Reg_2LV[A].pos.failed_limit = 1 for MiscFdbk1B (si) then MiscFdbk1B (si) Health bit = OK else MiscFdbk1B (si) Health bit = Not OK Reg_2LV[B].pos.failed_limit R If Reg_2LV[A].pos.failed_limit = 1 forMiscFdbk2B (si) then MiscFdbk2B (si) Health bit = OK else MiscFdbk2B (si) Health bit = Not OK
1 LATCH S 0
- indicates a detailed drawing with title per block name. Input_Name - Input to controller from Servo (Toolbox (si) view) Output_Name - Output from controller to Servo (so) (Toolbox view)
Position Feedback Selection Function
| Reg_2LV[A].pos - Reg_2LV[B].pos | > | Reg_2LV[A].pos - Reg_2LV[B].pos | > PosSelect(cfg) = 1 PosDiffCmp2 (cfg) for PosDiffTime2 (cfg) PosDiffCmp1 (cfg) for PosDiffTime1 (cfg) Reg_2LV[A] Reg_2LV[B] PosDefltEnab(cfg) PosSelect(cfg) = 2 PosSelect(cfg) = 0 .pos.failed .pos.failed PosDiffEnab Reg_2LV[A] SelectMinMax(cfg) (so) .pos MIN Select

MAX Select (A+B)/2 Set False Set False After Time Delay1, set True PosDiffTime1(cfg) After Time Delay2, set True PosDiffTime2(cfg)
Reg_2LV[B] .pos
DefltValue (cfg) Regn_fdbk (si) where n=1 or 2 Regn_PosDif1(si)
Param_Name(cfg) - Servo config parameter (Toolbox view) Variable_Name - internal vars to Servo (no Toolbox view) Input_Name - Input to controller from Servo (Toolbox (si) view)
Regn_PosDif2(si)
Sum Check Calc
Reg_Sensor[A].volts_rms
+ +
>= Reg_2LV[0]. sum_lim_hi

N
OR
Reg_2LV[0].sum_failed = T rue
Reg_Sensor[B].volts_rms
<= Reg_2LV[0]. sum_lim_lo

N
AND
Reg_2LV[0].sum_failed = F alse
Reg_Sensor[C].volts_rms
+ +
>= Reg_2LV[1]. sum_lim_hi

N
OR
Reg_2LV[1].sum_failed = T rue
Reg_Sensor[D].volts_rms
<= Reg_2LV[1]. sum_lim_lo

N
AND
Reg_2LV[1].sum_failed = F alse
Param_Name(cfg) - Servo config parameter (Toolbox view) Variable_Name - internal vars to Servo (no Toolbox view)
Monitors - 1 LVposition, 2 LVposMIN, 2LVposMAX, 3LVposMID

The following Monitor configurations are available: 1_LVposition one LVDT signal is used as the position feedback. 2_LVposMIN the minimum of two LVDT signals is selected as the position feedback. 2_LVposMAX the maximum of two LVDT signals is selected as the position feedback. 3_LVposMID the median of three LVDT signals is selected as the position feedback.
Monitor
MonitorType = 1_LVposition
MonitorType LVDT_Margin TMR_DiffLimt MinPosValue MaxPosValue MnLVDT1_Vrms MxLVDT1_Vrms

Gain1 + +
Monx x=1- 12 (si)
LVDT1input
I/O Configuration
LVDT1
Offset1 = MinPosValue ((MaxPosValue - MinPosValue) / (MxLVDT1_Vrms - MnLVDT1_Vrms)) * MnLVDT1_Vrms
LVDT2
LVDT3 Offset1
Gain1 = (MaxPosValue - MinPosValue) / (MxLVDT1_Vrms - MnLVDT1_Vrms)
LVDT4
LVDT5
LVDT6
LVDT7 If LVDTx > MxLVDT1_Vrms + LVDT_Margin * (MxLVDT1_Vrms - MnLVDT1_Vrms) Monx unhealthy then 1) Assign
x=1- 12 (si)
M U X
LVDT8
LVDT9
LVDT10
LVDT11
LVDT12
2) If Out_of_Limits 3 passes then Set Diagnostic Alarm else if LVDTx < -MnLVDT1_Vrms + LVDT_Margin * (MxLVDT1_Vrms - MnLVDT1_Vrms) then 1) Assign Monx unhealthy
x=1- 12 (si)
2) If Out_of_Limits 3 passes then Set Diagnostic Alarm else 1) Assign Monx healthy 2) Reset Out_of_limits counter. Note: x = 1 - 12
Param_Name - Servo config parameter (Toolbox view) Signal_Name - signal from A/D in (no Toolbox view) Variable_Name - internal vars to Servo (no Toolbox view) Input_Name - Input to controller from Servo (Toolbox (si) view)
Monitor
MonitorType MnLVDT2_Vrms MxLVDT2_Vrms TMR_DiffLimt
MonitorType = 2_LVposMIN or 2_LVposMAX

I/O Configuration LVDT_Margin
LVDT1input
LVDT2input
MinPosValue MaxPosValue MnLVDT1_Vrms MxLVDT1_Vrms
LVDT1
If LVDTx > MxLVDTz_Vrms + LVDT_Margin * (MxLVDTz_Vrms - MnLVDTz_Vrms) Monx unhealthy then 1) Assign
x=1- 12 (si)
LVDT2
LVDT3 Gain1 + + Offset1
Gain1 = (MaxPosValue - MinPosValue) / (MxLVDT1_Vrms - MnLVDT1_Vrms)
LVDT4
2) If Out_of_Limits 3 passes then Set Diagnostic Alarm else if LVDTx < -MnLVDTz_Vrms + LVDT_Margin * (MxLVDTz_Vrms - MnLVDTz_Vrms) then 1) Assign Monx unhealthy
x=1- 12 (si)
LVDT5
LVDT6
LVDT7
M U X
2) If Out_of_Limits 3 passes then Set Diagnostic Alarm else 1) Assign Monx healthy 2) Reset Out_of_limits counter. Note: z = 1 - 2 and x = 1 - 12
LVDT8
LVDT9
LVDT10
Offset2 = MinPosValue ((MaxPosValue - MinPosValue) / (MxLVDT2_Vrms - MnLVDT2_Vrms)) * MnLVDT2_Vrms Gain2 = (MaxPosValue - MinPosValue) / (MxLVDT2_Vrms - MnLVDT2_Vrms) Gain2 + Offset2
LVDT11
LVDT12
LVDT1
M U X
Maximum Select if MonitorType = 2_LVposMAX or Minimum Select if MonitorType = 2_LVposMIN
Monx x=1- 12 (si)
LVDT12
Monitor
MonitorType = 3_LVposMID
MonitorType MnLVDT2_Vrms MxLVDT2_Vrms MnLVDT3_Vrms MxLVDT3_Vrms TMR_DiffLimt LVDT1input LVDT2input LVDT3input
I/O Configuration LVDT_Margin
MinPosValue MaxPosValue MnLVDT1_Vrms MxLVDT1_Vrms

Offset1 = MinPosValue ((MaxPosValue - MinPosValue) / (MxLVDT1_Vrms - MnLVDT1_Vrms)) * MnLVDT1_Vrms Gain1 = (MaxPosValue - MinPosValue) / (MxLVDT1_Vrms - MnLVDT1_Vrms) Gain1 + + Offset1
x=1- 12 (si) x=1- 12 (si)
If LVDTx > MxLVDTz_Vrms + LVDT_Margin * (MxLVDTz_Vrms - MnLVDTz_Vrms) Monx unhealthy then 1) Assign
LVDT1
LVDT2
LVDT3
LVDT4
2) If Out_of_Limits 3 passes then Set Diagnostic Alarm else if LVDTx < -MnLVDTz_Vrms + LVDT_Margin * (MxLVDTz_Vrms - MnLVDTz_Vrms) then 1) Assign Monx unhealthy
LVDT5
LVDT6
LVDT7
M U X
2) If Out_of_Limits 3 passes then Set Diagnostic Alarm else 1) Assign Monx healthy 2) Reset Out_of_limits counter. Note: z = 1 - 3 and x = 1 - 12
LVDT8
LVDT9
LVDT10 Gain2 = (MaxPosValue - MinPosValue) / (MxLVDT2_Vrms - MnLVDT2_Vrms) Gain2 + + Offset2
LVDT11
LVDT12
LVDT1
M U X
X
Offset3 = MinPosValue ((MaxPosValue - MinPosValue) / (MxLVDT3_Vrms - MnLVDT3_Vrms)) * MnLVDT3_Vrms Gain3 = (MaxPosValue - MinPosValue) / (MxLVDT3_Vrms - MnLVDT3_Vrms) Gain3 M U X Offset3 +
Median Select
Monx x=1- 12 (si)
LVDT12
LVDT1
LVDT12
Specifications
Item Number of inputs (per TSVO) Specification 6 LVDT windings 2 pulse rate signals (total of 2 per VSVO) External trip signal Number of outputs (per TSVO) 2 servo valves (total of 4 per VSVO board) 4 excitation sources for LVDTs 2 excitation sources for pulse rate transducers Internal sample rate Power supply voltage LVDT accuracy LVDT input filter LVDT common mode rejection LVDT excitation output Pulse rate accuracy 200 Hz Nominal 24 V dc 1% with 14-bit resolution Low pass filter with 3 down breaks at 50 rad/sec 15% CMR is 1 V, 60 dB at 50/60 Hz Frequency of 3.2 0.2 kHz Voltage of 7.00 0.14 V rms 0.05% of reading with 16-bit resolution at 50 Hz frame rate Noise of acceleration measurement is less than 50 Hz/sec for a 10,000 Hz signal being read at 10 ms Pulse rate input Magnetic PR pickup signal Active PR Pickup Signal Servo valve output accuracy Fault detection Minimum signal for proper measurement at 2 Hz is 70 mVpk, and at 12 kHz is 827 mVpk. Generates 150 V p-p into 60 k Generates 5 to 27 V p-p into 60 k 2% with 12-bit resolution Dither amplitude and frequency adjustable Suicide servo outputs initiated by: Servo current out of limits or not responding Regulator feedback signal out of limits
Diagnostics
Three LEDs at the top of the VSVO front panel show status information. The normal RUN condition is a flashing green, and FAIL is solid red. The third LED is STATUS and is normally off but displays a steady orange if an alarm condition exists on the board. Diagnostic checks include the following: The output servo current is out of limits or not responding, which creates a fault. The regulator feedback (LVDT) signal is out of limits. A fault is created and if the associated regulator has two sensors, the bad sensor is removed from the feedback calculation and the good sensor is used. The servo has suicided. This creates a fault. The A/D converter calibration voltage is out of limits and a default value is being used. The LVDT excitation voltage is out of range. A fault is created The input signal varies from the voted value by more than the TMR differential limit. This causes a fault to be created indicating a problem with this sensor input. If any one of the above signals go unhealthy a composite diagnostic alarm, L#DIAG_VSVO, occurs. Details of the individual diagnostics are available from the toolbox. The diagnostic signals can be individually latched, and reset with the RESET_DIA signal if they go healthy. Connectors JR1, JS1, JT1 on the terminal board have their own ID device that is interrogated by the I/O board. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the plug location. When the chip is read by VSVO and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
Parameter Configuration System Limits Regulator 1 RegType Select system limits LVDT/R calibration Algorithm used in the regulator Enable, disable Online LVDT calibration, yes/no Unused 2_LVposMIN 3_LVposMID 4_LVp/cylMAX RegGain RegNullBias DitherAmpl MinPOSvalue MaxPOSvalue MnLVDT1_Vrms MxLVDT1_Vrms : MnLVDT4_Vrms MxLVDT4_Vrms LVDT4_Vrms at Min End Stop (Normally set by the 0 to 7.1 Calibration function) LVDT4_Vrms at Max End Stop (Normally set by the 0 to 7.1 Calibration function) Position loop gain in (%current/%position) Null bias in % current, balances servo spring force Dither in % current (minimizes hysteresis) Position at Min End Stop in engineering units. Position at Max End Stop in engineering units. -200 to 200 -100 to 100 Dither amp: 0 to 10 -15 to 150 -15 to 150 1_PulseRate 2_LVposMAX 2_LvpilotCyl 4_LV_LM no_fbk 2_PlsRateMAX 1_LVposition Description Choices
LVDT1_Vrms at Min End Stop (Normally set by the 0 to 7.1 Calibration function) LVDT1_Vrms at Max End Stop (Normally set by the 0 to 7.1 Calibration function)
Parameter LVDT_Margin
Description Used in the calibration function to calculate the internal variables, Reg_Sensor_Hdwr_Lo and Reg_Sensor_Hdwr_Hi for LVDT sensor check. Difference limit off voted pulse inputs (EU) Monitor algorithm
Choices 0 to 7.1
TMR_DiffLimt Monitor 1 Monitor type
0 to 12000 Unused 2_LVposMIN 3_LVposMID 1_LVposition 2_LVposMAX
MinPOSvalue MaxPOSvalue MnLVDT1_Vrms MxLVDT1_Vrms : MnLVDT4_Vrms MxLVDT4_Vrms LVDT_Margin
Position at Min End Stop in engineering units. Position at Max End Stop in engineering units. LVDT1_Vrms at Min End Stop (not set by the Calibration function) LVDT1_Vrms at Max End Stop (not set by the Calibration function) LVDT4_Vrms at Min End Stop (not set by the Calibration function) LVDT4_Vrms at Max End Stop (not set by the Calibration function) Used in the calibration function to calculate the internal variables, Reg_Sensor_Hdwr_Lo and Reg_Sensor_Hdwr_Hi for LVDT sensor check done by the Monitor function. Difference limit off voted pulse inputs (EU) Terminal board 1 connected to VSVO through J3 Measured output current in percent Board point Identify regulator number Select current output for coil windings Select Suicide function based on current Percent current error to initiate suicide Percent position error to initiate suicide Measured output current in percent - Board point Terminal Board 2 connected to VSVO via J4 Servo current output wired to valve - Board point Servo current output wired to valve - Board point Pulse Rate inputs cabled to J5 connector Pulse rate input selected - Board point Select speed or flow type signal Convert Hz to engineering units Select system limit Select whether alarm will latch Select type of alarm initiation Select alarm level in GPM or RPM Same as above Difference limit off voted pulse inputs (EU) Pulse rate input selected - Board point (as above)
-15 to 150 -15 to 150 0 to 7.1 0 to 7.1
0 to 7.1 0 to 7.1 0 to 7.1
TMR_DiffLimt J3:IS200TSVOH1A Servo Output1 Reg Number Servo_MA_Out EnableCurSuic Curr_Suicide EnablFbkSuic Fdbk_Suicide Servo Output2 J4:IS200TSVOH1A Servo Output3 Servo Output4 J5:IS00TSVOH1A FlowRate1 PRType PRScale SysLim1Enabl SysLim1Latch SysLim1Type SysLimit SystemLim2 TMR_DiffLimt FlowRate2
0 to 12000 Connected, not connected Point edit (input FLOAT) Unused, Reg1, Reg2, Reg3, Reg4 10, 20, 40, 80, 120 mA Enable, disable 0 to 100% (output current error) 0 to 100% (actuator position error) Point edit (input FLOAT) Connected, not connected Point edit (input FLOAT) Point edit (input FLOAT) Connected, not connected Point edit (input FLOAT) Unused, Speed, Flow, Speed_High, Speed_LM 0 to 1,000 Enable, disable Latch, not latch >= or <= 0 to 12,000 Same as above 0 to 12,000 Point edit (input FLOAT)
Select Suicide function based on position feedback Enable, disable
Board Points Signals L3DIAG_VSVOR L3DIAG_VSVOS L3DIAG_VSVOT R1_SuicideNVR R1_SuicideNVS R1_SuicideNVT R2_SuicideNVR R2_SuicideNVS R2_SuicideNVT R3_SuicideNVR R3_SuicideNVS R3_SuicideNVT R4_SuicideNVR R4_SuicideNVS R4_SuicideNVT SysLim1PR1 SysLim2PR1 SysLim1PR2 SysLim2PR2 Reg1Suicide : Reg4Suicide Reg1_PosAFlt : Reg4_PosAFlt Reg1_PosBFlt : Reg4_PosBFlt Reg1_PosDif1 : Reg4_PosDif1 Reg1_PosDif2 : Reg4_PosDif2 RegCalMode Reg1_Fdbk : Reg4_Fdbk MiscFdbk1a MiscFdbk1b MiscFdbk2a MiscFdbk2b MiscFdbk3a MiscFdbk3b MiscFdbk4a
Description - Point Edit (Enter Signal Connection) Board diagnostic Board diagnostic Board diagnostic Regulator 1 Suicide relay status, non-voted for VSVO-R Regulator 1 Suicide relay status, non-voted for VSVO-S Regulator 1 Suicide relay status, non-voted for VSVO-T Regulator 2 Suicide relay status, non-voted for VSVO-R Regulator 2 Suicide relay status, non-voted for VSVO-S Regulator 2 Suicide relay status, non-voted for VSVO-T Regulator 3 Suicide relay status, non-voted for VSVO-R Regulator 3 Suicide relay status, non-voted for VSVO-S Regulator 3 Suicide relay status, non-voted for VSVO-T Regulator 4 Suicide relay status, non-voted for VSVO-R Regulator 4 Suicide relay status, non-voted for VSVO-S Regulator 4 Suicide relay status, non-voted for VSVO-T System Limit 1 indication for Pulse Rate 1 System Limit 2 indication for Pulse Rate 1 System Limit 1 indication for Pulse Rate 2 System Limit 2 indication for Pulse Rate 2 Regulator 1 suicide relay status : Regulator 4 suicide relay status Reg1, LM machine only, position A failure : Reg4, LM machine only, position A failure Reg1, LM machine only, position B failure : Reg4, LM machine only, position B failure Reg1, LM machine only, position difference failure : Reg4, LM machine only, position difference failure Reg1, LM machine only, position difference failure : Reg4, LM machine only, position difference failure Regulator under calibration Regulator 1 feedback : Regulator 4 feedback Reg1, PosA when 4_LV_LM or Pilot when 2_LvpilotCy or 4_LVp/cylMax Reg1, PosB when 4_LV_LM or otherwise not used. Reg2, PosA when 4_LV_LM or Pilot when 2_LvpilotCy or 4_LVp/cylMax Reg2, PosB when 4_LV_LM or otherwise not used. Reg3, PosA when 4_LV_LM or Pilot when 2_LvpilotCy or 4_LVp/cylMax Reg3, PosB when 4_LV_LM or otherwise not used. Reg4, PosA when 4_LV_LM or Pilot when 2_LvpilotCy or 4_LVp/cylMax
Direction Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input
Type BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT
Board Points Signals MiscFdbk4b Reg1_Error : Reg4_Error Accel1 Accel2 Mon1 : Mon12 ServoOut1NVR ServoOut1NVS ServoOut1NVT ServoOut2NVR ServoOut2NVS ServoOut2NVT ServoOut3NVR ServoOut3NVS ServoOut3NVT ServoOut4NVR ServoOut4NVS ServoOut4NVT CalibEnab1 : CalibEnab4 SuicideForce1 : SuicideForce4 PossDiffEnab1 : PossDiffEnab4 Reg1_Ref : Reg4_Ref Reg1-GainMod : Reg4-GainMod Reg1_NullCor : Reg4_NullCor Internal Variables
Description - Point Edit (Enter Signal Connection) Reg4, PosB when 4_LV_LM or otherwise not used. Regulator 1 position or flow rate error : Regulator 4 position or flow rate error GPM/sec based on Pulse Rate 1 GPM/sec based on Pulse Rate 2 Position feedback based on Monitor 1 : Position feedback based on Monitor 12 Servo Current Output 1, non-voted for VSVO-R Servo Current Output 1, non-voted for VSVO-S Servo Current Output 1, non-voted for VSVO-T Servo Current Output 2, non-voted for VSVO-R Servo Current Output 2, non-voted for VSVO-S Servo Current Output 2, non-voted for VSVO-T Servo Current Output 3, non-voted for VSVO-R Servo Current Output 3, non-voted for VSVO-S Servo Current Output 3, non-voted for VSVO-T Servo Current Output 4, non-voted for VSVO-R Servo Current Output 4, non-voted for VSVO-S Servo Current Output 4, non-voted for VSVO-T Enable calibration Reg 1 : Enable calibration Reg 4 Force suicide on Reg 1 : Force suicide on Reg 4 Position difference enable reg 1, LM only : Position difference enable reg 4, LM only Reg 1 position reference : Reg 4 position reference Reg 1 gain modifier (dont use) : Reg 4 gain modifier (dont use) Reg 1 null bias correction : Reg 4 null bias correction
Direction Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output
Type FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT BIT BIT BIT BIT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT
Internal variables to service the auto-calibration display, not configurable
Alarms
Fault 2 3 16 17 18 19 20 21 22 23 24 30 Fault Description Flash Memory CRC Failure CRC failure override is Active System Limit Checking is Disabled Board ID Failure J3 ID Failure J4 ID Failure J5 ID Failure J6 ID Failure J3A ID Failure J4A ID Failure Firmware/Hardware Incompatibility ConfigCompatCode mismatch; Firmware: #; Tre: # The configuration compatibility code that the firmware is expecting is different than what is in the tre file for this board IOCompatCode mismatch; Firmware: #; Tre: # The I/O compatibility code that the firmware is expecting is different than what is in the tre file for this board LVDT # RMS Voltage Out of Limits. Minimum and maximum LVDT limits are configured Calibration Mode Enabled VSVO Board Not Online, Servos Suicided. The servo is suicided because the VSVO is not on-line Possible Cause Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online) System checking was disabled by configuration. Failed ID chip on the VME I/O board Failed ID chip on connector J3, or cable problem Failed ID chip on connector J4, or cable problem Failed ID chip on connector J5, or cable problem Failed ID chip on connector J6, or cable problem Failed ID chip on connector J3A, or cable problem Failed ID chip on connector J4A, or cable problem Invalid terminal board connected to VME I/O board A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. The LVDT may need recalibration. The VSVO was put into calibration mode. The controller (R, S, T) or IONet is down, or there is a configuration problem with the system preventing the VCMI from bringing the board on line. A cable/wiring open circuit, or board problem.
31
33-44 45 46
47-51
Servo Current # Disagrees with Reference, Suicided. The servo current error (reference - feedback) is greater than the configured current suicide margin Servo Current # Short Circuit. This is not currently used Servo Current # Open Circuit. The servo voltage is greater than 5V and the measured current is less than 10% Servo Position # Feedback Out of Range, Suicided. Regulator number # position feedback is out of range, causing the servo to suicide Configuration Message Error for Regulator Number #. There is a problem with the VSVO configuration and the servo will not operate properly Onboard Calibration Voltage Range Fault. The A/D calibration voltages read from the FPGA are out of limits, and the VSVO will use default values instead LVDT Excitation # Voltage out of range
52-56 57-61 62-66
NA A cable/wiring open circuit, or board problem. LVDT or board problem
67-71
The LVDT minimum and maximum voltages are equal or reversed, or an invalid LVDT, regulator, or servo number is specified. A problem with the Field Programmable Gate Array (FPGA) on the board There is a problem with the LVDT excitation source on the VSVO board.
72
73-75
Fault 77
Fault Description Servo output assignment mismatch. Regulator types 8 & 9 use two servo outputs each. They have to be consecutive pairs, and they have to be configured as the same range Logic Signal # Voting mismatch. The identified signal from this board disagrees with the voted value Input Signal # Voting mismatch, Local #, Voted #. The specified input signal varies from the voted value of the signal by more than the TMR Diff Limit
Possible Cause Fix the regulator configurations.
128191 224259
A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable. A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable.
TSVO Servo Input/Output

The Servo Input/Output (TSVO) terminal board interfaces with two electro-hydraulic servo valves that actuate the steam/fuel valves. Valve position is measured with LVDTs. Two cables connect to VSVO using the J5 plug on the front of VSVO and the J3 or J4 connector on the VME rack. TSVO provides simplex signals through the JR1 connector, and fans out TMR signals to the JR1, JS1, and JT1 connectors. Plugs JD1 or JD2 are for an external trip from the protection module.
TSVO Terminal Board
External trip
x JT1
VSVO Processor Board

x RUN FAIL STAT
LVDT inputs Pulse rate inputs LVDT excitation Servo coil outputs
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
JD1 JD2
37-pin "D" shell type connectors with latching fasteners VME bus to VCMI
JT5 JS1
Cables to VME rack T
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
JS5 JR1 JR5
Cables to VME rack S
J5
VSVO x
J3
x
Shield bar Barrier type terminal blocks can be unplugged from board for maintenance
Connectors on VME rack R Cables to VME rack R
J4
From second TSVO

TSVO Servo Terminal Board and VSVO Processor Board
Installation
Connect the wires for the sensors and servo valves directly to two I/O terminal blocks on the terminal board, as displayed in the figure Servo Terminal Board Wiring. Each block is held down with two screws and has 24 terminals accepting up to #12 AWG wiring. A shield termination strip attached to chassis ground is located immediately to the left of each terminal block. Connect the wires for the external trip into JD1 or JD2. Cable the J5 connectors to the front of VSVO boards in racks <R>, <S>, and <T>. Cable the J1 connectors to the VME rack below VSVO in <R>, <S>, and <T>. Each servo output can have three coils in TMR configuration. Each coil current is jumper selected using JP1-6.
Servo/LVDT Terminal Board TSVOH1B

x
1 2
External Trip from GND

1 2
LVDT 01 (L) LVDT 02 (L) LVDT 03 (L) LVDT 04 (L) LVDT 05 (L) LVDT 06 (L)
x x x x x x x x
Exc R1 (L) Exc R2 (L) Exc S (L) Exc T (L)
x x x x
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
LVDT 01 (H) LVDT 02 (H) LVDT 03 (H) LVDT 04 (H) LVDT 05 (H) LVDT 06 (H)
JD1
External Trip GND
JD2
Exc R1 (H) Exc R2 (H) Exc S (H) Exc T (H) JP1

JP2
To connectors JR5, JS5, JT5, JR1, JS1, JT1 Servo Coil 01 R Servo Coil 01 S Servo Coil 01 T Servo Coil 02 R Servo Coil 02 S Servo Coil 02 T
Servo 01 R (L) Servo 01 S (L) Servo 01 T(L) Servo 02SMX(H) Servo 02 R (L) Servo 02 S (L) Servo 02 T (L) Pulse 02 (TTL) Pulse 01 (24R) Pulse 01 (L) Pulse 02 (24R) Pulse 02 (L)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
Servo 01 R (H) Servo 01 S (H) Servo 01 T (H) Servo 01 SMX (H) Servo 02 R (H) Servo 02 S (H) Servo 02 T (H) Pulse 01 (TTL) Pulse 01 (24V) Pulse 01 (H) Pulse 02 (24V) Pulse 02 (H)
JP3 JP4 JP5 JP6
Jumper Choices: 120B +/-120 ma (75 ohm coil) 120A +/-120 ma (40 ohm coil) 80 +/- 80 ma 40 +/- 40 ma 20 +/- 20 ma 10 +/- 10 ma Terminal blocks can be unplugged from terminal board for maintenance
Up to two #12 AWG wires per point with 300 V insulation
Servo Terminal Board Wiring
Operation
VSVO provides four channels consisting of bi-directional servo current outputs, LVDT position feedback, LVDT excitation, and pulse rate flows inputs. The TSVO provides excitation for, and accepts inputs from, up to six LVDT valve position inputs. There is a choice of one, two, three, or four LVDTs for each servo control loop. If three inputs are used they are available for gas turbine flow measuring applications. These signals come through TSVO and go directly to the VSVO board front at J5. Each servo output is equipped with an individual suicide relay under firmware control that shorts the VSVO output signal to signal common when de-energized, and recovers to nominal limits after a manual reset command is issued. Diagnostics monitor the output status of each servo voltage, current, and suicide relay.
Capacity 6 LVDT/R inputs on each of 2 boards, and total of 2 active/passive magnetic pickups. Termination Board TSVOH1B (Input portion) JR1 LVDT 3.2k Hz, 7 V rms excitation source or LVDR
LVDT1H
<R> Control Module Controller Application Software
Servo Board VSVO J3 Digital regulator
1
SCOM
A/D
P28VR
Regulator servo
LVDT1L
A/D converter
D/A D/A converter

Servo driver
Voltage Limit
6 Ckts.
P28V
P28V J3
P24V1 P24VR1
41 42 39 43( 44 45 46 40 47( 48
Current limit
Configurable Gain
Suicide Relay
Pulse rate inputs active probes 2 - 20 k Hz
P1TTL
JR5
J5
To Servo Outputs
To TSVO
PR TTL
P1H P1L
Pulse Rate
3.2KHz
Excitation
(PR only available on 1 of 2 TSVOs) Pulse rate inputs, magnetic pickups 2 - 20 k Hz
P24V2 P24VR2 P2TTL P2H P2L
CL
Connector on front of VSVO board
To second
TSVO
PR MPU
Noise suppr.
LVDT and Pulse Rate Inputs, Simplex (Part 1 of 2)
Each servo output channel can drive one or two-coil servos in simplex applications, or two or three-coil servos in TMR applications. The two-coil TMR applications are for 200# oil gear systems where each of two control modules drive one coil each, and the third control module has no servo coil interface. Servo cable lengths up to 300 meters (984 feet) are supported with a maximum two-way cable resistance of 15 . Because there are many types of servo coils, a variety of bi-directional current sources are selectable by configuring jumpers. Another trip override relay K1 is provided on each terminal board and is driven from the Protection Module. If an emergency overspeed condition is detected in the Protection Module, the K1 relay energizes and disconnects the VSVO servo output from the terminal block and applies a bias to drive the control valve closed. This is only used on simplex applications to protect against the servo amplifier failing high, and is functional only with respect to the servo coils driven from <R>.
<R> Controller Application Software Terminal Board TSVOH1B (continued)
Servo Board VSVO A/D converter Digital
Coil current range 10,20,40,80,120 ma P28VR JD1 K1 JP1 JD2

25 31
A/D
From LVDT TSVO
Regulator servo
regulator
1 2
Trip input from module (J1)
D/A D/A converter

Servo driver
Voltage Limit
P28VR J3 JR1
120B 120 80 40 20 10
1 2
Servo coil from<R>
S1RH S1SH
P28V
Configurable Gain
Suicide Relay
2 Ckts.
N S
26
SCOM
1k ohm
S1RL
22 ohms 89 ohms 1k ohm
J5
Pulse Rate
3.2KHz Excitation 2 Ckts.

To second TSVO
17 ER1H
N S 18
SCOM
ER1L
Connector on front of VSVO
Noise suppression
3.2KHz, 7V rms excitation source for LVDTs
Servo Coil and LVDT Outputs, Simplex (Part 2 of2)
In TMR applications, the LVDT signals on TSVO fan out to three racks through JR1, JS1, and JT1. Three connectors also bring power into TSVO where the three voltages are diode high-selected and current limited to supply 24 V dc to the pulse rate active probes.
<R> <S> <T>
Controller
Application Software
Terminal Board TSVOH1B (Input Portion)

LVDT 3.2k Hz, 7 V rms excitation source
LVDT1H 1
Servo Board VSVO

J3 A/D converter Digital
JR1
P28VR
A/D
LVDT1L
Regulator servo
regulator
2
SCOM
JS1
J3
P28V Same for <S> J3 Same for <T>
D/A D/A converter

Servo driver
Voltage Limit
6 Ckts.
P28VS
JT1
P28VT
To servo outputs on TSVO
Diode Voltage Select

P24V1 P24VR1
41 42 39 43( 44 45 46 40 47 ( 48
CL P28V
Pulse rate inputs active probes PR 2 - 20 kHz (PR only available on 1 of 2 TSVOs) Pulse rate inputs, magnetic pickups 2 - 20 kHz
P1TTL P1H P1L
JR5
Connector on front of VSVO card in <R> J5 Pulse Rate J5 in <S>
Configurable Gain
3.2KHz excitation
To TSVO
TTL
JS5
CL
P24V2 P24VR2 P2TTL
JT5
J5 in <T>
PR MPU
P2H P2L
Noise suppression
LVDT and Pulse Rate Inputs, TMR (Part 1 of 2)
For TMR systems, each servo channel has connections to three output coils with a range of current ratings up to 120 mA, selected by jumper.
<R> <S> <T> Controller Application Software Terminal Board TSVOH1B (continued) Servo current range 10,20,40,80,120 ma P28VR P28VR J3 JR1 JD1
1 2
Servo Board VSVO A/D converter
A/D
From TSVO LVDT
Regulator D/A
Digital servo regulator Suicide relay
Trip input from not used for TMR
JP1
JD2
1 2 25 31 S1RH
Servo driver
Voltage Limit
120B 120 80 40 20 10
Servo coil from <R>
2 Ckts.
Configurable Gain
N S
26 S1RL
22 ohms 89 ohms 1k ohm 3.2KHz, 7V rms excitation source For LVDTs Servo coil from <S>
J5
Pulse Rate
3.2KHz
17
ER1H
excitation J3 JS1
2 Ckts S JP2
120B 120 80 40 20 10
N
18 ER1L
Connector on front of VSVO card
27
S1SH
2 Ckts.
N S
28 21
S1SL ESH
1 Ckt. N S J3 JT1
120B 120 80 40 20 10
22
ESL
JP3
29 S1TH
3.2KHz, 7V rms excitation source Servo coil from <T>
2 Ckts.
N S
30 23
S1TL ETH
N 1 Ckt. S
24
ETL
Noise suppression
3.2KHz, 7V rms excitation source For LVDTs
Servo Coil Outputs and LVDT Excitation, TMR System (Part 2 of 2)
The following table defines the standard servo coil resistance and their associated internal resistance, selectable with the terminal board jumpers shown in the figure above. In addition to these standard servo coils, it is possible to drive non-standard coils by using a non-standard jumper setting. For example, an 80 mA, 125 coil could be driven by using a jumper setting 120B.
Servo Coil Ratings
Jumpe Nominal r Label Current 10 20 40 40 80 120A 120B 10 mA 20 mA 40 mA 40 mA 80 mA 120 mA (A) 120 mA (B)
Coil Resistance Internal (Ohms) Resistance (Ohms) Application 1,000 125 62 89 22 40 75 180 442 195 195 115 46 10 Simplex and TMR Simplex Simplex TMR TMR Simplex TMR
The control valve position is sensed with either a four-wire LVDT or a three-wire LVDR. Redundancy implementations for the feedback devices are determined by the application software to allow the maximum flexibility. LVDT/Rs can be mounted up to 300 meters (984 feet) from the turbine control with a maximum two-way cable resistance of 15 . Each terminal board has two LVDT/R excitation sources for simplex applications and four for TMR applications. Excitation voltage is 7 V rms and the frequency is 3.2 kHz with a total harmonic distortion of less than 1% when loaded.
Note The excitation source is isolated from signal common (floating) and is capable of operation at common mode voltages up to 35 V dc, or 35 V rms, 50/60 Hz.
A typical LVDT/R has an output of 0.7 V rms at the zero stroke position of the valve stem, and an output of 3.5 V rms at the designed maximum stoke position (these are reversed in some applications). The LVDT/R input is converted to dc and conditioned with a low pass filter. Diagnostics perform a high/low (hardware) limit check on the input signal and a high/low system (software) limit check. Two pulse rate inputs connect to a single J5 connector on the front of VSVO. This dedicated connection minimizes noise sensitivity on the pulse rate inputs. Both passive magnetic pickups and active pulse rate transducers (TTL type) are supported by the inputs and are interchangeable without configuration. Pulse rate inputs can be located up to 300 meters (984) from the turbine control cabinet; this assumes shielded-pair cable is used with typically 70 nF single ended or 35 nF differential capacitance and 15 ohms resistance. A frequency range of 2 to 30 kHz can be monitored at a normal sampling rate of either 10 or 20 ms. Magnetic pickups typically have an output resistance of 200 and an inductance of 85 mH excluding cable characteristics. The transducer is a high impedance source, generating energy levels insufficient to cause a spark.
Specifications
Item Number of inputs Specification 6 LVDT windings 2 pulse rate signals (total of 2 per VSVO) External trip signal Number of outputs 2 servo valves (total of 4 per VSVO board) 4 excitation sources for LVDTs 2 excitation sources for pulse rate transducers Power supply voltage LVDT excitation output Pulse rate input Magnetic PR pickup signal Active PR Pickup Signal Fault detection Nominal 24 V dc Frequency of 3.2 0.2 kHz Voltage of 7.00 0.14 V rms Minimum signal for proper measurement at 2 Hz is 33 mVpk, and at 12 kHz is 827 mVpk. Generates 150 V p-p into 60 k Generates 5 to 27 V p-p into 60 k Servo current out of limits or not responding Regulator feedback signal out of limits Failed ID chip Size Technology 17.8 cm high x 33.02 cm wide (7 in. x 13 in.) Surface mount
Diagnostics
VSVO performs diagnostic checks on the terminal board, including the following: If the output servo current is out of limits or not responding, a fault is created. If the regulator feedback (LVDT) signal is out of limits, a fault is created and if the associated regulator has two sensors, the bad sensor is removed from the feedback calculation and the good sensor is used. If any one of the above signals go unhealthy a composite diagnostic alarm, L#DIAG_VSVO occurs. Details of the individual diagnostics are available from the toolbox. The diagnostic signals can be individually latched, and reset with the RESET_DIA signal if they go healthy. Each cable connector on the terminal board has its own ID device that is interrogated by the I/O processor. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the J connector location. When this chip is read by the I/O processor and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
For a simplex system, jumper JP1 configures the coil current of Servo 1, and jumper JP4 configures the coil current of Servo 2. Refer to the table Servo Coil Ratings for more information. In a TMR system, each servo output can have three coils.Jumpers JP 1 3 configure the coil currentfor Servo 1, and Jumpers JP 4 6 configure the coil current for Servo 2. All other configuration is done from the toolbox.
DSVO Simplex Servo Input/Output

The Simplex Servo Input/Output (DSVO) terminal board is a compact terminal board designed for DIN-rail mounting. This board has two servo outputs, I/O for six LVDT position sensors, and two active pulse rate inputs for flow measurement. Servo coil currents ranging from 10 to 120 mA can be selected using jumpers. DSVO connects to the VSVO processor board with a 37-pin cable, which is identical to those used on the larger TSVO board. The terminal boards can be stacked vertically on the DIN-rail to conserve cabinet space. Two DSVO boards can be connected to the VSVO, if required. Only a simplex version of this board is available. The on-board functions and high frequency decoupling to ground are the same as those on the TSVO. High density Euro-Block type terminal blocks are permanently mounted to the board with six screws for the ground connection (SCOM). Connectors JR1 and J5 connect to signals from on-board ID chips that identify the board to the VSVO for system diagnostic purposes. Two versions of the DSVO, H1B and H2B, are available. The H1B is a direct replacement for the previous H1A design. The H2B is certified by UL for Class 1 Division 2 applications.
DSVOH1B vs. DSVOH2B
Function Class 1, Div. 2 certification Servo valves accommodated LVDT excitation outputs Excitation for pulse rate probes
H1B No 75, 40, 22, 62, 89, 125, 1 k 2 at 120 mA each 2 at 24 V dc, 100 mA each
H2B Yes 1 k (10 mA) 4 at 60 mA each No 2
Additional pulse rate inputs for TTL No signals
Installation
Mount the plastic holder on the DIN-rail and slide the DSVO board into place. Connect the wires for the servo I/O directly to the terminal block. The Euro-Block type terminal block has 36 terminals (DSVOH1A) or 42 terminals (DSVOH1B,H2B) and is permanently mounted on the terminal board. Typically #18 AWG shielded twisted pair wiring is used. Six screws, 31 36, are provided for SCOM (ground) connection, which should be as short as distance as possible.
Note There is no shield termination strip with this design.
DSVOH1A Servo Terminal Board
Screw Connections LVDT1 (Low) LVDT2 (Low) LVDT3 (Low) Coil LVDT4 (Low) Current LVDT5 (Low) Jumpers LVDT6 (Low) JP1 Excitat1(Low) Excitat2(Low) 10 2040 80 120B ServoR1(Low) ServoR2(Low) 120A JP2 ServoS2(High) Pulse 1(24R) Pulse1 (Low) 10 2040 80 120B Pulse 2(24R) 120A Pulse2 (Low) Chassis Ground JR1 Chassis Ground Chassis Ground JR5 JD2 JD1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35
Screw Connections LVDT 1 (High) LVDT 2 (High) LVDT 3 (High) LVDT 4 (High) LVDT 5 (High) LVDT 6 (High) Excitation 1 (High) Excitation 2 (High) ServoR1 (High) ServoR2 (High) ServoS1 (High) Pulse 1 (24V) Pulse 1 (High) Pulse 2 (24V) Pulse 2 (High) Chassis Ground Chassis Ground Chassis Ground Euro-Block type terminal block External trip circuits
Cable to J3 connector in I/O rack for VSVO board
SCOM
Cable to J5 on front of VSVO board Plastic mounting holder
DIN-rail mounting
DSVOH1A Wiring and Cabling
DSVOH1B, H2B JP1 JP2 Coil 120B 120B Current 120A 120A Jumpers 80 80 Screw Connections LVDT1 (Low) LVDT2 (Low) LVDT3 (Low) LVDT4 (Low) LVDT5 (Low) LVDT6 (Low) Excitat1(Low) Excitat2(Low) ServoR1(Low) ServoR2(Low) ServoS2(High) Pulse 1(24R) Pulse1 (Low) Pulse 2(24R) Pulse2 (Low) Chassis Ground JR1 Chassis Ground Chassis Ground Pulse2TTL (High) Excitation3 (Low) JR5 Excitation4 (Low) External trip circuits JD2 JD1
40 20 10 40 20 10
H1B and H2B Connection Differences Screw # H1B H2B 23, 24 N/C 27, 28 N/C 37, 38 N/C 39, 40 N/C 41, 42 N/C N/C = Not Connected Screw Connections LVDT 1 (High) LVDT 2 (High) LVDT 3 (High) LVDT 4 (High) LVDT 5 (High) LVDT 6 (High) Excitation 1 (High) Excitation 2 (High) ServoR1 (High) ServoR2 (High) ServoS1 (High) Pulse 1 (24V) Pulse 1 (High) Pulse 2 (24V) Pulse 2 (High) Chassis Ground Chassis Ground Chassis Ground Pulse1TTL (High) Excitation3 (High) Excitation4 (High) Euro-Block type terminal block
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41
Cable to J5 on front of VSVO board DIN-rail mounting
Plastic mounting holder
DSVOH1B, H2B Wiring and Cabling
Operation
DSVO Version H1A
The following figures show operation of two versions of the DSVO board.
JR1
ID P28V
DSVOH1A Jumper position: 120B is 75 ohm coil 120A is 40 ohm coil P28VT P28VR JD1
1 2 1 2
K1
JD2
External trip
LVDT 3.2k Hz, 7 V rms excitation source
Noise Suppression
LVDT1H
1 SCOM
LVDT1L
JP1
120B 120A 80 40 20 10
Noise suppression
17 SR1H 21 SS1H
Total of six LVDT input circuits
3 4
23 24 25 26 27 28 29 30 SCOM Current Limit
N S K1 P28V P28VR
SCOM
120B 120A 80 40 20 10
Servo valve coil

18 SR1L
P1 24V P1 24R
JP2
Pulse rate inputs active probes 2 - 20 kHz
19 SR2H
P1 H P1 L P2 24V P2 24R
N S CL P28V
SCOM
22 SS2H
Servo valve coil

20 SR2L 13 14 15 16
E1H E1L E2H E2L
Pulse rate inputs active probes 2 - 20 kHz
P2 H P2 L
3.2 kHz excitation
LVDT excitation
JR5
SCOM
Cable to front of VSVO board
DSVOH1A Terminal Board
DSVO Versions H1B, H2B

(IS200DSVOH1B Replaces IS200DSVOH1A)
From control rack {
PCOM P28
H2B is certified to UL-1604 Class 1 Div 2

CONN SHLD
External Trip
P28VR
JD1
1 2
JR1
P28VR RP28V PCOM
K1 1 2
JD2
12 Exc
1 LV1H
ID
4
10 IN VSVO P28VR 332
S S S S
LV1L
K1
LVDT
LV2H
H1B ONLY 0 36 105 185 432 170 170
PCOM 120B 120A 80 40 20 10 10mA, 1K Coil
JP1
S S S
SR1H
Servo valve 17 coils

21
LV2L
SS1H
H2B ONLY 10mA, 1K Coil
SR1L 18
Total of six LVDT input circuits

Current limit
23 P24V1
S S
CL
PCOM
P28VR
4
24
P24R1
LVDT Input TB Locations: LVx H L. 1 1 2 2 3 4 3 5 6 4 7 8 5 9 10 6 11 12

10 IN VSVO
JPx (mA) Coil Res. 120 B 75 ohm 120 A 40 ohm 80 22 ohm 40 62 or 89 ohm 20 125 ohm 10 1000 ohm
H1B ONLY 0 36 105 185 432 170 170 120B 120A 80 40 20 10 10mA, 1K Coil
JP2
S S S
SR2H
37
TTL1
Servo valve 19 coils

22
K1
P28VR 332
25
PR1H
PR
S S
SS2H
26
PR1L
H2B ONLY 10mA, 1K Coil 10 IN VSVO
SR2L
20
(SCREWS 37 & 38 ARE NC IN H1B) (SCREWS 23, 24,27,28 ARE NC IN H2B) 27 P24V2
S S
CL
PCOM
P28VR
ERH1
13
28
P24R2
ERL1
14
38
TTL2
ERH3
39
29
PR2H
PR
S
(SCREWS 39-42 ARE NC IN H1B)
30
PR2L
S 4
ID
CONN SHLD
ERH2
15
ERL2
16
JR5
From control rack {
ERH4
41
ERL4 31 32 33 34 35 36 SCOM
42
CHASSIS
DSVOH1B, H2B Board (Part 1 of 2)
LVDT Excitation
ERL3
40
Servo Driver Circuit: TSVO VSVO

Voltage Limiter 11 vlt
JD1 Ext Trip Ckt JD2

JP1
36 105
P28V
P28VR
120B (75 ohm coil) 120A (40) 80 40 20 10 flow of current to shutdown actuated device
Current Ref
10 ohm Suicide Relay
185 432 170 170
Configurable Gain
Servo Coils
DSVOH1B, H2B board (Part 2 of 2)
Specifications
Item Number of inputs Specification 6 LVDT windings 2 pulse rate signals External trip signal Number of outputs 2 servo valves 2 excitation sources for LVDTs 2 excitation sources for pulse rate transducers LVDT excitation output Pulse rate input Magnetic PR pickup signal Active PR Pickup Signal Fault detection 2 Outputs: Frequency of 3.2 0.2 kHz Voltage of 7.00 0.14 V rms Minimum signal for proper measurement at 2 Hz is 33 mVpk, and at 12 kHz is 827 mVpk. Generates 150 V p-p into 60 , used on DSVOH2B. Generates 5 to 27 V p-p into 60 , used on DSVOH1B. Servo current out of limits or not responding. The LVDT excitation is out of range. The LVDT feedback is out of limits. Failed ID chip. Size 23.8 cm high x 8.6 cm wide (9.37 in. x 3.4 in.) complete with support plate
Diagnostics
VSVO performs diagnostic checks on DSVO including the following: If the output servo current is out of limits or not responding, a fault is created. If the regulator feedback (LVDT) signal is out of limits, a fault is created and if the associated regulator has two sensors, the bad sensor is removed from the feedback calculation and the good sensor is used. If any one of the above signals go unhealthy a composite diagnostic alarm, L#DIAG_VSVO, occurs. Details of the individual diagnostics are available from the toolbox. The diagnostic signals can be individually latched, and reset with the RESET_DIA signal if they go healthy. Connector JR1 on the terminal board has its own ID device that is interrogated by the I/O board. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the connector location. When the chip is read by VSVO and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
On DSVOH1B, jumpers JP1 and JP2 select the desired coil current and servo valve coil resistance, which varies from 22 W to 1,000 W. The following table shows the coil currents and resistances (for example, jumper 120B provides a 120 mA coil current).
Jumper J1/2 Label (mA) 120B 120A 80 40 20 10 Coil Resistance 75 40 22 62 or 89 125 1,000
With DSVOH2B, only a 1,000 , 10 mA coil can be driven, so there are no jumper settings.
Notes

The Thermocouple Input (VTCC) board accepts 24 thermocouple inputs. These inputs are wired to the TBTC or DTTC terminal boards. Cables with molded plugs connect the terminal board to the VME rack where the VTCC thermocouple processor board is located. The TBTC can provide both simplex (TBTCH1C) or triple module redundant (TMR) control (TBTCHIB). Two groups of the VTCC provide different temperature ranges optimized for gas turbine control applications (VTCCH1) and general-purpose applications (VTCCH2). The same terminal boards are used with both groups of the VTCC card. VTCCH1 supports E, J, K, S, and T types of thermocouples and mV inputs. The mV span is -8mV to +45mV. VTCCH2 supports E, J, K, S, T as well as B, N, and R types of standard thermocouples and mV inputs. The mV span for VTCCH2 is -20mV to +95mV.
Note Input data is transferred over the VME backplane from VTCC to the VCMI and then to the controller.
VTCC Thermocouple Input 385
TBTC Terminal Board
VTCC VME Board

x
x
TC inputs
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
TBTC, capacity for 24 thermocouple inputs
RUN FAIL STAT
VME Bus to VCMI communication board

JA1
x x x
TC inputs
x x x x x x x x x x
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47 x
JB1
Cables to VME rack Connectors on VME rack
VTCC x
J3
Shield bar ground
J4
Thermocouple Input Terminal Board, I/O Board, and Cabling
Installation
386 VTCC Thermocouple Input
Operation
Type E, J, K, S, and T thermocouples can be used with VTCCH1, and they can be grounded or ungrounded. Type E, J, K, S, T, B, N and R thermocouples can be used with VTCCH2, and they can be grounded or ungrounded. They can be located up to 300 m (984 ft) from the turbine control cabinet with a maximum two-way cable resistance of 450 . High frequency noise suppression and two cold junction (CJ) reference devices are mounted on the terminal board. Linearization for individual thermocouple types is performed in software by VTCC. A thermocouple that is determined to be out of the hardware limits is removed from the scanned inputs to prevent adverse affects on other input channels.
Cold Junctions
If both CJ devices are within the configurable limits, then the average of the two is used for CJ compensation. If only one CJ device is within the configurable limits, then that CJ is used for compensation. If neither CJ device is within the configurable limits, then a default value is used. The thermocouple inputs and cold junction inputs are automatically calibrated using the filtered calibration reference and zero voltages.
Note VTCC boards manufactured after software version VTCC-100100C and higher have additional thermocouple and cold junction features. The newly designed boards permit the use of S-type thermocouples, in addition to all previous types. They also provide for a remote CJ compensation feature for thermocouple inputs. This allows the user to select whether CJ compensation is done based on a temperature reading at a remote location or at the terminal board as explained above. The calculations are the same as previous VTCC boards, only the source of the CJ reading changes.
Two CJ references are used per VTCC, one each for connectors J3 and J4. Each reference can be selected as either remote (from VME bus) or local (from associated terminal board, T-type or D-type). All references are then treated as sensor inputs (for example, averaged, limits configured). The two references can be mixed, one local and one remote. CJ signals go into signal space and are available for monitoring. Normally the average of the two is used. Acceptable limits are configured, and if a CJ goes outside the limit, a logic signal is set. A 1 F error in the CJ compensation causes a 1 F error in the thermocouple reading. Hard coded limits are set at 32 to 158 F, and if a CJ goes outside this range, it is regarded as bad. Most CJ failures are open or short circuit. If one CJ fails, the good one is used. If both CJs fail, the backup value is used. This backup value can be derived from CJ readings on other terminal boards, or can be the configured default value.
Terminal Board TBTC
<R> or <S> or <T> Rack
Thermocouple Input Board VTCC
Local cold junction reference
JA1
J3
Excitation
Thermocouple
High Noise Low Suppression
Remote cold junction references
(12) thermocouples
ID
Local cold junction reference
JB1
Connectors at bottom of VME rack Excit. J4
A/D

VMEbus
Thermocouple
High Low Noise Suppression
(12) thermocouples
ID
Simplex Thermocouple Inputs to VTCC Processor Board
Terminal Board TBTCH1B JRA

Local CJ reference ID
<R> Rack J3 Thermocouple Input Board VTCC Excitation.
Thermocouple
High Low
NS
Noise suppression
JSA
ID
Remote CJ references To <S> Rack
(12) thermocouples JTA

ID
A/D
To <T> Rack
Processor
VMEbus
JRB
Local Cold Junction Reference ID
J4
Excit.
Thermocouple
High Low
NS
JSB
ID
(12) thermocouples
To <S> Rack JTB

ID
Analog-Digital Converter
To <T> Rack
TMR Thermocouple Inputs to VTCC Processor Boards
Thermocouple inputs are supported over a full-scale input range of -8.0 mV to +45.0 mV. The following table shows typical input voltages for different thermocouple types versus the minimum and maximum temperature range. The CJ temperature is assumed to range from +32 to +158 F.
Thermocouple Low range, F / C mV at low range with reference at 158 F (70C) High range, F / C mV at high range with reference at 32 F (0C) E
60 /51 7.174
J
60 / 51 6.132
K
60 / 51 4.779
S 0 / 17.78
0.524
T
60 / 51 4.764
1100 / 593 44.547
1400 / 798 2000 / 1093 3200 / 1760 750 / 399 42.922 44.856 18.612 20.801
VTCCH1 Thermocouple Range

Thermocouple inputs are supported over a full-scale input range of -8.0 mV to +45.0 mV. The following table shows typical input voltages for different thermocouple types versus the minimum and maximum temperature range. The CJ temperature is assumed to range from 0 to 70C (+32 to +158 F).
Thermocouple Type VTCCH1 Low range, F C mV at low range with reference at 70C (158 F) E -60 -51 -7.174 J -60 -51 -6.132 K -60 -51 -4.779 S 0 -17.78 -0.524 T -60 -51 -4.764
High range, F C mV at high range with reference at 0C (32 F)
1100 593 44.547
1400 760 42.922
2000 1093 44.856
3200 1760 18.612
750 399 20.801
VTCCH2 Thermocouple Range

Thermocouple inputs support a full-scale input range of -20.0 mV to + 95.0 mV. The following table shows typical input voltages for different thermocouple types versus the minimum and maximum temperature range. The CJ temperature is assumed to range from 0 to 70C (+32 to +158 F).
Thermocouple Type VTCCH2 Low range, F C mV at low range with reference at 70C (158 F) High range, F C mV at high range with reference at 0C (32 F) E -60 -51 -7.174 J -60 -51 -6.132 K -60 -51 -4.779 S 0 -17.78 -0.524 T -60 -51 -4.764
1832 1000 76.373
2192 1200 69.553
2372 1300 52.41
3200 1760 18.612
752 400 20.869
Thermocouple Type VTCCH2 Low range, F C mV at low range with reference at 70C (158 F) High range, F C mV at high range with reference at 0C (32 F)
B 32 0 -0.0114
N -60 -51 -3.195
R 0 -17.78 -0.512
3272 1800 13.593
2282 1250 45.694
3092 1700 20.220
Specifications
Item Number of channels Thermocouple types Span A/D converter CJ compensation Specifications 24 channels per terminal board and I/O board E, J, K, S, T thermocouples, and mV inputs for VTCCH1 E, J, K, S, T, B, N, R thermocouples, and mV inputs for VTCCH2 -8 mV to +45 mV for VTCCH1 -20 mV to +95 mV for VTCCH2 Sampling type 16-bit A/D converter with better than 14-bit resolution Reference junction temperature measured at two locations on each terminal board (option for remote CJs). TMR board has six CJ references. Cold junction temperature accuracy Conformity error Measurement accuracy Cold junction accuracy 1.1C (2 F) Maximum software error 0.14C (0.25 F) VTCCH1 = 53 V (excluding cold junction reading). Example: For type K, at 1000 F, including cold junction contribution, RSS error= 3 F VTCCH1 = 115 V (excluding cold junction reading). Example: For type K, at 1000 F, including cold junction contribution, RSS error= 6 F Common mode rejection Common mode voltage Normal mode rejection Scan time Fault detection Ac common mode rejection 110 dB @ 50/60 Hz, for balanced impedance input
5 V
Rejection of 250 mV rms is 80 dB @ 50/60 Hz All inputs are sampled at 120 times per second for 60 Hz operation; for 50 Hz operation it is 100 times per second High/low (hardware) limit check High/low system (software) limit check Monitor readings from all TCs, CJs, calibration voltages, and calibration zero readings
Diagnostics
Three LEDs at the top of the front panel provide status information. The normal run condition is a flashing green, and fail is a solid red. The third LED shows a steady orange if a diagnostic alarm condition exists in the board. Diagnostic checks include the following: Each thermocouple type has hardware limit checking based on preset (nonconfigurable) high and low levels set near the ends of the operating range. If this limit is exceeded a logic signal is set and the input is no longer scanned. If any one of the 24 inputs hardware limits is set it creates a composite diagnostic alarm, L3DIAG_VTCC, referring to the entire board. The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal. Each thermocouple input has system limit checking based on configurable high and low levels. These limits can be used to generate alarms, and can be configured for enable/disable, and as latching/non-latching. RESET_SYS resets the out of limit signals. In TMR systems, if one signal varies from the voted value (median value) by more than a predetermined limit, that signal is identified and a fault is created. This can provide early indication of a problem developing in one channel. Each terminal board and I/O board has its own ID device, which is interrogated by the I/O board. The board ID is coded into a read-only chip containing the terminal board serial number, board type, revision number, and the JA1/JB1 connector location. When the chip is read by the I/O processor and a mismatch is encountered, a hardware incompatibility fault is created. Details of diagnostic faults are in the Alarms section of this document.
Configuration
Parameter Configuration SysFreq SystemLimits Auto Reset J3J4:I200TBTCH1A ThermCpl1 ThermoCpl Type System frequency (used for noise rejection) Enables or disables all system limit checking Terminal board First of 24 thermocouples - board point signal Thermocouples supported by VTCC; unused inputs are removed from scanning, mV inputs are primarily for maintenance. When configured for mV input, the signal span is 8 mV to +45 mV. The input is not compensated for CJ and is a straight reading of the terminal board mV input. In order to detect open wires, each input is biased using plus and minus 0.25 V through 10 resistors. This should be taken into account if high impedance mV signals are to be read. LowPassFiltr SysLim1 Enabl SysLim1 Latch SysLim1 Type Enable 2 Hz low pass filter Enables or disables a temperature limit which can be used to create an alarm. Determines whether the limit condition will latch or unlatch; reset used to unlatch. Limit occurs when the temperature is greater than or equal (>=), or less than or equal to (<=) a preset value. Enable, disable Enable, disable Latch, unlatch Greater than or equal, less than or equal 50 or 60 Hz Enable, disable Connected, Not Connected Point edit (input FLOAT) Unused, mV, S, T, K, J, E Description Choices
Automatic Restoring of Thermocouples removed from scan Enable, disable
Parameter SysLimit 1
Description Enter the desired value.
Choices Engineering units Enable, disable Latch, unlatch Greater than or equal, less than or equal Engineering units -60 to 2,000
SysLim2 Enabled Enables or disables a temperature limit which can be used to create an alarm. SysLim2 Latch SysLim2 Type SysLimit 2 TMR Diff Limt Determines whether the limit condition will latch or unlatch; reset used to unlatch. Limit occurs when the temperature is greater than or equal (>=), or less than or equal to (<=) a preset value. Enter the desired value. Limit condition occurs if 3 temperatures in R, S, T differ by more than a preset value (deg F); this creates a voting alarm condition. First CJ reference - Board point signal (similar configuration as for thermocouples but no low pass filter or CJ type choices of local or remote). Second CJ reference Board point signal (similar configuration as for thermocouples but no low pass filter or CJ type choices of local or remote).
ColdJunc1
As above (input FLOAT)
ColdJunc2
As above (input FLOAT)
Board Points (Signals) L3DIAG_VTCC1 L3DIAG_VTCC2 L3DIAG_VTCC3 SysLim1TC1 : SysLim1TC24 SysLim1CJ1 SysLim1JC2 SysLim2TC1 : SysLim2TC24 SysLim2CJ1 SysLim2CJ2 CJ Backup CJ Remote 1 CJ Remote 2 ThermCpl1 : ThermCpl24 ColdJunc1 ColdJunc2
Description-Point Edit (Enter Signal Connection Name) Board diagnostic Board diagnostic Board diagnostic System limit 1 for thermocouple : System limit 1 for thermocouple System limit 1 for CJ System limit 1 for CJ System limit 2 for thermocouple : System limit 2 for thermocouple System limit 2 for CJ System limit 2 for CJ CJ backup CJ remote 1 CJ remote 2 Thermocouple reading : Thermocouple reading CJ for thermocouples (TC) 1-12 CJ for TCs 13-24
Direction Type Input Input Input Input Input Input Input Input Input Input Input Input Input Output Output Output Input Input Input Input Input BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT
Alarms
Fault Fault Description Flash Memory CRC Failure CRC failure override is Active System Limit Checking is Disabled Board ID Failure J3 ID Failure J4 ID Failure. J5 ID Failure J6 ID Failure J3A ID Failure J4A ID Failure Firmware/Hardware Incompatibility Possible Cause Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online) System checking was disabled by configuration. Failed ID chip on the VME I/O board Failed ID chip on connector J3, or cable problem Failed ID chip on connector J4, or cable problem Failed ID chip on connector J5, or cable problem Failed ID chip on connector J6, or cable problem Failed ID chip on connector J3A, or cable problem Failed ID chip on connector J4A, or cable problem Invalid terminal board connected to VME I/O board
2 3 16 17 18 19 20 21 22 23 24 30
ConfigCompatCode mismatch; Firmware: [ ] ; Tre: [ ] The A tre file has been installed that is incompatible configuration compatibility code that the firmware is with the firmware on the I/O board. Either the tre expecting is different than what is in the tre file for this board file or firmware must change. Contact the factory. IOCompatCode mismatch; Firmware: [ ]; Tre:[ ] The I/O compatibility code that the firmware is expecting is different than what is in the tre file for this board Thermocouple [ ] Raw Counts High. The [ ] thermocouple input to the analog to digital converter exceeded the converter limits and will be removed from scan Thermocouple [ ] Raw Counts Low. The [ ] thermocouple input to the analog to digital converter exceeded the converter limits and will be removed from scan A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. A condition such as stray voltage or noise caused the input to exceed +63 millivolts. The board has detected a thermocouple open and has applied a bias to the circuit driving it to a large negative number, or the TC is not connected, or a condition such as stray voltage or noise caused the input to exceed -63 millivolts. The CJ device on the terminal board has failed.
31
32-55
56-79
80,81
Cold Junction [ ] Raw Counts High. CJ device number [ ] input to the A/D converter has exceeded the limits of the converter. Normally two CJ inputs are averaged; if one is detected as bad then the other is used. If both CJs fail, a predetermined value is used Cold Junction [ ] Raw Counts Low. CJ device number [ ] input to the A/D converter has exceeded the limits of the converter. Normally two CJ inputs are averaged; if one is detected as bad then the other is used. If both CJs fail, a predetermined value is used Calibration Reference [ ] Raw Counts High. Calibration Reference [ ] input to the A/D converter exceeded the converter limits. If Cal. Ref. 1, all even numbered TC inputs will be wrong; if Cal. Ref. 2, all odd numbered TC inputs will be wrong Calibration Reference [ ] Raw Counts Low. Calibration Reference [ ] input to the A/D converter exceeded the converter limits. If Cal. Ref. 1, all even numbered TC inputs will be wrong; if Cal. Ref. 2, all odd numbered TC inputs will be wrong Null Reference [ ] Raw Counts High
82,83
The CJ device on the terminal board has failed.
84,85
86,87
88,89
The null reference voltage signal on the board has failed.
Fault
Fault Description Null Reference [ ] Raw Counts Low. The null (zero) reference number [ ] input to the A/D converter has exceeded the converter limits. If null ref. 1, all even numbered TC inputs will be wrong; if null ref. 2, all odd numbered TC inputs will be wrong Thermocouple [ ] Linearization Table High. The thermocouple input has exceeded the range of the linearization (lookup) table for this type. The temperature will be set to the table's maximum value
Possible Cause The null reference voltage signal on the board has failed.
90,91
92-115
The thermocouple has been configured as the wrong type, or a stray voltage has biased the TC outside of its normal range, or the CJ compensation is wrong.
116- 139 Thermocouple [ ] Linearization Table Low. The thermo -
The thermocouple has been configured as the couple input has exceeded the range of the linearization wrong type, or a stray voltage has biased the TC (lookup) table for this type. The temperature will be set to the outside of its normal range, or the CJ table's minimum value compensation is wrong. A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable. A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable.
160- 255 Logic Signal [ ] Voting mismatch 256- 281 Input Signal [ ] Voting mismatch, Local [ ], Voted [ ]. The
specified input signal varies from the voted value of the signal by more than the TMR Diff Limit
TBTC Thermocouple Input

The Thermocouple Input (TBTC) terminal board accepts 24-type E, J, K, S, or T thermocouple inputs. It accepts additional B, N and R types of thermocouple inputs only when used with PTCCH2 in Mark VIe. These inputs are wired to two barriertype blocks on the terminal board. TBTC communicates with the I/O processor through DC-type connectors. Two types of the TBTC are available, as follows: TBTCH1C for simplex applications has two DC-type connectors. TBTCH1B for TMR applications has six DC-type connectors.
Mark VI Systems
In the Mark VI system, TBTC works with the VTCC processor and supports simplex and TMR applications. One TBTCH1C connects to the VTCC with two cables. In TMR systems, TBTCH1B connects to three VTCC boards with six cables.
Mark VIe Systems

In the Mark VIe system, TBTC works with the PTCC I/O pack and supports simplex, dual, and TMR applications. In simplex systems, two PTCC packs plug into the TBTCH1C for a total of 24 inputs. With the TBTCH1B, one, two, or three PTCC packs can be connected, supporting a variety of system configurations. Simplex pack 12 inputs Simplex packs 24 inputs TMR packs 12 inputs
The Thermocouple Input (TBTC) terminal board accepts 24-type E, J, K, S, or T thermocouple inputs for PTCCH1 pack and 24-type E, J, K, S,T,B,N or R thermocouple inputs for PTCCH2 pack.
TBTCH1C Terminal Board Simplex
x
TBTCH1B Terminal Board TMR

x
12 TC Inputs
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
TBTCH1C, capacity for 24 thermocouple inputs
J ports:
JA1
Plug in PTCC I/O Pack(s) for Mark VIe system or
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
JTA JTB
TBTCH1B, capacity for 24 thermocouple inputs (with Packs only 12 inputs)
JSA JSB
x x x
12 TC Inputs
x x x x x x x x x x
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47 x
Cables to VTCC boards for Mark VI system;

JB1
For TBTCH1B the number and location of PTCC I/O points depends on the level of redundancy required.
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
JRA JRB
Shield Bar Ground
BarrierType Terminal Blocks can be unplugged from board for maintenance
Shield Bar Ground
BarrierType Terminal Blocks can be unplugged from board for maintenance
Thermocouple Terminal Board, I/O Processor, and Cabling
Installation
Connect the thermocouple wires directly to the two I/O terminal blocks. These removable blocks are mounted on the terminal board and held down with two screws. Each block has 24 terminals accepting up to #12 AWG wires. A shield terminal strip attached to chassis ground is located on the left side of each terminal block. In Mark VI systems, cable the TBTC J-type connectors to the I/O processors in the VME rack. In Mark VIe systems, plug the I/O packs directly into the TBTC J-type connectors. The number of cables or I/O packs depends on the level of redundancy required.
Operation
The 24 thermocouple inputs can be grounded or ungrounded. They can be located up to 300 m (984 ft) from the turbine control panel with a maximum two-way cable resistance of 450 . TBTC features high-frequency noise suppression and two CJ reference devices, as shown in following figure. The I/O processor performs the analog-to-digital conversion and the linearization for individual thermocouple types. In Mark VI simplex systems using TBTCH1C, one VTCC is used. In Mark VIe simplex systems, two PTCC packs plug into TBTC, obtaining 24 thermocouple inputs.
Terminal Board TBTCH1C Thermocouple I/O Processor Cold Junction Reference Excitation I/O Processor is either remote (Mark VI) or local (Mark VIe)
JA1
Thermocouple
High Noise Low Suppression
(12) thermocouples
ID
A/D Conv
Processor
Cold Junction Reference
JB1
Thermocouple
JB1 cables to I/O controller High Noise Low Suppression (12) thermocouples
ID
Thermocouple Inputs and I/O Processor, Simplex
For TMR systems using TBTCH1B, the thermocouple signals fan out to three Jconnectors. The Mark VI system accommodates 24 inputs and the Mark VIe system accommodates 12 inputs. The TBTC terminal board supports all thermocouple spans documented for the associated thermocouple I/O processor.
Termination Board TBTCH1B JRB
ID Cold Junc. Refer.
Thermocouple I/O Processor Excitation. <R> I/O Processor is either remote (Mark VI) or local (Mark VIe)
Thermocouple
High Low
NS
Noise Suppression
JSB
ID
(12) thermocouples JTB

ID
A/D Conv.
Processor
JRA
Cold Junc. Refer. ID
Thermocouple
High Low
NS
JSA
ID
(12) thermocouples
JTA
ID
Other selected J-ports cable to I/O Processor VTCC for Mark VI systems, or connect PTCC I/O Packs for Mark VIe, for <S> and <T>.
Thermocouple Inputs and I/O Processor, TMR systems
Cold Junctions
The CJ signals go into signal space and are available for monitoring. Normally the average of the two is used. Acceptable limits are configured, and if a CJ goes outside the limit, a logic signal is set. A 1 F error in the CJ compensation will cause a 1 F error in the thermocouple reading. Hard-coded limits are set at -40 to 85C (-40 to +185 F), and if a CJ goes outside this, it is regarded as bad. Most CJ failures are open or short circuit. If the CJ is declared bad, the backup value is used. This backup value can be derived from CJ readings on other terminal boards, or can be the configured default value (refer to signals in the section, Configuration).
Specifications
Item Number of channels Thermocouple types Specification 24 channels per terminal board E, J, K, S, T thermocouples, and mV inputs if TBTC is connected to PTCCH1 or VTCCH1 E, J, K, S, T, B, N ,R thermocouples, and mV inputs if TBTC is connected to PTCCH2 or VTCCH2 Span Cold junction compensation Cold junction temperature accuracy Fault detection -8 mV to +45 mV if TBTC is connected to PTCCH1 or VTCCH1 -20 mV to +95 mV if TBTC is connected to PTCCH2 or VTCCH2 Reference junction temperature measured at two locations on each H1C terminal board TMR H1B board has six CJ references. Only three available with Mark VIe I/O packs. CJ accuracy 1.1C (2 F) High/low (hardware) limit check Monitor readings from all TCs, CJs, calibration voltages, and calibration zero readings.
Diagnostics
Diagnostic tests to components on the terminal boards are as follows: Each thermocouple type has hardware-limit checking based on preset (nonconfigurable) high and low levels set near the ends of the operating range. If this limit is exceeded, a logic signal is set and the input is no longer scanned. If any one of the inputs hardware limits is set, it creates a composite diagnostic alarm. Each terminal board connector has its own ID device that is interrogated by the I/O board. The board ID is coded into a read-only chip containing the terminal board serial number, board type, revision number, and the J connector location. If a mismatch is encountered, a hardware incompatibility fault is created. When operating with the I/O processor a very small current is injected into each thermocouple path. This is done to detect open circuits and is of a polarity to create a low temperature reading should a thermocouple open.
DTTC Simplex Thermocouple Input

The Simplex Thermocouple Input (DTTC) terminal board is a compact terminal board designed for DIN-rail mounting. The board has 12 thermocouple inputs and connects to the VTCC thermocouple processor board with a single 37-pin cable. This cable is identical to the one used on the larger TBTC terminal board. The on-board signal conditioning and CJ reference are identical to those on the TBTC board.
Note An on-board ID chip identifies the board to the VTCC for system diagnostic purposes.
Two DTTC boards can be connected to the VTCC for a total of 24 inputs. Highdensity Euro-Block type terminal blocks are permanently mounted to the board with two screw connections for the ground connection (SCOM). Every third screw connection is for the shield. Only the simplex version of the board is available. The terminal boards can be stacked vertically on the DIN-rail to conserve cabinet space.
Note The DTTC board does not work with the PTCC I/O pack.
Installation
Note Shield screws are provided on this board and are internally connected to SCOM.
Mount the plastic holder on the DIN-rail and slide the DTTC board into place. Connect the thermocouples wires directly to the terminal block. The Euro-Block type terminal block has 42 terminals and is permanently mounted on the terminal board. Typically #18 AWG wires are used. Two screws, 41 and 42, are provided for the SCOM (ground) connection, which should be as short a distance as possible.
DIN Thermocouple Terminal Board DTTC
Screw Connections Input 1 (-) Input 2 Shld Input 2 (-) Input 3 (-) Input 4 Shld Input 4 (-) Input 5 (-) Input 6 Shld Input 6 (-) Input 7 (-) Input 8 Shld Input 8 (-) Input 9 (-) Input 10 Shld Input 10 (-) Input 11 (-) Input 12 Shld Input 12 (-) 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41
Screw Connections Input 1 (+) Input 1 Shld Input 2 (+) Input 3 (+) Input 3 Shld Input 4 (+) Input 5 (+) Input 5 Shld Input 6 (+) Input 7 (+) Input 7 Shld Input 8 (+) Input 9 (+) Input 9 Shld Input 10 (+) Input 11 (+) Input 11 Shld Input 12 (+) Chassis Ground
JA1
Cable to J3 connector in I/O rack for the VTCC board
Chassis Ground
SCOM
DTTC Wiring and Cabling
Operation
VTCC provides excitation for the CJ reference on DTTC. The 12 thermocouple signals, the CJ signal, and the connection to the identity chip (ID) come through connector JA1 and are cabled to the VME control rack R. The following figure shows DTTC connected to VTCC, which contains the A/D converter.
<R> Control Rack Thermocouple Input Board VTCC
DTTC Terminal Board Local CJ reference (1)
JA1
J3
Excitation 24 Thermocouples
Thermocouple
1 Pos 2 Neg
Noise Suppression
Remote CJ references
3 Shld SCOM (12) thermocouples ID Connectors at bottom of VME rack J4 Excit. I/O Core Processor TMS320C32 Connector for cable from second DTTC terminal board Sampling type A/D converter
A/D
Processor
VMEbus
DTTC and VTCC for Thermocouple Inputs
Specifications
Item Specification
Number of Channels Cold junction compensation Cold junction temperature accuracy Fault detection
12 channels per terminal board Reference junction temperature measured at one location CJ accuracy 1.1C (2 F) High/low (hardware) limit check. Check ID chip on J3 connector.
Diagnostics
Diagnostic tests are made on the terminal board as follows: Each thermocouple type has hardware limit checking based on preset (nonconfigurable) high and low levels set near the ends of the operating range. If VTCC finds this limit is exceeded a logic signal is set and the input is no longer scanned. If any one of the input hardware limits is set it creates a composite diagnostic alarm, L3DIAG_VTCC, referring to the entire board. Each terminal board cable has its own ID device that is interrogated by VTCC. The board ID is coded into a read-only chip containing the terminal board serial number, board type, and revision number. If a mismatch is encountered, a hardware incompatibility fault is created. When operating with the I/O processor a very small current is injected into each thermocouple path. This is done to detect open circuits and is of a polarity to create a high temperature reading should a thermocouple open.
Details of the individual diagnostics are available from the toolbox. The diagnostic signals can be individually latched, and then reset with the RESET_DIA signal.
Configuration
VTUR Turbine Specific Primary Trip

VTUR Primary Turbine Protection
The Primary Turbine Protection (VTUR) board, has the following functions: Measures the turbine speed with four passive pulse rate devices and passes the signal to the controller, which generates the primary overspeed trip Provides automatic generator synchronizing and closes the main breaker Monitors induced shaft voltage and current Monitors eight Geiger-Mueller flame detectors on gas turbine applications. The detectors connect to TRPG and use 335 V dc, 0.5 mA from an external supply. Controls three primary overspeed trip relays on the TRPx terminal board. The controller generates the trip signal, which is sent to VTUR and then to TRPx to trip the emergency solenoids. The turbine overspeed trip can come from VTUR or VPRO. TRPx contains nine magnetic relays to interface with three trip solenoids, known as the electrical trip devices (ETD). Nine relays are used in TMR systems, three in simplex systems.
Board Versions
There are two board versions as follows: VTURH1 drives three trip solenoids using one TRPx board and accepts eight flame detectors VTURH2 is a two-slot version that drives six trip solenoids using two TRPx boards, but only accepts eight flame detectors
VTUR Turbine Specific Primary Trip 403
TTURH1B Terminal Board Breakers Generator volts Bus volts Shaft volts Shaft current 37-pin "D" shell type connectors with latching fasteners
VTUR VME Board

x RUN FAIL STAT
x
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
JT1
JT5 JS1
Cables to VME rack T VME bus to VCMI
Magnetic speed pickups (12)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
JS5 Cables to VME rack S JR1 JR5

VTUR x
J 5
J3 TB3 x
Shield bar
Wiring to TTL speed pickups
J4
Barrier type terminal blocks can be unplugged from board for maintenance Cable to TRPG
Cables to VME rack R
VTUR Turbine Control Board, Terminal Boards, and Cabling
Installation
Note Cable connections to the terminal boards are made at the J3 connector on the lower portion of the VME rack. These are latching type connectors to secure the cables. Cable connection to the J5 connector on TTUR is made from J5 on the front panel. The cable to TRPG connects at J4. Power up the VME rack and check the diagnostic lights at the top of the front panel, for details refer to the section on diagnostics in this document.
404 VTUR Turbine Specific Primary Trip
Operation
In simplex applications, up to four pulse rate signals can be used to measure turbine speed. Generator and bus voltages are brought into VTUR for automatic synchronizing in conjunction with the turbine controller and excitation system. TTUR has permissive generator synchronizing relays and controls the main breaker relay coil 52G. Shaft voltage is picked up with brushes and monitored along with the current to the machine case.
Note VTUR contains the pulse rate to digital circuits. VTUR alarms high voltages and tests the integrity and continuity of the circuitry.
The following figures show the VTUR simplex and TMR turbine speed inputs and generator synchronizing circuits.
TTURH1B Terminal Board (input portion) JR1 NS <R> Control Rack J3 Turbine
Board
Generator Breaker 52G feedback a Terminal Board TTURH1B (continued) 28Vdc JR1
TMR SMX
Gen. volts 120 V ac from PT Bus volts 120 Vac from PT
GENH
17 suppression 18
02
01
VTUR
Pulse Rate MUX ID A/D Ac&Dc Shaft test
Trip
solenoids
GENL
J3
JP1 K25P RD
Mon
BUSH
19 20
Synch. Perm.
NS
BUSL
TMR SMX
To TPRO
SVH
JP2 K25 RD
Mon
Auto Synch
21 22
175V
SVL
NS
Flame sensors
K25A
Synch. check from VPRO
Shaft
SCH
J5
23
J4 NS
Mon
14V
SCL
24 5 (TB3) 41 42 ) )
Machine case #1 Primary Magnetic Speed PU
TTL1_R MPU1RH MPU1RL TTL2_R
JR5
J8
08
06,7 05
04
03
NS
6 (TB3) 43 44 45 46 47 48
Trip signals to TRPG

ID
B K R H
M A N
A U T O P125Gen
#2 Primary Magnetic Speed PU #3 Primary Magnetic Speed PU #4 Primary Magnetic Speed PU
MPU2RH MPU2RL
NS
Filter Clamp AC Coupling Filter Clamp AC Coupling Filter Clamp AC Coupling
NS
NS
Note 1: TTL option only available on first two Speed pickups. 52G Note 2: An external normally b closed auxiliary breaker contact must be provided in Breaker coil the breaker close coil circuit as indicated. N125Gen Note 3: Signal to K25A comes from TREG/VPRO through TRPG & VTUR.
VTUR Turbine Speed Inputs and Generator Synchronizing on TTUR, Simplex
Gen. Volts 120 Vac from PT
GENH
Noise 17 Suppression 18
JR1
J3 VTUR J3
f( ) Pulse Rate/ Digital
JR1 JP1
2 RD 3
NS
28Vdc
TMR SMX
GENL
K25P
J3
Bus Volts 120 Vac from PT
BUSH
19 20
JS1
MUX A/D AC&DC shaft test

Trip solenoids
NS
JS1
Synch. Permissve
BUSL
JP2
TMR SMX
To TPRO
SVH
J3
JT1
2 RD 3
K25
Auto Synch.
21 22
175V
SVL
NS
JT1
Flame sensors
K25A J4
Shaft
SCH
J5
23
Mon NS
Connectors at bottom of VME rack JR5
BKRH
14V
SCL TTL1R MPU1RH
24 5 (TB3) 41
)
J8
08
07 06
Machine Case
05 MAN
04 AUTO
B52GH
B52GL
Terminal Board TTURH1B (input portion)
<T> <S> <R>

Turbine Board
Generator Breaker Feedback Terminal Board TTURH1B (continued)
52G a
02
01
03
#1 Primary Magnetic Speed PU
MPU1RL
42
NS
4 Circuits*
Trip Signals to TRPG JS5 Note 1: TTL option only available on first two circuits. of each group of 4 pickups*.
TTL1S
3 (TB3) 33 34
) Filter Clamp AC Coupling
P125Gen 52G b Bkr Coil
MPU1SH
NS
MPU1SL
4 Circuits*
TTL1T
1 (TB3) 25 26
MPU1TH
MPU1TL
NS
4 Circuits*
Note 2: An external normally closed auxiliary breaker JT5 contact must be provided in To Rack S the Breaker close coil circuit as indicated. Note 3: Signal to K25A comes from TREG/VPRO through TRPG & VTUR. To Rack T
N125Gen
VTUR Turbine Speed Inputs and Generator Synchronizing, TMR
Speed Pickups
Note The median speed signal is used for speed control and for the primary overspeed trip signal.
VTUR interfaces with four passive, magnetic speed inputs with a frequency range of 2 to 20,000 Hz. Using passive pickups on a sixty- tooth wheel, circuit sensitivity allows detection of 2-RPM turning gear speed to determine if the turbine is stopped (zero speed). If automatic turning gear engagement is provided in the turbine control, this signal initiates turning gear operation.
The primary overspeed trip calculations are performed in the controller using algorithms similar to (but not the same as) those in the VPRO protection board. The fast trip option used on gas turbines runs in VTUR.
Primary Trip Solenoid Interface

The normal primary overspeed trip is calculated in the controller and passed to the VTUR and then to the chosen primary trip terminal board. TRPx contains relays to interface with the ETDs. TRPx typically works in conjunction with an emergency trip board (TREx) to form the primary and emergency sides of the interface to the ETDs. VTUR supports up to three ETDs driven from each TRPx/TREx combination. VTUR supports the following trip boards: TRPG is targeted at gas turbine applications and works in conjunction with the TREG board for emergency trip. TRPS is used for small and medium size steam turbine systems and works in conjunction with the TRES board for emergency trip. TRPL is intended for large steam turbine systems and works in conjunction with the TREL board for emergency trip.
Note Additional trip boards are being developed for other specific applications.
To support trip board operation, VTUR provides discrete inputs used to monitor signals such as trip relay position, synchronizing relay coil drive, and ETD power status.
Fast Overspeed Trip

In special cases where a faster overspeed trip system is required, the VTUR Fast Overspeed Trip algorithms can be enabled. The system employs a speed measurement algorithm using a calculation for a predetermined tooth wheel. Two overspeed algorithms are available as follows:
PR_Single uses two redundant VTURs by splitting up the two redundant PR transducers, one to each board. PR_Single provides redundancy and is the preferred algorithm for LM gas turbines. PR_Max uses one VTUR connected to the two redundant PR transducers. PR_Max allows broken shaft and deceleration protection without the risk of a nuisance trip if one transducer is lost.
The fast trips are linked to the output trip relays with an OR-gate. VTUR computes the overspeed trip instead of the controller, so the trip is very fast. The time from the overspeed input to the completed relay dropout is 30 ms or less.
Input, PR1 PR1Type, PR1Scale

2
Firmware
Scaling RPM d RPM/sec dt ------ Four Pulse Rate Circuits ------- RPM RPM/sec Accel1 RPM Accel2 Accel3 RPM/sec Accel4 RPM RPM/sec Fast Overspeed Protection
Signal Space Inputs

PulseRate1 Accel1 PulseRate2 Accel2 PulseRate3 Accel3 PulseRate4 Accel4
PulseRate2 PulseRate3 PulseRate4
FastTripType PR1Setpoint PR1TrEnable PR1TrPerm PR2Setpoint PR2TrEnable PR2TrPerm PR3Setpoint PR3TrEnable PR3TrPerm PR4Setpoint PR4TrEnable PR4TrPerm InForChanA AccASetpoint AccelAEnab AccelAPerm InForChanB AccBSetpoint AccelBEnab AccelBPerm ResetSys, VCMI, Mstr
PR_Single
PulseRate1 A A>B B PulseRate2 A A>B B PulseRate3 A A>B B PulseRate4 A A>B B
S R S R
FastOS1Trip
FastOS2Trip
S R
FastOS3Trip
S R
FastOS4Trip
Accel1 Accel2 Input Accel3 cct. Accel4 select
AccelA
A A>B B
S R
AccATrip
Accel1 Accel2 Input Accel3 cct. Accel4 select
AccelB
A A>B B
S R
AccBTrip Fast Trip Path False = Run
OR Primary Trip Relay, normal Path, True= Run Primary Trip Relay, normal Path, True= Run
PTR1 PTR1_Output PTR2 PTR2_Output PTR3 PTR3_Output PTR4 PTR4_Output PTR5 PTR5_Output PTR6 PTR6_Output
AND
True = Run
Output, J4,PTR1 Output, J4,PTR2 Output, J4,PTR3 Output, J4A,PTR4 Output, J4A,PTR5 Output, J4A,PTR6
AND True = Run True = Run
-------------Total of six circuits -----
True = Run True = Run True = Run
Fast Overspeed Algorithm, PR-Single
Input, PR1 PR1Type, PR1Scale

2
Scaling
Firmware
PulseRate1 RPM RPM/sec d RPM dt Accel1 Four Pulse Rate Circuits ------RPM/sec -----Accel2 RPM Accel3 RPM/sec Accel4 RPM RPM/sec
Signal Space inputs

PulseRate1 Accel1 PulseRate2 Accel2 PulseRate3 Accel3 PulseRate4 Accel4
PulseRate2 PulseRate3 PulseRate4
FastTripType DecelPerm DecelEnab DecelStpt InForChanA InForChanB
PR_Max
Fast Overspeed Protection
PulseRate1 PulseRate2 PulseRate3 PulseRate4
Accel1 Accel2 Accel3 Accel4
Input AccelA Neg cct. Select AccelB Neg for AccelA PulseRateA A and A>B AccelB PulseRateB B MAX
A AB B S R FastOS1Trip
PulseRate1 FastOS1Stpt FastOS1Enab FastOS1Perm PulseRate2
PR3/4Max PulseRate3 FastOS2Stpt FastOS2Enab FastOS2Perm PulseRate4 MAX A A>B B S R FastOS2Trip
PR1/2Max DiffSetpoint DiffEnab DiffPerm ResetSys, VCMI, Mstr PR3/4Max
A |A-B| B
N/C N/C A A>B B S R
FastOS3Trip FastOS4Trip FastDiffTrip
OR
Fast Trip Path False = Run True = Run Output, J4,PTR1
PTR1 PTR1_Output PTR2 PTR2_Output PTR3 PTR3_Output PTR4 PTR5 PTR5_Output PTR6 PTR6_Output
Primary Trip Relay, normal Path, True= Run Primary Trip Relay, normal Path, True= Run
AND AND
True = Run True = Run
Output, J4,PTR2 Output, J4,PTR3 Output, J4A,PTR4 Output, J4A,PTR5 Output, J4A,PTR6
-------------Total of six circuits ---------
True = Run True = Run True = Run
Fast Overspeed Algorithm, PR-Max
Shaft Voltage and Current Monitor

Bearings can be damaged by the flow of electrical current from the shaft to the case. This current can occur for several reasons: A static voltage can be caused by droplets of water being thrown off the last stage buckets in a steam turbine. This voltage builds up until a discharge occurs through the bearing oil film. An ac ripple on the dc generator field can produce an ac voltage on the shaft with respect to ground through the capacitance of the field winding and insulation. Note that both of these sources are weak, so high impedance instrumentation is used to measure these voltages with respect to ground. A voltage can be generated between the ends of the generator shaft due to dissymmetries in the generator magnetic circuits. If the insulated bearings on the generator shaft breakdown, the current flows from one end of the shaft through the bearings and frame to the other end. Brushes can be used to discharge damaging voltage buildup, and a shunt should be used to monitor the current flow.
The turbine control continuously monitors the shaft to ground voltage and current, and alarms excessive levels. There is an ac test mode and a dc test mode. The ac test applies an ac voltage to test the integrity of the measuring circuit. The dc test checks the continuity of the external circuit, including the brushes, turbine shaft, and the interconnecting wire.
Note The dc test is driven from the R controller only. If the R controller is down, this test cannot be run successfully.
Flame Detectors
When used with TRPG, VTUR monitors signals from eight Geiger-Mueller flame detectors. With no flame present, the detector charges up to the supply voltage. The presence of the flame causes the detector to charge to a level and then discharge through TRPG. As the flame intensity increases the discharge frequency increases. When the detector discharges, VTUR and TRPG convert the discharged energy into a voltage pulse. The pulse rate varies from 0 to 1,000 pulses/sec. These voltage pulses are fanned out to all three modules. Voltage pulses above 2.5 V generate a logic high, and the pulse rate over a 40 ms time period is measured in a counter.
Automatic Synchronizing
All synchronizing connections are located on the TTUR terminal board. The generator and bus voltages are provided by two, single phase, potential transformers (PTs) with a fused secondary output supplying a nominal 115 V rms. Measurement accuracy between the zero crossing for the bus and generator voltage circuits is 1 degree. Turbine speed is matched against the bus frequency. The generator and bus voltages are matched by adjusting the generator field excitation voltage from commands sent between the turbine controller and the EX2000 over the Unit Data Highway (UDH). A command is given to close the breaker when all permissions are satisfied. The breaker is predicted to close within the calculated phase/slip window. Feedback of the actual breaker closing time is provided by a 52G/a contact from the generator breaker (not an auxiliary relay) to update the database. An internal K25A sync check relay is provided on the TTUR; the independent backup phase/slip calculation for this relay is performed in the protection module. Diagnostics monitor the relay coil and contact closures to determine if the relay properly energizes or de-energizes upon command.
Synchronizing Modes
There are three basic synchronizing modes. Traditionally, these modes are selected from a generator panel mounted selector switch:
Off The breaker cannot be closed by the controller. The check relay will not pick up. Manual The operator initiates breaker close, which is still subject to the K25A Sync Check contacts driven by the VPRO. The manual close is initiated from an external contact on the generator panel, normally connected in series with a sync mode in manual contact. Auto The system automatically matches voltage and speed, and then closes the breaker at the right time to hit top dead center on the synchroscope. All three of the following functions must agree for this closure to occur:
K25A - sync check relay, checks the allowable slip/phase window, from VPRO K25 - auto sync relay, provides precision synchronization, from VTUR
K25P - sync sequence permissive, checks the turbine sequence status, from VTUR The K25A relay should close before the K25 or else the sync check function will interfere with the auto sync optimizing. If this sequence is not executed, a diagnostic alarm is posted, a lockout signal is set true in signal space, and the application code may prevent any further attempts to synchronize until a reset is issued and the correct coordination is set up. Details of the various checks are discussed in the following sections.
Sync Check
The K25A sync check function is based on phase lock loop techniques. The VPRO performs the calculations for this function, but interfaces to the breaker close circuit are located on the TTUR board, not TPRO. Limit checks are performed against adjustable constants as follows: Generator under-voltage Bus under-voltage Voltage error Frequency error (slip), with a maximum value of 0.33 Hz, typically set to 0.27 Hz Phase error with a maximum value of 30 , typically set to 10 .
In addition, sync check arms logic to enable the function, and provides bypass logic for deadbus closure. The sync window below is based on typical settings:
SLIP +0.27 Hz
-10 -0.27 Hz
+10
PHASE Degrees
Typical Sync Window
Auto Sync
The Auto Sync K25 function uses zero voltage crossing techniques. It compensates for the breaker time delay, which is defined by two adjustable constants with logic selection between the two (for two breaker applications). VTUR performs the calculations for phase, slip, acceleration, and anticipated time lead for the breaker delay. The time delay parameter is adjusted (up to certain limits) based on the measured breaker close time. In addition, auto sync arms logic to enable the function, and bypasses logic to provide for deadbus or manual closure. The auto sync projected sync window is shown below, where positive slip indicates that the generator frequency is higher than the bus frequency.
SLIP 0.3 Hz 0.12 Hz Gen. Lag 0 10 Gen. Lead (phase degrees)
Auto Sync Projected Window
The projected window is based on current phase, current slip, and current acceleration. The generator must currently be lagging and have been lagging for the last 10 consecutive cycles, and projected (anticipated) to be leading when the breaker actually reaches closure. Auto sync does not allow the breaker to close with negative slip; speed matching typically aims at around + 0.12 Hz slip.
Synchronization Display
A special synchronization screen is available on the HMI with a real-time graphical phase display and control pushbutton. The display items are listed in table.
Sync Display
Dynamic Parameters
Description
Voltages: Frequencies: Phase: Generator, Bus, Difference Generator, Bus, Slip (difference) Difference angle, degrees Sync OFF, MANUAL, AUTO OFF, ON
Status Indication
Mode: Sync Monitor:
Dead bus breaker: Open/close Second breaker if applicable: Open/close Sync permissive: K25P Auto sync enabled Speed adjust: Voltage adjust: Raise/lower Raise/lower
Sync Display
Sync Permissive
Description
Gen voltage: Bus voltage: OK/not OK OK/not OK
Gen frequency: OK/not OK Bus frequency: OK/not OK Difference volts: OK/not OK Difference frequ:OK/not OK Phase: Limit Constants Breaker Performance K25, OK/not OK K25A, OK/not OK Upper and lower limits for the above permissive Diagnostics: Slow check relay Sync relay lockup Breaker #1 close time out of limits Breaker #2 close time out of limits Relay K25P trouble Breaker closing voltage (125 V dc) missing Control Pushbuttons Sync monitor: ON, OFF Speed adjust: RAISE, LOWER Voltage adjust:RAISE, LOWER
Specifications
Item
Number of inputs
Specification
4 passive speed pickups 1 shaft voltage and 1 current measurement 1 generator and 1 bus voltage Generator breaker status 8 flame detectors from first TRPG
Number of outputs
Synch permissive and Auto synch relays. Primary trip solenoid interface, 3 outputs to TRPx Additional 3 trip outputs from second TRPx using VTURH2
MPU pulse rate range MPU pulse rate accuracy Shaft voltage monitor Shaft voltage wiring Shaft voltage dc test
2 Hz to 20 kHz 0.05% of reading Signal is frequency of 5 V dc (0 1 MHz) pulses from 0 to 2,000 Hz Up to 300 m (984 ft), with maximum two-way cable resistance of 15 Applies a 5 V dc source to test integrity of the external turbine circuit and measures dc current flow. Circuit computes a differential resistance between 0 and 150 within 5 and compares against shunt limit and brush limit. Readings above 50 indicate a fault. Return signal is filtered to provide 40 dB of noise attenuation at 60 Hz. Applies a test voltage of 1 kHz to the input of the VTUR shaft voltage circuit (R module only). Shaft voltage monitor circuit on R, S, and T displays an offset of 1000 Hz from normal reading. Measures shaft current in amps ac (shunt voltage up to 0.1 V pp) Two single phase potential transformers, with secondary output supplying a nominal 115 V rms Each input has less than 3 VA of loading Allowable voltage range for synch is 75 to 130 V rms Each PT input is magnetically isolated with a 1,500 V rms barrier Cable length can be up to 1,000 ft. of 18 AWG wiring
MPU input circuit sensitivity 27 mV pk (detects 2 rpm speed)
Shaft voltage ac test
Shaft current input Generator and bus voltage sensors
Item
Synchronizing measurements
Specification
Frequency accuracy 0.05% over 45 to 66 Hz range Zero crossing of the inputs is monitored on the rising slope Phase difference measurement is better than 1 degree 20 V dc indicates high and 6 V dc indicates low Each circuit is optically isolated and filtered for 4 ms 6 per VTURH2 (3 per TRPx terminal board) 3 per VTURH1 8 per VTUR
Contact voltage sensing Trip solenoids Flame detectors
Diagnostics
Three LEDs at the top of the VTUR front panel provide status information. The normal RUN condition is a flashing green, FAIL is a solid red. The third LED is STATUS and is normally off but shows a steady orange if a diagnostic alarm condition exists in the board. VTUR makes diagnostic checks including: If feedback from the solenoid relay drivers differs with the control signal a fault is created If feedback from the relay contacts differs with the control signal a fault is created Loss of solenoid power creates a fault High and low flame detector voltage creates a fault Slow synch check relay, slow auto synch relay, and locked up K25 relay; all of these condition creates a fault If any one of the above signals goes unhealthy, a composite diagnostic alarm L3DIAG_VTUR occurs. The diagnostic signals can be individually latched and then reset with the RESET_DIA signal if they go healthy Terminal board connectors JR1, JS1, JT1, JR5, JS5, JT5 have their own ID device that is interrogated by the I/O board. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read by VTUR and a mismatch is encountered, a hardware incompatibility fault is created
Configuration
Parameter Description
Select system limits Select Simplex or TMR system Select acceleration calculation type Select Fast Trip algorithm TTUR connected to VTUR through J3 and J5 Pulse rate input 1 - board point Select Speed or Flow type input Select pulses per revolution Select whether alarm will latch
Choices
Enable, disable Simplex or TMR Slow, medium, fast Unused, PR_Single, PR_Max Connected, not connected Point edit (input FLOAT) Unused, speed, flow, Speed_LM 0 to 1,000 Enable, disable Latch, not latch
Configuration
VTUR system limits SMredundancy AccelCalType FastTripType
J3J5:IS200TTURH1A PulseRate1
PRType PRScale SysLim1Latch
SysLim1Enable Select system limit 1
Parameter
SysLim1Type SysLimit1 SysLim2Enable TMRDiffLimit
Description
Select type of alarm initiation Select alarm level in GPM or RPM Select system limit 2 (as above) Difference limit for voted PR inputs EU Shaft voltage monitor - board point Select System Limit 1 Select whether alarm will latch Select type of alarm initiation Select alarm level in frequency Select system limit 2 (as above) Shaft current monitor - board point Shunt resistance Shunt maximum ohms Shaft brush maximum ohms Select system limit 1 Select whether alarm will latch Select type of alarm initiation Select alarm level in amps Select system limit 2 Generator potential transformer - board point PT input in kVrms for PT output PT output in Vrms, nominal 115 V rms Select alarm level in kVrms Select alarm level in kVrms Bus potential transformer - board point Circuit breaker - board point Select frequency in Hz Breaker 1 closing time, ms Breaker 1 self adaptive limit, ms Select breaker 1 self adaptive limit Breaker 1 special window frequency difference, Hz Breaker 1 special window phase difference, degrees Breaker 2 closing time, ms (as above) TRPG terminal board, 8 flame detectors
Choices
>= or <= 0 to 20,000 Enable, disable 0 to 20,000 Point edit (input FLOAT) Enable, disable Latch, not latch >= or <= 0 to 100 Enable, disable Point edit (input FLOAT) 0 to 100 0 to 100 0 to 100 Enable, disable Latch, not latch >= or <= 0 to 100 Enable, disable Point edit (input FLOAT) 0 to 1,000 0 to 150 0 to 1,000 0 to 1,000 Point edit (input FLOAT) Point edit (input BIT) 50 or 60 0 to 1,000 0 to 1,000 Enable, disable 0 to 10 0 to 30 0 to 1,000 Connected, not connected
ShVoltMon
SysLim1Enable SysLim1Latch SysLim1Type SysLimit1 SysLim2Enable
ShCurrMon
ShuntOhms Shunt limit Brush limit SysLim1Enable SysLim1Latch SysLim1Type SysLimit1 SysLim2Enable
GenPT_KVolts
PT_Input PT_Output SysLim1 SysLim2
BusPT_Kvolts Ckt_Bkr
System Frequency CB1CloseTime CB1 AdaptLimit CB1 AdaptEnabl CB1FreqDiff CB1PhaseDiff CB2CloseTime
J4:IS200TRPGH1A

L3DIAG_VTUR1 L3DIAG_VTUR2 L3DIAG_VTUR3 ShShntTst_OK ShBrshTst_OK CB_Volts_OK CB_K25P_PU CB_K25_PU CB_K25A_PU
Description - Point Edit (Enter Signal Connection)

Board diagnostic Board diagnostic Board diagnostic Shaft voltage monitor shunt test OK Shaft voltage brush test OK L3BKR_VLT circuit breaker coil voltage available L3BKR_PERM sync permissive relay picked up L3KBR_GES auto sync relay picked up L3KBR_GEX sync check relay picked up
Direction
Input Input Input Input Input Input Input Input Input
Type
BIT BIT BIT BIT BIT BIT BIT BIT BIT

Gen_Sync_LO L25_Command Kq1_Status : Kq6_Status FD1_Flame : FD16_Flame SysLim1PR1 : SysLim1PR4 SysLim1SHV SysLim1SHC SysLim1GEN SysLim1BUS SysLim2PR1 GenFreq BusFreq GenVoltsDiff Gen Freq Diff Gen Phase Diff CB1CloseTime CB2CloseTime Accel1 : Accel4 FlmDetPwr1 ShTestAC ShTestDC FD1_Level : FD16_Level Sync_Perm_AS Sync_Perm Sync_Monitor Sync_Bypass1 Sync_Bypass0 CB2_Selected AS_Win_Sel Sync_Reset Kq1 : Kq6
Description - Point Edit (Enter Signal Connection)

Generator sync trouble (lockout) --------------: --------------: --------------: -------Ac shaft voltage frequency high L30TSVH Ac shaft current high L30TSCH --------------(same set as for Limit1 above) Hz frequency Hz frequency KiloVolts rms-Gen Low is negative Slip Hz-Gen Slow is negative Phase Degrees-Gen Lag is negative Breaker #1 close time in milliseconds Breaker #2 close time in milliseconds RPM/SEC : RPM/SEC 335 V dc L97SHAFT_AC SVM_AC_TEST L97SHAFT_DC SVM_DC_TEST 1 = high detection counts level : 1 = high detection counts level L83AS - auto sync permissive L25P - sequencing sync permissive L83S_MTR - monitor mode L25_BYP-1 = auto aync bypass L25_BYPZ-0 = auto sync permissive L43SAUT2 - 2nd breaker selected L43AS_WIN - special window selected L86MR_SYNC - sync trouble reset L20PTR1 - primary trip relay : L20PTR6 - primary trip relay
Direction
Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output
Type
BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT
Alarms
Fault Fault Description
Flash Memory CRC Failure CRC failure override is Active System Limit Checking is Disabled Board ID Failure J3 ID Failure J4 ID Failure J5 ID Failure J6 ID Failure J3A ID Failure J4A ID Failure Firmware/Hardware Incompatibility
Possible Cause
Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online) System checking was disabled by configuration Failed ID chip on the VME I/O board Failed ID chip on connector J3, or cable problem Failed ID chip on connector J4, or cable problem Failed ID chip on connector J5, or cable problem Failed ID chip on connector J6, or cable problem Failed ID chip on connector J3A, or cable problem Failed ID chip on connector J4A, or cable problem Invalid terminal board connected to VME I/O board
2 3 16 17 18 19 20 21 22 23 24 30
ConfigCompatCode mismatch; Firmware: [ ]; A tre file has been installed that is incompatible with the Tre:[ ] The configuration compatibility code firmware on the I/O board. Either the tre file or firmware must that the firmware is expecting is different than change. Contact the factory. what is in the tre file for this board IOCompatCode mismatch; Firmware: [ ]; Tre:[ A tre file has been installed that is incompatible with the ] The I/O compatibility code that the firmware firmware on the I/O board. Either the tre file or firmware must is expecting is different than what is in the tre change. Contact the factory. file for this board Solenoid [ ] Relay Driver Feedback Incorrect. The solenoid relay driver on the TRPG/L/S board has failed, or Solenoid (1-6) relay driver feedback is the cabling between VTUR and TRPG/L/S is incorrect. incorrect as compared to the command; VTUR cannot drive the relay correctly until the hardware failure is corrected Solenoid [ ] Contact Feedback Incorrect. The solenoid relay driver or the solenoid relay on the Solenoid (1-6) relay contact feedback is TRPG/L/S board has failed, or the cabling between VTUR and incorrect as compared to the command; TRPG/L/S is incorrect. VTUR cannot drive the relay correctly until the hardware failure is corrected TRPG [ ] Solenoid Power Absent. P125/24 V Power may not be coming into TRPG/L/S on the J1 connector, dc power is not present on TRPG terminal or the monitoring circuit on TRPG/L/S is bad, or the cabling board; VTUR cannot energize trip solenoids 1 between TRPG/L/S and VTUR is at fault. through 3, or 4 through 6 until power is present TRPG [ ] Flame Detector Volts Low at Y Volts. TRPG 1 or 2 flame detect voltage is low; the ability to detect flame by detectors 1 through 8, or 9 through 16 is questionable TRPG [ ] Flame Detector Volts High at Y Volts. TRPG 1 or 2 flame detect voltage is high; the ability to detect flame by detectors 1 through 8, or 9 through 16 is questionable because the excitation voltage is too high and the devices may be damaged Power comes into TRPG through J3, J4, and J5. If the voltage is less than 314.9 V dc, this should be investigated. If the voltage is above this value, the monitoring circuitry on TRPG or the cabling between TRPG and VTUR is suspect. This power comes into TRPG through J3, J4, and J5. If the voltage is greater than 355.1 V dc, this should be investigated. If the voltage is below this value, the monitoring circuitry on TRPG or the cabling between TRPG and VTUR is suspect.
31
32-37
38-43
44-45
46,48
47,49
50
L3BKRGXS Synch Check Relay is Slow. The synch check relay I3BKRGXS, known as K25A, on The auto synchronization algorithm has TTUR is suspect; also the cabling between VTUR and TTUR detected that during synchronization with no may be at fault. dead bus closure (synch bypass was false) the auto synch relay I3BKRGES closed before synch relay I3BKRGEX closed
Fault
Fault Description
Possible Cause
51
L3BKRGES Auto Synch Relay is Slow. The The Auto synch relay I3BKRGES also known as K25, on auto synchronization algorithm has detected TTUR is suspect; also the cabling between VTUR and TTUR that the auto synch relay I3BKRGES had not may be at fault. closed by two cycle times after the command I25 was given Breaker [ ] Slower than Adjustment Limit Allows. Breaker 1 or 2 close time was measured to be slower than the auto synch algorithms adaptive close time adjustment limit allows The breaker is experiencing a problem, or the operator should consider changing the configuration (both nominal close time and self-adaptive limit in ms can be configured).
52-53
54
Synchronization Trouble - K25 Relay Locked K25 on TTUR is most likely stuck closed, or the contacts are Up. The auto synchronization algorithm has welded. determined that the auto synch relay I3BKRGES, also known as K25, is locked up. Auto synch will not be possible until the relay is replaced Card and Configuration File Incompatibility. Install the correct TRE file from the factory You are attempting to install a VTUR board that is not compatible with the VTUR TRE file you have installed Terminal Board on J5X and Config File Check your configuration. Incompatibility. VTUR detects that the terminal board that is connected to it through J5 is different than the board that is configured Terminal Board on J3 and Config File Check your configuration. Incompatibility. VTUR detects that the terminal board that is connected to it through J3 is different than the board that is configured Terminal Board on J4 and Config File Check your configuration. Incompatibility. VTUR detects that the terminal board that is connected to it through J4 is different than the board that is configured Terminal Board on J4A and Config File Check your configuration. Incompatibility. VTUR detects that the terminal board that is connected to it through J4A is different than the board that is configured Terminal Board TTUR and card VTUR Incompatibility. VTUR detects that the TTUR connected to it is an incompatible hardware revision TRPL or TRPS Solenoid Power Bus "A" Absent TRPL or TRPS Solenoid Power Bus "B" Absent TRPL or TRPS Solenoid Power Bus "C" Absent The TTUR or VTUR must be changed to a compatible combination.
55
56
57
58
59
60
61 62 63 64-66
Cabling problem or solenoid power source Cabling problem or solenoid power source Cabling problem or solenoid power source
TRPL/S J4 Solenoid [ ] Voltage mismatch. PTR or ETR relays, or defective feedback circuitry The voltage feedback disagrees with the PTR or ETR feedback A problem with the input. This could be the device, the wire to identified signal from this board disagrees with the terminal board, the terminal board, or the cable. the voted value Voted [ ]. The specified input signal varies from the voted value of the signal by more than the TMR Diff Limit A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable.
128- 223 Logic Signal [ ] Voting mismatch. The
224- 251 Input Signal [ ] Voting mismatch, Local [ ],
TTURH1B Primary Turbine Protection Input

The Primary Turbine Protection Input (TTURH1B) terminal board works with VTUR and has the following inputs and outputs: Twelve passive pulse rate devices sensing a toothed wheel to measure the turbine speed Generator voltage and bus voltage signals from potential transformers 125 V dc output to the main breaker coil for automatic generator synchronizing Inputs from the shaft voltage and current sensors to measure induced shaft voltage and current
TTUR has three relays, K25, K25P, and K25A, that all have to close to provide 125 V dc power to close the main breaker, 52G. The speed signal cable to VTUR uses the JR5 connector, and the other signals use the JR1 connector. For TMR systems, signals fan out to the JR5, JS5, JT5, JR1, JS1, and JT1 connectors.
Mark VI Systems
In the Mark* VI system, the TTUR works with the VTUR processor and supports simplex and TMR applications. In TMR systems, TTURH1B connects to three VTUR boards.
Note TTURH1B does not support I/O packs, see Mark VIe below. Mark VIe Systems
For the Mark VIe system, a new design board, the TTURH1C, is used.
Note This document does not describe TTURH1C. For details, refer to GEI-100575 PTUR Turbine Specific Primary Trip.
TTURH1B Terminal Board

Breakers Generator volts Bus volts Shaft volts Shaft current 37-pin "D" shell type connectors with latching fasteners
VTUR VME Board

x RUN FAIL STAT
x
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
JT1
JT5 JS1
Cables to VME rack T VME bus to VCMI
Magnetic speed pickups (12)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
JS5 Cables to VME rack S JR1 JR5

VTUR x
J 5
J3 TB3 x
Shield bar
Wiring to TTL speed pickups
J4
Barrier type terminal blocks can be unplugged from board for maintenance Cable to TRPG
Cables to VME rack R
TTUR Turbine Terminal Board, Processor Board, and Cabling
Installation
Connect the wires for the magnetic pick ups, shaft pick ups, potential transformers, and breaker relays to the two I/O terminal blocks TB1 and TB2, as shown in the figure, TTUR Terminal Board Wiring. Each block is held down with two screws and has 24 terminals accepting up to #12 AWG wires. A shield termination strip attached to chassis ground is located immediately to the left of each terminal block. Use jumpers JP1 and JP2 to select either SMX or TMR for relay drivers K25 and K25P. If used, connect the wires for optional TTL active speed pick ups to TB3; these require an external power supply.
Simplex systems use cable connectors JR5 and JR1. TMR systems use all six cable connectors.
Turbine Terminal Board TTURH1B

JP1 TB1
x
JP2
K1
52G (L) AUTO BKRH N125GEN
x x x x x x x x
Gen (L) Bus (L) ShaftV (L) ShaftC (L)
x x x x
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
TMR SMX TMR SMX 52G (H) P125GEN MAN BKRH
K3
K2 Gen (H) Bus (H) ShaftV (H) ShaftC (H) To connectors JR5, JS5, JT5, JR1, JS1, JT1 TB3 Screw Connections
TB2
x
MPU 1T (L) MPU 2T (L) MPU 3T (L) MPU 4T (L) MPU 1S (L) MPU 2S (L) MPU 3S (L) MPU 4S (L) MPU 1R (L) MPU 2R (L) MPU 3R (L) MPU 4R (L)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
MPU 1T (H) MPU 2T (H) MPU 3T (H) MPU 4T (H) MPU 1S (H) MPU 2S (H) MPU 3S (H) MPU 4S (H) MPU 1R (H) MPU 2R (H) MPU 3R (H) MPU 4R (H) TB3
TTL1T TTL2T
01 02
TTL1S TTL2S
03 04 01 J8
x
TTL1R TTL2R
05 06
TTUR Terminal Board Wiring
Operation
In simplex applications, up to four pulse rate signals can be used to measure turbine speed. Generator and bus voltages are brought into TTUR for automatic synchronizing in conjunction with VTUR, the turbine controller, and excitation system. TTUR has permissive generator synchronizing relays and controls the main breaker relay coil, 52G.
TTURH1B Terminal Board (input portion) JR1 NS <R> Control Rack J3 Turbine
Board
Generator Breaker 52G feedback a Terminal Board TTURH1B (continued) 28Vdc JR1
TMR SMX
Gen. volts 120 V ac from PT Bus volts 120 Vac from PT
GENH
17 suppression 18
02
01
VTUR
Pulse Rate MUX ID A/D Ac&Dc Shaft test
Trip
solenoids
GENL
J3
JP1 K25P RD
Mon
BUSH
19 20
Synch. Perm.
NS
BUSL
TMR SMX
To TPRO
SVH
JP2 K25 RD
Mon
Auto Synch
21 22
175V
SVL
NS
Flame sensors
K25A
Shaft
SCH
J5
23
J4 NS
Mon
14V
SCL
24 5 (TB3) 41 42 ) )
Machine case #1 Primary Magnetic Speed PU
TTL1_R MPU1RH MPU1RL TTL2_R
JR5
J8
08
06,7 05
04
03
NS
6 (TB3) 43 44 45 46 47 48
Trip signals to TRPG

ID
B K R H
M A N
A U T O P125Gen
#2 Primary Magnetic Speed PU #3 Primary Magnetic Speed PU #4 Primary Magnetic Speed PU
MPU2RH MPU2RL
NS
Filter Clamp AC Coupling Filter Clamp AC Coupling Filter Clamp AC Coupling
NS
NS
Note 1: TTL option only available on first two Speed pickups. 52G Note 2: An external normally b closed auxiliary breaker contact must be provided in Breaker coil the breaker close coil circuit as indicated. N125Gen Note 3: Signal to K25A comes from TREG/VPRO through TRPG & VTUR.
TTUR Control I/O and VTUR Board, Simplex
In TMR applications all inputs fan to the three control racks. Control signals coming into TTUR from R, S, and T are voted before they actuate permissive relays K25 and K25P. Relay K25A is controlled by the VPRO and TREG boards.
Note All three relays have two normally open contacts in series with the breaker close coil.
52G a
Gen. Volts 120 Vac from PT
GENH
Noise 17 Suppression 18
JR1
J3 VTUR J3
f( ) Pulse Rate/ Digital
JR1 JP1
2 RD 3
NS
28Vdc
TMR SMX
GENL
K25P
J3
Bus Volts 120 Vac from PT
BUSH
19 20
JS1
MUX A/D AC&DC shaft test

Trip solenoids
NS
JS1
Synch. Permissve
BUSL
JP2
TMR SMX
To TPRO
SVH
J3
JT1
2 RD 3
K25
Auto Synch.
21 22
175V
SVL
NS
JT1
Flame sensors
K25A J4
Shaft
SCH
J5
23
Mon NS
Connectors at bottom of VME rack JR5
14V
SCL
24 5 (TB3) 41
)
J8
08
07 06 BKRH
Machine Case
TTL1R MPU1RH
05 MAN
04 AUTO
B52GH 03
Terminal Board TTURH1B (input portion)
<T> <S> <R>

Turbine Board
Generator Breaker Feedback

B52GL
Terminal Board TTURH1B (continued)
02
01
MPU1RL
42
NS
4 Circuits*
Trip Signals to TRPG JS5 Note 1: TTL option only available on first two circuits. of each group of 4 pickups*.
TTL1S
3 (TB3) 33 34
)
P125Gen 52G b Bkr Coil
MPU1SH
NS
MPU1SL
4 Circuits*
TTL1T
1 (TB3) 25 26
MPU1TH
NS
Note 2: An external normally closed auxiliary breaker JT5 contact must be provided in To Rack S the Breaker close coil circuit as indicated. Note 3: Signal to K25A comes from TREG/VPRO through TRPG & VTUR. To Rack T
N125Gen
MPU1TL
4 Circuits*
TTUR Control I/O and VTUR Board, TMR
Specifications
Item Number of inputs Specification 12 passive speed pickups. 1 shaft voltage and 1 shaft current measurement. 1 generator and 1 bus voltage. Generator breaker status contact. Signal to K25A relay. Number of outputs Power supply voltage MPU pulse rate range MPU pulse rate accuracy MPU input circuit sensitivity Shaft voltage monitor Shaft voltage wiring Shaft voltage dc test Shaft voltage ac test Shaft current input Generator and bus voltage sensors Generator breaker coil, 5 A at 125 V dc Nominal 125 V dc to breaker coil 2 Hz to 20 kHz 0.05% of reading 27 mV pk (detects 2 rpm speed) Signal is frequency of 5 V dc (0 1 MHz) pulses from 0 to 2,000 Hz Up to 300 m (984 ft), with maximum two-way cable resistance of 15 Applies a 5 V dc source to test integrity of the external turbine circuit and measures dc current flow. Applies a test voltage of 1 kHz to the input of the VTUR shaft voltage circuit (R module only). Measures shaft current in amps ac (shunt voltage up to 0.1 V pp) Two single phase potential transformers, with secondary output supplying a nominal 115 V rms Each input has less than 3 VA of loading Allowable voltage range for synch is 75 to 130 V rms Each PT input is magnetically isolated with a 1,500 V rms barrier Cable length can be up to 1,000 ft. of 18 AWG wiring Generator breaker circuits (synchronizing) External circuits should have a voltage range within 20 to 140 V dc. The external circuit must include a NC breaker auxiliary contact to interrupt the current Circuits are rated for NEMA class E creepage and clearance 250 V dc applications require interposing relays Contact voltage sensing Size Technology Temperature 20 V dc indicates high and 6 V dc indicates low Each circuit is optically isolated and filtered for 4 ms 33.0 cm high x 17.8 cm wide (13 in. x 7 in.) Surface mount Operating: -30 to 65C (-22 to 149 F)
Diagnostics
VTUR makes diagnostic tests on the terminal board and connections as follows: Feedback from the solenoid relay drivers; if they do not agree with the control signal a fault is created. Feedback from the relay contacts; if they do not agree with the control signal a fault is created. Loss of solenoid power, which creates a fault. Slow synch check relay, slow auto synch relay, and locked up K25 relay; all of these create a fault. If any one of the above signals goes unhealthy, a composite diagnostic alarm L3DIAG_VTUR occurs. The diagnostic signals can be individually latched and then reset with the RESET_DIA signal if they go healthy. Terminal board connectors JR1, JS1, JT1, JR5, JS5, JT5 have their own ID device that is interrogated by the I/O board. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read by VTUR and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
Jumpers JP1 and JP2 select either simplex or TMR for relay drivers K25 and K25P. There are no switches on the board.
TRPG Turbine Primary Trip

The Gas Turbine Primary Trip (TRPG) terminal board is controlled by the Primary Turbine Protection controller (VTUR or PTUR). TRPG contains nine magnetic relays in three voting circuits to interface with three trip solenoids (ETDs). The TRPG works in conjunction with the TREG to form the primary and emergency sides of the interface to the ETDs. TRPG also accommodates inputs from eight Geiger-Mueller flame detectors for gas turbine applications. There are two board types as follows: The H1A and H1B version for TMR applications has three voting relays per trip solenoid. The H2A and H2B version for simplex applications has one relay per trip solenoid.
Mark VI System
In the Mark* VI system, the TRPG works with the VTUR board and supports simplex and TMR applications. Cables with molded plugs connect TRPG to the VME rack where the VTUR board is located.
Mark VIe System

In the Mark VIe system, the TRPG is controlled by the PTUR packs on TTURH1C and supports simplex and TMR applications. The I/O packs plug into the D-type connectors on TTURH1C, which is cabled to TRPG.
Version Difference
Board TRPGH1A* TRPGH2A* TRPGH1B TRPGH2B TRPGH3B TMR Yes No Yes No Yes Simplex No Yes No Yes No Output contact, Output contact, 28 V Power 125 V dc, 1 A 24 V dc, 3 A use Yes Yes Yes Yes Yes No No Yes Yes Yes Normal Normal Normal Normal Special
* H1A and H2A are not used for new applications. TRPGH3B features special handling of 28 V control power and is otherwise identical to a TRPGH1B. Consult factory for additional details.
ETD power
x x
x
Trip solenoids Power monitoring
x x x x x x x x x x x
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
J1
JT1
DC-37 pin type connectors with latching fasteners
JS1
J - Port Connections: Cables to TTURH1C for Mark VIe system or Cables to VTURboards for Mark VI system
Flame sensor signals (8)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
JR1
J2 J4 J5 J3
x
Shield bar 335 V from rack power supplies Cable to R, S, T TREG

TRPG Terminal Board and Cabling
Installation
Connect the wires for the three trip solenoids directly to the first I/O terminal block. Connect the wires for the flame detectors (if used) to the second terminal block. Connect the power for the flame detectors to the J3, J4, and J5 plug. Connect the 125 V dc power for the trip solenoids to the J1 plug. Transfer power to the TREG board using the J2 plug.
Turbine Primary Trip Terminal Board TRPG
J1
125 V dc
JT1
x
Trip Solenoid 1 or 4 Trip Solenoid 2 or 5 Trip Solenoid 3 or 6 125 Vdc (N)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
125 Vdc (P) 125 Vdc (P) 125 Vdc (P) 125 Vdc (N) J - Port Connections:
JS1
Cables to TTURH1C for Mark VIe system or Cables to control rack VTUR boards for Mark VI system
JR1
x x x x x
Flame 1 (L) Flame 2 (L) Flame 3 (L) Flame 4 (L) Flame 5 (L) Flame 6 (L) Flame 7 (L) Flame 8 (L)
x x x x x x x x
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
J2 Flame 1 (H) Flame 2 (H) Flame 3 (H) Flame 4 (H) Flame 5 (H) Flame 6 (H) Flame 7 (H) Flame 8 (H)
Cable to TREG J4 J5 J3 335 V dc 335 V dc 335 V dc
Terminal blocks can be unplugged from terminal board for maintenance
TRPG Terminal Board Wiring
Operation
The I/O pack/board provides the primary trip function by controlling the relays on TRPG, which trip the main protection solenoids. In TMR applications, the three inputs are voted in hardware using a relay ladder logic two-out-of-three voting circuit. The I/O pack/board monitors the current flow in its relay driver control line to determine its energize or de-energize vote/status of the relay coil contact status. Supply voltages are monitored for diagnostic purposes. A normally closed contact from each relay on TRPG is monitored by the diagnostics to determine its proper operation.
PDM 125 V dc
Terminal Board TRPG H1A (TMR), H2A (Simplex) JR1
From R
RD ID RD RD 28 Vdc Mon KR1,2,3
KR1 KR2 KR3
- Monitoring outputs J1 01 03 05 09 10 P125 Trip N125 Solenoid "PTR 1/4" 1 or 4 KR1 KS1 02 + KS1 KT1 KT1 KR1 J2
Terminal Board TREG
01 J2
KE1
Mon
From S
These relays in TMR systems JS1 KS1 RD RD ID RD 28 Vdc Mon KS1,2,3 KS3 KS2
Optional economizing Trip "PTR 2/5" resistor Solenoid KR2 KS2 2 or 5 04 + KS2 KT2 KT2 KR2 J2
04 03 KE2
05 J2
Mon
08 07 Trip Solenoid 3 or 6 +
"PTR 3/6" KR3 KS3 KS3 KT1 KT2 KT3 To JR1, JS1, JT1 Solenoid Power Monitor KT3 KT3 KR3
06 J2
09 J2
KE3
From T
JT1 RD RD ID RD 28 Vdc Mon KT1,2,3 8 signals to JR1 ,JS1,JT1 3 monitor signals to JR1,JS1,JT1 335 V dc N125 Vdc
Mon
12 11 02 06 10 J2 + J2
FLAME1H 33 NS 34 NS FLAME1L
Voltage Supply and Monitor Voltage Supply and Monitor Voltage Supply and Monitor
J3 335 V dc from R J4 335 V dc from S J5 335 V dc from T
Eight flame detector circuits
Supply 8 detectors
TRPG and Connections to Controller and Trip Solenoids
Note A metal oxide varister (MOV) and a current limiting resistor are used in each ETD circuit
The primary overspeed trip comes from the controller and is passed to the I/O pack/board, and then to TRPG. TRPG works in conjunction with the TREG board, which is controlled by the emergency overspeed system. This TRPG/TREG combination can drive three ETDs.
Flame Detectors
The primary protection system monitors signals from eight Geiger-Mueller flame detectors. With no flame present, the detector charges up to the supply voltage. The presence of flame causes the detector to charge to a level and then discharge through TRPG. As the flame intensity increases, the discharge frequency increases. When the detector discharges, the I/O pack/board and TRPG convert the discharged energy into a voltage pulse. The pulse rate varies from 0 to 1,000 pulses/sec. These voltage pulses are fanned out to all three modules. Voltage pulses above 2.5 volts generate a logic high, and the pulse rate over a 40 ms time period is measured in a counter.
Specifications
Item Trip solenoids Solenoid rated voltage/current Solenoid response time Current suppression Current economizer Control relay coil voltage supply Flame detectors Flame detector supply voltage/current Specification 3 solenoids per TRPG 125 V dc standard with up to 1 A draw 24 V dc is alternate with up to 1 A draw (H1B, H2B, H3B) L/R time constant is 0.1 sec MOV on TREG Terminals for optional 10 , 70 W economizing resistor on TREG Relays are supplied with 28 V dc from JR1, JS1, and JT1 8 detectors per TRPG 335 V dc with 0.5 mA per detector
Diagnostics
The I/O board runs the TRPG diagnostics. These include feedback from the trip solenoid relay driver and contact, solenoid power bus, and the flame detector excitation voltage too low or too high. A diagnostic alarm is created if any one of the signals go unhealthy (beyond limits). Connectors JR1, JS1, and JT1 on the terminal board have their own ID device, which is interrogated by the I/O board, and if a mismatch is encountered, a hardware incompatibility fault is created. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the plug location.
Configuration
TRPL Turbine Primary Trip

The Large Steam Turbine Primary Trip (TRPL) terminal board is used for the primary overspeed protection of large steam turbines. TRPL is controlled by the turbine Primary Turbine Protection controller (VTUR or PTUR), and contains nine magnetic relays in three voting circuits to interface with three trip solenoids (ETDs). TRPL works in conjunction with the TREL terminal board to form the primary and emergency sides of the interface to the ETDs. These two terminal boards are used in a similar way as TRPG and TREG are used on gas turbine applications. Up to three trip solenoids can be connected between the TREL and TRPL terminal boards. TREL provides the positive side of the 125 V dc to the solenoids and TRPL provides the negative side. In addition, two manual emergency stop functions can be connected.
Mark VI Systems
In the Mark* VI system, the TRPL works with the VTUR board and only supports TMR systems applications. Cables with molded plugs connect TRPL to the VME rack where the VTUR board is located.
Mark VIe Systems

In the Mark VIe system, the TRPL is controlled by the PTUR I/O packs on TTURH1C and only supports TMR applications. The I/O packs plug into the D-type connectors on TTURH1C, which is cabled to TRPL.
Installation
Connect the wires for the three trip solenoids directly to the first I/O terminal block. Connect the wires for the primary emergency stop and optional secondary emergency stop to the second terminal block. Connect the trip solenoid power to plugs JP1, JP2, and JP3. The wiring connections are shown in the following figure. Install a jumper across terminals 9 and 11 for the PTR3 trip. If a second emergency stop is required, remove the jumper from terminals 46 and 47 and connect the wires here.
TRPL Primary Trip Terminal Board 125/24 V dc, bus A (Large Steam Turbine)
x
JT1
JP1 JP2 JP3
125/24 V dc, bus B

Trip solenoid 1 or 4 PwrA_P Trip solenoid 2 or 5 PwrB_P Trip solenoid 3 or 6
x x x x x x x x
PwrC_P PwrA_N PwrC_N
x x x x
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
PwrA_P 125/24 V dc, bus C PwrB_P
JS1
PwrC_P PwrB_N
J - Port Connections: Cables to TTURH1C for Mark VIe system or Cables to VTUR boards for Mark VI system
x x x x x x x x
NC2 NC4 Primary ETRP2 Stop TRP3 To second TRP6 TRPL
x x x x x
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
JR1
NC1 NC3 TRP1 TRP4 TRP5
Misc. tie points, no internal connection Primary E-Stop
J2
Cable to TREL
To add secondary E-Stop, remove jumper across terminals 46 and 47
Terminal blocks can be unplugged from board for maintenance
TRPL Terminal Board Wiring
Operation
TRPL is used for TMR applications only. Three separate power buses, PwrA, PwrB, and PwrC for solenoid power, are brought in through connectors JP1, JP2, and JP3, and then distributed to TREL through connector J2. The power buses have a nominal voltage of 125 V dc (70 to 145 V dc) or 24 V dc (18 to 32 V dc). The board includes power bus monitoring (three buses). The maximum current per bus is 3 A.
Each of the three trip solenoids is controlled by three relays using 2/3 contact voting. The relay output rating (for 100,000 operations) is as follows: At 24 V dc, 3 A, L/R = 100 ms, with suppression At 125 V dc, 1.0 A, L/R = 100 ms, with suppression
The trip circuits include solenoid suppression, associated solenoid voltage monitoring, and trip relay contact monitoring. In the TRPL, the hardwired trip (ESTOP) and associated monitoring provides approximately 6.6 V dc to the I/O board when the K4 relays are picked up.
125/24 Vdc bus C 125/24 Vdc bus B 125/24 Vdc bus A
JP1 JP2 PwrA_P JP3 PwrB_P PwrB_N PwrC_P PwrC_N SOL1 02
J2, power buses to TREL
Terminal Board TRPL JR1

R J4
P28R1 to monitor RD RD RD KR1 KR2 KR3
PwrA_N
KR1 PTR 1 KS1 KT1
KS1 KT1 KR1
Trip solenoid #1 or 4 +
Terminal Board TREL
02
ETR1
J2
01
J2
ID
P28 VR
Mon
K4R
PwrA_N
KR1,2,3 JS1 S J4
RD RD RD
03 Solenoid volts monitor to JR1,JS1,JT1 04 PwrA_P
PTR 2 KR2 P28S1 to monitor KS2 KT2
KS2 KT2 KR2
SOL2 06
05
ETR2
KS1 KS2 KS3

PwrB_N
J2
05 07 08
J2
ID
Solenoid volts monitor to JR1,JS1,JT1 PwrB_P
P28 VS
Mon
K4S KS1,2,3
PwrC_N
10
08
ETR3
J2
Solenoid volts monitor to JR1,JS1,JT1 9 11
J2
T J4
JT1 RD RD
ID
P28T1 to monitor KT1 KT2
"PTR 3" KR3 KS3
KS3 KT3 KR3

PwrC_P
RD P28 VT
Mon
KT3 KT3 K4T KT1,2,3

PwrC_P
Miscellaneous tie points; no internal connections
39 40 41 42 TRP1 43
18 19
To JR1, JS1, JT1
Primary E-Stop
TRP2 44 TRP4 45
Sol Pwr Monitor
CL
P28VV
PwrA_P PwrB_P PwrC_P PwrA_N PwrB_N PwrC_N

22 23 24 JR1 JS1 JT1
K4R K4S K4T

To JR1 JS1 JT1 To relay K25A on TTUR driven from TREL
Jumper
TRP3 46 TRP5 47
Secondary E-Stop when applicable, remove jumper to enable function.

TRP6
48
P28R1 P28S1 P28T1
Mon (3)
J2
TRPL Terminal Board
Specifications
Item Trip solenoids Solenoid rated voltage/current Solenoid response time Current suppression Control relay coil voltage supply Primary Emergency Stop, manual Specification 3 solenoids per TRPx 125 V dc standard with up to 1 A draw 24 V dc is alternate with up to 3 A draw L/R time constant is 0.1 sec with suppression MOVs Relays are supplied with 28 V dc from JR1, JS1, and JT1 One with optional secondary E-stop
Diagnostics
Note The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the plug location.
The I/O controller runs the TRPx diagnostics. These include feedback from the trip solenoid relay driver and contact, solenoid voltage, and solenoid power bus. A diagnostic alarm is created if any one of the signals goes unhealthy (beyond limits). The Jx1 connectors on the terminal board have their own ID device, which is interrogated by the I/O board, and if a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
There are no switches or hardware settings on the terminal board. Terminals 9 and 11 must use a jumper to include the PTR 3 trip. Terminals 46 and 47 must use a jumper if only one manual emergency stop is required.
TRPS Turbine Primary Trip

The Small Steam Turbine Primary Trip (TRPS) terminal board is used for the primary overspeed protection of small and medium size steam turbines. TRPS is controlled by the Primary Turbine Protection controller (VTUR or PTUR), and contains three magnetic relays to interface with three trip solenoids (ETDs). TRPS works in conjunction with the TRES terminal board to form the primary and emergency sides of the interface to the ETDs. These two terminal boards are used in a similar way as TRPG and TREG are used on gas turbine applications, except with the following differences: Two-out-of-three voting is done in the relay drivers and not using relay contacts as with TRPG and TRPL. In a simplex application, the voting is bypassed and the relay drivers are controlled by a single signal from JA1. There are no economizing relays. There are no flame detector inputs.
Up to three trip solenoids can be connected between the TRES and TRPS terminal boards. TRES provides the positive side of the 125 V dc to the solenoids and TRPS provides the negative side. In addition, two manual emergency stop functions can be connected.
Mark VI Systems
In the Mark* VI system, the TRPS works with the VTUR board and supports simplex and TMR applications. Cables with molded plugs connect TRPS to the VME rack where the VTUR board is located.
Mark VIe Systems

In the Mark VIe system, TRPS is controlled by the PTUR I/O packs on TTURH1C and supports simplex and TMR applications. The I/O packs plug into the D-type connectors on TTURH1C, which is cabled to TRPS.
Installation
Connect the wires for the three trip solenoids to the first I/O terminal block. Connect the wires for the primary emergency stop and optional secondary emergency stop to the second terminal block. Connect the trip solenoid power to plugs JP1, JP2, and JP3. If a second emergency stop is required, remove the jumper from terminals 46 and 47, and connect the wires here. The wiring connections are shown in the following figure.
Primary Trip Terminal Board TRPS (Small/Medium Steam Turbine)
x
JP1 125/24 V dc, bus A JP2 125/24 V dc, bus B
JT1
PwrA_P2 SUS1A SUS1C SOL1A PwrB_P2 SUS2A SUS2C SOL2A PwrC_P2 SUS3A
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
PwrA_P1 PwrA_P3 SUS1B SUS1D SOL1B PwrB_P1 PwrB_P3 SUS2B SUS2D SOL2B PwrC_P1 PwrC_P3
JP3 125/24 V dc, bus C
PTR1 JS1 J - Port Connections: PTR2 Cables to TTURH1C for Mark VIe system or PTR3 Cables to VTUR boards for Mark VI system JA1 K4_1 K4_2 J2 JR1
SUS3C SOL3A
x x x x x
PwrA_N PwrC_N NC2 NC4 Primary ETRP2 Stop TRP3 TRP6
x x x x x x x
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
SUS3B SUS3D SOL3B
K4_3
PwrB_N NC1 NC3 TRP1 TRP4 Primary TRP5 E-Stop
Cable to TRES
Jumper Terminal blocks can be unplugged from terminal board for maintenance
TRPS Terminal Board Wiring
Operation
TRPS is used for TMR and simplex applications. Three separate power buses, PwrA, PwrB, and PwrC for solenoid power, are brought in through connectors JP1, JP2, and JP3, and then distributed to TRES through connector J2. The power buses have a nominal voltage of 125 V dc (70 to 145 V dc) or 24 V dc (18 to 32 V dc). The board includes power bus monitoring (three buses). The maximum current per bus is 3 A.
Each of the three trip solenoids is controlled by a relay driver. The relay output rating (for 100,000 operations) is as follows: At 24 V dc, 3 A, L/R = 100 ms, with suppression At 125 V dc, 1.0 A, L/R = 100 ms, with suppression
The trip circuits include solenoid suppression, associated solenoid voltage monitoring, and trip relay contact monitoring. In the TRPS, the hardwired trip (EStop) and associated monitoring provides approximately 6.6 V dc to the I/O board when the K4 relays are picked up.
125/24 V dc bus C 125/24 V dc bus B 125/24 V dc bus A
Terminal Board TRPS JP1 Simplex JA1 P28A system uses P28R JA1 K4_1 P28S P28 P28T
ID JP2 PwrA_P PwrA_N JP3 PwrB_P PwrB_N PwrC_P PwrC_N
PwrA_P1 01
J2, power buses to TRES Terminal Board TRES
PwrA_P
Solenoid volts monitor to JR1, SOL1A JS1, JT1, JA1
PwrA_P2 02 PwrA_P3 03 SUS1A 04
JR1
R
J2
SUS1B SUS1C SUS1D SOL1A SOL1B
J2
2 3
RD
PTR1
05 06 07 09 36
To R,S,T, A
PwrA_N Mon
PTR1
ID
PTR1 PTR1
Trip solenoid 08 + Several terminal positions for different applications
K4_2 P28 2 3 RD PTR2 PwrB_P

Mon Solenoid volts monitor to JR1, JS1, JT1, JA1
JS1
S
PwrB_P1 11 PwrB_P2 12 PwrB_P3 13 SUS2A 14 SOL2A SUS2B SUS2C SUS2D PTR2 PTR2 SOL2A SOL2B
To R,S,T, A
PTR2
ID
J2
15 16 17 solenoid 18 + 19 37
J2
K4_3 P28 JT1

T
PwrB_N
Trip
2 3
RD
PTR3
To R,S,T, A
Mon
PwrC_P1 21
PTR3 Misc. tie points, no internal connections

NC1 39 ID NC2 40 NC3 41 NC4 42 TRP1 43 To JR1, JS1,JT1, JA1
PwrC_P
PwrC_P2 22 PwrC_P3 23 SUS3A 24
Sol. Power Monitor
Solenoid volts monitor to JR1, PwrB_P JS1, JT1, JA1

PwrA_P PwrC_P
SOL3A SUS3B SUS3C SUS3D
J2
25 26 27 29 38
J2
PwrC_N CL
Primary E-Stop
TRP2 44 TRP4 45
P28VV
PTR3 PTR3
SOL3A SOL3B
Trip solenoid 28 +
K4_1 K4_2 K4_3 AND Monitor (3)

JA1 JR1 JS1 JT1
Jumper
TRP3 46 TRP5 47
Secondary E-Stop when applicable, remove jumper 48 to enable function.

TRP6
To R,S,T,A
J2
To relay K25A on TTUR driven from TRES
TRPS Terminal Board
Specifications
Item Trip solenoids Solenoid rated voltage/current Solenoid response time Current suppression Control relay coil voltage supply Primary Emergency Stop, manual Specification 3 solenoids per TRPx 125 V dc standard with up to 1 A draw 24 V dc is alternate with up to 3 A draw L/R time constant is 0.1 sec with suppression MOVs Relays are supplied with 28 V dc from JR1, JS1, and JT1 One with optional secondary E-stop
Diagnostics
Note The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and the plug location.
The I/O controller runs the TRPx diagnostics. These include feedback from the trip solenoid relay driver and contact, solenoid voltage, and solenoid power bus. A diagnostic alarm is created if any one of the signals goes unhealthy (beyond limits). The Jx1 connectors on the terminal board have their own ID device, which is interrogated by the I/O board, and if a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
There are no switches or hardware settings on the terminal board. Terminals 46 and 47 must use a jumper if only one manual emergency stop is required; remove jumper if secondary E-Stop is used.
TTSA Trip Servo Interface

The Trip Servo Interface (TTSA) terminal board provides four sets of power resistors in a configuration to support bipolar currents in two-coil trip servos. All connections to the board are made through pluggable barrier terminal strips. The board is the functional equivalent of the 194B5725 Servo Module in a smaller physical design. Power ratings are adequate to withstand a high DC line of 145 V dc and zero coil impedance.
Mark VI and Mark VIe Systems

The TTSA function is independent of the control in use and is compatible with Mark V, Mark VI, and Mark VIe.
Servo Interface Terminal board
Installation
Connect the wires for up to four trip servos to the terminal blocks to provide bipolar coil current, as shown in the following figure. Connect the barrier terminal strips to the appropriate tripping board and servo coils.
TTSAG1A
2 3 TS-NEG TS1-POS
5k 2.2k
TS1-YEL TS1-RED TS1-WHT TS1-GRN
20 21
External Dual Coil Servo
Run Trip
TS1-NEG
5k 2.2k
22 23
TS2-POS
5k 2.2k
28 29
Run Trip
TS2-NEG
5k 2.2k
30 31
TS3-POS
5k 2.2k
36 37
Run Trip
TS3-NEG
5k 2.2k
38 39
9 11 10
TS4-POS
5k 2.2k
44 45
Run Trip
TS-POS TS4-NEG
5k 2.2k
46 47
Mark VI Trip Servo Interface Board, TTSA
Operation
Fixed 125 V nominal dc power is applied to terminals 11 (positive) and 02 (negative). With no other power, a trip current is applied to the external solenoid coil pair with magnitude equal to V dc / (10k + parallel solenoid impedance). If a 1 servo coil is used and V dc is 125 V, the current in each coil equals * 125 / (10,000 + 500) = 5.95 mA. When running current is desired in the servo coils, positive dc is applied to the TS#POS terminal and negative dc is applied to the TS#-NEG terminal. This causes a reverse current in the coil with magnitude equal to [ V dc / (4.4k + parallel solenoid impedance)] trip current. For the previous example, this equals [ * 125 / (4,400 + 500)] 5.95 mA = 6.8 mA.
Specifications
Item Maximum applied V dc Resistor tolerance Minimum servo coil impedance Specification 145 V 5% 0
Diagnostics
No diagnostic features are provided on this module.
Configuration
DTUR Simplex Pulse Rate Input

The Simplex Pulse Rate Input (DTUR) terminal board is a compact pulse-rate terminal board designed for DIN-rail mounting. The board accepts four passive pulse-rate transducers (magnetic pickups) for speed and flow measurement. It connects to the VTUR processor board with a 37-pin cable and a 15-pin cable. These cables are identical to those used on the larger TTUR terminal board. VTUR only accommodates one DTUR board.
Note DTUR does not work with the Mark VIe system.
Note Only the simplex version is available.
Installation
Mount the plastic holder on the DIN-rail and slide the DTUR board into place. DTUR boards can be stacked vertically on the DIN-rail to conserve cabinet space. Connect the wires for the magnetic pickups directly to the terminal block, which has 36 terminals. Typically #18 AWG shielded twisted pair wiring is used. Two screws, 35 and 36, are provided for the SCOM (ground) connection, which should be as short a distance as possible. Connect DTUR to VTUR using the JR1 and JR5 connectors.
Note Only the JR5 cable carries signals to VTUR.
MPU means magnetic pick up
JR5
DTUR Screw Connections MPU 1 (Low) MPU 2 (Low) MPU 3 (Low) MPU 4 (Low) 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35
Screw Connections MPU 1 (High) MPU 2 (High) MPU 3 (High) MPU 4 (High)
Cable to J5 on front of VTUR board JR1 37-pin "D" shell connector with latching fasteners
Chassis ground Cable to J3 connector in I/O rack for VTUR board
Chassis ground
SCOM Euro-Block type terminal block
DIN-rail mounting
DTUR Wiring and Cabling
Operation
DTUR accepts four magnetic pulse rate sensors and has onboard signal conditioning identical to that on the TTUR. The pulse frequency circuits are in the VTUR. DTUR does not accept generator and bus voltage signals, or shaft current and voltage signals, as with TTUR. Two on-board ID chips identify the connectors and terminal board to VTUR for system diagnostic purposes.
<R> Control Rack
VTUR DTUR Board

MPU1H 1
Noise suppresion
JR5
Filter Clamp Ac Coupling
#1 Magnetic Speed Pickup
MPU1L 2
NS
SCOM
f( ) Pr/D MUX A/D ID J5
MPU2H 3
MPU2L 4
NS
SCOM
Filter Clamp Ac Coupling Filter Clamp Ac Coupling Filter Clamp Ac Coupling
MPU3H 5
MPU3L 6
NS
SCOM
MPU4H 7
JR1
J3
J4
MPU4L 8
NS
SCOM
Unused VTUR circuits grounded
ID
DTUR Board Circuits
Specifications
Item Number of inputs MPU pulse rate range MPU pulse rate accuracy Size Technology Temperature Specification 4 passive speed pickups. TRPG 2 Hz to 20 kHz 0.05% of reading 16.2 cm high x 8.6 cm wide (6.37 in. x 3.4 in.) with support holder Surface mount Operating: -30 to 65C (-22 to 149 F)
MPU input circuit sensitivity 27 mV pk (detects 2 rpm speed)
Diagnostics
Terminal board connectors JR1 and JR5 have their own ID device that is interrogated by VTUR. The ID device is a read-only chip coded with the terminal board serial number, board type, revision number, and plug location. When the chip is read by VTUR and a mismatch is encountered, a hardware incompatibility fault is created.
Configuration
DTRT Simplex Primary Trip Relay Interface

The Simplex Primary Trip Relay Interface (DTRT) terminal board is a DIN-rail mounted trip transition board that connects the VTUR with the DRLY board. DTRT allows three trip functions on the VTUR to interface with DRLY, instead of with the TRPG, TRPL, or TRPS board. Two VTUR boards can connect to the DTRT to control a total of six relays on DRLY.
Note Only the simplex version of this board is available.
Installation
Note DTRT does not have a shield terminal strip.
Mount the plastic holder on the DIN-rail and slide the DTRT board into place. The three cables connecting VTUR and DRLY plug into the DC-37 connectors. Connect DTRT to the first VTUR using the J1 connector. Connect DTRT to the second VTUR using the J2 connector. Connect DTRT to DRLY using the J3 connector. Three screws are provided on TB1 for the SCOM (ground) connection, which should be as short a distance as possible.
DTRT
TB1 1 2 3 J1 J2 J3
SCOM
Chassis Ground Chassis Ground Chassis Ground
DIN-rail mounting
Cable from first VTUR Cable from second VTUR

DTRT Wiring
To DRLY board (Six relay circuits)
Operation
DTRT must be used in applications where a trip is required that is faster than VTUR, the controller, and TRPG can provide. DTRT cannot be eliminated if the application requires only one VTUR. A high density Euro-Block type terminal block is permanently mounted to the board with three screw connections for the ground connection (SCOM). The first three DRLY circuits are driven by the first VTUR and the second three DRLY circuits are driven by the second VTUR, as shown in the following figure. DTRT transfers board identification from the ID chip on DRLY to VTUR for diagnostic purposes. DTRT has its own ID chip connected to J2.
DTRT Terminal Board J1 J3 Three relay circuits To DRLY board (Six relay circuits ) J2 Three relay circuits ID chip Primary Trip Controller J4
DTRT Terminal Board
Specifications
Item Number of Inputs Number of Outputs Specification Two DC-37 pin connectors for cables from VTUR, J4. 3 trip relays per cable One DC-37 pin connector for cable to DRLY. Total of 6 trip relays
Diagnostics
Diagnostic tests are made on components on the terminal board as follows: Each terminal board connector has its own ID device that is interrogated by the I/O board. The connector ID is coded into a read-only chip containing the board serial number, board type, revision number, and the J connector location. When the chip is read by the I/O processor and a mismatch is encountered, a hardware incompatibility fault is created. DTRT also transfers ID information from DRLY to VTUR through J1.
Configuration
DRLY Simplex Relay Output

The Simplex Relay Output (DRLY) terminal board is a compact relay output terminal board designed for wall mounting (not DIN-rail mounting). The board has 12 form-C dry contact output relays and connects to the VCCC, VCRC, or VTUR processor board with a single cable. The 37-pin cable connector is identical to those used on the larger TRLY terminal board. Two DRLY boards can be connected to VCCC, VCRC, or VTUR for a total of 24 contact outputs. Only a simplex version of this board is available. There are two versions of the DRLY terminal board: H1A has higher powered relay contacts than H1B. H1B is suitable for use in UL listing for Class I, Division 2 Hazardous (classified) locations.
Note DRLY does not work with the PDOA I/O Pack.
Installation
Note DLRY does not have a shield terminal strip.
Mount the DRLY board by fastening screws to wall through the four mounting holes in the corners of metal support plate. Connect the wires for the 12 relay outputs directly to the odd-numbered screws on the terminal blocks. The high-density EuroBlock type terminal blocks plug into the numbered receptacles on the board. The two screws on TB2 are provided for the SCOM (chassis ground) connection, which should be as short a distance as possible.
Note SCOM, TB2, must be connected to chassis ground.
Screw Connections Output 1 (NC) Output 1 (COM) Output 1 (NO) Output 2 (NC) Output 2 (COM) Output 2 (NO) Output 3 (NC) Output 3 (COM) Output 3 (NO) Output 4 (NC) Output 4 (COM) Output 4 (NO) Output 5 (NC) Output 5 (COM) Output 5 (NO) Output 6 (NC) Output 6 (COM) Output 6 (NO) 1 TB1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 1 2 TB2 SCOM K7 K1 K8 K2 K9 K3 K10 K4 K11 K5 K12 K6 JR1 P28 OK LED
Screw Connections Output 7 (NC) Output 7 (COM) Output 7 (NO) Output 8 (NC) Output 8 (COM) Output 8 (NO) Output 9 (NC) Output 9 (COM) Output 9 (NO) Output 10 (NC) Output 10 (COM) Output 10 (NO) Output 11 (NC) Output 11 (COM) Output 11 (NO) Output 12 (NC) Output 12 (COM) Output 12 (NO)
37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72
Cable from J3 or J4 on I/O rack, from I/O processor board
LED relay state indicator 37-pin "D" shell connector
Mounting holes
DRLY Wiring and Cabling
Operation
DRLY does not include solenoid source power. There is one set of dry contacts per relay, with two NO contacts in series. Unlike TRLY, there is no on-board suppression, and no relay state monitoring. The I/O board (VCCC, VCRC, or VTUR) provides the 28 V dc power for the relay coils, which is indicated with a green LED. DRLY has a yellow LED for each relay that indicates voltage across the coil. With an unconnected control cable, the relays default to a de-energized state.
Note Three relays on DRLY can be controlled by VTUR using the DTRT transition board. Six relays can be controlled if two DTURs are used.
DRLY Board JR1 From J3 or J4 on I/O rack, from I/O processor board P28V P28 OK Relay Driver RD LED COIL 3 COM 5 TB2 1 2 SCOM NO TB1 1 NC Output 1 of 12 dry contact outputs
ID
DRLY Board Circuits
DRLYH1A Specifications
Item Number of relay outputs and type Relay contact rating Specification 12 relays, nominal 24 V dc coil. Two-pole double throw with Form C contacts containing two NO and 2 NC contacts Resistive: 28 V dc: 10 A Inductive: 28 V dc: 120 V ac: 240 V ac: 125 V dc: 2 A, L/R = 7 ms, without suppression 2 A, PF= 0.4, 10 A inrush, no suppression Motor load 1/3 Hp. 2 A, PF= 0.4, 10 A inrush, no suppression Motor load Hp. 0.2 A, L/R = 7 ms without suppression 125 V dc: 0.65 A, L/R = 150 ms, MOV suppression by others (with two contacts in series on the same relay) Suppression Relay response time External suppression will be supplied by customer Operate: 15 ms typical Release: 10 ms typical Fault detection in I/O board The state of the P28 V dc is monitored using a green LED at the top of the board. Voltage across each relay coil is indicated with a yellow LED. There is no relay state monitoring in the VCCC or VCRC Physical Size Temperature 21.59 cm long x 20.57 cm wide (8.5 in x 8.1 in wide) 0 to 60C (32 to 140 F)
120 V ac: 10 A 240 V ac: 3 A 125 V dc: 0.5 A
DRLYH1B Specifications
Item Number of relay outputs Relay type Relay contact rating (resistive load) Specification 12 relays, nominal 24 V dc coil Two-pole double throw with Form C contacts containing two NO and 2 NC contacts. UL listed, CSA certified, sealed to UL 1604 28 V dc: 125 V dc: 120 V ac: 240 V ac: Suppression Relay response time Fault detection in I/O board Operate: Release: 2A 1A 0.5 A 3 ms typical 2 ms typical Max operating voltage: 250 V rms, 220 V dc 2 A dc, 1 A rms Max switching capacity: 125 VA, 60 W 0.5 A Max operating current:
External suppression will be supplied by customer
The state of the P28 V dc is monitored using a green LED at the top of the board Voltage across each relay coil is indicated with a yellow LED There is no relay state monitoring in the I/O board UL listed Class I, Division. 2 applications, CSA, and CE, also approvals listed in table above for TRLYH1A 21.59 cm long x 20.57 cm wide, (8.5 in x 8.1 in) 0 to 75C (32 to 167 F)
Agency requirements Physical Size Temperature
Diagnostics
The board contains the following diagnostics; there is no relay state monitoring. The terminal board connector has an ID device that is interrogated by the I/O board. The connector ID is coded into a read-only chip containing the board serial number, board type, and revision number. When this chip is read by VCCC/VCRC or VTUR and a mismatch is encountered, a hardware incompatibility fault is created. The voltage across each relay coil is indicated with a yellow LED. The 28 V supply to the board is indicated with a green LED.
Configuration
VVIB Vibration Monitor Board

VVIB Vibration Monitor
The Vibration Monitor (VVIB) board processes vibration probe signals from the TVIB or DVIB terminal board. Up to 14 probes connect directly to the terminal board. Two TVIB can be cabled to the VVIB processor board. VVIB digitizes the various vibration signals, and sends them over the VME bus to the controller. The Mark* VI system uses Bently Nevada* probes for shaft vibration monitoring. The following vibration probes are compatible: Proximity Velocity Acceleration Seismic Phase
Note If desired, a Bently Nevada 3500 monitoring system can be connected to the terminal board.
Vibration probes are normally used for four protective functions in turbine applications as follows:
Vibration: Proximity probes monitor the peak-to-peak radial displacement of the shaft (the shaft motion in the journal bearing) in two radial directions. This system uses non-contacting probes and Proximitors , and detects alarms, trips, and faults. Rotor Axial Position: A probe is mounted in a bracket assembly off the thrust bearing casing to observe the motion of the thrust collar on the turbine rotor. This system uses non-contacting probes and Proximitors, and detects thrust bearing wear alarms, trips, and faults. Differential Expansion: This application uses non-contacting probe(s) and Proximitor(s) and detects alarms, trips, and faults for excessive expansion differential between the rotor and the turbine casing. Rotor Eccentricity: A probe is mounted adjacent to the shaft to continuously sense the surface and update the turbine control. The calculation of eccentricity is made once per revolution while the turbine is on turning gear. Alarm and fault indications are provided.
There are two types of TVIB terminal boards, H1A and H2A. The H2A type board has BNC connectors allowing portable vibration data gathering equipment to be plugged in for predictive maintenance purposes. Both types have connectors so that Bently Nevada vibration monitoring equipment can be permanently cabled to the terminal board to measure and analyze turbine vibration.
VVIB Vibration Monitor Board 451
TVIB Terminal Board x 37-pin "D" shell type connectors with latching fasteners
VVIB VME Board

x RUN FAIL STAT
Vibration signals
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
...JA1 ... ... . ... ... . ... ... . ... ... . ... ... JB1 . ... ... . ... ... . ... ... .
JT1
JS1
Cable to rack T VME bus to VCMI
JC1
Vibration signals
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 JD1 29 31 JR1 33 P2 P1 35 37 39 P6 P5 P4 P3 41 43 45 P10 P9 P8 P7 47 14 13 12 P11
Cable to rack S
VVIB
x
J3
Shield bar Cables with inner and outer shields: Connect inner shield to shield bar and leave the outer shield which is connected to the sensor case open. Plugs for Portable BentlyNevada data gathering & monitoring equipment Cables to fixed BentlyNevada 3500 Vibration Monitoring System
Cable to VME rack R Cable from second TVIB
J4
Vibration Processor Board, Terminal Board, and Cabling
Installation
452 VVIB Vibration Monitor Board
Operation
The terminal board supports Proximitor, Seismic, Accelerometer, and Velomitor probes of the type supplied by Bently Nevada. Power for the vibration probes comes from the VVIB boards, in either simplex or TMR mode. The probe signals return to VVIB where they are A/D converted and sent over the VME bus to the controller.
<R> <S>
<T>
Terminal Board TVIBH2A N28V N28VR Current Limit 1 N24V1 S CL V 2 PR01H S <S> <T>
ID
JR1
J3
Vibration Board VVIB 28 V dc

Amp A/D
To controller Sampling type A/D converter (16 bit)
P s V R 3mA S O JP1A P,A 3 PR01L X S PCOM Vib. or pos. Eight of the prox. (P), or above ccts. P,V,A seismic (S), or accel (A), N28V or velomiter S (V) JP1B CL Negative 25 N24V9 Volt Ref
S S S
JS1 N28V
J3
Same as <S>
ID
JT1 N28V
J3
TMR Applications Same as <T>
P R O X
26 PR09H 27 PR09L
ID
JA1 Buffer Amplifiers

D B2 5
Position prox
Four of the above ccts. PCOM N28V CL
JB1
D B2 5
J4
Buffer Amplifiers
P1-P8 JC1
D B2 5
J4
37 N24V13
S S S
P R O X
38 PR13H 39
PR13L
Reference or PCOM keyphasor prox. One of the above ccts for Mark VI (Two of the above ccts for B/N P13-P14 Four cables to Bently Nevada 3500 system
Buffer Amplifiers
P9-P12 BNC JD1 Connectors
J4
D B9
VVIB Processor, Vibration Probes, and Bently Nevada Interface, TMR system
VVIB supplies -28 V dc to the terminal board for Proximitor power. In TMR systems, a diode high-select circuit selects the highest -28 V dc bus for redundancy. Regulators provide individual excitation sources, -23 to -26 V dc, short circuit protected. Probe inputs are sampled at high speeds up to 4600 samples per second over discrete time periods. The maximum and minimum values are accumulated, the difference is taken (max-min) for vibration, and the results are filtered. The resulting peak-to-peak voltage is scaled to yield engineering units (EU) (peak-to-peak) displacement for Proximitors inputs, EU (pk) for velocity inputs from accelerometers, integrated outputs, seismics, and Velomitors.
Vibration Monitoring Firmware

The Vibration Monitoring on the VVIB in partitioned in the following manner:
Channels 1 3:
Channels 1 through 3 can be used for position information from Proximitors, wideband vibration information from Proximitors, accelerometers with integrated outputs, Velomitors, and Seismics. 1X and 2X information can be derived from Proximitors viewing axial vibration information when a Keyphasor probe is used. Tracking filters are normally used in LM applications with accelerometers. Gapx_Vibx Vibration Filtering section runs the low-pass filter for the gap calculation, the wideband vibration filter, and the maximum / minimum detect for the peak-to-peak calculation at a 4.6 kHz rate and 2.3 kHz rate if input channels 14 through 21 are configured as vibration channels. The Gap Scaling and Limit Check runs at the frame rate. This function converts the gap value from volts to the desired EU. The system limit check provides two detection limits and Boolean outputs for the status. The Vpp, Filter and Limit Check block runs every 160 ms. The peak-topeak calculation is based on the Vfmax and Vfmin values of the Gapx_Vibx Wideband Vibration Filtering section. The wideband peak-to-peak signal is filtered and then scaled to EU.
Note Vibx is expressed in EU (pk) for the configuration parameter, VibTypes: accelerometers with integrated outputs, seismics, and Velomitors. Vibx is expressed in EU(pk pk) for Proximitors.
The re-scaled wideband signal is the input for the limit check function. The limit check provides the Booleans, SysLim1VIBx, and SysLim2VIBx for the limit check status. Three tracking filters are provided to calculate the peak vibration for the LM applications when accelerometers are used. The tracking filters provide the vibration that occurs at the rotor speeds defined by the System outputs, LM_RPM_A, LM_RPM_B, and/or LM_RPM_C. LMVib1A is the vibration detected on channel 1 based on the rotor speed, LM_RPM_A. LMVib1B is the vibration detected on channel 1 based on rotor speed, LM_RPM_B. LMVib1C is based on LM_RPM_C. The 1X and 2X filters provide the peak-to-peak vibration vector relative to the Keyphasor input from channel 13. VIB1X1 is the peak-to-peak magnitude of the vibration from channel 1 relative to the rpm based on the Keyphasor input. Vib1xPH1 is the phase angle in degrees of the vibration vector from channel 1 relative to the Keyphasor input. VIB2X1 is the peak-to-peak magnitude of the vibration from channel 1 relative to twice the Keyphasor rpm. Vib2xPH1 is the phase angle in degrees of the 2X vibration vector from channel 1.
Channels 4 8:
Channels 4 through 8 can be used for position information from Proximitors, wideband vibration information from Proximitors, Velomitors, and Seismics. 1X and 2X information can be derived from Proximitors viewing axial vibration information when a Keyphasor probe is used. Channels 4 through 8 are identical to channels 1 through 3 with the exception of the Tracking filters. Channels 4-8 do not include the Tracking filters.
Terminal Board Pts
ScaleOff
PRO01/14H PRO01/14L
Diff Amp, MUX & A/D
Vgap
VIB_Scale SysLimit2 *
GAP1/14_VIB1/9 SysLim2GAP1/14 SysLim1GAP1/14 Limit Chk
A/D GAIN & OFFSET COMP. VOLTS ----------COUNT LOW PASS FILTER (8 Hz)
Gap Scaling & Limit Check (Exec Rate = Frame Rate = 25, 50 or 100 hz) * Additional SysLimit Config. Parm. SysLim1Enable (En or Dis) SysLim1Latch (Latch or Not Latch) SysLim1Type (>= or <=)
ScaleOff
SysLimit1 *
Vib1/9 V_wb Mag. (db) 0 -3

VIBScale SysLimit2 *
SysLim2VIB1/9 SysLim1VIB1/9
LP Filter (1-pole)
Limit Chk
SysLimit1 *
Vib_PP_Fltr (Hz) Vmax Wideband Vibration Filtering and Peak Detection Vfmax
+
Vfpp
Vfmin FilterType Fltrhpcutoff Fltrlpcutoff Fltrhpattn Fltrlpattn Vmin
CLAMP
Filtering (Exec. Rate = 4.6khz for <= 8 chs. & 2.3khz for > 8 chs.)
Vpp, Filter & Limit Check (Exec Rate = 6.25 hz)
Gap1_Vib1(TVIB1) & Gap14_Vib9(TVIB2) Vibration Calculations
PRO02/15H PRO02/15L Gap2_Vib2(TVIB1) & Gap15_Vib10(TVIB2) Vibration Calculations
GAP2/15_VIB2/10 SysLim2GAP2/15 SysLim1GAP2/15 Vib2/10 SysLim2VIB2/10 SysLim1VIB2/10
PRO08/21H PRO08/21L Gap8_Vib8(TVIB1) & Gap21_Vib16(TVIB2) Vibration Calculations
GAP8/21_VIB8/16 SysLim2GAP8/21 SysLim1GAP8/21 Vib8/16 SysLim2VIB8/16 SysLim1VIB8/16 Signal Space (Sys Inputs)
Channels 9 12:
Channels 9 12 are used for position information only. The Gapx_Pos_Filtering runs at 4.6 kHz rate and 2.3 kHz rate if input channels 14 through 21 are configured as vibration channels. This section provides an 8 Hz low pass filter for the gap calculation. Gapx_Pos Scaling and Limit Check runs every frame. This function rescales the gap value from volts to EU based on the configuration. The System Limit Check can be used set a Boolean at minimum and/or maximum limit values configured by the user.
Channnel 13:
Channel 13 supports position feedback and Keyphasor feedback. The Key_Phasor Filtering is executed 4.6 kHz rate and 2.3 kHz rate if input channels 14 through 21 are configured as vibration channels. The Filtering function performs a median select filter for the gap signal. A hardware comparator circuit with a software controlled hysteresis limit is used to detect the leading edge of the slot or pedestal gap transition. The Keyphasor timing pulse is fed into an FPGA with counters that determine the time between Keyphasor pulses and the firmware uses this information to calculate the rotor speed in rpm. At very low speeds the hardware Keyphasor comparator is not usable and the runtime application code determines speed by counting pulses detected through the system input, GAP13_KPH1. The Gap13 KP Scaling and Limit Check runs every frame. The gap scaling and System Limit Check performs the same way it does for channels 1 through 12.
Terminal Board Pts

ScaleOff
Signal Space (Sys Inputs) GAP9/22_POS1/5
PRO09/22H PRO09/23L
Diff Amp, MUX & A/D
Vgap
Scale SysLimit2 *
SysLim2GAP9/22 SysLim1GAP9/22
Limit Chk A/D GAIN & OFFSET COMP. VOLTS ----------COUNT

SysLimit1 *
LOW PASS FILTER (8 Hz)
* Additional SysLimit Config. Parm. SysLimxEnable (En or Dis) SysLimxLatch (Latch or Not Latch) SysLimxType (>= or <=)
Gap9 Position Filtering ( Rate = 4.6khz for <= 8 vib chs. or 2.3khz for > 8 chs.)
Gap9 Position Scaling & Limit Check (Exec Rate = Frame Rate = 25, 50 or 100 hz)
Gap9_Pos1(TVIB1) and Gap22_Pos5(TVIB2) Gap Calculations GAP10/23_POS2/6 SysLim2GAP10/23 SysLim1GAP10/23
PRO10/23H Gap10_Pos2(TVIB1) & Gap23_Pos6(TVIB2) Gap Calculations PRO10/23L
PRO12/25H Gap12_Pos4(TVIB1) & Gap25_Pos8(TVIB2) Gap Calculations PRO12/25L
GAP12/25_POS4/8 SysLim2GAP12/25 SysLim1GAP12/25
PRO13H PRO13L
Diff Amp, MUX & A/D
Gap13/26 Filtering ( Rate = 4.6khz for <= 8 vib chs. or 2.3khz for > 8 chs.)
ScaleOff
Vgap
Scale SysLimit2 *
GAP13/26_KPH1/2 SysLim2GAP13/26 SysLim1GAP13/26 Limit Chk
A/D GAIN & OFFSET COMP. MEDIAN SELECT VOLTS ----------COUNT -1 Z Z -1
SysLimit1 *
Key Phasor Support

KPH_Thrshld KPH_Type
Comparator / Interrupt
Timer
Speed Calculation
RPM_KPH1/2 Gap13/26 Scaling & Limit Check (Exec Rate = Frame Rate = 25, 50 or 100 hz)
Gap13_KP1(TVIB1) & Gap26_KP2(TVIB2) Calculations
Wideband Vibration Filtering

The Wideband_Vibration Filtering function is executed at 4.6 kHz rate and 2.3 kHz rate if input channels 14 through 21 are configured as vibration channels. The vibration input for this function comes from the FPGA that controls the A/D and multipler circuit. The gap or position filter is a 2-pole low pass filter with a cutoff frequency set at 8 Hz. The output of the gap filter is expressed in volts and provides the input the Gap Scaling and Limit Check function. The wideband vibration information can be shaped or conditioned based on the configuration parameter, FilterType. FilterTypes equal to Low-pass, Band-pass or High-pass are used for the Seismic and Velomitor sensor types. FilterType = None is used by all the other sensor types. The Low-Pass filter can be configured for 2, 4, 6 or 8 pole attenuation behavior through the parameter, Filtrlpattn. The 3 db cutoff frequency, Filtrlocutoff is also adjustable. The High-pass filter can also be configured for 2, 4, 6 and 8 pole to sharpen the attenuation characteristics of the filter through the parameter, Filtrhpattn. The cutoff frequency, Filtrhpcutoff is adjustable in configuration. The wideband filtered vibration output, Vfout goes through a minimum/maximum peak detect function. The capture window for the minimum/maximum detect is 160 milliseconds wide for Keyphasor based speeds greater than 12 rpm. The objective is to capture at least 2 cycles of vibration information to get an accurate peak-to-peak calculation. The wideband unfiltered vibration output, goes through a second minimum/maximum peak detect function. The outputs, Vmax and Vmin, are used to clamp the filtered vibration output peak-to-peaks.
Wideband Vibration Filtering and Peak Detection

Exec. Rate = 4600 / 2300 Hz
Note 1: Text in BLUE are PVIB configuration parameters.

Mag. (db) 0 -3 Low Pass Filter (2,4,6 or 8-pole)
V_wb
Note 2: This filter type is only used for Seismics and VelomitorsTM. Note 3: This filter type is used for all other sensor types.
Filtrlpcutoff Filtrlpattn = 8 6 4 2
Freq. (Hz)
Mag. (db) 0 -3
High Pass Filter (2,4,6 or 8-pole) Mag. (db) 0 -3
Low Pass Filter (2,4,6 or 8-pole)
FilterType Lowpass(Note2) Bandpass(Note2)
MAX
Vfmax (cnts)

Freq. (Hz) Filtrhpattn = 2 Mag. (db) 0 -3 High Pass Filter (2,4,6 or 8-pole) 4 6 8 Filtrhpcutoff Filtrlpattn = 8 6 4 Filtrlpcutoff 2 Freq. (Hz) Highpass(Note2) none(Note3) Vfout (cnts) MIN Pk-Pk Scan Time 160 ms MAX Freq. (Hz) Filtrhpattn = 2 4 6 8 Filtrhpcutoff MIN Pk-Pk Scan Time 160 ms Vmax (cnts)
Vfmin (cnts)
Vmin (cnts)
Vpp Filter and Limit Check

The Vpp, Filter and Limit Check operates on channels 1 through 8 for TVIB1 and channels 14 through 21 for TVIB2. The execution rate for the function is 6.25 Hz. The Vpp, Filter, and Limit Check inputs are the following: Vfmax filtered maximum peak vibration Vfmin filtered minimum peak vibration Vmin unfiltered min peak vibration Vmax unfiltered max peak vibration
The system inputs or Vpp, Filter, and Limit Check outputs are: VIBx - the wideband vibration in EU where the units for EU are in peak for the configuration parameter, VibType = Seismic, Velomitor or Accelerometer and the EU units are peak-to-peak for VibType = Proximitor SysLim1VIBx the System Limit #1 Boolean (Boolean is True if VIBx is in the limit 1) SysLim2VIBx the System Limit #2 Boolean (Boolean is True if VIBx is in the limit 2) The system output used is the System Limit Reset Boolean. If Reset is True, a latched System Limit Boolean is cleared. The filtered peak-to-peak wideband vibration signal, Vfpp = Vfmax Vfmin. Vfpp is then clamped based on the unfiltered peak-to-peak wideband value. The clamp prevents outputs from the Infinite Impulse Response (IIR-based) filter designs used for the high-pass and low-pass filters to exceed the original input values. The clamped wideband vibration signal, Vpp passes through a single-pole low-pass filter with an adjustable cutoff frequency, VIB_PP_Fltr. The Vpp, Filter, and Limit Check scaling block converts the clamped and filtered wideband peak-to-peak vibration from volts to EU or Volts peak (Vp) depending on the configuration parameter VibType. VibType determines the A/D conversion value, AD_CONV in units of volts / counts and the default value for the sensor offset and the final EU units being expressed in peak or peak-to-peak. VIBScale gain factor expressed in volts peak / EU (peak) irregardless to the VibType setting. ScaleOffset offset value in EU (peak).
The Vpp, Filter and Limit Check provides two System Limit blocks. The following configuration parameters control the behavior of the System Limit block: SysLimxEnabl the System Limit (x=1 or 2) Enable is set True to select the use of the block. SysLimxType the System Limit (x=1 or 2) Type selects whether the limit check does a >= check or a <= check. SysLimitx System Limit (x=1 or 2) is the limit value used in the >= or <= check. SysLimxLatch System Limit (x=1 or 2) Latch determines whether the Boolean status flag is latched or unlatched. If the Boolean status flag is latched the flag will remain True even if the limit value is no longer exceeded.
The system input or System Limit Boolean status flag is SysLimxVIBy where x is the System Limit block number (1 or 2) and y is the VVIB channel input number (1 8 for TVIB1 and 14 21 for TVIB2).
Gap Scaling and Limit Check

The Gap Scaling and Limit Check operates on channels 1 through 8 for TVIB1 and channels 14 through 21 for TVIB2. The execution rate for the function is 25, 50, or 100 Hz. The rate of execution is based on the frame rate selected for IONet. The system inputs or Gap Scaling and Limit Check outputs are: Gapx_VIBx the position or gap value in EU for Proximitors and bias voltage in Vdc for accelerometers with integrated outputs, seismics, and Velomitors SysLim1GAPx the System Limit #1 Boolean; (Boolean is True if GAPx_VIBx is in the limit 1) SysLim2GAPx the System Limit #2 Boolean. (Boolean is True if GAP_VIBx is in the limit 2) The system output used is the System Limit Reset Boolean. If Reset is True, a latched System Limit Boolean is cleared. The Gap Scaling and Limit Check scaling block converts the 8 Hz filtered output gap signal from volts to EU or Volts peak (Vp) depending on the configuration parameter VibType. The scaling is determined by the following configuration parameters: VIB_Scale gain factor expressed in volts peak / EU (peak) irregardless to the VibType setting. ScaleOffset offset value in EU (peak)
The Gap Scaling and Limit Check provides two System Limit blocks. The following configuration parameters control the behavior of the System Limit block: SysLimxEnabl the System Limit (x=1 or 2) Enable is set True to select the use of the block. SysLimxType the System Limit (x=1 or 2) Type selects whether the limit check does a >= check or a <= check. SysLimitx System Limit (x=1 or 2) is the limit value used in the >= or <= check. SysLimxLatch System Limit (x=1 or 2) Latch determines whether the Boolean status flag is latched or unlatched. If the Boolean status flag is latched the flag will remain True even if the limit value is no longer exceeded.
The system input or System Limit Boolean status flag is SysLimxGAPy where x is the System Limit block number (1 or 2) and y is the VVIB channel input number (1 8 for TVIB1 and 14 21 for TVIB2).
Gapx_POSy Gap Calculations

The Gapx_POSy Gap Calculations is comprised of the Gapx Position Filtering and the Gapx_Pos Scaling and Limit Check where x is the VVIB channel number 9 through 12 for TVIB1 and 22 through 25 for TVIB2 and y is the position number 1 4 for TVIB1 and 5 8 for TVIB2. The Gapx_POSy Gap Calculations outputs are: Gapx_POSy the position or gap value in EU for Proximitors SysLim1GAPx the System Limit #1 Boolean (Boolean is True if GAPx_POSy is in the limit 1) SysLim2GAPx the System Limit #2 Boolean (Boolean is True if GAP_POSy is in the limit 2) The system output used is the System Limit Reset Boolean. If Reset is True, a latched System Limit Boolean is cleared. The Gapx_Position Filtering is executed at 4.6 kHz rate and 2.3 kHz rate if input channels 14 through 21 are configured as vibration channels. The position input for this function comes from an FPGA that controls the multiplexed A/Ds. The A/D value is compensated for A/D gain and offset errors and converted to volts. A median select filter is then applied. The Gapx_Position Scaling and Limit Check scaling block converts the filtered gap signal from volts to EU or Volts peak (Vp) depending on the configuration parameter VibType. The configuration parameters are: Scale gain factor expressed in volts peak / EU (peak) ScaleOffset offset value in EU (peak)
The Gapx_Position Scaling and Limit Check provides two System Limit blocks. The following configuration parameters control the behavior of the System Limit block: SysLimxEnabl the System Limit (x=1 or 2) Enable is set True to select the use of the block. SysLimxType the System Limit (x=1 or 2) Type selects whether the limit check does a >= check or a <= check. SysLimitx System Limit (x=1 or 2) is the limit value used in the >= or <= check. SysLimxLatch System Limit (x=1 or 2) Latch determines whether the Boolean status flag is latched or unlatched. If the Boolean status flag is latched the flag will remain True even if the limit value is no longer exceeded.
The system input or System Limit Boolean status flag is SysLimxGAPy where x is the System Limit block number (1 or 2) and y is the VVIB channel input number (9 12 for TVIB1 and 22 25 for TVIB2).
Gap13/26_KPH1/2 Calculations
The Gap13/26_KPH12 Calculations is comprised of the Gap13/26 Filtering and the Gap13/26_KP Scaling and Limit Check. The Gap13/26_KPH1/2 Calculation system inputs are: GAP13_KPH1 the position or gap value in EU for the Keyphasor Proximitor for TVIB1 GAP26_KPH2 the position or gap value in EU for the Keyphasor Proximitor for TVIB2 SysLim1GAP13 the System Limit #1 Boolean for TVIB1 (Boolean is True if GAP13_KPH1 is in the limit 1) SysLim2GAP13 the System Limit #2 Boolean for TVIB1 (Boolean is True if GAP13_KPH1 is in the limit 2) SysLim1GAP26 the System Limit #1 Boolean for TVIB2 (Boolean is True if GAP26_KPH2 is in the limit 1) SysLim2GAP26 the System Limit #2 Boolean for TVIB2 (Boolean is True if GAP26_KPH2 is in the limit 2) The Gap13_KPH1 system outputs are: SysLimReset the System Limit Reset Boolean (If Reset is True, a latched System Limit Boolean is cleared) LM_RPMx rotor shaft speed in rpm from different stages of the turbine (x = A, B or C) The Gap 13/26 Filtering is executed at 4.6 kHz rate and 2.3 kHz rate if input channels 14 through 21 are configured as vibration channels. The input for this function comes from a multiplexed A/D controlled by an FPGA. The Gap 13/26 Filtering uses the median select function to calculate the filtered gap. The median select filter uses the present value (n), the previous (n-1), and the value 2 samples back (n-2) to perform a median select on. The output is expressed in volts and passes to the Gap13/26 Scaling and Limit Check. The Gap13/26 Scaling and Limit Check scaling block converts the filtered gap signal from volts to EU. The Gap13/26 runs at the frame rate of either 25, 50 or 100 Hz. The gap conversion is based on the following configuration parameters: Scale gain factor expressed in volts peak / EU (peak) ScaleOffset offset value in EU (peak)
The Gap13/26 Scaling & Limit Check provides two System Limit blocks. The following configuration parameters control the behavior of the System Limit block: SysLimxEnabl the System Limit (x=1 or 2) Enable is set True to select the use of the block. SysLimxType the System Limit (x=1 or 2) Type selects whether the limit check does a >= check or a <= check. SysLimitx System Limit (x=1 or 2) is the limit value used in the >= or <= check. SysLimxLatch System Limit (x=1 or 2) Latch determines whether the Boolean status flag is latched or unlatched. If the Boolean status flag is latched the flag will remain True even if the limit value is no longer exceeded.
The system input or System Limit Boolean status flag is SysLimxGAP13 for TVIB1 and SysLimxGAP26 for TVIB2 where x is the System Limit block number (1 or 2).
1X and 2X Calculations based on Keyphasor Input

The 1X and 2X Calculations based on a Keyphasor input provides a peak-to-peak vibration component (magnitude and phase) at both the Keyphasor frequency and twice the frequency. The calculations are comprised of two sections: Modulator and Filter Magnitude and Phase Calculation
The system inputs from the 1X & 2X calculations are: Vib1Xy the peak-to-peak magnitude of the vibration phasor that is rotating at the Keyphasor frequency Vib1xPHy the phase angle between the Keyphasor input and the ViB1Xy vibration phasor Vib2Xy the peak-to-peak magnitude of the vibration phasor that is rotating at the twice the Keyphasor frequency Vib1xPHy the phase angle between the Keyphasor input and the Vib2Xy vibration phasor, and where y is the VVIB channel number, 1 through 8 for TVIB1 and 14 through 21 for TVIB2
The Modulator and Filter for both the 1X and 2X calculations are executed at 4.6 kHz rate and 2.3 kHz rate if input channels 14 through 21 are configured as vibration channels. The 1X modulator has two inputs: delta_1/delta_2 and the vibration channel input. The delta_1/ delta_2 is the point in the key_phasor cycle where the vibration channel input was sampled. The range for delta_1/delta_2 is from 0 to 1. Delta_1/delta_2 is converted to radians and is the index into a cosine and sine lookup table. The result from the cosine and sine lookup table is modulated with the vibration channel input. The modulated signal is filtered through a 4-pole low pass filter with a cutoff frequency of 0.25 Hz. The filter output provides the dc value of the de-modulated components: the real and imaginary phasors of the vibration component that is rotating at 1X speed. The Vibration 1X function uses the real and imaginary vibration components based on the Keyphasor frequency as the inputs to the RMS calculator. The square root of the sum of the squares of the real and imaginary vibration components times the scaling block results in the peak-to-peak magnitude of the 1X vibration phasor, Vib1Xy rotating at the Keyphasor frequency. The phase, Vib1xPHy, is the arccosine of the absolute value of Fpi / (VMK ). The Vibration 2X function is the same calculation except the input delta_1/delta_2 is multiplied by 4 * PI instead of 2 * PI. The results are a peak-to-peak magnitude of the 2X vibration phasor, Vib2Xy, rotating at twice the Keyphasor frequency and a phase of Vib2xPHy. The scaling block converts the VMK * 4 signal to EU. The scaling is based the following configuration parameters: Scale gain factor expressed in volts peak / EU (peak) ScaleOffset offset value in EU (peak)
Terminal Board Pts Ch 1/14 Signal Cond. & A / D Input Block PRO01/14H PRO01/14L Diff Amp, MUX & A/D A/D GAIN & OFFSET COMP. VOLTS ----------COUNT Signal Space (Sys Inputs)
Vibration 1X for Ch 1/14 COS delta_1 ------------delta_2 2 * PI SINE Fs = 4.6khz for <= 8 chs. or 2.3khz for > 8 vib ch.
LOW PASS FILTER (.25 Hz, 4P)
X +
SQRT VMK D N DIVIDE -1 COS 4 ips -----volt
Fs = 100 Hz
Vib1X1/9 57.29578 Vib1xPH1/9
X
Fpi
ABS
Vibration 2X for Ch 1 COS 4 * PI SINE Fs = 4.6khz for <= 8 chs. or 2.3khz for > 8 vib ch.
X +
SQRT VMK D N DIVIDE -1 COS 4 ips -----volt
Fs = 100 Hz
Vib2X1/9 57.29578 Vib2xPH1/9
X
Fpi
ABS
Terminal Board Pts
where delta_1 Time from KeyPhasor to A/D Read ---------- = --------------------------------------------------- + ( Channel # - 1 ) * A/D Conv. Time delta_2 KeyPhasor Period
PRO02/15H PRO02/15L
Ch 2/15 Signal Cond. & A / D Input Block
Vib1X2/10 Vibration 1X for Ch2/15 Vib1xPH2/10 Vib2X2/10 Vibration 2X for Ch 2/15 Vib2xPH2/10
PRO08/21H PRO08/21L
Ch 8/21 Signal Cond. & A / D Input Block
Vib1X8/16 Vibration 1X for Ch8/21 Vib1xPH8/16 Vib2X8/16 Vibration 2X for Ch 8/21 Vib2xPH8/16
Tracking Filters based on LM_RPM_A/B and C

The Tracking Filters based on LM_RPM_A/B and C provide the peak vibration component (magnitude only) at the frequencies: LM_RPM_A, LM_RPM_B, and LM_RPM_C. The Tracking filters require both Modulation & filter stage executing at 4.6 kHz rate and 2.3 kHz rate if input channels 14 through 21 are configured as vibration channels and the Magnitude calculation. The system inputs from the Tracking filters are: LMVibxA the peak magnitude of the vibration component rotating at LM_RPM_A speed LMVibxB the peak magnitude of the vibration component rotating at LM_RPM_B speed LMVibxC the peak magnitude of the vibration component rotating at LM_RPM_C speed SysLim1ACCx the System Limit Boolean status of Limit1 where x = 1 through 9 SysLim2ACCx the System Limit Boolean status of Limit2 where x = 1 through 9
The Modulator and Low-pass filter for the LMVibxA, LMVibxB, and LMVibxC tracking filters are executed at 4.6 kHz rate. The low-pass filter is identical for all tracking filters. The filter is a 5-pole low-pass filter with a cutoff frequency equal to 2.5 Hz. The LMVibxA filter inputs are the modulated signals cos(2pi/60Fs * LM_RPM_A) * Vibration Input and sin(2pi/60Fs * LM_RPM_A) * Vibration Input. The filtered output of the modulated vibration input with the sine is the de-modulated imaginary component of the channel vibration based on the rotor shaft speed, LM_RPM_A and the filtered output of the modulated vibration input with the cosine is the de-modulated real component of the channel vibration based on the rotor shaft speed, LM_RPM_A. The LMVibxB and LMVibxC tracking filters perform the same task as the LMVibxA filter, except the de-modulated real and imaginary components of the vibration input are based on the rotor speeds: LM_RPM_B and LM_RPM_C. The scaling block converts the VMx where x = A, B, or C magnitude to EU. The scaling is based on the following configuration parameters: Scale gain factor expressed in volts peak / EU (peak) ScaleOffset offset value in EU (peak)
The Tracking Filter provides two System Limit blocks. The following configuration parameters control the behavior of the System Limit block: SysLimxEnabl the System Limit (x=1 or 2) Enable is set True to select the use of the block. SysLimxType the System Limit (x=1 or 2) Type selects whether the limit check does a >= check or a <= check. SysLimitx System Limit (x=1 or 2) is the limit value used in the >= or <= check. SysLimxLatch System Limit (x=1 or 2) Latch determines whether the Boolean status flag is latched or unlatched. If the Boolean status flag is latched the flag will remain True even if the limit value is no longer exceeded.
Terminal Board Pts PRO01H PRO01L
Ch 1 Signal Cond. & A / D Input Block Diff Amp, MUX & A/D A/D GAIN & OFFSET COMP. VOLTS ----------COUNT Signal Space (Sys Inputs) LMVib1A
Ch 1Tracking Filter for LM_RPM_A Signal Space

(Sys Outputs)
Fs = 4.6khz for <= 8 chs. or 2.3khz for > 8 vib ch. COS 2 * PI ---------60 * Fs
LOW PASS FILTER (2.5 Hz, 5P)
ips -----volt
LM_RPM_A
X
n SINE
+
X
SQRT
SysLimit2 *
SysLim2ACC1 SysLim1ACC1
X
Limit Chk
SysLimit1 *
( 1 to Fs / (LM_RPM_A/60) )
Fs = 100 Hz
Ch 1 Tracking Filter for LM_RPM_B Fs = 4.6khz for <= 8 chs. or 2.3khz for > 8 vib ch. COS LM_RPM_B 2 * PI ---------60 * Fs LOW PASS FILTER (2.5 Hz, 5P) ips -----volt
SysLimit2 *
LMVib1B
X
n SINE
+
X
SQRT
Limit Chk
X
SysLimit1 *
( 1 to Fs / (LM_RPM_B/60) )
Fs = 100 Hz
Ch 1 Tracking Filter for LM_RPM_C Fs = 4.6khz for <= 8 chs. or 2.3khz for > 8 vib ch. COS LM_RPM_C 2 * PI ---------60 * Fs LOW PASS FILTER (2.5 Hz, 5P) ips -----volt
SysLimit2 *
LMVib1C
X
n SINE
+
X
SQRT
Limit Chk
X
SysLimit1 *
( 1 to Fs / (LM_RPM_C/60) )
Fs = 100 Hz
Ch 2 Tracking Filter for LM_RPM_A
LMVib2A SysLim2ACC4 SysLim1ACC4 LMVib2B SysLim2ACC5 SysLim1ACC5 LMVib2C SysLim2ACC6 SysLim1ACC6 LMVib3A SysLim2ACC7 SysLim1ACC7 LMVib3B SysLim2ACC8 SysLim1ACC8 LMVib3C SysLim2ACC9 SysLim1ACC9
Terminal Board Pts
Ch 2 Tracking Filter for LM_RPM_B
PRO02H PRO02L
Ch 2 Signal Cond. & A / D Input Block
Ch 2 Tracking Filter for LM_RPM_C
Ch 3 Tracking Filter for LM_RPM_A
Ch 3 Tracking Filter for LM_RPM_B
PRO03H PRO03L
Ch 3 Signal Cond. & A / D Input Block
Ch 3 Tracking Filter for LM_RPM_C
Specifications
Item Number of Channels Vibration Proximity Seismic Velomitor Accelerometer Position Phase Probe power Probe signal sampling Specification TVIB: 13 probes: 8 vibration, 4 position, 1 Keyphasor VVIB: 26 probes with two TVIB boards Measurement Displacement Displacement Velocity Velocity Velocity Velocity Velocity (track filter) Position Degrees Range 0 to 4.5 V pp 0 to 4.5 V pp 0 to 2.25 V p 0 to 2.25 V p 0 to 2.25 V p 0 to 2.25 V p 0 to 2.25 V p -.5 to -20 V dc 0 to 360 degrees Accuracy 0 .030 V pp 0 .150 V pp Max [2% reading, 0.008 Vp] Max [5% reading, 0.008 Vp] Max [2% reading, 0.008 Vp] Max [5% reading, 0.008 Vp] 0.015 Vp 0.2 V dc 2 degrees Frequency 5 to 200 Hz 200 to 500 Hz 5 to 200 Hz 200 to 500 Hz 5 to 200 Hz 200 to 500 Hz 10 to 233 Hz Air gap (average) Up to 14,000 rpm
(1X vibration component with respect to key slot) -24 V dc from the -28 V dc bus; each probe supply is current limited 12 mA load per transducer 16-bit A/D converter with 14-bit resolution on the VVIB Sampling rate is 4,600 samples per second in fast scan mode (4,000 to 17,500 rpm) Sampling rate is 2,586 samples per second for nine or more probes (less than 4,000 rpm) All inputs are simultaneously sampled in time windows of 160 ms Rated RPM Buffered outputs If greater than 4,000 rpm, can use eight vibration channels, (others can be prox/position) If less than 4,000 rpm, can use 16 vibration channels, and other probes Amplitude accuracy is 0.1% for signal to Bently Nevada 3500 vibration analysis system
Diagnostics
Diagnostics perform a high/low (hardware) limit check on the input signal and a high/low system (software) limit check. The software limit check is adjustable in the field. A probe fault, alarm, or trip condition occurs if either of an X or Y probe pair exceeds its limits. In addition, the application software prevents a vibration trip (the ac component) if a probe fault is detected based on the dc component. Position inputs for thrust wear protection, differential expansion, and eccentricity are monitored similar to the vibration inputs except only the dc component is used for a position indication. A 16-bit sampling type A/D converter is used with 14-bit resolution and overall circuit accuracy of 1% of full scale.
Vibration Monitoring and Analysis

Note The Mark VI system provides vibration protection and displays the basic vibration parameters.
Each input is actively isolated and the signals made available through four plugs for direct cabling to a Bently Nevada 3500 monitor. This configuration provides the maximum reliability by having a direct interface from the Proximitors to the turbine control for trip protection and still retaining the real-time data access to the Bently Nevada system for static and dynamic vibration monitoring.
Note The Mark VI system displays the total vibration, the 1X vibration component, and the 1X vibration phase angle, but it is not intended as a vibration analysis system.
Fourteen BNC connectors on TVIB provide buffered signals available to portable data gathering equipment for predictive maintenance purposes. Buffered outputs have unity gain, 10 k internal impedance, and can drive loads up to 1500 configuration.
Configuration
Parameter Configuration System limits Vib_PP_Fltr LMVib1A SysLim1Enable SysLim1Latch SysLim1Type SysLimit1 SysLim2Enable TMR_DiffLimt LMVib1B LMVib1C LMVib2A LMVib2B LMVib2C LMVib3A LMVib3B LMVib3C J3:IS200TVIBH1A GAP1_VIB1 VIB_Type Enable system limits First order filter time constant (sec) Vib, 1X component, for LM_RPM_A, input #1 - board point Enable system limit 1 fault check Latch system limit 1 fault system limit 1 check type System Limit 1 - Vibration in mils (Prox) or Inch/sec (seismic, accel) Enable system limit 2 (same configuration as above) Difference limit for voted TMR inputs in volts or mils Vib, 1X component, for LM_RPM_B, #1 - board point Vib, 1X component, for LM_RPM_C, #1 - board point Vib, 1X component, for LM_RPM_A, #2 - board point Vib, 1X component, for LM_RPM_B, #2 - board point Vib, 1X component, for LM_RPM_C, #2 - board point Vib, 1X component, for LM_RPM_A, #3 - board point Vib, 1X component, for LM_RPM_B, #3 - board point Vib, 1X component, for LM_RPM_C, #3 - board point Vibration terminal board, first of two Average air gap (for Prox) or dc volts (for others) - board point Type of vibration probe Enable, disable 0.01 to 2 Point edit (input FLOAT) Enable, disable Latch, not latch >= or <= -100 to +100 Enable, disable -100 to +100 Point edit (input FLOAT) Point edit (input FLOAT) Point edit (input FLOAT) Point edit (input FLOAT) Point edit (input FLOAT) Point edit (input FLOAT) Point edit (input FLOAT) Point edit (input FLOAT) Connected, not connected Point edit (input FLOAT) Unused, PosProx, VibProx, VibProxKPH1, VibProx-KPH2, VibLMAccel, VibVelomitor, KeyPhasor 0 to 2 0 to 90 Enable, disable Latch, not latch >= or <= Description Choices
VIB_Scale ScaleOff SysLim1Enable SysLim1Latch SysLim1Type SysLimit1 SysLim2Enabl TMR_DiffLimt
Volts/mil or volts/ips Scale offset for prox position only, in mils Enable system limit 1 Latch the alarm System limit 1 check type
System limit 1 GAP in negative volts (for vel) or positive -100 to +100 mils (prox) Enable system limit 2 (same configuration as above) Difference limit for voted TMR inputs in volts or mils Enable, disable -100 to +100
Parameter Vib1 SysLim1Enable GAP2_VIB2 Vib2 GAP9_POS1 GAP13_KPH1 J4:IS200TVIBH1A GAP14_VIB9 Vib9 GAP22_POS5 GAP26_KPH2
Description Vibration, displacement (pk-pk) or velocity (pk) - board point System limits configured as above Second vibration probe of 8 - board point Vibration, displacement (pk-pk) or velocity (pk) - board point First position probe of 4 - board point KeyPhasor probe air gap - board point Second vibration terminal board First Vibration Probe of 8 - board point Vibration, displacement (pk-pk) or velocity (pk) - board point First position probe of 4 - board point KeyPhasor probe air gap - board point
Choices Point edit (input FLOAT) Enable, disable Point edit (input FLOAT) Point edit (input FLOAT) Point edit (input FLOAT) Point edit (input FLOAT) Connected, not connected Point edit (input FLOAT) Point edit (input FLOAT) Point edit (input FLOAT) Point edit (input FLOAT)
Board Points Signals L3DIAG_VVIB1 L3DIAG_VVIB2 L3DIAG_VVIB3 SysLim1GAP1 : SysLim1GAP26 SysLim2GAP1 : SysLim2GAP26 SysLim1VIB1 : SysLim1VIB16 SysLim1ACC1 : SysLim1ACC9 SysLim2VIB1 : SysLim2VIB16 SysLim2ACC1 : SysLim2ACC9 RPM_KPH1 RPM_KPH2 Vib1X1 : Vib1X16 Vib1XPH1 : Vib1XPH16 LM_RPM_A LM_RPM_B LM_RPM_C
Description - Point Edit (Enter Signal Connection) Board diagnostic Board diagnostic Board diagnostic Gap signal limit : Gap signal limit Gap signal limit : Gap signal limit Vibration signal limit : Vibration signal limit Acceleration signal limit : Acceleration signal limit Vibration signal limit : Vibration signal limit Acceleration signal limit : Acceleration signal limit Speed RPM, of KP #1 Speed RPM, of KP #2 Vibration, 1X component only, displacement : Vibration, 1X component only, displacement Angle of 1X component to KP : Angle of 1X component to KP ----------------------
Direction Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Output Output Output
Type BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT BIT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT FLOAT
Alarms
Fault 2 3 16 17 18 19 20 21 22 23 24 30 Fault Description Flash Memory CRC Failure CRC failure override is Active System Limit Checking is Disabled Board ID Failure J3 ID Failure J4 ID Failure J5 ID Failure J6 ID Failure J3A ID Failure J4A ID Failure Firmware/Hardware Incompatibility ConfigCompatCode mismatch; Firmware: #; Tre: # The configuration compatibility code that the firmware is expecting is different than what is in the tre file for this board IOCompatCode mismatch; Firmware: #; Tre: # The I/O compatibility code that the firmware is expecting is different than what is in the tre file for this board VVIB A/D Converter 1 Calibration Outside of Spec. VVIB monitors the Calibration Levels on the 2 A/D. If any one of the calibration voltages is not within 1% of its expected value, this alarm is set VVIB A/D Converter 2 Calibration Outside of Spec. VVIB monitors the Calibration Levels on the 2 A/D. If any one of the calibration voltages is not within 1% of its expected value, this alarm is set TVIB J3 Analog Input (channel #) Out of Limits TVIB J4 Analog Input (channel #) Out of Limits TVIB/DVIB J3/J4 Analog Input # out of limits. VVIB monitors the Signal Levels from the 2 A/D. If any one of the voltages is above the max value, this diagnostic is set Logic Signal # Voting mismatch. The identified signal from this board disagrees with the voted value Input Signal # Voting mismatch, Local #, Voted #. The specified input signal varies from the voted value of the signal by more than the TMR Diff Limit Possible Cause Board firmware programming error (board will not go online) Board firmware programming error (board is allowed to go online) System checking was disabled by configuration. Failed ID chip on the VME I/O board Failed ID chip on connector J3, or cable problem Failed ID chip on connector J4, or cable problem Failed ID chip on connector J5, or cable problem Failed ID chip on connector J6, or cable problem Failed ID chip on connector J3A, or cable problem Failed ID chip on connector J4A, or cable problem Invalid terminal board connected to VME I/O board. A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. A tre file has been installed that is incompatible with the firmware on the I/O board. Either the tre file or firmware must change. Contact the factory. The hardware failed (if so replace the board) or there is a voltage supply problem
31
32
33
The hardware failed (if so replace the board) or there is a voltage supply problem
34 35 65-77/ 81-93
Possible open circuit, customer cable short or sensor failure Possible open circuit, customer cable short or sensor failure The TVIB/DVIB board(s) may not exist but the sensor is specified as used, or the sensor may be bad, or the wire fell off, or the device is miswired. A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable. A problem with the input. This could be the device, the wire to the terminal board, the terminal board, or the cable.
128287 288404
TVIB Vibration Input

The Vibration Input (TVIB) terminal board accepts up to 14 vibration probes, two of which can be cabled directly to the VVIB board. VVIB processes and digitizes the displacement and velocity signals, which are then sent over the VME bus to the controller. The Mark* VI system uses Bently Nevada probes for shaft vibration monitoring. The following vibration probes are compatible with TVIB: Proximity Velocity Acceleration Seismic Phase
There are two types of TVIB terminal boards, H1A and H2A. The H2A type board has BNC connectors allowing portable vibration data gathering equipment to be plugged in for predictive maintenance purposes. Both types have connectors so that Bently Nevada vibration monitoring equipment can be permanently cabled to the terminal board to measure and analyze turbine vibration. In the Mark VI system TVIB works with the VVIB processor and supports simplex and TMR applications. Two TVIBs connect to VVIB with two cables. In TMR systems, TVIB connects to three VVIB processors with three cables.
Note TVIBH does not support Mark VIe I/O packs.
TVIB Terminal Board x 37-pin "D" shell type connectors with latching fasteners
VVIB VME Board

x RUN FAIL STAT
Vibration signals
2 4 6 8 10 12 14 16 18 20 22 24
x x
1 3 5 7 9 11 13 15 17 19 21 23
...JA1 ... ... . ... ... . ... ... . ... ... . ... ... JB1 . ... ... . ... ... . ... ... .
JT1
JS1
Cable to rack T VME bus to VCMI
JC1
Vibration signals
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 JD1 29 31 JR1 33 P2 P1 35 37 39 P6 P5 P4 P3 41 43 45 P10 P9 P8 P7 47 14 13 12 P11
Cable to rack S
VVIB
x
J3
Shield bar Plugs for Portable BentlyNevada data gathering & monitoring equipment Cables to fixed BentlyNevada 3500 Vibration Monitoring System Cable to VME rack R Cable from second TVIB J4
Vibration Terminal Board, Processor Board, and Cabling
Installation
Connect the wires for the 14 vibration probes to the two terminal blocks, three wires per probe. In simplex systems, connect the TVIB1 JR1 connector to VVIB J3 on the VME rack and the TVIB JR1 connector to VVIB J4. In TMR systems, connect the VVIB JR1, JS1, and JT1 connectors to the R, S, and T VVIBs. Use jumpers JP1 through JP8 to select the probe type for the first eight probes. Optionally, connect TVIB to a Bently Nevada system using connectors JA1, JB1, JC1, and JD1.
Note Permanent cable connections to BNCs P1 through P14 are not made.
Vibration Terminal Board TVIBH2A
JPxB B/N buffer:
P,V,A P,A
JPxA sensor input: V
Jumper positions Probe selection jumpers
PR01 (H) N24V02 PR02 (L) PR03 (H) N24V04 PR04 (L) PR05 (H) N24V06 PR06 (L) PR07 (H) N24V08 PR08 (L)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
N24V01 PR01 (L) PR02 (H) N24V03 PR03 (L) PR04 (H) N24V05 PR05 (L) PR06 (H) N24V07 PR07 (L) PR08 (H)
Vibration probes
JP1B JP1A JP2B JP2A JP3B JP3A JP4B JP4A JP5B JP5A JP6B JP6A JP7B JP7A JP8B JP8A
Connectors JR1, JS1, JT1, to VME racks

x
PR09 (H) N24V10 PR10 (L) PR11 (H) N24V12 PR12 (L) PR13 (H) N24V14 PR14 (L)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
N24V09 PR09 (L) PR10 (H) N24V11 PR11 (L) PR12 (H) N24V13 PR13 (L) PR14 (H)
Connectors JA1,JB1, JC1, JD1 to optional Bentley Nevada 3500 system Position probes P2 BNC connectors for portable data gathering equipment
P1
P6 P5 P4 P3 P10 P9 P8 P7
Reference probe P14 P13 P12 P11 Bently Nevada probe
P1 is PR01 P2 is PR02 and so on. P14 is for Bently Nevada Jumper JPXA: S = Seismic V = Velomitor P = Proximitor A = Accelerometer Jumper JPXB: S = Seismic V = Velomitor P = Proximitor A = Accelerometer
Ckt 01 02 03 04 05 06 07 08 09 10 11 12 13 14
Connector Pin Assignments Px, BNC Sensor Conn Comm Sign Shld Connector P1 Vib 1 JA1 2 3 4 P2 Vib 2 JA1 6 7 8 P3 Vib 3 JA1 10 11 12 P4 Vib 4 JA1 24 23 22 P5 Vib 5 JB1 2 3 4 P6 Vib 6 JB1 6 7 8 P7 Vib 7 JB1 10 11 12 P8 Vib 8 JB1 24 23 22 P9 Pos 1 JC1 2 3 4 P10 Pos 2 JC1 6 7 8 P11 Pos 3 JC1 10 11 12 P12 Pos 4 JC1 24 23 22 P13 Ref probeJD1 3 1 2 P14 B/N only JD1 9 5 4
Terminal Board TVIB Wiring
Operation
TVIB supports Proximitor , Seismic, Accelerometer, and Velomitor probes supplied by Bently Nevada. Power for the vibration probes comes from the VVIB boards in simplex or TMR mode. The probe signals return to VVIB where they are A/D converted and sent over the VME bus to the controller. Vibration, eccentricity, and axial position alarms and trip logic are generated in the controller.

A -28 V dc source is supplied to the terminal board from the VME board for Proximitor power. In TMR systems, a diode high-select circuit selects the highest 28 V dc bus for redundancy. Regulators provide individual excitation sources, -23 to -26 V dc, that are short circuit protected. VVIB samples the probe inputs at high speed over discrete time periods.
<R> <S>
<T>
Terminal Board TVIBH2A N28V N28VR Current Limit 1 N24V1 S CL V 2 PR01H S <S> <T>
ID
JR1
J3
Vibration Board VVIB 28 V dc

Amp A/D
To controller Sampling type A/D converter (16 bit)
P s V R 3mA S O JP1A P,A 3 PR01L X S PCOM Vib. or pos. Eight of the prox. (P), or above ccts. P,V,A seismic (S), or accel (A), N28V or velomiter S (V) JP1B CL Negative 25 N24V9 Volt Ref
S S S
JS1 N28V
J3
Same as <S>
ID
JT1 N28V
J3
TMR Applications Same as <T>
P R O X
26 PR09H 27 PR09L
ID
JA1 Buffer Amplifiers

D B2 5
Position prox
Four of the above ccts. PCOM N28V CL
JB1
D B2 5
J4
Buffer Amplifiers
P1-P8 JC1
D B2 5
J4
37 N24V13
S S S
P R O X
38 PR13H 39
PR13L
Reference or PCOM keyphasor prox. One of the above ccts for Mark VI (Two of the above ccts for B/N P13-P14 Four cables to Bently Nevada 3500 system
Buffer Amplifiers
P9-P12 BNC JD1 Connectors
J4
D B9
TVIB Board, Vibration Probes, and Bently Nevada Interface
Specifications
Item Number of Channels Probe Type Proximity Specification 13 probes: 8 vibration, 4 position, 1 Keyphasor Measurement Displacement 5 to 200 Hz Displacement 200 to 500 Hz Seismic Velocity Velocity Velomitor Velocity Velocity Accelerometer Position Phase Velocity (track filter) 10 to 233 Hz Position Air gap (average) Degrees 0 to 360 degrees 2 degrees Up to 14,000 rpm (1X vibration component with respect to key slot) Probe power Rated RPM Buffered outputs Size -24 V dc from the -28 V dc bus; each probe supply is current limited 12 mA load per transducer If greater than 4,000 rpm, can use eight vibration channels, (others can be prox/position) If less than 4,000 rpm, can use 16 vibration channels, and other probes Amplitude accuracy is 0.1% for signal to Bently Nevada* 3500 vibration analysis system 33.0 cm high x 17.8 cm wide (13 in. x 7 in.) -.5 to -20 V dc 0.2 V dc 0 to 2.25 V p 5 to 200 Hz 0 to 2.25 V p 200 to 500 Hz 0 to 2.25 V p 5 to 200 Hz 0 to 2.25 V p 200 to 500 Hz 0 to 2.25 V p 0 .015 Vp Max [5% reading, 0.008 Vp] Max [2% reading, 0.008 Vp] Max [5% reading, 0.008 Vp] Max [2% reading, 0.008 Vp] 0 to 4.5 V pp 0 .150 V pp Range 0 to 4.5 V pp Accuracy 0 .030 V pp
Diagnostics
Diagnostic tests are performed on the terminal board components by VVIB as follows: Diagnostics perform a high/low (hardware) limit check on the probe input signals and a high/low system (software) limit check. These limits create faults. A probe fault, alarm, or trip condition will occur if either of an X or Y probe pair exceeds its limits. Position inputs for thrust wear protection, differential expansion, and eccentricity are monitored similar to the vibration inputs except only the dc component is used for a position indication. If a maximum limit is exceeded a fault is created.
Fourteen BNC connectors on TVIB provide buffered signals available to portable data gathering equipment for predictive maintenance purposes. Buffered outputs have unity gain, 10 internal impedance, and can drive loads up to 1500 .
Configuration
Jumpers JP1A through JP8A select the type of the first eight probes as follows: S = Seismic V = Velocity P = Proximity A = Accelerometer
Refer to the Installation section for more information.
DVIB Simplex Vibration Input

The Simplex Vibration Input (DVIB) terminal board is a compact vibration terminal board for DIN-rail mounting. It is designed to meet UL 1604 specification for operation in a 65C Class 1, Division 2 environment. DVIB accepts 13 vibration probes, including 8 vibration inputs, 4 position inputs, and 1 Keyphasor input. It connects to the VVIB processor board with a 37-pin cable identical to those used on the larger TVIB terminal board. VVIB accommodates two DVIB boards.
Note Only a simplex version is available.
Installation
Mount the plastic holder on the DIN-rail and slide the DVIB board into place. Connect the wires for the vibration probes to the terminal block, which has 42 terminals. Typically #18 AWG shielded twisted triplet wiring is used. Two screws, 41 and 42, are provided for the SCOM (ground) connection, which should be as short distance as possible.
DIN Vibration Terminal Board DVIB Screw Connections V 37-pin "D" shell connector with latching fasteners JR1 V V V V V Cable to J3 connector in I/O rack for the VVIB board V V JP1A S JP2A S JP3A S JP4A S JP5A S JP6A S JP7A S JP8A S P P P P P P P P PR01 (H) N24V02 PR02 (L) PR03 (H) N24V04 PR04 (L) PR05 (H) N24V06 PR06 (L) PR07 (H) N24V08 PR08 (L) PR09 (H) N24V10 PR10 (L) PR11 (H) N24V12 PR12 (L) PR13 (H) SCOM 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 Screw Connections N24V01 PR01 (L) PR02 (H) N24V03 PR03 (L) PR04 (H) IN24V05 PR05 (L) PR06 (H) N24V07 PR07 (L) PR08 (H) N24V09 PR09 (L) PR10 (H) N24V11 PR11 (L) PR12 (H) N24V13 PR13 (L) SCOM
Vib 1-8
Pos 1-4
Ref probe
SCOM
DIN-rail mounting
DVIB Wiring and Cabling
Operation
The eight vibration inputs on each DVIB can be applied as either Proximitor, accelerometer, seismic (velocity), or Velomitor inputs. Jumpers on DVIB assign a specific vibration sensor type to each input point, with the seismic type assigned to point (S), the Velomitor type assigned to point (V), and the Proximitor and accelerometer types sharing point (P/A). The Proximitor reads a shaft keyway to generate a once per revolution Keyphasor input for phase angle reference. On DVIB, the high frequency decoupling to ground on all signals is the same as on TVIB. An on-board ID chip identifies the board to VVIB for system diagnostic purposes.
<R>
DVIB Board
JR1
J3
N28V N28VR
Vibration Board VVIB 28Vdc

Amp A/D
To controller Sampling type A/D converter (16-bit)
P S V R S O JP1A P,A 3 PR01L X S Vib. or pos. Eight of the prox. (P), or above circuits P28V seismic (S), or accel (A), N28V or velomiter (V)
CL 25 N24V9
Current limit 1 N24V1 S CL V 2 PR01H S
ID
3mA
PCOM
S S S
P R O X Position Prox
26 PR09H 27
PR09L
J4
Four of the above circuits PCOM N28V CL
37 N24V13
S S S
P R O X
38 39
PR13H PR13L
Reference or peyPhasor prox.
PCOM
DVIB Terminal Board
Specifications
Item Number of Channels Probe Type Proximity Specification 13 probes: 8 vibration, 4 position, 1 Keyphasor Measurement Displacement 5 to 200 Hz Displacement 200 to 500 Hz Seismic Velocity Velocity Velomitor Velocity Velocity Accelerometer Position Phase Velocity (track filter) 10 to 233 Hz Position Air gap (average) Degrees 0 to 360 degrees 2 degrees Up to 14,000 rpm (1X vibration component with respect to key slot) Probe power Rated RPM Buffered outputs Size -24 V dc from the -28 V dc bus; each probe supply is current limited 12 mA load per transducer If greater than 4,000 rpm, can use eight vibration channels, (others can be prox/position) If less than 4,000 rpm, can use 16 vibration channels, and other probes Amplitude accuracy is 0.1% for signal to Bently Nevada* 3500 vibration analysis system 33.0 cm high x 17.8 cm wide (13 in. x 7 in.) -.5 to -20 V dc 0.2 V dc 0 to 2.25 V p 5 to 200 Hz 0 to 2.25 V p 200 to 500 Hz 0 to 2.25 V p 5 to 200 Hz 0 to 2.25 V p 200 to 500 Hz 0 to 2.25 V p 0 .015 Vp Max [5% reading, 0.008 Vp] Max [2% reading, 0.008 Vp] Max [5% reading, 0.008 Vp] Max [2% reading, 0.008 Vp] 0 to 4.5 V pp 0 .150 V pp Range 0 to 4.5 V pp Accuracy 0 .030 V pp
Diagnostics
Diagnostic tests are performed on the terminal board components by VVIB as follows: Diagnostics perform a high/low (hardware) limit check on the probe input signals and a high/low system (software) limit check. These limits create faults. A probe fault, alarm, or trip condition occurs if either of an X or Y probe pair exceeds its limits. Position inputs for thrust wear protection, differential expansion, and eccentricity are monitored similar to the vibration inputs except only the dc component is used for a position indication. If a maximum limit is exceeded a fault is created.
Buffered signals for portable data gathering equipment or external vibration analysis equipment are not available as with the TVIB board.
Configuration
Jumpers JP1A through JP8A select the type of the first eight probes as follows: S = Seismic V = Velocity P = Proximity A = Accelerometer
Refer to the Installation section for more information.
Notes
TTPW Power Conditioning Board

TTPW Power Conditioning
The Power Conditioning (TTPWH1A) terminal board power conditioning board provides branch circuit protection and distribution between one or more Mark* VI rack mounted +28 V dc power supplies and discrete wiring to peripheral devices. The H1A has three 2-pin inputs for +28 V dc from the Mark VI power supply. It provides diode OR selection between the three inputs to power the +28 V dc outputs. Outputs are rated 22 30 V dc, 0 0.25 A individually and capable of parallel operation. There is high frequency isolation between the inputs and the outputs and the voltage drop is less than +4 V dc when delivering rated current.
<R>
VME rack PL2 PS28C PL3 "Isolation" PS28C Power supply
<S>
VME rack PL2 PS28C "Isolation" PL3 PS28C Power supply TB2 P1 P2 P3 TB1
T T P W
Nine 0.25 A outputs
<T>
VME rack PL2 PS28C "Isolation" PL3 PS28C Power supply
Discret ewiring
T B A I
Monitoring
TTPWH1A Application Diagram
TTPW Power Conditioning Board 483
Large steam turbines use 24 V dc electrical trip solenoid valves (ETSV). Power for these valves is provided to the TRPL and TREL trip boards by a power transition board TTPW. Wiring from the rack power supplies, through TTPW, to the trip board is shown in the figure.
<R>
Single ETSV Applications:
<S>
VME rack PL2 PS28C "Isolation" PL3 PS28C Power supply P1 P2 P3
T T P W
JA1 PwrA JP1
<T>
VME rack PL2 PS28C "Isolation" PL3 PS28C Power supply
Discret wiring
T B A I
T R P L
ETSV
Monitoring
T R E L
Double ETSV Applications: <R>

VME rack PL2 PS28C "Isolation" PL3 PS28C Power supply P1
T T P W
JA1
PwrA
<S>
VME rack PL2 PS28C "Isolation" PL3 PS28C Power supply P2
T B A I Monitoring
JP1 JP2
T T P W
JA1 PwrB
T R P L
ETSV1
ETSV2
<T>
T B A I Monitoring
T R E L
TTPWG1B Wiring to the ETSV
484 TTPW Power Conditioning Board
Installation TTPWG1B
Three 28 V dc supplies are wired from I/O racks R, S, and T to plugs P1, P2, and P3. The primary 28 V dc output comes from plug JA1 and is wired to the trip board TRPL. The power monitoring signals are wired to the top terminal block (TB1) and go to an analog input board. The secondary voltage outputs are wired to the lower terminal block (TB2) as shown in the following figure.
Power Conditioning Board TTPWG1B

28 V power from racks R, S, T
x x
PCOM (Gnd) P28R (Gnd) P28S (Gnd) P28T (Gnd) P28V (Gnd)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
PCOM (Sig) P28R (Sig) P28S (Sig) P28T (Sig) P28V (Sig) Monitoring signals to TBAI board
P1 (R) P2 (S) P3 (T)
1 2 1 2 1 2
P28R PCOM P28S PCOM P28T PCOM
28 V power to TRPL trip board

P28V1 (Neg) P28V2 (Neg) P28V3 (Neg) P28V4 (Neg) P28V5 (Neg) P28V6 (Neg)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
P28V1 (Pos) P28V2 (Pos) P28V3 (Pos) P28V4 (Pos) P28V5 (Pos) P28V6 (Pos) Power outputs
JA1 (P28V)
1 2
P28V PCOM
TTPWG1B Board with Wiring and Cabling
TTPWH1A
Three 28 V dc supplies are wired from I/O racks R, S, and T to plugs P1, P2, and P3. The power monitoring signals are wired to the top terminal block (TB1) and go to an analog input board. The secondary voltage outputs are wired to the lower terminal block (TB2) as shown in the following figure.
Power Conditioning Board TTPWH1A

28 V power from racks R, S, T
x x
PCOM (Gnd) P28R (Gnd) P28S (Gnd) P28T (Gnd) P28V (Gnd)
2 4 6 8 10 12 14 16 18 20 22 24
x
1 3 5 7 9 11 13 15 17 19 21 23
PCOM (Sig) P28R (Sig) P28S (Sig) P28T (Sig) P28V (Sig) Monitoring signals to TBAI board
P1 (R) P2 (S) P3 (T)
1 2 1 2 1 2
P28R PCOM P28S PCOM P28T PCOM
P28V1 (Neg) P28V2 (Neg) P28V3 (Neg) P28V4 (Neg) P28V5 (Neg) P28V6 (Neg) P28V7 (Neg) P28V8 (Neg) P28V9 (Neg)
26 28 30 32 34 36 38 40 42 44 46 48
x
25 27 29 31 33 35 37 39 41 43 45 47
P28V1 (Pos) P28V2 (Pos) P28V3 (Pos) P28V4 (Pos) P28V5 (Pos) P28V6 (Pos) P28V7 (Pos) P28V8 (Pos) P28V9 (Pos)
Power outputs
TTPWH1A Wiring and Cabling Diagram
Operation TTPWG1B
The turbine ETSV is a 24 V dc device with a 24 watt, 20-22 ohm coil. Power is supplied from the three I/O rack supplies to TTPWG1B, where the three 28 V supplies are diode ORed to produce a single 28 V dc output. The primary output is 0 - 2 A (total), 22 - 30 V dc, and there are four secondary outputs of 0.25 A each.
TTPWG1B Power Supply Monitoring (screw compatible to TBAI) PCOM Sig Gnd Sig Gnd Sig Gnd Sig Gnd Sig Gnd
3 4 7 8 11 12 15 16 19 20
SCOM 100k 10k 100k 10k SCOM 100k 10k SCOM
P1
P2
P3
PCOM PCOM P28R P28S P28T
P28R P28S P28T P28V
100k 10k
P28V
100k 10k
SCOM
SCOM
Bus voltage centering bridge 1k 1k SCOM
Peripheral Power Outputs 22 - 30 V dc, 2.0 A total

P28V1 (-)
(+)
25 26 27 28 1 2 JA1 31 32 33 34 35 36 37 38
P28V SCOM
2.0 A (total)
P28V2 (+)
(-)
To TRPL (+) (-) (-)
P28V3
0.25 A outputs (each)
P28V4 (+) P28V5 (-) P28V6
(+) (+) (-)
PCOM
PCOM
TTPWG1B Board Diagram
TTPWH1A
The TTPWH1A power conditioning board provides branch circuit protection and distribution between one or more Mark VI rack mounted +28 V dc power supplies and discrete wiring to peripheral devices. The H1A has three 2-pin inputs for +28 V dc from the Mark VI power supply. It provides diode or selection between the three inputs to power the +28 V dc outputs. Outputs are rated 22 30 V dc, 0 0.25 A individually and capable of parallel operation. There is high frequency isolation between the inputs and the outputs and the voltage drop is less than +4 V dc when delivering rated current. Typical applications power the H1A from the P28C output of the VME rack power supply. When this is done, the isolation jumper on the rack is placed in the isolated position removing all connections between the P28C output and the rack. The TTPWH1A then provides a resistive bridge to ground to center the power circuit with respect to ground. Voltage feedback monitoring signals are provided using 0.1% resistors allowing monitoring of three input voltages, output voltage, and voltage between PCOM and SCOM.
Note The TTPWH1A internal signal paths are shown in the figure. Nine current limited 0.25 A outputs are provided and may be paralleled for higher current applications.
The +28 V dc power source should have an isolated common (return), especially if the load is external to the cabinet and is grounded. The rack power supplies are wired through TTPWH1A to the trip board.
P1
2 1 2
P2
1 2
P3
1
TTPWH1A
Power Supply Monitoring PCOM P28R P28S P28T P28V
3 4 100k 10k
PCOM PCOM P28R

100k 10k
7 8
SCOM
P28S
P28T
11 12
SCOM
100k 10k
15 16
SCOM
100k 10k 100k 10k
19 20
Bus voltage centering bridge

1k SCOM 1k
SCOM
Peripheral power 22 - 30 V dc 0.25 A each
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42
P28V
SCOM
PCOM
TTPWH1A Board Diagram
Specifications
TTPWH1A Specification
Item
Description
Inputs Outputs Monitoring
Three 28 V dc inputs from the VME rack power supplies Nine current limited outputs of 0.25 A, 22 30 V dc, 28 V dc nom. Three 28 V dc inputs Output 28 V dc power PCOM voltage
Accuracy
Resistors in measuring circuits are 0.1%
TTPWG1B Specification
Item
Description
Inputs Outputs Monitoring
Three 28 V dc inputs from the VME rack power supplies Three outputs with total of 2.0 A, 22 30 V dc, 28 V dc nom. (to TRPL board) Four current limited outputs of 0.25 A, 22 30 V dc, 28 V dc nom Three 28 V dc inputs Output 28 V dc power PCOM voltage
Accuracy
Resistors in measuring circuits are 0.1%
Diagnostics
The five monitored voltages are wired to an analog input terminal board, TBAI. The I/O processor board, VAIC, creates a fault if an input signal goes out of configured limits, either high or low.
Configuration
There are no switches or jumpers on the power conditioning boards. On the VME rack power supply, place the P28C isolation jumper in the isolated position.
Alarms
The alarms associated with this board depend on system use of the feedback signals.

The Mark* VI VME rack power supply mounts on the side of the VME control and interface racks. It supplies +5, 12, 15, and 28 V dc to the VME backplane, and an optional 335 V dc output for powering flame detectors connected to TRPG. Two supply input voltage selections are available. There is a 125 V dc input supply that is powered from a Power Distribution Module (PDM) and a low voltage version for 24 V dc operation.
Note A different power supply is used on the stand-alone control rack which only powers the Mark VI controller, VDSK, and VCMI.
VME Rack Power Supply 491
PSA
POWER SUPPLY
PSB
PULL TO TOGGLE
SWITCH GREEN LED RED LED YELLOW LED
1 (ON) 0 (OFF)
NORMAL FAULT AVAILABLE
REV. NO. GE CAT. NO.

S/N
IS2020LVPSG1 and IS2020RKPSG1
IS2020LVPSG2 -4 and IS2020RKPSG2-3
VME Rack Power Supply types G1 and G2, Front, Side, and Bottom Views
492 VME Rack Power Supply
o 521 SP o 521 SP
533 SP 533 SP
C82 SP 82 SP
B82 SP
T AT SSP
A82 SP
P335VDC
+ Ret
IS2020RKPSG1 125V Input
Control Power Suppression Red Yellow Avail OV Protect V533 P W86 1 . + Suppression Green Normal UV Detect t eR RKPSG1 335V OV Faults Fault On/Off switch
IS2020RKPSG1 & IS2020LVPSG1 125/24VDC Input 400 W Output Power Supplies 3 2 1 To safety Ground
V521 m r F o y p pu S l
PS125
NC
PS28C
+ 3 2 1
P125 2 N125 1 3 4
PS28A
+ 3 2 1
V42 m r F o y pp u S l
P24 3 N24 2 1 125 or 24V Power Enable
PS28B
+ 3 2 1
+ Suppression OV Protect Suppression OV Protect Suppression OV Protect + + Suppression OV Protect Suppression OV Protect Suppression OV Protect
P5.0V 75 W x 2 s s Ret + + N15V 50 W Ret N28V 25 W Ret P28V (A) 50 W Ret P28V (B) 50 W Ret
P12V 50 W Ret
N12V 25 W Ret
P15V 50 W Ret
l o t n o C e ba n E r l c g oL i
PS24
P28V (C) 50 W Ret Suppression OV Protect
P28V (D) 50 W Ret Suppression OV Protect
P28V (E) 50 W Ret Suppression OV Protect
Suppression OV Protect
1 GSPVL0202 S I t upn V42 I
Suppression OV Protect
PSB
24,28,32,20 8 6 18,22,26,30 16 14 12 10 32 30 28 26
PSA
24 22 20 18 16 14 12 10 8 6
V521 m r F o y ppu S l
4 UV Detect
V533 P W86 1 . +
P125 2 N125 1 3 Yellow Avail NC
Green Normal
D G SID I I I DN GD 1 T AT S 2 T AT S
V42 m r F o y pp u S l
+ IS2020LVPSG2, G3 & G4 24V Input Suppression OV Protect
P5.0V 150 W s s Ret + Suppression OV Protect
P12V 25 W Ret
N12V 10 W Ret Suppression OV Protect
P15V 100 W Ret Suppression OV Protect
l o t no C e b an E r l c g oL i
Block Diagram of RKPS and LVPS versions of VME Power Supply
P24 3 N24 2 1 125 or 24V Power
Enable/Status
t eR

IS2020RKPSG2 & G3 125V Input Control Power Suppression On/Off switch Red Fault
PSSTAT
1 2 3 4
P335VDC
Ret
3 2 1 +
To safety Ground
PS125
Suppression OV Protect RKPSG2 & LVPSG4 335V Option
IS2020RKPSG2- 3 & IS2020RKPSG2- 3 125/24VDC Input 300/400 W Output Power Supplies
RKPSG2 & LVPSG2 400W Option
PS24
P28V (A) 100 W Ret
P28V (B) 100 W Ret Suppression OV Protect Suppression OV Protect
P28V (C) 100 W Ret Suppression OV Protect
P28V (D) 100 W + Ret Suppression OV Protect
PS28 PSA
3 2 1
There are currently seven major variations of the VME rack power supply. These variations provide different power supply input and output requirements. The following table defines these variations.
PSB
24,28,32 20 18 22,26,30 16 14 12 10 8 6 32 30 28 26 24 22
20
18
16
14
12
10
VME Rack Power Supply Option Definitions
IS2020 Part Number
Input Voltage
Output Rating
+28V PSA +28V Remote Support Redundant Outputs Outputs PS335 Output Status ID Output Operation
LVPSG1 RKPSG1 RKPSG2* RKPSG3* LVPSG2* LVPSG3* LVPSG4*
24 V dc 125 V dc 125 V dc 125 V dc 24 V dc 24 V dc 24 V dc
400W 400W 400W 400W 400W 300W 300W
Qty. 5 Qty. 5 Qty. 5 Qty. 5 Qty. 5 Qty. 3 Qty. 3
Qty. 3 Qty. 3 Qty. 1 Qty. 1 Qty. 1 None None
No Yes Yes No No No Yes
No No Yes Yes Yes Yes Yes
No No Yes Yes Yes Yes Yes
* Newer design power supplies With the exception of the number of remote 28 V outputs, the RKPSG2 and LVPSG2 are designed to be direct replacements for the RKPSG1 and LVPSG1 respectively. These two supplies have been replaced with the newer designs (marked with asterisk in the table above).
Installation
The power supply is mounted to the right-hand side of the VME rack on a sheet metal bracket. The dc input, 28 V dc output, and 335 V dc output connections are at the bottom. The newer design also has a status connector on the bottom. Two connectors, PSA and PSB, at the top of the assembly mate with a cable harness carrying power to the VME rack. Each of the five 28 V dc power modules supplies a section of the VME rack. These sections are labeled A, B, C, D, E, and F. The P28C output or PS28 at the bottom of the power supply can be used to power an external peripheral device. To do this the jumper plug shown on the bracket to the left of the rack must be moved from the Normal position to the Isolated position below. The fan is only used when the controller is mounted in the rack. It is powered from the top connector on the same bracket, located on the left side of the rack.
To prevent electric shock, turn off power to the RPSM to be replaced, then test to verify that no power exists on the module before touching it or any connected circuits.
To prevent equipment damage, do not remove, insert, or adjust any connections while power is applied to the equipment.
Power cables to VME chassis 5 slots - A Fan +24 V to fan, used with controller
x x x x x x x x x x x x x x x x x x x
4 slots - B
4 slots - C
4 slots - D
4 slots - E
PSA PSB
Power Supply
Plug position P28 normal Plug position P28 isolated VME chassis, 21 slots for I/O and control, or for just I/O
J301
Power supply Testpoints Rack Ethernet ID plug GND 125 V dc input from PDM 335 V dc
Cable from PDM monitor
P28C power to external peripheral device (move plug from normal to isolated position)
Power Supply, VME Chassis, and Cabling to External Devices
To remove the power supply 1 2 3 4 5 6

Loosen the PSA/PSB bracket captive fastener at the top front of the module. Separate the PSA/PSB bracket assembly from the RPSM. Disconnect the bottom connectors. Loosen the two front sheet metal bracket captive fasteners. Pull the sheet metal bracket/power module assembly forward, disconnect the four rear side connectors and then slide the assembly off of the control rack. Remove the four mounting screws that hold the RPSM to the bracket and remove it.
Note Reinstall the screws and bracket on the control rack if a replacement module is not going to be installed. To install the power supply 1 2 3
Locate the supply mounting sheet metal bracket and four mounting screws. Position the module on the bracket with the front of the module at the captive fasteners, then install the four mounting screws and tighten. Slide the module bracket assembly on to the control rack, connect the four rear side connectors and then push the assembly in to tighten the two front captive fasteners. Slide the PSA/PSB assembly rear tab into the slot on the bracket located at the top rear of the RPSM. Push the connector assemble into the mating connectors on the top of the RPSM. Tighten the PSA/PSB bracket captive fastener. Connect the power supply bottom connectors.
4 5 6 7
Power Supply, Top Connectors
PSA
61
21
23
82
02
42
41
03
62
22
81
01
PIN32 -15V PIN30 RET PIN28 -28V PIN26 RET PIN24 28VA PIN22 RET PIN20 28VB PIN18 RET PIN16 28VC PIN14 RET PIN12 28VD PIN10 RET PIN8 28VE PIN6 RET PIN4 N/C PIN2 N/C
PSB
61
21
23 82 02 42 8 4 03 62 22 01 81 41 6
PIN32 5V PIN30 5V RET PIN28 5V PIN26 5V RET PIN24 5V PIN22 5V RET PIN20 5V PIN18 5V RET PIN16 +12V PIN14 RET PIN12 -12V PIN10 RET PIN8 +15V PIN6 RET PIN4 N/C PIN2 N/C
IS2020LVPSG1 and IS2020RKPSG1
IS2020LVPSG2 - 4 and IS2020RKPSG2 - 3

PS24 GND +24VDC PS125 RETURN +125VDC N/C GND
PS335 RETURN GND +335VDC
CIRCUIT STAT2 NO.4 IDGND NO.2 STAT1 NO.3 IDSIG NO.1
PS28 & PS28A-C RETURN GND +28VDC
Power Supply, Bottom Connectors
1/4 X 20 STUD WITH STAR WASHER AND TWO (2) JAM NUTS
PSSTAT
CIRCUIT NO.1
NO.1
CIRCUIT NO.1
CIRCUIT NO.1
RETURN
PS125 or PS24 PS335 PS28C PS28B PS28A
PS125 or PS24 PS335 PS28 PSSTAT
Operation
The VME Rack power supply has only one user control, the power switch, and three status LED indicators. The power switch provides front-panel control of the power supply output voltages and when toggled serves as a fault reset. The yellow, red and green LEDs indicate the status of the input power, fault presence, and normal operation.
Note Newer supply designs also have a status output that mimics the status of the green LED and an ID output that uniquely identifies the supply back to the system. Power Switch
The front panel power switch is a locking type that must be pulled out to change position. This switch is a low voltage control to enable or disable the output voltages. If the red LED is ON indicating a fault condition the power switch can be toggled OFF and then back ON again to clear the fault. The fault will only be cleared if the condition that caused it no longer exists.
Yellow LED
When the power switch is OFF the yellow LED will indicate the status of the input power. If this LED is ON there is power present on the supply input connector. For the newer design, the yellow LED will only turn ON if the input voltage is above the input under-voltage fault threshold.
Red LED
This LED will only be ON if there is input power, the power switch is ON, and a fault has been detected.
Green LED/Status Output

If there is input power, the power switch is ON, and there are no detectable faults, the Green LED will be ON. The newer designs also have a status output that mimics the status of this LED. The status output is a NO solid-state relay contact that will be CLOSED when the green LED is ON.
Fault Conditions
There are three classes of power supply faults: Those that transiently shutdown an output Those that require some reset action to clear Permanent failures that require the replacement of the supply.
This section describes the first two fault classes and assumes the cause of the fault is external. For a detailed fault diagnostics, refer to the section, Diagnostics and Troubleshooting.
Note When the external condition causing the current limit condition is corrected, the output voltage will return to normal.
If an overcurrent condition exists on an output, the voltage on that output will fold back as required to maintain the constant current limit output. For every output other than the 5 V supply, this condition is not detectable at the supply and the green LED will remain ON. Detection of a low output voltage due to excessive output current has to be detected at the system level through the power supply voltage monitoring. The newer design also has an over temperature monitor of the output modules and a current limit detector on the optional 335V supply. These additional fault detectors may cause the red LED to come on when an output is in current limit but the red LED will also go out when the output voltage returns to normal. The 5 V current limit is a special case due to the 5 V under-voltage detector. If the current limit causes the 5 V output voltage to fold back below the UV threshold, all of the other outputs will be disabled until the 5 V output voltage returns to a voltage above the UV threshold. All of the other faults will shut down one or all of the outputs until the external cause of the fault condition is removed and the supply is reset. A reset can be initiated through the front panel power switch or by removing and reapplying input power to the supply. Output over-voltage faults on the newer design require the removal of input power for a minimum of one minute to reset the fault once the source of the fault has been removed. Below is a power supply fault summary. Input under-voltage Input over-voltage P5 output under-voltage Output over-voltage Over temperature (Latched) (Newer Design Only) (Latched) (Newer Design Only)
The following figure shows the power supply connections to the VME rack and the distribution of the power supply outputs.
PS28 or PS28C Configuration:
Input power
Power Supply
PS335 PS125 or PS24
Note: The power supply PS28 or PS28C may be isolated from the I/O rack for external use. One plug, two positions Normal (PL2), Isolation (PS3), for selection; Plug is located on left side of rack (from the front). P28A and P28B are for internal cabinet use only, notto go outside of the cabinet. PS28A PS28B Remote 28V *PS28 or *PS28C
To safety ground
IS2020RKPSG1 - 3 or IS2020LVPSG1 - 4
PSB
24,28,32,20 18,22,26,30 16 14 12 10 8 6 32 N15 30
Ret
PSA
28 N28 26
Ret
24 P28A
22
Ret
20 P28B
18
Ret
16 P28C
14
Ret
12 P28D
10
Ret
8 P28E s
6
Ret
N12
P12
P15
P5 P5 P5 P5
VME Rack
P5 Fan 2 Power 1 PL1 PCOM P28A DCOM P12 N12 P15 21 Slot Only ACOM s s N15 s s
Ret
Ret
Ret
Ret
Ret
Ret
Ret
P5 DCOM P12 N12 P15 ACOM N15
*PS28C "Normal"
1 2 3 4 PL2
1 *PS28C 2 "Isolation" 3 4
PL3 PL2
Test Pts P15 N15
ACOM P28AA P28BB P28CC P28DD P28EE PCOM N28 DCOM SCOM N28 J5 Ether IO SCOM
PL3
s P28A s
s P28B
s P28C
s P28D
s P28E
s PCOM
s PCOM N28 SCOM
SCOM Slots 1 thru 5 Slots 6 thru 9 Slots 10 thru 13 Slots 14 thru 17
Slots 18 thru 21
I/O 21 slot rack only
The symbol,
represents a "pi" suppression filter:
scom
Note: SCOM must be connected to ground via therack mounting hardware, metal to metal conductivity, to the mounting base and hence to ground.
VME I/O Rack Power Supply and Cables
Specifications
Item Description
Input voltage 125 V input 24 V input Input under-voltage Input over-voltage* Isolation
Output voltages
70 V to 145 V dc floating supply 18.5 V to 32 V dc floating supply
Up to 10 V pp ripple Up to 2 V pp ripple
Under-voltage protection provided to prevent supply operation when the input voltage is below the minimum operating level. Over-voltage protection provided to prevent supply operation when the input voltage is above the maximum operating level. True isolation from input to output, 1500 V
Output Voltage Voltage Voltage Regulation Capacity Typical Over
For the RKPSG1 and P5 LVPSG1 supplies P15 N15 P12 N12 P28 N28 P335 For the RKPSG2 -3 and LVPSG2 - 4 supplies* Note: P5 on these supplies has remote voltage sensing. P5 P15 N15 P12 N12 P28 N28 P335 Power sequencing Total Output
+5 V dc -15 V dc -12 V dc -28 V dc +335 V dc +5 V dc +15.35 V dc -15.35 V dc +12.3 V dc -12.3 V dc -28 V dc +335 V dc
Less than 3% 50 W Less than 3% 50 W Less than 3% 50 W Less than 5% Less than 5% Less than 3% Less than 3% Less than 3% Less than 3% Less than 3% 100 W Less than 5% Less than 5%
150 W 50 W 25 W 25 W 1.68 W 150 W 100 W 100 W 25 W 10 W 50 W 1.68 W
120% 5% 120% 5% 120% 5% 120% 5% 120% 5% 120% 5% 120% 5% 110% to 120% 130% 5% 120% 5% 120% 5% 120% 5% 120% 5% 120% 5% 120% 5% 110% to 120%
+15 V dcLess than 3% +12 V dcLess than 3% +28 V dcLess than 5%
+28 V dcLess than 5%
The 5 V dc supply comes up first, then all the others Maximum of 400 W
Total output LVPSG3 Maximum of 300 W & 4 only* Short circuit Temperature Indicating lights Short circuit protection on all power supplies, with self-recovery. Note: A 5 V short circuit on the new design will cause a latched fault. Ambient air convection cooling 0 to 60C Green: Normal Red: Status output* ID tag output* Fault Yellow: Available Status is OK Power is applied, but one or more outputs off due to a fault. Power is applied, but switch is OFF
NO SSR contact .5 A @ 55 V dc - Closed when the green indicating light is on Dallas DS2502 output. 2502 data = Week and year tested, unit number, part number and revision
*Only pertain to the newer design power supplies
Diagnostics
Incoming and outgoing voltages and currents are monitored for control and protection purposes. If the red LED is ON, this is not a direct indication that the power supply has failed and has to be replaced. The LED ON could indicate that something is wrong in the system and the fault LED is latched on. The following is a description of the power supply parameters that are monitored and the conditions that can cause faults.
Input Under-voltage (below the minimum operating voltage)

The input voltage has to be above the under-voltage threshold or operation of the supply will be inhibited. For the newer design this is indicated by no LEDs ON. The red LED will come ON and remain on until the input voltage is above the undervoltage threshold and the power switch is toggled. If an under-voltage fault occurs during normal operation, the outputs will be disabled and the red LED will come ON and remain ON until the input voltage is above the under-voltage threshold and the power switch is toggled.
Note If the supply power switch is turned on in this condition there will be no output voltages. Input Over-voltage (newer design above maximum operating voltage)
If the supply power switch is turned on in this condition there, will be no output voltages and the red LED will come ON and remain on until the input voltage is below the over-voltage threshold and the power switch is toggled. If an over-voltage fault occurs during normal operation, the outputs will be disabled and the red LED will come ON and remain ON until the input voltage is below the over voltage threshold and the power switch is toggled.
Note The input voltage has to be below the over-voltage threshold or operation of the supply will be inhibited and the yellow LED will be ON. 5 V Output Under-voltage (typically below 4.7 V)
The P5 output voltage has to be above the under-voltage threshold or operation of the supply will be inhibited, all supply outputs will be turned off, and the red LED will be ON. If an under-voltage fault occurs during normal operation, the outputs will be disabled and the red LED will come ON and remain ON until the output voltage is above the under-voltage threshold.
5 V Output Over-voltage (typically above 6 V)

The P5 output voltage has to be below the over-voltage threshold or operation of the supply will be inhibited. All supply outputs will be latched OFF and the red LED will be ON until the power switch is toggled. For the newer design, this fault must be reset by removing input power to the supply (wait for one minute and re-apply input power).
Output Over-voltage other than P5 (typically above 120%)

The output voltage has to be below the over-voltage threshold or operation of the supply output that is above the threshold will be inhibited (latched OFF) until the power switch is toggled. The red LED will be ON during this fault. For the newer design, this fault must be reset by removing input power to the supply (wait for one minute and re-apply input power).
Output Over-temperature (newer design typically above 100 degrees C)

The modules that supply the output voltage have to be operated below the overtemperature threshold. A specific supply output module operated above the threshold will be inhibited until the temperature is lowered below the threshold. The red LED will be ON during this fault. An over-temperature of the 5 V module will cause a 5 V under-voltage fault.
Troubleshooting
The supply has no field serviceable components. If a supply is found to be defective it must be replaced. The power supply cover should not be removed in the field. There are only two indications of a problem on the power supply itself. A problem is indicated when there are no LEDs ON or the red LED is ON. Both conditions will be annunciated on the newer designs through the status output. No LEDs ON is a good indication of an input voltage problem or a defective supply. If the red LED is ON, the cause could be any of the fault conditions listed above or a defective supply. Below is a list of troubleshooting hints.
Note Over-voltage faults on the newer design must be reset by removing input power to the supply, waiting for one minute, and re-applying input power. No LEDs ON
Verify that the input connector and voltage to the supply are correct. If they are, then replace the supply. Use caution when powering on the replacement supply because the failure could have been caused by a problem in the system.
Red LED ON and system up

This condition indicates that the 5 V power is OK. Use the system diagnostics and or testpoints on the left bottom of the control rack or at the supply connectors to find the faulted outputs. Try and clear the fault with the input power or switch reset. If the green LED comes ON, the fault was a transient one and may come back. If the red LED is still ON, remove the connector supplying the faulted output and reset the supply. If the red LED is still ON, then a defective supply is the most probable cause. If the green LED comes ON, then the problem is most likely in the system.
Red LED ON and system down

This condition indicates that the 5 V power is not OK. In this case, all of the supply outputs should be off. Try and reset the fault with the input power. If the green LED comes on the fault was a transient one and may come back. If the red LED is still ON, remove the PSA/PSB output connector at the top of the supply and reset the supply. If the red LED is still ON, then a defective supply is the most probable cause. If the green LED comes ON, then the problem is most likely in the system.
Green LED ON and system up but one or more of the voltages out of specification
This condition indicates that the 5 V power is OK. Each supply output has a current limit and short circuit protection. This condition could be caused by a short or failed component in the system. Remove the connector supplying the failed output voltage. If the voltage returns to normal this is an indication of a system problem. If the voltage does not return to normal then the most probable cause is a defective supply.
Thermal over-temperature faults (new design only)

Even in the worst case ambient conditions, a thermal fault should not occur if the outputs are not overloaded. A sustained current limit on a supply output will be the most likely cause of a thermal fault.
Configuration
The P28C output or PS28 at the bottom of the power supply can be used to power an external peripheral device. To do this the jumper plug on the bracket to the left of the rack must be moved from the Normal position to the Isolated position below.
Alarms
32
P5=###.## Volts is Outside of Limits. The P5 A VME rack backplane wiring problem and/or power supply power supply is out of the specified operating problem limits P15=###.## Volts is Outside of Limits. The P15 power supply is out of the specified operating limits N15=###.## Volts is Outside of Limits. The N15 power supply is out of the specified operating limits P12=###.## Volts is Outside of Limits. The P12 power supply is out of the specified operating limits N12=###.## Volts is Outside of Limits. The N12 power supply is out of the specified operating limits P28A=###.## Volts is Outside of Limits. The P28A power supply is out of the specified operating limits P28B=###.## Volts is Outside of Limits. The P28B power supply is out of the specified operating limits P28C=###.## Volts is Outside of Limits. The P28C power supply is out of the specified operating limits P28D=###.## Volts is Outside of Limits. The P28D power supply is out of the specified operating limits P28E=###.## Volts is Outside of Limits. The P28E power supply is out of the specified operating limits N28=###.## Volts is Outside of Limits. The N28 power supply is out of the specified operating limits If "Remote Control", disable diagnostic and ignore; otherwise probably a back plane wiring or VME power supply problem If "Remote Control", disable diagnostic and ignore; otherwise probably a VME backplane wiring and/or power supply problem If "Remote I/O", disable diagnostic and ignore; otherwise probably a VME backplane wiring and/or power supply problem If "Remote I/O", disable diagnostic and ignore; otherwise probably a VME backplane wiring and/or power supply problem If "Remote Control", disable diagnostic and ignore; otherwise probably a VME backplane wiring and/or power supply problem If "Remote Control", disable diagnostic and ignore; otherwise probably a VME backplane wiring and/or power supply problem If "Remote Control" disable diagnostic. Disable diagnostic if not used; otherwise probably a backplane wiring and/or power supply problem If "Remote Control" disable diagnostic. Disable diagnostic if not used; otherwise probably a backplane wiring and/or power supply problem If "Remote Control" disable diagnostic. Disable diagnostic if not used; otherwise probably a backplane wiring and/or power supply problem If "Remote Control" disable diagnostic. Disable diagnostic if not used; otherwise probably a backplane wiring and/or power supply problem
33
34
35
36
37
38
39
40
41
42
Notes
VME Redundant Power Supply

Redundant Power Supply
The redundant power supply module (RPSM) parallels two independent power supplies to provide ten output voltages with improved reliability. ORing diodes are used to OR the outputs of one supply with the outputs from the second redundant supply. Nine of the paralleling circuits have an additional current limit function. All output circuits have an LED status indicator. The following figure shows the power and signal flow for two paralleled power supplies that provide power to a Mark* VI control rack. To provide redundancy, the outputs of each supply are passed into the RPSM, ORed and the redundant voltages are passed out the RPSM outputs. The RPSM module mounts on the side of the control rack in place of the power supply. The two power supplies that feed the RPSM are remotely mounted.
PSSTAT Power
Supply 1
PSA PSB 1PSA 1PSB 1PSSTAT PSA
RPSM
PSB
MarkVI rack connections
2PSA 2PSB PSSTAT PS28 PSA Power

Supply 2
2PSSTAT
PSB PSSTAT
Power Supply and RPSM Signal Flow
VME Redundant Power Supply 507
Installation
Top View
PSA
PSB
Captive fastener
1PSB 2PSB 1PSA 2PSA
Mounting screw
Mounting screw
15
13
IS2020RPSM
15
13
Status LEDs
3 1
15
13
1PSSTAT
PSSTAT
15
13
2PSSTAT Mounting screw Captive fastener Slide mounting plate
PS28 Mounting screw
Side View
Control rack
RPSM Module and VME Chassis
The RPSM module is mounted to the right hand side of the VME rack on a sheet metal bracket. The status and 28 V dc output connections are at the bottom. Two connectors, PSA and PSB, at the top of the assembly connect with a cable harness carrying power to the VME rack. The four 15-pin connect-N-Lock connectors at the back side of the module are the primary power feeds from the remotely mounted power supplies.
508 VME Redundant Power Supply
To prevent electric shock, turn off power to the RPSM to be replaced, then test to verify that no power exists on the module before touching it or any connected circuits.
To prevent equipment damage, do not remove, insert, or adjust any connections while power is applied to the equipment. The RPSM module is mounted to the right hand side of the VME rack on a sheet metal bracket. The status and 28 V dc output connections are at the bottom. Two connectors, PSA and PSB, at the top of the assembly connect with a cable harness carrying power to the VME rack. The four 15-pin connect-N-Lock connectors at the back side of the module are the primary power feeds from the remotely mounted power supplies.
To remove the RPSM 1 2 3 4 5 6

Loosen the PSA/PSB bracket captive fastener at the top front of the module. Separate the PSA/PSB bracket assembly from the RPSM. Disconnect the bottom connectors. Loosen the two front sheet metal bracket captive fasteners. Pull the sheet metal bracket/power module assembly forward, disconnect the four rear side connectors and then slide the assembly off of the control rack. Remove the four mounting screws that hold the RPSM to the bracket and remove it.
Note Reinstall the screws and bracket on the control rack if a replacement module is not going to be installed. To reinstall the RPSM 1 2 3
Locate the supply mounting sheet metal bracket and four mounting screws. Position the module on the bracket with the front of the module at the captive fasteners, then install the four mounting screws and tighten. Slide the module bracket assembly on to the control rack, connect the four rear side connectors and then push the assembly in to tighten the two front captive fasteners. Slide the PSA/PSB assembly rear tab into the slot on the bracket located at the top rear of the RPSM. Push the connector assemble into the mating connectors on the top of the RPSM. Tighten the PSA/PSB bracket captive fastener. Connect the power supply bottom connectors.
4 5 6 7
RPSM Top Connectors
PSA
61
21
23
82
02
42
41
03
62
22
81
01
PIN32 -15V PIN30 RET PIN28 -28V PIN26 RET PIN24 28VA PIN22 RET PIN20 28VB PIN18 RET PIN16 28VC PIN14 RET PIN12 28VD PIN10 RET PIN8 28VE PIN6 RET PIN4 N/C PIN2 N/C
PSB
61
21
23 82 02 42 8 4 03 62 22 01 81 41 6
PIN32 5V PIN30 5V RET PIN28 5V PIN26 5V RET PIN24 5V PIN22 5V RET PIN20 5V PIN18 5V RET PIN16 +12V PIN14 RET PIN12 -12V PIN10 RET PIN8 +15V PIN6 RET PIN4 N/C PIN2 N/C
1 & 2PSB
13
15
1 13
3 15
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
P5V1/2 P5V1/2 P5V1/2 P5RTN P5RTN P5RTN NC P5SENP P5SENN P15V1/2 N12 P12V1/2 P15RTN N12RTN1/2 P12RTN 1 & 2PSA
2PSB
1PSB
15 3
13 1
15
13
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
P28AB1/2 N28 N15 AB28RTN N28RTN1/2 N15RTN1/2 NC P28AB1/2 AB28RTN P28E1/2 P28D1/2 P28C1/2 E28RTN D28RTN C28RTN
2PSA
1PSA
RPSM Back Side Connectors
PS28 Pin 1 2 3 P28E CHASS E28RTN
PS28
3
PSSTAT
Pin 1 4 2 5 3 6
IDSIG IDGND 1STAT1 1STAT2 2STAT1 2STAT2
PSSTAT
3 6
1 4
2PSSTAT Pin 1 2 3 4 IDSIG IDGND 2STAT1 2STAT2 1PSSTAT Pin 1 2 3 4 IDSIG IDGND 1STAT1 1STAT2
2PSSTAT 1PSSTAT
2 4
1 2 3 4
1 3
RPSM Bottom Connectors
Operation
1PSSTAT
1 2 3 4
RPSA ID
2PSSTAT
1 2 3 4
1 4 2 5 3 6
PSSTAT
1PSA 1
12
15
11
14
10
13
2PSA
12
15
11
14
10
13
ECB P28V (A) 100 W

+
P28V (B)
ECB P28V (C) 100 W
ECB P28V (D) 100 W

Ret
+
ECB P28V (E) 100 W

Ret
+ 3 2 1
PS28
Ret
Ret
PSA
24
22
20
18
16
14
12
10
1PSA
5 2 6 3 10 13 14 11 12 15 1, 2, 3 8
1PSB
9 4, 5, 6
2PSB 2PSA
5 2 6 3 10 13 14 11 12 15 1, 2, 3 8 9 -s 4, 5, 6
+s
ECB N28V 50 W
Ret
ECB N15V 100 W

Ret
ECB P15V 100 W

+
ECB N12V 10 W
Ret Ret
ECB P12V 25 W
+ Ret +
P5V 150 W
Ret
PSA
26
28
30
32
10
12
16
14 20,24,28,32
18,22,26,30
PSB
RPSM Block Diagram
Output Voltage ORing

The ten outputs of two supplies are ORed together using low forward drop Schottky diodes. If an output of one of the supplies fails, the corresponding output on the other supply will pick up the full load through the diode. It is not intended that the two supplies equally share the load current, but if a short occurs on a RPSM output, it is possible to supply twice the normal short circuit current to the load. To prevent this, all of the outputs of the ORing diodes, with the exception of the 5 V, have an additional current limit circuit.
Note These circuits will hold the short circuit current to an acceptable level.
Refer to the Specifications section for expected RPSM output voltages accounting for the voltage losses introduced by passing the supply outputs through the ORing circuits. Due to the wiring impedance between the supply outputs and the RPSM, the supplies will tend to share the load. The sharing will reduce the diode and conductor losses so the expected losses for normal operations will be less than with one supply faulted.
Current Limit ECB

Nine of the outputs have electronic circuit breakers (ECBs) to limit the short circuit current. These circuit breakers are of the auto-reset type. Once the supplied output current exceeds the over-current threshold the output will be turned OFF and the reset timer started. Once the reset timer has expired the output will be turned back ON. If the over-current condition still exists, the output will be turned OFF and the reset timer started again. This cycle will continue until the short is removed. The output will then return to normal operation.
Note No current limiting is provided on the RPSM module for the 5 V output.
RPSM Electronic Circuit Breaker Limits
Parameter
Reset Time 12 OC Threshold 15 OC Threshold 28 OC Threshold
Min.
2.78 8.30 4.15
Typical
500 3.3 10 5
Max.
3.89 11.70 5.85
Units
msec Amps Amps Amps
Indicator LEDs
All the RPSM supply outputs have green status LEDs to indicate that power is being supplied to the load. The LEDs are located on the front panel of the module. For normal operations these LEDs will be ON solid. If the RPSM is not supplying the correct power to the load, one or more of these LEDs are OFF or flashing.
Note A flashing LED indicates that the output ECB is tripped
LED Definitions
LED
P5 P12 N12 P15 N15 N28 P28AB P28C P28D P28E
Description
P5 output voltage indicator P12 output voltage indicator N12 output voltage indicator P15 output voltage indicator N15 output voltage indicator N28 output voltage indicator P28A/B output voltage indicator P28C output voltage indicator P28D output voltage indicator P28E output voltage indicator
Specification
Item Output Voltage
+5 V 12 V 15 V 28 V Outputs
Description Conditions
20 - 30 A 0.1 - 1.6 A 0.1 - 5.3 A 0.2 - 3.2 A
Minimum
4.90 11.64 14.55 26.6
Typical
5.05 12.0 15.0 28.0
Maximum
5.20 12.72 15.97 29.4
Units
V dc V dc V dc V dc
P28V (A), P28V (B), P28V (C), P28V (D), P28V (E), all with 100 W capability PS28 External 28 V output, from P28 (E) N28V 50 W N15V 100 W P15V 100 W N12V 10 W P12V 25 W P5V 150 W
Diagnostics
Below is a list of fault indications and the possible causes.
All RPSM green LEDs OFF - This is an indication of a problem back at the power supplies and not an RPSM failure. One or more RPSM green LEDs OFF (but not all) - An RPSM LED OFF condition is an indication that there is no output voltage due to a short in the control rack or an RPSM failure. 5 V output problems - The 5 V output is unique from all of the other outputs. This RPSM output does not have current limit protection and has remote voltage sensing from the power supplies to the RPSM module. With a 5 V transient short or problem in the system, the most likely failure mode will be a 5 V output over-voltage fault back at the power supplies. Under high currents the losses will become high enough to cause the voltage at the power supplies to exceed the over-voltage threshold. Refer to the 5 V paragraph in GEI-100567 VME Power Supply for details. Any time the RPSM P5 green LED is on, the RPSM 5 V output voltage is above 4.55 V. Redundant power supply replacement - As long as one of the power supplies is fully operational, the RPSM green LEDs will be ON and the correct power will be supplied to the system. When one of the power supplies fails, replacement can be postponed until it is convenient to do so. Before replacing the supply, refer to the troubleshooting guidelines outlined in GEI-100567 VME Power Supply to rule out a transient fault that can be reset such as an input power under-voltage. If the supply is found to be defective, follow removal and installation procedure outlined in the Power Supply section.
Parallel Status/ID
Each status connector from the power supplies has a status and ID signal. The ID signals from the two supplies are wired together along with the ID signal from the RPSM and passed out through the PSSTAT connector. The ID signal output is a single wire LAN line with three DALLAS 2502 ID ICs connected on it. The NO SSR contact status signals from the both supplies are passed through the RPSM and out the PSSTAT connector.
Power Supply 1 and 2 Status SSR NO Contacts
Parameter
V dc rating V ac rating Current rating ON resistance Isolation
Conditions
Min.
55 55 500
Max.
Units
V dc V peak mA
1.0 1500
Ohm V dc
There are no field serviceable components in the RPSM module. If one or more of the green front panel LEDs are OFF, this is not a direct indication that the RPSM module has failed and has to be replaced. An LED OFF could indicate that something is wrong in the system and the fault is not due to the RPSM module.
Configuration
Power Distribution Modules

PDM Power Distribution Modules
The Power Distribution Modules (PDM) provides 125 V dc and 115 V ac (or 230 V ac) to the Mark* VI system for all racks and terminal boards. There is a second version of the PDM for the control cabinet in those systems using remote I/O cabinets.
Diagnostics to VCMI through J301 in <R> rack Power cables to interface modules 125 V dc, 115/230 V ac DIN-rail termination board
Output power connectors
Power Distribution Module (for interface modules)
TB2
TB1 Input terminals Power filters Filtered dc and ac power to PDM
TB3
JTX1 115 V Cable to transformer inside ac/dc converter
AC/DC Converter
JTX2 230 V
Cable to PDM JZ2 or JZ3
JZ
TB1
One or two converters
Customer's power cables, 125 V dc and 115/230 V ac
TB2
Power Distribution Module, Ac to Dc Converter, and Diagnostic Cabling
Power Distribution Modules 517
Installation
The cabling, wiring connections, and fuse locations for the PDM in the interface cabinet are shown in the figure.
PDM JPD JZ2 JZ3 JZ1 J1R J2R J1S J2S J1T J2T J1C J1D J7X J7Y J7Z J7A J7W J8A J8B J8C J8D Ground reference jumper BJS J12A J12B J12C J15 J16 J17 J18 J19 J20 Cable Destination Diagnostic term. brd. Ac/dc convert #1 Ac/dc convert #2 Cable to door resis. <R> power supply <R> power supply <S> power supply <S> power supply <T> power supply <T> power supply Spare Spare <X> power supply <Y> power supply <Z> power supply TRPG#1 TREG TRLY TRLY TRLY TRLY TBCI TBCI TBCI Miscellaneous Miscellaneous TRLY TRLY TRLY TRLY
JZ1
Note : When connecting ac power to the power distribution (TB1),verify that JTX connector on both ac source selectors (see Ac/dc converter) are plugged into JTX1 for 115 V ac, or JTX2 for 230 V ac.
125 V dc supply 120 V ac supply Auxiliary 120 V ac supply
Interface Cabinet PDM Circuit Board
518 Power Distribution Modules
Fuses in Interface and Control Cabinet PDM

Values of the fuses for the PDM interface cabinet are shown in the following table.
Interface Cabinet PDM Fuse Ratings
PDM Fuse* No.

FU1-FU6 FU7-FU10 FU13-FU20 FU21-FU26** FU27-FU28*** FU29 FU30 FU31-FU32 FU34-FU39
Current Voltage J Connector Rating Rating Vendor Catalog No.

J1R, S, T J1C, D J12A, B, C J15, 16 J17 J18 J19, 20 J7X, Y, Z 15 A 5A 1.5 A 3.2 A 15 A 5A 15 A 5A 125 V 125 V 125 V 125 V 250 V 250 V 250 V 250 V 125 V Bussmann GMA-15A Bussmann GMA-5A Bussmann GMA-15A Bussmann GMC-1.5A Bussmann MDL-3.2A Bussmann ABC-15A Bussmann ABC-5A Bussmann ABC-15A Bussmann GMA-5A
J8A, B, C, D 15 A
*All fuses are ferrule type 5 mm x 20 mm, except for FU27-FU32 which are 0.25" x 1.25 ". **The short circuit rating for FU21-FU26 is 100 A ***The short circuit rating for FU27-FU28 is 70 A
The PDM in the control cabinet (IS2020CCPD) does not supply power to any terminal boards except the TRLY boards. Values for the fuses in the control cabinet PDM are similar to those in the I/O cabinet PDM, except the rating for fuses FU1FU6 is 5 A instead of 15 A.
Operation
The customer's 125 V dc and 115/230 V ac power is brought into the PDM through power filters. The ac power is cabled out to one or two ac/dc converters which produce 125 V dc. This dc voltage is then cabled back into the PDM and diode coupled to the main dc power, forming a redundant power source. This power is distributed to the VME racks and terminal boards. Either 115 V ac or 230 V ac can be handled by the ac/dc converters. The transformer cable must be plugged into either JTX1 for 115 V ac, or JTX2 for 230 V ac operation. Diagnostic information is collected in the PDM and wired out to a DIN rail mounted terminal board. A cable then runs to the VCMI in rack <R> through J301. Ac feeders, J17-20, are fused and cabled out to the relay terminal boards. 125 V dc feeders are fused and cabled to the interface (I/O) cabinets, protection modules, TRPG, TREG, and TRLY. To ensure a noise free supply to the boards, the PDM is supplied through a control power filter (CPF), which suppresses EMI noise. The CPF rack holds either two or three Corcom 30 A filter modules as shown in the following figure. Power to the contact inputs first passes through resistors R3 and R4, through TB2, before being fused and cabled to the TBCI boards. Contact inputs operate with 125 V dc excitation.
Control Cabinet PDM

Power requirements for the control cabinet are less than for the interface cabinet. The PDM has the same layout but different fuse ratings, since only the control racks and relay output boards require power. For additional noise filtering for the controllers, Corcom power filters are included with the PDM.
125 V dc + P125 - N125 Ac 1 115/230 V ac Ac 2 115/230 V ac
TB2
4 1
DCF1 TB1
TB1
ACF1 6 3
4
ACF2 4 1 2
Power filter board
5
1 2
10
11
12
Chassis
DS2020PDMAG6
Chassis
DS200TCPD
DCHI For bus monitoring TB3

P125S (+1.82V) Chassis 1 2 3 4 5 6 7 8 9
DCLO AC1H
AC1N AC2H JZ4
AC2N JZ5
FU29 FU30
Ac feeders J17 J18 J19 J20

125 V dc to TREG, JH1, Contact inputs +
P125V BJS P125 VR

332k 10k 10k 332k
FU31 FU32
JZ2 DACA#1
ACSHI JZ3 DACA#2
TB3 FU1/FU2 SW1
N125 S (-1.82V)
N125 VR
FU9/FU10 SW5 FU13/FU14 JZ1

1 10 9 6
FU19/FU20 FU34/FU35 FU38/FU39 SW6 SW8
Dc feeders J1R [J2R [J1S J1T J2S [ J1C J2T R1 R2 J1D 22 22 ohm ohm J8A 70 70 J8B W W J8C
12 11 10
TB2
1 2 3 4
J8D
J7X J7Y J7Z J7A
Door
P125 VR 4 N125 VR 7 R4 R3 22 22 ohm ohm 70 W 70 W
11 12
Door
3 2
FU21/FU22 FU25/FU26 + P125 V FU28 3.2 A

FU27 3.2 A
1 J7W 2
P125 V N125 V
J12A J12B J12C

3 2 1
J15
R5, 50 ohm,* 70 W
R6, 50 ohm,* 70 W
1 2 3
J16
Diagnostic info *Note: Field configurable
JPD
Distribution Module for I/O Cabinet
125 V dc
Ac1 115/230 V ac
AC1H 2 3 AC1N 4
Ac2 115/230 V ac
AC2H 5 AC2N 6
To safety ground IS2020CCPD Chassis MOV suppression
+P125 - N125
TB1
In+
Gnd
In- In+
Gnd
In-
In+
Gnd
In-
DCF1
120/250 V, 30 Amp
120/250 V, 30 Amp
ACF1
ACF2
120/250 V, 30 Amp
Power filters
Out+
Out-
Out+
Out-
Out+
Out-
DCHI P125V
AC1H DCLO
AC1N AC2H JZ4
DS200TCPD FU29 AC2N FU30 JZ5 FU31 FU32 ACSHI
Ac feeders to TRLY boards J17 J18 J19 J20 DACA#1 DACA#2
BJS
JZ2
FU1/FU2 FU3/FU4 FU5/FU6 SW1 SW2 SW3
JZ3 J1R J1S J1T

DIN-rail transition terminal board
Dc feeders to controller racks <R0>,<S0>,<T0> + 28 Analog In 1

29 P125_Grd
P125 V
TB2
1 2 3 4 5 6 7 8 10k 332k 10k 332k
P125S (+1.82V)
37- pin connector
+ 27 Analog In 2
N125 S (-1.82V) Chassis
26 N125_Grd
+ 7 Analog In 3
8 6
Spare 01 Spare 02 DCOM

compatability between screw (TB) and 37-pin connector numbers.
+ 5 Analog In 4 One to one

10 P5V 9
Cable to VCMI via VDSK on front of <R0> control rack.
N125 V
Diagnostic information JPD P5V 7 DCOM 8 1 BAT 2 AC1 3 AC2 4 Spare J19 Fuse31 5 J20 Fuse32 6 J17 Fuse29 9
35 DIN1, Logic_In_1 34 DIN2, Logic_In_2 33
DIN3, Logic_In_3
32 DIN4, Logic_In_4 31 DIN5, Logic_In_5 30 DIN6, Logic_In_6 16 DIN7, Logic_In_7
PDM for Controller Cabinet
Ground Fault Detection Sensitivity

Note Ground fault detection is performed by the VCMI using signals from the PDM.
Ground fault detection on the floating 125 V dc power bus is based upon monitoring the voltage between the bus and the ground. The bus voltages with respect to ground are normally balanced (in magnitude), that is the positive bus to ground is equal to the negative bus to ground. The bus is forced to the balanced condition by the bridging resistors, Rb (refer to the figure). Bus leakage (or ground fault) from one side will cause the bus voltages with respect to ground to be unbalanced.
Power Distribution Module

P125 Vdc Rb Jumper Grd Rb N125 Vdc Rf Grd Fault Vout,Neg Monitor2 Vout,Pos Monitor1
Electrical Circuit Model

Rb/2 Vbus/2 Rf Vout, Bus Volts wrt Ground
Ground Fault on Floating 125 Vdc Power Bus
There is a relationship between the bridge resistors, the fault resistance, the bus voltage, and the bus to ground voltage (Vout) as follows: Vout = Vbus*Rf / [2*(Rf + Rb/2)] Therefore the threshold sensitivity to ground fault resistance is as follows: Rf = Vout*Rb / (Vbus 2*Vout). The ground fault threshold voltage is typically set at 30 V, that is Vout = 30 V. The bridging resistors are 82 K each. Therefore, from the formula above, the sensitivity of the control panel to ground faults, assuming it is on one side only, is as shown in the following table.
Note On Mark V systems, the bridging resistors are 33 K each so different Vout values result.
Sensitivity to Ground Faults
Vbus - Bus voltage

105 125 140 105 125 140 105 125 140 105 125 140
Vout - Measured Bus to ground voltage (threshold)

30 30 30 19 19 19 10 10 10 30 30 30
Rb (Kohms) - bridge resistors (balancing)

82 82 82 82 82 82 82 82 82 33 33 33
Rf (Kohms) -fault resistor

55 38 31 23 18 15 10 8 7 22 15 12
Control System
Mark VI Mark VI Mark VI Mark VI Mark VI Mark VI Mark VI Mark VI Mark VI Mark V Mark V Mark V
The results for the case of 125 V dc bus voltage with various fault resistor values is shown in the following figure.
40.0 Fault, Rf 30.0 20.0 10.0 0.0 0 10 20 Voltage, Vout 30 Fault Resistance (Rf) Vs Threshold Voltage (Vout) at 125 V dc on Mark VI
Threshold Voltage as Function of Fault Resistance
Results
On Mark VI, when the voltage threshold is configured to 30 V and the voltage bus is 125 V dc, the fault threshold is 38 . When the voltage threshold is configured to 17 V and the voltage bus is 125 V dc, the fault threshold is 15 . The sensitivity of the ground fault detection is configurable. Balanced bus leakage decreases the sensitivity of the detector.
Specifications
Item
Number of input sources Control Power filters AC to DC converters Redundancy Outputs
Specification
One 125 Volt battery One or two 115/230 V ac sources Dc: One Corcom 30 A filter modules - 120/250 V, 30 A Ac: One or two Corcom 30 A filter modules - 120/250 V, 30 A One or two DACA converters 115 or 230 V ac The two or three dc sources are diode coupled to form a redundant power source for the I/O racks Two TMR I/O racks, six total Three VPRO protection modules One TRPG and one TREG board Four AC feeders to TRLY boards Four DC feeders to TRLY boards Three TBCI boards Two spare, two miscellaneous outputs
Diagnostics
As shown in the following figure, the 125 V dc is reduced by a resistance divider network to signal level for monitoring. Other items monitored include the battery voltage, two ac sources, and fuses in the feeders to the relay output boards. In the interface cabinet this diagnostic data is monitored by the VCMI. In the control cabinet it is cabled to the VDSK board and then to the VCMI.
DS2020PDMAGx
Din Rail Transition Termination Board
P125 VR
TB3 1 2 3 4 5 6 7 8 9 332k 10k 10k 332k N125 S (-1.82V) P125S (+1.82V) Chassis 37-pin connector
+ 28 Analog In 1 29 P125_Grd 27 Analog In 2 + 26 N125_Grd +7 8 +5 6 Analog In 3 Spare01 Analog In 4 Spare02
37-wire cable One to one compatability between screw (TB) and 37-pin connector numbers
N125 VR
Connect to VCMI via J301, in <Rx> I/O rack
10 P5V JPD P5V DCOM BAT AC1 AC2 Spare J19 Fuse31 J20 Fuse32 J17 Fuse29 9 DCOM
35 DIN1, Logic_In_1 7 8 1 2 3 4 5 6 9 34 DIN2, Logic_In_2 33 DIN3, Logic_In_3 32 DIN4, Logic_In_4 31 DIN5, Logic_In_5 30 DIN6, Logic_In_6 16 DIN7, Logic_In_7
PDM Diagnostic Monitoring
Configuration Switches
The PDM for the I/O cabinets has a number of jumpers and switches as follows. Refer to the circuit diagrams for location and function.
Switch
SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8
Indicator Output
Yes Yes Yes Yes Yes Yes Yes Yes J1R, J2R J1S, J2S J1T, J2T J1C J1D J7X J7Y J7Z
Cable Destination
<R> Power Supply, 125 V dc <S> Power Supply, 125 V dc <T> Power Supply, 125 V dc Spare 125 V dc supply Spare 125 V dc supply <X> (or R8) Power, 125 V dc supply <Y> (or S8) Power, 125 V dc supply <Z> (or T8) Power, 125 V dc supply
Jumpers
Jumpers are located on TB1, and TB2. Resistors are located on TB3 to reduce the 125 V dc to 1.82 V dc for monitoring the bus.
Ground Reference Jumper

Jumper BJS is supplied for isolation of ground reference on systems with an external ground reference. The ground reference bridge across the 125 V dc power has two resistances, one on each side, and BJS connects the center to ground.
Note When more than one PDM is supplied from a common 125 V dc source, remove all the BJS connections except one.
PDM variables including the ac and dc sources, P125 and N125 voltages, and the status of fuses 31, 32, and 33, are monitored by the VCMI in <R> rack. Refer to the VCMI toolbox configuration in GEI-100551, VCMI Bus Master Controller.
Alarms
Fault
43 44
Fault Description
Possible Cause
125 Volt Bus = [ ] Volts is Outside of Limits. The 125 A source voltage or cabling problem; disable 125 V Volt bus voltage is out of the specified operating limits. monitoring if not applicable. 125 Volt Bus Ground = [ ] Volts is Outside of Limits. The 125 Volt bus voltage ground is out of the specified operating limits. Leakage or a fault to ground causing an unbalance on the 125 V bus; disable 125 V monitoring if not applicable.
PPDA Power Distribution System Feedback

The Power Distribution System Feedback (PPDA) pack accepts inputs from up to six different power distribution boards. It conditions the board feedback signals and provides a dual redundant Ethernet interface to the controllers. PPDA feedback is structured to be plug and play uses electronic IDs to determine the power distribution boards wired into it. This information is then used to populate the IONet output providing correct feedback from connected boards.
Compatibility
The PPDA I/O pack is hosted by the JPDS or JPDM 28 V dc Control Power boards on the Mark* VIe Modular Power Distribution (PDM) system. It is compatible with the feedback signals created by JPDB, JPDE, and JPDF.
Installation
The PPDA I/O pack mounts on either a JPDS or JPDM 28 V dc control power terminal board.
To install the PPDA pack 1 2 3

Securely mount the desired terminal board. Directly plug one PPDA I/O pack for simplex or three PPDA I/O packs for TMR into the terminal board connectors. Mechanically secure the packs using the threaded studs adjacent to the Ethernet ports. The studs slide into a mounting bracket specific to the terminal board type. The bracket location should be adjusted such that there is no right-angle force applied to the DC-62 pin connector between the pack and the terminal board. The adjustment should only be required once in the life of the product. Plug in one or two Ethernet cables depending on the system configuration. The pack will operate over either port. If dual connections are used, the standard practice is to connect ENET1 to the network associated with the R controller. Apply power to the pack by plugging in the connector on the side of the pack. It is not necessary to insert this connector with the power removed from the cable as the I/O pack has inherent soft-start capability that controls current inrush on power application. Configure the I/O pack as necessary. Connect ribbon cables from connector J2 on JPDS or JPDM to daisy chain other core boards feeding information to PPDA.
6 7
Note Additional PDM feedback signals may be brought into the PPDA I/O pack through the P2 connector on the host board. The P1 connector is never used on a board that hosts the PPDA I/O pack, PPDA must always be at the end of the feedback cable daisy chain.
Diagnostics
The PPDA performs the following self-diagnostic tests: A power-up self-test including checks of RAM, flash memory, Ethernet ports, and most of the processor board hardware Continuous monitoring of the internal power supplies for correct operation A check of the electronic ID information from the terminal board, acquisition card, and processor card confirming the hardware set matches, followed by a check confirming the application code loaded from flash memory is correct for the hardware set The analog input hardware includes precision reference voltages in each scan. Measured values are compared against expected values and are used to confirm health of the A/D converter circuits. Details of the individual diagnostics are available from the ToolboxST* application. The diagnostic signals are individually latched, and then reset with the RESET_DIA signal if they go healthy.
Configuration
Variable
L3DIAG_PPDA_R L3DIAG_PPDA_S L3DIAG_PPDA_T LINK_OK_PPDA_R LINK_OK_PPDA_S LINK_OK_PPDA_T ATTN_PPDA_R ATTN_PPDA_S ATTN_PPDA_T PS18V_PPDA_R PS18V_PPDA_S PS18V_PPDA_T PS28V_PPDA_R PS28V_PPDA_S PS28V_PPDA_T IOPackTmpr_R IOPackTmpr_S IOPackTmpr_T Pbus_R_LED Pbus_S_LED Pbus_T_LED Src_R_LED Src_S_LED Src_T_LED Aux_LED Batt_125V_LED Batt_125G_LED JPDD_125D_LED Pbus_125P_LED
Description
I/O Diagnostic Indication I/O Diagnostic Indication I/O Diagnostic Indication I/O Link Okay Indication I/O Link Okay Indication I/O Link Okay Indication I/O Attention Indication I/O Attention Indication I/O Attention Indication I/O 18 V Power Supply Indication I/O 18 V Power Supply Indication I/O 18 V Power Supply Indication I/O 28 V Power Supply Indication I/O 28 V Power Supply Indication I/O 28 V Power Supply Indication I/O pack Temperature (deg F) I/O pack Temperature (deg F) I/O pack Temperature (deg F) Pbus R is in Regulation Pbus S is in Regulation Pbus T is in Regulation All R Pbus Sources OK All S Pbus Sources OK All T Pbus Sources OK Aux 28 outputs OK 125 V battery volts OK 125 V battery floating 125 V JPDD feeds OK 125 V Pbus feeds OK
Direction
Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input AnalogInput AnalogInput AnalogInput Input Input Input Input Input Input Input Input Input Input Input
Type
BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL REAL REAL REAL BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL
Variable
Batt_24V_LED Batt_24G_LED JPDD_24D_LED Pbus_24P_LED AC_Input1_LED AC_Input2_LED AC_JPDA_LED AC_Pbus_LED JPDR_LED Accelerometer_X Accelerometer_Y App_1_LED App_2_LED App_3_LED Fault_LED
Description
24 V battery volts OK 24 V battery floating 24 V JPDD feeds OK 24 V Pbus feeds OK Ac input 1 OK Ac input 2 OK Ac JPDA feeds OK Ac Pbus feeds OK JPDR Src Select OK Vibration input, X-coordinate Vibration input, Y-coordinate Application driven Application driven Application driven Fault Led - Application driven)
Direction
Input Input Input Input Input Input Input Input Input AnalogInput AnalogInput Output Output Output Output
Type
BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL BOOL REAL REAL BOOL BOOL BOOL BOOL
Parameter
InFiltEnb1 InFiltEnb2 InFiltEnb3 InFiltEnb4 InFiltEnb5 InFiltEnb6
Description
Enable inputs filtering for terminal board #1 Enable inputs filtering for terminal board #2
Selections
Disable, Enable Disable, Enable Disable, Enable Disable, Enable Disable, Enable Disable, Enable
DS2020DACAG2 ac-dc Power Conversion

The DS2020DACAG2 is a drop in replacement for the DS2020DACAG1. It is backward compatible in systems that used the previous version and it should be used as a replacement part for the previous model. The DACA converts 115/230 V ac input power into 125 V dc output power, and the output power rating is approximately 1000 W. A DACA is used when the primary power source for a control system is 125 V dc with or without a battery. In addition to power conversion, DACA provides additional local energy storage to extend the ride-through time whenever the Mark VIe Control has a complete loss of control power. The DS2020DACAG2 model has a higher power rating than the previous module. Also, this new model can be paralleled for greater output current, whereas paralleling was not recommended for the previous model. The DS2020DACAG2 is recommended for all new panel designs.
Installation
The DACA module has four mounting holes in its base. Ac power input and dc output is through a single 12-position connector JZ that is wired into connector JZ2 or JZ3 of the PDM. Selection of 115 V ac or 230 V ac input is made by plugging the DACA internal cable into connector JTX1 for 115 V or JTX2 for 230 V.
Ensure the proper voltage is selected before power is applied to the equipment.
JTX1 115 V Cable to transformer inside DACA converter
DACA Converter
JTX2 230 V
JZ
Cable to PDM JZ2 Or JZ3
DACA Module Wiring
DACA Filter Capacitor Wear Out

The electrolytic capacitors in the DACA module wear out over time due to the ambient temperature of the environment where they are used. The following table shows the calculated life expectancy and recommended replacement schedule for the DACA modules.
DACA Replacement Schedule
Calculated Life Expectancy of DACA Capacitor

At 20C (68 F) ambient At 45C (113 F) ambient At 65C (149 F) ambient
Recommended Replacement Schedule*

100 years 20 years 5 years
*Due to wear out of Electrolytic Capacitor
To replace a DACA power conversion module 1 2 3 4 5 6 7 8 9

Remove power from the DACA module. Allow 1 minute for the output voltage to discharge. Remove the power input/output cable (JZ) on the right side of the module top. Remove the four bolts securing the DACA module to the floor of the cabinet. Remove the DACA module. Make note of which receptacle the capacitor power plug is in. This is on the left side of the module top. JTX1 is for 115 V ac and JTX2 is for 230 V ac. Ensure the capacitor power plug is in the same position as the one removed. JTX1 is for 115 V ac and JTX2 is for 230 V ac. Place the new DACA module in the same position as the one removed. Secure the DACA module to the cabinet floor with the four bolts removed from the previous module. Install the power input/output plug (JZ) on the right side of the module top.
10 Restore power to the DACA module.
DACA Power Conversion Modules
Hole size for 1 / 4" TAPTITE (4PL)
Drill Plan
Note: Keep out area is 8.65 in. x 13.9 in.
DACA Mounting Pattern
Operation
DACA receives ac power through the cable harness that is plugged into connector JZ. DACA uses a full wave bridge rectifier and an output filter capacitor. If needed, the user must provide an input filter to attenuate harmonic currents injected into the incoming line.
Single DACA Module, Maximum Output Current is 9.5 A dc
Input to DACA Input Current V ac RMS at Max Load

115 V ac 230 V ac 11 A 6A
Output Voltage Load = 1 A dc

119 V dc
Output Voltage Load = 9.5 A dc

107 V dc
The DACAG2 can be paralleled for greater output current. In parallel operation, current sharing between the two DACAs is critical. Uneven current sharing can cause one of the DACAs to operate beyond its output current rating.
Two DACA Modules with Outputs Paralleled, Maximum Output Current is 16.5 A dc*
Input to DACA Input Current V ac RMS at Max Load

115 V ac 230 V ac 20 A 11 A

120 V dc

110 V dc
* The two paralleled DACAs must be connected to one ac voltage source for even output current sharing.
For proper implementation of parallel DACAs, the following must be observed: The DACAs must be connected to the same ac source to ensure equal input voltages to the DACAs. The maximum output current per DACA is derated for parallel operation. This derating accounts for variance in DACA open circuit voltages and variance in DACA output impedances. The following curve should be used. The maximum recommended total panel current is 16.5 A dc.
Probability of overloading one DACA when two DACAs are paralled; Plotted at various panel loads
Probability of one DACA exceeding 9.5 A dc rating
Total panel Load, A dc
Specifications
Item
Input Voltage Output Voltage Output Current Rating Output Ripple Voltage Discharge Rate
Specification
105-132 V ac or 210-265 V ac, 47 to 63 Hz 90 to 145 V dc with a load of 1 to 9.5 A Over the full range of input voltage 9.5 A dc, -30 to 45C (-22 to 113 F) Linearly derate to 7.5 A dc at 60C (140 F) 4 V p-p Nominal input of 115 or 230 V ac, no load, discharge to less than 50 V dc within 1 minute of removal of input power. 105 9.5 882 19.5 115 9.5 974 29.5 132 9.5 1131 48.8
Hold Up (time for output V in (V ac) to discharge to 70 V dc Initial Load (A dc) with constant power load) Pout (W) Hold Up Time (ms) Temperature Humidity
-30 to 60C (-22 to +140 F) free convection 5 to 95%, non-condensing UL 508C Safety Standard Industrial Control Equipment CSA 22.2 No. 14 Industrial Control Equipment EN 61010 Section 14.7.2 Overload Tests EN 61010 Section 14.7.1 Short Circuit Test EN 61000-4-2 Electrostatic Discharge Susceptibility EN 61000-4-3 Radiated RF Immunity EN 61000-4-4 Electrical Fast Transient Susceptibility EN 61000 4-5 Surge Immunity EN61000-4-6 Conducted RF Immunity EN 50082-2:1994 Generic Immunity Industrial Environment ENV 55011:1991 - ISM equipment emissions IEC 529 Intrusion Protection Codes/NEMA 1/IP 20
Diagnostics
No diagnostic features are provided on this module.
Configuration
Input voltage selection is made on DACA by plugging the captive cable harness into connector JTX1 for 115 V ac nominal input or connector JTX2 for 230 V ac nominal input.
Notes
CHAPTER 8
Replacement/Warranty
Pack/Board Replacement
Handling Precautions
To prevent component damage caused by static electricity, treat all boards with static sensitive handling techniques. Wear a wrist grounding strap when handling boards or components, but only after boards or components have been removed from potentially energized equipment and are at a normally grounded workstation. This equipment contains a potential hazard of electric shock, burn, or death. Ensure that all Lockout/Tag Out procedures are followed prior to replacing terminal boards. Only personnel who are adequately trained and thoroughly familiar with the equipment and the instructions should install, operate, or maintain this equipment. Printed wiring boards may contain static-sensitive components. Therefore, GE ships all replacement boards in anti-static bags. Use the following guidelines when handling boards: Store boards in anti-static bags or boxes. Use a grounding strap when handling boards or board components (per previous Caution criteria).
Replacement Procedures
System troubleshooting should be at the circuit board level. The failed pack/board should be removed and replaced with a spare.
Note The failed pack/board should be returned to GE for repair. Do not attempt to repair it on site.
To prevent electric shock, turn off power to the turbine control, then test to verify that no power exists in the board before touching it or any connected circuits.
To prevent equipment damage, do not remove, insert, or adjust board connections while power is applied to the equipment.
Replacement/Warranty 537
Replacing V-type Boards

To replace the board 1 2 3 4
Power down the rack and remove the failed board. Replace the board with a spare board of the same type, and move the Ethernet ID plug from the old VPRO board to the replacement. Power up the rack. From the toolbox Outline View, under item Mark VI I/O, locate the failed protection rack.From the shortcut menu, click Download. The board firmware and configuration downloads. Cycle power to the rack to establish communication with the controller.
Replacing T-type Boards

To replace the board 1 2 3 4 5 6 7 8
Lockout and/or tagout the field equipment and isolate the power source. Check the voltage on each terminal and ensure no voltage is present. Unplug the I/O cable (J-Plugs). If applicable, unplug JF1, JF2 and JG1. If applicable, remove TB3 power cables. Loosen the two screws on the wiring terminal blocks and remove the blocks, leaving the field wiring attached. Remove the terminal board and replace it with a spare board, check that all jumpers are set correctly (the same as in the old board). Screw the terminal blocks back in place and plug in the J-plugs and connect cable to TB3 as before
Replacing D-type Boards

To replace the board 1 2 3 4 5 6
Lockout and/or tag out the field equipment and isolate the power source. Unplug the I/O cable (J-plugs). Disconnect all field wire and thermocouples along with shield wire. Remove the terminal board and install the new board. Reconnect all field wire and thermocouples as before. Plug the I/O cable (J-plug) back.
538 Replacement/Warranty
Replacing J-type Boards

To replace the board 1 2 3 4
Lockout and/or tag out the field equipment and isolate the power source. Check the voltage on each terminal to ensure no voltage is present. Verify the label and unplug all connectors. Loosen the two screws on each of the terminal blocks and remove the top portion leaving all field wiring in place. If necessary, tie the block to the side out of the way. Remove the mounting screws and the terminal board. Install a new terminal board. Check that all jumpers, if applicable, are in the same position as the ones on the old board. Tighten it securely to the cabinet. Replace the top portion of the terminal blocks and secure it with the screws on each end. Ensure all field wiring is secure. Plug in all wiring connectors.
5 6 7 8 9
Replacing S-type Boards

To replace the board 1 2 3 4 5 6
Lockout and/or tagout the field equipment and isolate the power source. Check the voltage on each terminal to ensure there is no voltage present. Unplug the I/O cable (J-plugs) If applicable, unplug JF1, JF2, and JG1. If applicable, remove the TB3 power cables. A S-type terminal board uses a Euro-style box terminal block. Gently pry the segment of the terminal block, containing the field wiring, away from the part attached to the terminal board, leaving the wiring in place. If necessary, tie the block to the side out of the way. Remove the mounting screws and terminal board. Install a new terminal board. Check to ensure all jumpers, if applicable, are in the same position as the ones on the old board. Tighten it securely to the cabinet.
7 8 9
10 Slide the segments containing field wiring into the terminal block. Ensure the numbers on the segment with the field wires match the numbers on the terminal block. Press together firmly. Ensure all field wiring is secure.
Replacement/Warranty 539
Renewal/Warranty
How to Order a Board
When ordering a replacement board for a GE product, you need to know: How to accurately identify the part If the part is under warranty How to place the order
Board Identification
A printed wiring board is identified by an alphanumeric part (catalog) number located near its edge. The following figure explains the structure of the part number. The boards functional acronym, shown below, is normally based on the board description, or name.
IS 200 xxxx G# A A A Artwork revision Functional revision 1 Hardware form 2 Hardware form Functional acronym Assembly level 3 Manufacturer (DS & IS for GE in Salem, VA)
1 2
Backward compatible Not backward compatible 3200 = a base-level board 215 = a higher level assembly or added components 220 = pack specific assembly 230 = a higher level module
Board Part Number Conventions
Placing the Order

Renewals/spares (or those not under warranty) should be ordered by contacting the nearest GE Sales or Service Office, or an authorized GE Sales Representative. Be sure to include: Complete part number and description Serial number Material List (ML) number
Note All digits are important when ordering or replacing any board. The factory may substitute later versions of replacement boards based on availability and design enhancements. However, GE Energy ensures backward compatibility of replacement boards.
540 Replacement/Warranty
Glossary of Terms
Glossary of Terms
application code
Software that controls the machines or processes, specific to the application.
ARCNET
Attached Resource Computer Network. A LAN communications protocol developed by Datapoint Corporation. The physical (coax and chip) and datalink (token ring and board interface) layer of a 2.5 MHz communication network which serves as the basis for DLAN+. See DLAN+.
attributes
Information, such as location, visibility, and type of data that sets something apart from others. In signals, an attribute can be a field within a record.
Balance of Plant (BOP)

Plant equipment other than the turbine that needs to be controlled.
baud
A unit of data transmission. Baud rate is the number of bits per second transmitted.
Bently Nevada
A manufacturer of shaft vibration monitoring equipment.
BIOS
Basic input/output system. Performs the controller boot-up, which includes hardware self-tests and the file system loader. The BIOS is stored in EEPROM and is not loaded from the toolbox.
bit
Binary Digit. The smallest unit of memory used to store only one piece of information with two states, such as One/Zero or On/Off. Data requiring more than two states, such as numerical values 000 to 999, requires multiple bits (see Word).
Glossary of Terms 541
block
Instruction blocks contain basic control functions, which are connected together during configuration to form the required machine or process control. Blocks can perform math computations, sequencing, or continuous control. The ToolboxST application receives a description of the blocks from the block libraries.
board
Printed wiring board.
Boolean
Digital statement that expresses a condition that is either True or False. In the toolbox, it is a data type for logical signals.
Bus
An electrical path for transmitting and receiving data.
byte
A group of binary digits (bits); a measure of data flow when bytes per second.
CIMPLICITY
Operator interface software configurable for a wide variety of control applications.
COI
Computer Operator Interface that consists of a set of product and application specific operator displays running on a small panel computer hosting Embedded Windows NT.
COM port
Serial controller communication ports (two). COM1 is reserved for diagnostic information and the Serial Loader. COM2 is used for I/O communication
configure
To select specific options, either by setting the location of hardware jumpers or loading software parameters into memory.
CRC
Cyclic Redundancy Check, used to detect errors in Ethernet and other transmissions.
542 Glossary of Terms
CT
Current Transformer, used to measure current in an ac power cable.
data server
A PC which gathers control data from input networks and makes the data available to PCs on output networks.
DCS (Distributed Control System)

Control system, usually applied to control of boilers and other process equipment.
DDPT
IS200DDPT Dynamic Pressure Transducer Terminal Board that is used in conjunction with the IS200VAMA VME Acoustic Monitoring Board that is used to monitor acoustic or pressure waves in the turbine combustion chamber.
dead band
A range of values in which the incoming signal can be altered without changing the output response.
device
A configurable component of a process control system.
DIN-rail
European standard mounting rail for electronic modules.
DLAN+
GE Energy LAN protocol, using an ARCNET controller chip with modified ARCNET drivers. A communications link between exciters, drives, and controllers, featuring a maximum of 255 drops with transmissions at 2.5 MBPS.
DRAM
Dynamic Random Access Memory, used in microprocessor-based equipment.
EGD
Ethernet Global Data is a control network and protocol for the controller. Devices share data through EGD exchanges (pages).
EMI
Electro-magnetic interference; this can affect an electronic control system
Ethernet
LAN with a 10/100 M baud collision avoidance/collision detection system used to link one or more computers together. Basis for TCP/IP and I/O services layers that conform to the IEEE 802.3 standard, developed by Xerox, Digital, and Intel.
EVA
Early valve actuation, to protect against loss of synchronization.
event
A property of Status_S signals that causes a task to execute when the value of the signal changes.
EX2000 (Exciter)
GE generator exciter control; regulates the generator field current to control the generator output voltage.
EX2100 (Exciter)
Latest version of GE generator exciter control; regulates the generator field current to control the generator output voltage.
fanned input
An input to the terminal board which is connected to all three TMR I/O boards.
fault code
A message from the controller to the HMI indicating a controller warning or failure.
firmware
The set of executable software that is stored in memory chips that hold their content without electrical power, such as EEPROM.
flash
A non-volatile programmable memory device.
forcing
Setting a live signal to a particular value, regardless of the value blockware or I/O is writing to that signal.
frame rate
Basic scheduling period of the controller encompassing one complete inputcompute-output cycle for the controller. It is the system dependent scan rate.
function
The highest level of the blockware hierarchy, and the entity that corresponds to a single .tre file.
gateway
A device that connects two dissimilar LAN or connects a LAN to a wide-area network (WAN), pc, or a mainframe. A gateway can perform protocol and bandwidth conversion.
Graphic Window
A subsystem of the ToolboxST application for viewing and setting the value of live signals.
health
A term that defines whether a signal is functioning as expected.
heartbeat
A signal emitted at regular intervals by software to demonstrate that it is still active.
hexadecimal (hex)
Base 16 numbering system using the digits 0-9 and letters A-F to represent the decimal numbers 0-15. Two hex digits represent 1 byte.
HMI
Human Machine Interface, usually a PC running CIMPLICITY software.
HRSG
Heat Recovery Steam Generator using exhaust from a gas turbine.
ICS
Integrated Control System. ICS combines various power plant controls into a single system.
IEEE
Institute of Electrical and Electronic Engineers. A United States-based society that develops standards.
initialize
To set values (addresses, counters, registers, and such) to a beginning value prior to the rest of processing.
I/O Device
Input/output hardware device that allow the flow of data into and out
I/O
Input/output interfaces that allow the flow of data into and out of a device
I/O drivers
Interface the controller with input/output devices, such as sensors, solenoid valves, and drives, using a choice of communication networks.
I/O mapping
Method for moving I/O points from one network type to another without needing an interposing application task.
IONet
The Mark VI I/O Ethernet communication network (controlled by the VCMIs)
insert
Adding an item either below or next to another item in a configuration, as it is viewed in the hierarchy of the Outline View of the ToolboxST application.
instance
Update an item with a new definition.
item
A line of the hierarchy of the Outline view of the ToolboxST application, which can be inserted, configured, and edited (such as Function or System Data)
IP Address
The address assigned to a device on an Ethernet communication network.
LCI Static Starter

This runs the generator as a motor to bring a gas turbine up to starting speed.
logical
A statement of a true sense, such as a Boolean
macro
A group of instruction blocks (and other macros) used to perform part of an application program. Macros can be saved and reused.
Mark VIe Turbine controller

A controller hosted in one or more VME racks that perform turbine-specific speed control, logic, and sequencing.
median
The middle value of three values; the median selector picks the value most likely to be closest to correct.
Modbus
A serial communication protocol developed by Modicon for use between PLCs and other computers.
module
A collection of tasks that have a defined scheduling period in the controller.
MTBFO
Mean Time Between Forced Outage, a measure of overall system reliability.
NEMA
National Electrical Manufacturers Association; a U.S. standards organization.
non-volatile
The memory specially designed to store information even when the power is off.
online
Online mode provides full CPU communications, allowing data to be both read and written. It is the state of the ToolboxST application when it is communicating with the system for which it holds the configuration. Also, a download mode where the device is not stopped and then restarted.
pcode
A binary set of records created by the ToolboxST application, which contain the controller application configuration code for a device. Pcode is stored in RAM and flash memory.
period
The time between execution scans for a module or task - also a property of a module that is the base period of all of the tasks in the module
pin
Block, macro, or module parameter that creates a signal used to make interconnections.
Plant Data Highway (PDH)

Ethernet communication network between the HMI Servers and the HMI Viewers and workstations
PLC
Programmable Logic Controller. Designed for discrete (logic) control of machinery. It also computes math (analog) function and performs regulatory control.
PLU
Power load unbalance, detects a load rejection condition which can cause overspeed.
Power Distribution Module (PDM )

The PDM distributes 125 V dc and 115 V ac to the VME racks and I/O terminal boards.
PROFIBUS
An open fieldbus communication standard defined in international standard EN 50 170 and is supported in simplex Mark VIe systems.
Proximitor
Bently Nevada's proximity probes used for sensing shaft vibration.
PT
Potential Transformer, used for measuring voltage in a power cable.
QNX
A real time operating system used in the controller.
real time
Immediate response, referring to process control and embedded control systems that must respond instantly to changing conditions.
reboot
To restart the controller or the ToolboxST application.
RFI
Radio Frequency Interference is high frequency electromagnetic energy which can affect the system.
register page
A form of shared memory that is updated over a network - register pages can be created and instanced in the controller and posted to the SDB
resources
Also known as groups. Resources are systems (devices, machines, or work stations where work is performed) or areas where several tasks are carried out. Resource configuration plays an important role in the CIMPLICITY system by routing alarms to specific users and filtering the data users receive.
RPSM
IS2020RPSM Redundant Power Supply Module for VME racks that mounts on the side of the control rack instead of the power supply. The two power supplies that feed the RPSM are mounted remotely.
RTD
Resistance Temperature Device used for measuring temperature.
runtime
See product code.
runtime errors
Controller problems indicated on the front panel by coded flashing LEDS, and also in the Log View of the ToolboxST application.
sampling rate
The rate at which process signal samples are obtained, measured in samples/second.
Serial Loader
Connects the controller to the toolbox PC using the RS-232C COM ports. The Serial Loader initializes the controller flash file system and sets its TCP/IP address to allow it to communicate with the ToolboxST application over Ethernet.
Server
A pc which gathers data over Ethernet from plant devices, and makes the data available to PC-based operator interfaces known as viewers.
SIFT
Software Implemented Fault Tolerance, a technique for voting the three incoming I/O data sets to find and inhibit errors. Note that Mark VIe also uses output hardware voting.
signal
The basic unit for variable information in the controller.
Simplex
Operation that requires only one set of control and I/O, and generally uses only one channel. The entire Mark VIe control system can operate in simplex mode, or individual VME boards in an otherwise TMR system can operate in implex mode.
stall detection
Detection of stall condition in a gas turbine compressor.
SOE
Sequence of Events, a high-speed record of contact closures taken during a plant upset to allow detailed analysis of the event.
Static Starter
See LCI.
symbols
Created by the ToolboxST application and stored in the controller, the symbol table contains signal names and descriptions for diagnostic messages.
task
A group of blocks and macros scheduled for execution by the user.
TBAI
Analog input terminal board, interfaces with VAIC.
TBAO
Analog output terminal board, interfaces with VAOC.
TBCC
Thermocouple input terminal board, interfaces with VTCC.
TBCI
Contact input terminal board, interfaces with VCCC or VCRC.
TCP/IP
Communications protocols developed to inter-network dissimilar systems. It is a de facto UNIX standard, but is supported on almost all systems. TCP controls data transfer and IP provides the routing for functions, such as file transfer and e-mail.
TGEN
Generator terminal board, interfaces with VGEN.
TMR
Triple Modular Redundancy. An operation that uses three identical sets of control and I/O (channels R, S, and T) and votes the results.
ToolboxST
A Windows-based software package used to configure the Mark VIe controllers, also exciters and drives.
TPRO
Turbine protection terminal board, interfaces with VPRO.
TPYR
Pyrometer terminal board for blade temperature measurement, interfaces with VPYR.
TREG
Turbine emergency trip terminal board, interfaces with VPRO.
trend
A time-based plot to show the history of values, similar to a recorder, available in the Historian and the ToolboxST application.
TRLY
Relay output terminal board, interfaces with VCCC or VCRC.
TRPG
Primary trip terminal board, interfaces with VTUR.
TRTD
RTD input terminal board, interfaces with VRTD.
TSVO
Servo terminal board, interfaces with VSVO.
TTUR
Turbine terminal board, interfaces with VTUR.
TVIB
Vibration terminal board, interfaces with VVIB.
UCVB
A version of the Mark VIe controller.
Unit Data Highway (UDH)

Connects the Mark VIe controllers, LCI, EX2000, PLCs, and other GE provided equipment to the HMI Servers.
validate
Makes certain that the ToolboxST application items or devices do not contain errors, and verifies that the configuration is ready to be built into pcode.
VAMA
IS200VAMA VME Acoustic Monitoring Board that is used in conjunction with the IS200DDPT Dynamic Pressure Transducer Terminal Board to monitor acoustic or pressure waves in the turbine combustion chamber.
VCMI
The Mark VIe VME communication board which links the I/O with the controllers.
VME board
All the Mark VIe boards are hosted in Versa Module Eurocard (VME) racks.
VPRO
Mark VIe Turbine Protection Module, arranged in a self contained TMR subsystem.
Windows NT
Advanced 32-bit operating system from Microsoft for 386-based PCs and above.
word
A unit of information composed of characters, bits, or bytes, that is treated as an entity and can be stored in one location. Also, a measurement of memory length, usually 4, 8, or 16-bits long.
GE Energy 1501 Roanoke Blvd. Salem, VA 24153-6492 USA 1 540 387 7000 www.geenergy.com

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Detach and fax or mail to the address noted above.

.......................................................................................... Fold here first ........................................................................................................

Safety Symbol Legend

Note Indicates an essential or important procedure, condition, or statement.

VAIC Analog Input/Output

VAMA Acoustic Monitoring

VAMB Acoustic Monitoring Input

VAMB Acoustic Monitoring...................................................................................................................... 79

VAOC Analog Output

VCCC/VCRC Discrete Input/Output

GEH-6421M Mark VI Turbine Control System Guide Volume II

VCMI Bus Master Controller

VCMI Bus Master Controller ................................................................................................................... 165

VGEN Generator Monitor and Trip

VPRO Turbine Protection Board

VPYR Pyrometer Board

VPYR Pyrometer Input ............................................................................................................................ 245 TPYR Pyrometer Input............................................................................................................................. 261

VRTD RTD Input

VSVA Servo Control

VSVA Servo Control................................................................................................................................ 285

VSCA Serial Communication Input/Output

VSVO Servo Control

VTCC Thermocouple Input

VTUR Turbine Specific Primary Trip

GEH-6421M Mark VI Turbine Control System Guide Volume II

VVIB Vibration Monitor Board

TTPW Power Conditioning Board

TTPW Power Conditioning...................................................................................................................... 483

VME Rack Power Supply

VME Rack Power Supply ........................................................................................................................ 491

VME Redundant Power Supply

Redundant Power Supply ......................................................................................................................... 507

Power Distribution Modules

GEH-6421M Mark VI Turbine Control System Guide Volume II

GEH-6421M Mark VI Turbine Control System Guide Volume II

Number of I/O per Processor 20 4 16 48 12 12 48 12 12 4 2 3 12 3 2 3 3 3 7 1 3 3 1 3 2 2 16 6 4 12 8 2 2 24 2

GEH-6421M Mark VI Turbine Control System Guide Volume II

I/O Processor Board VAMB VTURH1B

Number of I/O per Processor 18 4 2 2 1 8 3

TVIB TVIB TVIB

Terminal Board Terminal Block Features

Terminal Board Disconnect Switch (TBSW)

GEH-6421M Mark VI Turbine Control System Guide Volume II

TBSW/Terminal Board Applications Summary

GEH-6421M Mark VI Turbine Control System Guide Volume II

Voltage 50 V peak 225 V peak 300 V rms 300 V rms

Relay Board Summary

TRLYH1B 6 5 Mechanica l Form C Simplex and TMR 1

TRLYH1D 6 0 Mechanica l Form C Simplex and TMR 0

MOV Relay coil current/6 Relay coil current/6 6 120/240 24/125 No

MOV Solenoid resistance /6 N/A

Relay NO contact voltage/ 12 N/A H3= 120/240 H2=28 H3=125 No

N/A 120/240 28/125 No

6 No 24/ 110/ 125 Yes

GEH-6421M Mark VI Turbine Control System Guide Volume II

Trip Terminal Board Summary

Simplex No No Yes Yes No No No No No No Yes Yes Yes

ESTOP No No No No Yes Yes Yes Yes No No Yes No No

___ _ _ _ _ ___