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TUAM 3.

ARCHITECTURE FOR A DIGITAL VIDEO RECORDER


Stephen J. Solari icompression, Inc. Santa Clara, California ABSTRACT
The continuously declining price of the hard disk drive presents the opportunityfor digital disk-based systems to displace tape- and analog-based systems for consumers video storage needs by the end of the decade. This paper discusses the requirements o such a system and an f integrated circuit designed to help these products reach an aggressive price target.

Data Format There is not an obvious choice for which MPEG2 data format to store on the disk. Transport Stream merits consideration because it is widely used in cable and satellite transmission. However, being designed for broadband media distribution, it does not lend itself to efficient storage on a hard drive. Program Stream is better suited to storage requirements. Some systems handle audio and video independently by using Packetized Elementary Stream. Processor and OS for System Control These areas are opportunities for a manufacturer to differentiate its product. A variety of embedded microprocessors are available at different price and performance points. PCI PCI may appear to be overly expensive for a consumer product, but the following factors serve to mitigate these concerns. First of all, because it is found in nearly every personal computer, PCI enjoys considerable economies of scale. Second, the PCI bus can replace several different buses inside the DVR, each of which may require dedicated logic and memory. Lastly, the PCI bus allows hardware configurations to be easily modified. Interfaces such as modems, IEEE 1394 connections, and so on can be added or removed, providing flexibility and

INTRODUCTION A Digital Video Recorder employing a hard disk drive has several advantages over a conventional VCR, including higher fidelity, random access, and the ability to record and play simultaneously, which enables pause management. Until recently, such a system was prohibitively expensive. Reductions in integrated circuit and disk drive costs have made this a feasible product. DISCUSSION OF DVR FEATURES Encoder A fundamental question is whether an encoder, or compressor, is required at all. All-digital satellite receivers equipped with hard drives offer the time shift capability today without the need for an embedded encoder. However, the desirability of providing the consumer with a consistent experience regardless of the source has led most manufacturers to include an encoder. Even in an all-digital box, some see the need to transcode from HDTV or SDTV to a lower bit rate to optimize disk utilization. Compression Method Since some DVRs are closed systems with analog audio and video in and out, one could imagine that a compression scheme other than MPEG2 could be employed. Such a method may even have advantages to MPEG at low bit rates (the digital equivalent of VCR extended play). However, no proposal offers an advantage clear enough to consider departing from a widely deployed international standard, especially in contemplation of open systems and home networks in the future.

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quick time-to-market, which is key in this emerging market.

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0-7803-6301-9/00 $10.00 0 2000 E E E

Figure 1. Block diagram of a PCI-based Digital Video Recorder. The integrated circuit featured in this presentation incorporates theJive blocks highlighted in bold. Video Processing There are considerable differences between the circumstances of encoding a source for, say, a DVD master and encoding a source in a time-shift scenario. Some of these are highlighted in Table 1.
Home Studio Possible noise, snow, "Perfect" source ghosting, ringing, strange field sequences
Low data rate: 1.4-4Mbls High data rate: 3-9.8Mbls Human intervention undesirable Realtime Hardware very cost-sensitive: $300 Human intervention desirable Non-realtime Hardware not cost-sensitive: $30,000

Figure 2. Block diagram of a chip for Digital Video Recorders Encoder To support the widest range of applications, the encoder can generate Transport Stream, Program Stream, Elementary Stream, or Packetized Elementary Stream. MPEGl System Stream is also supported. The encoder's search range of 296 by 184 pixels provides excellent results even with scenes with high motion content such as sports. Motion vector smoothing eliminates a common MPEG artifact. The chip handles all time stamp and synchronization issues, greatly simplifying system design. Video Decoder The decoder handles all MPEGl and MPEG2 stream formats and can decode DV streams. This allows for DV to be transcoded to MPEG2, which dramatically reduces bit rate without sacrificing quality. Audio Encode and Decode The chip supports two-channel Dolby AC-3 as well as MPEG-1 Layer 1 and 2 at sample rates of 32, 44.1, and 48kHz. It accepts 1's and non-1% input and output. It also supports SP/DIF output. On Screen Display The OSD supports a variety of pixel formats, including 8- and 16-bit indexed color and 16- and 32-bit ARGB. A flicker filter is employed to reduce artifacts resulting from an interlaced display. A bitBLT accelerator facilitates the use of bit-mapped graphics and fonts to create an interactive experience. Interface MPEG data can be input or output through PCI master or slave. Data and control information can be sent over PCI either as master or slave, or separate 8-bit parallel ports can be used for compressed data and control.

Table I . Comparison of requirements for MPEG recording in a production studio vs. a typical home. THE DVR INTEGRATED CIRCUIT In consideration of the above, an IC has been developed which incorporates most of the common digital circuitry for a DVR. The chip consolidates memory requirements into two subsystems, each composed of 8MB of SDRAM. One memory chip is used for audio, video, and system level encoding and the other is used for decoding and graphics generation and control. Video Input A number of techniques, including adaptive temporal recursive noise reduction, nonlinear spatial noise reduction, spatial bandwidth control, and inverse telecine are employed to improve the quality of recordings made from real-world television signals.
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CONCLUSION
An integrated circuit has been developed for Digital Video Recorders. It provides the benefits that we've come to expect from integration-high performance, lower system cost, and a simplified design effort.

REFERENCES
S.J. Solari, Digital Video and Audio Compression, McGraw-Hill, 1997 pp. 6-7

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MPEG? In (AVI)

SDRAM Controller
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