STATE BOARD OF TECHNICAL EDUCATION AND TRAINING

BOARD OF EXAMINATIONS, CHENNAI 600 025

TIME TALE OCTOER / NOVEMER Z011

DIPLOMA IN ELECTRONICS AND COMMUNICATION ENGINEERING ( K Scheme )

Date and
Day
Time
Subjects as per the Scheme
of Examination



III SEMESTER
28.10.2011
Friday
9.30 am 12.30 pm Electric Circuits and Instrumentation

31.10.2011
Monday
9.30 am 12.30 pm Electronic Devices and Circuits

4.11.2011
Friday
9.30 am 12.30 pm C Programming and OOPs








IV SEMESTER
8.11.2011
Tuesday
9.30 am 12.30 pm Analog and Digital Electronics

9.11.2011
Wednesday
9.30 am 12.30 pm Industrial Electronics

10.11.2011
Thursday
9.30 am 12.30 pm Communication Engineering





V SEMESTER
29.10.2011
Saturday
9.30 am 12.30 pm Microprocessor and Microcontroller

1.11.2011
Tuesday
9.30 am 12.30 pm Advanced Communication Systems

Elective Theory I
(a) Digital Signal Processing

3.11.2011
Thursday
9.30 am 12.30 pm
(b) VLSI

5.11.2011
Saturday
9.30 am 12.30 pm (c) Robotics and Auto Electronics










VI SEMESTER
28.10.2011
Friday
2.15 pm 5.15 pm Computer Hardware and Networking

29.10.2011
Saturday
2.15 pm 5.15 pm Embedded Systems

Elective Theory II
(a) Digital Image Processing

31.10.2011
Monday
2.15 pm 5.15 pm
(b) Television Engineering

10.11.2011
Thursday
2.15 pm 5.15 pm (c) Bio-Medical Instrumentation








STATE BOARD OF TECHNICAL EDUCATION AND TRAINING
BOARD OF EXAMINATIONS, CHENNAI 600 025

TIME TALE OCTOER / NOVEMER Z011

DIPLOMA IN ELECTRONICS AND COMMUNICATION ENGINEERING
( J Scheme)

Date and
Day
Time
Subjects as per the Scheme
of Examination








III SEMESTER


1.11.2011
Tuesday
2.15 pm 5.15 pm C++ Programming
















V SEMESTER

Elective Theory I
(a) Surface Mount Technology

5.11.2011
Saturday
9.30 am 12.30 pm
(b) Power Electronics



















STATE BOARD OF TECHNICAL EDUCATION AND TRAINING
BOARD OF EXAMINATIONS, CHENNAI 600 025

TIME TALE OCTOER / NOVEMER Z011

DIPLOMA IN ELECTRONICS AND COMMUNICATION ENGINEERING(PART - TIME)

( K Scheme )

Date and
Day
Time
Subjects as per the Scheme
of Examination



III SEMESTER

28.10.2011
Friday
9.30 am 12.30 pm Electric Circuits and Instrumentation *

31.10.2011
Monday
9.30 am 12.30 pm Electronic Devices and Circuits *

9.11.2011
Wednesday
2.15 pm 5.15 pm Engineering Graphics **



IV SEMESTER

4.11.2011
Friday
9.30 am 12.30 pm C Programming and OOPs *

8.11.2011
Tuesday
9.30 am 12.30 pm Analog and Digital Electronics *





V SEMESTER

9.11.2011
Wednesday
9.30 am 12.30 pm Industrial Electronics *

10.11.2011
Thursday
9.30 am 12.30 pm Communication Engineering *





VI SEMESTER

29.10.2011
Saturday
9.30 am 12.30 pm Microprocessor and Microcontroller *

1.11.2011
Tuesday
9.30 am 12.30 pm Advanced Communication Systems *


Common wth ll Semester 0plomc Course n Enyneerny [ K - Scheme ]
Common wth ECE (Fulltme) [ K - Scheme ]










STATE BOARD OF TECHNICAL EDUCATION AND TRAINING
BOARD OF EXAMINATIONS, CHENNAI 600 025

TIME TALE OCTOER / NOVEMER Z011

DIPLOMA IN ELECTRONICS AND COMMUNICATION ENGINEERING(PART - TIME)

Date and
Day
Time
Subjects as per the Scheme
of Examination



[ K - Scheme ]
VII SEMESTER

28.10.2011
Friday
2.15 pm 5.15 pm Computer Hardware & Networking *

Elective Theory I
(a) Digital Signal Processing *

3.11.2011
Thursday
9.30 am 12.30 pm
(b) VLSI *

5.11.2011
Saturday
9.30 am 12.30 pm (c) Robotics and Auto Electronics *







VIII SEMESTER
29.10.2011
Saturday
2.15 pm 5.15 pm Embedded Systems *

Elective Theory II
(a) Digital Image Processing *

31.10.2011
Monday
2.15 pm 5.15 pm
(b) Television Engineering *

10.11.2011
Thursday
2.15 pm 5.15 pm (c) Bio-Medical Instrumentation *


Common wth ECE (Fulltme) [ K - Scheme ]





( J SCHEME)

IV SEMESTER

1.11.2011
Tuesday
2.15 pm 5.15 pm C++ Programming *





VII SEMESTER

Elective Theory I
(a) Surface Mount Technology *

5.11.2011
Saturday
9.30 am 12.30 pm
(b) Power Electronics *



Common wth ECE (Fulltme) [ 1 - Scheme ]