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MAX5306/MAX5307
The MAX5306/MAX5307 are 12-bit, eight channel, low- ♦ Eight Highly Integrated 12-Bit DACs in
power, voltage-output, digital-to-analog converters 16-Pin TSSOP (6.4mm x 5mm) Package
(DACs) in a space-saving 16-pin TSSOP package. The
wide +2.7V to +5.5V supply voltage range and less ♦ Ultra-Low Glitch Energy <2nV/s
than 215µA (max) supply current per DAC are excellent ♦ Low Total Supply Current:
for low-power and low-voltage applications. The low
1.7mA (max) with VREF = VDD = +5.5V
2nV/s glitch energy of the MAX5306/MAX5307 makes
them ideal for digital control of fast-response, closed- ♦ +2.7V to +5.5V Wide Single-Supply Range
loop systems. ♦ Fast 5µs Settling Time
The MAX5306 has a digital output (DOUT) that can be
used for daisy-chaining multiple devices. The MAX5307 ♦ Software-Selectable Shutdown Mode < 1µA
has a hardware reset input (CLR) which clears all regis- ♦ 15MHz 3-Wire SPI, QSPI, and MICROWIRE-
ters and DACs to zero. The MAX5306/MAX5307 have a Compatible Serial Interface
software shutdown feature that reduces the supply cur-
rent to 1µA. The MAX5306/MAX5307 feature a load ♦ Power-Up Reset to Zero Scale
DAC (LDAC) function that updates the output of all
eight DACs simultaneously.
The 3-wire SPI™, QSPI™, MICROWIRE™ and DSP-
compatible serial interface allows the input and DAC
registers to be updated independently or simultaneous-
ly with a single software command. These devices use Ordering Information
a double-buffered design to minimize the digital-noise
feedthrough from the digital inputs to the outputs. PART TEMP. RANGE PIN-PACKAGE
The MAX5306/MAX5307 operating temperature range MAX5306EUE -40°C to +85°C 16 TSSOP
is from -40°C to +85°C. MAX5307EUE -40°C to +85°C 16 TSSOP
Applications
Gain and Offset Adjustment
Pin Configuration
Power Amplifier Control TOP VIEW
Process Control I/O Boards
SCLK 1 16 CS
Portable Instrumentation Equipment
DIN 2 15 DOUT (CLR)
Control of Optical Components
LDAC 3 14 VDD
OUT2 6 11 OUT7
OUT3 7 10 OUT6
OUT4 8 9 OUT5
16-TSSOP
() FOR MAX5307 ONLY
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
ABSOLUTE MAXIMUM RATINGS
MAX5306/MAX5307
VDD to GND ............................................................. -0.3V to +6V Maximum Current Into Any Pin .........................................±50mA
All Other Pins to GND.................................-0.3V to (VDD + 0.3V) Operating Temperature Range ...........................-40°C to +85°C
Continuous Power Dissipation (TA = +70°C) Junction Temperature ......................................................+150°C
16-Pin TSSOP (derate 9.4mW/°C above +70°C) .........775mW Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +5.5V, GND = 0, VREF = VDD, CL = 200pF, RL = 2kΩ, TA = TMIN to TMAX, unless otherwise noted. Typical values are
at VDD = +5V, TA = +25°C.)
2 _______________________________________________________________________________________
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
ELECTRICAL CHARACTERISTICS (continued)
MAX5306/MAX5307
(VDD = +2.7V to +5.5V, GND = 0, VREF = VDD, CL = 200pF, RL = 2kΩ, TA = TMIN to TMAX, unless otherwise noted. Typical values are
at VDD = +5V, TA = +25°C.)
Input Leakage Current IIN All digital inputs 0 or VDD ±0.1 ±10 µA
Input Capacitance CIN 10 pF
DIGITAL OUTPUT (MAX5306)
Output Low Voltage VOL ISINK = 1mA 0.5 V
VDD -
Output High Voltage VOH ISOURCE = 1mA V
0.5
DYNAMIC PERFORMANCE
Voltage-Output Slew Rate SR Positive and negative 1 V/µs
Voltage-Output Settling Time tS 400hex to C00hex 5 µs
Code 0, all digital inputs from 0V
Digital Feedthrough 0.5 nV/s
to VDD
DAC Glitch Impulse Major carry transition 2 nV/s
_______________________________________________________________________________________ 3
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
ELECTRICAL CHARACTERISTICS (continued)
MAX5306/MAX5307
(VDD = +2.7V to +5.5V, GND = 0, VREF = VDD, CL = 200pF, RL = 2kΩ, TA = TMIN to TMAX, unless otherwise noted. Typical values are
at VDD = +5V, TA = +25°C.)
4 _______________________________________________________________________________________
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
Typical Operating Characteristics
MAX5306/MAX5307
(VDD = +5V, TA = +25°C, unless otherwise noted.)
MAX5306 toc02
MAX5306 toc03
0
0.800 0.200
0.400
0
0.200 -10
-0.100
0
-0.200 -15
-0.200 VREF SWEPT 1Vp-p
RL = 2kΩ, CL = 200pF
-0.400 -0.300
0 1000 2000 3000 4000 0 1000 2000 3000 4000 -20
DIGITAL INPUT CODE DIGITAL INPUT CODE 0 100 200 300 400 500
FREQUENCY (kHz)
MAX5306 toc05
MAX5306 toc06
VREF = +2.5V TA = -40°C
1.100 CODE = 000 1.2 VDD = +5V
0.95
1.095
SUPPLY CURRENT (mA)
1.1
1.090 0.90
1.085 1.0
TA = +25°C
0.85
1.080 0.9 VDD = +3V
1.075 0.80
0.8 TA = +85°C
1.070
0.7 0.75 VREF = +1.2V
1.065 CODE = 000
1.060 0.6 0.70
-40 -20 0 20 40 60 80 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
TEMPERATURE (°C) REFERENCE VOLTAGE (V) SUPPLY VOLTAGE (V)
TA = +25°C 4.5
SUPPLY CURRENT (mA)
CODE = C00HEX, -4
1.65 3.0 SOURCING CURRENT
TA = +85°C -5
2.5 FROM OUT_
1.60 2.0 -6
CODE = 400HEX,
1.5 SINKING CURRENT -7
1.55 1.0 INTO OUT_
VREF = 1.2V CODE = 000HEX, -8
0.5
CODE = FFFHEX SINKING CURRENT INTO OUT_
1.50 0 -9
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 5 10 15 20 25 30 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (V) ISOURCE/SINK (mA) REFERENCE VOLTAGE (V)
_______________________________________________________________________________________ 5
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
MAX5306/MAX5307
MAX5306 toc11
MAX5306 toc12
MAX5306 toc10
-1
OUT1
FULL-SCALE ERROR (LSB)
-3
O
-4 OUT2
AC-COUPLED
-5 10mV/div
OUT_
-6 1mVp-p
VREF = +4.096V
NORMALIZED TO 0.1mA CODE = 000
-7
0.1 1 10 400µs 10µs/div
LOAD CURRENT (mA)
MAX5306 toc15
OUT_ CS SCLK
1V/div 5V/div 2V/div
O
OUT_ OUT_
AC-COUPLED AC-COUPLED
5mV/div 5mV/div
VREF = +2.5V, RL = 2kΩ, CL = 200pF VREF = +2.5V, RL = 2kΩ, CL = 200pF VREF = +2.5V, RL = 2kΩ, CL = 200pF
SWITCHING FROM CODE 000HEX TO FFFHEX CS = +5V, DIN = 0
DAC CODE SET to 800HEX
MAX5306 toc17
OUT_ OUT_
500mV/div 500mV/div
O
O
1µs/div 1µs/div
6 _______________________________________________________________________________________
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
Pin Description
MAX5306/MAX5307
PIN NAME FUNCTION
1 SCLK Serial Clock Input. Serial data is loaded on the falling edge of SCLK.
2 DIN Serial Data Input
Load DAC. LDAC is an asynchronous active-low input that updates the DAC outputs
3 LDAC
simultaneously. If LDAC is driven low, the DAC registers are transparent.
4 REF Reference Voltage Input
5–12 OUT_ Analog Output Signal
13 GND Ground
14 VDD Power Supply. Bypass VDD to GND with a 0.1µF capacitor.
DOUT Data Output (MAX5306). DOUT is updated on the falling edge of SCLK.
15 Asynchronous Clear DAC (MAX5307). Active-low input to clear all DACs and registers. Resets all
CLR
outputs to zero.
16 CS Chip-Select Input (active-low)
_______________________________________________________________________________________ 7
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
Table 1. Serial Interface Configuration
MAX5306/MAX5307
X = Don’t Care
8 _______________________________________________________________________________________
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
MAX5306/MAX5307
VDD
INPUT OUT1
MAX5306 DAC DAC
REGISTER REGISTER 1
MAX5307 1
CS
INPUT DAC OUT2
DAC
REGISTER REGISTER 2
SCLK 2
SERIAL TO PARALLEL
SHIFT REGISTER
DIN
INPUT DAC OUT3
DAC
REGISTER REGISTER 3
3
LDAC
GND REF
sequence is initiated on a falling edge of CS. If CS the serial interface, the input register(s) can be loaded
goes high prior to completing 16 cycles of SCLK, the without affecting the DAC register(s), the DAC regis-
input data is discarded. To initiate a new data transfer, ter(s) can be loaded directly, or all eight registers can
drive CS low again. The serial clock (SCLK) can be be updated simultaneously from the input registers.
either high or low between CS write pulses. Figure 4
shows the timing diagram for the complete 3-wire serial Shutdown Modes
interface transmission. The MAX5306/MAX5307 include three software-con-
trolled shutdown modes that reduce the supply current
The MAX5306/MAX5307 digital inputs are double- to less than 1µA. In two of the three shutdown modes
buffered. Depending on the command issued through (shutdown 2 and 3) the outputs are independently con-
_______________________________________________________________________________________ 9
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
MAX5306/MAX5307
X = Don’t Care
10 ______________________________________________________________________________________
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
MAX5306/MAX5307
+5V
SCLK SK
DOUT* MISO* SS
DIN SO
CS I/O
______________________________________________________________________________________ 11
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
Power-Supply Considerations Bypass VDD to GND with a 4.7µF capacitor in parallel
MAX5306/MAX5307
On power-up, all input and DAC registers are cleared with a 0.1µF capacitor. Use short lead lengths and
and DOUT is in low. place the bypass capacitors as close to the supply
pins as possible.
tCL tCH
SCLK X 1 2 3 4 16 X
tDH
tDS
tSDL
tSDH
tCSS
tCSPWH tCSH
CS
tCLRPWL
CLR
tLDACPWL
LDAC
tS
±0.5LSB
VOUT_
12 ______________________________________________________________________________________
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
MAX5306/MAX5307
SCLK SCLK SCLK SCLK
CS CS CS CS TO OTHER
SERIAL DEVICES
DIN
SCLK
CS1
CS2 TO OTHER
SERIAL DEVICES
CS3
CS CS CS
Chip Information
VREF TRANSISTOR COUNT: 19,000
R1 R2 PROCESS TECHNOLOGY: BiCMOS
REF
+5V
MAX5306
MAX5307
VOUT
DAC
OUT
-5V
R2 = R1
______________________________________________________________________________________ 13
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
Simplified Block Diagram
MAX5306/MAX5307
VDD
CS
INPUT REGISTERS DAC REGISTERS 12-BIT DAC OUTPUT
SCLK BUFFER
OUT1
DIN
SHIFT
(MAX5307) CLR REGISTER
LDAC
MAX5306/MAX5307
GND
14 ______________________________________________________________________________________
Low-Power, Low-Glitch, Octal 12-Bit Voltage-
Output DACs with Serial Interface
Package Information
MAX5306/MAX5307
TSSOP,NO PADS.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 15
© 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.