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Abstract—The integration of the fast and efficient silicon p-i-n 850 nm are widely available. At present, high-speed low-cost
photodetectors is presented. The suggested advanced p-i-n design silicon optical receivers and on-chip laser sources implicate new
speeds up the detectors, avoiding slow carrier diffusion: the p+ challenges [2].
anode is arranged in a thick n− low-doped intrinsic region placed
inside an n+ -doped region. Two p-i-n detector concepts are com- The efforts to implement systems with a small amount of op-
pared: a plain p-i-n photodiode and a structured p-i-n fingerdiode tically interconnected chips or actually of integrating the whole
that is optimized for shorter wavelengths. Due to this setup and a system-on-a-chip (SOC) manifest in many benefits: avoiding
thick intrinsic region, a responsivity of R = 0.25 A/W (0.42 A/W) electrical bond wires and pads reduces the risk of peaking and
{0.27 A/W} at a wavelength of λ = 410 nm (660 nm) {850 nm} bandwidth limitation due to additional inductance and capaci-
for the p-i-n fingerdiode, a bandwidth up to f3 dB = 3GHz and a
dark current of Idark = 0.36 pA at Vp- i- n = 17 V for the p-i-n tance, respectively. Furthermore, reliability is improved, pack-
photodiode could be reached. As a system-on-chip (SOC), BiC- aging is easier, and devices become cheaper as a whole.
MOS circuitry is combined with the integrated photodetector to A promising attempt is to realize the optical receiver on a
an optoelectronic integrated circuit (OEIC) as shown on an exem- monolithic integrated chip containing the photodetector and the
plary application of a 6-Gb/s monolithic optical receiver. The chips subsequent electrical circuitry, e.g., a transimpedance amplifier
are realized in a modified 0.5 µm BiCMOS process.
(TIA). Besides the advantages mentioned earlier, this reduces
Index Terms—Integrated optoelectronics, optoelectronic in- manufacturing costs and reverts to well-developed design tech-
tegrated circuits (OEICs), photodetector, photodiode, p-i-n niques, but obliges developers to deal with the compromising
technology.
properties of a certain substrate material. Physical limits and
parasitic effects involve tradeoffs, e.g., in our case, to decide
I. INTRODUCTION between a large detector area for adequate light coupling or a
small one to reduce parasitic capacitances for a high system
OWADAYS, modern communication networks with en-
N hanced data rates are inconceivable without optical com-
ponents. Modulated coherent sources and optoelectronic re-
bandwidth.
However, hybrid techniques like germanium on silicon
[3]–[5] are accompanied by a better performance of the
ceivers in transmitters are necessary to handle the data stream photodetector but these complicate the integration together
in popular fiber systems at 1.3 and 1.55 µm. Many applica- with the electrical circuits, not considering increasing costs.
tions in consumer electronics have sprung up in the last few Though the required BiCMOS process is modified in terms
decades like CD or DVD equipment and have gained impor- of the epitaxial layer, the full BiCMOS analog and digital
tance to the optoelectronic integrated circuits (OEICs). Today’s functionality is preserved.
optical pickups are working at 780 nm (CD-ROM) or at 650 nm
(DVD), but future systems will rely on even shorter wavelengths
II. PHYSICAL CONDITIONS AND STATE OF THE ART
(Blu-Ray, 410 nm) [1] to increase the storage capacity up to 30
GB and more on the physical media. Light in the visible range The design of a photodetector that is both fast and efficient
is applied to plastic optical fiber (POF) as well as to networks requires a special setup of the diode. At first, the photogener-
in the automotive sector, chip interconnects or on-chip intra- ated charge carrier motion should be dominated by drift. Light
connects. For high data rates in optical interconnects, vertical- penetrating into regions without electric field causes slow dif-
cavity surface-emitting lasers (VCSELs) having wavelengths at fusion [6]. This can be avoided by integration of a low-doped
intrinsic region, wherein the main part of electron-hole pairs is
Manuscript received October 31, 2005; revised September 18, 2006. The accelerated by the field strength.
development of the p-i-n technology was supported in part by the European The fundamental mechanism of speed enhancement by charge
Commission under Project INSPIRED. The work of A. Nemecek was supported carrier separation in the electrical field is described for the p-i-n
by the Austrian Bundesministerium fuer Verkehr, Innovation und Technologie
(BMVIT) via FFG under Project 809393/7845. The work of G. Zach was sup- structure in Fig. 1(a). Generated electrons are directed to the
ported by FWF under Project P17801-N07. n-doped cathode, holes are lead to the p+ anode. Due to the
A. Nemecek, G. Zach, K. Oberhauser, and H. Zimmermann are with the drift force, the bandwidth of the presented p-i-n detectors was
Institute of Electrical Measurements and Circuit Design, Vienna University of
Technology, 1040 Vienna, Austria (e-mail: alexander.nemecek@tuwien.ac.at; increased dramatically compared to a common p-n junction pho-
gerald.zach@tuwien.ac.at; klaus.oberhauser@tuwien.ac.at; horst.zimmermann todetector. If we managed to generate all charge carriers in the
@ieee.org). drift region, presence of diffusion in the resulting photocurrent
R. Swoboda is with A3PICs Electronics Development GmbH, 1040 Vienna,
Austria (e-mail: swoboda@a3pics.com). would be completely eliminated. This means that the intrinsic
Digital Object Identifier 10.1109/JSTQE.2006.885145 region has to possess a minimum width for sufficient absorption
Iphoto
R= . (2)
Popt
Fig. 3. Principle cross section of OEIC. (a) p-i-n photodiode. (b) Circuitry (n-p-n transistor). (c) p-i-n fingerdiode.
Fig. 5. Measured responsivity of the realized p-i-n diodes versus wavelength. Fig. 6. Measured dark current of the realized p-i-n diodes versus reverse bias
voltage.
Fig. 11. Bit error rate versus average optical input power for 1, 1.25, 2, 2.5,
3, 4, 5, and 6 Gb/s.
Fig. 9. Chip photograph of (a) octagonal p-i-n photodiode and (b) rectangular
p-i-n fingerdiode.
V. APPLICATION
For the p-i-n fingerdiode, f3 dB = 2.0 GHz for λ = 410 nm, As an example, an OEIC receiver containing the integrated
f3 dB = 2.2 GHz for 660 nm, and f3 dB = 2.2GHz for 850 nm p-i-n photodiode and a TIA, as shown in [19], was realized in
at Vp- i- n = 17 V were measured as shown in Fig. 8. The cutoff the modified BiCMOS process. The high data rate of 6 Gb/s
frequency at 660 nm is higher compared to 850 nm because at a sensitivity of -21.0 dBm (-18.2 dBm) at a wavelength of
of slow drifting holes from deeper regions to the anode and an 660 nm (850 nm) can be achieved thanks to the high bandwidth
increasing diffusion current contribution due to photogeneration of the presented p-i-n photodiode having a diameter of 50 µm
in the highly doped buried cathode. and a parasitic capacitance of Cp- i- n < 60 fF. Furthermore, a
These measurements were done with a 3-GHz HP network quasi-differential circuit concept containing not only the TIA,
analyzer type 8753 E calibrated with a 12-GHz photoreceiver. but also a dummy TIA, is used to ensure immunity to substrate
All plots are shown for Vp- i- n = 3, 5, 12, and 17 V in ascending noise in analog-digital ICs. A control feedback loop includ-
order corresponding to the cutoff frequency with a shifted zero ing a correction circuit compensates for the offset and back-
level according to different wavelengths for better visualization ground light (Fig. 10). An overview of the achieved bit error
and a marked corresponding -3-dB reference line. rate versus average optical input power for different data rates
Fig. 9(a) shows the chip photograph of the octagonal p-i- is shown in Fig. 11. The chip occupied a total area of 870 µm
n photodiode with a photosensitive diameter of 100 µm, the ×720 µm. A comparison of results of optical data receivers is
inner contacts of the anode, and the surrounding cathode. The shown in Table I. The presented p-i-n BiCMOS photodetectors
rectangular p-i-n fingerdiode is shown in Fig. 9(b), containing plus optimized circuit architecture are superior to silicon OE-
again the surrounding cathode and the p+ -doped finger anodes ICs reported in the literature with respect to the bandwidth and
plus contacts inside the light sensitive area. sensitivity.
1474 IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 12, NO. 6, NOVEMBER/DECEMBER 2006
TABLE I REFERENCES
COMPARISON OF SOME PUBLISHED RECEIVERS IN SILICON TECHNOLOGY
(*MODIFIED TECHNOLOGY)
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ACKNOWLEDGMENT in standard CMOS for 850-nm optical communication,” IEEE J. Solid-
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The authors would like to thank G. Langguth of Infineon [22] R. Swoboda, J. Knorr, and H. Zimmermann, “A 5 Gbps OEIC with
Technologies, Munich, Germany, and his team for the support voltage-up-converter,” IEEE J. Solid-State Circuits, vol. 40, no. 7,
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NEMECEK et al.: INTEGRATED BiCMOS p-i-n PHOTODETECTORS WITH HIGH BANDWIDTH AND HIGH RESPONSIVITY 1475
Alexander Nemecek was born in Vienna, Austria, Klaus Oberhauser (S’05) received the Master’s de-
in 1975. He received the Master’s degree (with dis- gree (with distinction) in electrical engineering au-
tinction) in electrical engineering automation control tomation control from Vienna Technical University,
from Vienna Technical University, Vienna, Austria, Vienna, Austria, in 2003.
in 2003. Since April 2003, he has been a Scientific Re-
Currently, he is a Scientific Research Assistant search Assistant on circuit design of optoelectronic
on circuit design of optoelectronic integrated circuits integrated circuits (OEICs) at the Institute of Elec-
(OEICs) at the Institute of Electrical Measurement trical Measurement and Circuit Design, Vienna Uni-
and Circuit Design, Vienna University of Technol- versity of Technology, Vienna. His current research
ogy, Vienna. His current research interests include au- interests include circuit design, automation control,
tomation control, circuit design, computer-supported photonics, and semiconductor physics.
numerical model analysis, and photonics.