DAVIET EXPERIMMENT NO.: - 1(A) Aim: - Verification of the truth tables of TTL gates, e.g.

, 7400, 7402, 7404, 7408, 7432,

7486.

Apparatus: - A digital trainer kit, 7400, 7402, 7404, 7408, 7432, 7486 ICs &
connecting wires.

Theory: - These all ICs are 14 pin ICs. Pin 7 is for ground & pin 14 is for +VCC.
(a) 7400 (NAND Gates): This IC is used to verify NAND gate. Here the input is at pin 1 & pin 2 & output is at pin 3. IC wills working if both I/Ps are low or either of I/P is low. It will not work if both I/Ps are high. Y = A.B (b) 7402 (NORGates): - This IC is used to verify NOR gate. Here I/P are at pin 2 & pin 3 & O/P is at pin 1. IC will work both I/Ps are low. If either of I/P is high or when both I/P are high IC will not work. Y=A+B (c) 7404 NOTGates): - This IC is used to verify NOT gate. Here I/P is at pin 1 Y=A 7408 (ANDGates): - This IC is used to verify AND gate. Here I/P are at pin Y = A.B This IC is used to verify OR gates. Here I/P are at pin 1 & O/P is at pin 2. If I/P is low then O/P is high & vice-versa. (d)

1 & pin 2 & corresponding O/P is at pin 3. If either of I/P is low, then O/P is high. (e) 7432 (OR Gates): -

& pi 2 & corresponding O/P is at pin 3. If either of I/P is high, then O/P is high. (f) Y=A+B 7486 (X-OR Gates): -This IC is used to verify X-OR gate. Here I/P are at pin Y=A + B Y = AB + AB

1 & 2 & corresponding O/P is at pin 3. O/P is low if both I/Ps are same else high.

Diagrams of Different ICs: -

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I/Ps O/Ps A NOT 0 1 1 0

Truth Tables for Different Gates: I/Ps O/Ps A B NAND NOR AND OR X-OR 0 0 1 1 0 0 0 0 1 1 0 0 1 1 1 0 1 0 0 1 1 1 1 0 0 1 1 0

Procedure: 1) 2) 3) 4) Place the IC on IC Trainer Kit. Connect the inputs to the input switches provided in the IC trainer kit. Connect the outputs to the switches of output LEDs. Connect Vcc & ground supply to the respective pins of IC trainer kit.

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5) Precaution: 1) Apply GND at pin no-7 &Vcc pin no -14 of all the IC,s 2) Insert and remove the IC;s with care
3) Connection should be neat &clean

Apply various combinations of inputs according to the truth table & observe condition of LEDs.

4) Handle the trainer kit with care 5) Remove the ic with the help of Tweezer

Result:
Truth table of all the Logic gates have been verfied

EXPERIMENT NO.: - 2(A)

Digital Electronics

DAVIET Aim: - Verification of the truth table of Multiplexer IC74150 Apparatus: - Digital trainer kit, IC 74150(16:1 MUX), Connecting leads. Theory: A multiplexer or data selector is a logic circuit that accepts several data I/Ps & allows only one of them at a time to get through the O/P. The routing of desired data I/P to the O/P is controlled by select I/P.IC74150 is multiplexer having four select lines A, B, C & D. Other I/Ps of MUX are stroke & ta I/Ps (D0 D15). Various Combinations of 0 & 1 on select lines A, B, C & D give the corresponding O/P.The O/P is taken at pin no. 10 i.e. Y. The O/P obtained is due complement of the I/P i.e. if data I/P D0 is 1 then O/P at Y will be D0 i.e. 0 I/P = O/P D0 = D0 The truth table shows this different combinations of 1 i.e. HIGH (H) & 0 i.e. LOW (L).

Diagram: -

Procedure: -

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1) 2) 3) 4) 5) Place the IC on IC Trainer Kit. Connect the inputs to the input switches provided in the IC trainer kit. Connect the outputs to the switches of output LEDs. Connect Vcc & ground supply to the respective pins of IC trainer kit. Apply various combinations of inputs according to the truth table & observe condition of LEDs.

TruthTable: Stroke L L L L L L L L L L L L L L L L A L L L L L L L L H H H H H H H H I/Ps Select Lines B C L L L L L H L H H L H L H H H H L L L L L H L H H L H L H H H H Data I/P D L H L H L H L H L H L H L H L H D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 O/P Y D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15

Precaution: !)Insert and remove the IC;s with care 2)Connection should be neat &clean 3)Handle the trainer kit with care 4)Remove the ic with the help of Tweezer

Result: Verification of the truth table of Multiplexer IC74150 EXPERIMENT NO.: - 2(B) Aim: - Verification of the truth table of the De-Multiplexer 74154.

Digital Electronics

DAVIET Apparatus: - DEMUX-74154, digital trainer kit & connecting leads. Theory: De-MUX transforms the reverse operation to that of a multiplier. It accepts a single I/P & distributes it over several O/Ps. It is also a type of combinational logic circuits. A basic De-MUX transforms the given data taken from a single source to several sources. The function is realized by using decoders & the select I/P code, determines to which O/P data will be transmitted. In short, a digital multiplexer is a device in which logic data from a single I/P line are sequentially switched into several O/P lines.

Diagram: -

IC7415 4

Procedure: 1) 2) Place the IC on IC Trainer Kit. Connect the inputs to the input switches provided in the IC trainer kit.

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3) 4) 5) Connect the outputs to the switches of output LEDs. Connect Vcc & ground supply to the respective pins of IC trainer kit. Apply various combinations of inputs according to the truth table & observe condition of LEDs.

Truth Table: S Da A B C D Y Y Y Y Y Y Y Y Y Y Y ta 0 1 2 3 4 5 6 7 8 9 10 L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H L H H H H H Y
11

Y
12

Y
13

Y Y
14 1 5

H H H H H H H H H H H L H H H H

H H H H H H H H H H H H L H H H

H H H H H H H H H H H H H L H H

H H H H H H H H H H H H H H L H

H H H H H H H H H H H H H H H L

Precaution: !)Insert and remove the IC;s with care 2)Connection should be neat &clean 3)Handle the trainer kit with care 4)Remove the ic with the help of Tweez

Result: Verification of the truth table of Multiplexer IC74154

EXPERIMENT NO. 3(A)

Aim: -To verify a 4 bit binary adder using IC-7483. Apparatus: Digital trainer kit, connecting leads, IC-7483

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Theory: The half adder has 2 I/Ps A & B & produces O/P of SUM, So or CARRY C1. Full Adder has three I/Ps & can produces O/P of SUM or CARRY or both SUM & CARRY. To illustrate the working of binary adder let us add decimal no. 24. The binary equivalent of 13 is 1101 & of 11 is 1011. The equivalent binary addition is: 1101 1011 1000 SUM CARRY The half adder adds 1 & 1 & gives a sum 0 & carry of 1. This 1 goes to first full adder where 1, 1 & 0 are added to give sum of 0 & carry of 1 which goes to the next full adder & so on. IN IC-7483, there are 14 pins out of which there are four I/Ps A0, A1, A2, A3 are of A four bit B0, B1, B2 & B3 are of 4-bit binary I/P B. There are also 2 carry I/Ps & four O/P pins.

Procedure: 1) 2) 3) 4) Place the IC on IC Trainer Kit. Connect the inputs to the input switches provided in the IC trainer kit. Connect the outputs to the switches of output LEDs. Connect Vcc & ground supply to the respective pins of IC trainer kit.

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5) Apply various combinations of inputs according to the truth table & observe condition of LEDs.

Observations: I/Ps C0 0 1 0 O/Ps I3 1 1 1

A4 0 0 1

A3 0 0 0

A2 1 1 1

A1 0 1 0

B4 1 1 0

B3 0 1 0

B2 0 1 0

B1 1 0 1

C1 1 1 0

I4 0 0 0

I2 1 1 1

I1 1 0 1

Precaution: 1)Insert and remove the IC;s with care 2)Connection should be neat &clean 3)Handle the trainer kit with care 4)Remove the ic with the help of Tweezer

Result: To construct a 4 bit binary adder using IC-7483.

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EXPERIMENT NO. 3(B) Aim-To realize half-adder using X-OR & AND gates. Apparatus: -7486 & 7408 ICs, Digital Trainer Kit, Connecting Wires.

Theory: - The half-adder is a circuit which is used to add two bits. The circuit accepts
two binary digits as its I/P & two binary digits as its O/P, sum bit & carry bit. 0 + 0 = 0; 0 + 1 = 1; 1 + 0 = 1; 1 + 1 = 0 with carry 1 The sum can be implements using X-OR & carry can be implemented using AND gate. The Boolean expression for sum is S = AB + AB = A + B & for carry is C = A.B The circuit diagram is obtained using these equations.

Procedure: -

1) 2)

Verify the gates. Make the connections as per the circuit diagram.

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3) 4) Switch on Vcc and apply various combinations of input Note down the output reading of half adder and the carry bit for different combinations of inputs.

according to the truth table.

Truth Table for Half Adder:

A 0 0 1 1

I/Ps B 0 1 0 1 S 0 1 1 0

O/Ps C 0 0 0 1

Precaution: 1)Insert and remove the IC;s with care 2)Connection should be neat &clean 3)Handle the trainer kit with care 4)Remove the ic with the help of Tweezer

Result:. To realize half-adder using X-OR & AND gates

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EXPERIMENT NO. 3(C) Aim:-To design & verify truth table of full adder. Apparatus: Diagram: IC-7486, IC-7400, Digital Trainer Kit.

Theory: -A full adder is an arithmetic circuit that has three I/P A, B & C. The two O/Ps
are sum S & O/P carry Coi which is produced & added to next stage. A circuit that produces correct sum & carry is represented by following equations: S = ABC + ABC + ABC + ABC = (AB + AB)C + (AB + AB)C = (A + B)C + (A + B)C S = (A + B) + C & Coi = AB + BC + AC = AC(B + B) +BC (A + A) + A.0 = ABC + ABC + ABC + AB = AB(C + 1) + (AB + AB)C Coi = A.B + (A + B)C

Digital Electronics

DAVIET Truth Table of Full-Adder: A 0 0 0 0 1 1 1 1 Precaution: 1)Insert and remove the IC;s with care 2)Connection should be neat &clean 3)Handle the trainer kit with care 4)Remove the ic with the help of Tweezer B 0 0 1 1 0 0 1 1 Cin 0 1 0 1 0 1 0 1 S 0 1 1 0 1 0 0 1 Co 0 0 0 1 0 1 1 1

Result:. To realize half-adder using X-OR & AND gates

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EXPERIMENT NO. 4 Aim: - To verify the Function table of 4 bit ALU( IC 74181. Apparatus Required: -IC 74181, etc. Pin detail & Function table:-

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Precaution: 1)Insert and remove the IC;s with care 2)Connection should be neat &clean 3)Handle the trainer kit with care 4)Remove the ic with the help of Tweezer

Result:. To verify the Function table of 4 bit ALU IC 74181.

EXPERIMMENT NO.: 5

Digital Electronics

DAVIET Aim: - Design fabrication and testing of differentiator and integrator circuits using OP AMP Apparatus: - Dual-trace oscilloscope, Audio-function generator, 15V power supply,
351 op-amp, 100-k resistor, 10k resistors, 0.1-f capacitor, 0.01-f capacitor, 0.05-f capacitor, 1.5k resistor, 82k resistors, 0.005- f capacitor. Diagram: Figure 1

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Figure 2

Procedure: For Integrator: 1) Connect the circuit as shown in figure 1 (the pin no. indicated in this figure refer to

the 8 pin mini DIP).

2) Set the function generator for a square wave output, and adjust its amplitude to 1 v

pp. Set the frequency of the square wave at 1 kHz initially.

3) Connect one channel of the scope at the input and the other at the output terminal of

the op-amp and slowly adjust the input frequency until the output is as good (linear) a triangle wave as possible. Measure the frequency of the input wave form and record it in Table 1. Also measure the amplitude and frequency of the output waveform and record them in Table 1.
4) Repeat step 3 for C F=0.05 f and 0.1 f, one at a time. 5) Set the function generator to for a sine wave output. Adjust the amplitude of the sine

wave to 1V pp, and set the frequency at 1 kHz initially. Remove the 0.1 f capacitor and reconnected the 0.01 f capacitor in its place.

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6) Connect the one channel of the scope at the output terminal of the op-amp. Adjust

the frequency of the input until output is a negative going cosine wave. Make sure that the scope is triggered properly .Measure the frequency of input waveform and record it in table 1. Also, measure the amplitude and frequency of the output waveform and record them in Table 1. For Differentiator: 1) Connect the circuit as shown in figure 2, expect do not apply the signal from the function generator yet. 2) Set the function generator for a square wave output, and adjust its amplitude to 1 V pp. Also set the frequency of the square wave at 1khz.apply the square wave output of the function generator to the circuit of figure 2 as Vin. 3. Connect one channel of the oscilloscope at the input and the other at the output terminal of the op-amp. The output should be a spike waveform. If not, you may adjust the input frequency to obtain a good spike output. Measure the frequency of the input waveform and record it in table. Also, measure the amplitude and frequency of the output waveform and record them in table. 4. Repeat step 3 for C1=0.01 f and 0.05 f, one at a time. 5. Next, set the function generator for a sine wave output. Adjust the amplitude of the sine wave to 1V pp, and set the frequency at 1khz.Remove the 0.05 f capacitor and reconnect the 0.1- f capacitor in its place. 6. Connect one channel of the scope at the input and the other at output terminal of the op-amp. The output should be a positive-going cosine wave. If not, adjust the frequency of the input until it is. Measure the frequency of the input waveform and record in it table 2. Also, measure the amplitude and the frequency of the output waveform and record them in table 2.

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Data Table: -

Table 1 (Integrator)

R1 ( K ) 10 10 10 10

CF Input waveform (F) Type Amplitude 0.01 0.05 0.1 0.01 Square Square Square Sine 1 v pp 1 v pp 1 v pp 1 v pp

Output waveform Frequency Type Amplitude ` Frequency

Table 2 (Differentiator) CF (F) 0.1 0.01 0.05 0.1 Input waveform Type Square Square Square Sine Amplitude 1 v pp 1 v pp 1 v pp 1 v pp Frequency Output waveform Type Amplitude ` Frequency

Precaution: 1)Insert and remove the IC;s with care 2)Connection should be neat &clean 3)Handle the trainer kit with care 4)Remove the ic with the help of Tweezer

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DAVIET Result : testing of differentiator and integrator circuits using OP

EXPERIMMENT NO.: - 6

Aim: - Design fabrication and testing of differentiator and integrator circuits using OP AMP Apparatus: - Dual-trace oscilloscope, Audio-signal generator, 15V power supply, Digital
multi-meter, 741 or 351 op-amp, 1N914 or equivalent small signal diode, 10k resistor, 10k potentiometer, 4.7-k resistor, 0.1- f capacitor.

Procedure: 1) Connect the positive clipper circuit as shown in fig. 1(a). Use a digital multi-meter to set the reference voltage Vref = 1V. 2) Apply 2V pp sine wave at 1 kHz as an input and measure the input and output waveforms using the oscilloscope. 3) Draw the measured waveform in figure 1(b). 4) Reverse the diode connections, and again measure the input and output wave forms. Draw these waveforms in figure 1(c). 5) Next, disconnect the 10-k potentiometer from the +15 V supply, and reconnect it to the -15 V supply. Using the digital multi-meter, set Vref=-1V. 6) Measure the input and output waveforms with the scope and draw these in figure 1(d).

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7) Again, reverse the diode connections so that it will be in its original position. Measure the input and output waveforms with the scope, and draw the measured waveforms in figure 1(e). 8) Now, connect the clamper circuit of figure 2(a).Set Verf = 1V, and sine wave input of 2 V pp at 100 Hz. 9) Measure the input and output waveforms using the scope and draw these in figure : -2(b) 10) Next, connect the 10-k potentiometer across -15V instead of +15 V supply

voltage. Also, reverse the diode connections. Set Verf =-1V and apply VIN = 2 V pp sine wave at 100 Hz. 11) Measure the input and output waveforms using the scope and draw the

waveforms i

Diagrams:-

Figure 1: -

Positive Clipper Circuit. Input & output waveforms for (b) step 3, (c)

step 4, (d) step 6, and (e) step 7.

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Figure 2: 11

(a) Clamper circuit. Input & output waveforms for (b) step 9, (c) step

Precaution: 1) Insert and remove the IC;s with care 2) Connection should be neat &clean 3) Handle the trainer kit with care 4) Remove the ic with the help of Tweezer

Result: testing of differentiator and integrator circuits using OP EXPERIMMENT NO.: - 7 Aim: - Design fabrication and testing of free running multi vibrator at 1 KHz and1 Hz using 555 with 50% duty cycle. Verify the timing from theoretical calculations. 8. Design fabricates and tests a switch depouncer using 7400 Apparatus: - Dual trace oscilloscope, Audio square wave generator, + 5 V power
supply, NE555, 1N914 or equivalent, 2.5-M potentiometer, 100-k resistor, 20-k resistor, 12-k resistor, 10-k resistor, 10-k potentiometer, 6.8k resistor, 4.7-k resistor, two 3.3 K resistor, 2.2k resistor, 1-k resistor, 10.0- f capacitor, 1.0- f capacitor.

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Procedure: 1. Connect the monostable multivibrator as shown in figure. 2. Set the square-wave generator for 5v pp output at 50 Hz. Connect channels 1 and 2 of the scope to the input and output terminals, respectively of the monostable multivibrator. Make sure that switch SW 1 is in positive A ( pin 4 connected +5 v ) 3. Measure the pulse width of the output waveform and enter the measured value in table.
4. Momentarily switch off the generator and power supply, and replace the 12-k

resistor.

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5. Turn the generator and power supply back on and repeat step 3.
6. Complete table for remaining values of RA. 7. With Ra = 2.2 K , C = 1 f , and dual trace scope connected to the input and output

terminals of the multivibrator , place switch SW 1 in position . Observe the output waveform .Enter the amplitude and frequency of the output waveform in table. 8. Return switch SW 1 to the original position A connect the series combination of the 10 K resistor and the 2.5M potentiometer between the control voltage pin 5 and ground (across C 2 ) vary the 2.5 -M potentiometer and simultaneously observe the output wave form . In the table, enter the amplitude and pulse width of the output waveform for the minimum and maximum values of the potentiometer. Remove the 10k resistor and 2.5 M potentiometer connected across C2. 9. Remove the wave shaping components C1, R1 and D1, from the circuit of the figure and apply the 50 Hz square wave directly to the trigger pin 2 using the scope, simultaneously observe the input and output waveforms. Enter the amplitude and time period of input waveform in table. Also, enter the amplitude and time period of the input waveform in table also; enter the amplitude pulse width of the output waveform in table. 10. Connect the astable multivibrator of given figure 2. 11. Connect the scope to the output terminal and measure the frequency and duty cycle of the output waveform. Enter the measure the value in 17 (a). 12. Momentarily switch off the power supply and replace Rb of 1k by 10K. Turn the power supply back on and repeat step 11. 13. Complete the table for the remaining values of Rb. 14. Switch off the power supply again, and replace the 3.3-k value of Ra by a series combination of a 1K resistor and a 10K potentiometer. Also, connect a 1N914 diode across Rb such that the anode of the diode is connected to junction of R b and Ra and the cathode to the junction two of Rb and a C. Connect the scope to the

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output terminal of the astable multivibrator and a turn on the power supply . Adjust the 10K potentiometer until the output is square wave. Measure the frequency and the duty cycle of the output wave form. Enter the total value Ra in table 17.2(b).

Data Table: Table 17.1(a) C (F) RA (K) Measured Calculated ( tp= 1.1 RA C) 1 1 1 1 12 6.8 4.7 2.2 Output pulse width (s)

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Table 17.1(b) Output waveform Amplitude (V) Frequency (Hz)

DATA Table 17.1(c) 2.5 M potentiometer setting Output waveform Amplitude (V) Pulse-width (ms)

Minimum ( o )

Maximum (2.5 M)

Table 17.1(d)

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Input waveform Amplitude (V) Time Period (ms) Output waveform Amplitude Pulse-width (ms)

Table 17.2(b) C (F) 0.01 RA (K) RB (K) 3.3 RB (K) % Duty Cycle RA % Duty Cycle Measured Calculated (K) =100tp/T 100 RB RA + 2RB Output frequency Output Measured Calculated frequency f=1.45 (RA + 2RB )C

C (F)

0.01 0.01 0.01 0.01

3.3 3.3 3.3 3.3

1 10 100 3.3

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Precaution: 1)Insert and remove the IC;s with care 2)Connection should be neat &clean 3)Handle the trainer kit with care 4)Remove the ic with the help of Tweezer

Result : testing of free running multi vibrator at 1

EXPERIMMENT NO.: - 9(A) Aim: - Design and test of an S-R flip-flop using NOR/NAND gates Apparatus: - IC-7400, connecting leads, digital trainers board, power supply.

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Theory: A flip flop is basically a bi-stable multi-vibrator having two stages (1 or 0).

The flip flop can be made to change state from one logic level to another. With an appropriate toggle command, one of simplest storage device of digital information i.e. SET RESEST (SR) flip flop & can be constructed using NAND gates. The O/P of flip flop is low or high (0 or 1) & remains the same. If we want to change the O/P state of flip flop, weve to trigger circuit by I/P called trigger. From the circuit diagram of SR flip flop, when clock is high, operation of SR flip flop is as follows:1) If R = 0 & S = 0, O/P of gate N3 & N4 will be 1. The O/P of gates N1 & N2 depends upon the value of Qn. We also say that O/P is latched or locked to its least value. 2) If R = 0 & S = 1, this will happen when a trigger is applied to S I/P. The O/P of N 3 will be 0 & N4 will be 1. Since one of I/P of N1 is 0, its O/P will be certainly high. Consequently, both I/Ps of N2 will be 1 giving low O/P. Hence this state is referred to a SET state. 3) If R = 1 & S = 0, this will happen when trigger is applied to R. The O/P of N 3 & N4 is 1 or 0. I/P of N2 is 0. O/P is high. Hence this state is referred as RESET state. 4) If R = 1 & S = 1, will happen when a trigger is applied to both at same time & both O/P will become 1 which is not allowed & therefore this condition is prohibited.

Diagram: -

Procedure: 1) Connections are made as per circuit diagram.

2) The truth table is verified for various combinations of inputs.

Digital Electronics

DAVIET Truth Table: I/Ps Clk S 0 0 1 1 R 0 1 0 1 Qn No Change 0 1 Invalid Case 1 0 O/Ps Qn

Precaution: 1)Insert and remove the IC;s with care 2)Connection should be neat &clean 3)Handle the trainer kit with care 4)Remove the ic with the help of Tweezer

Result : test of an S-R flip-flop using NOR/NAND gates

EXPERIMMENT NO.: -9(B) Aim: - Verify the truth table of a J-K flip-flop (7476) Apparatus: - Connecting leads, digital trainer kit, IC-7476 (Dual J-K Flip flop)

Digital Electronics

DAVIET Theory:JK flip flop differs from SR edge triggered flip flop in that Q-I/Ps is

connected to I/P of gate G1 as shown. The flip flops have 2 more inputs which are asynchronous. They are labeled preset & reset direct. An active level on the clear I/P will reset it. To prevent any possibility of a "race" condition occurring when both the S and R inputs are at logic 1 when the CLK input falls from logic 1 to logic 0, we must somehow prevent one of those inputs from having an effect on the master latch in the circuit. At the same time, we still want the flip-flop to be able to change state on each falling edge of the CLK input, if the input logic signals call for this. Therefore, the S or R input to be disabled depends on the current state of the slave latch outputs.

Diagram:

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Procedure: 1) Connections are made as per circuit diagram. 2) The truth table is verified for various combinations of inputs.

Truth Table: I/Ps Clk X X X O/Ps J X X X L H L H X K X X X L L H H X Q H L H Q0 H L Toggle Q0 Q0 Q L H H Q0 L H

Pr L H L H H H H H

Clr H L L H H H H H

Precaution: 1)Insert and remove the IC;s with care

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2)Connection should be neat &clean 3)Handle the trainer kit with care 4)Remove the ic with the help of Tweezer

Result : Verify the truth table of a J-K flip-flop (7476)

EXPERIMMENT NO.: - 9(C)

Digital Electronics

DAVIET Aim: - Verify the truth table of a D flip-flop (7474) and study its operation in the toggle
and asyneronous modes

Apparatus: - IC-7474, connecting leads, digital trainer board.

Theory: - A flip flop is a basic memory element. It can store 1 bit. It is a bi-stable multivibrator; the two stable states are denoted by 1 or 0. It has got complementary O/Ps Q & Q i.e. Q = 1 & Q = 0 & vice-versa. A flip flop has one or two controls I/Ps. D flips flop have one control O/P.

Diagram: -

IC7474 (Dual D-type positive edge triggered flip flop with preset & clear)

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Truth Table: I/Ps Pr L H L H H H Clr H L L H H H Clock X X X D X X X H L X Q H L H H L Q0 O/Ps Q L H H L H Q0

Precaution: 1)Insert and remove the IC;s with care 2)Connection should be neat &clean 3)Handle the trainer kit with care 4)Remove the ic with the help of Tweezer

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Result : the truth table of a D flip-flop (7474) and study its operation in the toggle and
asyneronous modes

EXPERIMMENT NO.: -10 Aim: - Operate the counters 7490, 7493 and 74192. Verify the frequency division at
each stage. With a low frequency clock (say 1 Hz) display the count on LEDs

Apparatus: - IC - 7490, IC-74193, Digital trainer kit, connecting leads. T Precaution:

1)Insert and remove the IC;s with care 2)Connection should be neat &clean 3)Handle the trainer kit with care 4)Remove the ic with the help of Tweezer

Result : test of an S-R flip-flop using NOR/NAND gates

Theory: - A counter is a circuit composed of flip flop in cascaded form, capable of

counting the number of clock pulses that have arrived at its clock I/P. Initially, let Q4Q3Q2Q1 = 0000 when CLR I/P goes high the action begins. The flip flops are in toggle mode. Now Q toggles for every negative edge of clock pulses while the other flip flop toggles for negative edge of the Q O/P of preceding stage.

Digital Electronics

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From the table shown O/Ps Q4Q3Q2Q1 pulses from the binary equivalent of the no. of clock pulses arrive at I/P of logic level 1. Thus a four bit counter has 24 states. An nbit counter can count upto 2n-1 & it can have 2n states. A decade counter is one which has 16 states. The count sequence counts from 0 to 9 in fig. (2). In fig. (3), the circuit skips the count from 10-15 & reset back to 0 after the 9th count. The circuit can be explained by following steps: 1) The counter is initially reset (i.e. Q4Q3Q2Q1 = 0000) using CLR line. Making CLR line logic level 0, O/P of gate 1 is 0. 2) For the counter operation CLR is set to logic level, the counter then counts from 0 to 9. The counter then reaches the tenth counter i.e. Q4Q3Q2Q1 = 1010 the O/P of gate becomes 0, making the O/P of gate 1 zero thereby resettinsg the Diagrams & Truth Table: -

Decade Counter

Digital Electronics

DAVIET

Procedure: 1) Place the IC on IC Trainer Kit. 2) 3) 4) 5) Connect the inputs to the input switches provided in the IC trainer kit. Connect the outputs to the switches of output LEDs. Connect Vcc & ground supply to the respective pins of IC trainer kit. Apply various combinations of inputs according to the truth table & observe condition of LEDs.

Precaution: 1) Insert and remove the IC;s with care 2) Connection should be neat &clean 3) Handle the trainer kit with care 4) Remove the ic with the help of Tweezer

Result : the counters 7490, 7493 and 74192. Verify the frequency division at each stage.
With a low frequency clock (say 1 Hz) display the count on LEDs

Digital Electronics

DAVIET
the counters 7490, 7493 and 74192. Verify the frequency division at each stage. With a low frequency clock (say 1 Hz) display the count on LED

Digital Electronics