Agilent EEsof EDA

Presentation on Amplifier Design and Performance Testing

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Amplifier Design & Performance Testing

Gaining the Wireless Edge 2000

5

Techniques for RF and High-Frequency Wireless Design

Amplifier Design & Performance Testing

After system design & design partitioning, the next step in our design flow is to create the circuit design for the Power Amplifier. Well design a PA here with the assistance of two of the DesignGuides (Passive Circuit and Power Amplifier), which are new in ADS 1.3.

Amplifier Design & Performance Testing

Agenda
EDGE Amplifier Specifications Step-by-Step Procedure to Design Power Amplifier Driver Amplifier Design Matching Network Design Simulation Results Power Amplifier Design Calculating Load-Line Resistance from IV Curves

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Maximize Power: Matching to the Load-Line Impedance Simulation: Gain, input Match, and output Load Resistance Comparison with Measurement Data

Amplifier Design & Performance Testing

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Supporting Infrastructure System Library System Library Design Libraries Design Libraries Vendor Libraries Vendor Libraries Transmission Line Models Transmission Line Models Foundry Libraries Foundry Libraries Layout Footprints Layout Footprints

Design Flow Steps Illustrated in this Module

II N N SS TT RR UU M M EE N N TT AA TT II OO N N DD EE SS II GG N N Concept Concept Logical Design

System Design System Design

Synthesis, Utilities Synthesis, Utilities and Optimization and Optimization Data Processing Data Processing

Circuit Design Circuit Design FF EE EE DD BB AA CC KK Layout Layout EM-Simulation EM-Simulation Manufacturing Manufacturing Hardware Deliverable Customers Customers

EM Visualization & EM Visualization & Optimization Optimization Physical Design

Custom Models Custom Models

Simulation Deliverable

During this module, well be focusing on taking a design from the System Level and the specifications allocated and create a circuit design. The particular parts of the design flow highlighted will be addressed in this paper.

Amplifier Design & Performance Testing

EDGE Power Amplifier Specifications
Frequency Nominal Gain Output Noise Power Input Impedance Stability All Spurious Harmonics 1850 -1910 MHz Pmax @ 1dB GC

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800mW or +29 dBm >30% 12.5% (RMS) max 6 dB max +/-6.5 VDC

23 dB PAE at Pmax +6.5V 140 dBm/Hz EVM VSWR<2:1 (50 ohms) Noise Figure (Loaded VSWR<2:1) Vsupply < -70 dBc <30 dBc for 2fo and 3fo

Here are the specifications obtained after the system design partitioning. For this paper, were going to focus on the specifications in italics. Since we are concerned with getting maximum power from our device, the device will exhibit nonlinear characteristics which must be managed to meet specifications, these include PAE & Harmonic levels.

Amplifier Design & Performance Testing

PA Design Partitioning

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DC/Operating Point (Load Pull vs. Load Line) Matching Networks (Gain, Match, NF, Stability) Performance Testing (Simulation) Layout (Build)

Driver Stage

Power Stage

Overall Gain - 23 dB ATF-21170 - Driver Amplifier Stage - 13 dB gain MGF-2430A - Power Amplifier Stage - 10 dB gain

Measure (Model Validation)

The design starts with budgeting and device selection to achieve the final goals. The optimum number of stages are determined for the required gain. The final stage device is selected to achieve the required output power, whereas the preceding stage device is selected to drive the final power stage. If a high degree of linearity is desired, the driver stage should be chosen so that when the final stage is driven into compression, the driver stage is several dB below its compression point. The proper bias point is selected and impedance matching is then carried out to complete the design. Power amplification in RF frequency bands can be accomplished by using any one of many different devices, e.g. Bipolar Junction Transistors (BJT), Metal Oxide Semiconductor Field Effect Transistor (MOSFET), GaAs Metal Semiconductor Field Effect Transistor (MESFET), Hetro Junction Bipolar Transistors (HBT), etc. At 1.9 GHz BJT, HBT, and MESFET are good candidates for the required gain and output power. The transistors selected for this design were MESFETs MGF 2430A for the output power stage and ATF 21170 for the driving stage. MGF2430A is a good candidate for this amplifier design because it is capable of giving +29 dbm output power with +10db gain. ATF21170 MESFET provides maximum available gain of +13 dB at the required frequency and therefore selected for this application.

Amplifier Design & Performance Testing

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Challenges Using Todays EDA Software Effectively

Flexible & comprehensive simulation environments are also complex Expertise and considerable time is needed to set up the environment for the simulation results you want While this expertise may exist in your organization, it may not be with every engineer Homemade simulation setups, equations, & displays may have errors

Now we begin to think about the actual circuit design and the design software well use. Setting up your simulation environment to get the results you want can be complex. Detailed design and simulation knowledge to properly set up the topology and the associated equations for processing data. It can also take significant time to validate the setup. Some organization are fortunate enough to have the expertise to create complex simulation setups, but many do not. And even those that do have a few people with the expertise, not every designer has the same level of expertise. Finally, when someone does create their own simulation setups, they usually involve numerous equations with complex data displays, each of them are prone to errors. Everything in DesignGuides could be duplicated by someone with the right design experience as well as the right simulation expertise. However, DesignGuides: - reduce time consuming simulation setup. - eliminate error-prone experimentation with syntax. - provide convenience through extensive use of linked variables.

Amplifier Design & Performance Testing

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Solution -- Advanced Design System 1.3

Unprecedented Productivity Bridging the Gap
Simulation Technology
CUSTOMIZATION CUSTOMIZATION

Applications

Linear Nonlinear Circuit Envelope Time Domain Agilent Ptolemy Electromagnetic Others

RF IP Encoder
LIBRARIES LIBRARIES

Design Libraries
APPLICATION CONTENT APPLICATION CONTENT

DesignGuides
SYNTHESIS SYNTHESIS

RF Compiler/E-Syn/LineCalc
AUTOMATION AUTOMATION

Amplifiers Filters Mixers Oscillators Passives System Mods/Demods Packaging Others

Layout to HFSS Link

DesignGuides bridge the gap between simulation technology and the specific design need or application by providing the design expertise within an application layer that runs within the ADS environment. Test setups are predefined so that the user need only set the appropriate simulation values and configure their test circuit. The data display is set up to present the main circuit performance and specifications. Many circuits require a standard set of performance tests. With DesignGuides there is no need to reinvent simulation setup and data processing.

Amplifier Design & Performance Testing

E-Syn or Passive Circuit DesignGuide
What are the differences?
DC/Operating Point (Bias Network) Matching Networks (Gain, Match, NF, Stability) Performance Testing (Match, Gain, & Load Pull)

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Design expertise built in

E-Syn Lumped Elements Specify order/type, out-of-band performance

Passive Circuit DesignGuide Distributed Elements microstrip Automatically sets up simulation & data display with relevant measurements

Layout & Manufacture

Measure

This is the design flow we will use for designing our PA. It has five stages. Well begin our design flow with the design of the driver stage. And well use a linear S-parameter model which eliminates the need to focus on DC/Operating Point characteristics of the device. Well spend more time on this step later when we design the power stage. For now well focus on designing input & output matching networks for the first device. We have two choices that will assist in creating these matching networks, E-Syn or the new Passive Circuit DesignGuide. You may already be familiar with E-Syn, so today well use the DesignGuide.

Amplifier Design & Performance Testing

Power Amplifier DesignGuide
S-parameter simulations

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Design expertise built in

The first step will be to determine the optimum impedance for maximum gain. To do this, well use the Power Amplifier DesignGuide.

Amplifier Design & Performance Testing

S-Parameters, Noise Figure, & Stability

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Design expertise built in

Series Resistance is used to improve Stability of device

The driver stage can be designed using small signal techniques using DesignGuides. The Power Amplifier DesignGuide is used to determine maximum available gain, stability factor, simultaneous source, and load impedance. The Passive Circuit DesignGuide is used to synthesize the input and output matching networks. When designing amplifiers, stability is always a concern. The Power Amplifier DesignGuide allows analysis and optimization of amplifier stability. However, this wont be presented in this paper. We did add a series resistive load to stabilize the amplifier, which is necessary to design the matching network. *Amplifiers can be unstable when terminated with certain load and source impedances. The stability problem resulting from drain to gate coupling can be overcome by various well-known techniques, but these tricks are generally inappropriate for power amplifiers because of the requirement for greater efficiency. This problem is generally solved through the brute-force method of degrading the input impedance through use of a resistor at the input to reduce feedback. In addition to increasing the stability, this series resistor also improves the input mismatch by making the input slightly insensitive to power level. Unfortunately, the side effect of adding a series resistance at the input is a reduction in the gain of the amplifier and an increase in noise figure. Therefore, we must be careful to choose a small value of resistance, just enough to meet the required performance.

Amplifier Design & Performance Testing

Simulation Results

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Design expertise built in

Here is the data display that is automatically generated. It has results for various measurements, but well focus on the Matching for Gain area.

Amplifier Design & Performance Testing

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Design Matching Impedance for Maximum Gain

The DesignGuide tells us that for maximum gain the impedance of the input matching network needs to be the Zsource value indicated.

Amplifier Design & Performance Testing

Passive Circuit DesignGuide
Matching Network Elements

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Control Palette

Next, well use the Passive Circuit DesignGuide to synthesize the input matching network. Well select the control palette which will bring a set of icons for easy operation of the DesignGuide. Well select the matching network icon which brings up a component palette. Well choose a distributed, single stub matching network.

Amplifier Design & Performance Testing

Synthesize Input Matching Network

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Design expertise built in

Zsource to Zload (conjugate match)

The single stub matching networks requires that you specify Zin & Zload (the conjugate match of Zsource provided in the data display). Pressing the Design Icon, the DesignGuide creates a matching network (a shunt open stub followed by a series line).

Amplifier Design & Performance Testing

Input Matching Network Performance

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Design expertise built in

Meet Input Match Spec

We can also display the simulation results of the matching network. At this point, you also have the option to optimize the results to improve performance of the matching network.

Amplifier Design & Performance Testing

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Completed Driver Amplifier w/Matching Networks

sp_hp_ATF-21170_1_19921201 SNP1 Bias="Fet: Vds=3V Id=20mA" DA_SSMatch2_NF_SP_Stability DA_SSMatch2 Subst="MSub1" F=1.88 GHz Zin=22.954+j*36.672 Ohm Zload=50 Ohm

Term Term1 Num=1 Z=Z0

R DA_SSMatch1_NF_SP_Stability R1 DA_SSMatch1 R=20 Ohm Subst="MSub1" F=1.88 GHz Zin=50 Ohm Zload=16.425-j*46.474

Term Term2 Num=2 Z=Z0

We can now design an output matching network using the same technique and have done so above. Weve chosen to design the output to 50 ohms, although we could have designed an interstage match directly to the input of the power stage. Amplifier gain, input, and output reflection coefficients of this driver amplifier stage are shown above.

Amplifier Design & Performance Testing

Next: Power Stage Design
Designing for maximum output power
DC/Operating Point (Bias Network) Matching Networks (Gain, Match, NF, Stability) Performance Testing (Match, Gain & Load Pull)

5
Power Stage

Driver Stage

Output impedance varies w/output power Ideal impedance exists for each output power Two techniques to design output match Load-pull technique Load-line analysis

Layout & Manufacture

Low power
Measure

22

High power

Designing the output-match network for power amplifiers is different from the complex-conjugatematching technique used for small-signal linear amplifiers. This is because the output impedance (S22) of power devices varies as a function of output power. In general, an ideal termination impedance exists, which maximizes the output power available from the amplifier. The goal of the output-matching network is to transform 50 ohms into this ideal impedance. Unlike the conjugate match technique used to maximize gain, here we trade-off gain for the purpose of achieving maximum output power. There are two basic ways to find the ideal output impedance that must be presented to the power device of the amplifier. One is to perform a load-pull analysis (either simulated or with actual measurements), and the other is to design a matching network based on the physical model of the output device, load-line analysis. Then, the device is terminated with this load impedance and the source is conjugate matched to provide maximum gain.

Amplifier Design & Performance Testing

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Designing Power Amplifier for Maximum Power Output

Output Impedance is a function of output power
Imax

Load-Line Analysis - Cripps Method

Bias Point

Imax/2

Commonly used for PA Design Easy measure Simple and accurate

Vs

Vb

(2Vb-Vs) RL=2(Vb-Vs)/Imax Pout=Imax(Vb-Vs)/4 Imax=1.2 Idss

Load-Pull Method Complicated measurement Load-Pull Contours easily generated w/ ADS Greatest Accuracy -- Optimum Load Impedance

Power amplifier design requires device characterization for power, efficiency, and reflection coefficients as a function of input power level. Bias conditions, output circuit loss, load impedance, and gain are the major design considerations to achieve the required amplifier performance. To design a power amplifier, many designers use the optimum load impedance data provided by the device supplier, but this technique does not allow accurate prediction of measurement such as PAE, Harmonic distortion, Compression point, and of course Gain. The power amplifier design techniques can be divided into two categories, namely, Load-Pull method and Load-Line approximation method (Cripps method). The load-pull data, typically supplied by the manufacturer, provides the load impedance that corresponds to different output power levels. For any output power less than maximum, there is a locus of impedance values that form a closed contour on the output impedance plane. For maximum power, the contour converges to a single point. From the load contours, a designer can find out optimum load impedance to design an output matching network for maximum power transfer. The Cripps method is used to calculate optimum load impedance for maximum power transfer. The load impedance can be determined by using the DC-IV curves and device operating biasing point.

Amplifier Design & Performance Testing

Cripps Method: Load-Line Analysis
Example
Determines resistance that gives highest power Similar output match as load-pull technique Id
useable region

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Ropt= Vds/Idmax
1.3 x Idss = Idmax

1.3 Idss

Load line = (Vmax - Vmin) 1.3 x Idss = RL

useable region

Vds
Vmin Vnom Vnom + (Vnom - Vmin) = Vmax

A load-line analysis is a technique for finding the optimum impedance to present to the output stage of the power amplifier. If we look at the I-V curves for a FET, we see that there is a useable region for both drain current and drain-to-source voltage. For drain current, we generally use the region between 0 and 1.3 x Idss. To keep the output voltage within the linear region of the FET, we avoid the steep-sloped areas of the I-V curves.

Amplifier Design & Performance Testing

FET Curve Tracer Simulation Setup

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Design expertise built in

Well use the Power Amplifier DesignGuide to generate the DC-IV curves for the MGF 2430A transistor. To analyzer the operating characteristics for the FET, well use the Power Amplifier DesignGuide> DC & Bias Point Simulations>FET I-V Curves, Class A Power Efficiency, Load, Gm vs. Bias. This setup will provide us with Rload.

Amplifier Design & Performance Testing

FET Biasing Results

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Design expertise built in

The automatically generated data display directly gives the optimum load impedance required for maximum power transfer under class A operation of the device. The DesignGuide also provides user interactive control to optimize the output power DC to RF efficiency and calculates load resistance for user defined drain voltage. Well focus on Rload for design of our matching network.

Amplifier Design & Performance Testing

Output Matching Network Design

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Marker m1 bias point values, (Assuming Class A, AC current limited to marker m2 value and AC voltage no higher than VDSmax.) Output Power Watts dBm 794.4m 29.00 Rload 18.353 DC-to-RF Efficiency,% 36.28 DC Power Consumption 2.190

Ropt= 18.0 Ohm

From Datasheet Cds = 0.75 pF Ld = 0.2 nH

Using the DesignGuide, the DC bias analysis is carried out for the MGF 2430A and Rload is calculated. The values of Cds and Ld are taken from the device model data. The next step is to design the output matching network to match the above equivalent circuit to 50 ohms. Various topologies are possible to accomplish the required matching network; however, as the bandwidth is small, a simple matching network can be realized to give required return loss. The nature of the output impedance and its matching are more critical than the input impedance since it also determines the overall efficiency of operation, whereas the input matching only relates the input return loss. The output matching network requires a simple quarter wave transformer design between 18 ohm and 50 ohm. This is synthesized by using the Passive Circuit DesignGuide in a manner similar to the single stub network synthesized earlier.

Amplifier Design & Performance Testing

Load-Pull Technique
Vary magnitude and phase of load presented to circuit Power output is measured at each impedance point
Input impedance and power measurement system Output impedance and power measurement system

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Pmax -1dB -2dB -3dB

X Input Tuner

DUT

X Output Tuner

Load-Pull measurements can be very expensive and time-intensive

Constant output power contours versus output load impedance (input power constant)

The load-pull measurement technique is based on the measured behavior of an amplifier. Detailed understanding of the physical models of the devices involved is not necessary. The procedure for performing a load-pull analysis is to present the output of the amplifier with a variety of load impedances while simultaneously measuring the output power. The input match is adjusted each time as well to ensure a well-matched condition at the input of the amplifier. This process is repeated with several different input-power levels. After all of the data is taken, contours of constant output power are plotted on the Smith chart. If the input power presented to the amplifier was large enough, a single point on the Smith chart appears where the output power was at a maximum. This is the impedance that we must present to the output of the amplifier. The tuners used to vary the input and output matches can be based on mechanical-slug tuners or pin-diode-based electronic tuners. Mechanical tuners excel in high-power applications because of their inherent low-loss when it is necessary to characterize an amplifier with highly reflective impedances. Electronic tuners provide very fast and repeatable measurements. (Maury Microwave is one supplier of such load-pull systems.) In the majority of cases, designers will typically use either a load-line analysis or a load-pull simulation.

Amplifier Design & Performance Testing

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Load-Pull Simulation -- Power Amplifier DesignGuide

The easiest alternative to either a load-line analysis or a load-pull measurement is a load-pull simulation. Load-pull simulation is easier, faster, and more accurate than the load-line analysis. Load-pull simulation is simpler, quicker, and far less expensive than a load-pull measurement system. For each specific impedance value, the Advanced Design System evaluates the corresponding output power level and displays it on the Smith chart. The Power Amplifier DesignGuide provides the setup and equations to perform a load-pull simulation. All you need to do is place your device into the schematic, adjust the bias voltages appropriately, set the power levels, and specify the region on the Smith chart where youd like the load-pull data for.

Amplifier Design & Performance Testing

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DesignGuide Load-Pull Simulation Results

Here are the results for the load-pull simulation.

Amplifier Design & Performance Testing

DesignGuide Load-Pull Equations
Detailed & Complex

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Lets take a moment and provide a brief view of some of the design & simulation expertise details that are behind the DesignGuides. Here we show some of the equations that are used in the DesignGuide just to run the Load-Pull simulation and to view the results. The value of the DesignGuides is the ability to run load-pull simulations without having to have the detailed design & simulation expertise needed to create these equations on your own.

Amplifier Design & Performance Testing

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Load-Pull Results -- Design Load Match to Peaks

As you can see, the results are similar to the load-line technique. This time though we have a specific impedance to design to.

Amplifier Design & Performance Testing

Output Match Design Impedance

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The load-pull simulation gives us the load impedance value with which we should terminate our FET. The model used in the load-pull simulation is the packaged FET model, therefore the resulting load impedance includes the parasitics of the FET and package built-in to the analysis.

Amplifier Design & Performance Testing

Completed Power Stage
Load-Line method w/ microstrip transformer
Power Amplifier Stage

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Goal

Here is our completed power stage after designing the input and output matching networks. The simulation results show that we are meeting our specifications for this stage.

Amplifier Design & Performance Testing

Completed PA w/ Complete Modeling

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(bias circuitry, library parts, bends/crosses/tees/vias, etc.)

Driver Stage
Now, lets build the completed amplifier.

Power Stage

Here is the completed schematic including the bias circuitry, SMT library parts, vias, and appropriate microstrip elements such as bends, tees, etc., to provide a completely accurate model of the amplifier. The biasing network was designed along with resistive divider network to drive gate voltage from available 6.5 V. Biasing network design plays an important role in the success of the power amplifier performance. The DC bypass capacitors value has to be carefully chosen to avoid any oscillation at low frequencies. The packages dimensions of SMT passive devices can lead to undesired resonance and have to carefully be chosen to shift any resonance to much higher than operating frequencies. At this stage, the ideal lumped devices are replaced by passive SMT models, the distributed parasitics were added next along with the discontinuities, and the amplifier was further optimized for the required performance. Note : Commercially available inverter can be used to generate 6.5 V from available + 6.5 V supply.

Amplifier Design & Performance Testing

PA Performance Testing

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Design expertise built in

Over 40 pre-defined simulations and corresponding data displays

DC/Operating Point (Bias Network) Matching Networks (Gain, Match, Stability) Performance Testing (Simulation) Layout (Build) Measure (Model Validation)

Well again use the Power Amplifier DesignGuide, but this time for performance testing. Well test only the specifications that we identified earlier, but you can perform all of the common amplifier performance tests with the Power Amplifier DesignGuide including two-tone tests. The Power Amplifier DesignGuide is focused on performance testing of amplifiers. It provides over 40 pre-defined simulations and corresponding data displays for the following common performance tests. Simulation topics include: -DC & Bias Point -S-Parameter -1&2 Tone Harmonic Balance -Matching Circuits

Amplifier Design & Performance Testing

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Design expertise built in

Spectrum, Gain, Harmonic Distortion vs. Power (w/PAE)

Here is the simulation setup for Gain, Harmonic Distortion vs. Power, and PAE.

Amplifier Design & Performance Testing

Data Display

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Design expertise built in

And the automatically generated data display. Well focus just on the boxed results.

Amplifier Design & Performance Testing

Gain & Gain Compression

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Design expertise built in

The 1dB gain compression of an amplifier is a power point where the gain of the amplifier reduces by 1 dB. At the power level greater than gain compression point, the amplifier will generate very high harmonic distortion components. The plot shows gain as a function of input power. The gain meets the specifications of 23 dB.

Amplifier Design & Performance Testing

2nd & 3rd Order Harmonics

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Design expertise built in

< 30 dBc Spec

All amplifiers generate undesired multiples of the fundamental frequency at the output called harmonics, which are caused largely by the nonlinearity of the transistors used in the design of power stage. The specification defines the maximum harmonic level the amplifier can produce at the output and is defined relative to the input power level (dBc). The curves show the output of the 2nd and 3rd harmonics in dBc as a function of input power.

Amplifier Design & Performance Testing

Power Added Efficiency

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Design expertise built in

Power Added Efficiency is defined as the ratio between the RF gain of the device and DC power. PAE=(Pout-Pin)/PDC The above plot shows PAE as a function of input power. Note that the efficiency increases as the input power increases, up to the 1 dB gain compression point and after that the PAE drops. Transistor bias in the main determinant of device efficiency. To increase the PAE, the designer may need to change the bias, use more stages or select a larger transistor. The efficiency in this case is low because we are operating the device at a relatively low voltage.

Amplifier Design & Performance Testing

Power Amplifier Layout
DC/Operating Point (Bias Network) Matching Networks (Gain, Match, NF, Stability) Performance Testing (Simulation) Layout (Build) Measure (Model Validation)

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Final layout of the amplifier is shown above. The complete design was confined in to a dimension of 2 X 1 inch. This layout was created with ADS using the design synchronization capability.

Amplifier Design & Performance Testing

Finished Amplifier

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Here is a photograph our finished amplifier.

Amplifier Design & Performance Testing

Measured vs. Modeled
DC/Operating Point (Bias Network) Matching Networks (Gain, Match, NF, Stability) Performance Testing (Simulation) Layout (Build) Measure (Model Validation)

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We did some basic measurements on the amplifier using a network analyzer.

Amplifier Design & Performance Testing

Measured vs. Simulated Results
fmeasuredamp..S(1,1) S(1,1)

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Measured
m3 m4

Measured
m1 m2

Simulated

30 29 28 27 26 25 24 23 22 21 20 1.85 1.86

dB(fmeasuredamp..S(2,1)) dB(S(2,1))

Simulated

1.87

1.88 freq, GHz

1.89

1.90

1.91

freq (1.850GHz to 1.910GHz)

Measured

m3 freq=1.880GHz dB(fmeasuredamp..S(2,1))=25.553

Measured

m1 freq=1.894GHz fmeasuredamp..S(1,1)=0.153 / 130.040 impedance = 40.040 + j9.580 m2 freq=1.893GHz S(1,1)=0.127 / 139.708 impedance = 40.648 + j6.795

Simulated freq=1.880GHz

m4

dB(S(2,1))=25.090

Simulated

Good agreement between simulated & measured results

Here are the measurements of the input match and gain for the amplifier.

Amplifier Design & Performance Testing

DesignGuides Design Expertise Built-In
Shorten Design Time through Ease of Design Built-In Expert Simulations & Data Displays Current DesignGuides PLL Oscillator Linearizer Power Amplifier Passive Circuits Look for more DesignGuides in the near Future

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