Standard ICs

Dual 4-channel analog multiplexer /

demultiplexer
BU4052BC / BU4052BCF / BU4052BCFV

The BU4052BC, BU4052BCF, and BU4052BCFV are multiplexers / demultiplexers capable of selecting and combin-
ing analog signals and digital signals with a configuration of 4 ch × 2.
Inhibit signals and control signals are used to turn on the switch of the corresponding channel. In addition, even if the
logical amplitude (VDD-VSS) of the control signal is low, signals with a large amplitude (VDD-VEE) can be switched.
In addition, as each switch has a low ON resistance, it can be connected to a low impedance circuit.

•Block diagram
Y0 1 16 VDD

Y2 2 15 X2
Y0

COMMON 3 Y2 X2 14 X1
Y Y
X1
OUT / IN
Y3 4 X 13 COMMON
Y3 OUT / IN X
Y1 X0
Y1 5 12 X0
INH X3
INH 6 VEE A 11 X3

B
VEE 7 10 A

VSS 8 9 B

1
 Standard ICs BU4052BC / BU4052BCF / BU4052BCFV

•Logic circuit diagram •Truth table

INH A B ON SWITCH
L L L X0 Y0
VDD (16)
L H L X1 Y1
INH (6)
A (10)
LEVEL BINARY TO 1of 4 L L H X2 Y2
CONVERTER DECODER WITH INH
B (9) L H H X3 Y3
VSS (8) H X X NONE
VEE (7)
X0 (12) X: Irrelevant
X1 (14)
X2 (15) (13) X
X3 (11)
Y0 (1)
Y1 (5)
Y2 (2) (3) Y
Y3 (4)

•Absolute maximum ratings (Ta = 25°C)

Parameter Symbol Limits Unit
Power supply voltage 1 VDD – 0.5 ~ + 20 V
Power supply voltage 2 VDD — VEE – 0.5 ~ + 20 V
Power dissipation Pd 1000 (DIP), 500 (SOP), 400 (SSOP) mW
Operating temperature Topr – 40 ~ + 85 °C
Storage temperature Tstg – 55 ~ + 150 °C
Input voltage VIN – 0.5 ~ VDD + 0.5 V

2
 Standard ICs BU4052BC / BU4052BCF / BU4052BCFV

•DCElectrical characteristics
characteristics (unless otherwise noted, Ta = 25°C, V EE = VSS = 0V)

Measurement
Parameter Symbol Min. Typ. Max. Unit Conditions circuit
VDD (V)
3.5 — — 5
High-level input voltage VIH 7.0 — — V 10 — Fig.1
11.0 — — 15
— — 1.5 5
Low-level input voltage VIL — — 3.0 V 10 — Fig.1
— — 4.0 15
High-level input current IIH — — 0.3 µA 15 VIH = 15V Fig.1
Low-level input current IIL — — – 0.3 µA 15 VIL = 0V Fig.1
— — 950 5
ON resistance RON — — 250 Ω 10 VIN = VDD / 2 Fig.2
— — 160 15
— 10 — 5
ON resistance deflexion ∆RON — 6 — Ω 10 — Fig.2
— 4 — 15
— — 0.3 15
OFF-channel leakage current IOFF µA — Fig.3
— — – 0.3 15
— — 5 5
Static current dissipation IDD — — 10 µA 10 VI = VDD or GND —
— — 15 15

3
 Standard ICs BU4052BC / BU4052BCF / BU4052BCFV

Switching characteristics (unless otherwise noted, Ta = 25°C, VEE = VSS = 0V, RL = 1kΩ, CL = 50pF)

Measurement
Parameter Symbol Min. Typ. Max. Unit Conditions circuit
VDD (V)
— 15 45 5
Propagation delay time
tPLH, tPHL — 8 20 ns 10 — Fig.4
Switch IN → OUT
— 6 15 15
— 170 550 5
Propagation delay time tPHZ, tPLZ
— 90 240 ns 10 — Fig.5, 6
CONT → OUT tPZH, tPZL
— 70 160 15
— 150 380 5
Propagation delay time tPHZ, tPLZ
— 70 200 ns 10 — Fig.5, 6
INH → OUT tPZH, tPZL
— 50 160 15
Maximum propagation frequency fMax. — 20 — MHz 5 VEE = – 5V∗1 Fig.7
Feedthrough attentuation FT — 0.5 — MHz 5 VEE = – 5V∗2 Fig.7
Sine wave distortion ratio D — 0.02 — % 5 VEE = – 5V∗3 Fig.7

Input capacitance (control) CC — 5 — pF — — —

Input capacitance (switch) CS — 10 — pF — — —

∗1 VIN = 5VP-P sine wave, frequency that enables 20 log10 VOUT / VIN = – 3dB.
∗2 VIN = 5VP-P sine wave, frequency that enables 20 log10 VOUT / VIN = – 50dB at channel off.
∗3 VIN = 5VP-P sine wave.

•Measurement circuits VDD VDD

IIN
A
B
A
B
RON = RL
( VIN – 1
VOUT )
A VCONTROL IN
INH INH
VIN
COMMON CHANNEL VIN COMMON CHANNEL
VDD
OUT / IN IN / OUT OUT / IN IN / OUT

VEE VEE
V RL = 10kΩ VDD / 2 VOUT V RL = 10kΩ

GND GND

Fig.1 Input voltage, current Fig.2 ON resistance

4
Standard ICs BU4052BC / BU4052BCF / BU4052BCFV

VDD

A
B
VCONTROL IN
INH

VDD or GND COMMON CHANNEL A GND or VDD

OUT / IN IN / OUT

VEE

GND

Fig.3 OFF-channel leakage current

VDD

A VDD
B
VCONTROL IN 50%
Input
INH
GND
OUT
COMMON CHANNEL
OUT / IN IN / OUT 50%
Output
VEE
RL CL
P.G.

GND tPLH tPHL

Fig.4 Propagation delay time (Switch IN to OUT)

VDD

A VDD
B
Input 50%
INH
GND
OUT
COMMON CHANNEL
P.G. OUT / IN IN / OUT 90%
VDD Output 50%
VEE
RL CL

GND tPZH tPHZ

Fig.5 Propagation delay time (CONT, INH to OUT)

5
 Standard ICs BU4052BC / BU4052BCF / BU4052BCFV

VDD
VDD

A CL
RL
B
Input 50%
INH

COMMON CHANNEL
OUT / IN IN / OUT OUT 50%
P.G. GND
10%
VEE Output

GND
tPZL tPLZ

Fig.6 Propagation delay time (CONT, INH to OUT)

VDD

A
B
VCONTROL
INH

COMMON CHANNEL
OUT / IN IN / OUT
VEE

~ VEE
RL
CL
V
~
D

GND

Fig.7 Maximum propagation frequency,

feedthrough, sine wave distortion

•Electrical characteristic curve

1200

DIP16
POWER DISSIPATION: Pd (mW)

1000

800

600
SOP16

400 SSOP-B16

200

0
0 25 50 75 100 125 150

AMBIENT TEMPERATURE: Ta (°C)

Fig.8 Power dissipation vs. Ta

characteristic

6
 Standard ICs BU4052BC / BU4052BCF / BU4052BCFV

•External dimensions (Units: mm)

BU4052BC BU4052BCF

19.4 ± 0.3 10.0 ± 0.2

16 9

6.5 ± 0.3
16 9

6.2 ± 0.3

4.4 ± 0.2
1 8
0.51Min.

7.62

0.15 ± 0.1
3.2 ± 0.2 4.25 ± 0.3

1 8

1.5 ± 0.1
0.3 ± 0.1

0.11
2.54 0.5 ± 0.1 0° ~ 15° 1.27 0.4 ± 0.1 0.3Min.

0.15

DIP16 SOP16

BU4052BCFV

5.0 ± 0.2

16 9
4.4 ± 0.2
6.4 ± 0.3

0.15 ± 0.1

1 8
1.15 ± 0.1

0.1

0.65 0.22 ± 0.1 0.3Min.

0.1

SSOP-B16

7
Appendix

Notes
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Application circuit diagrams and circuit constants contained herein are shown as examples of standard
use and operation. Please pay careful attention to the peripheral conditions when designing circuits
and deciding upon circuit constants in the set.
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About Export Control Order in Japan

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Appendix1-Rev1.0