7.1.

1 Title of the Experiment: Measurement of Opamp parameters (I/P Offset current, I/P bias current, Slew rate, I/P offset Voltage, PSRR, CMRR) & offset nulling. 7.1.2 Objective of the Experiment: To conduct an experiment to verify the Op-amp parameters. 7.1.3 List of Component / Equipments:
Sl. no 1 2 3 4 5 Component/ Equipments Regulated DC CRO Ammeter +12V and -12V power pack Op-Amplifier Specification 0-30V, 2A 80 Vpp/20MHz 0-500nA Quantity 02 01 02 01 A-741 01

7.1.4 Experimental setup:

Circuit Diagram 7.1.5 Theoretical background for the experiment/validation of the experiment: Input bias current is defined as the average of the bias current at the inverting and non inverting terminals of an OPAMP. Input offset current is the difference between the base current at the inverting and non inverting terminals of an OPAMP. Input impedance is the resistance seen from either terminals when other terminal is connected to the ground. Output impedance is the equivalent output resistance seen from either terminal when one terminal is connected to the ground. Output offset voltage is defined as the amount voltage when both the inputs are grounded. 7.1.6 Formulae-required: Input bias current (IBI + IB2/2) Input offset current (IB1-IB2)

7.1.7 Step by step procedure to carry out experiment: Electrical connections are made as shown in the circuit diagram. Set Vcc=15V To measure input offset current, bias current and offset voltage, equal voltages are applied to both the input terminals of an OPAMP. Respective base current shown by the ammeters are noted down, Average of these two currents will be the input bias current and difference of respective base current gives the input offset current. For finding output offset voltage ground both the input terminals and note down the output voltage.

7.1.8

Table of observation: 1. Input bias current 2. Input offset current 3. Output offset voltage = = = nA nA mV

7.1.9 Specimen calculation: 7.1.10 Nature of graph:

--------- Not Applicable ----------------- Not Applicable ---------

7.1.11 Conclusion of the experiment:

7.2.1 Title of the Experiment: Inverting amplifier & attenuator, noninverting amplifier& voltage follower 7.2.2 Objective of the Experiment: To design and test the performance Inverting amplifier & attenuator, noninverting amplifier and voltage follower. 7.2.3 List of Component / Equipments: Sl.No 1 2 3 4 5 6 7 8 Components/Equipments
Regulated DC CRO Ammeter +12V and -12V power pack Op-Amplifier

Specifications
0-30V, 2A 80 Vpp/20MHz 0-500nA A-741

Quantity
02 01 02 01 01

Resistor Function generator BNC Probes

10K watt CFR 1K watt CFR 0-1MH Z

02 02 01 02

7.2.4 Experimental setup:

Inverting Amplifier

Attenuator

Non-inverting Amplifier 3

Voltage follower 7.2.5 Theoretical background for the experiment/validation of the experiment: 7.2.6 Formulae-required: Voltage Gain = -Rf/R1. (Inverting amplifier) Let required gain be 10. Assume R1=1k Therefore Rf=10k. Voltage gain = (1+Rf/R1), (Non-inverting amplifier) Let required gain = 11. Assume R1=1k. Therefore Rf=10k. 7.2.7 Step by step procedure to carry out experiment: Electrical connections are made as shown in the circuit diagram. Select Input voltage (Vi) of 1 KHz, 0.5Vpp is given from AFO. Note down the output voltage (Vo). And calculate the gain. Repeat all above steps for verifying other circuits.

7.2.8 Table of observation: Inverting Amplifier Input Voltage = Vi = Constant Output Voltage = Vo = Volts Voltage gain of the amplifier = V0/Vi = . / . = ..

Attenuator Input Voltage = Vi = Constant Output Voltage = Vo = Volts Voltage gain of the amplifier = V0/Vi = . / . = .. 4

Non Inverting amplifier Input Voltage = Vi = Constant Output Voltage = Vo = Volts Voltage gain of the amplifier = V0/Vi = . / . = ..

Voltage follower Input Voltage = Vi = Constant Output Voltage = Vo = Volts Voltage gain of the amplifier = V0/Vi = . / . = .. 7.2.9 Specimen calculation: 7.2.10 Nature of graph: Inverting amplifier --------- Not Applicable ---------

Non-inverting amplifier

Voltage follower

7.2.11 Conclusion of the experiment: 5

7.3.1 Title of the Experiment: Adder, substractor, integrator, differentiator 7.3.2 Objective of the Experiment: To study and verify the performance of Op-amp as Adder, substractor, integrator, differentiator 7.3.3 List of Component / Equipments: Sl.No 1 2 3 4 5 Components/Equipments
Regulated DC CRO Ammeter +12V and -12V power pack Op-Amplifier

Specifications
0-30V, 2A 80 Vpp/20MHz 0-500nA A-741

Quantity
02 01 02 01 01

Resistor

7 7.3.4 8 9

Capacitors Function generator BNC Probes

10K watt CFR 1K watt CFR 250 watt CFR 100 watt CFR 1.5K watt CFR 0.1F ceramic disc 0.01F ceramic disk 0-1MH Z

02 each

01 each 01 02

Experimental setup:

Adder circuit

Substractor circuit 6

Integrator circuit

Differentiator circuit 7.3.5 Theoretical background for the experiment/validation of the experiment: For an adder and subtractor : In an adder circuit (here an OPAMP is used in inverting mode. Out put is leaner combination of number of input signals i.e., the output is proportional to the sum of the inputs. Assuming that the inputs applied are Va, Vb & Vc in volts then the output voltage is given by Vo= -Rf/R (Va + Vb + Vc). Similarly when the OPAMP is used as a subtractor , the output is proportional to the difference of the inputs applied. If Va & Vb are applied as input voltages then the output is given by Vo = - Rf/R (Va Vb). In these two equations Rf is the feedback resistor connected between the output terminal and the inverting input terminal and the resistor R is connected between the input terminal and the input applied voltage. For Integrator and Differentiator : In an integrator circuit using an OPAMP the output voltage is given by Vo+-/R1Cf Int (Vin dt + C), this equation shows that the amplifier provides an output voltage proportional to thintegral of the input voltage. For example if the input is a square wave, the output will be a triangular wave. Similarly for differentiator the output voltage is given by Vo = - Rf C1 d/dt (Vin). This shows that, the output is proportional to the time derivative of the input. If the input is a sine wave then the output will be a cosine wave and the differentiator circuit has high gain at high frequencies. In the above two equations resistor R1 is connected between the input terminal and the input signal voltage, where as Rf is connected between the output terminal and the inverting input terminal. Similarly the capacitor Cf is connected between the output terminal and the inverting input terminal, where as C1 is connected between the input terminal and the input signal voltage. 7

7.3.6 Formulae-required: Adder : with Rf = 1 Kohm, R = 1 Kohm, Gain of the amplifier = - Rf/R = -1. Then the output voltage Vo is equal to the sum of the i/pt voltages applied. Subtractor : with Rf = 1 Kohm, R = 1 Kohm, Gain of the amplifier = - Rf/R = -1. Then the output voltage Vo is equal to the diff of the i/p voltages applied. Let fo = 1 KHz, Cf = 0.1 Mf We have fo = 1/ 2 x pi x R1 x Cf, Then R1 = 1 / 2 x pi x fo x Cf = 1.59 Kohm.

Integrator :

Differentiator : Let fo = 1 KHz, C1 = 0.1 Mf We have fo = 1/ 2 x pi x Rf x C1, Then Rf = 1 / 2 x pi x fo x C1 = 1.59 Kohm. Design of Integrator. Output voltage vo = -(1/R1/Cf) * vin dt +C. 0dB frequency fb = 1/(2 * * R1 *Cf). Gain limiting frequency fa = 1/(2 * * Rf * Cf). Let fa = fb/10. Hence Rf = 10 * R1. Assume R1 = 100, Cf = 0.1F; Rf = 1k. Hence fa = 1.59kHz & fb = 15.9kHz. Design of differentiator. Output voltage = -Rf * C1* d/dt (vin). 0dB frequency fa = 1 / (2 * * Rf * C1). Gain limiting frequency fb = 1 / (2 * * R1 * C1). Select fa equal to highest freq. to be differentiated Assume C1<1F,calculate Rf. Choose fb = 20*fa,calculate R1 & Cf such that R1*C1 = Rf*Cf. Let fa = 1kHz,C1 = 0.1F Therefore Rf = 1.5k. Let fb = 20kHz Therefore R1 = 79.5 Let R1 = 82,since R1*C1 = Rf*Cf. Cf = 0.0055F Let Cf = 0.005 F,Finally Rom = Rf = 1.5k.

7.3.7 Step by step procedure to carry out experiment: For an adder and substractor circuit: Give three DC Voltages as the input to the adder circuit let these voltages be denoted by, Va, Vb and Vc; Then note down the output voltage either using CRO or a Voltmeter. Check this output voltage value with the calculated output voltage value. Vary these input voltages and then note down the corresponding output voltage and then calculate the error using the measured and calculated output voltage values. Similarly for a subtractor circuit give two DC Voltages as the input signal. Let these be, Va and Vb and note that Va > Vb. Then measure the corresponding output voltage and check the calculated output voltage and then compare these two values and find out the error. For an Integrator and Differentiator Circuit: After connecting the circuit as per the diagram and give a square wave input signal. Then observe the output wave form on the CRO and this output wave form should be a triangular wave for an intigrator circuit. Measure the voltage and time period of both the input and output voltages. Similarly for a differentiator circuit give the square wave as an input. And observe the output wave form on the CRO. Measure the voltage time period of both the input and output wave form. 7.3.8 Table of observation: Va in V Vb in V Vc in V For Adder Cald Vo = - Rf/R (Va+Vb+Vc) Obsd Vo in in V V Error = Obsd Cald

For Substractor Va in V Vb in V Cald Vo = - Rf/R (Va Vb) Obsd Vo in V in V

Error = Obsd Cald

Input Voltage Vin volts

Input time period in ms

For Integrator Input Output frequency in voltage Vo in KH Z Volts

Output time period in ms

Output frequency in KH Z

Input Voltage Vin volts

Input time period in ms

For Differentiator Input Output frequency in voltage Vo in KH Z Volts

Output time period in ms

Output frequency in KH Z

7.3.9 Specimen calculation: 7.3.10 Nature of graph:

----- Not applicable -----

Integrator

Differentiator

7.3.11 Conclusion of the experiment: Operational amplifiers can be used for a wide range of applications.They range from amplification of small signal voltages to mathematical operations such as integration & differentiation of input voltage signals.

10

7.4.1 Title of the Experiment: I to V converter & V to I converter. 7.4.2 Objective of the Experiment: To study and design I to V converter & V to I converter and verify the performance. 7.4.3 List of Component / Equipments: Components / Sl. no 1 2 3 4 5 6 Equipments Op-Amp Resistors Ammeter Power supply ALS power pack Voltmeter Specification A-741 10K watt CFR 1K watt CFR 0-50mA 0 30 V, 2A +12V and -12V 0-50V Quantity 01 02 each 01 01 01 01

7.4.4 Experimental setup:

I to V converter circuit

V-I Converter circuit 11

7.4.5 Theoretical background for the experiment/validation of the experiment: 7.4.6 Formulae-required 7.4.7 Step by step procedure to carry out experiment: For an I to V converter after connecting the circuit the input current is varied in steps of 1mA and measure the output voltage. Check this value with the calculated output voltage and find out the error. Similarly for a V to I converter with grounded load, keep the input voltage at constant value then vary the RL and note down IL and Vo. Then keep RL constant and vary the input voltage Vin and note down the current IL. The error between the observed and the calculated values should be evaluated. Same procedure should be followed for a V to I converter with floating load.

7.4.8 Table of observation: Vin in Volts I in in mA With RL = 500 Ohms Calcd Vo in Obsd Vo in Volts Volts Error = Obsd Calcd

RL in Ohms

Obsd IL in mA

With Vin = 5 Volts Calcd IL= Error = Obsd Calcd Vin/R1 in mA

Vin in Volts

With RL = 500 Ohms Obsd IL in mA Calcd IL= Vin/R1 in Error = Obsd mA Calcd

7.4.9 Specimen calculation: 7.4.10 Nature of graph:

Graph for I to V 7.4.11 Conclusion of the experiment: 12

7.5.1 Title of the Experiment: Half wave & full wave precision rectifiers 7.5.2 Objective of the Experiment: To study and design of Half wave & full wave precision rectifiers and verify the performance. 7.5.3 List of Component / Equipments: Components / Sl. no 1 2 3 4 5 6 7 8 Equipments Op-Amp Resistors Diode Power supply ALS power pack Voltmeter AFO CRO Specification A-741 1K watt CFR BY-127 0 30 V, 2A +12V and -12V 0-50V 0 1 MH Z Quantity 02 05 02 01 01 01 01 01

7.5.4 Experimental setup:

Non inverting precision rectifier

Half wave rectifier

13

Full wave precision rectifier

7.5.5 Theoretical background for the experiment/validation of the experiment:

7.5.6 Formulae-required:

Not Applicable

7.5.7 Step by step procedure to carry out experiment: Electrical connections are made as shown in the circuit diagram. The i/p is given from the AFO of required voltage and frequency. The rectified o/p observed on CKO The amplitude of rectified o/p will be equal to half the peak to peak voltage of i/p. Circuit connections are made as per circuit diagram. When diodes D1 & D2 are connected as in 1st circuit the ve half cycle is inverted &the +ve half cycle remains as it is. So we observe on the CRO that both the cycles are rectified. When diodes D1 & D2 are connected as in 2nd circuit the rectified o/p will be along negative direction is observed on CRO. The amplitude of the o/p wave form is noted.

7.5.8 Table of observation: Non Inverting Precision HW-Rectifier Input Voltage Vin volts Input time period in ms Input frequency in KH Z Output voltage Vo in Volts Output time period in ms Output frequency in KH Z

14

Inverting Precision HW-Rectifier Input Voltage Vin volts Input time period in ms Input frequency in KH Z Output voltage Vo in Volts Output time period in ms Output frequency in KH Z

Inverting Precision FW-Rectifier Input Voltage Vin volts Input time period in ms Input frequency in KH Z Output voltage Vo in Volts Output time period in ms Output frequency in KH Z

7.5.9 Specimen calculation: 7.5.10 Nature of graph:

. Not Applicable ..

Half wave rectifier

Full Wave rectifier 7.5.11 Conclusion of the experiment:

15

7.6.1 Title of the Experiment: Design of low pass filters (Butterworth I & II order). 7.6.2 Objective of the Experiment: To design an low pass filters (Butterworth I & II order) and verify the response. 7.6.3 List of Component / Equipments:
Sl. no 1 2 3 4 5 6 Component/ Equipments Regulated DC CRO Crystal BNCs BJT Resistors Specification 0-30V, 2A 80 Vpp/20MHz 32.768KHz ---2N3904 27K, 0.25W, CFR 18K, 0.25W, CFR 2.2K, 0.25W, CFR 10K, 0.25W, CFR 12pF(ceramic disc) 0.001micro/25V, 10H Quantity 01 01 01 03 01 01(each)

Capacitors Inductor

01(each)

7.6.4 Experimental setup:

7.6.5 Theoretical background for the experiment/validation of the experiment:

7.6.6 Formulae-required:

---------Not Applicable---------

7.6.7 Step by step procedure to carry out experiment: 7.6.8 Table of observation:

7.6.9 Specimen calculation: 7.6.10 Nature of graph:

---------Not Applicable---------

7.6.11 Conclusion of the experiment:

16

7.7.1 Title of the Experiment: Design of high pass filters (Butterworth I & II order). 7.7.2 Objective of the Experiment: To Design and test the performance of of high pass filters (Butterworth I & II order). 7.7.3 List of Component / Equipments: Sl. No 1 2 3 4 5 6 7 Component / Equipments
Diodes Resistor AFO CRO DC Power supply BNCs Capacitors 0.1uF, 10uF

Specification
OA79,1N4007 1k 1MHz,20Vp-p 20MHz,80Vp-p 0 30V, 2A

Quantity
02 each 01 01 01 01 03 01,01

7.7.4 Experimental setup: 7.7.5 Theoretical background for the experiment/validation of the experiment: 7.7.6 Formulae-required: ----- Not Applicable -----

7.7.7 Step by step procedure to carry out experiment: 7.7.8 Table of observation: 1. 7.7.9 Specimen calculation: ----- Not Applicable -----

7.7.10 Nature of graph:

7.7.11 Conclusion of the experiment:

17

7.8.1 Title of the Experiment: Instrumentation amplifier- Design for Different gains 7.8.2 Objective of the Experiment: To design and test the performance of Instrumentation amplifier- Design for Different gains. 7.8.3 List of Component / Equipments: Sl. No 1 2 3 4 5 6 7.8.4 Experimental setup: Component / Equipments Specification Quantity

Instrumentation Amplifier

7.8.5 Theoretical background for the experiment/validation of the experiment:

7.8.6 Formulae-required:

----- Not Applicable -----

7.8.7 Step by step procedure to carry out experiment: Electrical connections are made as shown in the circuit diagram. The function generator (AFO) is kept at 1 kHz frequency and Vin at 3Vp. The input and output waveforms for both circuits are noted/plotted down.

7.8.8 Table of observation: 7.8.9 Specimen calculation: ----- Not Applicable ----7.8.10 Nature of graph: 7.8.11 Conclusion of the experiment: After conducting the experiment we Conclude that the input ac signal is clamped to the desired DC level by providing the DC bias to the clamping circuit.

18

7.9.1 Title of the Experiment: RC phase shift and Wein bridge Oscillators. 7.9.2 Objective of the Experiment: To design and study the performance of RC phase shift and Wein bridge Oscillators 7.9.3 List of Component / Equipments: Components / Sl. no 1 2 3 4 5 6 7 Equipments ALS power supply Resistors Capacitors Power supply BNC CRO Op-amp 20 MHz/80Vpp A-741 Specification +12V and -12V, 2A Calculated values to be place 0.1F 0 30 V, 2A Quantity 01 03 03 01 01 01 01

7.9.4 Experimental setup:

PC phase shift oscillator

Wein bridge oscillator 19

7.9.5 Theoretical background for the experiment/validation of the experiment: A phase-shift oscillator is a simple sine wave electronic oscillator. It contains an inverting amplifier, and a feedback filter which 'shifts' the phase by 180 degrees at the oscillation frequency. The filter must be designed so that at frequencies above and below the oscillation frequency the signal is shifted by either more or less than 180 degrees. This results in constructive superposition for signals at the oscillation frequencies, and destructive superposition for all other frequencies. The most common way of achieving this kind of filter is using three cascaded resistor-capacitor filters, which produce no phase shift at one end of the frequency scale, and a phase shift of 270 degrees at the other end. At the oscillation frequency each filter produces a phase shift of 60 degrees and the whole filter circuit produces a phase shift of 180 degrees. One of the simplest implementations for this type of oscillator uses an operational amplifier (opamp), three capacitors and four resistors, as shown in the diagram. The mathematics for calculating the oscillation frequency and oscillation criterion for this circuit are surprisingly complex, due to each R-C stage loading the previous ones. The calculations are greatly simplified by setting all the resistors (except the negative feedback resistor) and all the capacitors to the same values. In the diagram, if R1 = R2 = R3 = R, and C1 = C2 = C3 = C, then

and the oscillation criterion is:

A Wien bridge oscillator is a type of electronic oscillator that generates sine waves without having any input source. It can output a large range of frequencies. The bridge comprises four resistors and two capacitors. The circuit is based on a network originally developed by Max Wien in 1891. At that time, Wien did not have a means of developing electronic gain so a workable oscillator could not be realized. The modern circuit is derived from William Hewlett's 1939 Stanford University master's degree thesis. Hewlett, along with David Packard co-founded Hewlett-Packard. Their first product was the HP 200A, a precision sine wave oscillator based on the Wien bridge. The 200A is a classic instrument known for its low distortion. The frequency of oscillation is given by:

20

7.9.6 Formulae-required

3.

7.9.7 Step by step procedure to carry out experiment: Electrical connections are made as per circuit diagram. The designed values of resistors and capacitors are added to the circuit. The output waveform is observed on CRO. Note down the practical values such as output magnitude and frequency. Calculate the theoretical output frequency. And finally calculate the deviations.

7.9.8 Table of observation: RC Phase shift Oscillator Output Voltage in volts Output wave time T in ms Practical requency in KH z = 1/T Theoratical Frequency Error

Wein bridge Oscillator Output Voltage in volts Output wave time T in ms Practical requency in KH z = 1/T Theoratical Frequency Error

7.9.9 Specimen calculation:

7.9.10 Nature of graph:

7.9.11 Conclusion of the experiment: 21

7.10.1 Title of the Experiment: ZCD, Positive voltage level & Negative voltage level detectors. 7.10.2 Objective of the Experiment: To design and study the performance of ZCD, Positive voltage level & Negative voltage level detectors. 7.10.3 List of Component / Equipments: Sl.No 1. 2. 3. 4. 5. 6. 7. Diode Resistors Capacitors Step down transformer CRO DMM DRB Item Specification BY127 2.2k,1k, 4.7k 0.1uF10F, 4.7F, 47F 6-0-6V, 9-0-9V 20 MHz,80Vp-p 500V/10A/200mA 1-1Mohm Quantity 04 01 each 01 each 01 each 01 03 01

7.10.4 Experimental setup: 7.10.5 Theoretical background for the experiment/validation of the experiment: 7.10.6 Formulae-required 7.10.7 Step by step procedure to carry out experiment: 7.10.8 Table of observation:
Without Filter:

7.10.9 Specimen calculation: 7.10.10 Nature of graph 7.10.11 Conclusion of the experiment:

22

7.11.1 Title of the Experiment: Schmitt trigger- Design for different hystersis. 7.11.2 Objective of the Experiment: Design and Testing of Schmitt trigger for a noise margin +/-12V and dead band of 6V 7.11.3 List of Component / Equipments: Sl.No 1. 2. 3. 4. 5. 6. 7 Item Resistors CRO DMM DC Power supply Op-amp AFO BNC Specification 300K watt CFR 10K watt CFR 20 MHz,80Vp-p 500V/10A/200mA 0 30 V, 2A A-741 0-1MH Z Quantity 01 each 01 03 01 01 01 02

7.11.4 Experimental setup:

7.11.5 Theoretical background for the experiment/validation of the experiment: Schmitt trigger converts on irregular shaped waveform to a square wave or pulse. The i/p voltage Vin triggers the o/p every time it exceeds certain voltage levels called the upperthreshold voltage V UT and lower threshold voltage V LT . When Vo = +Vsat the voltage across R1 is called the upper threshold voltage V UT R1 V UT = (+Vsat) R1 + R 2 The i/p voltage Vin must be slightly more positive than V UT in order to cause the o/p Vo to switch from +Vsat to Vsat . When Vo=-Vsat R1 The lower threshold voltage Vlt is given as V LT = (-Vsat) R1 + R 2 23

Vin must be slightly more negative than V LT in order to cause Vo to switch from Vsat to +Vsat. Thus if threshold voltage V UT & V LT are made larger than i/p noise margin the positive feedback will eliminate the false o/p transaction. 7.11.6 Formulae-required 1. V UT = 2. V LT = R1 (+Vsat) R1 + R 2

R1 (-Vsat) R1 + R 2

3. Design Calculation Given data: Noise margin = 2V, dead band = 6 V, +Vsat= +12V, -Vsat= - 12V 7.11.7 Step by step procedure to carry out experiment: Connections are made as per circuit diagram. The i/p is given in such a way that the o/p switches between +Vsat and Vsat. From the o/p waveform and the i/p waveform the dead band is calculated. Feeding i/p to channel A and o/p to channel B and adjusting CRO to x vin A mode the hysteresis width is measured. 7.11.8 Table of observation: Input Voltage Vin volts Noise margin Dead band voltage +Ve Sat voltage -ve Saturation Voltage Output frequency in KH Z

7.11.9 Specimen calculation: 7.11.10 Nature of graph:

7.11.11 Conclusion of the experiment: 24

7.12.1 Title of the Experiment: Design of Astable and Monostable Multivibrator using 555 timer. 7.12.2 Objective of the Experiment: To design and study the performance of Astable and Monostable Multivibrator using 555 timer. 7.12.3 List of Component / Equipments: Sl.No 1. 2. 3. 4. 5. Item Regulated Power supply Resistors Capacitors CRO BNC Specification 0-30V 1K watt CFR 500 watt CFR 0.1F 20 MHz,80Vp-p Quantity 1 01 each 01 each 01 01

7.12.4 Experimental setup: 555 timer as astable multivibrator:

555 Timer as Monostable multivibrator:

25

7.12.5 Theoretical background for the experiment/validation of the experiment: Astable Multivibrator: Circuit diagram shows how a 555 timer IC is configured to function as an astable multivibrator. An astable multivibrator is a timing circuit whose 'low' and 'high' states are both unstable. As such, the output of an astable multivibrator toggles between 'low' and 'high' continuously, in effect generating a train of pulses. This circuit is therefore also known as a 'pulse generator' circuit. In this circuit, capacitor C1 charges through R1 and R2, eventually building up enough voltage to trigger an internal comparator to toggle the output flip-flop. Once toggled, the flip-flop discharges C1 through R2 into pin 7, which is the discharge pin. When C1's voltage becomes low enough, another internal comparator is triggered to toggle the output flip-flop. This once again allows C1 to charge up through R1 and R2 and the cycle starts all over again. C1's charge-up time t1 is given by: t1 = 0.693(R1+R2)C1. C1's discharge time t2 is given by: t2 = 0.693(R2)C1. Thus, the total period of one cycle is t1+t2 = 0.693 C1(R1+2R2). The frequency f of the output wave is the reciprocal of this period, and is therefore given by: f = 1.44/(C1(R1+2R2)), wherein f is in Hz if R1 and R2 are in megaohms and C1 is in microfarads. Monostable Multivibrator: This circuit diagram shows how a 555 timer IC is configured to function as a basic monostable multivibrator. A monostable multivibrator is a timing circuit that changes state once triggered, but returns to its original state after a certain time delay. It got its name from the fact that only one of its output states is stable. It is also known as a 'oneshot'. In this circuit, a negative pulse applied at pin 2 triggers an internal flip-flop that turns off pin 7's discharge transistor, allowing C1 to charge up through R1. At the same time, the flip-flop brings the output (pin 3) level to 'high'. When capacitor C1 as charged up to about 2/3 Vcc, the flip-flop is triggered once again, this time making the pin 3 output 'low' and turning on pin 7's discharge transistor, which discharges C1 to ground. This circuit, in effect, produces a pulse at pin 3 whose width t is just the product of R1 and C1, i.e., t=1.1 R1C1. The reset pin, which may be used to reset the timing cycle by pulling it momentarily low, should be tied to the Vcc if it will not be used. 7.12.6 Formulae-required 1. T1 = 0.693 (Ra + Rb) * Ct charge time of Ct. 2. T2 = 0.693 (Rb * Ct) discharge time of Ct. 3. T = T1 + T 2 total period in seconds. 4. F = 1 / T = 1.44 / ((Ra + (2 * Rb)) * Ct) Frequency in Hertz. 5. D = T 2 / T duty cycle, multiply by 100 to get %.. 6. % Duty Cycle = tc/t x 100 RA + RB = X 100 RA + 2 RB 7. T = 1.1RC 26

7.12.7 Step by step procedure to carry out experiment: Astable Multivibrator: Design a astable multi for a pulse of 1.386ms. Set duty cycle to 75%. Verify the values of RA=1k, RB=0.5k. Connect the circuit as shown in Figure. Measure and capture the waveforms of the input, output and the voltage across the capacitor. Measure the time period and duty cycle of the output and compare with the theoretical values. Monostable Multivibrator: Design a monostable multi for a pulse of 1.1 ms. Connect the circuit as shown in figure. Using a wire connect trigger input to ground momentarily to trigger the circuit. Since T is high enough, You should be able to see the single pulse on the scope screen connected to the output. Try a few times until you see the whole pulse and measure the width. Compare this width (period) with the time period you calculated. Alternatively disconnect the output from the scope and connect to a series circuit consisting of an LED and a 150 ohm resistor. Using a wire connect trigger input to ground momentarily to trigger the circuit. You should observe LED blink for a short period of time set by the period. Show your results to your instructor/ lab TA. 7.12.8 Table of observation: Astable Multivibrator: 1. T C = .. Sec 2. T D = .. Sec 3. T= T C + T D = sec 4. Frequency = F = 1/T = .. H Z Monostable Multivibrator: 1. T ON = .. Sec 2. T OFF = sec 3. T = T ON + T OFF = .. Sec 4. F = 1 / T = H Z. 7.12.9 Specimen calculation: 1. Astable multivibrator:

2. Monostable multivibrator:

27

7.12.10 Nature of graph Astable Multivibrator:

Monostable Multivibrator:

7.12.11 Conclusion of the experiment: After conducting the experiment we conclude that, astable multivibrator is a free running oscillator. And monostable multivibrator has one stable state, it changes its state when trigger pulse is applied. After some time delay its output comes back to original state.

28